diff --git a/CMakeLists.txt b/CMakeLists.txt
index de05f7a..2daf8bb 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -37,6 +37,16 @@ target_include_directories(quasar PRIVATE ${EXTERN_LIBS_PATH}/cxxopts/include/)
 target_include_directories(quasar PRIVATE ${EXTERN_LIBS_PATH}/eigen-3.4.0/)
 target_include_directories(quasar PRIVATE ${EXTERN_LIBS_PATH}/brent/)
 
+set(PGEN_PATH "${EXTERN_LIBS_PATH}/pgenlib")
+add_custom_target(
+   pgenlib
+   COMMAND make
+   WORKING_DIRECTORY ${PGEN_PATH}
+)
+target_link_libraries(quasar PRIVATE ${PGEN_PATH}/pgenlib.a)
+target_include_directories(quasar PRIVATE ${PGEN_PATH} ${PGEN_PATH}/simde/ ${PGEN_PATH}/include/)
+add_dependencies(quasar pgenlib)
+
 enable_testing()
 
 add_executable(quasar_tests EXCLUDE_FROM_ALL tests/test_smoke.cpp)
diff --git a/example/chr22-n100.pgen b/example/chr22-n100.pgen
new file mode 100644
index 0000000..95833dd
Binary files /dev/null and b/example/chr22-n100.pgen differ
diff --git a/example/chr22-n100.psam b/example/chr22-n100.psam
new file mode 100644
index 0000000..7d5db2c
--- /dev/null
+++ b/example/chr22-n100.psam
@@ -0,0 +1,101 @@
+#IID	SEX
+691_692	NA
+693_694	NA
+688_689	NA
+683_684	NA
+684_685	NA
+686_687	NA
+689_690	NA
+687_688	NA
+690_691	NA
+685_686	NA
+692_693	NA
+682_683	NA
+825_826	NA
+823_824	NA
+829_830	NA
+832_833	NA
+831_832	NA
+827_828	NA
+830_831	NA
+824_825	NA
+842_843	NA
+843_844	NA
+826_827	NA
+847_848	NA
+836_837	NA
+990_991	NA
+835_836	NA
+848_849	NA
+989_990	NA
+997_998	NA
+834_835	NA
+849_850	NA
+985_986	NA
+851_852	NA
+845_846	NA
+850_851	NA
+846_847	NA
+852_853	NA
+999_1000	NA
+996_997	NA
+995_996	NA
+812_813	NA
+994_995	NA
+991_992	NA
+992_993	NA
+998_999	NA
+811_812	NA
+810_811	NA
+986_987	NA
+993_994	NA
+857_858	NA
+1003_1004	NA
+1002_1003	NA
+854_855	NA
+855_856	NA
+1004_1005	NA
+858_859	NA
+1000_1001	NA
+1001_1002	NA
+987_988	NA
+856_857	NA
+853_854	NA
+988_989	NA
+859_860	NA
+802_803	NA
+804_805	NA
+891_892	NA
+865_866	NA
+1007_1008	NA
+861_862	NA
+862_863	NA
+860_861	NA
+864_865	NA
+1006_1007	NA
+803_804	NA
+863_864	NA
+890_891	NA
+1005_1006	NA
+1009_1010	NA
+805_806	NA
+1010_1011	NA
+1008_1009	NA
+807_808	NA
+893_894	NA
+806_807	NA
+892_893	NA
+1011_1012	NA
+1014_1015	NA
+808_809	NA
+809_810	NA
+1012_1013	NA
+1021_1022	NA
+1016_1017	NA
+1023_1024	NA
+1018_1019	NA
+898_899	NA
+1019_1020	NA
+894_895	NA
+899_900	NA
+896_897	NA
diff --git a/example/chr22-n100.pvar b/example/chr22-n100.pvar
new file mode 100644
index 0000000..32c4240
--- /dev/null
+++ b/example/chr22-n100.pvar
@@ -0,0 +1,69639 @@
+#CHROM	POS	ID	REF	ALT
+22	16849573	22:16849573A-G	A	G
+22	16849971	22:16849971A-T	A	T
+22	16850437	22:16850437G-A	G	A
+22	16851225	22:16851225C-T	C	T
+22	16851356	22:16851356C-T	C	T
+22	16851640	22:16851640C-T	C	T
+22	16851673	22:16851673A-G	A	G
+22	16851899	22:16851899C-G	C	G
+22	16852312	22:16852312G-A	G	A
+22	16852652	22:16852652G-A	G	A
+22	16852914	22:16852914G-A	G	A
+22	16853019	22:16853019A-G	A	G
+22	16853178	22:16853178C-T	C	T
+22	16853625	22:16853625A-C	A	C
+22	16855618	22:16855618G-A	G	A
+22	16858076	22:16858076A-G	A	G
+22	16858191	22:16858191T-C	T	C
+22	16858364	22:16858364C-T	C	T
+22	16858684	22:16858684G-A	G	A
+22	16858723	22:16858723G-A	G	A
+22	16859704	22:16859704T-G	T	G
+22	16860036	22:16860036T-A	T	A
+22	16860139	22:16860139T-G	T	G
+22	16860336	22:16860336T-C	T	C
+22	16860360	22:16860360G-A	G	A
+22	16860442	22:16860442G-A	G	A
+22	16860496	22:16860496T-C	T	C
+22	16860767	22:16860767A-T	A	T
+22	16860813	22:16860813G-C	G	C
+22	16860967	22:16860967A-G	A	G
+22	16860985	22:16860985T-C	T	C
+22	16861056	22:16861056G-A	G	A
+22	16862213	22:16862213A-G	A	G
+22	16862282	22:16862282G-A	G	A
+22	16862531	22:16862531C-T	C	T
+22	16863070	22:16863070A-G	A	G
+22	16869617	22:16869617A-G	A	G
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diff --git a/example/run-quasar.sh b/example/run-quasar.sh
index dba904e..4e03a86 100644
--- a/example/run-quasar.sh
+++ b/example/run-quasar.sh
@@ -2,13 +2,22 @@
 
 # Linear model.
 /home/jp2045/quasar/build/quasar \
-  -p chr22-n100 \
-  -b mean-pheno-n100.bed \
-  -c cov-n100.tsv \
+  --plink chr22-n100 \
+  --bed mean-pheno-n100.bed \
+  --cov cov-n100.tsv \
   -o lm-example \
   --model lm \
   --mode cis
 
+# Linear model with pgen.
+/home/jp2045/quasar/build/quasar \
+  --pgen chr22-n100 \
+  --bed mean-pheno-n100.bed \
+  --cov cov-n100.tsv \
+  -o lm-pgen-example \
+  --model lm \
+  --mode cis
+
 # Negative binomial GLM.
 /home/jp2045/quasar/build/quasar \
   -p chr22-n100 \
diff --git a/external_libs/pgenlib/LICENSE b/external_libs/pgenlib/LICENSE
new file mode 100644
index 0000000..0a04128
--- /dev/null
+++ b/external_libs/pgenlib/LICENSE
@@ -0,0 +1,165 @@
+                   GNU LESSER GENERAL PUBLIC LICENSE
+                       Version 3, 29 June 2007
+
+ Copyright (C) 2007 Free Software Foundation, Inc. <https://fsf.org/>
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+
+  This version of the GNU Lesser General Public License incorporates
+the terms and conditions of version 3 of the GNU General Public
+License, supplemented by the additional permissions listed below.
+
+  0. Additional Definitions.
+
+  As used herein, "this License" refers to version 3 of the GNU Lesser
+General Public License, and the "GNU GPL" refers to version 3 of the GNU
+General Public License.
+
+  "The Library" refers to a covered work governed by this License,
+other than an Application or a Combined Work as defined below.
+
+  An "Application" is any work that makes use of an interface provided
+by the Library, but which is not otherwise based on the Library.
+Defining a subclass of a class defined by the Library is deemed a mode
+of using an interface provided by the Library.
+
+  A "Combined Work" is a work produced by combining or linking an
+Application with the Library.  The particular version of the Library
+with which the Combined Work was made is also called the "Linked
+Version".
+
+  The "Minimal Corresponding Source" for a Combined Work means the
+Corresponding Source for the Combined Work, excluding any source code
+for portions of the Combined Work that, considered in isolation, are
+based on the Application, and not on the Linked Version.
+
+  The "Corresponding Application Code" for a Combined Work means the
+object code and/or source code for the Application, including any data
+and utility programs needed for reproducing the Combined Work from the
+Application, but excluding the System Libraries of the Combined Work.
+
+  1. Exception to Section 3 of the GNU GPL.
+
+  You may convey a covered work under sections 3 and 4 of this License
+without being bound by section 3 of the GNU GPL.
+
+  2. Conveying Modified Versions.
+
+  If you modify a copy of the Library, and, in your modifications, a
+facility refers to a function or data to be supplied by an Application
+that uses the facility (other than as an argument passed when the
+facility is invoked), then you may convey a copy of the modified
+version:
+
+   a) under this License, provided that you make a good faith effort to
+   ensure that, in the event an Application does not supply the
+   function or data, the facility still operates, and performs
+   whatever part of its purpose remains meaningful, or
+
+   b) under the GNU GPL, with none of the additional permissions of
+   this License applicable to that copy.
+
+  3. Object Code Incorporating Material from Library Header Files.
+
+  The object code form of an Application may incorporate material from
+a header file that is part of the Library.  You may convey such object
+code under terms of your choice, provided that, if the incorporated
+material is not limited to numerical parameters, data structure
+layouts and accessors, or small macros, inline functions and templates
+(ten or fewer lines in length), you do both of the following:
+
+   a) Give prominent notice with each copy of the object code that the
+   Library is used in it and that the Library and its use are
+   covered by this License.
+
+   b) Accompany the object code with a copy of the GNU GPL and this license
+   document.
+
+  4. Combined Works.
+
+  You may convey a Combined Work under terms of your choice that,
+taken together, effectively do not restrict modification of the
+portions of the Library contained in the Combined Work and reverse
+engineering for debugging such modifications, if you also do each of
+the following:
+
+   a) Give prominent notice with each copy of the Combined Work that
+   the Library is used in it and that the Library and its use are
+   covered by this License.
+
+   b) Accompany the Combined Work with a copy of the GNU GPL and this license
+   document.
+
+   c) For a Combined Work that displays copyright notices during
+   execution, include the copyright notice for the Library among
+   these notices, as well as a reference directing the user to the
+   copies of the GNU GPL and this license document.
+
+   d) Do one of the following:
+
+       0) Convey the Minimal Corresponding Source under the terms of this
+       License, and the Corresponding Application Code in a form
+       suitable for, and under terms that permit, the user to
+       recombine or relink the Application with a modified version of
+       the Linked Version to produce a modified Combined Work, in the
+       manner specified by section 6 of the GNU GPL for conveying
+       Corresponding Source.
+
+       1) Use a suitable shared library mechanism for linking with the
+       Library.  A suitable mechanism is one that (a) uses at run time
+       a copy of the Library already present on the user's computer
+       system, and (b) will operate properly with a modified version
+       of the Library that is interface-compatible with the Linked
+       Version.
+
+   e) Provide Installation Information, but only if you would otherwise
+   be required to provide such information under section 6 of the
+   GNU GPL, and only to the extent that such information is
+   necessary to install and execute a modified version of the
+   Combined Work produced by recombining or relinking the
+   Application with a modified version of the Linked Version. (If
+   you use option 4d0, the Installation Information must accompany
+   the Minimal Corresponding Source and Corresponding Application
+   Code. If you use option 4d1, you must provide the Installation
+   Information in the manner specified by section 6 of the GNU GPL
+   for conveying Corresponding Source.)
+
+  5. Combined Libraries.
+
+  You may place library facilities that are a work based on the
+Library side by side in a single library together with other library
+facilities that are not Applications and are not covered by this
+License, and convey such a combined library under terms of your
+choice, if you do both of the following:
+
+   a) Accompany the combined library with a copy of the same work based
+   on the Library, uncombined with any other library facilities,
+   conveyed under the terms of this License.
+
+   b) Give prominent notice with the combined library that part of it
+   is a work based on the Library, and explaining where to find the
+   accompanying uncombined form of the same work.
+
+  6. Revised Versions of the GNU Lesser General Public License.
+
+  The Free Software Foundation may publish revised and/or new versions
+of the GNU Lesser General Public License from time to time. Such new
+versions will be similar in spirit to the present version, but may
+differ in detail to address new problems or concerns.
+
+  Each version is given a distinguishing version number. If the
+Library as you received it specifies that a certain numbered version
+of the GNU Lesser General Public License "or any later version"
+applies to it, you have the option of following the terms and
+conditions either of that published version or of any later version
+published by the Free Software Foundation. If the Library as you
+received it does not specify a version number of the GNU Lesser
+General Public License, you may choose any version of the GNU Lesser
+General Public License ever published by the Free Software Foundation.
+
+  If the Library as you received it specifies that a proxy can decide
+whether future versions of the GNU Lesser General Public License shall
+apply, that proxy's public statement of acceptance of any version is
+permanent authorization for you to choose that version for the
+Library.
diff --git a/external_libs/pgenlib/Makefile b/external_libs/pgenlib/Makefile
new file mode 100644
index 0000000..262d920
--- /dev/null
+++ b/external_libs/pgenlib/Makefile
@@ -0,0 +1,27 @@
+#
+# Makefile to compile PGEN library
+#
+AR         ?= ar
+CXX        ?= g++
+CXXFLAGS    = -O3 -Wall -std=c++11
+CFLAGS      = 
+
+UNAME_S := $(shell uname -s)
+ifeq ($(UNAME_S),Darwin)
+ CXXFLAGS += -arch x86_64
+endif
+
+OBJECTS       = $(patsubst %.cc,%.o,$(wildcard ./include/*.cc)) $(patsubst %.cpp,%.o,$(wildcard *.cpp))  $(patsubst %.cc,%.o,$(wildcard *.cc))
+INC           =  -I./simde/ -I./include/
+
+pgenlib.a: ${OBJECTS}
+	${AR} rcs $@ $^ 
+
+%.o: %.cpp
+	${CXX} ${CXXFLAGS} -o $@ -c $< ${INC}
+
+%.o: %.cc
+	${CXX} ${CXXFLAGS} -o $@ -c $< ${INC}
+
+clean:
+	rm -f *.o *.a ./include/*.o
diff --git a/external_libs/pgenlib/include/pgenlib_misc.cc b/external_libs/pgenlib/include/pgenlib_misc.cc
new file mode 100644
index 0000000..332ec39
--- /dev/null
+++ b/external_libs/pgenlib/include/pgenlib_misc.cc
@@ -0,0 +1,3630 @@
+// This library is part of PLINK 2.0, copyright (C) 2005-2024 Shaun Purcell,
+// Christopher Chang.
+//
+// This library is free software: you can redistribute it and/or modify it
+// under the terms of the GNU Lesser General Public License as published by the
+// Free Software Foundation; either version 3 of the License, or (at your
+// option) any later version.
+//
+// This library is distributed in the hope that it will be useful, but WITHOUT
+// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public License
+// for more details.
+//
+// You should have received a copy of the GNU Lesser General Public License
+// along with this library.  If not, see <http://www.gnu.org/licenses/>.
+
+
+#include "pgenlib_misc.h"
+
+#ifdef __cplusplus
+namespace plink2 {
+#endif
+
+#ifdef USE_AVX2
+void CopyNyparrNonemptySubset(const uintptr_t* __restrict raw_nyparr, const uintptr_t* __restrict subset_mask, uint32_t raw_nyparr_entry_ct, uint32_t subset_entry_ct, uintptr_t* __restrict output_nyparr) {
+  if (subset_entry_ct == raw_nyparr_entry_ct) {
+    memcpy(output_nyparr, raw_nyparr, DivUp(subset_entry_ct, kBitsPerWordD2) * sizeof(intptr_t));
+    ZeroTrailingNyps(subset_entry_ct, output_nyparr);
+    return;
+  }
+  assert(subset_entry_ct);
+  uintptr_t cur_output_word = 0;
+
+  uintptr_t* output_nyparr_iter = output_nyparr;
+
+  uintptr_t* output_nyparr_last = &(output_nyparr[subset_entry_ct / kBitsPerWordD2]);
+  const uint32_t word_write_shift_end = 2 * (subset_entry_ct % kBitsPerWordD2);
+  uint32_t word_write_shift = 0;
+  for (uint32_t subset_mask_widx = 0; ; ++subset_mask_widx) {
+    const uintptr_t cur_include_word = subset_mask[subset_mask_widx];
+    if (cur_include_word) {
+      uint32_t cur_include_halfword = S_CAST(Halfword, cur_include_word);
+      for (uint32_t wordhalf_idx = 0; ; ++wordhalf_idx) {
+        if (cur_include_halfword) {
+          uintptr_t extracted_bits = raw_nyparr[subset_mask_widx * 2 + wordhalf_idx];
+          uint32_t set_bit_ct = kBitsPerWord;
+          if (cur_include_halfword != UINT32_MAX) {
+            const uintptr_t pext_mask = 3 * UnpackHalfwordToWord(cur_include_halfword);
+            extracted_bits = _pext_u64(extracted_bits, pext_mask);
+            set_bit_ct = PopcountWord(pext_mask);
+          }
+          cur_output_word |= extracted_bits << word_write_shift;
+          word_write_shift += set_bit_ct;
+          if (word_write_shift >= kBitsPerWord) {
+            *output_nyparr_iter++ = cur_output_word;
+            word_write_shift -= kBitsPerWord;
+            cur_output_word = 0;
+            if (word_write_shift) {
+              cur_output_word = extracted_bits >> (set_bit_ct - word_write_shift);
+            }
+          }
+        }
+        if (wordhalf_idx) {
+          break;
+        }
+        cur_include_halfword = cur_include_word >> kBitsPerWordD2;
+      }
+      if (output_nyparr_iter == output_nyparr_last) {
+        if (word_write_shift == word_write_shift_end) {
+          if (word_write_shift_end) {
+            *output_nyparr_last = cur_output_word;
+          }
+          return;
+        }
+      }
+    }
+  }
+}
+
+// bit_idx_start assumed to be < kBitsPerWord
+void CopyGenomatchSubset(const uintptr_t* __restrict raw_bitarr, const uintptr_t* __restrict genoarr, uintptr_t match_word, uint32_t write_bit_idx_start, uint32_t bit_ct, void* __restrict output) {
+  const uint32_t bit_idx_end = bit_ct + write_bit_idx_start;
+  const uint32_t bit_idx_end_lowbits = bit_idx_end % kBitsPerWord;
+  const Halfword* raw_bitarr_alias = DowncastKWToHW(raw_bitarr);
+  unsigned char* output_biter = S_CAST(unsigned char*, output);
+  unsigned char* output_last = &(output_biter[(bit_idx_end / kBitsPerWord) * kBytesPerWord]);
+  uintptr_t cur_output_word = 0;
+  uint32_t read_widx = UINT32_MAX;  // deliberate overflow
+  uint32_t write_idx_lowbits = write_bit_idx_start;
+  while ((output_biter != output_last) || (write_idx_lowbits != bit_idx_end_lowbits)) {
+    uintptr_t cur_mask_word;
+    // sparse genoarr optimization
+    // guaranteed to terminate since there's at least one more set bit
+    do {
+      // todo: try reading two genoarr words at a time.  would need to be very
+      // careful with the possible trailing word, though.
+      // more important to optimize this function now that regular phased-call
+      // handling code is using it.
+      cur_mask_word = genoarr[++read_widx] ^ match_word;
+      cur_mask_word = (~(cur_mask_word | (cur_mask_word >> 1))) & kMask5555;
+    } while (!cur_mask_word);
+    uintptr_t extracted_bits = raw_bitarr_alias[read_widx];
+    uint32_t set_bit_ct = kBitsPerWordD2;
+    if (cur_mask_word != kMask5555) {
+      const uintptr_t cur_mask_hw = PackWordToHalfword(cur_mask_word);
+      set_bit_ct = PopcountWord(cur_mask_word);
+      extracted_bits = _pext_u64(extracted_bits, cur_mask_hw);
+    }
+    cur_output_word |= extracted_bits << write_idx_lowbits;
+    const uint32_t new_write_idx_lowbits = write_idx_lowbits + set_bit_ct;
+    if (new_write_idx_lowbits >= kBitsPerWord) {
+      AppendW(cur_output_word, &output_biter);
+      // ...and these are the bits that fell off
+      // impossible for write_idx_lowbits to be zero here
+      cur_output_word = extracted_bits >> (kBitsPerWord - write_idx_lowbits);
+    }
+    write_idx_lowbits = new_write_idx_lowbits % kBitsPerWord;
+  }
+  if (write_idx_lowbits) {
+    CopyToUnalignedW(output_biter, &cur_output_word);
+  }
+}
+
+// Variant of ExpandBytearr() which is based off a target 2-bit value instead
+// of single expand_mask bits.  expand_size must be the number of instances of
+// the target value in genovec.
+void ExpandBytearrFromGenoarr(const void* __restrict compact_bitarr, const uintptr_t* __restrict genoarr, uintptr_t match_word, uint32_t genoword_ct, uint32_t expand_size, uint32_t read_start_bit, uintptr_t* __restrict target) {
+  const uint32_t expand_sizex_m1 = expand_size + read_start_bit - 1;
+  const uint32_t leading_byte_ct = 1 + (expand_sizex_m1 % kBitsPerWord) / CHAR_BIT;
+  const uint32_t genoword_ct_m1 = genoword_ct - 1;
+  uintptr_t compact_word = SubwordLoad(compact_bitarr, leading_byte_ct) >> read_start_bit;
+  const unsigned char* compact_bitarr_biter = &(S_CAST(const unsigned char*, compact_bitarr)[leading_byte_ct]);
+  uint32_t compact_idx_lowbits = read_start_bit + CHAR_BIT * (sizeof(intptr_t) - leading_byte_ct);
+  for (uint32_t widx = 0; ; widx += 2) {
+    uintptr_t mask_word;
+    if (widx >= genoword_ct_m1) {
+      if (widx > genoword_ct_m1) {
+        return;
+      }
+      mask_word = 0;
+    } else {
+      const uintptr_t geno_word1 = genoarr[widx + 1] ^ match_word;
+      mask_word = PackWordToHalfwordMask5555(~(geno_word1 | (geno_word1 >> 1)));
+      mask_word = mask_word << 32;
+    }
+    const uintptr_t geno_word0 = genoarr[widx] ^ match_word;
+    mask_word |= PackWordToHalfwordMask5555(~(geno_word0 | (geno_word0 >> 1)));
+    uintptr_t write_word = 0;
+    if (mask_word) {
+      const uint32_t mask_set_ct = PopcountWord(mask_word);
+      uint32_t next_compact_idx_lowbits = compact_idx_lowbits + mask_set_ct;
+      if (next_compact_idx_lowbits <= kBitsPerWord) {
+        write_word = _pdep_u64(compact_word, mask_word);
+        if (mask_set_ct != kBitsPerWord) {
+          compact_word = compact_word >> mask_set_ct;
+        } else {
+          // avoid nasal demons
+          compact_word = 0;
+        }
+      } else {
+        uintptr_t next_compact_word;
+        CopyFromUnalignedIncrW(&next_compact_word, &compact_bitarr_biter);
+        next_compact_idx_lowbits -= kBitsPerWord;
+        compact_word |= next_compact_word << (kBitsPerWord - compact_idx_lowbits);
+        write_word = _pdep_u64(compact_word, mask_word);
+        if (next_compact_idx_lowbits != kBitsPerWord) {
+          compact_word = next_compact_word >> next_compact_idx_lowbits;
+        } else {
+          compact_word = 0;
+        }
+      }
+      compact_idx_lowbits = next_compact_idx_lowbits;
+    }
+    target[widx / 2] = write_word;
+  }
+}
+#else  // !USE_AVX2
+void CopyNyparrNonemptySubset(const uintptr_t* __restrict raw_nyparr, const uintptr_t* __restrict subset_mask, uint32_t raw_nyparr_entry_ct, uint32_t subset_entry_ct, uintptr_t* __restrict output_nyparr) {
+  if (subset_entry_ct == raw_nyparr_entry_ct) {
+    // subset_mask may be nullptr in this case
+    memcpy(output_nyparr, raw_nyparr, DivUp(subset_entry_ct, kBitsPerWordD2) * sizeof(intptr_t));
+    ZeroTrailingNyps(subset_entry_ct, output_nyparr);
+    return;
+  }
+  assert(subset_entry_ct);
+  assert(raw_nyparr_entry_ct >= subset_entry_ct);
+  uintptr_t cur_output_word = 0;
+
+  uintptr_t* output_nyparr_iter = output_nyparr;
+
+  uintptr_t* output_nyparr_last = &(output_nyparr[subset_entry_ct / kBitsPerWordD2]);
+  const uint32_t word_write_halfshift_end = subset_entry_ct % kBitsPerWordD2;
+  uint32_t word_write_halfshift = 0;
+  // if <= 2/3-filled, use sparse copy algorithm
+  // (tried CopyBitarrSubset() approach, that actually worsened things)
+  if (subset_entry_ct * (3 * k1LU) <= raw_nyparr_entry_ct * (2 * k1LU)) {
+    for (uint32_t subset_mask_widx = 0; ; ++subset_mask_widx) {
+      const uintptr_t cur_include_word = subset_mask[subset_mask_widx];
+      if (cur_include_word) {
+        uint32_t cur_include_halfword = S_CAST(Halfword, cur_include_word);
+        for (uint32_t wordhalf_idx = 0; ; ++wordhalf_idx) {
+          if (cur_include_halfword) {
+            uintptr_t raw_nyparr_word = raw_nyparr[subset_mask_widx * 2 + wordhalf_idx];
+            do {
+              uint32_t rqa_idx_lowbits = ctzu32(cur_include_halfword);
+              cur_output_word |= ((raw_nyparr_word >> (rqa_idx_lowbits * 2)) & 3) << (word_write_halfshift * 2);
+              if (++word_write_halfshift == kBitsPerWordD2) {
+                *output_nyparr_iter++ = cur_output_word;
+                word_write_halfshift = 0;
+                cur_output_word = 0;
+              }
+              cur_include_halfword &= cur_include_halfword - 1;
+            } while (cur_include_halfword);
+          }
+          if (wordhalf_idx) {
+            break;
+          }
+          cur_include_halfword = cur_include_word >> kBitsPerWordD2;
+        }
+        if (output_nyparr_iter == output_nyparr_last) {
+          if (word_write_halfshift == word_write_halfshift_end) {
+            if (word_write_halfshift_end) {
+              *output_nyparr_last = cur_output_word;
+            }
+            return;
+          }
+        }
+      }
+    }
+  }
+  // blocked copy
+  const uintptr_t* raw_nyparr_iter = raw_nyparr;
+  for (; ; ++subset_mask) {
+    const uintptr_t cur_include_word = *subset_mask;
+    uintptr_t cur_include_halfword = S_CAST(Halfword, cur_include_word);
+    for (uint32_t wordhalf_idx = 0; ; ++wordhalf_idx) {
+      uintptr_t raw_nyparr_word = *raw_nyparr_iter++;
+      while (cur_include_halfword) {
+        const uint32_t rqa_idx_lowbits = ctzw(cur_include_halfword);
+
+        // TAOCP, 7.1.3, (43).
+        const uintptr_t bottom_block_remover = (cur_include_halfword | (cur_include_halfword - 1)) + 1;
+
+        const uintptr_t raw_nyparr_curblock_unmasked = raw_nyparr_word >> (rqa_idx_lowbits * 2);
+        const uint32_t rqa_block_len = ctzw(bottom_block_remover) - rqa_idx_lowbits;
+        const uint32_t block_len_limit = kBitsPerWordD2 - word_write_halfshift;
+        cur_output_word |= raw_nyparr_curblock_unmasked << (2 * word_write_halfshift);
+        if (rqa_block_len < block_len_limit) {
+          word_write_halfshift += rqa_block_len;
+          cur_output_word = bzhi(cur_output_word, word_write_halfshift * 2);
+        } else {
+          // no need to mask, extra bits vanish off the high end
+          *output_nyparr_iter++ = cur_output_word;
+          word_write_halfshift = rqa_block_len - block_len_limit;
+          if (word_write_halfshift) {
+            cur_output_word = bzhi(raw_nyparr_curblock_unmasked >> (2 * block_len_limit), 2 * word_write_halfshift);
+          } else {
+            // avoid potential right-shift-[word length]
+            cur_output_word = 0;
+          }
+        }
+        cur_include_halfword &= bottom_block_remover;
+      }
+      if (wordhalf_idx) {
+        break;
+      }
+      cur_include_halfword = cur_include_word >> kBitsPerWordD2;
+    }
+    if (output_nyparr_iter == output_nyparr_last) {
+      if (word_write_halfshift == word_write_halfshift_end) {
+        if (word_write_halfshift_end) {
+          *output_nyparr_last = cur_output_word;
+        }
+        return;
+      }
+    }
+  }
+}
+
+void CopyGenomatchSubset(const uintptr_t* __restrict raw_bitarr, const uintptr_t* __restrict genovec, uintptr_t match_word, uint32_t write_bit_idx_start, uint32_t bit_ct, void* __restrict output) {
+  const uint32_t bit_idx_end = write_bit_idx_start + bit_ct;
+  const uint32_t bit_idx_end_lowbits = bit_idx_end % kBitsPerWord;
+  const Halfword* raw_bitarr_alias = DowncastKWToHW(raw_bitarr);
+  unsigned char* output_biter = S_CAST(unsigned char*, output);
+  unsigned char* output_last = &(output_biter[(bit_idx_end / kBitsPerWord) * kBytesPerWord]);
+  uintptr_t cur_output_word = 0;
+  uint32_t read_widx = UINT32_MAX;  // deliberate overflow
+  uint32_t write_idx_lowbits = write_bit_idx_start;
+  while ((output_biter != output_last) || (write_idx_lowbits != bit_idx_end_lowbits)) {
+    uintptr_t geno_word;
+    // sparse genovec optimization
+    // guaranteed to terminate since there's at least one more set bit
+    do {
+      geno_word = genovec[++read_widx] ^ match_word;
+      geno_word = (~(geno_word | (geno_word >> 1))) & kMask5555;
+    } while (!geno_word);
+    // screw it, just iterate over set bits
+    const uint32_t cur_halfword = raw_bitarr_alias[read_widx];
+    do {
+      const uint32_t sample_idx_lowbits = ctzw(geno_word) / 2;
+      cur_output_word |= S_CAST(uintptr_t, (cur_halfword >> sample_idx_lowbits) & k1LU) << write_idx_lowbits;
+      if (++write_idx_lowbits == kBitsPerWord) {
+        AppendW(cur_output_word, &output_biter);
+        cur_output_word = 0;
+        write_idx_lowbits = 0;
+      }
+      geno_word &= geno_word - 1;
+    } while (geno_word);
+  }
+  if (write_idx_lowbits) {
+    CopyToUnalignedW(output_biter, &cur_output_word);
+  }
+}
+
+void ExpandBytearrFromGenoarr(const void* __restrict compact_bitarr, const uintptr_t* __restrict genoarr, uintptr_t match_word, uint32_t genoword_ct, uint32_t expand_size, uint32_t read_start_bit, uintptr_t* __restrict target) {
+  Halfword* target_alias = DowncastWToHW(target);
+  ZeroHwArr(RoundUpPow2(genoword_ct, 2), target_alias);
+  const unsigned char* compact_bitarr_alias = S_CAST(const unsigned char*, compact_bitarr);
+  const uint32_t expand_sizex_m1 = expand_size + read_start_bit - 1;
+  const uint32_t compact_widx_last = expand_sizex_m1 / kBitsPerWord;
+  uint32_t compact_idx_lowbits = read_start_bit;
+  uint32_t loop_len = kBitsPerWord;
+  uintptr_t write_hwidx = 0;
+  uintptr_t genomatch_bits = genoarr[0] ^ match_word;
+  genomatch_bits = (~(genomatch_bits | (genomatch_bits >> 1))) & kMask5555;
+  for (uint32_t compact_widx = 0; ; ++compact_widx) {
+    uintptr_t compact_word;
+    if (compact_widx >= compact_widx_last) {
+      if (compact_widx > compact_widx_last) {
+        return;
+      }
+      loop_len = 1 + (expand_sizex_m1 % kBitsPerWord);
+      // avoid possible segfault
+      compact_word = SubwordLoad(&(compact_bitarr_alias[compact_widx * kBytesPerWord]), DivUp(loop_len, CHAR_BIT));
+    } else {
+      CopyFromUnalignedOffsetW(&compact_word, compact_bitarr_alias, compact_widx);
+    }
+    for (; compact_idx_lowbits != loop_len; ++compact_idx_lowbits) {
+      while (!genomatch_bits) {
+        genomatch_bits = genoarr[++write_hwidx] ^ match_word;
+        genomatch_bits = (~(genomatch_bits | (genomatch_bits >> 1))) & kMask5555;
+      }
+      if (compact_word & (k1LU << compact_idx_lowbits)) {
+        const uint32_t lowbit_idx = ctzw(genomatch_bits);
+        target_alias[write_hwidx] |= 1U << (lowbit_idx / 2);
+      }
+      genomatch_bits &= genomatch_bits - 1;
+    }
+    compact_idx_lowbits = 0;
+  }
+}
+#endif
+
+// Harley-Seal algorithm only works for bitarrays, not nyparrays, so don't
+// add an AVX2 specialization here.
+// ...unless something like the interleaved_vec strategy is used?  hmm.  should
+// test this on basic frequency counter.
+/*
+void Count2FreqVec3(const VecW* geno_vvec, uint32_t vec_ct, uint32_t* __restrict alt1_plus_bothset_ctp, uint32_t* __restrict bothset_ctp) {
+  assert(!(vec_ct % 3));
+  // Increments bothset_ct by the number of 0b11 in the current block, and
+  // alt1_ct by twice the number of 0b10 plus the number of 0b01.
+  const VecW m1 = VCONST_W(kMask5555);
+  const VecW m2 = VCONST_W(kMask3333);
+  const VecW m4 = VCONST_W(kMask0F0F);
+  const VecW* geno_vvec_iter = geno_vvec;
+  uint32_t alt1_plus_bothset_ct = 0;
+  uint32_t bothset_ct = 0;
+
+  while (1) {
+    UniVec acc_alt1_plus_bothset;
+    UniVec acc_bothset;
+    acc_alt1_plus_bothset.vw = vecw_setzero();
+    acc_bothset.vw = vecw_setzero();
+    const VecW* geno_vvec_stop;
+    if (vec_ct < 30) {
+      if (!vec_ct) {
+        *alt1_plus_bothset_ctp = alt1_plus_bothset_ct;
+        *bothset_ctp = bothset_ct;
+        return;
+      }
+      geno_vvec_stop = &(geno_vvec_iter[vec_ct]);
+      vec_ct = 0;
+    } else {
+      geno_vvec_stop = &(geno_vvec_iter[30]);
+      vec_ct -= 30;
+    }
+    do {
+      VecW cur_geno_vword1 = *geno_vvec_iter++;
+      // process first two vwords simultaneously to minimize linear dependence
+      VecW cur_geno_vword2 = *geno_vvec_iter++;
+      VecW cur_geno_vword_low_lshifted1 = vecw_slli(cur_geno_vword1 & m1, 1);
+      VecW cur_geno_vword_low_lshifted2 = vecw_slli(cur_geno_vword2 & m1, 1);
+
+      // 00 -> 00; 01 -> 01; 10 -> 10; 11 -> 01
+      // note that _mm_andnot_si128 flips the *first* argument before the AND
+      // operation.
+      VecW alt1_plus_bothset1 = vecw_and_notfirst(cur_geno_vword_low_lshifted1, cur_geno_vword1);
+      VecW alt1_plus_bothset2 = vecw_and_notfirst(cur_geno_vword_low_lshifted2, cur_geno_vword2);
+
+      VecW bothset1 = vecw_srli(cur_geno_vword_low_lshifted1 & cur_geno_vword1, 1);
+      VecW bothset2 = vecw_srli(cur_geno_vword_low_lshifted2 & cur_geno_vword2, 1);
+
+      cur_geno_vword1 = *geno_vvec_iter++;
+      alt1_plus_bothset1 = (alt1_plus_bothset1 & m2) + (vecw_srli(alt1_plus_bothset1, 2) & m2);
+      bothset2 = bothset1 + bothset2;
+      alt1_plus_bothset2 = (alt1_plus_bothset2 & m2) + (vecw_srli(alt1_plus_bothset2, 2) & m2);
+      cur_geno_vword_low_lshifted1 = vecw_slli(cur_geno_vword1 & m1, 1);
+
+      alt1_plus_bothset2 = alt1_plus_bothset1 + alt1_plus_bothset2;
+      // alt1_plus_bothset2 now contains 4-bit values from 0-8, while bothset2
+      // contains 2-bit values from 0-2
+      // (todo: check whether this is faster if we use double_bothsetx
+      // variables instead of bothset1/bothset2)
+      bothset1 = vecw_srli(cur_geno_vword_low_lshifted1 & cur_geno_vword1, 1);
+      alt1_plus_bothset1 = vecw_and_notfirst(cur_geno_vword_low_lshifted1, cur_geno_vword1);
+      bothset2 = bothset1 + bothset2;
+      alt1_plus_bothset1 = (alt1_plus_bothset1 & m2) + (vecw_srli(alt1_plus_bothset1, 2) & m2);
+
+      bothset2 = (bothset2 & m2) + (vecw_srli(bothset2, 2) & m2);
+      alt1_plus_bothset2 = alt1_plus_bothset1 + alt1_plus_bothset2;
+      // alt1_plus_bothset2 now contains 4-bit values from 0-12, while bothset2
+      // contains 4-bit values from 0-6.  aggregate both into 8-bit values.
+      bothset2 = (bothset2 & m4) + (vecw_srli(bothset2, 4) & m4);
+      alt1_plus_bothset2 = (alt1_plus_bothset2 & m4) + (vecw_srli(alt1_plus_bothset2, 4) & m4);
+
+      acc_bothset.vw = acc_bothset.vw + bothset2;
+      acc_alt1_plus_bothset.vw = acc_alt1_plus_bothset.vw + alt1_plus_bothset2;
+    } while (geno_vvec_iter < geno_vvec_stop);
+    const VecW m8 = VCONST_W(kMask00FF);
+    acc_bothset.vw = (acc_bothset.vw + vecw_srli(acc_bothset.vw, 8)) & m8;
+    acc_alt1_plus_bothset.vw = (acc_alt1_plus_bothset.vw & m8) + (vecw_srli(acc_alt1_plus_bothset.vw, 8) & m8);
+    bothset_ct += UniVecHsum16(acc_bothset);
+    alt1_plus_bothset_ct += UniVecHsum16(acc_alt1_plus_bothset);
+  }
+}
+*/
+
+// todo: benchmark against general-purpose counter
+void Count12Vec6(const VecW* geno_vvec, uint32_t vec_ct, uint32_t* __restrict raw_01_ctp, uint32_t* __restrict raw_both_ctp) {
+  assert(!(vec_ct % 6));
+  const VecW m1 = VCONST_W(kMask5555);
+  const VecW m2 = VCONST_W(kMask3333);
+  const VecW m4 = VCONST_W(kMask0F0F);
+  const VecW* geno_vvec_iter = geno_vvec;
+  VecW acc_01 = vecw_setzero();
+  VecW acc_both = vecw_setzero();
+  uintptr_t cur_incr = 60;
+  for (; ; vec_ct -= cur_incr) {
+    if (vec_ct < 60) {
+      if (!vec_ct) {
+        *raw_01_ctp = HsumW(acc_01);
+        *raw_both_ctp = HsumW(acc_both);
+        return;
+      }
+      cur_incr = vec_ct;
+    }
+    VecW inner_acc_01 = vecw_setzero();
+    VecW inner_acc_both = vecw_setzero();
+    const VecW* geno_vvec_stop = &(geno_vvec_iter[cur_incr]);
+    do {
+      VecW cur_vvec = *geno_vvec_iter++;
+      VecW vvec_rshift = vecw_srli(cur_vvec, 1);
+      VecW nyp_both = m1 & (cur_vvec ^ vvec_rshift);
+      VecW nyp_01 = nyp_both & cur_vvec;
+
+      cur_vvec = *geno_vvec_iter++;
+      vvec_rshift = vecw_srli(cur_vvec, 1);
+      VecW vvec_both = m1 & (cur_vvec ^ vvec_rshift);
+      nyp_01 = nyp_01 + (vvec_both & cur_vvec);
+      nyp_both = nyp_both + vvec_both;
+
+      cur_vvec = *geno_vvec_iter++;
+      vvec_rshift = vecw_srli(cur_vvec, 1);
+      vvec_both = m1 & (cur_vvec ^ vvec_rshift);
+      nyp_01 = nyp_01 + (vvec_both & cur_vvec);
+      nyp_both = nyp_both + vvec_both;
+
+      VecW nybble_01 = (nyp_01 & m2) + (vecw_srli(nyp_01, 2) & m2);
+      VecW nybble_both = (nyp_both & m2) + (vecw_srli(nyp_both, 2) & m2);
+
+      cur_vvec = *geno_vvec_iter++;
+      vvec_rshift = vecw_srli(cur_vvec, 1);
+      nyp_both = m1 & (cur_vvec ^ vvec_rshift);
+      nyp_01 = nyp_both & cur_vvec;
+
+      cur_vvec = *geno_vvec_iter++;
+      vvec_rshift = vecw_srli(cur_vvec, 1);
+      vvec_both = m1 & (cur_vvec ^ vvec_rshift);
+      nyp_01 = nyp_01 + (vvec_both & cur_vvec);
+      nyp_both = nyp_both + vvec_both;
+
+      cur_vvec = *geno_vvec_iter++;
+      vvec_rshift = vecw_srli(cur_vvec, 1);
+      vvec_both = m1 & (cur_vvec ^ vvec_rshift);
+      nyp_01 = nyp_01 + (vvec_both & cur_vvec);
+      nyp_both = nyp_both + vvec_both;
+
+      nybble_01 = nybble_01 + (nyp_01 & m2) + (vecw_srli(nyp_01, 2) & m2);
+      nybble_both = nybble_both + (nyp_both & m2) + (vecw_srli(nyp_both, 2) & m2);
+
+      inner_acc_01 = inner_acc_01 + (nybble_01 & m4) + (vecw_srli(nybble_01, 4) & m4);
+      inner_acc_both = inner_acc_both + (nybble_both & m4) + (vecw_srli(nybble_both, 4) & m4);
+    } while (geno_vvec_iter < geno_vvec_stop);
+    const VecW m0 = vecw_setzero();
+    acc_01 = acc_01 + vecw_bytesum(inner_acc_01, m0);
+    acc_both = acc_both + vecw_bytesum(inner_acc_both, m0);
+  }
+}
+
+void GenovecCount12Unsafe(const uintptr_t* genovec, uint32_t sample_ct, uint32_t* __restrict raw_01_ctp, uint32_t* __restrict raw_10_ctp) {
+  // assumes trailing bits of last genovec word are zeroed out.
+  // sample_ct == 0 ok.
+  const uint32_t sample_ctl2 = NypCtToWordCt(sample_ct);
+  uint32_t raw_01_ct;
+  uint32_t raw_both_ct;
+  uint32_t word_idx = sample_ctl2 - (sample_ctl2 % (6 * kWordsPerVec));
+  assert(IsVecAligned(genovec));
+  Count12Vec6(R_CAST(const VecW*, genovec), word_idx / kWordsPerVec, &raw_01_ct, &raw_both_ct);
+  for (; word_idx != sample_ctl2; ++word_idx) {
+    const uintptr_t cur_geno_word = genovec[word_idx];
+    const uintptr_t cur_rshift = cur_geno_word >> 1;
+    const uintptr_t cur_both = kMask5555 & (cur_geno_word ^ cur_rshift);
+    raw_01_ct += Popcount01Word(cur_both & cur_geno_word);
+    raw_both_ct += Popcount01Word(cur_both);
+  }
+  *raw_01_ctp = raw_01_ct;
+  *raw_10_ctp = raw_both_ct - raw_01_ct;
+}
+
+void Count3FreqVec6(const void* genoarr, uint32_t vec_ct, uint32_t* __restrict even_ctp, uint32_t* __restrict odd_ctp, uint32_t* __restrict bothset_ctp) {
+  assert(!(vec_ct % 6));
+  // Sets even_ct to the number of set low bits in the current block, odd_ct to
+  // the number of set high bits, and bothset_ct by the number of 0b11s.
+  const VecW m1 = VCONST_W(kMask5555);
+  const VecW m2 = VCONST_W(kMask3333);
+  const VecW m4 = VCONST_W(kMask0F0F);
+  const unsigned char* geno_vvec_biter = S_CAST(const unsigned char*, genoarr);
+  VecW acc_even = vecw_setzero();
+  VecW acc_odd = vecw_setzero();
+  VecW acc_bothset = vecw_setzero();
+  uintptr_t cur_incr = 60;
+  for (; ; vec_ct -= cur_incr) {
+    if (vec_ct < 60) {
+      if (!vec_ct) {
+        *even_ctp = HsumW(acc_even);
+        *odd_ctp = HsumW(acc_odd);
+        *bothset_ctp = HsumW(acc_bothset);
+        return;
+      }
+      cur_incr = vec_ct;
+    }
+    VecW inner_acc_even = vecw_setzero();
+    VecW inner_acc_odd = vecw_setzero();
+    VecW inner_acc_bothset = vecw_setzero();
+    const unsigned char* geno_vvec_stop = &(geno_vvec_biter[cur_incr * kBytesPerVec]);
+    do {
+      // hmm, this seems to have more linear dependence than I'd want, but the
+      // reorderings I tried just made the code harder to read without helping,
+      // so I'll leave this alone
+      VecW cur_geno_vword = vecw_loadu(geno_vvec_biter);
+      geno_vvec_biter += kBytesPerVec;
+      VecW odd1 = m1 & vecw_srli(cur_geno_vword, 1);
+      VecW even1 = m1 & cur_geno_vword;
+      VecW bothset1 = odd1 & cur_geno_vword;
+
+      cur_geno_vword = vecw_loadu(geno_vvec_biter);
+      geno_vvec_biter += kBytesPerVec;
+      VecW cur_geno_vword_high = m1 & vecw_srli(cur_geno_vword, 1);
+      even1 = even1 + (m1 & cur_geno_vword);
+      odd1 = odd1 + cur_geno_vword_high;
+      bothset1 = bothset1 + (cur_geno_vword_high & cur_geno_vword);
+
+      cur_geno_vword = vecw_loadu(geno_vvec_biter);
+      geno_vvec_biter += kBytesPerVec;
+      cur_geno_vword_high = m1 & vecw_srli(cur_geno_vword, 1);
+      even1 = even1 + (m1 & cur_geno_vword);
+      odd1 = odd1 + cur_geno_vword_high;
+      bothset1 = bothset1 + (cur_geno_vword_high & cur_geno_vword);
+
+      even1 = (even1 & m2) + (vecw_srli(even1, 2) & m2);
+      odd1 = (odd1 & m2) + (vecw_srli(odd1, 2) & m2);
+      bothset1 = (bothset1 & m2) + (vecw_srli(bothset1, 2) & m2);
+
+      cur_geno_vword = vecw_loadu(geno_vvec_biter);
+      geno_vvec_biter += kBytesPerVec;
+      VecW odd2 = m1 & vecw_srli(cur_geno_vword, 1);
+      VecW even2 = m1 & cur_geno_vword;
+      VecW bothset2 = odd2 & cur_geno_vword;
+
+      cur_geno_vword = vecw_loadu(geno_vvec_biter);
+      geno_vvec_biter += kBytesPerVec;
+      cur_geno_vword_high = m1 & vecw_srli(cur_geno_vword, 1);
+      even2 = even2 + (m1 & cur_geno_vword);
+      odd2 = odd2 + cur_geno_vword_high;
+      bothset2 = bothset2 + (cur_geno_vword_high & cur_geno_vword);
+
+      cur_geno_vword = vecw_loadu(geno_vvec_biter);
+      geno_vvec_biter += kBytesPerVec;
+      cur_geno_vword_high = m1 & vecw_srli(cur_geno_vword, 1);
+      even2 = even2 + (m1 & cur_geno_vword);
+      odd2 = odd2 + cur_geno_vword_high;
+      bothset2 = bothset2 + (cur_geno_vword_high & cur_geno_vword);
+
+      even1 = even1 + (even2 & m2) + (vecw_srli(even2, 2) & m2);
+      odd1 = odd1 + (odd2 & m2) + (vecw_srli(odd2, 2) & m2);
+      bothset1 = bothset1 + (bothset2 & m2) + (vecw_srli(bothset2, 2) & m2);
+      // these now contain 4-bit values from 0-12
+
+      inner_acc_even = inner_acc_even + (even1 & m4) + (vecw_srli(even1, 4) & m4);
+      inner_acc_odd = inner_acc_odd + (odd1 & m4) + (vecw_srli(odd1, 4) & m4);
+      inner_acc_bothset = inner_acc_bothset + (bothset1 & m4) + (vecw_srli(bothset1, 4) & m4);
+    } while (geno_vvec_biter < geno_vvec_stop);
+    const VecW m0 = vecw_setzero();
+    acc_even = acc_even + vecw_bytesum(inner_acc_even, m0);
+    acc_odd = acc_odd + vecw_bytesum(inner_acc_odd, m0);
+    acc_bothset = acc_bothset + vecw_bytesum(inner_acc_bothset, m0);
+  }
+}
+
+void FillInterleavedMaskVec(const uintptr_t* __restrict subset_mask, uint32_t base_vec_ct, uintptr_t* interleaved_mask_vec) {
+#ifdef USE_SSE2
+  // This is a cousin of github.com/KWillets/simd_interleave , which was
+  // written in response to
+  //   https://lemire.me/blog/2018/01/09/how-fast-can-you-bit-interleave-32-bit-integers-simd-edition/
+  // AVX2 implementation takes ~40% less time than before, and SSE4.2 takes
+  // ~65% less.  This also avoids the Ryzen-screwing _pdep_u64()/_pext_u64()
+  // operations.
+  const VecW m4 = VCONST_W(kMask0F0F);
+#  ifdef USE_SHUFFLE8
+  const VecW lookup0 = vecw_setr8(
+      0, 1, 4, 5, 16, 17, 20, 21,
+      64, 65, 68, 69, 80, 81, 84, 85);
+  const VecW lookup1 = vecw_slli(lookup0, 1);
+#  else
+  const VecW m1 = VCONST_W(kMask5555);
+  const VecW m2 = VCONST_W(kMask3333);
+#  endif
+  const VecW* subset_mask_valias = R_CAST(const VecW*, subset_mask);
+  VecW* interleaved_mask_valias = R_CAST(VecW*, interleaved_mask_vec);
+
+  for (uint32_t vidx = 0; vidx != base_vec_ct; ++vidx) {
+    // I'll assume the compiler can handle this register allocation job.
+    VecW vec_lo;
+    VecW vec_hi;
+    vecw_lo_and_hi_nybbles(subset_mask_valias[vidx], m4, &vec_lo, &vec_hi);
+#  ifdef USE_SHUFFLE8
+    vec_lo = vecw_shuffle8(lookup0, vec_lo);
+    vec_hi = vecw_shuffle8(lookup1, vec_hi);
+#  else
+    vec_lo = (vec_lo | vecw_slli(vec_lo, 2)) & m2;
+    vec_hi = (vec_hi | vecw_slli(vec_hi, 2)) & m2;
+    vec_lo = (vec_lo | vecw_slli(vec_lo, 1)) & m1;
+    vec_hi = (vec_hi | vecw_slli(vec_hi, 1)) & m1;
+    vec_hi = vecw_slli(vec_hi, 1);
+#  endif
+    interleaved_mask_valias[vidx] = vec_lo | vec_hi;
+  }
+#else  // !USE_SSE2
+  for (uint32_t widx = 0; widx != base_vec_ct; ++widx) {
+    const uintptr_t orig_word = subset_mask[widx];
+    uintptr_t ww_even = S_CAST(Halfword, orig_word);
+    uintptr_t ww_odd = orig_word >> kBitsPerWordD2;
+    ww_even = UnpackHalfwordToWord(ww_even);
+    ww_odd = UnpackHalfwordToWord(ww_odd);
+    interleaved_mask_vec[widx] = ww_even | (ww_odd << 1);
+  }
+#endif
+}
+
+/*
+void GenovecAlleleCtsUnsafe(const uintptr_t* genovec, uint32_t sample_ct, uint32_t* __restrict allele_cts, uint32_t* __restrict bothset_ctp) {
+  // assumes trailing bits of last genovec word are zeroed out.
+  // sets allele_cts[0] to the number of observed ref alleles, and
+  // allele_cts[1] to the number of observed alt1s.
+  const uint32_t sample_ctl2 = NypCtToWordCt(sample_ct);
+  uint32_t word_idx = sample_ctl2 - (sample_ctl2 % (3 * kWordsPerVec));
+  uint32_t alt1_plus_bothset_ct;
+  uint32_t bothset_ct;
+  assert(IsVecAligned(genovec));
+  Count2FreqVec3(R_CAST(const VecW*, genovec), word_idx / kWordsPerVec, &alt1_plus_bothset_ct, &bothset_ct);
+  for (; word_idx != sample_ctl2; ++word_idx) {
+    const uintptr_t cur_geno_word = genovec[word_idx];
+    const uintptr_t cur_geno_word_low_lshifted = (cur_geno_word & kMask5555) << 1;
+    alt1_plus_bothset_ct += NypsumWord((~cur_geno_word_low_lshifted) & cur_geno_word);
+    bothset_ct += NypsumWord(cur_geno_word_low_lshifted & cur_geno_word);
+  }
+  const uint32_t alt1_ct = alt1_plus_bothset_ct - bothset_ct;
+  allele_cts[0] = (sample_ct - bothset_ct) * 2 - alt1_ct;
+  allele_cts[1] = alt1_ct;
+  *bothset_ctp = bothset_ct;
+}
+*/
+
+void GenoarrCountFreqsUnsafe(const uintptr_t* genoarr, uint32_t sample_ct, STD_ARRAY_REF(uint32_t, 4) genocounts) {
+  // fills genocounts[0] with the number of 00s, genocounts[1] with the number
+  // of 01s, etc.
+  // assumes trailing bits of last genoarr word are zeroed out.
+  // sample_ct == 0 ok.
+  // no longer requires vector-alignment.
+  const uint32_t sample_ctl2 = NypCtToWordCt(sample_ct);
+  uint32_t even_ct;
+  uint32_t odd_ct;
+  uint32_t bothset_ct;
+  uint32_t word_idx = sample_ctl2 - (sample_ctl2 % (6 * kWordsPerVec));
+  Count3FreqVec6(genoarr, word_idx / kWordsPerVec, &even_ct, &odd_ct, &bothset_ct);
+  for (; word_idx != sample_ctl2; ++word_idx) {
+    const uintptr_t cur_geno_word = genoarr[word_idx];
+    const uintptr_t cur_geno_word_high = kMask5555 & (cur_geno_word >> 1);
+    even_ct += Popcount01Word(cur_geno_word & kMask5555);
+    odd_ct += Popcount01Word(cur_geno_word_high);
+    bothset_ct += Popcount01Word(cur_geno_word & cur_geno_word_high);
+  }
+  genocounts[0] = sample_ct + bothset_ct - even_ct - odd_ct;
+  genocounts[1] = even_ct - bothset_ct;
+  genocounts[2] = odd_ct - bothset_ct;
+  genocounts[3] = bothset_ct;
+}
+
+uintptr_t MostCommonGenoUnsafe(const uintptr_t* genoarr, uint32_t sample_ct) {
+  STD_ARRAY_DECL(uint32_t, 4, genocounts);
+  GenoarrCountFreqsUnsafe(genoarr, sample_ct, genocounts);
+  uint32_t most_common_geno_ct = genocounts[0];
+  if (most_common_geno_ct * 2 >= sample_ct) {
+    return 0;
+  }
+  uintptr_t most_common_geno = 0;
+  for (uintptr_t cur_geno = 1; cur_geno != 4; ++cur_geno) {
+    if (most_common_geno_ct < genocounts[cur_geno]) {
+      most_common_geno = cur_geno;
+      most_common_geno_ct = genocounts[cur_geno];
+    }
+  }
+  return most_common_geno;
+}
+
+// genoarr now allowed to be unaligned.
+void CountSubset3FreqVec6(const void* __restrict genoarr, const VecW* __restrict interleaved_mask_vvec, uint32_t vec_ct, uint32_t* __restrict even_ctp, uint32_t* __restrict odd_ctp, uint32_t* __restrict bothset_ctp) {
+  assert(!(vec_ct % 6));
+  // Sets even_ct to the number of set low bits in the current block after
+  // subsetting, odd_ct to the number of set high bits, and bothset_ct by the
+  // number of 0b11s.
+  const VecW m1 = VCONST_W(kMask5555);
+  const VecW m2 = VCONST_W(kMask3333);
+  const VecW m4 = VCONST_W(kMask0F0F);
+  const unsigned char* geno_vvec_biter = S_CAST(const unsigned char*, genoarr);
+  const VecW* interleaved_mask_vvec_iter = interleaved_mask_vvec;
+  VecW acc_even = vecw_setzero();
+  VecW acc_odd = vecw_setzero();
+  VecW acc_bothset = vecw_setzero();
+  uintptr_t cur_incr = 60;
+  for (; ; vec_ct -= cur_incr) {
+    if (vec_ct < 60) {
+      if (!vec_ct) {
+        *even_ctp = HsumW(acc_even);
+        *odd_ctp = HsumW(acc_odd);
+        *bothset_ctp = HsumW(acc_bothset);
+        return;
+      }
+      cur_incr = vec_ct;
+    }
+    VecW inner_acc_even = vecw_setzero();
+    VecW inner_acc_odd = vecw_setzero();
+    VecW inner_acc_bothset = vecw_setzero();
+    const unsigned char* geno_vvec_stop = &(geno_vvec_biter[cur_incr * kBytesPerVec]);
+    do {
+      VecW interleaved_mask_vword = *interleaved_mask_vvec_iter++;
+      VecW cur_geno_vword = vecw_loadu(geno_vvec_biter);
+      geno_vvec_biter += kBytesPerVec;
+      VecW cur_mask = interleaved_mask_vword & m1;
+      VecW odd1 = cur_mask & vecw_srli(cur_geno_vword, 1);
+      VecW even1 = cur_mask & cur_geno_vword;
+      VecW bothset1 = odd1 & cur_geno_vword;
+
+      cur_mask = vecw_srli(interleaved_mask_vword, 1) & m1;
+      cur_geno_vword = vecw_loadu(geno_vvec_biter);
+      geno_vvec_biter += kBytesPerVec;
+      VecW cur_geno_vword_high_masked = cur_mask & vecw_srli(cur_geno_vword, 1);
+      even1 = even1 + (cur_mask & cur_geno_vword);
+      odd1 = odd1 + cur_geno_vword_high_masked;
+      bothset1 = bothset1 + (cur_geno_vword_high_masked & cur_geno_vword);
+
+      interleaved_mask_vword = *interleaved_mask_vvec_iter++;
+      cur_mask = interleaved_mask_vword & m1;
+      cur_geno_vword = vecw_loadu(geno_vvec_biter);
+      geno_vvec_biter += kBytesPerVec;
+      cur_geno_vword_high_masked = cur_mask & vecw_srli(cur_geno_vword, 1);
+      even1 = even1 + (cur_mask & cur_geno_vword);
+      odd1 = odd1 + cur_geno_vword_high_masked;
+      bothset1 = bothset1 + (cur_geno_vword_high_masked & cur_geno_vword);
+
+      even1 = (even1 & m2) + (vecw_srli(even1, 2) & m2);
+      odd1 = (odd1 & m2) + (vecw_srli(odd1, 2) & m2);
+      bothset1 = (bothset1 & m2) + (vecw_srli(bothset1, 2) & m2);
+
+      cur_mask = vecw_srli(interleaved_mask_vword, 1) & m1;
+      cur_geno_vword = vecw_loadu(geno_vvec_biter);
+      geno_vvec_biter += kBytesPerVec;
+      VecW odd2 = cur_mask & vecw_srli(cur_geno_vword, 1);
+      VecW even2 = cur_mask & cur_geno_vword;
+      VecW bothset2 = odd2 & cur_geno_vword;
+
+      interleaved_mask_vword = *interleaved_mask_vvec_iter++;
+      cur_mask = interleaved_mask_vword & m1;
+      cur_geno_vword = vecw_loadu(geno_vvec_biter);
+      geno_vvec_biter += kBytesPerVec;
+      cur_geno_vword_high_masked = cur_mask & vecw_srli(cur_geno_vword, 1);
+      even2 = even2 + (cur_mask & cur_geno_vword);
+      odd2 = odd2 + cur_geno_vword_high_masked;
+      bothset2 = bothset2 + (cur_geno_vword_high_masked & cur_geno_vword);
+
+      cur_mask = vecw_srli(interleaved_mask_vword, 1) & m1;
+      cur_geno_vword = vecw_loadu(geno_vvec_biter);
+      geno_vvec_biter += kBytesPerVec;
+      cur_geno_vword_high_masked = cur_mask & vecw_srli(cur_geno_vword, 1);
+      even2 = even2 + (cur_mask & cur_geno_vword);
+      odd2 = odd2 + cur_geno_vword_high_masked;
+      bothset2 = bothset2 + (cur_geno_vword_high_masked & cur_geno_vword);
+
+      even1 = even1 + (even2 & m2) + (vecw_srli(even2, 2) & m2);
+      odd1 = odd1 + (odd2 & m2) + (vecw_srli(odd2, 2) & m2);
+      bothset1 = bothset1 + (bothset2 & m2) + (vecw_srli(bothset2, 2) & m2);
+      // these now contain 4-bit values from 0-12
+
+      inner_acc_even = inner_acc_even + (even1 & m4) + (vecw_srli(even1, 4) & m4);
+      inner_acc_odd = inner_acc_odd + (odd1 & m4) + (vecw_srli(odd1, 4) & m4);
+      inner_acc_bothset = inner_acc_bothset + (bothset1 & m4) + (vecw_srli(bothset1, 4) & m4);
+    } while (geno_vvec_biter < geno_vvec_stop);
+    const VecW m0 = vecw_setzero();
+    acc_even = acc_even + vecw_bytesum(inner_acc_even, m0);
+    acc_odd = acc_odd + vecw_bytesum(inner_acc_odd, m0);
+    acc_bothset = acc_bothset + vecw_bytesum(inner_acc_bothset, m0);
+  }
+}
+
+void GenoarrCountSubsetFreqs(const uintptr_t* __restrict genoarr, const uintptr_t* __restrict sample_include_interleaved_vec, uint32_t raw_sample_ct, uint32_t sample_ct, STD_ARRAY_REF(uint32_t, 4) genocounts) {
+  // fills genocounts[0] with the number of 00s, genocounts[1] with the number
+  // of 01s, etc.
+  // {raw_}sample_ct == 0 ok.
+  const uint32_t raw_sample_ctv2 = NypCtToVecCt(raw_sample_ct);
+  uint32_t even_ct;
+  uint32_t odd_ct;
+  uint32_t bothset_ct;
+#ifdef USE_SSE2
+  uint32_t vec_idx = raw_sample_ctv2 - (raw_sample_ctv2 % 6);
+  CountSubset3FreqVec6(genoarr, R_CAST(const VecW*, sample_include_interleaved_vec), vec_idx, &even_ct, &odd_ct, &bothset_ct);
+  const uintptr_t* genoarr_iter = &(genoarr[kWordsPerVec * vec_idx]);
+  const uintptr_t* interleaved_mask_iter = &(sample_include_interleaved_vec[(kWordsPerVec / 2) * vec_idx]);
+#  ifdef USE_AVX2
+  uintptr_t mask_base1 = 0;
+  uintptr_t mask_base2 = 0;
+  uintptr_t mask_base3 = 0;
+  uintptr_t mask_base4 = 0;
+  for (; vec_idx != raw_sample_ctv2; ++vec_idx) {
+    uintptr_t mask_word1;
+    uintptr_t mask_word2;
+    uintptr_t mask_word3;
+    uintptr_t mask_word4;
+    if (!(vec_idx % 2)) {
+      mask_base1 = *interleaved_mask_iter++;
+      mask_base2 = *interleaved_mask_iter++;
+      mask_base3 = *interleaved_mask_iter++;
+      mask_base4 = *interleaved_mask_iter++;
+      mask_word1 = mask_base1 & kMask5555;
+      mask_word2 = mask_base2 & kMask5555;
+      mask_word3 = mask_base3 & kMask5555;
+      mask_word4 = mask_base4 & kMask5555;
+    } else {
+      mask_word1 = (mask_base1 >> 1) & kMask5555;
+      mask_word2 = (mask_base2 >> 1) & kMask5555;
+      mask_word3 = (mask_base3 >> 1) & kMask5555;
+      mask_word4 = (mask_base4 >> 1) & kMask5555;
+    }
+    for (uint32_t vechalf_idx = 0; ; ++vechalf_idx) {
+      const uintptr_t cur_geno_word1 = *genoarr_iter++;
+      const uintptr_t cur_geno_word2 = *genoarr_iter++;
+      const uintptr_t cur_geno_word1_high_masked = mask_word1 & (cur_geno_word1 >> 1);
+      const uintptr_t cur_geno_word2_high_masked = mask_word2 & (cur_geno_word2 >> 1);
+      even_ct += PopcountWord(((cur_geno_word1 & mask_word1) << 1) | (cur_geno_word2 & mask_word2));
+      odd_ct += PopcountWord((cur_geno_word1_high_masked << 1) | cur_geno_word2_high_masked);
+      bothset_ct += PopcountWord(((cur_geno_word1 & cur_geno_word1_high_masked) << 1) | (cur_geno_word2 & cur_geno_word2_high_masked));
+      if (vechalf_idx) {
+        break;
+      }
+      mask_word1 = mask_word3;
+      mask_word2 = mask_word4;
+    }
+  }
+#  else  // not USE_AVX2
+  uintptr_t mask_base1 = 0;
+  uintptr_t mask_base2 = 0;
+  for (; vec_idx != raw_sample_ctv2; ++vec_idx) {
+    uintptr_t mask_word1;
+    uintptr_t mask_word2;
+    if (!(vec_idx % 2)) {
+      mask_base1 = *interleaved_mask_iter++;
+      mask_base2 = *interleaved_mask_iter++;
+      mask_word1 = mask_base1 & kMask5555;
+      mask_word2 = mask_base2 & kMask5555;
+    } else {
+      mask_word1 = (mask_base1 >> 1) & kMask5555;
+      mask_word2 = (mask_base2 >> 1) & kMask5555;
+    }
+    const uintptr_t cur_geno_word1 = *genoarr_iter++;
+    const uintptr_t cur_geno_word2 = *genoarr_iter++;
+    const uintptr_t cur_geno_word1_high_masked = mask_word1 & (cur_geno_word1 >> 1);
+    const uintptr_t cur_geno_word2_high_masked = mask_word2 & (cur_geno_word2 >> 1);
+#    ifdef USE_SSE42
+    even_ct += PopcountWord(((cur_geno_word1 & mask_word1) << 1) | (cur_geno_word2 & mask_word2));
+    odd_ct += PopcountWord((cur_geno_word1_high_masked << 1) | cur_geno_word2_high_masked);
+    bothset_ct += PopcountWord(((cur_geno_word1 & cur_geno_word1_high_masked) << 1) | (cur_geno_word2 & cur_geno_word2_high_masked));
+#    else
+    even_ct += NypsumWord((cur_geno_word1 & mask_word1) + (cur_geno_word2 & mask_word2));
+    odd_ct += NypsumWord(cur_geno_word1_high_masked + cur_geno_word2_high_masked);
+    bothset_ct += NypsumWord((cur_geno_word1 & cur_geno_word1_high_masked) + (cur_geno_word2 & cur_geno_word2_high_masked));
+#    endif
+  }
+#  endif  // not USE_AVX2
+#else  // not USE_SSE2
+  uint32_t word_idx = raw_sample_ctv2 - (raw_sample_ctv2 % 6);
+  CountSubset3FreqVec6(genoarr, R_CAST(const VecW*, sample_include_interleaved_vec), word_idx, &even_ct, &odd_ct, &bothset_ct);
+  const uintptr_t* interleaved_mask_iter = &(sample_include_interleaved_vec[word_idx / 2]);
+  uintptr_t mask_base = 0;
+  for (; word_idx != raw_sample_ctv2; ++word_idx) {
+    uintptr_t mask_word;
+    if (!(word_idx % 2)) {
+      mask_base = *interleaved_mask_iter++;
+      mask_word = mask_base & kMask5555;
+    } else {
+      mask_word = (mask_base >> 1) & kMask5555;
+    }
+    const uintptr_t cur_geno_word = genoarr[word_idx];
+    const uintptr_t cur_geno_word_high_masked = mask_word & (cur_geno_word >> 1);
+    even_ct += Popcount01Word(cur_geno_word & mask_word);
+    odd_ct += Popcount01Word(cur_geno_word_high_masked);
+    bothset_ct += Popcount01Word(cur_geno_word & cur_geno_word_high_masked);
+  }
+#endif
+  genocounts[0] = sample_ct + bothset_ct - even_ct - odd_ct;
+  genocounts[1] = even_ct - bothset_ct;
+  genocounts[2] = odd_ct - bothset_ct;
+  genocounts[3] = bothset_ct;
+}
+
+void GenoarrCountSubsetFreqs2(const uintptr_t* __restrict genoarr, const uintptr_t* __restrict sample_include, uint32_t raw_sample_ct, uint32_t sample_ct, STD_ARRAY_REF(uint32_t, 4) genocounts) {
+  // slower GenoarrCountSubsetFreqs() which does not require
+  // sample_include_interleaved_vec to be precomputed.
+  // {raw_}sample_ct == 0 ok.
+  const uint32_t raw_sample_ctl2 = NypCtToWordCt(raw_sample_ct);
+  const uint32_t fullword_ct = raw_sample_ctl2 / 2;
+  uint32_t even_ct = 0;
+  uint32_t odd_ct = 0;
+  uint32_t bothset_ct = 0;
+  for (uint32_t widx = 0; widx != fullword_ct; ++widx) {
+    // possible todo: try vectorizing this loop in SSE4.2+ high-sample-ct case
+    // with shuffle-based dynamic unpacking of sample_include?
+    const uintptr_t mask_word = sample_include[widx];
+    if (mask_word) {
+      uintptr_t geno_word = genoarr[2 * widx];
+      uintptr_t geno_even = PackWordToHalfwordMask5555(geno_word);
+      uintptr_t geno_odd = PackWordToHalfwordMaskAAAA(geno_word);
+      geno_word = genoarr[2 * widx + 1];
+      geno_even |= S_CAST(uintptr_t, PackWordToHalfwordMask5555(geno_word)) << kBitsPerWordD2;
+      geno_odd |= S_CAST(uintptr_t, PackWordToHalfwordMaskAAAA(geno_word)) << kBitsPerWordD2;
+      const uintptr_t geno_even_masked = geno_even & mask_word;
+      even_ct += PopcountWord(geno_even_masked);
+      odd_ct += PopcountWord(geno_odd & mask_word);
+      bothset_ct += PopcountWord(geno_odd & geno_even_masked);
+    }
+  }
+  if (raw_sample_ctl2 % 2) {
+    const uintptr_t mask_hw = sample_include[fullword_ct];
+    if (mask_hw) {
+      const uintptr_t geno_word = genoarr[2 * fullword_ct];
+      // todo: benchmark main loop unpack vs. pack
+      const uintptr_t mask_word = UnpackHalfwordToWord(mask_hw);
+      const uintptr_t geno_word_shifted = geno_word >> 1;
+      const uintptr_t geno_word_masked = geno_word & mask_word;
+      even_ct += Popcount01Word(geno_word_masked);
+      odd_ct += Popcount01Word(geno_word_shifted & mask_word);
+      bothset_ct += Popcount01Word(geno_word_masked & geno_word_shifted);
+    }
+  }
+  genocounts[0] = sample_ct + bothset_ct - even_ct - odd_ct;
+  genocounts[1] = even_ct - bothset_ct;
+  genocounts[2] = odd_ct - bothset_ct;
+  genocounts[3] = bothset_ct;
+}
+
+void GenoarrCountInvsubsetFreqs2(const uintptr_t* __restrict genoarr, const uintptr_t* __restrict sample_exclude, uint32_t raw_sample_ct, uint32_t sample_ct, STD_ARRAY_REF(uint32_t, 4) genocounts) {
+  // {raw_}sample_ct == 0 ok.
+  // ugh, 'fullword' is overloaded.  probable todo: keep halfword/fullword,
+  // switch more common use case to bodyword/trailword.
+  const uint32_t bodyword_ct = raw_sample_ct / kBitsPerWord;
+  uint32_t even_ct = 0;
+  uint32_t odd_ct = 0;
+  uint32_t bothset_ct = 0;
+  for (uint32_t widx = 0; widx != bodyword_ct; ++widx) {
+    // possible todo: try vectorizing this loop in SSE4.2+ high-sample-ct case
+    // with shuffle-based dynamic unpacking of sample_exclude?
+    const uintptr_t mask_word = ~sample_exclude[widx];
+    if (mask_word) {
+      uintptr_t geno_word = genoarr[2 * widx];
+      uintptr_t geno_even = PackWordToHalfwordMask5555(geno_word);
+      uintptr_t geno_odd = PackWordToHalfwordMaskAAAA(geno_word);
+      geno_word = genoarr[2 * widx + 1];
+      geno_even |= S_CAST(uintptr_t, PackWordToHalfwordMask5555(geno_word)) << kBitsPerWordD2;
+      geno_odd |= S_CAST(uintptr_t, PackWordToHalfwordMaskAAAA(geno_word)) << kBitsPerWordD2;
+      const uintptr_t geno_even_masked = geno_even & mask_word;
+      even_ct += PopcountWord(geno_even_masked);
+      odd_ct += PopcountWord(geno_odd & mask_word);
+      bothset_ct += PopcountWord(geno_odd & geno_even_masked);
+    }
+  }
+  const uint32_t remainder = raw_sample_ct % kBitsPerWord;
+  if (remainder) {
+    const uintptr_t mask_word = bzhi(~sample_exclude[bodyword_ct], remainder);
+    if (mask_word) {
+      uintptr_t geno_word = genoarr[2 * bodyword_ct];
+      uintptr_t geno_even = PackWordToHalfwordMask5555(geno_word);
+      uintptr_t geno_odd = PackWordToHalfwordMaskAAAA(geno_word);
+      if (remainder > kBitsPerWordD2) {
+        geno_word = genoarr[2 * bodyword_ct + 1];
+        geno_even |= S_CAST(uintptr_t, PackWordToHalfwordMask5555(geno_word)) << kBitsPerWordD2;
+        geno_odd |= S_CAST(uintptr_t, PackWordToHalfwordMaskAAAA(geno_word)) << kBitsPerWordD2;
+      }
+      const uintptr_t geno_even_masked = geno_even & mask_word;
+      even_ct += PopcountWord(geno_even_masked);
+      odd_ct += PopcountWord(geno_odd & mask_word);
+      bothset_ct += PopcountWord(geno_odd & geno_even_masked);
+    }
+  }
+  genocounts[0] = sample_ct + bothset_ct - even_ct - odd_ct;
+  genocounts[1] = even_ct - bothset_ct;
+  genocounts[2] = odd_ct - bothset_ct;
+  genocounts[3] = bothset_ct;
+}
+
+void GenoarrCountSubsetIntersectFreqs(const uintptr_t* __restrict genoarr, const uintptr_t* __restrict subset1, const uintptr_t* __restrict subset2, uint32_t raw_sample_ct, STD_ARRAY_REF(uint32_t, 4) genocounts) {
+  // {raw_}sample_ct == 0 ok.
+  const uint32_t raw_sample_ctl2 = NypCtToWordCt(raw_sample_ct);
+  const uint32_t fullword_ct = raw_sample_ctl2 / 2;
+  uint32_t subset_intersect_ct = 0;
+  uint32_t even_ct = 0;
+  uint32_t odd_ct = 0;
+  uint32_t bothset_ct = 0;
+  for (uint32_t widx = 0; widx != fullword_ct; ++widx) {
+    // hmm, there may be little point to vectorizing this
+    const uintptr_t mask_word = subset1[widx] & subset2[widx];
+    if (mask_word) {
+      uintptr_t geno_word = genoarr[2 * widx];
+      uintptr_t geno_even = PackWordToHalfwordMask5555(geno_word);
+      uintptr_t geno_odd = PackWordToHalfwordMaskAAAA(geno_word);
+      geno_word = genoarr[2 * widx + 1];
+      geno_even |= S_CAST(uintptr_t, PackWordToHalfwordMask5555(geno_word)) << kBitsPerWordD2;
+      geno_odd |= S_CAST(uintptr_t, PackWordToHalfwordMaskAAAA(geno_word)) << kBitsPerWordD2;
+      const uintptr_t geno_even_masked = geno_even & mask_word;
+      subset_intersect_ct += PopcountWord(mask_word);
+      even_ct += PopcountWord(geno_even_masked);
+      odd_ct += PopcountWord(geno_odd & mask_word);
+      bothset_ct += PopcountWord(geno_odd & geno_even_masked);
+    }
+  }
+  if (raw_sample_ctl2 % 2) {
+    const uintptr_t mask_hw = subset1[fullword_ct] & subset2[fullword_ct];
+    if (mask_hw) {
+      const uintptr_t geno_word = genoarr[fullword_ct * 2];
+      const uintptr_t mask_word = UnpackHalfwordToWord(mask_hw);
+      const uintptr_t geno_word_shifted = geno_word >> 1;
+      const uintptr_t geno_word_masked = geno_word & mask_word;
+      subset_intersect_ct += Popcount01Word(mask_word);
+      even_ct += Popcount01Word(geno_word_masked);
+      odd_ct += Popcount01Word(geno_word_shifted & mask_word);
+      bothset_ct += Popcount01Word(geno_word_masked & geno_word_shifted);
+    }
+  }
+  genocounts[0] = subset_intersect_ct + bothset_ct - even_ct - odd_ct;
+  genocounts[1] = even_ct - bothset_ct;
+  genocounts[2] = odd_ct - bothset_ct;
+  genocounts[3] = bothset_ct;
+}
+
+void GenovecInvertUnsafe(uint32_t sample_ct, uintptr_t* genovec) {
+  // flips 0 to 2 and vice versa.
+  // "unsafe" because trailing bits are not zeroed out.
+  const uint32_t vec_ct = NypCtToVecCt(sample_ct);
+  assert(IsVecAligned(genovec));
+  const VecW not_m1 = VCONST_W(kMaskAAAA);
+  VecW* vptr = R_CAST(VecW*, genovec);
+  for (uint32_t vidx = 0; vidx != vec_ct; ++vidx) {
+    VecW cur_vec = vptr[vidx];
+    // flip high bit iff low bit is unset
+    vptr[vidx] = cur_vec ^ vecw_and_notfirst(vecw_slli(cur_vec, 1), not_m1);
+  }
+}
+
+void DifflistCountSubsetFreqs(const uintptr_t* __restrict sample_include, const uintptr_t* __restrict raregeno, const uint32_t* __restrict difflist_sample_ids, uint32_t common_geno, uint32_t difflist_len, uint32_t sample_ct, STD_ARRAY_REF(uint32_t, 4) genocounts) {
+  STD_ARRAY_REF_FILL0(4, genocounts);
+  for (uint32_t difflist_idx = 0; difflist_idx != difflist_len; ++difflist_idx) {
+    const uint32_t raw_sample_idx = difflist_sample_ids[difflist_idx];
+    if (IsSet(sample_include, raw_sample_idx)) {
+      genocounts[GetNyparrEntry(raregeno, difflist_idx)] += 1;
+    }
+  }
+  genocounts[common_geno] = sample_ct - genocounts[0] - genocounts[1] - genocounts[2] - genocounts[3];
+}
+
+
+#ifdef USE_SSE2
+static_assert(kPglNypTransposeBatch == S_CAST(uint32_t, kNypsPerCacheline), "TransposeNypblock64() needs to be updated.");
+#  ifdef CACHELINE64
+void TransposeNypblock64(const uintptr_t* read_iter, uint32_t read_ul_stride, uint32_t write_ul_stride, uint32_t read_batch_size, uint32_t write_batch_size, uintptr_t* __restrict write_iter, unsigned char* __restrict buf0, unsigned char* __restrict buf1) {
+  // buf0 and buf1 must each be vector-aligned and have size 16k
+  // Tried using previous AVX2 small-buffer approach, but that was a bit
+  // worse... though maybe it should be revisited?
+
+  // Each input row has 256 nyps, across 8 words.
+  // First word of each row goes into first buf0 row, etc.
+  const uint32_t buf0_row_ct = DivUp(write_batch_size, 32);
+  {
+    // Fold the first 3 shuffles into the ingestion loop.
+    // Can fold 2 additional shuffles here by ingesting uint16s instead.  That
+    // removes the need for the second loop, halving the workspace requirement.
+    // Benchmark results of that approach are slightly but consistently worse,
+    // though.
+    const uintptr_t* initial_read_iter = read_iter;
+    const uintptr_t* initial_read_end = &(initial_read_iter[buf0_row_ct]);
+    uintptr_t* initial_target_iter = R_CAST(uintptr_t*, buf0);
+    const uint32_t read_batch_rem = kNypsPerCacheline - read_batch_size;
+    // Tried fancier vector-based ingestion, didn't help.
+    for (; initial_read_iter != initial_read_end; ++initial_read_iter) {
+      const uintptr_t* read_iter_tmp = initial_read_iter;
+      for (uint32_t ujj = 0; ujj != read_batch_size; ++ujj) {
+        *initial_target_iter++ = *read_iter_tmp;
+        read_iter_tmp = &(read_iter_tmp[read_ul_stride]);
+      }
+      ZeroWArr(read_batch_rem, initial_target_iter);
+      initial_target_iter = &(initial_target_iter[read_batch_rem]);
+    }
+  }
+
+  // shuffle from 64 -> 16
+  const uint32_t buf1_row_ct = DivUp(write_batch_size, 8);
+  {
+    // full buf0 row is 256 * 8 bytes
+    // full buf1 row is 512 bytes
+    const VecW* buf0_read_iter = R_CAST(const VecW*, buf0);
+    __m128i* write_iter0 = R_CAST(__m128i*, buf1);
+    const uint32_t buf0_row_clwidth = DivUp(read_batch_size, 8);
+#    ifdef USE_SHUFFLE8
+    const VecW gather_u32s = vecw_setr8(0, 1, 8, 9, 2, 3, 10, 11,
+                                        4, 5, 12, 13, 6, 7, 14, 15);
+#    else
+    const VecW m16 = VCONST_W(kMask0000FFFF);
+#    endif
+    for (uint32_t bidx = 0; bidx != buf0_row_ct; ++bidx) {
+      __m128i* write_iter1 = &(write_iter0[32]);
+      __m128i* write_iter2 = &(write_iter1[32]);
+      __m128i* write_iter3 = &(write_iter2[32]);
+      for (uint32_t clidx = 0; clidx != buf0_row_clwidth; ++clidx) {
+#    ifdef USE_AVX2
+        VecW loader0 = buf0_read_iter[clidx * 2];
+        VecW loader1 = buf0_read_iter[clidx * 2 + 1];
+        loader0 = vecw_shuffle8(loader0, gather_u32s);
+        loader1 = vecw_shuffle8(loader1, gather_u32s);
+        //    (0,0) (0,1) (1,0) ... (7,1) (0,2) ... (7,3) (8,0) ... (31,3)
+        //      (0,4) ... (31,7)
+        // -> (0,0) ... (7,1) (0,2) ... (7,3) (8,0) ... (15,3) (0,4) ... (15,7)
+        //      (16,0) ... (31,3) (16,4) ...
+        loader0 = vecw_permute0xd8_if_avx2(loader0);
+        loader1 = vecw_permute0xd8_if_avx2(loader1);
+        // -> (0,0) ... (7,1) (0,2) ... (7,3) (0,4) ... (7,7) (8,0) ... (15,7)
+        //      (16,0) ... (23,7) (24,0) ... (31,7)
+        const __m256i vec_lo = _mm256_shuffle_epi32(WToVec(loader0), 0xd8);
+        const __m256i vec_hi = _mm256_shuffle_epi32(WToVec(loader1), 0xd8);
+        const __m256i final0145 = _mm256_unpacklo_epi64(vec_lo, vec_hi);
+        const __m256i final2367 = _mm256_unpackhi_epi64(vec_lo, vec_hi);
+        // GCC doesn't support _mm256_storeu_si128i as of this writing.
+        write_iter0[clidx] = _mm256_castsi256_si128(final0145);
+        write_iter1[clidx] = _mm256_castsi256_si128(final2367);
+        write_iter2[clidx] = _mm256_extracti128_si256(final0145, 1);
+        write_iter3[clidx] = _mm256_extracti128_si256(final2367, 1);
+#    else
+        VecW loader0 = buf0_read_iter[clidx * 4];
+        VecW loader1 = buf0_read_iter[clidx * 4 + 1];
+        VecW loader2 = buf0_read_iter[clidx * 4 + 2];
+        VecW loader3 = buf0_read_iter[clidx * 4 + 3];
+#      ifdef USE_SHUFFLE8
+        loader0 = vecw_shuffle8(loader0, gather_u32s);
+        loader1 = vecw_shuffle8(loader1, gather_u32s);
+        loader2 = vecw_shuffle8(loader2, gather_u32s);
+        loader3 = vecw_shuffle8(loader3, gather_u32s);
+#      else
+        VecW tmp_lo = vecw_unpacklo16(loader0, loader1);
+        VecW tmp_hi = vecw_unpackhi16(loader0, loader1);
+        loader0 = vecw_blendv(vecw_slli(tmp_hi, 16), tmp_lo, m16);
+        loader1 = vecw_blendv(tmp_hi, vecw_srli(tmp_lo, 16), m16);
+        tmp_lo = vecw_unpacklo16(loader2, loader3);
+        tmp_hi = vecw_unpackhi16(loader2, loader3);
+        loader2 = vecw_blendv(vecw_slli(tmp_hi, 16), tmp_lo, m16);
+        loader3 = vecw_blendv(tmp_hi, vecw_srli(tmp_lo, 16), m16);
+#      endif
+        //    (0,0) (0,1) (1,0) ... (7,1) (0,2) ... (7,3) (8,0) ... (31,3)
+        //  + (0,4) ... (31,7)
+        // -> (0,0) ... (7,3) (0,4) ... (7,7) (8,0) ... (15,7)
+        const VecW lo_0_15 = vecw_unpacklo32(loader0, loader1);
+        const VecW lo_16_31 = vecw_unpackhi32(loader0, loader1);
+        const VecW hi_0_15 = vecw_unpacklo32(loader2, loader3);
+        const VecW hi_16_31 = vecw_unpackhi32(loader2, loader3);
+        write_iter0[clidx] = WToVec(vecw_unpacklo64(lo_0_15, hi_0_15));
+        write_iter1[clidx] = WToVec(vecw_unpackhi64(lo_0_15, hi_0_15));
+        write_iter2[clidx] = WToVec(vecw_unpacklo64(lo_16_31, hi_16_31));
+        write_iter3[clidx] = WToVec(vecw_unpackhi64(lo_16_31, hi_16_31));
+#    endif
+      }
+      buf0_read_iter = &(buf0_read_iter[2048 / kBytesPerVec]);
+      write_iter0 = &(write_iter3[32]);
+    }
+  }
+
+  // movemask from 16 -> 2
+  const VecW* source_iter = R_CAST(VecW*, buf1);
+  const VecW m8 = VCONST_W(kMask00FF);
+
+  // Take advantage of current function contract.
+  const uint32_t buf1_fullrow_ct = (write_batch_size + 3) / 8;
+
+  const uint32_t write_v8ui_stride = kVec8thUintPerWord * write_ul_stride;
+  const uint32_t vec_ct = DivUp(read_batch_size, (kBytesPerVec / 2));
+  Vec8thUint* target_iter0 = DowncastWToV8(write_iter);
+  for (uint32_t uii = 0; uii != buf1_fullrow_ct; ++uii) {
+    Vec8thUint* target_iter1 = &(target_iter0[write_v8ui_stride]);
+    Vec8thUint* target_iter2 = &(target_iter1[write_v8ui_stride]);
+    Vec8thUint* target_iter3 = &(target_iter2[write_v8ui_stride]);
+    Vec8thUint* target_iter4 = &(target_iter3[write_v8ui_stride]);
+    Vec8thUint* target_iter5 = &(target_iter4[write_v8ui_stride]);
+    Vec8thUint* target_iter6 = &(target_iter5[write_v8ui_stride]);
+    Vec8thUint* target_iter7 = &(target_iter6[write_v8ui_stride]);
+    for (uint32_t vidx = 0; vidx != vec_ct; ++vidx) {
+      const VecW loader = source_iter[vidx];
+      // Using goal bit-coordinates, where '_' indicates irrelevant content, we
+      // set target_0123 to
+      //   _ (0, 0) _ (1, 0) _ (2, 0) _ (3, 0) _ (0, 1) _ (1, 1) _ (2, 1) ...
+      // and target_4567 to
+      //   _ (4, 0) _ (5, 0) _ (6, 0) _ (7, 0) _ (4, 1) _ (5, 1) _ (6, 1) ...
+      // This is perfectly arranged for movemask.
+      VecW target_4567 = vecw_blendv(loader, vecw_srli(loader, 7), m8);
+      target_iter7[vidx] = vecw_movemask(target_4567);
+      target_4567 = vecw_slli(target_4567, 2);
+      target_iter6[vidx] = vecw_movemask(target_4567);
+      target_4567 = vecw_slli(target_4567, 2);
+      target_iter5[vidx] = vecw_movemask(target_4567);
+      target_4567 = vecw_slli(target_4567, 2);
+      target_iter4[vidx] = vecw_movemask(target_4567);
+      VecW target_0123 = vecw_blendv(vecw_slli(loader, 8), vecw_slli(loader, 1), m8);
+      target_iter3[vidx] = vecw_movemask(target_0123);
+      target_0123 = vecw_slli(target_0123, 2);
+      target_iter2[vidx] = vecw_movemask(target_0123);
+      target_0123 = vecw_slli(target_0123, 2);
+      target_iter1[vidx] = vecw_movemask(target_0123);
+      target_0123 = vecw_slli(target_0123, 2);
+      target_iter0[vidx] = vecw_movemask(target_0123);
+    }
+    source_iter = &(source_iter[(2 * kPglNypTransposeBatch) / kBytesPerVec]);
+    target_iter0 = &(target_iter7[write_v8ui_stride]);
+  }
+  if (buf1_fullrow_ct == buf1_row_ct) {
+    return;
+  }
+  Vec8thUint* target_iter1 = &(target_iter0[write_v8ui_stride]);
+  Vec8thUint* target_iter2 = &(target_iter1[write_v8ui_stride]);
+  Vec8thUint* target_iter3 = &(target_iter2[write_v8ui_stride]);
+  for (uint32_t vidx = 0; vidx != vec_ct; ++vidx) {
+    const VecW loader = source_iter[vidx];
+    VecW target_0123 = vecw_blendv(vecw_slli(loader, 8), vecw_slli(loader, 1), m8);
+    target_iter3[vidx] = vecw_movemask(target_0123);
+    target_0123 = vecw_slli(target_0123, 2);
+    target_iter2[vidx] = vecw_movemask(target_0123);
+    target_0123 = vecw_slli(target_0123, 2);
+    target_iter1[vidx] = vecw_movemask(target_0123);
+    target_0123 = vecw_slli(target_0123, 2);
+    target_iter0[vidx] = vecw_movemask(target_0123);
+  }
+}
+#  else
+#    ifndef CACHELINE128
+#      error "CACHELINE64 or CACHELINE128 expected."
+#    endif
+// assumes USE_SHUFFLE8, !USE_AVX2
+void TransposeNypblock64(const uintptr_t* read_iter, uint32_t read_ul_stride, uint32_t write_ul_stride, uint32_t read_batch_size, uint32_t write_batch_size, uintptr_t* __restrict write_iter, unsigned char* __restrict buf0, unsigned char* __restrict buf1) {
+  // buf0 and buf1 must each be vector-aligned and have size 64k
+  // Each input row has 512 nyps, across 16 words.
+  // First word of each row goes into first buf0 row, etc.
+  const uint32_t buf0_row_ct = DivUp(write_batch_size, 32);
+  {
+    // Fold the first 4 shuffles into the ingestion loop.
+    const uintptr_t* initial_read_iter = read_iter;
+    const uintptr_t* initial_read_end = &(initial_read_iter[buf0_row_ct]);
+    uintptr_t* initial_target_iter = R_CAST(uintptr_t*, buf0);
+    const uint32_t read_batch_rem = kNypsPerCacheline - read_batch_size;
+    for (; initial_read_iter != initial_read_end; ++initial_read_iter) {
+      const uintptr_t* read_iter_tmp = initial_read_iter;
+      for (uint32_t ujj = 0; ujj != read_batch_size; ++ujj) {
+        *initial_target_iter++ = *read_iter_tmp;
+        read_iter_tmp = &(read_iter_tmp[read_ul_stride]);
+      }
+      ZeroWArr(read_batch_rem, initial_target_iter);
+      initial_target_iter = &(initial_target_iter[read_batch_rem]);
+    }
+  }
+
+  // First buf0 row now corresponds to a 512x32 nyp matrix (512 * 8 bytes) that
+  // we wish to transpose.  We split this into eight 512x4 matrices.
+  // (ARMv8 doesn't have efficient movemask, so this should be better than four
+  // 512x8 matrices.)
+  // This is nearly identical to the middle step in TransposeBitblock64().
+  {
+    const VecW* buf0_read_iter = R_CAST(const VecW*, buf0);
+    uintptr_t* write_iter0 = R_CAST(uintptr_t*, buf1);
+    const VecW gather_u16s = vecw_setr8(0, 8, 1, 9, 2, 10, 3, 11,
+                                        4, 12, 5, 13, 6, 14, 7, 15);
+    const uint32_t buf0_row_b64width = DivUp(read_batch_size, 8);
+    for (uint32_t ridx = 0; ridx != buf0_row_ct; ++ridx) {
+      uintptr_t* write_iter1 = &(write_iter0[64]);
+      uintptr_t* write_iter2 = &(write_iter1[64]);
+      uintptr_t* write_iter3 = &(write_iter2[64]);
+      uintptr_t* write_iter4 = &(write_iter3[64]);
+      uintptr_t* write_iter5 = &(write_iter4[64]);
+      uintptr_t* write_iter6 = &(write_iter5[64]);
+      uintptr_t* write_iter7 = &(write_iter6[64]);
+      for (uint32_t b64idx = 0; b64idx != buf0_row_b64width; ++b64idx) {
+        VecW loader0 = buf0_read_iter[b64idx * 4];
+        VecW loader1 = buf0_read_iter[b64idx * 4 + 1];
+        VecW loader2 = buf0_read_iter[b64idx * 4 + 2];
+        VecW loader3 = buf0_read_iter[b64idx * 4 + 3];
+        loader0 = vecw_shuffle8(loader0, gather_u16s);
+        loader1 = vecw_shuffle8(loader1, gather_u16s);
+        loader2 = vecw_shuffle8(loader2, gather_u16s);
+        loader3 = vecw_shuffle8(loader3, gather_u16s);
+        const VecW lo_0123 = vecw_unpacklo16(loader0, loader1);
+        const VecW lo_4567 = vecw_unpackhi16(loader0, loader1);
+        const VecW hi_0123 = vecw_unpacklo16(loader2, loader3);
+        const VecW hi_4567 = vecw_unpackhi16(loader2, loader3);
+
+        const VecW final01 = vecw_unpacklo32(lo_0123, hi_0123);
+        const VecW final23 = vecw_unpackhi32(lo_0123, hi_0123);
+        const VecW final45 = vecw_unpacklo32(lo_4567, hi_4567);
+        const VecW final67 = vecw_unpackhi32(lo_4567, hi_4567);
+        write_iter0[b64idx] = vecw_extract64_0(final01);
+        write_iter1[b64idx] = vecw_extract64_1(final01);
+        write_iter2[b64idx] = vecw_extract64_0(final23);
+        write_iter3[b64idx] = vecw_extract64_1(final23);
+        write_iter4[b64idx] = vecw_extract64_0(final45);
+        write_iter5[b64idx] = vecw_extract64_1(final45);
+        write_iter6[b64idx] = vecw_extract64_0(final67);
+        write_iter7[b64idx] = vecw_extract64_1(final67);
+      }
+      buf0_read_iter = &(buf0_read_iter[256]);
+      write_iter0 = &(write_iter7[64]);
+    }
+  }
+
+  // 8 -> 2
+  // This is similar to the main TransposeNybbleblock() loop.
+  const VecW* source_iter = R_CAST(VecW*, buf1);
+  const VecW m2 = VCONST_W(kMask3333);
+  const VecW m4 = VCONST_W(kMask0F0F);
+  const VecW m8 = VCONST_W(kMask00FF);
+  const VecW gather_even = vecw_setr8(0, 2, 4, 6, 8, 10, 12, 14,
+                                      -1, -1, -1, -1, -1, -1, -1, -1);
+  // Take advantage of current function contract.
+  const uint32_t buf1_row_ct = (write_batch_size + 3) / 4;
+
+  const uint32_t fourword_ct = DivUp(read_batch_size, 32);
+  uintptr_t* target_iter0 = write_iter;
+  for (uint32_t ridx = 0; ridx != buf1_row_ct; ++ridx) {
+    uintptr_t* target_iter1 = &(target_iter0[write_ul_stride]);
+    uintptr_t* target_iter2 = &(target_iter1[write_ul_stride]);
+    uintptr_t* target_iter3 = &(target_iter2[write_ul_stride]);
+    for (uint32_t dvidx = 0; dvidx != fourword_ct; ++dvidx) {
+      const VecW loader0 = source_iter[dvidx * 2];
+      const VecW loader1 = source_iter[dvidx * 2 + 1];
+
+      VecW even_nyps0 = loader0 & m2;
+      VecW even_nyps1 = loader1 & m2;
+      VecW odd_nyps0 = vecw_srli(loader0, 2) & m2;
+      VecW odd_nyps1 = vecw_srli(loader1, 2) & m2;
+      even_nyps0 = even_nyps0 | vecw_srli(even_nyps0, 6);
+      even_nyps1 = even_nyps1 | vecw_srli(even_nyps1, 6);
+      odd_nyps0 = odd_nyps0 | vecw_srli(odd_nyps0, 6);
+      odd_nyps1 = odd_nyps1 | vecw_srli(odd_nyps1, 6);
+      // Low four bits of even_nyps{0,1}[0], [2], ..., [14] are destined for
+      // target_iter0; high four bits of those bytes are destined for
+      // target_iter2.
+      const VecW even_nyps = vecw_gather_even(even_nyps0, even_nyps1, m8);
+      const VecW odd_nyps = vecw_gather_even(odd_nyps0, odd_nyps1, m8);
+
+      VecW mod0_nyps = even_nyps & m4;
+      VecW mod1_nyps = odd_nyps & m4;
+      VecW mod2_nyps = vecw_srli(even_nyps, 4) & m4;
+      VecW mod3_nyps = vecw_srli(odd_nyps, 4) & m4;
+      mod0_nyps = mod0_nyps | vecw_srli(mod0_nyps, 4);
+      mod1_nyps = mod1_nyps | vecw_srli(mod1_nyps, 4);
+      mod2_nyps = mod2_nyps | vecw_srli(mod2_nyps, 4);
+      mod3_nyps = mod3_nyps | vecw_srli(mod3_nyps, 4);
+      mod0_nyps = vecw_shuffle8(mod0_nyps, gather_even);
+      mod1_nyps = vecw_shuffle8(mod1_nyps, gather_even);
+      mod2_nyps = vecw_shuffle8(mod2_nyps, gather_even);
+      mod3_nyps = vecw_shuffle8(mod3_nyps, gather_even);
+      target_iter0[dvidx] = vecw_extract64_0(mod0_nyps);
+      target_iter1[dvidx] = vecw_extract64_0(mod1_nyps);
+      target_iter2[dvidx] = vecw_extract64_0(mod2_nyps);
+      target_iter3[dvidx] = vecw_extract64_0(mod3_nyps);
+    }
+    source_iter = &(source_iter[32]);
+    target_iter0 = &(target_iter3[write_ul_stride]);
+  }
+}
+#  endif
+#else  // !USE_SSE2
+#  ifdef __LP64__
+static_assert(kWordsPerVec == 1, "TransposeNypblock64() needs to be updated.");
+void TransposeNypblock64(const uintptr_t* read_iter, uint32_t read_ul_stride, uint32_t write_ul_stride, uint32_t read_batch_size, uint32_t write_batch_size, uintptr_t* __restrict write_iter, unsigned char* __restrict buf0, unsigned char* __restrict buf1) {
+  // buf0 and buf1 must each be vector-aligned and have size 16k
+  // defining them as unsigned char* might prevent a strict-aliasing issue?
+  // (might need to go through greater contortions to actually be safe?)
+  const uint32_t buf_row_ct = NypCtToByteCt(write_batch_size);
+  // fold the first 6 shuffles into the initial ingestion loop
+  const unsigned char* initial_read_iter = DowncastKToUc(read_iter);
+  const unsigned char* initial_read_end = &(initial_read_iter[buf_row_ct]);
+  unsigned char* initial_target_iter = buf0;
+  const uint32_t read_byte_stride = read_ul_stride * kBytesPerWord;
+  const uint32_t read_batch_rem = kNypsPerCacheline - read_batch_size;
+  for (; initial_read_iter != initial_read_end; ++initial_read_iter) {
+    const unsigned char* read_iter_tmp = initial_read_iter;
+    for (uint32_t ujj = 0; ujj != read_batch_size; ++ujj) {
+      *initial_target_iter++ = *read_iter_tmp;
+      read_iter_tmp = &(read_iter_tmp[read_byte_stride]);
+    }
+    initial_target_iter = memsetua(initial_target_iter, 0, read_batch_rem);
+  }
+
+  // second-to-last shuffle, 8 bit spacing -> 4
+  const uintptr_t* source_iter = R_CAST(uintptr_t*, buf0);
+  uintptr_t* target_iter0 = R_CAST(uintptr_t*, buf1);
+  const uint32_t write_word_ct = NypCtToWordCt(read_batch_size);
+  const uint32_t penult_inner_loop_iter_ct = 2 * write_word_ct;
+  const uint32_t cur_write_skip = 2 * kWordsPerCacheline - penult_inner_loop_iter_ct;
+  for (uint32_t uii = 0; uii != buf_row_ct; ++uii) {
+    uintptr_t* target_iter1 = &(target_iter0[kWordsPerCacheline * 2]);
+    for (uint32_t ujj = 0; ujj != penult_inner_loop_iter_ct; ++ujj) {
+      const uintptr_t source_word_lo = *source_iter++;
+      const uintptr_t source_word_hi = *source_iter++;
+      *target_iter0++ = PackTwo0F0FMask(source_word_lo, source_word_hi);
+      *target_iter1++ = PackTwo0F0FMask(source_word_lo >> 4, source_word_hi >> 4);
+    }
+    source_iter = &(source_iter[2 * cur_write_skip]);
+    target_iter0 = &(target_iter1[cur_write_skip]);
+  }
+
+  // last shuffle, 4 bit spacing -> 2
+  source_iter = R_CAST(uintptr_t*, buf1);
+  target_iter0 = write_iter;
+  const uint32_t last_loop_iter_ct = DivUp(write_batch_size, 2);
+  for (uint32_t uii = 0; uii != last_loop_iter_ct; ++uii) {
+    uintptr_t* target_iter1 = &(target_iter0[write_ul_stride]);
+    for (uint32_t ujj = 0; ujj != write_word_ct; ++ujj) {
+      const uintptr_t source_word_lo = *source_iter++;
+      const uintptr_t source_word_hi = *source_iter++;
+      target_iter0[ujj] = PackTwo3333Mask(source_word_lo, source_word_hi);
+      target_iter1[ujj] = PackTwo3333Mask(source_word_lo >> 2, source_word_hi >> 2);
+    }
+    source_iter = &(source_iter[2 * (kWordsPerCacheline - write_word_ct)]);
+    target_iter0 = &(target_iter1[write_ul_stride]);
+  }
+}
+#  else
+static_assert(kWordsPerVec == 1, "TransposeNypblock32() needs to be updated.");
+void TransposeNypblock32(const uintptr_t* read_iter, uint32_t read_ul_stride, uint32_t write_ul_stride, uint32_t read_batch_size, uint32_t write_batch_size, uintptr_t* __restrict write_iter, unsigned char* __restrict buf0, unsigned char* __restrict buf1) {
+  // buf0 and buf1 must each be vector-aligned and have size 16k
+  // defining them as unsigned char* might prevent a strict-aliasing issue?
+  // (might need to go through greater contortions to actually be safe?)
+  const uint32_t buf_row_ct = NypCtToByteCt(write_batch_size);
+  // fold the first 6 shuffles into the initial ingestion loop
+  const unsigned char* initial_read_iter = DowncastKToUc(read_iter);
+  const unsigned char* initial_read_end = &(initial_read_iter[buf_row_ct]);
+  unsigned char* initial_target_iter = buf0;
+  const uint32_t read_byte_stride = read_ul_stride * kBytesPerWord;
+  const uint32_t read_batch_rem = kNypsPerCacheline - read_batch_size;
+  for (; initial_read_iter != initial_read_end; ++initial_read_iter) {
+    const unsigned char* read_iter_tmp = initial_read_iter;
+    for (uint32_t ujj = 0; ujj != read_batch_size; ++ujj) {
+      *initial_target_iter++ = *read_iter_tmp;
+      read_iter_tmp = &(read_iter_tmp[read_byte_stride]);
+    }
+    initial_target_iter = memsetua(initial_target_iter, 0, read_batch_rem);
+  }
+
+  // second-to-last shuffle, 8 bit spacing -> 4
+  const uintptr_t* source_iter = R_CAST(uintptr_t*, buf0);
+  uintptr_t* target_iter0 = R_CAST(uintptr_t*, buf1);
+  const uint32_t write_word_ct = NypCtToWordCt(read_batch_size);
+  const uint32_t penult_inner_loop_iter_ct = 2 * write_word_ct;
+  const uint32_t cur_write_skip = 2 * kWordsPerCacheline - penult_inner_loop_iter_ct;
+  for (uint32_t uii = 0; uii != buf_row_ct; ++uii) {
+    uintptr_t* target_iter1 = &(target_iter0[kWordsPerCacheline * 2]);
+    for (uint32_t ujj = 0; ujj != penult_inner_loop_iter_ct; ++ujj) {
+      const uintptr_t source_word_lo = *source_iter++;
+      const uintptr_t source_word_hi = *source_iter++;
+      *target_iter0++ = PackTwo0F0FMask(source_word_lo, source_word_hi);
+      *target_iter1++ = PackTwo0F0FMask(source_word_lo >> 4, source_word_hi >> 4);
+    }
+    source_iter = &(source_iter[2 * cur_write_skip]);
+    target_iter0 = &(target_iter1[cur_write_skip]);
+  }
+
+  // last shuffle, 4 bit spacing -> 2
+  source_iter = R_CAST(uintptr_t*, buf1);
+  target_iter0 = write_iter;
+  const uint32_t last_loop_iter_ct = DivUp(write_batch_size, 2);
+  for (uint32_t uii = 0; uii != last_loop_iter_ct; ++uii) {
+    uintptr_t* target_iter1 = &(target_iter0[write_ul_stride]);
+    for (uint32_t ujj = 0; ujj != write_word_ct; ++ujj) {
+      const uintptr_t source_word_lo = *source_iter++;
+      const uintptr_t source_word_hi = *source_iter++;
+      target_iter0[ujj] = PackTwo3333Mask(source_word_lo, source_word_hi);
+      target_iter1[ujj] = PackTwo3333Mask(source_word_lo >> 2, source_word_hi >> 2);
+    }
+    source_iter = &(source_iter[2 * (kWordsPerCacheline - write_word_ct)]);
+    target_iter0 = &(target_iter1[write_ul_stride]);
+  }
+}
+#  endif  // !__LP64__
+#endif  // !USE_SSE2
+
+void BiallelicDosage16Invert(uint32_t dosage_ct, uint16_t* dosage_main) {
+  // replace each x with (32768 - x).
+  // compiler is smart enough to vectorize this.
+  for (uint32_t uii = 0; uii != dosage_ct; ++uii) {
+    dosage_main[uii] = 32768 - dosage_main[uii];
+  }
+}
+
+void BiallelicDphase16Invert(uint32_t dphase_ct, int16_t* dphase_delta) {
+  for (uint32_t uii = 0; uii != dphase_ct; ++uii) {
+    dphase_delta[uii] = -dphase_delta[uii];
+  }
+}
+
+#if defined(USE_SSE2) && !defined(USE_AVX2)
+void PackWordsToHalfwordsInvmatch(const uintptr_t* __restrict genoarr, uintptr_t inv_match_word, uint32_t inword_ct, uintptr_t* __restrict dst) {
+  // In shuffle8 case, this takes ~30% less time than a
+  // PackWordToHalfwordMask5555 loop.
+  const uint32_t out_fullvec_ct = inword_ct / (kWordsPerVec * 2);
+  const VecW xor_vec = vecw_set1(inv_match_word);
+  const VecW m1 = VCONST_W(kMask5555);
+#  ifdef USE_SHUFFLE8
+  const VecW swap12 = vecw_setr8(
+      0, 1, 4, 5, 2, 3, 6, 7,
+      8, 9, 12, 13, 10, 11, 14, 15);
+#  else
+  const VecW m2 = VCONST_W(kMask3333);
+#  endif
+  const VecW m4 = VCONST_W(kMask0F0F);
+  const VecW m8 = VCONST_W(kMask00FF);
+  for (uintptr_t vidx = 0; vidx != out_fullvec_ct; ++vidx) {
+    VecW vec_lo = vecw_loadu(&(genoarr[2 * kWordsPerVec * vidx])) ^ xor_vec;
+    VecW vec_hi = vecw_loadu(&(genoarr[2 * kWordsPerVec * vidx + kWordsPerVec])) ^ xor_vec;
+    vec_lo = vec_lo & vecw_srli(vec_lo, 1) & m1;
+    vec_hi = vec_hi & vecw_srli(vec_hi, 1) & m1;
+#  ifdef USE_SHUFFLE8
+    vec_lo = (vec_lo | vecw_srli(vec_lo, 3)) & m4;
+    vec_hi = (vec_hi | vecw_srli(vec_hi, 3)) & m4;
+    vec_lo = vecw_shuffle8(swap12, vec_lo);
+    vec_hi = vecw_shuffle8(swap12, vec_hi);
+#  else
+    vec_lo = (vec_lo | vecw_srli(vec_lo, 1)) & m2;
+    vec_hi = (vec_hi | vecw_srli(vec_hi, 1)) & m2;
+    vec_lo = (vec_lo | vecw_srli(vec_lo, 2)) & m4;
+    vec_hi = (vec_hi | vecw_srli(vec_hi, 2)) & m4;
+#  endif
+    vec_lo = vec_lo | vecw_srli(vec_lo, 4);
+    vec_hi = vec_hi | vecw_srli(vec_hi, 4);
+    const VecW vec_packed = vecw_gather_even(vec_lo, vec_hi, m8);
+    vecw_storeu(&(dst[kWordsPerVec * vidx]), vec_packed);
+  }
+  Halfword* dst_alias = DowncastWToHW(dst);
+  uint32_t widx = RoundDownPow2(inword_ct, kWordsPerVec * 2);
+  for (; widx != inword_ct; ++widx) {
+    const uintptr_t cur_word = genoarr[widx] ^ inv_match_word;
+    const Halfword hw = PackWordToHalfwordMask5555(cur_word & (cur_word >> 1));
+    dst_alias[widx] = hw;
+  }
+}
+
+void PackWordsToHalfwordsMismatch(const uintptr_t* __restrict genoarr, uintptr_t mismatch_word, uint32_t inword_ct, uintptr_t* __restrict dst) {
+  const uint32_t out_fullvec_ct = inword_ct / (kWordsPerVec * 2);
+  const VecW xor_vec = vecw_set1(mismatch_word);
+  const VecW m1 = VCONST_W(kMask5555);
+#  ifdef USE_SHUFFLE8
+  const VecW swap12 = vecw_setr8(
+      0, 1, 4, 5, 2, 3, 6, 7,
+      8, 9, 12, 13, 10, 11, 14, 15);
+#  else
+  const VecW m2 = VCONST_W(kMask3333);
+#  endif
+  const VecW m4 = VCONST_W(kMask0F0F);
+  const VecW m8 = VCONST_W(kMask00FF);
+  for (uintptr_t vidx = 0; vidx != out_fullvec_ct; ++vidx) {
+    VecW vec_lo = vecw_loadu(&(genoarr[2 * kWordsPerVec * vidx])) ^ xor_vec;
+    VecW vec_hi = vecw_loadu(&(genoarr[2 * kWordsPerVec * vidx + kWordsPerVec])) ^ xor_vec;
+    vec_lo = (vec_lo | vecw_srli(vec_lo, 1)) & m1;
+    vec_hi = (vec_hi | vecw_srli(vec_hi, 1)) & m1;
+#  ifdef USE_SHUFFLE8
+    vec_lo = (vec_lo | vecw_srli(vec_lo, 3)) & m4;
+    vec_hi = (vec_hi | vecw_srli(vec_hi, 3)) & m4;
+    vec_lo = vecw_shuffle8(swap12, vec_lo);
+    vec_hi = vecw_shuffle8(swap12, vec_hi);
+#  else
+    vec_lo = (vec_lo | vecw_srli(vec_lo, 1)) & m2;
+    vec_hi = (vec_hi | vecw_srli(vec_hi, 1)) & m2;
+    vec_lo = (vec_lo | vecw_srli(vec_lo, 2)) & m4;
+    vec_hi = (vec_hi | vecw_srli(vec_hi, 2)) & m4;
+#  endif
+    vec_lo = vec_lo | vecw_srli(vec_lo, 4);
+    vec_hi = vec_hi | vecw_srli(vec_hi, 4);
+    const VecW vec_packed = vecw_gather_even(vec_lo, vec_hi, m8);
+    vecw_storeu(&(dst[kWordsPerVec * vidx]), vec_packed);
+  }
+  Halfword* dst_alias = DowncastWToHW(dst);
+  uint32_t widx = RoundDownPow2(inword_ct, kWordsPerVec * 2);
+  for (; widx != inword_ct; ++widx) {
+    const uintptr_t cur_word = genoarr[widx] ^ mismatch_word;
+    const Halfword hw = PackWordToHalfwordMask5555(cur_word | (cur_word >> 1));
+    dst_alias[widx] = hw;
+  }
+}
+
+void MaskWordsToHalfwordsInvmatch(const uintptr_t* __restrict genoarr, uintptr_t inv_match_word, uint32_t inword_ct, uintptr_t* src, uintptr_t* dst) {
+  const uint32_t out_fullvec_ct = inword_ct / (kWordsPerVec * 2);
+  const VecW xor_vec = vecw_set1(inv_match_word);
+  const VecW m1 = VCONST_W(kMask5555);
+#  ifdef USE_SHUFFLE8
+  const VecW swap12 = vecw_setr8(
+      0, 1, 4, 5, 2, 3, 6, 7,
+      8, 9, 12, 13, 10, 11, 14, 15);
+#  else
+  const VecW m2 = VCONST_W(kMask3333);
+#  endif
+  const VecW m4 = VCONST_W(kMask0F0F);
+  const VecW m8 = VCONST_W(kMask00FF);
+  for (uintptr_t vidx = 0; vidx != out_fullvec_ct; ++vidx) {
+    VecW vec_lo = vecw_loadu(&(genoarr[2 * kWordsPerVec * vidx])) ^ xor_vec;
+    VecW vec_hi = vecw_loadu(&(genoarr[2 * kWordsPerVec * vidx + kWordsPerVec])) ^ xor_vec;
+    VecW src_vec = vecw_loadu(&(src[kWordsPerVec * vidx]));
+    vec_lo = vec_lo & vecw_srli(vec_lo, 1) & m1;
+    vec_hi = vec_hi & vecw_srli(vec_hi, 1) & m1;
+#  ifdef USE_SHUFFLE8
+    vec_lo = (vec_lo | vecw_srli(vec_lo, 3)) & m4;
+    vec_hi = (vec_hi | vecw_srli(vec_hi, 3)) & m4;
+    vec_lo = vecw_shuffle8(swap12, vec_lo);
+    vec_hi = vecw_shuffle8(swap12, vec_hi);
+#  else
+    vec_lo = (vec_lo | vecw_srli(vec_lo, 1)) & m2;
+    vec_hi = (vec_hi | vecw_srli(vec_hi, 1)) & m2;
+    vec_lo = (vec_lo | vecw_srli(vec_lo, 2)) & m4;
+    vec_hi = (vec_hi | vecw_srli(vec_hi, 2)) & m4;
+#  endif
+    vec_lo = vec_lo | vecw_srli(vec_lo, 4);
+    vec_hi = vec_hi | vecw_srli(vec_hi, 4);
+    const VecW vec_packed = vecw_gather_even(vec_lo, vec_hi, m8);
+    vecw_storeu(&(dst[kWordsPerVec * vidx]), src_vec & vec_packed);
+  }
+  Halfword* src_alias = DowncastWToHW(src);
+  Halfword* dst_alias = DowncastWToHW(dst);
+  uint32_t widx = RoundDownPow2(inword_ct, kWordsPerVec * 2);
+  for (; widx != inword_ct; ++widx) {
+    const uintptr_t cur_word = genoarr[widx] ^ inv_match_word;
+    const Halfword hw = PackWordToHalfwordMask5555(cur_word & (cur_word >> 1));
+    dst_alias[widx] = src_alias[widx] & hw;
+  }
+}
+#else
+void PackWordsToHalfwordsInvmatch(const uintptr_t* __restrict genoarr, uintptr_t inv_match_word, uint32_t inword_ct, uintptr_t* __restrict dst) {
+  Halfword* dst_alias = DowncastWToHW(dst);
+  for (uint32_t widx = 0; widx != inword_ct; ++widx) {
+    const uintptr_t cur_word = genoarr[widx] ^ inv_match_word;
+    const Halfword hw = PackWordToHalfwordMask5555(cur_word & (cur_word >> 1));
+    dst_alias[widx] = hw;
+  }
+}
+
+void PackWordsToHalfwordsMismatch(const uintptr_t* __restrict genoarr, uintptr_t mismatch_word, uint32_t inword_ct, uintptr_t* __restrict dst) {
+  Halfword* dst_alias = DowncastWToHW(dst);
+  for (uint32_t widx = 0; widx != inword_ct; ++widx) {
+    const uintptr_t cur_word = genoarr[widx] ^ mismatch_word;
+    const Halfword hw = PackWordToHalfwordMask5555(cur_word | (cur_word >> 1));
+    dst_alias[widx] = hw;
+  }
+}
+
+void MaskWordsToHalfwordsInvmatch(const uintptr_t* __restrict genoarr, uintptr_t inv_match_word, uint32_t inword_ct, uintptr_t* src, uintptr_t* dst) {
+  Halfword* src_alias = DowncastWToHW(src);
+  Halfword* dst_alias = DowncastWToHW(dst);
+  for (uint32_t widx = 0; widx != inword_ct; ++widx) {
+    const uintptr_t cur_word = genoarr[widx] ^ inv_match_word;
+    const Halfword hw = PackWordToHalfwordMask5555(cur_word & (cur_word >> 1));
+    dst_alias[widx] = src_alias[widx] & hw;
+  }
+}
+#endif
+
+void SparseToMissingness(const uintptr_t* __restrict raregeno, const uint32_t* difflist_sample_ids, uint32_t sample_ct, uint32_t difflist_common_geno, uint32_t difflist_len, uintptr_t* __restrict missingness) {
+  if (difflist_common_geno != 3) {
+    const uint32_t sample_ctl = BitCtToWordCt(sample_ct);
+    ZeroWArr(sample_ctl, missingness);
+    if (!difflist_len) {
+      return;
+    }
+    const uint32_t raregeno_word_ct = NypCtToWordCt(difflist_len);
+    for (uint32_t widx = 0; widx != raregeno_word_ct; ++widx) {
+      const uintptr_t raregeno_word = raregeno[widx];
+      uintptr_t raregeno_11 = raregeno_word & (raregeno_word >> 1) & kMask5555;
+      if (raregeno_11) {
+        const uint32_t* cur_difflist_sample_ids = &(difflist_sample_ids[widx * kBitsPerWordD2]);
+        do {
+          const uint32_t sample_idx_lowbits = ctzw(raregeno_11) / 2;
+          const uint32_t cur_sample_id = cur_difflist_sample_ids[sample_idx_lowbits];
+          SetBit(cur_sample_id, missingness);
+          raregeno_11 &= raregeno_11 - 1;
+        } while (raregeno_11);
+      }
+    }
+  } else {
+    SetAllBits(sample_ct, missingness);
+    // Don't need to look at raregeno, all cases are nonmissing.
+    for (uint32_t uii = 0; uii != difflist_len; ++uii) {
+      const uint32_t cur_sample_id = difflist_sample_ids[uii];
+      ClearBit(cur_sample_id, missingness);
+    }
+  }
+}
+
+#if defined(USE_SSE2) && !defined(USE_AVX2)
+void SplitHomRef2hetUnsafeW(const uintptr_t* __restrict genoarr, uint32_t inword_ct, uintptr_t* __restrict hom_buf, uintptr_t* __restrict ref2het_buf) {
+  const uint32_t out_fullvec_ct = inword_ct / (kWordsPerVec * 2);
+  // In shuffle8 case, this takes ~55% less time than unvectorized loop.
+  // homozygous: geno = 0 or 2
+  // ref2het: geno = 0 or 1
+  const VecW m1 = VCONST_W(kMask5555);
+#  ifdef USE_SHUFFLE8
+  const VecW swap12 = vecw_setr8(
+      0, 1, 4, 5, 2, 3, 6, 7,
+      8, 9, 12, 13, 10, 11, 14, 15);
+#  else
+  const VecW m2 = VCONST_W(kMask3333);
+#  endif
+  const VecW m4 = VCONST_W(kMask0F0F);
+  const VecW m8 = VCONST_W(kMask00FF);
+  for (uintptr_t vidx = 0; vidx != out_fullvec_ct; ++vidx) {
+    const VecW vec_lo = vecw_loadu(&(genoarr[2 * kWordsPerVec * vidx]));
+    const VecW vec_hi = vecw_loadu(&(genoarr[2 * kWordsPerVec * vidx + kWordsPerVec]));
+    VecW hom_lo = vecw_and_notfirst(vec_lo, m1);
+    VecW r2h_lo = vecw_and_notfirst(vecw_srli(vec_lo, 1), m1);
+    VecW hom_hi = vecw_and_notfirst(vec_hi, m1);
+    VecW r2h_hi = vecw_and_notfirst(vecw_srli(vec_hi, 1), m1);
+#  ifdef USE_SHUFFLE8
+    hom_lo = (hom_lo | vecw_srli(hom_lo, 3)) & m4;
+    r2h_lo = (r2h_lo | vecw_srli(r2h_lo, 3)) & m4;
+    hom_hi = (hom_hi | vecw_srli(hom_hi, 3)) & m4;
+    r2h_hi = (r2h_hi | vecw_srli(r2h_hi, 3)) & m4;
+    hom_lo = vecw_shuffle8(swap12, hom_lo);
+    r2h_lo = vecw_shuffle8(swap12, r2h_lo);
+    hom_hi = vecw_shuffle8(swap12, hom_hi);
+    r2h_hi = vecw_shuffle8(swap12, r2h_hi);
+#  else
+    hom_lo = (hom_lo | vecw_srli(hom_lo, 1)) & m2;
+    r2h_lo = (r2h_lo | vecw_srli(r2h_lo, 1)) & m2;
+    hom_hi = (hom_hi | vecw_srli(hom_hi, 1)) & m2;
+    r2h_hi = (r2h_hi | vecw_srli(r2h_hi, 1)) & m2;
+    hom_lo = (hom_lo | vecw_srli(hom_lo, 2)) & m4;
+    r2h_lo = (r2h_lo | vecw_srli(r2h_lo, 2)) & m4;
+    hom_hi = (hom_hi | vecw_srli(hom_hi, 2)) & m4;
+    r2h_hi = (r2h_hi | vecw_srli(r2h_hi, 2)) & m4;
+#  endif
+    hom_lo = hom_lo | vecw_srli(hom_lo, 4);
+    r2h_lo = r2h_lo | vecw_srli(r2h_lo, 4);
+    hom_hi = hom_hi | vecw_srli(hom_hi, 4);
+    r2h_hi = r2h_hi | vecw_srli(r2h_hi, 4);
+    const VecW hom_packed = vecw_gather_even(hom_lo, hom_hi, m8);
+    const VecW r2h_packed = vecw_gather_even(r2h_lo, r2h_hi, m8);
+    vecw_storeu(&(hom_buf[kWordsPerVec * vidx]), hom_packed);
+    vecw_storeu(&(ref2het_buf[kWordsPerVec * vidx]), r2h_packed);
+  }
+  Halfword* hom_alias = DowncastWToHW(hom_buf);
+  Halfword* r2h_alias = DowncastWToHW(ref2het_buf);
+  uint32_t widx = RoundDownPow2(inword_ct, kWordsPerVec * 2);
+  for (; widx != inword_ct; ++widx) {
+    const uintptr_t inv_geno_word = ~genoarr[widx];
+    hom_alias[widx] = PackWordToHalfwordMask5555(inv_geno_word);
+    r2h_alias[widx] = PackWordToHalfwordMaskAAAA(inv_geno_word);
+  }
+}
+#else
+void SplitHomRef2hetUnsafeW(const uintptr_t* genoarr, uint32_t inword_ct, uintptr_t* __restrict hom_buf, uintptr_t* __restrict ref2het_buf) {
+  Halfword* hom_alias = DowncastWToHW(hom_buf);
+  Halfword* ref2het_alias = DowncastWToHW(ref2het_buf);
+  for (uint32_t widx = 0; widx != inword_ct; ++widx) {
+    const uintptr_t inv_geno_word = ~genoarr[widx];
+    hom_alias[widx] = PackWordToHalfwordMask5555(inv_geno_word);
+    ref2het_alias[widx] = PackWordToHalfwordMaskAAAA(inv_geno_word);
+  }
+}
+#endif
+
+void SplitHomRef2het(const uintptr_t* genoarr, uint32_t sample_ct, uintptr_t* __restrict hom_buf, uintptr_t* __restrict ref2het_buf) {
+  const uint32_t full_outword_ct = sample_ct / kBitsPerWord;
+  SplitHomRef2hetUnsafeW(genoarr, full_outword_ct * 2, hom_buf, ref2het_buf);
+  const uint32_t remainder = sample_ct % kBitsPerWord;
+  if (remainder) {
+    uintptr_t geno_word = genoarr[full_outword_ct * 2];
+    uintptr_t hom_word = PackWordToHalfwordMask5555(~geno_word);
+    uintptr_t ref2het_word = PackWordToHalfwordMaskAAAA(~geno_word);
+    if (remainder > kBitsPerWordD2) {
+      geno_word = genoarr[full_outword_ct * 2 + 1];
+      hom_word |= S_CAST(uintptr_t, PackWordToHalfwordMask5555(~geno_word)) << kBitsPerWordD2;
+      ref2het_word |= S_CAST(uintptr_t, PackWordToHalfwordMaskAAAA(~geno_word)) << kBitsPerWordD2;
+    }
+    const uintptr_t cur_mask = (k1LU << remainder) - 1;
+    hom_buf[full_outword_ct] = hom_word & cur_mask;
+    ref2het_buf[full_outword_ct] = ref2het_word & cur_mask;
+  }
+}
+
+BoolErr HapsplitMustPhased(const uintptr_t* genoarr, const uintptr_t* phasepresent, const uintptr_t* phaseinfo, uint32_t sample_ct, uint32_t phase_exists, uintptr_t* hap_arr, uintptr_t* nm_arr) {
+  const uint32_t sample_ctl2 = NypCtToWordCt(sample_ct);
+  uintptr_t detect_unphased = 0;
+  if (!phase_exists) {
+    // error out if het encountered
+    for (uint32_t widx = 0; widx != sample_ctl2; ++widx) {
+      const uintptr_t geno_word = genoarr[widx];
+      const uintptr_t nm_word = 3 * (kMask5555 & (~(geno_word & (geno_word >> 1))));
+      const uintptr_t geno_nm = geno_word & nm_word;
+      // geno_nm is now {00, 01, 10, 00}.  In particular, if we ever see 01, we
+      // error out.
+      const uintptr_t geno_nm_hi = (geno_nm >> 1) & kMask5555;
+      nm_arr[widx] = nm_word;
+      hap_arr[widx] = geno_nm | geno_nm_hi;
+      detect_unphased |= geno_nm;
+    }
+    detect_unphased &= kMask5555;
+  } else {
+    // error out if het encountered, and not covered by phasepresent
+    const Halfword* phasepresent_alias = DowncastKWToHW(phasepresent);
+    const Halfword* phaseinfo_alias = DowncastKWToHW(phaseinfo);
+    for (uint32_t widx = 0; widx != sample_ctl2; ++widx) {
+      const uintptr_t geno_word = genoarr[widx];
+      const uintptr_t geno_rshift = geno_word >> 1;
+      const uintptr_t nm_word = 3 * (kMask5555 & (~(geno_word & geno_rshift)));
+      const uintptr_t geno_nm = geno_word & nm_word;
+      const uintptr_t geno_nm_hi = (geno_nm >> 1) & kMask5555;
+      const uintptr_t het_word = geno_nm & kMask5555;
+      const uintptr_t phasepresent_word = UnpackHalfwordToWord(phasepresent_alias[widx]);
+      const uintptr_t phaseinfo_word = phasepresent_word & UnpackHalfwordToWord(phaseinfo_alias[widx]);
+      nm_arr[widx] = nm_word;
+      hap_arr[widx] = geno_nm + geno_nm_hi + phaseinfo_word;
+      detect_unphased |= het_word & (~phasepresent_word);
+    }
+  }
+  const uint32_t trailing_nyp_ct = sample_ct % kBitsPerWordD2;
+  if (trailing_nyp_ct) {
+    const uint32_t trailing_bit_ct = trailing_nyp_ct * 2;
+    const uint32_t last_word_idx = sample_ctl2 - 1;
+    nm_arr[last_word_idx] = bzhi(nm_arr[last_word_idx], trailing_bit_ct);
+    hap_arr[last_word_idx] = bzhi(hap_arr[last_word_idx], trailing_bit_ct);
+  }
+  return (detect_unphased != 0);
+}
+
+#if defined(USE_SSE2) && !defined(USE_AVX2)
+void HapsplitHaploid(const uintptr_t* __restrict genoarr, uint32_t sample_ct, uintptr_t* __restrict hap_arr, uintptr_t* __restrict nm_arr) {
+  // In shuffle8 case, this takes ~40% less time than unvectorized loop.
+  const uint32_t sample_ctl = BitCtToWordCt(sample_ct);
+  const uint32_t sample_ctl2_is_odd = NypCtToWordCt(sample_ct) & 1;
+  const uint32_t wordpair_ct = sample_ctl - sample_ctl2_is_odd;
+  const uint32_t out_fullvec_ct = wordpair_ct / 2;
+  const VecW m1 = VCONST_W(kMask5555);
+#  ifdef USE_SHUFFLE8
+  const VecW swap12 = vecw_setr8(
+      0, 1, 4, 5, 2, 3, 6, 7,
+      8, 9, 12, 13, 10, 11, 14, 15);
+#  else
+  const VecW m2 = VCONST_W(kMask3333);
+#  endif
+  const VecW m4 = VCONST_W(kMask0F0F);
+  const VecW m8 = VCONST_W(kMask00FF);
+  for (uintptr_t vidx = 0; vidx != out_fullvec_ct; ++vidx) {
+    const VecW vec_lo = vecw_loadu(&(genoarr[2 * kWordsPerVec * vidx]));
+    const VecW vec_hi = vecw_loadu(&(genoarr[2 * kWordsPerVec * vidx + kWordsPerVec]));
+    VecW nm_lo = vecw_and_notfirst(vec_lo, m1);
+    VecW nm_hi = vecw_and_notfirst(vec_hi, m1);
+    VecW hap_lo = nm_lo & vecw_srli(vec_lo, 1);
+    VecW hap_hi = nm_hi & vecw_srli(vec_hi, 1);
+#  ifdef USE_SHUFFLE8
+    nm_lo = (nm_lo | vecw_srli(nm_lo, 3)) & m4;
+    nm_hi = (nm_hi | vecw_srli(nm_hi, 3)) & m4;
+    hap_lo = (hap_lo | vecw_srli(hap_lo, 3)) & m4;
+    hap_hi = (hap_hi | vecw_srli(hap_hi, 3)) & m4;
+    nm_lo = vecw_shuffle8(swap12, nm_lo);
+    nm_hi = vecw_shuffle8(swap12, nm_hi);
+    hap_lo = vecw_shuffle8(swap12, hap_lo);
+    hap_hi = vecw_shuffle8(swap12, hap_hi);
+#  else
+    nm_lo = (nm_lo | vecw_srli(nm_lo, 1)) & m2;
+    nm_hi = (nm_hi | vecw_srli(nm_hi, 1)) & m2;
+    hap_lo = (hap_lo | vecw_srli(hap_lo, 1)) & m2;
+    hap_hi = (hap_hi | vecw_srli(hap_hi, 1)) & m2;
+    nm_lo = (nm_lo | vecw_srli(nm_lo, 2)) & m4;
+    nm_hi = (nm_hi | vecw_srli(nm_hi, 2)) & m4;
+    hap_lo = (hap_lo | vecw_srli(hap_lo, 2)) & m4;
+    hap_hi = (hap_hi | vecw_srli(hap_hi, 2)) & m4;
+#  endif
+    nm_lo = nm_lo | vecw_srli(nm_lo, 4);
+    nm_hi = nm_hi | vecw_srli(nm_hi, 4);
+    hap_lo = hap_lo | vecw_srli(hap_lo, 4);
+    hap_hi = hap_hi | vecw_srli(hap_hi, 4);
+    const VecW nm_packed = vecw_gather_even(nm_lo, nm_hi, m8);
+    const VecW hap_packed = vecw_gather_even(hap_lo, hap_hi, m8);
+    vecw_storeu(&(nm_arr[kWordsPerVec * vidx]), nm_packed);
+    vecw_storeu(&(hap_arr[kWordsPerVec * vidx]), hap_packed);
+  }
+  if (wordpair_ct % 2) {
+    const uint32_t widx = wordpair_ct - 1;
+    const uintptr_t geno_word0 = genoarr[widx * 2];
+    const uintptr_t geno_word1 = genoarr[widx * 2 + 1];
+    const uintptr_t nm_word0 = ~geno_word0;
+    const uintptr_t nm_word1 = ~geno_word1;
+    const uintptr_t hap_word0 = nm_word0 & (geno_word0 >> 1);
+    const uintptr_t hap_word1 = nm_word1 & (geno_word1 >> 1);
+    nm_arr[widx] = PackTwo5555Mask(nm_word0, nm_word1);
+    hap_arr[widx] = PackTwo5555Mask(hap_word0, hap_word1);
+  }
+  if (sample_ctl2_is_odd) {
+    const uintptr_t geno_word0 = genoarr[wordpair_ct * 2];
+    const uintptr_t nm_word0 = ~geno_word0;
+    const uintptr_t hap_word0 = nm_word0 & (geno_word0 >> 1);
+    nm_arr[wordpair_ct] = PackWordToHalfwordMask5555(nm_word0);
+    hap_arr[wordpair_ct] = PackWordToHalfwordMask5555(hap_word0);
+  }
+  const uint32_t trailing_bit_ct = sample_ct % kBitsPerWord;
+  if (trailing_bit_ct) {
+    const uint32_t last_word_idx = sample_ctl - 1;
+    nm_arr[last_word_idx] = bzhi(nm_arr[last_word_idx], trailing_bit_ct);
+    hap_arr[last_word_idx] = bzhi(hap_arr[last_word_idx], trailing_bit_ct);
+  }
+}
+#else
+void HapsplitHaploid(const uintptr_t* __restrict genoarr, uint32_t sample_ct, uintptr_t* __restrict hap_arr, uintptr_t* __restrict nm_arr) {
+  const uint32_t sample_ctl = BitCtToWordCt(sample_ct);
+  const uint32_t sample_ctl2_is_odd = NypCtToWordCt(sample_ct) & 1;
+  const uint32_t wordpair_ct = sample_ctl - sample_ctl2_is_odd;
+  for (uint32_t widx = 0; widx != wordpair_ct; ++widx) {
+    const uintptr_t geno_word0 = genoarr[widx * 2];
+    const uintptr_t geno_word1 = genoarr[widx * 2 + 1];
+    const uintptr_t nm_word0 = ~geno_word0;
+    const uintptr_t nm_word1 = ~geno_word1;
+    const uintptr_t hap_word0 = nm_word0 & (geno_word0 >> 1);
+    const uintptr_t hap_word1 = nm_word1 & (geno_word1 >> 1);
+    nm_arr[widx] = PackTwo5555Mask(nm_word0, nm_word1);
+    hap_arr[widx] = PackTwo5555Mask(hap_word0, hap_word1);
+  }
+  if (sample_ctl2_is_odd) {
+    const uintptr_t geno_word0 = genoarr[wordpair_ct * 2];
+    const uintptr_t nm_word0 = ~geno_word0;
+    const uintptr_t hap_word0 = nm_word0 & (geno_word0 >> 1);
+    nm_arr[wordpair_ct] = PackWordToHalfwordMask5555(nm_word0);
+    hap_arr[wordpair_ct] = PackWordToHalfwordMask5555(hap_word0);
+  }
+  const uint32_t trailing_bit_ct = sample_ct % kBitsPerWord;
+  if (trailing_bit_ct) {
+    const uint32_t last_word_idx = sample_ctl - 1;
+    nm_arr[last_word_idx] = bzhi(nm_arr[last_word_idx], trailing_bit_ct);
+    hap_arr[last_word_idx] = bzhi(hap_arr[last_word_idx], trailing_bit_ct);
+  }
+}
+#endif
+
+#ifdef USE_SHUFFLE8
+// ~70% less time than per-byte lookup.
+void GenoarrLookup256x1bx4(const uintptr_t* genoarr, const void* table256x1bx4, uint32_t sample_ct, void* __restrict result) {
+  const uint32_t* table_alias = S_CAST(const uint32_t*, table256x1bx4);
+  const unsigned char* genoarr_alias = DowncastKToUc(genoarr);
+  unsigned char* resultb = S_CAST(unsigned char*, result);
+  const uint32_t full_byte_ct = sample_ct / 4;
+  if (full_byte_ct >= kBytesPerVec) {
+    const uint32_t last_genoarr_offset = full_byte_ct - kBytesPerVec;
+    const VecW lookup_even = vecw_loadu(&(table_alias[256]));
+    const VecW lookup_odd = vecw_loadu(&(table_alias[256 + kInt32PerVec]));
+    const VecW m4 = VCONST_W(kMask0F0F);
+    for (uint32_t genoarr_offset = 0; ; genoarr_offset += kBytesPerVec) {
+      if (genoarr_offset >= last_genoarr_offset) {
+        if (genoarr_offset == full_byte_ct) {
+          break;
+        }
+        genoarr_offset = last_genoarr_offset;
+      }
+      VecW cur_vec = vecw_loadu(&(genoarr_alias[genoarr_offset]));
+      VecW vec_lo;
+      VecW vec_hi;
+      vecw_lo_and_hi_nybbles(cur_vec, m4, &vec_lo, &vec_hi);
+      VecW result_lo_even = vecw_shuffle8(lookup_even, vec_lo);
+      VecW result_hi_even = vecw_shuffle8(lookup_even, vec_hi);
+      VecW result_lo_odd = vecw_shuffle8(lookup_odd, vec_lo);
+      VecW result_hi_odd = vecw_shuffle8(lookup_odd, vec_hi);
+      // In AVX2 case, result_lo_even has (0, 2, 4, ..., 62), and result_lo_odd
+      // has (1, 3, 5, ..., 63).
+      //   even -> (0, 2, 4, ..., 14, 32, ..., 46, 16, ..., 30, 48, ..., 62)
+      //   odd ->  (1, 3, 5, ..., 15, 33, ..., 47, 17, ..., 31, 49, ..., 63)
+      // Then unpacklo yields (0, 1, 2, ..., 31).
+      result_lo_even = vecw_permute0xd8_if_avx2(result_lo_even);
+      result_lo_odd = vecw_permute0xd8_if_avx2(result_lo_odd);
+      result_hi_even = vecw_permute0xd8_if_avx2(result_hi_even);
+      result_hi_odd = vecw_permute0xd8_if_avx2(result_hi_odd);
+      const VecW result0 = vecw_unpacklo8(result_lo_even, result_lo_odd);
+      const VecW result1 = vecw_unpackhi8(result_lo_even, result_lo_odd);
+      const VecW result2 = vecw_unpacklo8(result_hi_even, result_hi_odd);
+      const VecW result3 = vecw_unpackhi8(result_hi_even, result_hi_odd);
+      unsigned char* cur_resultb = &(resultb[genoarr_offset * 4]);
+      vecw_storeu(cur_resultb, result0);
+      vecw_storeu(&(cur_resultb[kBytesPerVec]), result1);
+      vecw_storeu(&(cur_resultb[2 * kBytesPerVec]), result2);
+      vecw_storeu(&(cur_resultb[3 * kBytesPerVec]), result3);
+    }
+  } else {
+    for (uint32_t byte_idx = 0; byte_idx != full_byte_ct; ++byte_idx) {
+      CopyToUnalignedOffsetU32(resultb, &(table_alias[genoarr_alias[byte_idx]]), byte_idx);
+    }
+  }
+  const uint32_t remainder = sample_ct % 4;
+  if (remainder) {
+    unsigned char* result_last = &(resultb[full_byte_ct * 4]);
+    uintptr_t geno_byte = genoarr_alias[full_byte_ct];
+    for (uint32_t uii = 0; uii != remainder; ++uii) {
+      result_last[uii] = table_alias[geno_byte & 3];
+      geno_byte >>= 2;
+    }
+  }
+}
+#else
+void GenoarrLookup256x1bx4(const uintptr_t* genoarr, const void* table256x1bx4, uint32_t sample_ct, void* __restrict result) {
+  const uint32_t* table_alias = S_CAST(const uint32_t*, table256x1bx4);
+  const unsigned char* genoarr_alias = DowncastKToUc(genoarr);
+  unsigned char* resultb = S_CAST(unsigned char*, result);
+  const uint32_t full_byte_ct = sample_ct / 4;
+  for (uint32_t byte_idx = 0; byte_idx != full_byte_ct; ++byte_idx) {
+    CopyToUnalignedOffsetU32(resultb, &(table_alias[genoarr_alias[byte_idx]]), byte_idx);
+  }
+  const uint32_t remainder = sample_ct % 4;
+  if (remainder) {
+    unsigned char* result_last = &(resultb[full_byte_ct * 4]);
+    uintptr_t geno_byte = genoarr_alias[full_byte_ct];
+    for (uint32_t uii = 0; uii != remainder; ++uii) {
+      result_last[uii] = table_alias[geno_byte & 3];
+      geno_byte >>= 2;
+    }
+  }
+}
+#endif
+
+#ifndef NO_UNALIGNED
+void GenoarrLookup16x4bx2(const uintptr_t* genoarr, const void* table16x4bx2, uint32_t sample_ct, void* __restrict result) {
+  const uint64_t* table_alias = S_CAST(const uint64_t*, table16x4bx2);
+  unsigned char* result_biter = S_CAST(unsigned char*, result);
+  const uint32_t sample_ctl2m1 = (sample_ct - 1) / kBitsPerWordD2;
+  uint32_t loop_len = kBitsPerWordD4;
+  uintptr_t geno_word = 0;
+  for (uint32_t widx = 0; ; ++widx) {
+    if (widx >= sample_ctl2m1) {
+      if (widx > sample_ctl2m1) {
+        if (sample_ct % 2) {
+          // not a regular CopyToUnaligned, we're only copying the bottom half
+          // of the element
+          memcpy(result_biter, &(table_alias[geno_word & 3]), 4);
+        }
+        return;
+      }
+      loop_len = ModNz(sample_ct, kBitsPerWordD2) / 2;
+    }
+    geno_word = genoarr[widx];
+    for (uint32_t uii = 0; uii != loop_len; ++uii) {
+      const uintptr_t cur_2geno = geno_word & 15;
+      AppendU64(table_alias[cur_2geno], &result_biter);
+      geno_word >>= 4;
+    }
+  }
+}
+#else
+// plink2_glm_logistic does not guarantee 8 byte table alignment.
+void GenoarrLookup16x4bx2(const uintptr_t* genoarr, const void* table16x4bx2, uint32_t sample_ct, void* __restrict result) {
+  const uint32_t* table_u32 = S_CAST(const uint32_t*, table16x4bx2);
+  unsigned char* result_biter = S_CAST(unsigned char*, result);
+  const uint32_t sample_ctl2m1 = (sample_ct - 1) / kBitsPerWordD2;
+  uint32_t loop_len = kBitsPerWordD4;
+  uintptr_t geno_word = 0;
+  for (uint32_t widx = 0; ; ++widx) {
+    if (widx >= sample_ctl2m1) {
+      if (widx > sample_ctl2m1) {
+        if (sample_ct % 2) {
+          // not a regular CopyToUnaligned, we're only copying the bottom half
+          // of the element
+          memcpy(result_biter, &(table_u32[(geno_word & 3) * 2]), 4);
+        }
+        return;
+      }
+      loop_len = ModNz(sample_ct, kBitsPerWordD2) / 2;
+    }
+    geno_word = genoarr[widx];
+    for (uint32_t uii = 0; uii != loop_len; ++uii) {
+      const uintptr_t cur_2geno = geno_word & 15;
+      memcpy(result_biter, &(table_u32[cur_2geno * 2]), 8);
+      result_biter += 8;
+      geno_word >>= 4;
+    }
+  }
+}
+#endif
+
+// this might be important for genovec -> AlleleCode expansion
+void GenoarrLookup256x2bx4(const uintptr_t* genoarr, const void* table256x2bx4, uint32_t sample_ct, void* __restrict result) {
+  const uint64_t* table_alias = S_CAST(const uint64_t*, table256x2bx4);
+  const unsigned char* genoarr_alias = DowncastKToUc(genoarr);
+  unsigned char* resultb = S_CAST(unsigned char*, result);
+  const uint32_t full_byte_ct = sample_ct / 4;
+  for (uint32_t byte_idx = 0; byte_idx != full_byte_ct; ++byte_idx) {
+    CopyToUnalignedOffsetU64(resultb, &(table_alias[genoarr_alias[byte_idx]]), byte_idx);
+  }
+  const uint32_t remainder = sample_ct % 4;
+  if (remainder) {
+    unsigned char* result_last = &(resultb[full_byte_ct * sizeof(int64_t)]);
+    uintptr_t geno_byte = genoarr_alias[full_byte_ct];
+    for (uint32_t uii = 0; uii != remainder; ++uii) {
+      CopyToUnalignedOffsetU16(result_last, DowncastKU64ToU16(&(table_alias[geno_byte & 3])), uii);
+      geno_byte >>= 2;
+    }
+  }
+}
+
+#ifdef USE_SSE2
+void GenoarrLookup4x16b(const uintptr_t* genoarr, const void* table4x16b, uint32_t sample_ct, void* result) {
+  const __m128i* table_alias = S_CAST(const __m128i*, table4x16b);
+  unsigned char* result_biter = S_CAST(unsigned char*, result);
+  const uint32_t sample_ctl2m1 = (sample_ct - 1) / kBitsPerWordD2;
+  uint32_t loop_len = kBitsPerWordD2;
+  uintptr_t geno_word = 0;
+  for (uint32_t widx = 0; ; ++widx) {
+    if (widx >= sample_ctl2m1) {
+      if (widx > sample_ctl2m1) {
+        return;
+      }
+      loop_len = ModNz(sample_ct, kBitsPerWordD2);
+    }
+    geno_word = genoarr[widx];
+    for (uint32_t uii = 0; uii != loop_len; ++uii) {
+      _mm_storeu_si128(R_CAST(__m128i*, result_biter), table_alias[geno_word & 3]);
+      result_biter += 16;
+      geno_word >>= 2;
+    }
+  }
+}
+
+void GenoarrLookup16x8bx2(const uintptr_t* genoarr, const void* table16x8bx2, uint32_t sample_ct, void* __restrict result) {
+  const __m128i* table_alias = S_CAST(const __m128i*, table16x8bx2);
+  unsigned char* result_biter = S_CAST(unsigned char*, result);
+  const uint32_t sample_ctl2m1 = (sample_ct - 1) / kBitsPerWordD2;
+  uint32_t loop_len = kBitsPerWordD4;
+  uintptr_t geno_word = 0;
+  for (uint32_t widx = 0; ; ++widx) {
+    if (widx >= sample_ctl2m1) {
+      if (widx > sample_ctl2m1) {
+        if (sample_ct % 2) {
+          memcpy(result_biter, &(table_alias[geno_word & 3]), 8);
+        }
+        return;
+      }
+      loop_len = ModNz(sample_ct, kBitsPerWordD2) / 2;
+    }
+    geno_word = genoarr[widx];
+    for (uint32_t uii = 0; uii != loop_len; ++uii) {
+      const uintptr_t cur_2geno = geno_word & 15;
+      _mm_storeu_si128(R_CAST(__m128i*, result_biter), table_alias[cur_2geno]);
+      result_biter += 16;
+      geno_word >>= 4;
+    }
+  }
+}
+
+void GenoarrLookup256x4bx4(const uintptr_t* genoarr, const void* table256x4bx4, uint32_t sample_ct, void* __restrict result) {
+  const __m128i* table_alias = S_CAST(const __m128i*, table256x4bx4);
+  const unsigned char* genoarr_alias = DowncastKToUc(genoarr);
+  unsigned char* resultb = S_CAST(unsigned char*, result);
+  const uint32_t full_byte_ct = sample_ct / 4;
+  for (uint32_t byte_idx = 0; byte_idx != full_byte_ct; ++byte_idx) {
+    _mm_storeu_si128(R_CAST(__m128i*, &(resultb[byte_idx * 16])), table_alias[genoarr_alias[byte_idx]]);
+  }
+  const uint32_t remainder = sample_ct % 4;
+  if (remainder) {
+    unsigned char* result_last = &(resultb[full_byte_ct * 16]);
+    uintptr_t geno_byte = genoarr_alias[full_byte_ct];
+    for (uint32_t uii = 0; uii != remainder; ++uii) {
+      CopyToUnalignedOffsetU32(result_last, R_CAST(const uint32_t*, &(table_alias[geno_byte & 3])), uii);
+      geno_byte >>= 2;
+    }
+  }
+}
+#else // !USE_SSE2
+void GenoarrLookup4x16b(const uintptr_t* genoarr, const void* table4x16b, uint32_t sample_ct, void* result) {
+  const uint64_t* table_alias = S_CAST(const uint64_t*, table4x16b);
+  unsigned char* result_biter = S_CAST(unsigned char*, result);
+  const uint32_t sample_ctl2m1 = (sample_ct - 1) / kBitsPerWordD2;
+  uint32_t loop_len = kBitsPerWordD2;
+  uintptr_t geno_word = 0;
+  for (uint32_t widx = 0; ; ++widx) {
+    if (widx >= sample_ctl2m1) {
+      if (widx > sample_ctl2m1) {
+        return;
+      }
+      loop_len = ModNz(sample_ct, kBitsPerWordD2);
+    }
+    geno_word = genoarr[widx];
+    for (uint32_t uii = 0; uii != loop_len; ++uii) {
+      memcpy(result_biter, &(table_alias[(geno_word & 3) * 2]), 16);
+      result_biter += 16;
+      geno_word >>= 2;
+    }
+  }
+}
+
+void GenoarrLookup16x8bx2(const uintptr_t* genoarr, const void* table16x8bx2, uint32_t sample_ct, void* __restrict result) {
+  const uint64_t* table_alias = S_CAST(const uint64_t*, table16x8bx2);
+  unsigned char* result_biter = S_CAST(unsigned char*, result);
+  const uint32_t sample_ctl2m1 = (sample_ct - 1) / kBitsPerWordD2;
+  uint32_t loop_len = kBitsPerWordD4;
+  uintptr_t geno_word = 0;
+  for (uint32_t widx = 0; ; ++widx) {
+    if (widx >= sample_ctl2m1) {
+      if (widx > sample_ctl2m1) {
+        if (sample_ct % 2) {
+          CopyToUnalignedU64(result_biter, &(table_alias[(geno_word & 3) * 2]));
+        }
+        return;
+      }
+      loop_len = ModNz(sample_ct, kBitsPerWordD2) / 2;
+    }
+    geno_word = genoarr[widx];
+    for (uint32_t uii = 0; uii != loop_len; ++uii) {
+      const uintptr_t cur_2geno = geno_word & 15;
+      memcpy(result_biter, &(table_alias[cur_2geno * 2]), 16);
+      result_biter += 16;
+      geno_word >>= 4;
+    }
+  }
+}
+
+void GenoarrLookup256x4bx4(const uintptr_t* genoarr, const void* table256x4bx4, uint32_t sample_ct, void* __restrict result) {
+  const uint32_t* table_alias = S_CAST(const uint32_t*, table256x4bx4);
+  const unsigned char* genoarr_alias = DowncastKToUc(genoarr);
+  unsigned char* resultb = S_CAST(unsigned char*, result);
+  const uint32_t full_byte_ct = sample_ct / 4;
+  for (uint32_t byte_idx = 0; byte_idx != full_byte_ct; ++byte_idx) {
+    memcpy(&(resultb[byte_idx * 16]), &(table_alias[genoarr_alias[byte_idx] * 4]), 16);
+  }
+  const uint32_t remainder = sample_ct % 4;
+  if (remainder) {
+    unsigned char* result_last = &(resultb[full_byte_ct * 16]);
+    uintptr_t geno_byte = genoarr_alias[full_byte_ct];
+    for (uint32_t uii = 0; uii != remainder; ++uii) {
+      CopyToUnalignedOffsetU32(result_last, &(table_alias[(geno_byte & 3) * 4]), uii);
+      geno_byte >>= 2;
+    }
+  }
+}
+#endif
+
+void InitLookup16x4bx2(void* table16x4bx2) {
+  uint32_t* table_iter = S_CAST(uint32_t*, table16x4bx2);
+  uint32_t vals[4];
+  vals[0] = table_iter[0];
+  table_iter[1] = vals[0];
+  vals[1] = table_iter[2];
+  table_iter[3] = vals[0];
+  vals[2] = table_iter[4];
+  table_iter[5] = vals[0];
+  vals[3] = table_iter[6];
+  table_iter[7] = vals[0];
+  table_iter = &(table_iter[8]);
+  for (uint32_t high_idx = 1; high_idx != 4; ++high_idx) {
+    const uint32_t cur_high = vals[high_idx];
+    for (uint32_t low_idx = 0; low_idx != 4; ++low_idx) {
+      *table_iter++ = vals[low_idx];
+      *table_iter++ = cur_high;
+    }
+  }
+}
+
+void InitLookup16x8bx2(void* table16x8bx2) {
+  uint64_t* table_iter = S_CAST(uint64_t*, table16x8bx2);
+  uint64_t vals[4];
+  vals[0] = table_iter[0];
+  table_iter[1] = vals[0];
+  vals[1] = table_iter[2];
+  table_iter[3] = vals[0];
+  vals[2] = table_iter[4];
+  table_iter[5] = vals[0];
+  vals[3] = table_iter[6];
+  table_iter[7] = vals[0];
+  table_iter = &(table_iter[8]);
+  for (uint32_t high_idx = 1; high_idx != 4; ++high_idx) {
+    // bugfix (20 Jun 2018): cur_high needs to be a uint64_t, not a uint32_t
+    const uint64_t cur_high = vals[high_idx];
+    for (uint32_t low_idx = 0; low_idx != 4; ++low_idx) {
+      *table_iter++ = vals[low_idx];
+      *table_iter++ = cur_high;
+    }
+  }
+}
+
+void InitLookup256x1bx4(void* table256x1bx4) {
+  unsigned char* table_iter = S_CAST(unsigned char*, table256x1bx4);
+  unsigned char vals[4];
+  vals[0] = table_iter[0];
+  vals[1] = table_iter[4];
+  vals[2] = table_iter[8];
+  vals[3] = table_iter[12];
+  for (uint32_t high_idx = 0; high_idx != 4; ++high_idx) {
+    const uint32_t cur_high = vals[high_idx];
+    for (uint32_t second_idx = 0; second_idx != 4; ++second_idx) {
+      const uint32_t cur_second = vals[second_idx];
+      for (uint32_t third_idx = 0; third_idx != 4; ++third_idx) {
+        const uint32_t cur_third = vals[third_idx];
+        for (uint32_t low_idx = 0; low_idx != 4; ++low_idx) {
+          *table_iter++ = vals[low_idx];
+          *table_iter++ = cur_third;
+          *table_iter++ = cur_second;
+          *table_iter++ = cur_high;
+        }
+      }
+    }
+  }
+#ifdef USE_SHUFFLE8
+  // first vector: 0, 1, 2, 3
+  // second vector: 0, 4, 8, 12
+  uint32_t* final_u32s = R_CAST(uint32_t*, table_iter);
+  uint32_t val0123;
+  memcpy(&val0123, vals, 4);
+  for (uint32_t uii = 0; uii != kInt32PerVec; ++uii) {
+    final_u32s[uii] = val0123;
+  }
+  final_u32s[kInt32PerVec] = S_CAST(uint32_t, vals[0]) * 0x1010101;
+  final_u32s[kInt32PerVec + 1] = S_CAST(uint32_t, vals[1]) * 0x1010101;
+  final_u32s[kInt32PerVec + 2] = S_CAST(uint32_t, vals[2]) * 0x1010101;
+  final_u32s[kInt32PerVec + 3] = S_CAST(uint32_t, vals[3]) * 0x1010101;
+#  ifdef USE_AVX2
+  memcpy(&(final_u32s[12]), &(final_u32s[8]), 16);
+#  endif
+#endif
+}
+
+void InitLookup256x2bx4(void* table256x2bx4) {
+  uint16_t* table_iter = S_CAST(uint16_t*, table256x2bx4);
+  uint16_t vals[4];
+  vals[0] = table_iter[0];
+  vals[1] = table_iter[4];
+  vals[2] = table_iter[8];
+  vals[3] = table_iter[12];
+  for (uint32_t high_idx = 0; high_idx != 4; ++high_idx) {
+    const uint32_t cur_high = vals[high_idx];
+    for (uint32_t second_idx = 0; second_idx != 4; ++second_idx) {
+      const uint32_t cur_second = vals[second_idx];
+      for (uint32_t third_idx = 0; third_idx != 4; ++third_idx) {
+        const uint32_t cur_third = vals[third_idx];
+        for (uint32_t low_idx = 0; low_idx != 4; ++low_idx) {
+          *table_iter++ = vals[low_idx];
+          *table_iter++ = cur_third;
+          *table_iter++ = cur_second;
+          *table_iter++ = cur_high;
+        }
+      }
+    }
+  }
+}
+
+void InitLookup256x4bx4(void* table256x4bx4) {
+  uint32_t* table_iter = S_CAST(uint32_t*, table256x4bx4);
+  uint32_t vals[4];
+  vals[0] = table_iter[0];
+  vals[1] = table_iter[4];
+  vals[2] = table_iter[8];
+  vals[3] = table_iter[12];
+  for (uint32_t high_idx = 0; high_idx != 4; ++high_idx) {
+    const uint32_t cur_high = vals[high_idx];
+    for (uint32_t second_idx = 0; second_idx != 4; ++second_idx) {
+      const uint32_t cur_second = vals[second_idx];
+      for (uint32_t third_idx = 0; third_idx != 4; ++third_idx) {
+        const uint32_t cur_third = vals[third_idx];
+        for (uint32_t low_idx = 0; low_idx != 4; ++low_idx) {
+          *table_iter++ = vals[low_idx];
+          *table_iter++ = cur_third;
+          *table_iter++ = cur_second;
+          *table_iter++ = cur_high;
+        }
+      }
+    }
+  }
+}
+
+void PhaseLookup4b(const uintptr_t* genoarr, const uintptr_t* phasepresent, const uintptr_t* phaseinfo, const void* table56x4bx2, uint32_t sample_ct, void* __restrict result) {
+  const uint64_t* table_alias = S_CAST(const uint64_t*, table56x4bx2);
+  const uint32_t sample_ctl2_m1 = (sample_ct - 1) / kBitsPerWordD2;
+  const Halfword* phasepresent_alias = DowncastKWToHW(phasepresent);
+  const Halfword* phaseinfo_alias = DowncastKWToHW(phaseinfo);
+  unsigned char* result_biter = S_CAST(unsigned char*, result);
+  uint32_t loop_len = kBitsPerWordD4;
+  uintptr_t geno_word = 0;
+  uintptr_t phasepresent_hw_shifted = 0;
+  uintptr_t phaseinfo_hw_shifted = 0;
+  for (uint32_t widx = 0; ; ++widx) {
+    if (widx >= sample_ctl2_m1) {
+      if (widx > sample_ctl2_m1) {
+        if (sample_ct % 2) {
+          uintptr_t cur_idx = (geno_word & 3);
+          // assume trailing bits of phasepresent/phaseinfo clear
+          // phaseinfo_hw_shifted not necessarily updated, so need if-statement
+          // bugfix (25 Jun 2018): must only consider active bit of
+          // phasepresent_hw_shifted, not the already-processed ones
+          if (phasepresent_hw_shifted & 16) {
+            cur_idx ^= 16 | (phaseinfo_hw_shifted & 2);
+          }
+          memcpy(result_biter, &(table_alias[cur_idx]), 4);
+        }
+        return;
+      }
+      loop_len = ModNz(sample_ct, kBitsPerWordD2) / 2;
+    }
+    geno_word = genoarr[widx];
+    phasepresent_hw_shifted = phasepresent_alias[widx];
+    if (!phasepresent_hw_shifted) {
+      for (uint32_t uii = 0; uii != loop_len; ++uii) {
+        AppendU64(table_alias[geno_word & 15], &result_biter);
+        geno_word >>= 4;
+      }
+    } else {
+      phasepresent_hw_shifted = phasepresent_hw_shifted << 4;
+      phaseinfo_hw_shifted = phaseinfo_alias[widx];
+
+      // note that this must be on a separate line (or we have to static_cast)
+      phaseinfo_hw_shifted = phaseinfo_hw_shifted << 1;
+
+      for (uint32_t uii = 0; uii != loop_len; ++uii) {
+        const uintptr_t cur_idx = ((geno_word & 15) | (phasepresent_hw_shifted & 48)) ^ (phaseinfo_hw_shifted & 6);
+        AppendU64(table_alias[cur_idx], &result_biter);
+        geno_word >>= 4;
+        phasepresent_hw_shifted >>= 2;
+        phaseinfo_hw_shifted >>= 2;
+      }
+    }
+  }
+}
+
+void InitPhaseLookup4b(void* table56x4bx2) {
+  uint32_t* table_iter = S_CAST(uint32_t*, table56x4bx2);
+  uint32_t vals[4];
+  vals[0] = table_iter[0];
+  table_iter[1] = vals[0];
+  vals[1] = table_iter[2];
+  table_iter[3] = vals[0];
+  vals[2] = table_iter[4];
+  table_iter[5] = vals[0];
+  vals[3] = table_iter[6];
+  table_iter[7] = vals[0];
+  table_iter = &(table_iter[8]);
+  for (uint32_t high_idx = 1; high_idx != 4; ++high_idx) {
+    const uint32_t cur_high = vals[high_idx];
+    for (uint32_t low_idx = 0; low_idx != 4; ++low_idx) {
+      *table_iter++ = vals[low_idx];
+      *table_iter++ = cur_high;
+    }
+  }
+  // [16][0]..[31][1]: bit 4 is set
+  // low bits must be 01 or 11
+  const uint32_t val_phaseinfo0 = table_iter[2];
+  table_iter[3] = vals[0];
+  const uint32_t val_phaseinfo1 = table_iter[6];
+  table_iter[7] = vals[0];
+  table_iter = &(table_iter[8]);
+  for (uint32_t high_idx = 1; high_idx != 4; ++high_idx) {
+    const uint32_t cur_high = vals[high_idx];
+    table_iter[2] = val_phaseinfo0;
+    table_iter[3] = cur_high;
+    table_iter[6] = val_phaseinfo1;
+    table_iter[7] = cur_high;
+    table_iter = &(table_iter[8]);
+  }
+  // [32][0]..[39][1]: bit 5 set, bit 4 unset
+  // high bits must be 00 or 01
+  for (uint32_t high_idx = 0; high_idx != 2; ++high_idx) {
+    const uint32_t cur_high = high_idx? val_phaseinfo0 : val_phaseinfo1;
+    for (uint32_t low_idx = 0; low_idx != 4; ++low_idx) {
+      *table_iter++ = vals[low_idx];
+      *table_iter++ = cur_high;
+    }
+  }
+  table_iter = &(table_iter[16]);
+  // [48][0]..[55][1]: bits 4 and 5 set
+  for (uint32_t high_idx = 0; high_idx != 2; ++high_idx) {
+    const uint32_t cur_high = high_idx? val_phaseinfo0 : val_phaseinfo1;
+    table_iter[2] = val_phaseinfo0;
+    table_iter[3] = cur_high;
+    table_iter[6] = val_phaseinfo1;
+    table_iter[7] = cur_high;
+    table_iter = &(table_iter[8]);
+  }
+}
+
+#ifdef USE_SSE2
+void PhaseLookup8b(const uintptr_t* genoarr, const uintptr_t* phasepresent, const uintptr_t* phaseinfo, const void* table56x8bx2, uint32_t sample_ct, void* __restrict result) {
+  const __m128i* table_alias = S_CAST(const __m128i*, table56x8bx2);
+  const uint32_t sample_ctl2_m1 = (sample_ct - 1) / kBitsPerWordD2;
+  const Halfword* phasepresent_alias = DowncastKWToHW(phasepresent);
+  const Halfword* phaseinfo_alias = DowncastKWToHW(phaseinfo);
+  unsigned char* result_biter = S_CAST(unsigned char*, result);
+  uint32_t loop_len = kBitsPerWordD4;
+  uintptr_t geno_word = 0;
+  uintptr_t phasepresent_hw_shifted = 0;
+  uintptr_t phaseinfo_hw_shifted = 0;
+  for (uint32_t widx = 0; ; ++widx) {
+    if (widx >= sample_ctl2_m1) {
+      if (widx > sample_ctl2_m1) {
+        if (sample_ct % 2) {
+          uintptr_t cur_idx = (geno_word & 3);
+          if (phasepresent_hw_shifted & 16) {
+            cur_idx ^= 16 | (phaseinfo_hw_shifted & 2);
+          }
+          memcpy(result_biter, &(table_alias[cur_idx]), 8);
+        }
+        return;
+      }
+      loop_len = ModNz(sample_ct, kBitsPerWordD2) / 2;
+    }
+    geno_word = genoarr[widx];
+    phasepresent_hw_shifted = phasepresent_alias[widx];
+    if (!phasepresent_hw_shifted) {
+      for (uint32_t uii = 0; uii != loop_len; ++uii) {
+        _mm_storeu_si128(R_CAST(__m128i*, result_biter), table_alias[geno_word & 15]);
+        result_biter += 16;
+        geno_word >>= 4;
+      }
+    } else {
+      phasepresent_hw_shifted = phasepresent_hw_shifted << 4;
+      phaseinfo_hw_shifted = phaseinfo_alias[widx];
+      phaseinfo_hw_shifted = phaseinfo_hw_shifted << 1;
+      for (uint32_t uii = 0; uii != loop_len; ++uii) {
+        const uintptr_t cur_idx = ((geno_word & 15) | (phasepresent_hw_shifted & 48)) ^ (phaseinfo_hw_shifted & 6);
+        _mm_storeu_si128(R_CAST(__m128i*, result_biter), table_alias[cur_idx]);
+        result_biter += 16;
+        geno_word >>= 4;
+        phasepresent_hw_shifted >>= 2;
+        phaseinfo_hw_shifted >>= 2;
+      }
+    }
+  }
+}
+#else // !USE_SSE2
+void PhaseLookup8b(const uintptr_t* genoarr, const uintptr_t* phasepresent, const uintptr_t* phaseinfo, const void* table56x8bx2, uint32_t sample_ct, void* __restrict result) {
+  const uint64_t* table_alias = S_CAST(const uint64_t*, table56x8bx2);
+  const uint32_t sample_ctl2_m1 = (sample_ct - 1) / kBitsPerWordD2;
+  const Halfword* phasepresent_alias = DowncastKWToHW(phasepresent);
+  const Halfword* phaseinfo_alias = DowncastKWToHW(phaseinfo);
+  unsigned char* result_biter = S_CAST(unsigned char*, result);
+  uint32_t loop_len = kBitsPerWordD4;
+  uintptr_t geno_word = 0;
+  uintptr_t phasepresent_hw_shifted = 0;
+  uintptr_t phaseinfo_hw_shifted = 0;
+  for (uint32_t widx = 0; ; ++widx) {
+    if (widx >= sample_ctl2_m1) {
+      if (widx > sample_ctl2_m1) {
+        if (sample_ct % 2) {
+          uintptr_t cur_idx = (geno_word & 3);
+          if (phasepresent_hw_shifted & 16) {
+            cur_idx ^= 16 | (phaseinfo_hw_shifted & 2);
+          }
+          CopyToUnalignedU64(result_biter, &(table_alias[cur_idx * 2]));
+        }
+        return;
+      }
+      loop_len = ModNz(sample_ct, kBitsPerWordD2) / 2;
+    }
+    geno_word = genoarr[widx];
+    phasepresent_hw_shifted = phasepresent_alias[widx];
+    if (!phasepresent_hw_shifted) {
+      for (uint32_t uii = 0; uii != loop_len; ++uii) {
+        memcpy(result_biter, &(table_alias[(geno_word & 15) * 2]), 16);
+        result_biter = &(result_biter[16]);
+        geno_word >>= 4;
+      }
+    } else {
+      phasepresent_hw_shifted = phasepresent_hw_shifted << 4;
+      phaseinfo_hw_shifted = phaseinfo_alias[widx];
+      phaseinfo_hw_shifted = phaseinfo_hw_shifted << 1;
+      for (uint32_t uii = 0; uii != loop_len; ++uii) {
+        const uintptr_t cur_idx = ((geno_word & 15) | (phasepresent_hw_shifted & 48)) ^ (phaseinfo_hw_shifted & 6);
+        memcpy(result_biter, &(table_alias[cur_idx * 2]), 16);
+        // bugfix (12 Jun 2023): forgot this
+        result_biter = &(result_biter[16]);
+
+        geno_word >>= 4;
+        phasepresent_hw_shifted >>= 2;
+        phaseinfo_hw_shifted >>= 2;
+      }
+    }
+  }
+}
+#endif
+
+void InitPhaseLookup8b(void* table56x8bx2) {
+  uint64_t* table_iter = S_CAST(uint64_t*, table56x8bx2);
+  uint64_t vals[4];
+  vals[0] = table_iter[0];
+  table_iter[1] = vals[0];
+  vals[1] = table_iter[2];
+  table_iter[3] = vals[0];
+  vals[2] = table_iter[4];
+  table_iter[5] = vals[0];
+  vals[3] = table_iter[6];
+  table_iter[7] = vals[0];
+  table_iter = &(table_iter[8]);
+  for (uint32_t high_idx = 1; high_idx != 4; ++high_idx) {
+    const uint64_t cur_high = vals[high_idx];
+    for (uint32_t low_idx = 0; low_idx != 4; ++low_idx) {
+      *table_iter++ = vals[low_idx];
+      *table_iter++ = cur_high;
+    }
+  }
+  // [16][0]..[31][1]: bit 4 is set
+  // low bits must be 01 or 11
+  const uint64_t val_phaseinfo0 = table_iter[2];
+  table_iter[3] = vals[0];
+  const uint64_t val_phaseinfo1 = table_iter[6];
+  table_iter[7] = vals[0];
+  table_iter = &(table_iter[8]);
+  for (uint32_t high_idx = 1; high_idx != 4; ++high_idx) {
+    const uint64_t cur_high = vals[high_idx];
+    table_iter[2] = val_phaseinfo0;
+    table_iter[3] = cur_high;
+    table_iter[6] = val_phaseinfo1;
+    table_iter[7] = cur_high;
+    table_iter = &(table_iter[8]);
+  }
+  // [32][0]..[39][1]: bit 5 set, bit 4 unset
+  // high bits must be 00 or 01
+  for (uint32_t high_idx = 0; high_idx != 2; ++high_idx) {
+    const uint64_t cur_high = high_idx? val_phaseinfo0 : val_phaseinfo1;
+    for (uint32_t low_idx = 0; low_idx != 4; ++low_idx) {
+      *table_iter++ = vals[low_idx];
+      *table_iter++ = cur_high;
+    }
+  }
+  table_iter = &(table_iter[16]);
+  // [48][0]..[55][1]: bits 4 and 5 set
+  for (uint32_t high_idx = 0; high_idx != 2; ++high_idx) {
+    const uint64_t cur_high = high_idx? val_phaseinfo0 : val_phaseinfo1;
+    table_iter[2] = val_phaseinfo0;
+    table_iter[3] = cur_high;
+    table_iter[6] = val_phaseinfo1;
+    table_iter[7] = cur_high;
+    table_iter = &(table_iter[8]);
+  }
+}
+
+// bits 0..3: two genotypes
+// bits 4..5: two (phasepresent | sex_male) bits
+// bits 1,3: unpacked phaseinfo xor
+void PhaseXNohhLookup4b(const uintptr_t* genoarr, const uintptr_t* phasepresent, const uintptr_t* phaseinfo, const uintptr_t* sex_male, const void* table64x4bx2, uint32_t sample_ct, void* result) {
+  const uint64_t* table_alias = S_CAST(const uint64_t*, table64x4bx2);
+  const uint32_t sample_ctl2_m1 = (sample_ct - 1) / kBitsPerWordD2;
+  const Halfword* phasepresent_alias = DowncastKWToHW(phasepresent);
+  const Halfword* phaseinfo_alias = DowncastKWToHW(phaseinfo);
+  const Halfword* sex_male_alias = DowncastKWToHW(sex_male);
+  unsigned char* result_biter = S_CAST(unsigned char*, result);
+  uint32_t loop_len = kBitsPerWordD4;
+  uintptr_t geno_word_xored = 0;
+  uintptr_t male_or_phasepresent_hw_shifted = 0;
+  for (uint32_t widx = 0; ; ++widx) {
+    if (widx >= sample_ctl2_m1) {
+      if (widx > sample_ctl2_m1) {
+        if (sample_ct % 2) {
+          uintptr_t cur_idx = (geno_word_xored & 3) | (male_or_phasepresent_hw_shifted & 16);
+          memcpy(result_biter, &(table_alias[cur_idx]), 4);
+        }
+        return;
+      }
+      loop_len = ModNz(sample_ct, kBitsPerWordD2) / 2;
+    }
+    geno_word_xored = genoarr[widx];
+    male_or_phasepresent_hw_shifted = sex_male_alias[widx];
+    const uintptr_t phasepresent_hw = phasepresent_alias[widx];
+    male_or_phasepresent_hw_shifted |= phasepresent_hw;
+    male_or_phasepresent_hw_shifted <<= 4;
+    if (!phasepresent_hw) {
+      for (uint32_t uii = 0; uii != loop_len; ++uii) {
+        AppendU64(table_alias[(geno_word_xored & 15) | (male_or_phasepresent_hw_shifted & 48)], &result_biter);
+        geno_word_xored >>= 4;
+        male_or_phasepresent_hw_shifted >>= 2;
+      }
+    } else {
+      geno_word_xored ^= UnpackHalfwordToWordShift1(phaseinfo_alias[widx]);
+      for (uint32_t uii = 0; uii != loop_len; ++uii) {
+        const uintptr_t cur_idx = (geno_word_xored & 15) | (male_or_phasepresent_hw_shifted & 48);
+        AppendU64(table_alias[cur_idx], &result_biter);
+        geno_word_xored >>= 4;
+        male_or_phasepresent_hw_shifted >>= 2;
+      }
+    }
+  }
+}
+
+void InitPhaseXNohhLookup4b(void* table64x4bx2) {
+  uint32_t* table_iter = S_CAST(uint32_t*, table64x4bx2);
+  uint32_t vals[4];
+  vals[0] = table_iter[0];
+  table_iter[1] = vals[0];
+  vals[1] = table_iter[2];
+  table_iter[3] = vals[0];
+  vals[2] = table_iter[4];
+  table_iter[5] = vals[0];
+  vals[3] = table_iter[6];
+  table_iter[7] = vals[0];
+  table_iter = &(table_iter[8]);
+  for (uint32_t high_idx = 1; high_idx != 4; ++high_idx) {
+    const uint32_t cur_high = vals[high_idx];
+    for (uint32_t low_idx = 0; low_idx != 4; ++low_idx) {
+      *table_iter++ = vals[low_idx];
+      *table_iter++ = cur_high;
+    }
+  }
+  // [16][0]..[31][1]: bit 4 is set
+  uint32_t male_or_phasepresent_vals[4];
+  for (uint32_t low_idx = 0; low_idx != 4; ++low_idx) {
+    male_or_phasepresent_vals[low_idx] = *table_iter++;
+    *table_iter++ = vals[0];
+  }
+  for (uint32_t high_idx = 1; high_idx != 4; ++high_idx) {
+    const uint32_t cur_high = vals[high_idx];
+    for (uint32_t low_idx = 0; low_idx != 4; ++low_idx) {
+      *table_iter++ = male_or_phasepresent_vals[low_idx];
+      *table_iter++ = cur_high;
+    }
+  }
+  // [32][0]..[47][1]: bit 5 set, bit 4 unset
+  for (uint32_t high_idx = 0; high_idx != 4; ++high_idx) {
+    const uint32_t cur_high = male_or_phasepresent_vals[high_idx];
+    for (uint32_t low_idx = 0; low_idx != 4; ++low_idx) {
+      *table_iter++ = vals[low_idx];
+      *table_iter++ = cur_high;
+    }
+  }
+  // [48][0]..[63][1]: bits 4 and 5 set
+  for (uint32_t high_idx = 0; high_idx != 4; ++high_idx) {
+    const uint32_t cur_high = male_or_phasepresent_vals[high_idx];
+    for (uint32_t low_idx = 0; low_idx != 4; ++low_idx) {
+      *table_iter++ = male_or_phasepresent_vals[low_idx];
+      *table_iter++ = cur_high;
+    }
+  }
+}
+
+void GenoarrSexLookup4b(const uintptr_t* genoarr, const uintptr_t* sex_male, const void* table64x4bx2, uint32_t sample_ct, void* result) {
+  const uint64_t* table_alias = S_CAST(const uint64_t*, table64x4bx2);
+  const uint32_t sample_ctl2_m1 = (sample_ct - 1) / kBitsPerWordD2;
+  const Halfword* sex_male_alias = DowncastKWToHW(sex_male);
+  unsigned char* result_biter = S_CAST(unsigned char*, result);
+  uint32_t loop_len = kBitsPerWordD4;
+  uintptr_t geno_word = 0;
+  uintptr_t male_hw_shifted = 0;
+  for (uint32_t widx = 0; ; ++widx) {
+    if (widx >= sample_ctl2_m1) {
+      if (widx > sample_ctl2_m1) {
+        if (sample_ct % 2) {
+          uintptr_t cur_idx = (geno_word & 3) | (male_hw_shifted & 16);
+          memcpy(result_biter, &(table_alias[cur_idx]), 4);
+        }
+        return;
+      }
+      loop_len = ModNz(sample_ct, kBitsPerWordD2) / 2;
+    }
+    geno_word = genoarr[widx];
+    male_hw_shifted = sex_male_alias[widx];
+    male_hw_shifted <<= 4;
+    for (uint32_t uii = 0; uii != loop_len; ++uii) {
+      AppendU64(table_alias[(geno_word & 15) | (male_hw_shifted & 48)], &result_biter);
+      geno_word >>= 4;
+      male_hw_shifted >>= 2;
+    }
+  }
+}
+
+void InitPhaseXNohhLookup8b(void* table64x8bx2) {
+  uint64_t* table_iter = S_CAST(uint64_t*, table64x8bx2);
+  uint64_t vals[4];
+  vals[0] = table_iter[0];
+  table_iter[1] = vals[0];
+  vals[1] = table_iter[2];
+  table_iter[3] = vals[0];
+  vals[2] = table_iter[4];
+  table_iter[5] = vals[0];
+  vals[3] = table_iter[6];
+  table_iter[7] = vals[0];
+  table_iter = &(table_iter[8]);
+  for (uint32_t high_idx = 1; high_idx != 4; ++high_idx) {
+    const uint64_t cur_high = vals[high_idx];
+    for (uint32_t low_idx = 0; low_idx != 4; ++low_idx) {
+      *table_iter++ = vals[low_idx];
+      *table_iter++ = cur_high;
+    }
+  }
+  // [16][0]..[31][1]: bit 4 is set
+  uint64_t male_or_phasepresent_vals[4];
+  for (uint32_t low_idx = 0; low_idx != 4; ++low_idx) {
+    male_or_phasepresent_vals[low_idx] = *table_iter++;
+    *table_iter++ = vals[0];
+  }
+  for (uint32_t high_idx = 1; high_idx != 4; ++high_idx) {
+    const uint64_t cur_high = vals[high_idx];
+    for (uint32_t low_idx = 0; low_idx != 4; ++low_idx) {
+      *table_iter++ = male_or_phasepresent_vals[low_idx];
+      *table_iter++ = cur_high;
+    }
+  }
+  // [32][0]..[47][1]: bit 5 set, bit 4 unset
+  for (uint32_t high_idx = 0; high_idx != 4; ++high_idx) {
+    const uint64_t cur_high = male_or_phasepresent_vals[high_idx];
+    for (uint32_t low_idx = 0; low_idx != 4; ++low_idx) {
+      *table_iter++ = vals[low_idx];
+      *table_iter++ = cur_high;
+    }
+  }
+  // [48][0]..[63][1]: bits 4 and 5 set
+  for (uint32_t high_idx = 0; high_idx != 4; ++high_idx) {
+    const uint64_t cur_high = male_or_phasepresent_vals[high_idx];
+    for (uint32_t low_idx = 0; low_idx != 4; ++low_idx) {
+      *table_iter++ = male_or_phasepresent_vals[low_idx];
+      *table_iter++ = cur_high;
+    }
+  }
+}
+
+#ifdef USE_SSE2
+void GenoarrSexLookup8b(const uintptr_t* genoarr, const uintptr_t* sex_male, const void* table64x8bx2, uint32_t sample_ct, void* result) {
+  const __m128i* table_alias = S_CAST(const __m128i*, table64x8bx2);
+  const uint32_t sample_ctl2_m1 = (sample_ct - 1) / kBitsPerWordD2;
+  const Halfword* sex_male_alias = DowncastKWToHW(sex_male);
+  unsigned char* result_biter = S_CAST(unsigned char*, result);
+  uint32_t loop_len = kBitsPerWordD4;
+  uintptr_t geno_word = 0;
+  uintptr_t male_hw_shifted = 0;
+  for (uint32_t widx = 0; ; ++widx) {
+    if (widx >= sample_ctl2_m1) {
+      if (widx > sample_ctl2_m1) {
+        if (sample_ct % 2) {
+          uintptr_t cur_idx = (geno_word & 3) | (male_hw_shifted & 16);
+          memcpy(result_biter, &(table_alias[cur_idx]), 8);
+        }
+        return;
+      }
+      loop_len = ModNz(sample_ct, kBitsPerWordD2) / 2;
+    }
+    geno_word = genoarr[widx];
+    male_hw_shifted = sex_male_alias[widx];
+    male_hw_shifted <<= 4;
+    for (uint32_t uii = 0; uii != loop_len; ++uii) {
+      _mm_storeu_si128(R_CAST(__m128i*, result_biter), table_alias[(geno_word & 15) | (male_hw_shifted & 48)]);
+      result_biter += 16;
+      geno_word >>= 4;
+      male_hw_shifted >>= 2;
+    }
+  }
+}
+#else // !USE_SSE2
+void GenoarrSexLookup8b(const uintptr_t* genoarr, const uintptr_t* sex_male, const void* table64x8bx2, uint32_t sample_ct, void* result) {
+  const uint64_t* table_alias = S_CAST(const uint64_t*, table64x8bx2);
+  const uint32_t sample_ctl2_m1 = (sample_ct - 1) / kBitsPerWordD2;
+  const Halfword* sex_male_alias = DowncastKWToHW(sex_male);
+  unsigned char* result_biter = S_CAST(unsigned char*, result);
+  uint32_t loop_len = kBitsPerWordD4;
+  uintptr_t geno_word = 0;
+  uintptr_t male_hw_shifted = 0;
+  for (uint32_t widx = 0; ; ++widx) {
+    if (widx >= sample_ctl2_m1) {
+      if (widx > sample_ctl2_m1) {
+        if (sample_ct % 2) {
+          const uintptr_t cur_idx = (geno_word & 3) | (male_hw_shifted & 16);
+          memcpy(result_biter, &(table_alias[cur_idx * 2]), 8);
+        }
+        return;
+      }
+      loop_len = ModNz(sample_ct, kBitsPerWordD2) / 2;
+    }
+    geno_word = genoarr[widx];
+    male_hw_shifted = sex_male_alias[widx];
+    male_hw_shifted <<= 4;
+    for (uint32_t uii = 0; uii != loop_len; ++uii) {
+      memcpy(result_biter, &(table_alias[((geno_word & 15) | (male_hw_shifted & 48)) * 2]), 16);
+      result_biter = &(result_biter[16]);
+      geno_word >>= 4;
+      male_hw_shifted >>= 2;
+    }
+  }
+}
+#endif
+
+void VcfPhaseLookup4b(const uintptr_t* genoarr, const uintptr_t* cur_phased, const uintptr_t* phaseinfo, const void* table246x4bx2, uint32_t sample_ct, void* __restrict result) {
+  const uint64_t* table_alias = S_CAST(const uint64_t*, table246x4bx2);
+  const uint32_t sample_ctl2_m1 = (sample_ct - 1) / kBitsPerWordD2;
+  const Halfword* cur_phased_alias = DowncastKWToHW(cur_phased);
+  const Halfword* phaseinfo_alias = DowncastKWToHW(phaseinfo);
+  unsigned char* result_biter = S_CAST(unsigned char*, result);
+  uint32_t loop_len = kBitsPerWordD4;
+  uintptr_t geno_word = 0;
+  uintptr_t cur_phased_hw_shifted = 0;
+  uintptr_t phaseinfo_hw_shifted = 0;
+  for (uint32_t widx = 0; ; ++widx) {
+    if (widx >= sample_ctl2_m1) {
+      if (widx > sample_ctl2_m1) {
+        if (sample_ct % 2) {
+          uintptr_t cur_idx = (geno_word & 3) | (cur_phased_hw_shifted & 16) | (phaseinfo_hw_shifted & 64);
+          memcpy(result_biter, &(table_alias[cur_idx]), 4);
+        }
+        return;
+      }
+      loop_len = ModNz(sample_ct, kBitsPerWordD2) / 2;
+    }
+    geno_word = genoarr[widx];
+    cur_phased_hw_shifted = cur_phased_alias[widx];
+    if (!cur_phased_hw_shifted) {
+      for (uint32_t uii = 0; uii != loop_len; ++uii) {
+        AppendU64(table_alias[geno_word & 15], &result_biter);
+        geno_word >>= 4;
+      }
+    } else {
+      cur_phased_hw_shifted = cur_phased_hw_shifted << 4;
+      phaseinfo_hw_shifted = phaseinfo_alias[widx];
+
+      // note that this must be on a separate line (or we have to static_cast)
+      phaseinfo_hw_shifted = phaseinfo_hw_shifted << 6;
+
+      for (uint32_t uii = 0; uii != loop_len; ++uii) {
+        const uintptr_t cur_idx = (geno_word & 15) | (cur_phased_hw_shifted & 48) | (phaseinfo_hw_shifted & 192);
+        AppendU64(table_alias[cur_idx], &result_biter);
+        geno_word >>= 4;
+        cur_phased_hw_shifted >>= 2;
+        phaseinfo_hw_shifted >>= 2;
+      }
+    }
+  }
+}
+
+void InitVcfPhaseLookup4b(void* table246x4bx2) {
+  uint32_t* table_iter = S_CAST(uint32_t*, table246x4bx2);
+  uint32_t unphased_vals[4];
+  unphased_vals[0] = table_iter[0];
+  table_iter[1] = unphased_vals[0];
+  unphased_vals[1] = table_iter[2];
+  table_iter[3] = unphased_vals[0];
+  unphased_vals[2] = table_iter[4];
+  table_iter[5] = unphased_vals[0];
+  unphased_vals[3] = table_iter[6];
+  table_iter[7] = unphased_vals[0];
+  table_iter = &(table_iter[8]);
+  for (uint32_t high_idx = 1; high_idx != 4; ++high_idx) {
+    const uint32_t cur_high = unphased_vals[high_idx];
+    for (uint32_t low_idx = 0; low_idx != 4; ++low_idx) {
+      *table_iter++ = unphased_vals[low_idx];
+      *table_iter++ = cur_high;
+    }
+  }
+  // [16][0]..[31][1]: first entry is phased and unflipped, second is unphased
+  uint32_t phased_unflipped_vals[4];
+  phased_unflipped_vals[0] = table_iter[0];
+  table_iter[1] = unphased_vals[0];
+  phased_unflipped_vals[1] = table_iter[2];
+  table_iter[3] = unphased_vals[0];
+  phased_unflipped_vals[2] = table_iter[4];
+  table_iter[5] = unphased_vals[0];
+  phased_unflipped_vals[3] = table_iter[6];
+  table_iter[7] = unphased_vals[0];
+  table_iter = &(table_iter[8]);
+  for (uint32_t high_idx = 1; high_idx != 4; ++high_idx) {
+    const uint32_t cur_high = unphased_vals[high_idx];
+    for (uint32_t low_idx = 0; low_idx != 4; ++low_idx) {
+      *table_iter++ = phased_unflipped_vals[low_idx];
+      *table_iter++ = cur_high;
+    }
+  }
+  // [32][0]..[63][1]: second entry is phased and unflipped
+  for (uint32_t high_idx = 0; high_idx != 4; ++high_idx) {
+    const uint32_t cur_high = phased_unflipped_vals[high_idx];
+    for (uint32_t low_idx = 0; low_idx != 4; ++low_idx) {
+      *table_iter++ = unphased_vals[low_idx];
+      *table_iter++ = cur_high;
+    }
+  }
+  for (uint32_t high_idx = 0; high_idx != 4; ++high_idx) {
+    const uint32_t cur_high = phased_unflipped_vals[high_idx];
+    for (uint32_t low_idx = 0; low_idx != 4; ++low_idx) {
+      *table_iter++ = phased_unflipped_vals[low_idx];
+      *table_iter++ = cur_high;
+    }
+  }
+  // [64][0]..[79][1] should be impossible
+  table_iter = &(table_iter[32]);
+  // [80][0]..[95][1]: first entry is phased and flipped, second is unphased
+  // genotype must be 01
+  const uint32_t phased_flipped_01 = table_iter[2];
+  for (uint32_t high_idx = 0; high_idx != 4; ++high_idx) {
+    table_iter[2] = phased_flipped_01;
+    table_iter[3] = unphased_vals[high_idx];
+    table_iter = &(table_iter[8]);
+  }
+  // [96][0]..[111][1] should be impossible
+  table_iter = &(table_iter[32]);
+  // [112][0]..[127][1]: first entry phased-flipped, second phased-unflipped
+  for (uint32_t high_idx = 0; high_idx != 4; ++high_idx) {
+    table_iter[2] = phased_flipped_01;
+    table_iter[3] = phased_unflipped_vals[high_idx];
+    table_iter = &(table_iter[8]);
+  }
+  // [128][0]..[163][1] should be impossible
+  table_iter = &(table_iter[72]);
+  // [164][0]..[167][1]: second entry phased-flipped, first entry unphased
+  for (uint32_t low_idx = 0; low_idx != 4; ++low_idx) {
+    *table_iter++ = unphased_vals[low_idx];
+    *table_iter++ = phased_flipped_01;
+  }
+  // [168][0]..[179][1] should be impossible
+  table_iter = &(table_iter[24]);
+  // [180][0]..[183][1]: second entry phased-flipped, first phased-unflipped
+  for (uint32_t low_idx = 0; low_idx != 4; ++low_idx) {
+    *table_iter++ = phased_unflipped_vals[low_idx];
+    *table_iter++ = phased_flipped_01;
+  }
+  // [184][0]..[244][1] should be impossible
+  // [245][0]..[245][1]: both phased-flipped
+  table_iter[122] = phased_flipped_01;
+  table_iter[123] = phased_flipped_01;
+}
+
+void VcfPhaseLookup2b(const uintptr_t* genoarr, const uintptr_t* cur_phased, const uintptr_t* phaseinfo, const void* table246x2bx2, uint32_t sample_ct, void* __restrict result) {
+  const uint32_t* table_alias = S_CAST(const uint32_t*, table246x2bx2);
+  const uint32_t sample_ctl2_m1 = (sample_ct - 1) / kBitsPerWordD2;
+  const Halfword* cur_phased_alias = DowncastKWToHW(cur_phased);
+  const Halfword* phaseinfo_alias = DowncastKWToHW(phaseinfo);
+  unsigned char* result_biter = S_CAST(unsigned char*, result);
+  uint32_t loop_len = kBitsPerWordD4;
+  uintptr_t geno_word = 0;
+  uintptr_t cur_phased_hw_shifted = 0;
+  uintptr_t phaseinfo_hw_shifted = 0;
+  for (uint32_t widx = 0; ; ++widx) {
+    if (widx >= sample_ctl2_m1) {
+      if (widx > sample_ctl2_m1) {
+        if (sample_ct % 2) {
+          uintptr_t cur_idx = (geno_word & 3) | (cur_phased_hw_shifted & 16) | (phaseinfo_hw_shifted & 64);
+          memcpy(result_biter, &(table_alias[cur_idx]), 2);
+        }
+        return;
+      }
+      loop_len = ModNz(sample_ct, kBitsPerWordD2) / 2;
+    }
+    geno_word = genoarr[widx];
+    cur_phased_hw_shifted = cur_phased_alias[widx];
+    if (!cur_phased_hw_shifted) {
+      for (uint32_t uii = 0; uii != loop_len; ++uii) {
+        AppendU32(table_alias[geno_word & 15], &result_biter);
+        geno_word >>= 4;
+      }
+    } else {
+      cur_phased_hw_shifted = cur_phased_hw_shifted << 4;
+      phaseinfo_hw_shifted = phaseinfo_alias[widx];
+
+      // note that this must be on a separate line (or we have to static_cast)
+      phaseinfo_hw_shifted = phaseinfo_hw_shifted << 6;
+
+      for (uint32_t uii = 0; uii != loop_len; ++uii) {
+        const uintptr_t cur_idx = (geno_word & 15) | (cur_phased_hw_shifted & 48) | (phaseinfo_hw_shifted & 192);
+        AppendU32(table_alias[cur_idx], &result_biter);
+        geno_word >>= 4;
+        cur_phased_hw_shifted >>= 2;
+        phaseinfo_hw_shifted >>= 2;
+      }
+    }
+  }
+}
+
+void InitVcfPhaseLookup2b(void* table246x2bx2) {
+  uint16_t* table_iter = S_CAST(uint16_t*, table246x2bx2);
+  uint16_t unphased_vals[4];
+  unphased_vals[0] = table_iter[0];
+  table_iter[1] = unphased_vals[0];
+  unphased_vals[1] = table_iter[2];
+  table_iter[3] = unphased_vals[0];
+  unphased_vals[2] = table_iter[4];
+  table_iter[5] = unphased_vals[0];
+  unphased_vals[3] = table_iter[6];
+  table_iter[7] = unphased_vals[0];
+  table_iter = &(table_iter[8]);
+  for (uint32_t high_idx = 1; high_idx != 4; ++high_idx) {
+    const uint32_t cur_high = unphased_vals[high_idx];
+    for (uint32_t low_idx = 0; low_idx != 4; ++low_idx) {
+      *table_iter++ = unphased_vals[low_idx];
+      *table_iter++ = cur_high;
+    }
+  }
+  // [16][0]..[31][1]: first entry is phased and unflipped, second is unphased
+  uint16_t phased_unflipped_vals[4];
+  phased_unflipped_vals[0] = table_iter[0];
+  table_iter[1] = unphased_vals[0];
+  phased_unflipped_vals[1] = table_iter[2];
+  table_iter[3] = unphased_vals[0];
+  phased_unflipped_vals[2] = table_iter[4];
+  table_iter[5] = unphased_vals[0];
+  phased_unflipped_vals[3] = table_iter[6];
+  table_iter[7] = unphased_vals[0];
+  table_iter = &(table_iter[8]);
+  for (uint32_t high_idx = 1; high_idx != 4; ++high_idx) {
+    const uint32_t cur_high = unphased_vals[high_idx];
+    for (uint32_t low_idx = 0; low_idx != 4; ++low_idx) {
+      *table_iter++ = phased_unflipped_vals[low_idx];
+      *table_iter++ = cur_high;
+    }
+  }
+  // [32][0]..[63][1]: second entry is phased and unflipped
+  for (uint32_t high_idx = 0; high_idx != 4; ++high_idx) {
+    const uint32_t cur_high = phased_unflipped_vals[high_idx];
+    for (uint32_t low_idx = 0; low_idx != 4; ++low_idx) {
+      *table_iter++ = unphased_vals[low_idx];
+      *table_iter++ = cur_high;
+    }
+  }
+  for (uint32_t high_idx = 0; high_idx != 4; ++high_idx) {
+    const uint32_t cur_high = phased_unflipped_vals[high_idx];
+    for (uint32_t low_idx = 0; low_idx != 4; ++low_idx) {
+      *table_iter++ = phased_unflipped_vals[low_idx];
+      *table_iter++ = cur_high;
+    }
+  }
+  // [64][0]..[79][1] should be impossible
+  table_iter = &(table_iter[32]);
+  // [80][0]..[95][1]: first entry is phased and flipped, second is unphased
+  // genotype must be 01
+  const uint32_t phased_flipped_01 = table_iter[2];
+  for (uint32_t high_idx = 0; high_idx != 4; ++high_idx) {
+    table_iter[2] = phased_flipped_01;
+    table_iter[3] = unphased_vals[high_idx];
+    table_iter = &(table_iter[8]);
+  }
+  // [96][0]..[111][1] should be impossible
+  table_iter = &(table_iter[32]);
+  // [112][0]..[127][1]: first entry phased-flipped, second phased-unflipped
+  for (uint32_t high_idx = 0; high_idx != 4; ++high_idx) {
+    table_iter[2] = phased_flipped_01;
+    table_iter[3] = phased_unflipped_vals[high_idx];
+    table_iter = &(table_iter[8]);
+  }
+  // [128][0]..[163][1] should be impossible
+  table_iter = &(table_iter[72]);
+  // [164][0]..[167][1]: second entry phased-flipped, first entry unphased
+  for (uint32_t low_idx = 0; low_idx != 4; ++low_idx) {
+    *table_iter++ = unphased_vals[low_idx];
+    *table_iter++ = phased_flipped_01;
+  }
+  // [168][0]..[179][1] should be impossible
+  table_iter = &(table_iter[24]);
+  // [180][0]..[183][1]: second entry phased-flipped, first phased-unflipped
+  for (uint32_t low_idx = 0; low_idx != 4; ++low_idx) {
+    *table_iter++ = phased_unflipped_vals[low_idx];
+    *table_iter++ = phased_flipped_01;
+  }
+  // [184][0]..[244][1] should be impossible
+  // [245][0]..[245][1]: both phased-flipped
+  table_iter[122] = phased_flipped_01;
+  table_iter[123] = phased_flipped_01;
+}
+
+
+void ClearGenoarrMissing1bit8Unsafe(const uintptr_t* __restrict genoarr, uint32_t* subset_sizep, uintptr_t* __restrict subset, void* __restrict sparse_vals) {
+  const uint32_t orig_subset_size = *subset_sizep;
+  Halfword* subset_alias = DowncastWToHW(subset);
+  uint32_t read_idx = 0;
+  // deliberate overflow
+  for (uint32_t read_widx = UINT32_MAX; ; ) {
+    uint32_t subset_bits;
+    do {
+      subset_bits = subset_alias[++read_widx];
+    } while (!subset_bits);
+    uintptr_t detect_11 = genoarr[read_widx];
+    detect_11 = detect_11 & (detect_11 >> 1) & kMask5555;
+    if (detect_11) {
+      uint32_t detect_11_hw = PackWordToHalfword(detect_11);
+      const uint32_t joint_u32 = subset_bits & detect_11_hw;
+      if (joint_u32) {
+        uintptr_t lowbit = joint_u32 & (-joint_u32);
+        uint32_t write_idx = read_idx + PopcountWord(subset_bits & (lowbit - 1));
+        read_idx = write_idx + 1;
+        uint32_t subset_bits_write = subset_bits ^ lowbit;
+        unsigned char* sparse_vals_uc = S_CAST(unsigned char*, sparse_vals);
+        subset_bits &= -(2 * lowbit);
+        for (; read_idx != orig_subset_size; ++read_idx) {
+#ifdef USE_AVX2
+          if (!subset_bits) {
+            subset_alias[read_widx] = subset_bits_write;
+            do {
+              subset_bits = subset_alias[++read_widx];
+            } while (!subset_bits);
+            subset_bits_write = subset_bits;
+            detect_11 = genoarr[read_widx];
+            detect_11 = detect_11 & (detect_11 >> 1);
+            detect_11_hw = PackWordToHalfwordMask5555(detect_11);
+          }
+          lowbit = subset_bits & (-subset_bits);
+          subset_bits ^= lowbit;
+          if (lowbit & detect_11_hw) {
+            subset_bits_write ^= lowbit;
+            continue;
+          }
+#else
+          if (!subset_bits) {
+            subset_alias[read_widx] = subset_bits_write;
+            do {
+              subset_bits = subset_alias[++read_widx];
+            } while (!subset_bits);
+            subset_bits_write = subset_bits;
+            detect_11 = genoarr[read_widx];
+            detect_11 = detect_11 & (detect_11 >> 1);
+          }
+          lowbit = subset_bits & (-subset_bits);
+          subset_bits ^= lowbit;
+          if ((lowbit * lowbit) & detect_11) {
+            subset_bits_write ^= lowbit;
+            continue;
+          }
+#endif
+          sparse_vals_uc[write_idx++] = sparse_vals_uc[read_idx];
+        }
+        subset_alias[read_widx] = subset_bits_write;
+        *subset_sizep = write_idx;
+        return;
+      }
+    }
+    read_idx += PopcountWord(subset_bits);
+    if (read_idx == orig_subset_size) {
+      return;
+    }
+  }
+}
+
+void ClearGenoarrMissing1bit16Unsafe(const uintptr_t* __restrict genoarr, uint32_t* subset_sizep, uintptr_t* __restrict subset, void* __restrict sparse_vals) {
+  const uint32_t orig_subset_size = *subset_sizep;
+  Halfword* subset_alias = DowncastWToHW(subset);
+  uint32_t read_idx = 0;
+  // deliberate overflow
+  for (uint32_t read_widx = UINT32_MAX; ; ) {
+    uint32_t subset_bits;
+    do {
+      subset_bits = subset_alias[++read_widx];
+    } while (!subset_bits);
+    uintptr_t detect_11 = genoarr[read_widx];
+    detect_11 = detect_11 & (detect_11 >> 1) & kMask5555;
+    if (detect_11) {
+      uint32_t detect_11_hw = PackWordToHalfword(detect_11);
+      const uint32_t joint_u32 = subset_bits & detect_11_hw;
+      if (joint_u32) {
+        uintptr_t lowbit = joint_u32 & (-joint_u32);
+        uint32_t write_idx = read_idx + PopcountWord(subset_bits & (lowbit - 1));
+        read_idx = write_idx + 1;
+        uint32_t subset_bits_write = subset_bits ^ lowbit;
+        uint16_t* sparse_vals_u16 = S_CAST(uint16_t*, sparse_vals);
+        subset_bits &= -(2 * lowbit);
+        for (; read_idx != orig_subset_size; ++read_idx) {
+#ifdef USE_AVX2
+          if (!subset_bits) {
+            subset_alias[read_widx] = subset_bits_write;
+            do {
+              subset_bits = subset_alias[++read_widx];
+            } while (!subset_bits);
+            subset_bits_write = subset_bits;
+            detect_11 = genoarr[read_widx];
+            detect_11 = detect_11 & (detect_11 >> 1);
+            detect_11_hw = PackWordToHalfwordMask5555(detect_11);
+          }
+          lowbit = subset_bits & (-subset_bits);
+          subset_bits ^= lowbit;
+          if (lowbit & detect_11_hw) {
+            subset_bits_write ^= lowbit;
+            continue;
+          }
+#else
+          if (!subset_bits) {
+            subset_alias[read_widx] = subset_bits_write;
+            do {
+              subset_bits = subset_alias[++read_widx];
+            } while (!subset_bits);
+            subset_bits_write = subset_bits;
+            detect_11 = genoarr[read_widx];
+            detect_11 = detect_11 & (detect_11 >> 1);
+          }
+          lowbit = subset_bits & (-subset_bits);
+          subset_bits ^= lowbit;
+          if ((lowbit * lowbit) & detect_11) {
+            subset_bits_write ^= lowbit;
+            continue;
+          }
+#endif
+          sparse_vals_u16[write_idx++] = sparse_vals_u16[read_idx];
+        }
+        subset_alias[read_widx] = subset_bits_write;
+        *subset_sizep = write_idx;
+        return;
+      }
+    }
+    read_idx += PopcountWord(subset_bits);
+    if (read_idx == orig_subset_size) {
+      return;
+    }
+  }
+}
+
+double u127prod_diff_d(uint64_t plus_term0, uint64_t plus_term1, uint64_t minus_term0, uint64_t minus_term1) {
+  uint64_t plus_hi;
+  const uint64_t plus_lo = multiply64to128(plus_term0, plus_term1, &plus_hi);
+  uint64_t minus_hi;
+  const uint64_t minus_lo = multiply64to128(minus_term0, minus_term1, &minus_hi);
+  const uint64_t result_lo = plus_lo - minus_lo;
+  const uint64_t result_hi = plus_hi - minus_hi - (plus_lo < minus_lo);
+  return u127tod(result_hi, result_lo);
+}
+
+double i127prod_diff_d(uint64_t plus_term0, uint64_t plus_term1, uint64_t minus_term0, uint64_t minus_term1) {
+  uint64_t plus_hi;
+  const uint64_t plus_lo = multiply64to128(plus_term0, plus_term1, &plus_hi);
+  uint64_t minus_hi;
+  const uint64_t minus_lo = multiply64to128(minus_term0, minus_term1, &minus_hi);
+  const uint64_t result_lo = plus_lo - minus_lo;
+  const uint64_t result_hi = plus_hi - minus_hi - (plus_lo < minus_lo);
+  if (!(result_hi & (1LLU << 63))) {
+    return u127tod(result_hi, result_lo);
+  } else {
+    const uint64_t minus_result_lo = -result_lo;
+    const uint64_t minus_result_hi = (-result_hi) - (result_lo != 0);
+    return -u127tod(minus_result_hi, minus_result_lo);
+  }
+}
+
+double MultiallelicDiploidMinimac3R2(const uint64_t* __restrict sums, const uint64_t* __restrict hap_ssqs_x2, uint32_t nm_sample_ct, uint32_t allele_ct, uint32_t extra_phased_het_ct) {
+  // sums[k] == sum_i [left_dosage_{ik} + right_dosage_{ik}]
+  // hap_ssqs_x2[k] ==
+  //   2 * sum_i [(left_dosage_{ik})^2 + (right_dosage_{ik})^2]
+  //   This may be odd, since it's computed as
+  //     (left + right)^2 + (left - right)^2
+  //   and the parities of the two integers can be different.
+  // For phased hardcalls, it is fine for the hap_ssqs_x2[k] values to
+  // correspond to unphased hardcalls iff extra_phased_het_ct is the number of
+  // phased-hets that weren't accounted for in hap_ssqs_x2[]; this makes it
+  // straightforward for GetMultiallelicCountsAndDosage16s to stick to the
+  // custom internal multiallelic-count functions.
+  if (!nm_sample_ct) {
+    return (0.0 / 0.0);
+  }
+  // Allelic phased-dosages are on a (k-1)-dimensional simplex; embed this in
+  // R^k as the (1, 0, ..., 0), (0, 1, ..., 0), ..., (0, 0, ..., 1) polytope.
+  // Define
+  //   m_k := (1/2n) * sum_i [left_dosage_{ik} + right_dosage_{ik}]
+  // Minimac3-r2 is defined as empirical phased-dosage variance divided by
+  // expected-under-allele-frequencies variance.
+  // Expected sum-of-squared-Euclidean-distance with perfect imputation is
+  //   2n("1"^2 - sum_k ((m_k)^2))
+  // and observed sum-of-squared-distance is
+  //   sum_k (sum_i [(left_dosage_{ik})^2 + (right_dosage_{ik})^2] -
+  //          2n((m_k)^2))
+
+  // ssq_sum_x2 can be as large as 2^31 * nm_sample_ct; meansq_sum can cancel
+  // as little as (1 / allele_ct) of it
+  if (nm_sample_ct < 92682) {
+    uint64_t ssq_sum_x2 = extra_phased_het_ct * 0x20000000LLU;
+    uint64_t meansq_sum = 0;
+    for (uint32_t allele_idx = 0; allele_idx != allele_ct; ++allele_idx) {
+      const uint64_t cur_allele_dosage = sums[allele_idx];
+      ssq_sum_x2 += hap_ssqs_x2[allele_idx];
+      // cur_allele_dosage == 2n * m_k
+      // -> meansq_sum becomes 2n * sum_k [2n((m_k)^2)]
+      meansq_sum += cur_allele_dosage * cur_allele_dosage;
+    }
+    const uint64_t observed_variance_times_2n = ssq_sum_x2 * nm_sample_ct - meansq_sum;
+    // "1"^2 -> 16384^2 in our units.  So 2n * 2n * "1"^2 is equal to
+    //   n * n * 16384^2 * 4.
+    const uint64_t expected_variance_times_2n = nm_sample_ct * 0x40000000LLU * nm_sample_ct - meansq_sum;
+    // mach_r2 == 1 test cases:
+    // - AA, AB, BB: 1, 4, 4
+    //   sums[0] = 6 * 2^14
+    //   sums[1] = 12 * 2^14
+    //   ssqs[0] = 8 * 2^28
+    //   ssqs[1] = 20 * 2^28
+    //   ssq_sum = (8 + 20) * 2^28
+    //   meansq_sum = (6 * 6 + 12 * 12) * 2^28
+    //   observed_variance = 28 * 9 * 2^28 - 180 * 2^28
+    //   expected_variance = (9 * 9 * 4 * 2^28 - 180 * 2^28) / 2
+    // - AA, AB, BB, AC, BC, CC: 1, 4, 4, 6, 12, 9
+    //   sums[0] = 12 * 2^14
+    //   sums[1] = 24 * 2^14
+    //   sums[2] = 36 * 2^14
+    //   ssqs[0] = 14 * 2^28
+    //   ssqs[1] = 32 * 2^28
+    //   ssqs[2] = 54 * 2^28
+    //   ssq_sum = (14 + 32 + 54) * 2^28
+    //   meansq_sum = (12 * 12 + 24 * 24 + 36 * 36) * 2^28
+    //   observed_variance = 100 * 36 * 2^28 - 56 * 36 * 2^28
+    //   expected_variance = (36 * 36 * 4 * 2^28 - 56 * 36 * 2^28) / 2
+    return S_CAST(double, observed_variance_times_2n) / S_CAST(double, expected_variance_times_2n);
+  }
+  uint64_t ssq_sum_x2 = extra_phased_het_ct * 0x20000000LLU;
+  uint64_t meansq_sum_lo = 0;
+  uint64_t meansq_sum_hi = 0;
+  for (uint32_t allele_idx = 0; allele_idx != allele_ct; ++allele_idx) {
+    const uint64_t cur_allele_dosage = sums[allele_idx];
+    const uint64_t cur_ssq_x2 = hap_ssqs_x2[allele_idx];
+    ssq_sum_x2 += cur_ssq_x2;
+    uint64_t incr_hi;
+    uint64_t incr_lo = multiply64to128(cur_allele_dosage, cur_allele_dosage, &incr_hi);
+    meansq_sum_lo += incr_lo;
+    meansq_sum_hi += incr_hi + (meansq_sum_lo < incr_lo);
+  }
+  uint64_t prod_hi;
+  uint64_t prod_lo = multiply64to128(ssq_sum_x2, nm_sample_ct, &prod_hi);
+  const uint64_t observed_variance_times_2n_lo = prod_lo - meansq_sum_lo;
+  const uint64_t observed_variance_times_2n_hi = prod_hi - meansq_sum_hi - (prod_lo < meansq_sum_lo);
+  const double observed_variance_times_2n = u127tod(observed_variance_times_2n_hi, observed_variance_times_2n_lo);
+
+  prod_lo = multiply64to128(nm_sample_ct * 0x40000000LLU, nm_sample_ct, &prod_hi);
+  const uint64_t expected_variance_times_2n_lo = prod_lo - meansq_sum_lo;
+  const uint64_t expected_variance_times_2n_hi = prod_hi - meansq_sum_hi - (prod_lo < meansq_sum_lo);
+  const double expected_variance_times_2n = u127tod(expected_variance_times_2n_hi, expected_variance_times_2n_lo);
+  return observed_variance_times_2n / expected_variance_times_2n;
+}
+
+void PgrDifflistToGenovecUnsafe(const uintptr_t* __restrict raregeno, const uint32_t* difflist_sample_ids, uintptr_t difflist_common_geno, uint32_t sample_ct, uint32_t difflist_len, uintptr_t* __restrict genovec) {
+  // Ok for trailing bits of raregeno to be nonzero.  Does not zero out
+  // trailing bits of genovec.
+  const uint32_t vec_ct = NypCtToVecCt(sample_ct);
+  // could just memset up to word boundary; this should be a bit more
+  // vector-instruction-friendly, though
+  vecset(genovec, difflist_common_geno * kMask5555, vec_ct);
+  const uintptr_t* raregeno_incr = raregeno;
+  uint32_t difflist_idx = 0;
+  uint32_t difflist_idx_stop = kBitsPerWordD2;
+  if (!difflist_common_geno) {
+    // faster inner loop since there's no existing value to mask out
+    // todo: check if this should just be deleted since the code bloat causes
+    // too many more cache misses
+    for (; ; difflist_idx_stop += kBitsPerWordD2) {
+      if (difflist_idx_stop > difflist_len) {
+        if (difflist_idx == difflist_len) {
+          return;
+        }
+        difflist_idx_stop = difflist_len;
+      }
+      uintptr_t raregeno_word = *raregeno_incr++;
+      for (; difflist_idx != difflist_idx_stop; ++difflist_idx) {
+        const uint32_t cur_sample_idx = difflist_sample_ids[difflist_idx];
+        genovec[cur_sample_idx / kBitsPerWordD2] |= (raregeno_word & 3) << (2 * (cur_sample_idx % kBitsPerWordD2));
+        raregeno_word >>= 2;
+      }
+    }
+  }
+  for (; ; difflist_idx_stop += kBitsPerWordD2) {
+    if (difflist_idx_stop > difflist_len) {
+      if (difflist_idx == difflist_len) {
+        return;
+      }
+      difflist_idx_stop = difflist_len;
+    }
+    uintptr_t raregeno_word = *raregeno_incr++;
+    for (; difflist_idx != difflist_idx_stop; ++difflist_idx) {
+      const uint32_t cur_sample_idx = difflist_sample_ids[difflist_idx];
+      AssignNyparrEntry(cur_sample_idx, raregeno_word & 3, genovec);
+      raregeno_word >>= 2;
+    }
+  }
+}
+
+const uint16_t kHcToAlleleCodes[1024] = QUAD_TABLE256(0, 0x100, 0x101, 0xffff);
+
+static_assert(sizeof(AlleleCode) == 1, "PglMultiallelicSparseToDenseMiss() needs to be updated.");
+void PglMultiallelicSparseToDenseMiss(const PgenVariant* pgvp, uint32_t sample_ct, AlleleCode* __restrict wide_codes) {
+  GenoarrLookup256x2bx4(pgvp->genovec, kHcToAlleleCodes, sample_ct, wide_codes);
+  const uint32_t patch_01_ct = pgvp->patch_01_ct;
+  if (patch_01_ct) {
+    const uintptr_t* patch_01_set = pgvp->patch_01_set;
+    uintptr_t sample_idx_base = 0;
+    uintptr_t cur_bits = patch_01_set[0];
+    const AlleleCode* patch_01_vals = pgvp->patch_01_vals;
+    AlleleCode* wide_codes1 = &(wide_codes[1]);
+    for (uint32_t uii = 0; uii != patch_01_ct; ++uii) {
+      const uintptr_t sample_idx = BitIter1(patch_01_set, &sample_idx_base, &cur_bits);
+      wide_codes1[2 * sample_idx] = patch_01_vals[uii];
+    }
+  }
+  const uint32_t patch_10_ct = pgvp->patch_10_ct;
+  if (patch_10_ct) {
+    const uintptr_t* patch_10_set = pgvp->patch_10_set;
+    uintptr_t sample_idx_base = 0;
+    uintptr_t cur_bits = patch_10_set[0];
+    const DoubleAlleleCode* patch_10_vals_alias = R_CAST(const DoubleAlleleCode*, pgvp->patch_10_vals);
+    DoubleAlleleCode* wide_codes_alias = R_CAST(DoubleAlleleCode*, wide_codes);
+    for (uint32_t uii = 0; uii != patch_10_ct; ++uii) {
+      const uintptr_t sample_idx = BitIter1(patch_10_set, &sample_idx_base, &cur_bits);
+      wide_codes_alias[sample_idx] = patch_10_vals_alias[uii];
+    }
+  }
+}
+
+uintptr_t PglComputeMaxAlleleCt(const uintptr_t* allele_idx_offsets, uint32_t variant_ct) {
+  if ((!allele_idx_offsets) || (allele_idx_offsets[variant_ct] == 2 * variant_ct)) {
+    return 2;
+  }
+  // todo: try vectorizing this
+  uintptr_t max_allele_ct = 2;
+  uintptr_t prev_offset = allele_idx_offsets[0];
+  const uintptr_t* shifted_offsets = &(allele_idx_offsets[1]);
+  for (uintptr_t uii = 0; uii != variant_ct; ++uii) {
+    const uintptr_t cur_offset = shifted_offsets[uii];
+    const uintptr_t cur_allele_ct = cur_offset - prev_offset;
+    if (cur_allele_ct > max_allele_ct) {
+      max_allele_ct = cur_allele_ct;
+    }
+    prev_offset = cur_offset;
+  }
+  return max_allele_ct;
+}
+
+// Ok for nybble_vvec to be unaligned.
+uint32_t CountNybbleVec(const unsigned char* nybble_vvec_biter, uintptr_t nybble_word, uint32_t vec_ct) {
+  const VecW m0 = vecw_setzero();
+  const VecW alld15 = VCONST_W(kMask1111);
+  const VecW m4 = VCONST_W(kMask0F0F);
+  const VecW xor_vvec = vecw_set1(nybble_word);
+  VecW prev_sad_result = vecw_setzero();
+  VecW acc = vecw_setzero();
+  uintptr_t cur_incr = 15;
+  for (; ; vec_ct -= cur_incr) {
+    if (vec_ct < 15) {
+      if (!vec_ct) {
+        acc = acc + prev_sad_result;
+        return HsumW(acc);
+      }
+      cur_incr = vec_ct;
+    }
+    VecW inner_acc = vecw_setzero();
+    const unsigned char* nybble_vvec_stop = &(nybble_vvec_biter[cur_incr * kBytesPerVec]);
+    do {
+      VecW loader = vecw_loadu(nybble_vvec_biter) ^ xor_vvec;
+      nybble_vvec_biter += kBytesPerVec;
+      // DetectAllZeroNybbles() followed by right-shift-3 is the same number of
+      // operations, can see if that's any faster in practice
+      loader = vecw_srli(loader, 1) | loader;
+      loader = vecw_srli(loader, 2) | loader;
+      inner_acc = inner_acc + vecw_and_notfirst(loader, alld15);
+    } while (nybble_vvec_biter < nybble_vvec_stop);
+    inner_acc = (inner_acc & m4) + (vecw_srli(inner_acc, 4) & m4);
+    acc = acc + prev_sad_result;
+    prev_sad_result = vecw_bytesum(inner_acc, m0);
+  }
+}
+
+uint32_t CountNybble(const void* nybblearr, uintptr_t nybble_word, uintptr_t nybble_ct) {
+  const unsigned char* nybblearr_uc = S_CAST(const unsigned char*, nybblearr);
+  const uint32_t fullword_ct = nybble_ct / kBitsPerWordD4;
+  uint32_t tot = CountNybbleVec(nybblearr_uc, nybble_word, fullword_ct / kWordsPerVec);
+#ifdef __LP64__
+  for (uint32_t word_idx = RoundDownPow2(fullword_ct, kWordsPerVec); word_idx != fullword_ct; ++word_idx) {
+    uintptr_t cur_word;
+    CopyFromUnalignedOffsetW(&cur_word, nybblearr_uc, word_idx);
+    cur_word ^= nybble_word;
+    cur_word = cur_word | (cur_word >> 1);
+    cur_word = cur_word | (cur_word >> 2);
+    tot += Popcount0001Word((~cur_word) & kMask1111);
+  }
+#endif
+  const uint32_t trailing_nybble_ct = nybble_ct % kBitsPerWordD4;
+  if (trailing_nybble_ct) {
+    const uint32_t trailing_byte_ct = DivUp(trailing_nybble_ct, (CHAR_BIT / 4));
+    uintptr_t cur_word = SubwordLoad(&(nybblearr_uc[fullword_ct * kBytesPerWord]), trailing_byte_ct) ^ nybble_word;
+    cur_word = cur_word | (cur_word >> 1);
+    cur_word = cur_word | (cur_word >> 2);
+    cur_word = bzhi((~cur_word) & kMask1111, trailing_nybble_ct * 4);
+#if defined(USE_SSE42) || !defined(__LP64__)
+    tot += Popcount0001Word(cur_word);
+#else
+    // minor optimization, can't overflow
+    tot += (cur_word * kMask1111) >> 60;
+#endif
+  }
+  return tot;
+}
+
+uint64_t PglHeaderBaseEndOffset(uint32_t variant_ct, uintptr_t vrec_len_byte_ct, uint32_t phase_or_dosage_present, uint32_t explicit_nonref_flags) {
+  const uint32_t vblock_ct = DivUp(variant_ct, kPglVblockSize);
+  uint64_t offset = 12 + vblock_ct * sizeof(int64_t) + variant_ct * vrec_len_byte_ct;
+  if (phase_or_dosage_present) {
+    // 8-bit vrtypes
+    offset += variant_ct;
+  } else {
+    // 4-bit vrtypes
+    offset += DivUp(variant_ct, 2);
+  }
+  if (explicit_nonref_flags) {
+    offset += DivUp(variant_ct, CHAR_BIT);
+  }
+  return offset;
+}
+
+#ifdef __cplusplus
+}  // namespace plink2
+#endif
diff --git a/external_libs/pgenlib/include/pgenlib_misc.h b/external_libs/pgenlib/include/pgenlib_misc.h
new file mode 100644
index 0000000..0f616d5
--- /dev/null
+++ b/external_libs/pgenlib/include/pgenlib_misc.h
@@ -0,0 +1,1050 @@
+#ifndef __PGENLIB_MISC_H__
+#define __PGENLIB_MISC_H__
+
+// This library is part of PLINK 2.0, copyright (C) 2005-2024 Shaun Purcell,
+// Christopher Chang.
+//
+// This library is free software: you can redistribute it and/or modify it
+// under the terms of the GNU Lesser General Public License as published by the
+// Free Software Foundation; either version 3 of the License, or (at your
+// option) any later version.
+//
+// This library is distributed in the hope that it will be useful, but WITHOUT
+// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public License
+// for more details.
+//
+// You should have received a copy of the GNU Lesser General Public License
+// along with this library.  If not, see <http://www.gnu.org/licenses/>.
+
+
+// Low-level C99/C++03/C++11 library for reading .pgen (PLINK 2.0 binary) files
+// (designed to produce good lowest-common-denominator binaries across
+// Windows/OS X/Linux).
+//
+// File format design:
+// - With the header loaded, it is possible to efficiently access a variant by
+//   its index.  Since records can now be variable-length, this sometimes
+//   requires storage of record lengths.
+// - Due to the power of LD-based compression, we permit a variant record to
+//   just store a list of differences from an earlier, fully stored variant.
+//   However, only short-range dependence is permitted; sequential processing
+//   of the file only requires caching of the most recent explicitly stored
+//   variant.
+// - Like the plink1 format, this is balanced for relatively easy reading and
+//   writing; in particular, the mode-0x10/0x11 header is not read-optimized,
+//   it passes up some obvious compression opportunities which would make it
+//   more difficult to write e.g. an efficient file merger.  This isn't a big
+//   deal if we don't have a huge number of one-sample .pgen files sharing a
+//   single .bim file (or equivalent).  (If they don't share the same .bim
+//   file, .bim overhead > .pgen overhead.)  If we ever do, we can define an
+//   additional mode to handle that case more efficiently.
+// - Building blocks are arrays of 1-bit, 2-bit, 4-bit, 1-byte, 2-byte, 3-byte,
+//   and 4-byte values.  3/5/6/7(/9...)-bit values don't play well with
+//   bitwise operations, and when it's important, there's usually a natural way
+//   to split them into power-of-2-bit components.
+//   (unsigned integers known to be smaller than 2^24, but not known to be
+//   smaller than 2^16, are stored as 3-byte values on disk and "decompressed"
+//   to uint32_t during loading.)
+// - Missing value is usually all-1s.  (Only exceptions right now: plink1
+//   backward compatibility mode; presence/absence of rare alts for variants
+//   with >2 alt alleles is an array of 1-bit values, where absence = 0; and
+//   presence/absence of phasing info is similar.)  Time to move away from 01
+//   nonsense.
+// - Individual variant records are prohibited from being >= 4GiB, to reduce
+//   integer overflow issues.  (This may be reduced to 2GiB later, but I'll
+//   attempt to handle the 2-4GiB range properly for now since it's conceivable
+//   for multiallelic records in very large datasets to reach that size.)
+// - (later todo: include stuff like file creation command in .pvar header;
+//   that doesn't really belong in a binary file.)
+// See the bottom of this header file, and the pgen_spec/ subdirectory of
+// plink-ng on GitHub, for details.
+
+// Additional parameter conventions:
+// - "nyparr" indicates a word-aligned, packed array of 2-bit values, while
+//   "nypvec" is the vector-aligned equivalent.  "nybblearr" marks the much
+//   rarer case of a packed array of 4-bit values.
+// - "nypvec_01" indicates a packed, vector-aligned array of 2-bit values where
+//   each value is zero or one.  This data structure was used quite a bit by
+//   plink 1.9 for operating on a subset of a 2-bit-genotype array.
+// - "genoarr"/"genovec" indicates a nyparr/nypvec containing genotype
+//   information.
+// - "interleaved_vec" is plink 2.0's preferred alternative to nypvec_01: we
+//   basically stack pairs of adjacent vectors on top of each other and unpack
+//   on the fly, since that tends to be faster than having to access twice as
+//   much memory.
+
+#include "plink2_bits.h"
+
+// 10000 * major + 100 * minor + patch
+// Exception to CONSTI32, since we want the preprocessor to have access to this
+// value.  Named with all caps as a consequence.
+#define PGENLIB_INTERNAL_VERNUM 2003
+
+#ifdef __cplusplus
+namespace plink2 {
+#endif
+
+// other configuration-ish values needed by plink2_common subset
+typedef unsigned char AlleleCode;
+typedef uint16_t DoubleAlleleCode;
+static_assert(sizeof(DoubleAlleleCode) == 2 * sizeof(AlleleCode), "Inconsistent AlleleCode and DoubleAlleleCode definitions.");
+// Set this to 65534 if AlleleCode is uint16_t, 2^24 - 1 if uint32_t.
+CONSTI32(kPglMaxAltAlleleCt, 254);
+
+CONSTI32(kPglMaxAlleleCt, kPglMaxAltAlleleCt + 1);
+#define PGL_MAX_ALT_ALLELE_CT_STR "254"
+#define PGL_MAX_ALLELE_CT_STR "255"
+#ifdef __cplusplus
+#  define kMissingAlleleCode S_CAST(plink2::AlleleCode, -1)
+#  define kMissingDoubleAlleleCode S_CAST(plink2::DoubleAlleleCode, -1)
+#else
+#  define kMissingAlleleCode S_CAST(AlleleCode, -1)
+#  define kMissingDoubleAlleleCode S_CAST(DoubleAlleleCode, -1)
+#endif
+CONSTI32(kAlleleCodesPerVec, kBytesPerVec / sizeof(AlleleCode));
+
+HEADER_INLINE uintptr_t AlleleCodeCtToVecCt(uintptr_t val) {
+  return DivUp(val, kAlleleCodesPerVec);
+}
+
+HEADER_INLINE uintptr_t AlleleCodeCtToAlignedWordCt(uintptr_t val) {
+  return kWordsPerVec * AlleleCodeCtToVecCt(val);
+}
+
+HEADER_INLINE AlleleCode* DowncastWToAC(uintptr_t* pp) {
+  return R_CAST(AlleleCode*, pp);
+}
+
+HEADER_INLINE void AlignACToVec(AlleleCode** pp) {
+  const uintptr_t addr = R_CAST(uintptr_t, *pp);
+  *pp = R_CAST(AlleleCode*, RoundUpPow2(addr, kBytesPerVec));
+}
+
+// returns a word with low bit in each pair set at each 00.
+HEADER_INLINE uintptr_t Word00(uintptr_t ww) {
+  return (~(ww | (ww >> 1))) & kMask5555;
+}
+
+HEADER_INLINE uintptr_t Word01(uintptr_t ww) {
+  return ww & (~(ww >> 1)) & kMask5555;
+}
+
+// returns a word with *low* bit in each pair set at each 10.
+HEADER_INLINE uintptr_t Word10(uintptr_t ww) {
+  return (~ww) & (ww >> 1) & kMask5555;
+}
+
+HEADER_INLINE uintptr_t Word11(uintptr_t ww) {
+  return ww & (ww >> 1) & kMask5555;
+}
+
+HEADER_INLINE Halfword Pack00ToHalfword(uintptr_t ww) {
+  return PackWordToHalfwordMask5555(~(ww | (ww >> 1)));
+}
+
+HEADER_INLINE Halfword Pack01ToHalfword(uintptr_t ww) {
+  return PackWordToHalfwordMask5555(ww & (~(ww >> 1)));
+}
+
+HEADER_INLINE Halfword Pack11ToHalfword(uintptr_t ww) {
+  return PackWordToHalfwordMask5555(ww & (ww >> 1));
+}
+
+#ifdef USE_SSE42
+HEADER_INLINE uint32_t Popcount01Word(uintptr_t val) {
+  return PopcountWord(val);
+}
+
+HEADER_INLINE uint32_t Popcount0001Word(uintptr_t val) {
+  return PopcountWord(val);
+}
+#else
+HEADER_INLINE uint32_t Popcount01Word(uintptr_t val) {
+  return NypsumWord(val);
+}
+
+HEADER_INLINE uint32_t Popcount0001Word(uintptr_t val) {
+#  ifdef __LP64__
+  // (val * kMask1111) >> 60 can barely overflow, sigh
+  const uintptr_t val0 = val & 1;
+  return (((val - val0) * kMask1111) >> 60) + val0;
+#  else
+  return (val * kMask1111) >> 28;
+#  endif
+}
+#endif
+
+// assumes subset_mask has trailing zeroes up to the next vector boundary
+void FillInterleavedMaskVec(const uintptr_t* __restrict subset_mask, uint32_t base_vec_ct, uintptr_t* interleaved_mask_vec);
+
+HEADER_INLINE void CopyNyparr(const uintptr_t* __restrict source_nyparr, uint32_t nyparr_entry_ct, uintptr_t* __restrict target_nyparr) {
+  memcpy(target_nyparr, source_nyparr, NypCtToWordCt(nyparr_entry_ct) * kBytesPerWord);
+}
+
+// may want bit past the end of subset_mask (i.e. position
+// raw_nyparr_entry_ct) to always be allocated and unset.  This removes the
+// need for some explicit end-of-bitarray checks.
+void CopyNyparrNonemptySubset(const uintptr_t* __restrict raw_nyparr, const uintptr_t* __restrict subset_mask, uint32_t raw_nyparr_entry_ct, uint32_t subset_entry_ct, uintptr_t* __restrict output_nyparr);
+
+// Copies a bit from raw_bitarr for each genoarr entry matching match_word.
+// (match_word must be a multiple of kMask5555.)
+void CopyGenomatchSubset(const uintptr_t* __restrict raw_bitarr, const uintptr_t* __restrict genoarr, uintptr_t match_word, uint32_t write_bit_idx_start, uint32_t bit_ct, void* __restrict output);
+
+void ExpandBytearrFromGenoarr(const void* __restrict compact_bitarr, const uintptr_t* __restrict genoarr, uintptr_t match_word, uint32_t genoword_ct, uint32_t expand_size, uint32_t read_start_bit, uintptr_t* __restrict target);
+
+
+// These functions are "unsafe" since they assume trailing bits of last
+// genovec/genoarr word are zeroed out.
+void GenovecCount12Unsafe(const uintptr_t* genovec, uint32_t sample_ct, uint32_t* __restrict raw_01_ctp, uint32_t* __restrict raw_10_ctp);
+
+void Count3FreqVec6(const void* geno_vvec, uint32_t vec_ct, uint32_t* __restrict even_ctp, uint32_t* __restrict odd_ctp, uint32_t* __restrict bothset_ctp);
+
+// vector-alignment preferred.
+void GenoarrCountFreqsUnsafe(const uintptr_t* genoarr, uint32_t sample_ct, STD_ARRAY_REF(uint32_t, 4) genocounts);
+
+// GenoarrCountFreqsUnsafe() wrapper that returns most common genotype,
+// breaking ties in favor of the lower value.
+uintptr_t MostCommonGenoUnsafe(const uintptr_t* genoarr, uint32_t sample_ct);
+
+void CountSubset3FreqVec6(const void* __restrict genoarr, const VecW* __restrict interleaved_mask_vvec, uint32_t vec_ct, uint32_t* __restrict even_ctp, uint32_t* __restrict odd_ctp, uint32_t* __restrict bothset_ctp);
+
+// genoarr vector-alignment preferred.
+void GenoarrCountSubsetFreqs(const uintptr_t* __restrict genoarr, const uintptr_t* __restrict sample_include_interleaved_vec, uint32_t raw_sample_ct, uint32_t sample_ct, STD_ARRAY_REF(uint32_t, 4) genocounts);
+
+// slower GenoarrCountSubsetFreqs() which does not require
+// sample_include_interleaved_vec to be precomputed
+void GenoarrCountSubsetFreqs2(const uintptr_t* __restrict genoarr, const uintptr_t* __restrict sample_include, uint32_t raw_sample_ct, uint32_t sample_ct, STD_ARRAY_REF(uint32_t, 4) genocounts);
+
+void GenoarrCountInvsubsetFreqs2(const uintptr_t* __restrict genoarr, const uintptr_t* __restrict sample_exclude, uint32_t raw_sample_ct, uint32_t sample_ct, STD_ARRAY_REF(uint32_t, 4) genocounts);
+
+void GenoarrCountSubsetIntersectFreqs(const uintptr_t* __restrict genoarr, const uintptr_t* __restrict subset1, const uintptr_t* __restrict subset2, uint32_t raw_sample_ct, STD_ARRAY_REF(uint32_t, 4) genocounts);
+
+void GenovecInvertUnsafe(uint32_t sample_ct, uintptr_t* genovec);
+
+HEADER_INLINE uintptr_t InvertGenoWordUnsafe(uintptr_t geno_word) {
+  return (geno_word ^ ((~(geno_word << 1)) & kMaskAAAA));
+}
+
+// too easy to forget to multiply by 2
+HEADER_INLINE void ZeroTrailingNyps(uintptr_t nyp_ct, uintptr_t* bitarr) {
+  ZeroTrailingBits(nyp_ct * 2, bitarr);
+}
+
+HEADER_INLINE void SetTrailingNyps(uintptr_t nyp_ct, uintptr_t* bitarr) {
+  const uintptr_t trail_ct = nyp_ct % kBitsPerWordD2;
+  if (trail_ct) {
+    bitarr[nyp_ct / kBitsPerWordD2] |= (~k0LU) << (nyp_ct * 2);
+  }
+}
+
+// GetVint31 and Vint32Append moved to plink2_base.
+
+// Input must be validated.
+HEADER_INLINE uint32_t GetVint32Unsafe(const unsigned char** buf_iterp) {
+  uint32_t vint32 = *(*buf_iterp)++;
+  if (vint32 <= 127) {
+    return vint32;
+  }
+  vint32 &= 127;
+  for (uint32_t shift = 7; ; shift += 7) {
+    uint32_t uii = *(*buf_iterp)++;
+    vint32 |= (uii & 127) << shift;
+    if (uii <= 127) {
+      return vint32;
+    }
+  }
+}
+
+HEADER_INLINE void SkipVintUnsafe(const unsigned char** buf_iterp) {
+  uint32_t cur_byte;
+  do {
+    cur_byte = *(*buf_iterp)++;
+  } while (cur_byte & 128);
+}
+
+// Does not update buf_iter.
+HEADER_INLINE uint32_t PeekVint31(const unsigned char* buf_iter, const unsigned char* buf_end) {
+  if (likely(buf_end > buf_iter)) {
+    uint32_t vint32 = *buf_iter++;
+    if (vint32 <= 127) {
+      return vint32;
+    }
+    vint32 &= 127;
+    uint32_t shift = 7;
+    while (likely(buf_end > buf_iter)) {
+      uint32_t uii = *buf_iter++;
+      vint32 |= (uii & 127) << shift;
+      if (uii <= 127) {
+        return vint32;
+      }
+      shift += 7;
+    }
+  }
+  return 0x80000000U;
+}
+
+/*
+HEADER_INLINE void FPutVint31(uint32_t uii, FILE* ff) {
+  // caller's responsibility to periodically check ferror
+  while (uii > 127) {
+    putc_unlocked((uii & 127) + 128, ff);
+    uii >>= 7;
+  }
+  putc_unlocked(uii, ff);
+}
+*/
+
+HEADER_INLINE BoolErr FSkipVint(FILE* ff) {
+  while (1) {
+    const uint32_t cur_byte = getc_unlocked(ff);
+    if (cur_byte <= 127) {
+      return 0;
+    }
+    if (unlikely(cur_byte > 255)) {
+      return 1;
+    }
+  }
+}
+
+HEADER_INLINE uint64_t FGetVint63(FILE* ff) {
+  // Can't be used when multiple threads are reading from ff.
+  uint64_t vint64 = getc_unlocked(ff);
+  if (vint64 <= 127) {
+    return vint64;
+  }
+  if (unlikely(vint64 > 255)) {
+    return (1LLU << 63);
+  }
+  vint64 &= 127;
+  for (uint32_t shift = 7; ; shift += 7) {
+    const uint64_t ullii = getc_unlocked(ff);
+    vint64 |= (ullii & 127) << shift;
+    if (ullii <= 127) {
+      return vint64;
+    }
+    if (unlikely((ullii > 255) || (shift == 56))) {
+      return (1LLU << 63);
+    }
+  }
+}
+
+// Need this for sparse multiallelic dosage.
+HEADER_INLINE unsigned char* Vint64Append(uint64_t ullii, unsigned char* buf) {
+  while (ullii > 127) {
+    *buf++ = (ullii & 127) + 128;
+    ullii >>= 7;
+  }
+  *buf++ = ullii;
+  return buf;
+}
+
+HEADER_INLINE uint64_t GetVint64Unsafe(const unsigned char** buf_iterp) {
+  uint64_t vint64 = *(*buf_iterp)++;
+  if (vint64 <= 127) {
+    return vint64;
+  }
+  vint64 &= 127;
+  for (uint32_t shift = 7; ; shift += 7) {
+    uint64_t ullii = *(*buf_iterp)++;
+    vint64 |= (ullii & 127) << shift;
+    if (ullii <= 127) {
+      return vint64;
+    }
+  }
+}
+
+HEADER_INLINE void FPutVint64(uint64_t ullii, FILE* ff) {
+  // caller's responsibility to periodically check ferror
+  while (ullii > 127) {
+    putc_unlocked((ullii & 127) + 128, ff);
+    ullii >>= 7;
+  }
+  putc_unlocked(ullii, ff);
+}
+
+// TODO: make this work properly with kCacheline == 128, then fix other
+// transpose functions, etc.
+
+// main batch size
+CONSTI32(kPglNypTransposeBatch, kNypsPerCacheline);
+
+// word width of each matrix row
+CONSTI32(kPglNypTransposeWords, kWordsPerCacheline);
+
+#ifdef __LP64__
+CONSTI32(kPglNypTransposeBufbytes, (kPglNypTransposeBatch * kPglNypTransposeBatch) / 2);
+
+// buf0 and buf1 assumed to be vector-aligned.
+void TransposeNypblock64(const uintptr_t* read_iter, uint32_t read_ul_stride, uint32_t write_ul_stride, uint32_t read_batch_size, uint32_t write_batch_size, uintptr_t* __restrict write_iter, unsigned char* __restrict buf0, unsigned char* __restrict buf1);
+#else  // !__LP64__
+CONSTI32(kPglNypTransposeBufbytes, (kPglNypTransposeBatch * kPglNypTransposeBatch) / 2);
+
+void TransposeNypblock32(const uintptr_t* read_iter, uint32_t read_ul_stride, uint32_t write_ul_stride, uint32_t read_batch_size, uint32_t write_batch_size, uintptr_t* __restrict write_iter, unsigned char* __restrict buf0, unsigned char* __restrict buf1);
+#endif
+CONSTI32(kPglNypTransposeBufwords, kPglNypTransposeBufbytes / kBytesPerWord);
+
+// - single block is up to 256x256 (CACHELINE64) or 512x512 (CACHELINE128)
+// - vecaligned_buf must have size 32k (CACHELINE64) or 128k (CACHELINE128)
+// - does NOT zero out trailing bits, because main application is ind-major-bed
+//   <-> plink2 format conversion, where the zeroing would be undone...
+// - important: write_iter must be allocated up to at least
+//   RoundUpPow2(write_batch_size, 4) rows (may want to remove this
+//   requirement)
+
+HEADER_INLINE void TransposeNypblock(const uintptr_t* read_iter, uint32_t read_ul_stride, uint32_t write_ul_stride, uint32_t read_batch_size, uint32_t write_batch_size, uintptr_t* write_iter, VecW* vecaligned_buf) {
+#ifdef __LP64__
+  // assert(!(write_ul_stride % 2));
+  TransposeNypblock64(read_iter, read_ul_stride, write_ul_stride, read_batch_size, write_batch_size, write_iter, DowncastToUc(vecaligned_buf), &(DowncastToUc(vecaligned_buf)[kPglNypTransposeBufbytes / 2]));
+#else
+  TransposeNypblock32(read_iter, read_ul_stride, write_ul_stride, read_batch_size, write_batch_size, write_iter, DowncastToUc(vecaligned_buf), &(DowncastToUc(vecaligned_buf)[kPglNypTransposeBufbytes / 2]));
+#endif
+}
+
+
+// replaces each x with (32768 - x)
+// okay for dosage_main to be nullptr if dosage_ct == 0
+void BiallelicDosage16Invert(uint32_t dosage_ct, uint16_t* dosage_main);
+
+// replaces each x with -x
+void BiallelicDphase16Invert(uint32_t dphase_ct, int16_t* dphase_delta);
+
+void PackWordsToHalfwordsInvmatch(const uintptr_t* __restrict genoarr, uintptr_t inv_match_word, uint32_t inword_ct, uintptr_t* __restrict dst);
+
+void PackWordsToHalfwordsMismatch(const uintptr_t* __restrict genoarr, uintptr_t mismatch_word, uint32_t inword_ct, uintptr_t* __restrict dst);
+
+// src and dst allowed to be identical; that's why src is not marked const
+// despite not being directly written to.
+void MaskWordsToHalfwordsInvmatch(const uintptr_t* __restrict genoarr, uintptr_t inv_match_word, uint32_t inword_ct, uintptr_t* src, uintptr_t* dst);
+
+// Unsafe since it assumes trailing genoarr bits are cleared.  But if they are,
+// trailing missingness bits will be clear.
+HEADER_INLINE void GenoarrToMissingnessUnsafe(const uintptr_t* __restrict genoarr, uint32_t sample_ct, uintptr_t* __restrict missingness) {
+  const uint32_t sample_ctl2 = NypCtToWordCt(sample_ct);
+  PackWordsToHalfwordsInvmatch(genoarr, 0, sample_ctl2, missingness);
+  if (sample_ctl2 % 2) {
+    Halfword* __attribute__((may_alias)) missingness_alias = DowncastWToHW(missingness);
+    missingness_alias[sample_ctl2] = 0;
+  }
+}
+
+HEADER_INLINE void GenoarrToNonmissing(const uintptr_t* __restrict genoarr, uint32_t sample_ct, uintptr_t* __restrict nonmissingness) {
+  const uint32_t sample_ctl2 = NypCtToWordCt(sample_ct);
+  PackWordsToHalfwordsMismatch(genoarr, ~k0LU, sample_ctl2, nonmissingness);
+  ZeroTrailingBits(sample_ct, nonmissingness);
+}
+
+void SparseToMissingness(const uintptr_t* __restrict raregeno, const uint32_t* difflist_sample_ids, uint32_t sample_ct, uint32_t difflist_common_geno, uint32_t difflist_len, uintptr_t* __restrict missingness);
+
+// hom_buf gets set bits when genoarr value is 0 or 2.
+// ref2het_buf gets set bits when genoarr value is 0 or 1.
+// N.B. assumes trailing bits of loadbuf have been filled with 1s, not 0s
+// Also takes genoarr word count instead of sample count.
+void SplitHomRef2hetUnsafeW(const uintptr_t* genoarr, uint32_t inword_ct, uintptr_t* __restrict hom_buf, uintptr_t* __restrict ref2het_buf);
+
+void SplitHomRef2het(const uintptr_t* genoarr, uint32_t sample_ct, uintptr_t* __restrict hom_buf, uintptr_t* __restrict ref2het_buf);
+
+
+// Support for 1-bit-per-haplotype representation.
+// Ok for genoarr to have garbage trailing bits.
+BoolErr HapsplitMustPhased(const uintptr_t* genoarr, const uintptr_t* phasepresent, const uintptr_t* phaseinfo, uint32_t sample_ct, uint32_t phasepresent_ct, uintptr_t* hap_arr, uintptr_t* nm_arr);
+
+// Only 1 haplotype per genotype, rather than 2; het treated as missing.
+void HapsplitHaploid(const uintptr_t* __restrict genoarr, uint32_t sample_ct, uintptr_t* __restrict hap_arr, uintptr_t* __restrict nm_arr);
+
+
+// These functions use 16- or 256-element lookup tables to apply functions of
+// the form
+//   f: {0,1,2,3} -> x
+// to genoarr, saving the output to result[].
+// 256-element tables result in a substantially faster inner loop, but they are
+// more expensive to set up and consume a non-negligible fraction of L1 cache,
+// so they aren't always the right choice.
+// When lookup table rows are 16 bytes, they are assumed to be 16-byte aligned
+// in 64-bit builds.  result[] is not assumed to be aligned.
+void GenoarrLookup256x1bx4(const uintptr_t* genoarr, const void* table256x1bx4, uint32_t sample_ct, void* __restrict result);
+
+void GenoarrLookup16x4bx2(const uintptr_t* genoarr, const void* table16x4bx2, uint32_t sample_ct, void* result);
+
+void GenoarrLookup256x2bx4(const uintptr_t* genoarr, const void* table256x2bx4, uint32_t sample_ct, void* result);
+
+void GenoarrLookup4x16b(const uintptr_t* genoarr, const void* table4x16b, uint32_t sample_ct, void* result);
+
+#define PAIR_TABLE16(a, b, c, d) \
+  {(a), (a), (b), (a), (c), (a), (d), (a), \
+  (a), (b), (b), (b), (c), (b), (d), (b), \
+  (a), (c), (b), (c), (c), (c), (d), (c), \
+  (a), (d), (b), (d), (c), (d), (d), (d)}
+
+void GenoarrLookup16x8bx2(const uintptr_t* genoarr, const void* table16x8bx2, uint32_t sample_ct, void* result);
+
+#define QUAD_TABLE256_INTERNAL2(a, b, c, d, f2, f3, f4) \
+  (a), (f2), (f3), (f4), \
+  (b), (f2), (f3), (f4), \
+  (c), (f2), (f3), (f4), \
+  (d), (f2), (f3), (f4)
+#define QUAD_TABLE256_INTERNAL3(a, b, c, d, f3, f4) \
+  QUAD_TABLE256_INTERNAL2((a), (b), (c), (d), (a), (f3), (f4)), \
+  QUAD_TABLE256_INTERNAL2((a), (b), (c), (d), (b), (f3), (f4)), \
+  QUAD_TABLE256_INTERNAL2((a), (b), (c), (d), (c), (f3), (f4)), \
+  QUAD_TABLE256_INTERNAL2((a), (b), (c), (d), (d), (f3), (f4))
+#define QUAD_TABLE256_INTERNAL4(a, b, c, d, f4) \
+  QUAD_TABLE256_INTERNAL3((a), (b), (c), (d), (a), (f4)), \
+  QUAD_TABLE256_INTERNAL3((a), (b), (c), (d), (b), (f4)), \
+  QUAD_TABLE256_INTERNAL3((a), (b), (c), (d), (c), (f4)), \
+  QUAD_TABLE256_INTERNAL3((a), (b), (c), (d), (d), (f4))
+#define QUAD_TABLE256(a, b, c, d) \
+  {QUAD_TABLE256_INTERNAL4((a), (b), (c), (d), (a)), \
+   QUAD_TABLE256_INTERNAL4((a), (b), (c), (d), (b)), \
+   QUAD_TABLE256_INTERNAL4((a), (b), (c), (d), (c)), \
+   QUAD_TABLE256_INTERNAL4((a), (b), (c), (d), (d))}
+
+void GenoarrLookup256x4bx4(const uintptr_t* genoarr, const void* table256x4bx4, uint32_t sample_ct, void* result);
+
+// Lookup table initialization functions.  table[0][0], [1][0], [2][0], and
+// [3][0] must be initialized to f(0), f(1), f(2), and f(3) respectively.
+void InitLookup16x4bx2(void* table16x4bx2);
+
+void InitLookup16x8bx2(void* table16x8bx2);
+
+#ifdef USE_SHUFFLE8
+// in bytes
+CONSTI32(kLookup256x1bx4Size, 1024 + 2 * kBytesPerVec);
+#else
+CONSTI32(kLookup256x1bx4Size, 1024);
+#endif
+
+void InitLookup256x1bx4(void* table256x1bx4);
+
+void InitLookup256x2bx4(void* table256x2bx4);
+
+void InitLookup256x4bx4(void* table256x4bx4);
+
+void PhaseLookup4b(const uintptr_t* genoarr, const uintptr_t* phasepresent, const uintptr_t* phaseinfo, const void* table56x4bx2, uint32_t sample_ct, void* result);
+
+// [0][0]..[3][0], [17][0], and [19][0] should contain the relevant values
+void InitPhaseLookup4b(void* table56x4bx2);
+
+void PhaseLookup8b(const uintptr_t* genoarr, const uintptr_t* phasepresent, const uintptr_t* phaseinfo, const void* table56x8bx2, uint32_t sample_ct, void* result);
+
+void InitPhaseLookup8b(void* table56x8bx2);
+
+// het-haploid prohibited.  64-entry table suffices: we use the same bits for
+// phasepresent and sex_male since they can't be true simultaneously.
+// phaseinfo is xor'd with bits 1 and 3 instead of 1 and 2.
+void PhaseXNohhLookup4b(const uintptr_t* genoarr, const uintptr_t* phasepresent, const uintptr_t* phaseinfo, const uintptr_t* sex_male, const void* table64x4bx2, uint32_t sample_ct, void* result);
+
+// [0][0]..[3][0], [16][0]..[19][0]
+void InitPhaseXNohhLookup4b(void* table64x4bx2);
+
+// uses same table as PhaseXNohhLookup
+void GenoarrSexLookup4b(const uintptr_t* genoarr, const uintptr_t* sex_male, const void* table64x4bx2, uint32_t sample_ct, void* result);
+
+void InitPhaseXNohhLookup8b(void* table64x8bx2);
+
+void GenoarrSexLookup8b(const uintptr_t* genoarr, const uintptr_t* sex_male, const void* table64x8bx2, uint32_t sample_ct, void* result);
+
+// Unlike PhaseLookup4b(), this allows the cur_phased bit to be set when the
+// genoarr entry is not 01 (het).
+void VcfPhaseLookup4b(const uintptr_t* genoarr, const uintptr_t* cur_phased, const uintptr_t* phaseinfo, const void* table246x4bx2, uint32_t sample_ct, void* __restrict result);
+
+// Precondition:
+//   [0], [2], [4], [6] initialized with unphased entries
+//   [32], [34], [36], [38] initialized with phased-unflipped entries
+//   [162] initialized with phased-flipped case
+void InitVcfPhaseLookup4b(void* table246x4bx2);
+
+void VcfPhaseLookup2b(const uintptr_t* genoarr, const uintptr_t* cur_phased, const uintptr_t* phaseinfo, const void* table246x2bx2, uint32_t sample_ct, void* __restrict result);
+
+void InitVcfPhaseLookup2b(void* table246x2bx2);
+
+
+// Analogue of BitIter1x.
+HEADER_INLINE uint32_t GenoIter1x(const uintptr_t* __restrict genoarr, uintptr_t match_word, uintptr_t* __restrict widxp, uintptr_t* __restrict cur_bitsp) {
+  uintptr_t cur_bits = *cur_bitsp;
+  while (!cur_bits) {
+    cur_bits = genoarr[++(*widxp)] ^ match_word;
+    cur_bits = (~(cur_bits | (cur_bits >> 1))) & kMask5555;
+  }
+  *cur_bitsp = cur_bits & (cur_bits - 1);
+  return ctzw(cur_bits);
+}
+
+// For every missing entry in genoarr, clear the corresponding subset and
+// sparse_vals entries.
+void ClearGenoarrMissing1bit8Unsafe(const uintptr_t* __restrict genoarr, uint32_t* subset_sizep, uintptr_t* __restrict subset, void* __restrict sparse_vals);
+
+void ClearGenoarrMissing1bit16Unsafe(const uintptr_t* __restrict genoarr, uint32_t* subset_sizep, uintptr_t* __restrict subset, void* __restrict sparse_vals);
+
+// See EasyasPi's answer to
+//   https://stackoverflow.com/questions/25095741/how-can-i-multiply-64-bit-operands-and-get-128-bit-result-portably
+HEADER_INLINE uint64_t multiply64to128(uint64_t lhs, uint64_t rhs, uint64_t* high) {
+  // GCC and Clang usually provide __uint128_t on 64-bit targets, although
+  // Clang also defines it on WASM despite having to use builtins for most
+  // purposes -- including multiplication.
+#if defined(__SIZEOF_INT128__) && !defined(__wasm__)
+  __uint128_t product = S_CAST(__uint128_t, lhs) * S_CAST(__uint128_t, rhs);
+  *high = S_CAST(uint64_t, product >> 64);
+  return S_CAST(uint64_t, product & 0xffffffffffffffffLLU);
+#else
+  // Fast yet simple grade school multiply that avoids 64-bit carries with the
+  // properties of multiplying by 11 and takes advantage of UMAAL on ARMv6 to
+  // only need 4 calculations.
+
+  // First calculate all of the cross products.
+  uint64_t lo_lo = (lhs & 0xffffffff) * (rhs & 0xffffffff);
+  uint64_t hi_lo = (lhs >> 32) * (rhs & 0xffffffff);
+  uint64_t lo_hi = (lhs & 0xffffffff) * (rhs >> 32);
+  uint64_t hi_hi = (lhs >> 32) * (rhs >> 32);
+  // Now add the products together.  These will never overflow.
+  uint64_t cross = (lo_lo >> 32) + (hi_lo & 0xffffffff) + lo_hi;
+  uint64_t upper = (hi_lo >> 32) + (cross >> 32) + hi_hi;
+
+  *high = upper;
+  return (cross << 32) | (lo_lo & 0xffffffff);
+#endif
+}
+
+HEADER_INLINE double u127tod(uint64_t hi, uint64_t lo) {
+  return u63tod(hi) * 18446744073709551616.0 + S_CAST(double, lo);
+}
+
+// plus_term0 * plus_term1 - minus_term0 * minus_term1
+double u127prod_diff_d(uint64_t plus_term0, uint64_t plus_term1, uint64_t minus_term0, uint64_t minus_term1);
+
+double i127prod_diff_d(uint64_t plus_term0, uint64_t plus_term1, uint64_t minus_term0, uint64_t minus_term1);
+
+double MultiallelicDiploidMinimac3R2(const uint64_t* __restrict sums, const uint64_t* __restrict hap_ssqs_x2, uint32_t nm_sample_ct, uint32_t allele_ct, uint32_t extra_phased_het_ct);
+
+HEADER_INLINE double MultiallelicDiploidMachR2(const uint64_t* __restrict sums, const uint64_t* __restrict ssqs, uint32_t nm_sample_ct, uint32_t allele_ct) {
+  return 2 * MultiallelicDiploidMinimac3R2(sums, ssqs, nm_sample_ct, allele_ct, 0);
+}
+
+// ----- end plink2_common subset -----
+
+// other configuration-ish values
+// this part of the specification is set in stone.
+
+CONSTI32(kPglVblockSize, 65536);
+
+// kPglDifflistGroupSize defined in plink2_base
+
+// Currently chosen so that it plus kPglFwriteBlockSize + kCacheline - 2 is
+// < 2^32, so DivUp(kPglMaxBytesPerVariant + kPglFwriteBlockSize - 1,
+// kCacheline) doesn't overflow.
+static const uint32_t kPglMaxBytesPerVariant = 0xfffdffc0U;
+// CONSTI32(kPglMaxBytesPerDataTrack, 0x7ffff000);
+// static_assert(kMaxBytesPerIO >= (int32_t)kPglMaxBytesPerDataTrack, "pgenlib assumes a single variant data track always fits in one fread/fwrite operation.");
+
+FLAGSET_DEF_START()
+  kfPgenGlobal0,
+  kfPgenGlobalLdCompressionPresent = (1 << 0),
+  kfPgenGlobalDifflistOrLdPresent = (1 << 1),
+
+  // Only guaranteed to be set when present if phase or dosage also present.
+  kfPgenGlobalMultiallelicHardcallFound = (1 << 2),
+
+  kfPgenGlobalHardcallPhasePresent = (1 << 3),
+  kfPgenGlobalDosagePresent = (1 << 4),
+  kfPgenGlobalDosagePhasePresent = (1 << 5),
+  kfPgenGlobalAllNonref = (1 << 6)
+FLAGSET_DEF_END(PgenGlobalFlags);
+
+// difflist/LD compression must not involve more than
+//   raw_sample_ct / kPglMaxDifflistLenDivisor
+// entries.  (however, returned difflists can have up to twice as many entries,
+// when a variant is LD-compressed and the reference variant is
+// difflist-compressed.)
+// This value can be considered set in stone.
+CONSTI32(kPglMaxDifflistLenDivisor, 8);
+
+// Threshold for using a deltalist to represent a bitarray on disk (currently
+// relevant for dosage data).  This is a tunable parameter, but must be >=
+// kPglMaxDifflistLenDivisor.
+CONSTI32(kPglMaxDeltalistLenDivisor, 9);
+
+void PgrDifflistToGenovecUnsafe(const uintptr_t* __restrict raregeno, const uint32_t* difflist_sample_ids, uintptr_t difflist_common_geno, uint32_t sample_ct, uint32_t difflist_len, uintptr_t* __restrict genovec);
+
+// This covers all the possibilities.  Todo: switch all functions exporting
+// multiallelic codes and/or phased dosage to use this struct.  (Biallelic
+// phased hardcalls and unphased dosages are simple enough for this to be
+// overkill, though.)
+typedef struct PgenVariantStruct {
+  uintptr_t* genovec;
+  uintptr_t* patch_01_set;
+  AlleleCode* patch_01_vals;
+  uintptr_t* patch_10_set;
+  AlleleCode* patch_10_vals;
+  uintptr_t* phasepresent;
+  uintptr_t* phaseinfo;
+  uintptr_t* dosage_present;
+  uint16_t* dosage_main;
+  uintptr_t* multidosage_present;
+  unsigned char* multidosage_cts;
+  AlleleCode* multidosage_codes;
+  uint16_t* multidosage_vals;
+  uintptr_t* dphase_present;
+  int16_t* dphase_delta;
+  uintptr_t* multidphase_present;
+  unsigned char* multidphase_cts;
+  AlleleCode* multidphase_codes;
+  int16_t* multidphase_delta;
+
+  uint32_t patch_01_ct;
+  uint32_t patch_10_ct;
+  uint32_t phasepresent_ct;
+  uint32_t dosage_ct;
+  uint32_t multidosage_sample_ct;
+  uint32_t dphase_ct;
+  uint32_t multidphase_sample_ct;
+} PgenVariant;
+
+HEADER_INLINE uintptr_t GetAux1bAlleleEntryByteCt(uint32_t allele_ct, uint32_t rare10_ct) {
+  assert(allele_ct >= 3);
+  if (allele_ct == 3) {
+    return DivUp(rare10_ct, 8);
+  }
+  if (allele_ct < 6) {
+    return DivUp(rare10_ct, 2);
+  }
+  // one byte per entry for allele_ct <= 17, two bytes for 18..256
+  return ((allele_ct >= 18) + 1) * rare10_ct;
+  // todo: allele_ct > 257
+}
+
+extern const uint16_t kHcToAlleleCodes[1024];
+
+// Permits missing codes, does not remap.
+void PglMultiallelicSparseToDenseMiss(const PgenVariant* pgvp, uint32_t sample_ct, AlleleCode* __restrict wide_codes);
+
+uintptr_t PglComputeMaxAlleleCt(const uintptr_t* allele_idx_offsets, uint32_t variant_ct);
+
+HEADER_INLINE AlleleCode GetAidx(const uintptr_t* allele_idx_offsets, uint32_t variant_uidx, uintptr_t allele_idx) {
+  if (!allele_idx_offsets) {
+    return allele_idx - 2 * variant_uidx;
+  }
+  return allele_idx - allele_idx_offsets[variant_uidx];
+}
+
+uint32_t CountNybble(const void* nybblearr, uintptr_t nybble_word, uintptr_t nybble_ct);
+
+// The actual format:
+// 1. 2 magic bytes 0x6c 0x1b.
+//
+// 2. Mode byte.
+//      0x01 = plink1 variant-major.
+//      0x02 = plink2 basic variant-major.  variant/sample counts in header,
+//             00 = hom ref, 01 = het, 10 = hom alt, 11 = missing.  (vrtype 0)
+//      0x03 = plink2 basic unphased dosage (vrtype 0x40)
+//      0x04 = plink2 basic phased dosage (vrtype 0xc0)
+//      These are designed to be easy to write.  Note that the dosage formats
+//      require hardcalls to be stored as well; however, you can just set them
+//      to all-missing and then use
+//        plink2 --hard-call-threshold <...> --make-pgen
+//      to populate them.
+//
+//      0x10 = variable-type and/or variable-length records present.
+//      0x11 = mode 0x10, but with phase set information at the end of the
+//             file.
+//      0x05..0x0f and 0x12..0x7f are reserved for possible use by future
+//      versions of the PGEN specification, and 0 is off-limits (PLINK 1
+//      sample-major .bed).
+//      0x80..0xff can be safely used by developers for their own purposes.
+//
+// 3. If not plink1-format,
+//    a. 4-byte # of variants; call this M.
+//    b. 4-byte # of samples, call this N.
+//    c. Additional 1-byte header 'control' value (PgenHeaderCtrl).  May be
+//       extended in the future.
+//       bits 0-3: Indicates vrtype and variant record length storage widths.
+//         If bit 3 is unset, bits 0-1 store (vrec_len_byte_ct - 1), while bit
+//         2 is set iff phase or dosage info is present (requiring 8 bits
+//         instead of 4 bits for vrtypes).
+//         If bit 3 is set, a specialized encoding is used which combines the
+//         two pieces of information (reducing the overhead for files with few
+//         samples).  The following encodings are now defined (note that there
+//         was a change of plans in Mar 2019):
+//           8: 1 bit per fused vrtype-length.  Unset = vrtype 5, set = vrtype
+//              0.
+//           9: 2 bits, multiallelic.  0 = vrtype 5, 1 = vrtype 0, 2-3 = vrtype
+//              8 with that many more bytes than vrtype 0.  Note that this is
+//              limited to 16 ALT alleles.
+//          10: 2 bits, phased.  0 = vrtype 5, 1 = vrtype 0, 2-3 = vrtype 16
+//              with that many minus 1 bytes beyond vrtype 0.  While this is
+//              also aimed at the single-sample use case, it technically
+//              supports up to 15 always-phased or 7 partially-phased samples.
+//          11: 4 bits, multiallelic + phased.  0 = vrtype 5, 1 = vrtype 0, 2-7
+//              = vrtype 8 with that many bytes beyond vrtype 0, 9 = vrtype 16
+//              phase info requiring just 1 byte, 10-15 = vrtype 24 with (x-7)
+//              extra bytes required between multiallelic and phased tracks.
+//          12: 2 bits, dosage, must be single-sample.  0 = vrtype 5, 1 =
+//              vrtype 0, 2 = vrtype 0x45 with 2 bytes, 3 = vrtype 0x40 with 3
+//              total bytes.
+//          13: reserved for single-sample multiallelic + dosage.
+//          14: 4 bits, phased + dosage, must be single-sample.  0 and 1 as
+//              usual, 3 = vrtype 16 with 1 phaseinfo byte, 4 = vrtype 0x45
+//              with 2 bytes, 5 = vrtype 0x40 with 3 total bytes, 12 = vrtype
+//              0xc5 with 4 total bytes, 13 = vrtype 0xc0 with 5 total bytes,
+//              15 = vrtype 0xe0 with 6 total bytes
+//          15: reserved for single-sample multiallelic + phased dosage.
+//       bits 4-5: allele count storage (00 = unstored, 01-11 = bytes per ct)
+//       bits 6-7: nonref flags info (00 = unstored, 01 = all ref/alt, 10 =
+//                 never ref/alt, 11 = explicitly stored)
+//       Bits 0-5 do not apply to the fixed-length modes (currently 0x02-0x04)
+//       and should be zeroed out in that case.
+//
+// 4. If mode 0x10/0x11,
+//    a. Array of 8-byte fpos values for the first variant in each vblock.
+//       (Note that this suggests a way to support in-place insertions: some
+//       unused space can be left between the vblocks.)
+//    b. Sequence of header blocks, each containing information about
+//       kPglVblockSize variants (except the last may be shorter).  All values
+//       are known-width, to allow e.g. plink2 --make-pgen/--pmerge to compress
+//       all variant records first, then fseek to the beginning of the output
+//       file and write the header.
+//         i. array of 4-bit or 1-byte vrtypes.
+//        ii. array of variant record lengths (each occupying vrec_len_byte_ct
+//            bytes, or 2-4 bits).
+//       iii. if bits 4-5 of {3c} aren't 00, array of alt allele counts.
+//        iv. nonref flags info, if explicitly stored
+//      (this representation allows more efficient random access)
+//    If mode 0x02-0x04, and nonref flags info explicitly stored, just that
+//    bitarray.
+//
+// 5. The variant records.  See below for details.
+
+// Difflist format:
+//   a. <difflist_len VINT>
+//   If difflist_len is zero, that's it.  Otherwise, the difflist is organized
+//   into 64-element groups (the last group will usually be smaller), to make
+//   extraction of e.g. a single sample less painful.  Note that with 20k
+//   samples, a difflist is space-saving even with MAF 5%:
+//     ~1/400 hom alt + ~38/400 het = (~39/400) * 20k
+//                                  = ~1950 sample IDs.
+//     that's 31 groups, requiring about 2 + 62 + 30 + 488 + 1919 = 2501 bytes
+//     (can be slightly higher since a few ID deltas may be larger than 127);
+//     uncompressed storage requires 5000 bytes.
+//   b. <array of group start sample IDs, each of sample_id_byte_ct>
+//   c. <array of 1-byte <delta segment lengths minus 63>, with last entry
+//      omitted>
+//   d. <optional payload of fixed-width genotype values>
+//      (in retrospect, it might have been better to position this after (e)
+//      to avoid entanglement with the packed-bitarray definition, oh well...)
+//   e. one "delta segment"/group: <array of <group size - 1> VINT values,
+//      each indicating the difference between the current and previous sample
+//      IDs; i.e. value is 1 for two consecutive samples>
+
+// Variant record type ('vrtype') coding:
+// bits 0-2:
+//   000 = Simple 2-bit encoding.
+//   100, 110, 111 = Simple difflist.  Low two bits store the base value.  (101
+//                   isn't here since Hardy-Weinberg equilibrium prevents
+//                   all het ref/alt from arising much in practice, outside of
+//                   alignment/variant-calling technical artifacts that should
+//                   be removed.)
+//   010 = Differences-from-earlier-variant encoding ("LD compression").  The
+//         last variant without this type of encoding is the base.
+//         To simplify random access logic, the first variant in each vblock is
+//         prohibited from using this encoding.
+//   011 = Inverted differences-from-earlier-variant encoding.  (This covers
+//         the case where a reference allele is 'wrong'.)  When decoding, the
+//         difflist should be processed first, then the entire genovec should
+//         be flipped.
+//   001 = 1-bit + difflist representation.  Suppose most calls are hom ref or
+//         het (e.g. a 20% MAF variant with ~4% hom alt1, ~36% het ref/alt1,
+//         ~64% hom ref), then the main datatrack has just the low bits of the
+//         usual 2-bit codes.  This is followed by a difflist containing the
+//         hom alt1 and missing genotypes.
+//         The main datatrack is preceded by a single byte indicating what
+//         the two common values are: 2 low bits = <set value - unset value>,
+//         next 2 bits = unset value (6 possibilities).  Top 4 bits are
+//         reserved.
+//   101 = All alleles are reference, no missing data.  The main datatrack is
+//         empty in this case.  Although this saves only 1 byte per variant
+//         over vrtype 100, this actually makes a huge difference for
+//         single-sample files.
+//         Since this was not defined until mid-2019, the standard plink2
+//         alpha-test binaries will not use this encoding.  However,
+//         alpha-2-final and later binaries interpret this encoding correctly.
+//         If your workflow makes heavy use of single-sample .pgen files, you
+//         can add -DFUTURE_ENCODER during compilation to unlock this feature.
+//
+// bit 3: multiallelic hardcalls present with alt2/alt3/... present?  If yes,
+//        auxiliary data track #1 disambiguates the 0b01 (ref/altx) and 0b10
+//        (altx/alty, x may equal y) hardcalls.  This contains a format byte,
+//        followed by a list of ref/altx patches, then a list of altx/alty
+//        patches.  All unpatched genotypes are ref/alt1 or alt1/alt1.
+//        The bottom 4 bits of the format byte describe how the ref/altx patch
+//        set is stored.
+//   0 = Starts with a bitarray with <total ref/altx count> bits (divide by 8
+//       and round up to get byte count of this component; any trailing bits in
+//       the last byte must be 0), where each set bit corresponds to presence
+//       of a rarealt (i.e. alt2/alt3/...).
+//       ExpandBytearr(aux1_first_quarter, all_01, raw_sample_ctl, ct_01, 0,
+//                     patch_01);
+//       can be used to convert this into a set of sample IDs, though we may
+//       want to avoid an intermediate unpacking step in practice.  Note that
+//       when we're passing in sample_ct < raw_sample_ct and the main datatrack
+//       is LD-compressed, we'd like ldbase_raw_genovec to be cached.
+//       This is followed by a packed array of fixed-width <allele idx - 2>
+//       values, where the width depends on the total number of alt alleles.
+//       2 alts: width ZERO.  All set bits in the first bitarray correspond
+//               to ref/alt2.
+//       3 alts: width 1 bit.  Set bits correspond to ref/alt3, clear bits
+//               correspond to ref/alt2.
+//       4-5 alts: width 2 bits.  0b00 corresponds to ref/alt2, 0b01 =
+//                 ref/alt3, 0b10 = ref/alt4, etc.
+//       6-17 alts: width 4 bits.
+//       18-257 alts: width 8 bits.
+//       258-65537 alts: width 16 bits.
+//       65538-16777215 alts: width 24 bits.  Reasonable to prohibit more than
+//                            2^24 - 1 = 16777215, since variant records are
+//                            limited to 4 GiB.  I can imagine some
+//                            applications of >65534 in highly variable
+//                            regions, though, and it doesn't actually cost us
+//                            anything to define a way to represent it.  (A
+//                            plink2 binary compiled with AlleleCode typedef'd
+//                            as uint32_t will run more slowly, of course, but
+//                            most binaries will not be compiled that way.)
+//   1 = Same as mode 0, except the initial bitarray is replaced by a difflist
+//       with sample IDs.  (We could make that piece somewhat smaller by
+//       storing 0-based ref/altx indexes instead, but I'm pretty sure that
+//       isn't worth the performance penalty of requiring all_01 and more
+//       complicated unpacking.  Though we'll need to peek at aux1[0] before
+//       decompressing the main datatrack to exploit this.)
+//   15 = Empty patch set.  Might remove this (storing this as mode 1 just
+//        takes 1 more byte), but it may enable some relevant performance
+//        optimizations.
+//   2-14 are reserved for future use.  We don't define an efficient way to
+//   represent a variant that e.g. has more alt2s than alt1s for now, since alt
+//   alleles will usually be sorted in order of decreasing frequency, but maybe
+//   this will matter in the future.
+//
+//   The top 4 bits describe how the altx/alty patch set is stored.  0/1/15
+//   have the same meaning as they do for the ref/altx patch set; the only
+//   thing that changes is the format of the packed array of values at the end.
+//   2 alts: width 1.  This is treated as a special case.  Set bits correspond
+//           to alt2/alt2, clear = alt1/alt2.
+//   3-4 alts: width 2+2 bits.  Each stores <allele idx - 1>, with the smaller
+//             number in the lower bits.  E.g. alt1/alt2 is stored as 0b0100;
+//             alt3/alt3 is stored as 0b1010.
+//   5-16 alts: width 4+4 bits.
+//   17-256 alts: width 8+8 bits.
+//   257-65536 alts: width 16+16 bits.
+//   65537-16777215 alts: width 24+24 bits.
+//
+// bit 4: hardcall phased?  If yes, auxiliary data track #2 contains phasing
+//        information for heterozygous calls.
+//        The first *bit* of the track indicates whether an explicit
+//        "phasepresent" bitarray is stored.  If it's set, the next het_ct bits
+//        are 1-bit values, where 0 = no phasing info known, and 1 = phasing
+//        info present.  If it's unset, phasing info is present for every het
+//        call.
+//        This is followed by a "phaseinfo" bitarray, where 0 = unswapped,
+//        1 = swapped (e.g. "1|0" in VCF).
+//        This track is normally unpacked into fixed-size bitarrays when
+//        loaded, but a raw mode is also provided (which doesn't support
+//        subsetting).
+//        By default, entire chromosomes/contigs are assumed to be phased
+//        together.  (Todo: support contiguous phase sets.)
+//
+// bits 5-6:
+//   00 = no dosage data.
+//   01 = dosage list.  Auxiliary data track #3 contains a delta-encoded list
+//        of sample IDs (like a difflist, but with no genotypes).  Track #4
+//        contains a 16-bit (0..2^15; 65535 missing value is only permitted in
+//        unconditional-dosage case) value expressing the sum of all alt allele
+//        dosages.  (Yes, making this the ref allele dosage would have been a
+//        bit cleaner, but it's too late now.)
+//        If the variant is multiallelic, nonzero alt2/alt3/... dosages are
+//        likely to be sparse.  So,
+//        - track #5 contains a delta-encoded list describing which
+//          <sample_uidx x rarealt dosage> entries are nonzero, where rarealt
+//          index is in the lowest bits and sample_uidx can be computed via
+//          right-shift (to avoid integer-division headaches, especially
+//          important since indexes in this list can be larger than 2^32).
+//          We use sample_uidx here to make subsetting less painful.
+//          Since each nonzero dosage value requires 16 bits, and
+//          delta-encoding of a dense list adds less than 9 bits per entry,
+//          there isn't much point in supporting a dense bitarray mode here.
+//          To keep memory requirements sane for biobank-scale datasets when
+//          the number of alt alleles is very large, each sample is prohibited
+//          from having more than 255 nonzero allele dosages (this makes no
+//          difference when sizeof(AlleleCode) == 1, but it may matter later).
+//        - track #6 contains the rarealt nonzero dosage values.
+//        Note that this and the other dosage modes are in ADDITION to
+//        hardcalls.  This increases filesize by up to 12.5%, but makes the
+//        reader substantially simpler; --hard-call-threshold logic is nicely
+//        compartmentalized.
+//   10 = unconditional dosage (just track #4).
+//   11 = dosage bitarray.  In this case, auxiliary data track #3 contains an
+//        array of 1-bit values indicating which samples have dosages.  If the
+//        variant is multiallelic, tracks #5 and 6 are as described above.
+//   bgen 1.2 format no longer permits fractional missingness, so no good
+//   reason for us to support it.
+//   Considered putting *all* dosage data at the end of the file (like I will
+//   do for phase set info); this could actually be worthwhile for
+//   unconditional dosages, but it doesn't work well when only some samples
+//   have dosage data.
+// bit 7: some dosages explicitly phased?  If yes, and dosages are not
+//        unconditionally present, auxiliary data track #7 is a bitarray of
+//        length dosage_ct indicating whether dphase_delta exists for that
+//        sample.  Note that this is technically independent of bit 4; either
+//        can be set without the other.  (However, in practice, bit 4 is almost
+//        always set when bit 7 is, since that enables more efficient storage
+//        of 0|0.99, 1|0.02, and similar pairs.)
+//        When phased dosages are present, track #8 contains values
+//        representing <(hap1 alt prob) - (hap2 alt prob)>, etc., where the
+//        underlying values are represented in [0..16384] (so the signed
+//        difference is in [-16384..16384]).  Track #4 contains the
+//        corresponding sums; parity does NOT need to match (necessary to allow
+//        this since we treat omitted values as zero; and since we are allowing
+//        it, no point in making parity match in other situations either).  In
+//        fixed-width case, -32768 should be stored in track #8 when the entire
+//        call is missing, while 0 and missing-phase are considered synonymous.
+//        In the biallelic case, if a hardcall is phased, a dosage is present,
+//        and no explicit dosage-phase is, we define it to mean the unique
+//        dphase_delta sequence with maximal absolute value, and --make-pgen
+//        takes advantage of it.  This definition technically works for
+//        triallelic variants as well, but it breaks down with 4 alleles, so we
+//        prohibit hardcall-phase + dosage + no-dosage-phase with more than 2
+//        alleles.
+//        In the multiallelic case, tracks #9 and #10 are analogous to #5 and
+//        #6.
+//
+// Representation of variable ploidy (MT) was considered, but rejected since
+// dosages should be at least as appropriate for MT.
+// Oxford/VCF-style storage of separate probabilities for every possible
+// genotype (e.g. P(AA), P(AB), P(BB) instead of just 2P(AA) + P(AB) and
+// 2P(BB) + P(AB)) is tentatively rejected due to (i) lack of relevance to
+// PLINK's analysis functions and (ii) high storage cost where we can afford it
+// least.  In principle, this is subject to reevaluation if (i) changes, but
+// given the poor interaction with phased dosages, it's probably better to just
+// think of them as permanently outside PLINK's scope.
+
+// maximum prime < 2^32 is 4294967291; quadratic hashing guarantee breaks down
+// past that divided by 2.
+CONSTI32(kPglMaxVariantCt, 0x7ffffffd);
+
+CONSTI32(kPglMaxSampleCt, 0x7ffffffe);
+
+uint64_t PglHeaderBaseEndOffset(uint32_t variant_ct, uintptr_t vrec_len_byte_ct, uint32_t phase_or_dosage_present, uint32_t explicit_nonref_flags);
+
+// Current pgen-extension API assumes .pgen extension bodies fit comfortably in
+// memory.
+// It's easy to imagine a useful extension that breaks this assumption, e.g.
+// storage of VCF FORMAT/GQ and FORMAT/DP.  There's an escape hatch --
+// extensions are allowed to refer to additional files.  We'll see whether that
+// proves to be enough.
+typedef struct PgenExtensionLlStruct {
+  struct PgenExtensionLlStruct* next;
+  uint64_t size;
+  unsigned char* contents;
+  uint8_t type_idx;
+} PgenExtensionLl;
+
+#ifdef __cplusplus
+}  // namespace plink2
+#endif
+
+#endif  // __PGENLIB_MISC_H__
diff --git a/external_libs/pgenlib/include/pgenlib_misc.o b/external_libs/pgenlib/include/pgenlib_misc.o
new file mode 100644
index 0000000..0a4ab65
Binary files /dev/null and b/external_libs/pgenlib/include/pgenlib_misc.o differ
diff --git a/external_libs/pgenlib/include/pgenlib_read.cc b/external_libs/pgenlib/include/pgenlib_read.cc
new file mode 100644
index 0000000..8c2f7a0
--- /dev/null
+++ b/external_libs/pgenlib/include/pgenlib_read.cc
@@ -0,0 +1,10547 @@
+// This library is part of PLINK 2.0, copyright (C) 2005-2024 Shaun Purcell,
+// Christopher Chang.
+//
+// This library is free software: you can redistribute it and/or modify it
+// under the terms of the GNU Lesser General Public License as published by the
+// Free Software Foundation; either version 3 of the License, or (at your
+// option) any later version.
+//
+// This library is distributed in the hope that it will be useful, but WITHOUT
+// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public License
+// for more details.
+//
+// You should have received a copy of the GNU Lesser General Public License
+// along with this library.  If not, see <http://www.gnu.org/licenses/>.
+
+
+#include "pgenlib_read.h"
+
+#include <errno.h>
+
+#ifdef __cplusplus
+namespace plink2 {
+#endif
+
+static inline PgenReaderMain* GetPgrp(PgenReader* pgr_ptr) {
+  return &GET_PRIVATE(*pgr_ptr, m);
+}
+
+static inline const uint32_t* GetSicp(PgrSampleSubsetIndex pssi) {
+  return GET_PRIVATE(pssi, cumulative_popcounts);
+}
+
+// The subset of this codebase used by pgenlibr (which is compiled with
+// -DNO_UNALIGNED and -DPGENLIB_NOPRINT) is now subject to additional
+// restrictions.  In particular:
+// - No unaligned loads/stores/pointers, or other undefined behavior.
+// - The PRI{d,u}PTR and PRI{d,u}64 printf format-specifiers cannot be used.  I
+//   hope to remove this restriction later, but for now they make Windows
+//   compilation a clusterfuck.
+// - No exit(), or printing to stdout/stderr.
+// - No flexible array members.
+// - Not a restriction yet, but we want to properly distinguish between
+//   __LP64__ and USE_SSE2.
+#ifdef USE_SSE2
+void SmallGenoarrCount3FreqIncr(const unsigned char* genoarrb_iter, uint32_t byte_ct, uint32_t* even_ctp, uint32_t* odd_ctp, uint32_t* bothset_ctp) {
+  for (uint32_t bytes_left = byte_ct; ; ) {
+    uintptr_t cur_geno_word;
+    if (bytes_left < kBytesPerWord) {
+      if (!bytes_left) {
+        return;
+      }
+      cur_geno_word = ProperSubwordLoad(genoarrb_iter, bytes_left);
+      bytes_left = 0;
+    } else {
+      CopyFromUnalignedIncrW(&cur_geno_word, &genoarrb_iter);
+      bytes_left -= kBytesPerWord;
+    }
+    const uintptr_t cur_geno_word_high = kMask5555 & (cur_geno_word >> 1);
+    *even_ctp += Popcount01Word(cur_geno_word & kMask5555);
+    *odd_ctp += Popcount01Word(cur_geno_word_high);
+    *bothset_ctp += Popcount01Word(cur_geno_word & cur_geno_word_high);
+  }
+}
+#endif
+
+void GenoarrbCountFreqs(const unsigned char* genoarrb, uint32_t sample_ct, STD_ARRAY_REF(uint32_t, 4) genocounts) {
+  // does not read past the end of genoarrb
+  uint32_t even_ct = 0;
+  uint32_t odd_ct = 0;
+  uint32_t bothset_ct = 0;
+#ifndef USE_SSE2
+  const uintptr_t* geno_firstw_start;
+  const uint32_t lead_byte_ct = AlignKToW(genoarrb, &geno_firstw_start);
+  uint32_t byte_ct = NypCtToByteCt(sample_ct);
+  uintptr_t cur_geno_word;
+  uint32_t fullword_ct;
+  uint32_t trail_byte_ct;
+  if (lead_byte_ct) {
+    if (lead_byte_ct >= byte_ct) {
+      cur_geno_word = ProperSubwordLoad(genoarrb, byte_ct);
+      goto GenoarrbCountFreqsLastWord;
+    }
+    cur_geno_word = ProperSubwordLoad(genoarrb, lead_byte_ct);
+    const uintptr_t cur_geno_word_high = kMask5555 & (cur_geno_word >> 1);
+    even_ct += Popcount01Word(cur_geno_word & kMask5555);
+    odd_ct += Popcount01Word(cur_geno_word_high);
+    bothset_ct += Popcount01Word(cur_geno_word & cur_geno_word_high);
+    byte_ct -= lead_byte_ct;
+  }
+  fullword_ct = byte_ct / kBytesPerWord;
+  for (uint32_t widx = 0; widx != fullword_ct; ++widx) {
+    cur_geno_word = geno_firstw_start[widx];
+    const uintptr_t cur_geno_word_high = kMask5555 & (cur_geno_word >> 1);
+    even_ct += Popcount01Word(cur_geno_word & kMask5555);
+    odd_ct += Popcount01Word(cur_geno_word_high);
+    bothset_ct += Popcount01Word(cur_geno_word & cur_geno_word_high);
+  }
+  trail_byte_ct = byte_ct % kBytesPerWord;
+  if (trail_byte_ct) {
+    cur_geno_word = ProperSubwordLoad(&(geno_firstw_start[fullword_ct]), trail_byte_ct);
+  GenoarrbCountFreqsLastWord:
+    const uintptr_t cur_geno_word_high = kMask5555 & (cur_geno_word >> 1);
+    even_ct += Popcount01Word(cur_geno_word & kMask5555);
+    odd_ct += Popcount01Word(cur_geno_word_high);
+    bothset_ct += Popcount01Word(cur_geno_word & cur_geno_word_high);
+  }
+#else // USE_SSE2
+  const uint32_t lead_byte_ct = (-R_CAST(uintptr_t, genoarrb)) % kBytesPerVec;
+  const unsigned char* genoarrb_iter;
+  uint32_t trail_ct;
+  if (sample_ct >= lead_byte_ct * 4 + (6 * kNypsPerVec)) {
+    // Only enter this branch if we can execute at least one iteration of the
+    // main vectorized loop.
+    const uint32_t remaining_sample_ct = sample_ct - 4 * lead_byte_ct;
+    SmallGenoarrCount3FreqIncr(genoarrb, lead_byte_ct, &even_ct, &odd_ct, &bothset_ct);
+    genoarrb_iter = &(genoarrb[lead_byte_ct]); // now vector-aligned
+    const uint32_t remaining_full_vec_ct = remaining_sample_ct / kNypsPerVec;
+    uint32_t even_ct_incr;
+    uint32_t odd_ct_incr;
+    uint32_t bothset_ct_incr;
+    const uint32_t vec_ct = remaining_full_vec_ct - (remaining_full_vec_ct % 6);
+    Count3FreqVec6(genoarrb_iter, vec_ct, &even_ct_incr, &odd_ct_incr, &bothset_ct_incr);
+    even_ct += even_ct_incr;
+    odd_ct += odd_ct_incr;
+    bothset_ct += bothset_ct_incr;
+    genoarrb_iter = &(genoarrb_iter[kBytesPerVec * vec_ct]);
+    trail_ct = remaining_sample_ct - (vec_ct * kNypsPerVec);
+  } else {
+    genoarrb_iter = genoarrb;
+    trail_ct = sample_ct;
+  }
+  const uint32_t trail_byte_ct = NypCtToByteCt(trail_ct);
+  SmallGenoarrCount3FreqIncr(genoarrb_iter, trail_byte_ct, &even_ct, &odd_ct, &bothset_ct);
+#endif
+  genocounts[0] = sample_ct + bothset_ct - even_ct - odd_ct;
+  genocounts[1] = even_ct - bothset_ct;
+  genocounts[2] = odd_ct - bothset_ct;
+  genocounts[3] = bothset_ct;
+}
+
+void GenoarrbCountSubsetFreqs(const unsigned char* genoarrb, const uintptr_t* __restrict sample_include_interleaved_vec, uint32_t raw_sample_ct, uint32_t sample_ct, STD_ARRAY_REF(uint32_t, 4) genocounts) {
+  // does not read past the end of genoarrb
+  const uint32_t raw_sample_ctv2 = NypCtToVecCt(raw_sample_ct);
+  uint32_t even_ct;
+  uint32_t odd_ct;
+  uint32_t bothset_ct;
+  uint32_t vec_idx = raw_sample_ctv2 - (raw_sample_ctv2 % 6);
+  CountSubset3FreqVec6(genoarrb, R_CAST(const VecW*, sample_include_interleaved_vec), vec_idx, &even_ct, &odd_ct, &bothset_ct);
+  const unsigned char* genoarrb_iter = &(genoarrb[kBytesPerVec * vec_idx]);
+#ifdef __LP64__
+  const uintptr_t* interleaved_mask_iter = &(sample_include_interleaved_vec[vec_idx * (kWordsPerVec / 2)]);
+#else
+  // bugfix (19 Jul 2018): (kWordsPerVec / 2) doesn't work in 32-bit case
+  const uintptr_t* interleaved_mask_iter = &(sample_include_interleaved_vec[(vec_idx * kWordsPerVec) / 2]);
+#endif
+#ifdef USE_AVX2
+  const uint32_t halfvec_idx_trail = (raw_sample_ct + 3) / (kBitsPerVec / 4);
+  uintptr_t mask_base1 = 0;
+  uintptr_t mask_base2 = 0;
+  uintptr_t mask_base3 = 0;
+  uintptr_t mask_base4 = 0;
+  for (; vec_idx != raw_sample_ctv2; ++vec_idx) {
+    uintptr_t mask_word1;
+    uintptr_t mask_word2;
+    uintptr_t mask_word3;
+    uintptr_t mask_word4;
+    if (!(vec_idx % 2)) {
+      mask_base1 = *interleaved_mask_iter++;
+      mask_base2 = *interleaved_mask_iter++;
+      mask_base3 = *interleaved_mask_iter++;
+      mask_base4 = *interleaved_mask_iter++;
+      mask_word1 = mask_base1 & kMask5555;
+      mask_word2 = mask_base2 & kMask5555;
+      mask_word3 = mask_base3 & kMask5555;
+      mask_word4 = mask_base4 & kMask5555;
+    } else {
+      mask_word1 = (mask_base1 >> 1) & kMask5555;
+      mask_word2 = (mask_base2 >> 1) & kMask5555;
+      mask_word3 = (mask_base3 >> 1) & kMask5555;
+      mask_word4 = (mask_base4 >> 1) & kMask5555;
+    }
+    uint32_t vechalf_idx = 0;
+    while (1) {
+      uintptr_t cur_geno_word1;
+      uintptr_t cur_geno_word2;
+      if (2 * vec_idx + vechalf_idx < halfvec_idx_trail) {
+        CopyFromUnalignedIncrW(&cur_geno_word1, &genoarrb_iter);
+        CopyFromUnalignedIncrW(&cur_geno_word2, &genoarrb_iter);
+      } else {
+        // bugfix (19 May 2022): this was in 0..31 when it needed to be in
+        // 0..15
+        const uint32_t remaining_byte_ct = NypCtToByteCt(raw_sample_ct) % (kBytesPerVec / 2);
+        // todo: check if this harms usual-case loop efficiency
+        vechalf_idx = 1;
+        if (remaining_byte_ct < kBytesPerWord) {
+          cur_geno_word1 = ProperSubwordLoad(genoarrb_iter, remaining_byte_ct);
+          cur_geno_word2 = 0;
+        } else {
+          CopyFromUnalignedIncrW(&cur_geno_word1, &genoarrb_iter);
+          cur_geno_word2 = ProperSubwordLoad(genoarrb_iter, remaining_byte_ct - kBytesPerWord);
+        }
+      }
+      const uintptr_t cur_geno_word1_high_masked = mask_word1 & (cur_geno_word1 >> 1);
+      const uintptr_t cur_geno_word2_high_masked = mask_word2 & (cur_geno_word2 >> 1);
+      even_ct += PopcountWord(((cur_geno_word1 & mask_word1) << 1) | (cur_geno_word2 & mask_word2));
+      odd_ct += PopcountWord((cur_geno_word1_high_masked << 1) | cur_geno_word2_high_masked);
+      bothset_ct += PopcountWord(((cur_geno_word1 & cur_geno_word1_high_masked) << 1) | (cur_geno_word2 & cur_geno_word2_high_masked));
+      if (vechalf_idx) {
+        break;
+      }
+      ++vechalf_idx;
+      mask_word1 = mask_word3;
+      mask_word2 = mask_word4;
+    }
+  }
+#else  // not USE_AVX2
+  const uint32_t vec_idx_trail = (raw_sample_ct + 3) / kNypsPerVec;
+#  ifdef USE_SSE2
+  uintptr_t mask_base1 = 0;
+  uintptr_t mask_base2 = 0;
+  for (; vec_idx != raw_sample_ctv2; ++vec_idx) {
+    uintptr_t mask_word1;
+    uintptr_t mask_word2;
+    if (!(vec_idx % 2)) {
+      mask_base1 = *interleaved_mask_iter++;
+      mask_base2 = *interleaved_mask_iter++;
+      mask_word1 = mask_base1 & kMask5555;
+      mask_word2 = mask_base2 & kMask5555;
+    } else {
+      mask_word1 = (mask_base1 >> 1) & kMask5555;
+      mask_word2 = (mask_base2 >> 1) & kMask5555;
+    }
+    uintptr_t cur_geno_word1;
+    uintptr_t cur_geno_word2;
+    if (vec_idx < vec_idx_trail) {
+      CopyFromUnalignedIncrW(&cur_geno_word1, &genoarrb_iter);
+      CopyFromUnalignedIncrW(&cur_geno_word2, &genoarrb_iter);
+    } else {
+      const uint32_t remaining_byte_ct = NypCtToByteCt(raw_sample_ct) % kBytesPerVec;
+      if (remaining_byte_ct < kBytesPerWord) {
+        cur_geno_word1 = ProperSubwordLoad(genoarrb_iter, remaining_byte_ct);
+        cur_geno_word2 = 0;
+      } else {
+        CopyFromUnalignedIncrW(&cur_geno_word1, &genoarrb_iter);
+        cur_geno_word2 = ProperSubwordLoad(genoarrb_iter, remaining_byte_ct - kBytesPerWord);
+      }
+    }
+    const uintptr_t cur_geno_word1_high_masked = mask_word1 & (cur_geno_word1 >> 1);
+    const uintptr_t cur_geno_word2_high_masked = mask_word2 & (cur_geno_word2 >> 1);
+#    ifdef USE_SSE42
+    even_ct += PopcountWord(((cur_geno_word1 & mask_word1) << 1) | (cur_geno_word2 & mask_word2));
+    odd_ct += PopcountWord((cur_geno_word1_high_masked << 1) | cur_geno_word2_high_masked);
+    bothset_ct += PopcountWord(((cur_geno_word1 & cur_geno_word1_high_masked) << 1) | (cur_geno_word2 & cur_geno_word2_high_masked));
+#    else
+    even_ct += NypsumWord((cur_geno_word1 & mask_word1) + (cur_geno_word2 & mask_word2));
+    odd_ct += NypsumWord(cur_geno_word1_high_masked + cur_geno_word2_high_masked);
+    bothset_ct += NypsumWord((cur_geno_word1 & cur_geno_word1_high_masked) + (cur_geno_word2 & cur_geno_word2_high_masked));
+#      endif
+  }
+#  else  // not USE_SSE2
+  uintptr_t mask_base = 0;
+  for (; vec_idx != raw_sample_ctv2; ++vec_idx) {
+    uintptr_t mask_word;
+    if (!(vec_idx % 2)) {
+      mask_base = *interleaved_mask_iter++;
+      mask_word = mask_base & kMask5555;
+    } else {
+      mask_word = (mask_base >> 1) & kMask5555;
+    }
+    uintptr_t cur_geno_word;
+    if (vec_idx < vec_idx_trail) {
+      CopyFromUnalignedIncrW(&cur_geno_word, &genoarrb_iter);
+    } else {
+      const uint32_t remaining_byte_ct = NypCtToByteCt(raw_sample_ct) % kBytesPerVec;
+      cur_geno_word = ProperSubwordLoad(genoarrb_iter, remaining_byte_ct);
+    }
+    const uintptr_t cur_geno_word_high_masked = mask_word & (cur_geno_word >> 1);
+    even_ct += Popcount01Word(cur_geno_word & mask_word);
+    odd_ct += Popcount01Word(cur_geno_word_high_masked);
+    bothset_ct += Popcount01Word(cur_geno_word & cur_geno_word_high_masked);
+  }
+#  endif  // not USE_SSE2
+#endif  // not USE_AVX2
+  genocounts[0] = sample_ct + bothset_ct - even_ct - odd_ct;
+  genocounts[1] = even_ct - bothset_ct;
+  genocounts[2] = odd_ct - bothset_ct;
+  genocounts[3] = bothset_ct;
+}
+
+void GenoarrCountFreqs(const uintptr_t* genoarr, uint32_t sample_ct, STD_ARRAY_REF(uint32_t, 4) genocounts) {
+  // this masks out trailing genoarr bits
+  const uint32_t sample_ct_remainder = sample_ct % kBitsPerWordD2;
+  GenoarrCountFreqsUnsafe(genoarr, sample_ct - sample_ct_remainder, genocounts);
+  if (sample_ct_remainder) {
+    uintptr_t cur_geno_word = bzhi(genoarr[sample_ct / kBitsPerWordD2], 2 * sample_ct_remainder);
+    const uintptr_t cur_geno_word_high = kMask5555 & (cur_geno_word >> 1);
+    const uint32_t even_ct = Popcount01Word(cur_geno_word & kMask5555);
+    const uint32_t odd_ct = Popcount01Word(cur_geno_word_high);
+    const uint32_t bothset_ct = Popcount01Word(cur_geno_word & cur_geno_word_high);
+    genocounts[0] += sample_ct_remainder + bothset_ct - even_ct - odd_ct;
+    genocounts[1] += even_ct - bothset_ct;
+    genocounts[2] += odd_ct - bothset_ct;
+    genocounts[3] += bothset_ct;
+  }
+}
+
+void GenovecNonmissingToZeroUnsafe(uint32_t sample_ct, uintptr_t* genovec) {
+  // sets 1 and 2 to zero; leaves 3s untouched.
+  const uint32_t vec_ct = NypCtToVecCt(sample_ct);
+  assert(IsVecAligned(genovec));
+  const VecW m1 = VCONST_W(kMask5555);
+  VecW* vptr = R_CAST(VecW*, genovec);
+  for (uint32_t vidx = 0; vidx != vec_ct; ++vidx) {
+    VecW cur_vec = vptr[vidx];
+    const VecW cur_vec_rshifted = vecw_srli(cur_vec, 1);
+    cur_vec = cur_vec & m1;
+    cur_vec = cur_vec & cur_vec_rshifted;
+    vptr[vidx] = cur_vec | vecw_slli(cur_vec, 1);
+  }
+}
+
+void GenovecNonzeroToMissingUnsafe(uint32_t sample_ct, uintptr_t* genovec) {
+  // converts 1s and 2s to 3s, leaves zeroes untouched.
+  const uint32_t vec_ct = NypCtToVecCt(sample_ct);
+  assert(IsVecAligned(genovec));
+  const VecW m1 = VCONST_W(kMask5555);
+  VecW* vptr = R_CAST(VecW*, genovec);
+  for (uint32_t vidx = 0; vidx != vec_ct; ++vidx) {
+    VecW cur_vec = vptr[vidx];
+    const VecW cur_vec_rshifted = vecw_srli(cur_vec, 1);
+    cur_vec = cur_vec | cur_vec_rshifted;
+    cur_vec = cur_vec & m1;
+    vptr[vidx] = cur_vec | vecw_slli(cur_vec, 1);
+  }
+}
+
+void GenovecNontwoToMissingUnsafe(uint32_t sample_ct, uintptr_t* genovec) {
+  // 0 -> 3, 1 -> 3.
+  const uint32_t vec_ct = NypCtToVecCt(sample_ct);
+  assert(IsVecAligned(genovec));
+  const VecW not_m1 = VCONST_W(kMaskAAAA);
+  VecW* vptr = R_CAST(VecW*, genovec);
+  for (uint32_t vidx = 0; vidx != vec_ct; ++vidx) {
+    const VecW cur_vec = vptr[vidx];
+    const VecW cur_vec_hi = vecw_and_notfirst(cur_vec, not_m1);
+    const VecW cur_or = cur_vec_hi | vecw_srli(cur_vec_hi, 1);
+    vptr[vidx] = cur_vec | cur_or;
+  }
+}
+
+void GenovecNonzeroToMissingThenInvertUnsafe(uint32_t sample_ct, uintptr_t* genovec) {
+  // 0 -> 2, 1 -> 3, 2 -> 3
+  const uint32_t vec_ct = NypCtToVecCt(sample_ct);
+  assert(IsVecAligned(genovec));
+  const VecW not_m1 = VCONST_W(kMaskAAAA);
+  VecW* vptr = R_CAST(VecW*, genovec);
+  for (uint32_t vidx = 0; vidx != vec_ct; ++vidx) {
+    const VecW cur_vec = vptr[vidx];
+    vptr[vidx] = cur_vec | vecw_srli(cur_vec, 1) | not_m1;
+  }
+}
+
+void GenovecInvertThenNonzeroToMissingUnsafe(uint32_t sample_ct, uintptr_t* genovec) {
+  // 0 -> 3, 1 -> 3, 2 -> 0
+  const uint32_t vec_ct = NypCtToVecCt(sample_ct);
+  assert(IsVecAligned(genovec));
+  const VecW m1 = VCONST_W(kMask5555);
+  VecW* vptr = R_CAST(VecW*, genovec);
+  for (uint32_t vidx = 0; vidx != vec_ct; ++vidx) {
+    const VecW cur_vec = vptr[vidx];
+    const VecW cur_vec_rshifted = vecw_srli(cur_vec, 1);
+    const VecW not2 = vecw_and_notfirst(vecw_and_notfirst(cur_vec, cur_vec_rshifted), m1);
+    vptr[vidx] = not2 | vecw_slli(not2, 1);
+  }
+}
+
+double BiallelicDiploidMinimac3R2(uint64_t alt1_dosage, uint64_t hap_alt1_ssq_x2, uint32_t nm_sample_ct) {
+  if (!nm_sample_ct) {
+    return (0.0 / 0.0);
+  }
+
+  const uint64_t nm_sample_ct_x32768 = nm_sample_ct * 0x8000LLU;
+  if (nm_sample_ct < 131072) {
+    const uint64_t alt1_dosage_sq = alt1_dosage * alt1_dosage;
+    const uint64_t observed_variance_times_2n = hap_alt1_ssq_x2 * nm_sample_ct - alt1_dosage * alt1_dosage;
+    const uint64_t expected_variance_times_2n = nm_sample_ct_x32768 * alt1_dosage - alt1_dosage_sq;
+    return S_CAST(double, observed_variance_times_2n) / S_CAST(double, expected_variance_times_2n);
+  }
+  // Need to avoid catastrophic cancellation here.
+  const double alt1_dosaged = u63tod(alt1_dosage);
+  const double expected_variance_times_2n = alt1_dosaged * u63tod(nm_sample_ct_x32768 - alt1_dosage);
+  const uint64_t hap_alt1_ssq_x2_hi = hap_alt1_ssq_x2 >> 32;
+  uint64_t left_lo = (hap_alt1_ssq_x2 & 0xffffffffLLU) * nm_sample_ct;
+  const uint64_t left_hi = (left_lo >> 32) + hap_alt1_ssq_x2_hi * nm_sample_ct;
+  left_lo &= 0xffffffffU;
+  const uint64_t alt1_dosage_lo = alt1_dosage & 0xffffffffLLU;
+  const uint64_t alt1_dosage_hi = alt1_dosage >> 32;
+  uint64_t right_lo = alt1_dosage_lo * alt1_dosage_lo;
+  const uint64_t right_hi = (right_lo >> 32) + (alt1_dosage_lo + alt1_dosage) * alt1_dosage_hi;
+  right_lo &= 0xffffffffU;
+  const double observed_variance_times_2n_hi = u63tod(left_hi - right_hi);
+  const int64_t observed_variance_times_2n_lo = S_CAST(int64_t, left_lo) - S_CAST(int64_t, right_lo);
+  const double observed_variance_times_2n = (observed_variance_times_2n_hi * 4294967296.0) + observed_variance_times_2n_lo;
+  return observed_variance_times_2n / expected_variance_times_2n;
+}
+
+// These two functions do not overread, but may write extra bytes up to the
+// word boundary.
+// They are likely to be moved to plink2_bits.
+// bugfix (30 Oct 2023): given how we use this function, we have to drop the
+// vector-alignment requirement for dst.
+void Expand2bitTo8(const void* __restrict bytearr, uint32_t input_nyp_ct, uint32_t incr, void* __restrict dst) {
+  // Tried adding incr == 0 fast path, negligible performance difference in
+  // benchmark.
+  // GenoarrLookup256x1bx4 takes ~3-4x as long.
+  uint32_t input_byte_ct = DivUp(input_nyp_ct, 4);
+#ifdef USE_SSE2
+  const unsigned char* src_iter = S_CAST(const unsigned char*, bytearr);
+  const uint32_t input_vec_ct = input_byte_ct / kBytesPerVec;
+  uintptr_t* dst_iter = S_CAST(uintptr_t*, dst);
+  if (input_vec_ct) {
+    const VecW mincr = VecUcToW(vecuc_set1(incr));
+    const VecW m03 = VCONST_W(kMask0303);
+    for (uint32_t vec_idx = 0; vec_idx != input_vec_ct; ++vec_idx) {
+      VecW cur_vec = vecw_loadu(src_iter);
+      src_iter = &(src_iter[kBytesPerVec]);
+#  ifdef USE_AVX2
+      // (todo: benchmark against just reading 8 bytes at a time and
+      // broadcasting.)
+      // midswapped_vec contains {0-1-2-3, 4-5-6-7, ..., 12-13-14-15,
+      //                          32-33-34-35, ..., 44-45-46-47,
+      //                          16-17-18-19, ..., 28-29-30-31,
+      //                          48-49-50-51, ..., 60-61-62-63,
+      //                          64-65-66-67, ..., 76-77-78-79,
+      //                          96-97-98-99, ..., 108-109-110-111,
+      //                          80-81-82-83, ..., 92-93-94-95,
+      //                          112-113-114-115, ..., 124-125-126-127}
+      // 0xd8: {0, 2, 1, 3}
+      const __m256i midswapped_vec = _mm256_shuffle_epi32(WToVec(cur_vec), 0xd8);
+      // This operation is also used in FillInterleavedMaskVec().
+      // cur_vec now contains {0-1-2-3, 4-5-6-7, 8-9-10-11, 12-13-14-15,
+      //                       32-33-34-35, ..., 44-45-46-47,
+      //                       64-65-66-67, ..., 76-77-78-79,
+      //                       96-97-98-99, ..., 108-109-110-111,
+      //                       16-17-18-19, ..., 28-29-30-31,
+      //                       48-49-50-51, ..., 60-61-62-63,
+      //                       80-81-82-83, ..., 92-93-94-95,
+      //                       112-113-114-115, ..., 124-125-126-127}
+      cur_vec = vecw_permute0xd8_if_avx2(VecToW(midswapped_vec));
+#  endif
+      // AVX2:
+      //   vec_even contains {0-1, 4-5, 8-9, 12-13, 32-33, ..., 44-45,
+      //                      64-65, ..., 76-77, 96-97, ..., 108-109,
+      //                      16-17, ..., 28-29, 48-49, ..., 60-61,
+      //                      80-81, ..., 92-93, 112-113, ..., 124-125}
+      //   vec_odd contains {2-3, 6-7, 10-11, 14-15, 34-35, ..., 46-47,
+      //                     66-67, ..., 78-79, 98-99, ..., 110-111,
+      //                     18-19, ..., 30-31, 50-51, ..., 62-63,
+      //                     82-83, ..., 94-95, 114-115, ..., 126-127}
+      // SSE2:
+      //   vec_even contains {0-1, 4-5, 8-9, ..., 60-61}
+      //   vec_odd contains {2-3, 6-7, 10-11, ..., 62-63}
+      const VecW vec_even = cur_vec;
+      const VecW vec_odd = vecw_srli(cur_vec, 4);
+
+      // AVX2:
+      //   vec01 contains {0-1, 2-3, 4-5, ..., 14-15, 32-33, ..., 46-47,
+      //                   16-17, ..., 30-31, 48-49, ..., 62-63}
+      //   vec23 contains {64-65, 66-67, ..., 78-79, 96-97, ..., 110-111,
+      //                   80-81, ..., 94-95, 112-113, ..., 126-127}
+      // SSE2:
+      //   vec01 contains {0-1, 2-3, 4-5, 6-7, ..., 30-31}
+      //   vec23 contains {32-33, 34-35, 36-37, 38-39, ..., 62-63}
+      // There's no m4 masking here, so we don't use vecw_lo_and_hi_nybbles.
+      const VecW vec01 = vecw_unpacklo8(vec_even, vec_odd);
+      const VecW vec23 = vecw_unpackhi8(vec_even, vec_odd);
+
+      // AVX2:
+      //   vec01_even contains {0, 2, 4, ..., 14, 32, 34, ..., 46,
+      //                        16, 18, ..., 30, 48, 50, ..., 62}
+      //   vec01_odd contains {1, 3, 5, ..., 15, 33, 35, ..., 47,
+      //                       17, 19, ..., 31, 49, 51, ..., 63}
+      // SSE2:
+      //   vec01_even contains {0, 2, 4, 6, ..., 30}
+      //   vec01_odd contains {1, 3, 5, 7, ..., 31}
+      const VecW vec01_even = vec01 & m03;
+      const VecW vec01_odd = vecw_srli(vec01, 2) & m03;
+
+      // AVX2:
+      //   vecw_unpacklo8() contains {0, 1, ..., 15, 16, ..., 31}
+      //   vecw_unpachhi8() contains {32, 33, ..., 47, 48, ..., 63}
+      // SSE2:
+      //   vecw_unpacklo8() contains {0, 1, ..., 15}
+      //   vecw_unpachhi8() contains {16, 17, ..., 31}
+      vecw_storeu(dst_iter, mincr + vecw_unpacklo8(vec01_even, vec01_odd));
+      dst_iter = &(dst_iter[kWordsPerVec]);
+      vecw_storeu(dst_iter, mincr + vecw_unpackhi8(vec01_even, vec01_odd));
+      dst_iter = &(dst_iter[kWordsPerVec]);
+      const VecW vec23_odd = vecw_srli(vec23, 2) & m03;
+      const VecW vec23_even = vec23 & m03;
+      vecw_storeu(dst_iter, mincr + vecw_unpacklo8(vec23_even, vec23_odd));
+      dst_iter = &(dst_iter[kWordsPerVec]);
+      vecw_storeu(dst_iter, mincr + vecw_unpackhi8(vec23_even, vec23_odd));
+      dst_iter = &(dst_iter[kWordsPerVec]);
+    }
+  }
+  input_byte_ct = input_byte_ct % kBytesPerVec;
+  if (!input_byte_ct) {
+    return;
+  }
+  const unsigned char* src_uc = src_iter;
+  uintptr_t* dstw = dst_iter;
+#else  // !USE_SSE2
+  const unsigned char* src_uc = S_CAST(const unsigned char*, bytearr);
+  uintptr_t* dstw = S_CAST(uintptr_t*, dst);
+#endif
+  const uint32_t full_qw_ct = input_byte_ct / sizeof(Quarterword);
+  const uintptr_t incr_word = kMask0101 * incr;
+  for (uint32_t uii = 0; uii != full_qw_ct; ++uii) {
+    Quarterword cur_qw;
+    CopyFromUnalignedOffsetQW(&cur_qw, src_uc, uii);
+    dstw[uii] = incr_word + Unpack0303(cur_qw);
+  }
+#ifdef __LP64__
+  if (input_byte_ct % 2) {
+    uintptr_t cur_byte = src_uc[input_byte_ct - 1];
+#  ifdef USE_AVX2
+    cur_byte = _pdep_u64(cur_byte, kMask0303);
+#  else
+    cur_byte = cur_byte | (cur_byte << 12);
+    cur_byte = (cur_byte | (cur_byte << 6)) & kMask0303;
+#  endif
+    dstw[full_qw_ct] = incr_word + cur_byte;
+  }
+#endif
+}
+
+void Expand4bitTo8(const void* __restrict bytearr, uint32_t input_nybble_ct, uint32_t incr, void* __restrict dst) {
+  // Tried adding incr == 0 fast path, negligible performance difference in
+  // benchmark.
+#ifdef USE_SSE2
+  uint32_t input_byte_ct = DivUp(input_nybble_ct, 2);
+  const unsigned char* src_iter = S_CAST(const unsigned char*, bytearr);
+  const uint32_t input_vec_ct = input_byte_ct / kBytesPerVec;
+  uintptr_t* dst_iter = S_CAST(uintptr_t*, dst);
+  if (input_vec_ct) {
+    const VecW mincr = VecUcToW(vecuc_set1(incr));
+    const VecW m4 = VCONST_W(kMask0F0F);
+    for (uint32_t vec_idx = 0; vec_idx != input_vec_ct; ++vec_idx) {
+      const VecW cur_vec = vecw_loadu(src_iter);
+      src_iter = &(src_iter[kBytesPerVec]);
+      VecW vec_lo;
+      VecW vec_hi;
+      vecw_lo_and_hi_nybbles(cur_vec, m4, &vec_lo, &vec_hi);
+      vecw_storeu(dst_iter, mincr + vec_lo);
+      dst_iter = &(dst_iter[kWordsPerVec]);
+      vecw_storeu(dst_iter, mincr + vec_hi);
+      dst_iter = &(dst_iter[kWordsPerVec]);
+    }
+  }
+  input_byte_ct = input_byte_ct % kBytesPerVec;
+  if (!input_byte_ct) {
+    return;
+  }
+  const unsigned char* src_uc = src_iter;
+  uintptr_t* dstw = dst_iter;
+#else
+  if (!input_nybble_ct) {
+    return;
+  }
+  const unsigned char* src_uc = S_CAST(const unsigned char*, bytearr);
+  uintptr_t* dstw = S_CAST(uintptr_t*, dst);
+  const uint32_t input_byte_ct = DivUp(input_nybble_ct, 2);
+#endif
+  const uint32_t hw_ct_m1 = (input_byte_ct - 1) / sizeof(Halfword);
+  const uintptr_t incr_word = kMask0101 * incr;
+  for (uint32_t hwidx = 0; ; ++hwidx) {
+    Halfword cur_hw;
+    if (hwidx >= hw_ct_m1) {
+      if (hwidx > hw_ct_m1) {
+        break;
+      }
+      cur_hw = SubHWLoad(&(src_uc[hwidx * sizeof(Halfword)]), ModNz(input_byte_ct, sizeof(Halfword)));
+    } else {
+      CopyFromUnalignedOffsetHW(&cur_hw, src_uc, hwidx);
+    }
+    dstw[hwidx] = incr_word + Unpack0F0F(cur_hw);
+  }
+}
+
+void PreinitPgfi(PgenFileInfo* pgfip) {
+  pgfip->shared_ff = nullptr;
+  pgfip->pgi_ff = nullptr;
+  pgfip->block_base = nullptr;
+  // we want this for proper handling of e.g. sites-only VCFs
+  pgfip->nonref_flags = nullptr;
+}
+
+uintptr_t CountPgfiAllocCachelinesRequired(uint32_t raw_variant_ct) {
+  // assumes variable-width variant records, otherwise pgfi.vrtypes and
+  // pgfi.vr_fpos can just be nullptr.
+
+  // vrtypes: 1 byte per entry, (raw_variant_ct + 1) entries
+  uintptr_t cachelines_required = 1 + (raw_variant_ct / kCacheline);
+
+  // var_fpos: 8 bytes per entry, (raw_variant_ct + 1) entries
+  cachelines_required += 1 + (raw_variant_ct / kInt64PerCacheline);
+  return cachelines_required;
+}
+
+uintptr_t CountPgrAllocCachelinesRequired(uint32_t raw_sample_ct, PgenGlobalFlags gflags, uint32_t max_allele_ct, uint32_t fread_buf_byte_ct) {
+  // ldbase_raw_genovec: always needed, 2 bits per entry, up to raw_sample_ct
+  // entries
+  const uint32_t genovec_cacheline_req = NypCtToCachelineCt(raw_sample_ct);
+  const uint32_t bitvec_cacheline_req = BitCtToCachelineCt(raw_sample_ct);
+  uintptr_t cachelines_required = genovec_cacheline_req;
+  // fread_buf.  DivUp() won't overflow since fread_buf_byte_ct requirement
+  // can't exceed kPglMaxBytesPerVariant, which is sufficiently far from 2^32.
+  cachelines_required += DivUp(fread_buf_byte_ct, kCacheline);
+
+  const uint32_t ld_compression_present = (gflags / kfPgenGlobalLdCompressionPresent) & 1;
+  const uint32_t max_difflist_entry_ct_base = (raw_sample_ct / kPglMaxDifflistLenDivisor);
+  if ((gflags & kfPgenGlobalDifflistOrLdPresent) || (max_allele_ct > 2)) {
+    // workspace_difflist_sample_ids
+    // bugfix: must add 1 since several routines add a terminator element
+    cachelines_required += 1 + (max_difflist_entry_ct_base / kInt32PerCacheline);
+  }
+  if (gflags & kfPgenGlobalDifflistOrLdPresent) {
+    // const uint32_t max_difflist_entry_ct = max_difflist_entry_ct_base * (1 + ld_compression_present);
+    // workspace_raregeno_vec
+    cachelines_required += NypCtToCachelineCt(max_difflist_entry_ct_base);
+
+    // workspace_raregeno_tmp_loadbuf
+    cachelines_required += NypCtToCachelineCt(max_difflist_entry_ct_base);
+
+    if (ld_compression_present) {
+      // ldbase_genovec
+      cachelines_required += genovec_cacheline_req;
+
+      // ldbase_raregeno
+      cachelines_required += NypCtToCachelineCt(max_difflist_entry_ct_base);
+
+      // ldbase_difflist_sample_ids
+      cachelines_required += 1 + (max_difflist_entry_ct_base / kInt32PerCacheline);
+    }
+  }
+  const PgenGlobalFlags gflags_hphase_dosage = gflags & (kfPgenGlobalHardcallPhasePresent | kfPgenGlobalDosagePresent);
+  if ((max_allele_ct > 2) || gflags_hphase_dosage) {
+    cachelines_required += genovec_cacheline_req;  // workspace_vec
+    if (max_allele_ct > 2) {
+      // workspace_aux1x_present
+      cachelines_required += bitvec_cacheline_req;
+      // workspace_imp_r2
+      cachelines_required += Int64CtToCachelineCt(2 * max_allele_ct);
+    }
+    if (gflags & kfPgenGlobalHardcallPhasePresent) {
+      // workspace_all_hets, workspace_subset
+      cachelines_required += bitvec_cacheline_req * 2;
+    }
+    if (gflags & kfPgenGlobalDosagePresent) {
+      // aux track #3: usually bitarray tracking which samples have dosage info
+      // (may be stored on disk as a dosage list)
+      cachelines_required += bitvec_cacheline_req;
+      if (gflags & kfPgenGlobalDosagePhasePresent) {
+        // aux track #7: bitarray tracking which dosage entries are phased
+        cachelines_required += bitvec_cacheline_req;
+
+        // phased aux tracks #4,8: 2 bytes per sample
+        // There may be overflow risk here in the future.
+        // (commented out since caller always provides this buffer for now)
+        // cachelines_required += DivUp(2 * k1LU * raw_sample_ct, kCacheline);
+      }
+      // unphased aux track #4: 2 bytes per sample
+      // cachelines_required += DivUp(2 * k1LU * raw_sample_ct, kCacheline);
+
+      // may need deltalist64 workspace in multiallelic dosage case
+    }
+  }
+  return cachelines_required;
+}
+
+static_assert(kPglMaxAlleleCt == 255, "Need to update PgfiInitPhase1().");
+PglErr PgfiInitPhase1(const char* fname, const char* pgi_fname, uint32_t raw_variant_ct, uint32_t raw_sample_ct, PgenHeaderCtrl* header_ctrl_ptr, PgenFileInfo* pgfip, uintptr_t* pgfi_alloc_cacheline_ct_ptr, char* errstr_buf) {
+  pgfip->var_fpos = nullptr;
+  pgfip->vrtypes = nullptr;
+  pgfip->allele_idx_offsets = nullptr;
+  pgfip->nonref_flags = nullptr;
+
+  // Caller is currently expected to reset max_allele_ct if allele_idx_offsets
+  // is preloaded... need to fix this interface.
+  pgfip->max_allele_ct = 2;
+  // pgfip->max_dosage_allele_ct = 0;
+  pgfip->extensions_present = 0;
+
+  pgfip->block_base = nullptr;
+  // this should force overflow when value is uninitialized.
+  pgfip->block_offset = 1LLU << 63;
+
+  uint64_t fsize;
+  const unsigned char* fread_ptr;
+  unsigned char small_readbuf[3];
+  FILE* shared_ff = fopen(fname, FOPEN_RB);
+  pgfip->shared_ff = shared_ff;
+  if (unlikely(!shared_ff)) {
+    snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Failed to open %s : %s.\n", fname, strerror(errno));
+    return kPglRetOpenFail;
+  }
+  if (unlikely(fseeko(shared_ff, 0, SEEK_END))) {
+    snprintf(errstr_buf, kPglErrstrBufBlen, "Error: %s read failure: %s.\n", fname, strerror(errno));
+    return kPglRetReadFail;
+  }
+  fsize = ftello(shared_ff);
+  if (unlikely(fsize < 4)) {
+    snprintf(errstr_buf, kPglErrstrBufBlen, "Error: %s is too small to be a valid .pgen file.\n", fname);
+    return kPglRetMalformedInput;
+  }
+  rewind(shared_ff);
+  if (unlikely(!fread_unlocked(small_readbuf, 3, 1, shared_ff))) {
+    snprintf(errstr_buf, kPglErrstrBufBlen, "Error: %s read failure: %s.\n", fname, strerror(errno));
+    return kPglRetReadFail;
+  }
+  fread_ptr = small_readbuf;
+  // deliberate underflow
+  if (unlikely(((raw_variant_ct - 1) > (kPglMaxVariantCt - 1)) && (raw_variant_ct != UINT32_MAX))) {
+    snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid raw_variant_ct function parameter.\n");
+    return kPglRetImproperFunctionCall;
+  }
+  if (unlikely(((raw_sample_ct - 1) > (kPglMaxSampleCt - 1)) && (raw_sample_ct != UINT32_MAX))) {
+    snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid raw_sample_ct function parameter.\n");
+    return kPglRetImproperFunctionCall;
+  }
+  if (unlikely(!memequal_k(fread_ptr, "l\x1b", 2))) {
+    snprintf(errstr_buf, kPglErrstrBufBlen, "Error: %s is not a .pgen file (first two bytes don't match the magic number).\n", fname);
+    return kPglRetMalformedInput;
+  }
+  const uint32_t file_type_code = fread_ptr[2];
+  *header_ctrl_ptr = 0;
+  if (file_type_code < 2) {
+    // plink 1 binary
+    if (unlikely(!file_type_code)) {
+      // sample-major.  validate file size here so we don't have to recheck it
+      if ((raw_sample_ct != UINT32_MAX) && (raw_variant_ct != UINT32_MAX)) {
+        const uint64_t fsize_expected = 3 + S_CAST(uint64_t, raw_sample_ct) * NypCtToByteCt(raw_variant_ct);
+        if (fsize != fsize_expected) {
+          char* write_iter = strcpya_k(errstr_buf, "Error: Unexpected PLINK 1 sample-major .bed file size (");
+          write_iter = i64toa(fsize_expected, write_iter);
+          strcpy_k(write_iter, " bytes expected).\n");
+          return kPglRetMalformedInput;
+        }
+      }
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: pgenlib does not directly support sample-major PLINK 1 .bed files.\n(However, PLINK 2 automatically transposes and compresses them for you.)\n");
+      return kPglRetSampleMajorBed;
+    }
+    if (unlikely(raw_sample_ct == UINT32_MAX)) {
+      // either .fam must be loaded first, or user must provide sample count
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: PgfiInitPhase1() must be called with an accurate raw_sample_ct value, since %s is a PLINK 1 .bed file.\n", fname);
+      return kPglRetImproperFunctionCall;
+    }
+    const uint32_t const_vrec_width = NypCtToByteCt(raw_sample_ct);
+    if (raw_variant_ct == UINT32_MAX) {
+      // allow raw_variant_ct to be inferred
+      uint64_t quotient = (fsize - 3) / const_vrec_width;
+      if (unlikely((quotient > kPglMaxSampleCt) || (quotient * const_vrec_width + 3 != fsize))) {
+        snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Unexpected PLINK 1 .bed file size (since raw_sample_ct was %u, [file size - 3] should be divisible by %u and the quotient should be smaller than 2^31 - 1).\n", raw_sample_ct, const_vrec_width);
+        return kPglRetMalformedInput;
+      }
+      raw_variant_ct = quotient;
+    } else {
+      if (unlikely(S_CAST(uint64_t, raw_variant_ct) * const_vrec_width + 3 != fsize)) {
+        char* write_iter = strcpya_k(errstr_buf, "Error: Unexpected PLINK 1 .bed file size (expected ");
+        write_iter = i64toa(S_CAST(uint64_t, raw_variant_ct) * const_vrec_width + 3, write_iter);
+        strcpy_k(write_iter, " bytes).\n");
+        return kPglRetMalformedInput;
+      }
+    }
+    pgfip->raw_variant_ct = raw_variant_ct;
+    pgfip->raw_sample_ct = raw_sample_ct;
+    pgfip->const_fpos_offset = 3;
+
+    pgfip->const_vrtype = kPglVrtypePlink1;
+    pgfip->const_vrec_width = const_vrec_width;
+    pgfip->gflags = kfPgenGlobalAllNonref;
+    *pgfi_alloc_cacheline_ct_ptr = 0;
+    return kPglRetSuccess;
+  }
+
+  FILE* header_ff = shared_ff;
+  const char* header_fname = fname;
+
+  // Must declare here, rather than inside else{} block, since the buffer would
+  // otherwise be implicitly popped off the stack as soon as the else-block is
+  // exited, but we may still try to print this filename in an error message.
+  // This isn't Golang.
+  char pgi_fname_buf[kPglFnamesize];
+
+  if ((file_type_code & 0xfe) != 0x20) {
+    if (unlikely((file_type_code & 0xfe) == 0x30)) {
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: %s is a .pgen.pgi index file, rather than a .pgen file.\n", fname);
+      return kPglRetMalformedInput;
+    }
+    if (unlikely(fsize < 12)) {
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: %s is too small to be a valid .pgen file.\n", fname);
+      return kPglRetMalformedInput;
+    }
+  } else {
+    header_fname = pgi_fname;
+    if (!header_fname) {
+      const uint32_t fname_slen = strlen(fname);
+      // need space to append ".pgi" plus null-terminator
+      if (unlikely(fname_slen > kPglFnamesize - 5)) {
+        snprintf(errstr_buf, kPglErrstrBufBlen, "Error: .pgen filename too long.\n");
+        return kPglRetMalformedInput;
+      }
+      char* fname_iter = memcpya(pgi_fname_buf, fname, fname_slen);
+      strcpy_k(fname_iter, ".pgi");
+      header_fname = pgi_fname_buf;
+    }
+    header_ff = fopen(header_fname, FOPEN_RB);
+    pgfip->pgi_ff = header_ff;
+    if (unlikely(!header_ff)) {
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Failed to open %s : %s.\n", header_fname, strerror(errno));
+      return kPglRetOpenFail;
+    }
+    if (unlikely(!fread_unlocked(small_readbuf, 3, 1, header_ff))) {
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: %s read failure: %s.\n", header_fname, strerror(errno));
+      return kPglRetReadFail;
+    }
+    if (unlikely((!memequal_k(small_readbuf, "l\x1b", 2)) || ((small_readbuf[2] & 0xfe) != 0x30))) {
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: %s is not a .pgen.pgi file (first three bytes don't match the magic number).\n", header_fname);
+      return kPglRetMalformedInput;
+    }
+  }
+  if (unlikely((!fread_unlocked(&(pgfip->raw_variant_ct), sizeof(int32_t), 1, header_ff)) ||
+               (!fread_unlocked(&(pgfip->raw_sample_ct), sizeof(int32_t), 1, header_ff)) ||
+               (!fread_unlocked(header_ctrl_ptr, 1, 1, header_ff)))) {
+    snprintf(errstr_buf, kPglErrstrBufBlen, "Error: %s read failure: %s.\n", header_fname, strerror(errno));
+    return kPglRetReadFail;
+  }
+  const PgenHeaderCtrl header_ctrl = *header_ctrl_ptr;
+  if (raw_variant_ct == UINT32_MAX) {
+    raw_variant_ct = pgfip->raw_variant_ct;
+    // deliberate underflow
+    if (unlikely((raw_variant_ct - 1) > (kPglMaxVariantCt - 1))) {
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid variant count in .pgen%s file.\n", pgfip->pgi_ff? ".pgi" : "");
+      return kPglRetMalformedInput;
+    }
+  } else if (unlikely(raw_variant_ct != pgfip->raw_variant_ct)) {
+    snprintf(errstr_buf, kPglErrstrBufBlen, "Error: PgfiInitPhase1() was called with raw_variant_ct == %u, but %s contains %u variant%s.\n", raw_variant_ct, fname, pgfip->raw_variant_ct, (pgfip->raw_variant_ct == 1)? "" : "s");
+    return kPglRetInconsistentInput;
+  }
+  if (raw_sample_ct == UINT32_MAX) {
+    raw_sample_ct = pgfip->raw_sample_ct;
+    // deliberate underflow
+    if (unlikely((raw_sample_ct - 1) > (kPglMaxSampleCt - 1))) {
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid sample count in .pgen%s file.\n", pgfip->pgi_ff? ".pgi" : "");
+      return kPglRetMalformedInput;
+    }
+  } else if (unlikely(raw_sample_ct != pgfip->raw_sample_ct)) {
+    snprintf(errstr_buf, kPglErrstrBufBlen, "Error: PgfiInitPhase1() was called with raw_sample_ct == %u, but %s contains %u sample%s.\n", raw_sample_ct, fname, pgfip->raw_sample_ct, (pgfip->raw_sample_ct == 1)? "" : "s");
+    return kPglRetInconsistentInput;
+  }
+  pgfip->gflags = kfPgenGlobal0;
+
+  // explicit storage of "is this reference allele untrusted?"
+  // need caller to allocate this
+  uint32_t nonref_flags_storage = header_ctrl >> 6;
+  if (nonref_flags_storage == 2) {
+    pgfip->gflags |= kfPgenGlobalAllNonref;
+  }
+
+  if (file_type_code < 16) {
+    // plink 2 binary, single constant-width vrtype
+    pgfip->const_fpos_offset = 12;
+    if (nonref_flags_storage == 3) {
+      pgfip->const_fpos_offset += DivUp(raw_variant_ct, CHAR_BIT);
+    }
+    if (unlikely(file_type_code > 4)) {
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Third byte of %s does not correspond to a storage mode supported by this version of pgenlib.\n", fname);
+      return kPglRetNotYetSupported;
+    }
+    if (unlikely(header_ctrl & 63)) {
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Third byte of %s corresponds to a fixed-width storage mode, but twelfth byte is only consistent with a variable-width mode.\n", fname);
+      return kPglRetMalformedInput;
+    }
+    uint32_t vrtype = 0;
+    uintptr_t const_vrec_width = NypCtToByteCt(raw_sample_ct);
+    if (file_type_code == 3) {
+      vrtype = 0x40;
+      const_vrec_width += raw_sample_ct * 2;
+      pgfip->gflags |= kfPgenGlobalDosagePresent;
+    } else if (file_type_code == 4) {
+      vrtype = 0xc0;
+      const_vrec_width += raw_sample_ct * 4;
+      pgfip->gflags |= kfPgenGlobalDosagePresent | kfPgenGlobalDosagePhasePresent;
+    }
+    if (unlikely(S_CAST(uint64_t, raw_variant_ct) * const_vrec_width + pgfip->const_fpos_offset != fsize)) {
+      char* write_iter = strcpya_k(errstr_buf, "Error: Unexpected .pgen file size (expected ");
+      write_iter = i64toa(S_CAST(uint64_t, raw_variant_ct) * const_vrec_width + pgfip->const_fpos_offset, write_iter);
+      strcpy_k(write_iter, " bytes).\n");
+      return kPglRetMalformedInput;
+    }
+    pgfip->const_vrtype = vrtype;
+    pgfip->const_vrec_width = const_vrec_width;
+    *pgfi_alloc_cacheline_ct_ptr = 0;
+    return kPglRetSuccess;
+  }
+  if (unlikely((file_type_code >= 0x12) && ((file_type_code & 0xfe) != 0x20))) {
+    snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Third byte of %s does not correspond to a storage mode supported by this version of pgenlib.\n", fname);
+    return kPglRetNotYetSupported;
+  }
+  // plink 2 binary, general-purpose
+  pgfip->extensions_present = file_type_code & 1;
+  pgfip->const_fpos_offset = 0;
+  pgfip->const_vrtype = UINT32_MAX;
+  pgfip->const_vrec_width = 0;
+  const uintptr_t alt_allele_ct_byte_ct = (header_ctrl >> 4) & 3;
+  if (unlikely(alt_allele_ct_byte_ct > 1)) {
+    snprintf(errstr_buf, kPglErrstrBufBlen, "Error: This version of pgenlib does not support >254 alternate alleles for a single variant.\n");
+    return kPglRetNotYetSupported;
+  }
+
+  if (header_ctrl & 8) {
+    // Special header_ctrl modes:
+    //   8: 1 bit per fused vrtype-length.  Unset = vrtype 5, set = vrtype 0.
+    //   9: 2 bits, multiallelic.  0 = vrtype 5, 1 = vrtype 0, 2-3 = vrtype
+    //      8 with that many more bytes than vrtype 0.  Note that this is
+    //      limited to 16 ALT alleles.
+    //   10: 2 bits, phased.  0 = vrtype 5, 1 = vrtype 0, 2-3 = vrtype 16
+    //       with that many minus 1 bytes beyond vrtype 0.  While this is also
+    //       aimed at the single-sample use case, it technically supports up to
+    //       15 always-phased or 7 partially-phased samples.
+    //   11: 4 bits, multiallelic + phased.  0 = vrtype 5, 1 = vrtype 0,
+    //       2-7 = vrtype 8 with that many bytes beyond vrtype 0, 9 = vrtype 16
+    //       phase info requiring just 1 byte, 10-15 = vrtype 24 with (x-7)
+    //       extra bytes required between multiallelic and phased tracks.
+    //   12: 2 bits, dosage, must be single-sample.  0 = vrtype 5,
+    //       1 = vrtype 0, 2 = vrtype 0x45 with 2 bytes, 3 = vrtype 0x40 with 3
+    //       total bytes.
+    //   13: reserved for single-sample multiallelic + dosage.
+    //   14: 4 bits, phased + dosage, must be single-sample.  0 and 1 as usual,
+    //       3 = vrtype 16 with 1 phaseinfo byte, 4 = vrtype 0x45 with 2 bytes,
+    //       5 = vrtype 0x40 with 3 total bytes, 12 = vrtype 0xc5 with 4 total
+    //       bytes, 13 = vrtype 0xc0 with 5 total bytes, 15 = vrtype 0xe0 with
+    //       6 total bytes
+    //   15: reserved for single-sample multiallelic + phased dosage.
+    const uint32_t header_ctrl_low3 = header_ctrl & 7;
+    // this can be a table lookup once 13/15 are implemented
+    if (unlikely((header_ctrl_low3 == 5) || (header_ctrl_low3 == 7))) {
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Twelfth byte of %s does not correspond to a format supported by this version of pgenlib.\n", header_fname);
+      return kPglRetNotYetSupported;
+    }
+  }
+  *pgfi_alloc_cacheline_ct_ptr = CountPgfiAllocCachelinesRequired(raw_variant_ct);
+  return kPglRetSuccess;
+}
+
+void FillPgenHeaderReadErrstrFromNzErrno(uint32_t is_pgi, char* errstr_buf) {
+  snprintf(errstr_buf, kPglErrstrBufBlen, "Error: .pgen%s read failure: %s.\n", is_pgi? ".pgi" : "", strerror(errno));
+}
+
+void FillPgenReadErrstrFromNzErrno(char* errstr_buf) {
+  return FillPgenHeaderReadErrstrFromNzErrno(0, errstr_buf);
+}
+
+void FillPgenHeaderReadErrstrFromErrno(uint32_t is_pgi, char* errstr_buf) {
+  if (errno) {
+    FillPgenHeaderReadErrstrFromNzErrno(is_pgi, errstr_buf);
+  } else {
+    snprintf(errstr_buf, kPglErrstrBufBlen, "Error: .pgen%s read failure: File appears to be corrupted.\n", is_pgi? ".pgi" : "");
+  }
+}
+
+void FillPgenReadErrstrFromErrno(char* errstr_buf) {
+  return FillPgenHeaderReadErrstrFromErrno(0, errstr_buf);
+}
+
+void FillPgenHeaderReadErrstr(FILE* ff, uint32_t is_pgi, char* errstr_buf) {
+  if (feof_unlocked(ff)) {
+    errno = 0;
+  }
+  FillPgenHeaderReadErrstrFromErrno(is_pgi, errstr_buf);
+}
+
+void FillPgenReadErrstr(FILE* ff, char* errstr_buf) {
+  FillPgenHeaderReadErrstr(ff, 0, errstr_buf);
+}
+
+// Assumes ff points to first byte of appropriate extension-set varint.
+// For each exts_iter entry corresponding to a present extension, size is
+// initialized to 0-based relative sequence number of extension.  size is
+// initialized to ~0LLU for each absent extension.
+// If preprocessing header_exts, footer_fpos_ptr must be nullptr, and ff points
+// to first byte of footer-extension-set varint on successful exit.  If
+// preprocessing footer_exts, footer_fpos_ptr must be non-null, will be filled
+// if footer exists, and ff will be advanced past that on successful exit.
+PglErr PgfiInitPhase2PreprocessExts(uint32_t is_pgi, FILE* ff, PgenExtensionLl* exts_iter, uint64_t* footer_fpos_ptr, char* errstr_buf) {
+  uint32_t cur_type_idx = exts_iter? exts_iter->type_idx : UINT32_MAX;
+  uint32_t type_idx_start = 0;
+  uint32_t prev_ct = 0;
+  while (1) {
+    const uint32_t type_idx_stop = type_idx_start + 7;
+    const int32_t ii = getc_unlocked(ff);
+    if (unlikely(ii == EOF)) {
+      if (ferror_unlocked(ff)) {
+        FillPgenHeaderReadErrstrFromNzErrno(is_pgi, errstr_buf);
+        return kPglRetReadFail;
+      }
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid .pgen%s.\n", is_pgi? ".pgi file" : " header");
+      return kPglRetMalformedInput;
+    }
+    const uint32_t cur_byte = ii;
+    while (cur_type_idx < type_idx_stop) {
+      const uint32_t shifted_bit = 1 << (cur_type_idx - type_idx_start);
+      if (cur_byte & shifted_bit) {
+        exts_iter->size = prev_ct + PopcountByte(cur_byte & (shifted_bit - 1));
+      } else {
+        exts_iter->size = ~0LLU;
+      }
+      exts_iter = exts_iter->next;
+      const uint32_t next_type_idx = exts_iter? exts_iter->type_idx : UINT32_MAX;
+      if (unlikely(next_type_idx <= cur_type_idx)) {
+        snprintf(errstr_buf, kPglErrstrBufBlen, "Error: PgfiInitPhase2Ex() extension linked-lists must be ordered by increasing type_idx.\n");
+        return kPglRetImproperFunctionCall;
+      }
+      cur_type_idx = next_type_idx;
+    }
+    if (unlikely((type_idx_start == 252) && (cur_byte & 0xf0))) {
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid .pgen%s.\n", is_pgi? ".pgi file" : " header");
+      return kPglRetMalformedInput;
+    }
+    if (!(cur_byte & 128)) {
+      if (footer_fpos_ptr) {
+        if (cur_byte || prev_ct) {
+          if (unlikely(!fread_unlocked(footer_fpos_ptr, sizeof(int64_t), 1, ff))) {
+            FillPgenHeaderReadErrstr(ff, is_pgi, errstr_buf);
+            return kPglRetReadFail;
+          }
+        }
+      }
+      break;
+    }
+    type_idx_start = type_idx_stop;
+    prev_ct += PopcountByte(cur_byte) - 1;
+  }
+  if (exts_iter) {
+    while (1) {
+      exts_iter->size = ~0LLU;
+      exts_iter = exts_iter->next;
+      if (!exts_iter) {
+        break;
+      }
+      const uint32_t next_type_idx = exts_iter->type_idx;
+      if (next_type_idx <= cur_type_idx) {
+        snprintf(errstr_buf, kPglErrstrBufBlen, "Error: PgfiInitPhase2Ex() extension linked-lists must be ordered by increasing type_idx.\n");
+        return kPglRetImproperFunctionCall;
+      }
+      cur_type_idx = next_type_idx;
+    }
+  }
+  return kPglRetSuccess;
+}
+
+PglErr PgfiInitPhase2FillExtSizes(uint32_t is_pgi, FILE* ff, PgenExtensionLl* exts_iter, char* errstr_buf) {
+  uint32_t next_seq_idx = 0;
+  for (; exts_iter; exts_iter = exts_iter->next) {
+    if (exts_iter->size == ~0LLU) {
+      continue;
+    }
+    const uint32_t cur_seq_idx = exts_iter->size;
+    for (; next_seq_idx < cur_seq_idx; ++next_seq_idx) {
+      if (unlikely(FSkipVint(ff))) {
+        goto PgfiInitPhase2FillExtSizes_error_or_eof;
+      }
+    }
+    const uint64_t cur_size = FGetVint63(ff);
+    if (unlikely(cur_size == (1LLU << 63))) {
+      goto PgfiInitPhase2FillExtSizes_error_or_eof;
+    }
+    exts_iter->size = cur_size;
+    next_seq_idx = cur_seq_idx + 1;
+  }
+  return kPglRetSuccess;
+ PgfiInitPhase2FillExtSizes_error_or_eof:
+  if (ferror_unlocked(ff)) {
+    FillPgenHeaderReadErrstrFromNzErrno(is_pgi, errstr_buf);
+    return kPglRetReadFail;
+  }
+  snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid .pgen%s.\n", is_pgi? ".pgi file" : " header");
+  return kPglRetMalformedInput;
+}
+
+static_assert(kPglMaxAlleleCt == 255, "Need to update PgfiInitPhase2Ex().");
+PglErr PgfiInitPhase2Ex(PgenHeaderCtrl header_ctrl, uint32_t allele_cts_already_loaded, uint32_t nonref_flags_already_loaded, uint32_t use_blockload, uint32_t vblock_idx_start, uint32_t vidx_end, uint32_t* max_vrec_width_ptr, PgenFileInfo* pgfip, unsigned char* pgfi_alloc, PgenExtensionLl* header_exts, PgenExtensionLl* footer_exts, uintptr_t* pgr_alloc_cacheline_ct_ptr, char* errstr_buf) {
+  // *max_vrec_width_ptr technically only needs to be set in single-variant
+  // fread() mode, but its computation is not currently optimized out in the
+  // other two modes.
+
+  // possible todo: add option to skip validation when allele_cts/nonref_flags
+  // are already loaded.  but let's play it safe for now.
+  const uint32_t raw_variant_ct = pgfip->raw_variant_ct;
+  const uint32_t const_vrec_width = pgfip->const_vrec_width;
+  *pgr_alloc_cacheline_ct_ptr = 0;
+
+  // Note that this is a rather hefty stack allocation.
+  unsigned char loadbuf[kPglVblockSize * 4];
+
+  uintptr_t* allele_idx_offsets_iter = pgfip->allele_idx_offsets;
+  uintptr_t prev_allele_idx_offset = 0;
+  if (allele_idx_offsets_iter) {
+    if (!allele_cts_already_loaded) {
+      *allele_idx_offsets_iter = 0;
+    } else {
+      prev_allele_idx_offset = *allele_idx_offsets_iter;
+    }
+    ++allele_idx_offsets_iter;
+  }
+  if (!raw_variant_ct) {
+    return kPglRetSuccess;
+  }
+  const uint32_t nonref_flags_stored = ((header_ctrl >> 6) == 3);
+  unsigned char* nonref_flags_iter = DowncastToUc(pgfip->nonref_flags);
+  const unsigned char* fread_ptr = nullptr;  // maybe-uninitialized warning
+  FILE* header_ff = pgfip->pgi_ff;
+  const uint32_t is_pgi = (header_ff != nullptr);
+  if (!is_pgi) {
+    header_ff = pgfip->shared_ff;
+    assert(header_ff);
+  }
+  if (const_vrec_width) {
+    assert(!is_pgi);
+    // no allele counts to verify if fixed-width
+    // always need ldbase_raw_genovec
+    *pgr_alloc_cacheline_ct_ptr = NypCtToCachelineCt(pgfip->raw_sample_ct);
+    *max_vrec_width_ptr = const_vrec_width;
+    if (!use_blockload) {
+      // using fread() single-variant-at-a-time, need pgr.fread_buf
+      *pgr_alloc_cacheline_ct_ptr += DivUp(const_vrec_width, kCacheline);
+    }
+    if ((!(header_ctrl & 192)) || (pgfip->const_vrtype == kPglVrtypePlink1)) {
+      return kPglRetSuccess;
+    }
+    if ((header_ctrl >> 6) == 1) {
+      // all ref
+      if (nonref_flags_already_loaded) {
+        if (unlikely(!AllWordsAreZero(pgfip->nonref_flags, BitCtToWordCt(raw_variant_ct)))) {
+          snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Loaded nonref_flags do not match values in .pgen file.\n");
+          return kPglRetInconsistentInput;
+        }
+      }
+      return kPglRetSuccess;
+    }
+    if ((header_ctrl >> 6) == 2) {
+      // all nonref
+      if (nonref_flags_already_loaded) {
+        if (unlikely(!AllBitsAreOne(pgfip->nonref_flags, raw_variant_ct))) {
+          snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Loaded nonref_flags do not match values in .pgen file.\n");
+          return kPglRetInconsistentInput;
+        }
+      }
+      return kPglRetSuccess;
+    }
+    // _last more useful than _end iff we just refer to the number of elements
+    // in the block and have no use for a _stop pointer
+    unsigned char* nonref_flags_last = &(nonref_flags_iter[((raw_variant_ct - 1) / (kPglVblockSize * 32)) * (kPglVblockSize * 4)]);
+    uint32_t cur_byte_ct = kPglVblockSize * 4;
+    for (; ; nonref_flags_iter = &(nonref_flags_iter[cur_byte_ct])) {
+      if (nonref_flags_iter >= nonref_flags_last) {
+        if (nonref_flags_iter > nonref_flags_last) {
+          break;
+        }
+        cur_byte_ct = 1 + ((raw_variant_ct - 1) % (kPglVblockSize * 32)) / CHAR_BIT;
+      }
+      unsigned char* loadptr = nonref_flags_already_loaded? loadbuf : nonref_flags_iter;
+      if (unlikely(!fread_unlocked(loadptr, cur_byte_ct, 1, header_ff))) {
+        FillPgenHeaderReadErrstr(header_ff, is_pgi, errstr_buf);
+        return kPglRetReadFail;
+      }
+      if (nonref_flags_already_loaded) {
+        if (unlikely(!memequal(nonref_flags_iter, loadbuf, cur_byte_ct))) {
+          snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Loaded nonref_flags do not match values in .pgen file.\n");
+          return kPglRetInconsistentInput;
+        }
+      }
+    }
+    return kPglRetSuccess;
+  }
+
+  const uint32_t raw_sample_ct = pgfip->raw_sample_ct;
+  unsigned char* vrtypes_iter = pgfi_alloc;
+  pgfip->vrtypes = vrtypes_iter;
+  uint64_t* var_fpos_iter = R_CAST(uint64_t*, &(vrtypes_iter[RoundUpPow2(raw_variant_ct + 1, kCacheline)]));
+  pgfip->var_fpos = var_fpos_iter;
+  uint32_t vblock_ct_m1 = (raw_variant_ct - 1) / kPglVblockSize;
+  uint32_t max_vrec_width = 0;
+  uint64_t variant_fpos;
+  if (vblock_idx_start) {
+    if (unlikely(fseeko(header_ff, vblock_idx_start * sizeof(int64_t), SEEK_CUR))) {
+      FillPgenHeaderReadErrstrFromNzErrno(is_pgi, errstr_buf);
+      return kPglRetReadFail;
+    }
+  }
+  if (unlikely(!fread_unlocked(&variant_fpos, sizeof(int64_t), 1, header_ff))) {
+    FillPgenHeaderReadErrstr(header_ff, is_pgi, errstr_buf);
+    return kPglRetReadFail;
+  }
+  // May also need to load the rest of these values in the future, if we want
+  // to support dynamic insertion into a memory-mapped file.  But skip them
+  // for now.
+  if (unlikely(fseeko(header_ff, (vblock_ct_m1 - vblock_idx_start) * sizeof(int64_t), SEEK_CUR))) {
+    FillPgenHeaderReadErrstrFromNzErrno(is_pgi, errstr_buf);
+    return kPglRetReadFail;
+  }
+  const uint32_t vrtype_and_fpos_storage = header_ctrl & 15;
+  const uint32_t alt_allele_ct_byte_ct = (header_ctrl >> 4) & 3;
+  if (alt_allele_ct_byte_ct) {
+    assert(alt_allele_ct_byte_ct == 1);
+    if (unlikely(!allele_idx_offsets_iter)) {
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: pgfip->allele_idx_offsets must be allocated before PgfiInitPhase2Ex() is called.\n");
+      return kPglRetImproperFunctionCall;
+    }
+  }
+  uint32_t vblock_idx = vblock_idx_start;
+  vblock_ct_m1 = (vidx_end - 1) / kPglVblockSize;
+  if (vblock_idx) {
+    uintptr_t header_vblock_byte_ct = kPglVblockSize * alt_allele_ct_byte_ct;
+    if (nonref_flags_stored) {
+      header_vblock_byte_ct += kPglVblockSize / CHAR_BIT;
+    }
+    if (vrtype_and_fpos_storage & 8) {
+      header_vblock_byte_ct += kPglVblockSize >> (10 - vrtype_and_fpos_storage);
+    } else {
+      if (!(vrtype_and_fpos_storage & 4)) {
+        header_vblock_byte_ct += kPglVblockSize / 2;
+      } else {
+        header_vblock_byte_ct += kPglVblockSize;
+      }
+      header_vblock_byte_ct += kPglVblockSize * (1 + (vrtype_and_fpos_storage & 3));
+    }
+    if (unlikely(fseeko(header_ff, header_vblock_byte_ct * S_CAST(uint64_t, vblock_idx), SEEK_CUR))) {
+      FillPgenHeaderReadErrstrFromNzErrno(is_pgi, errstr_buf);
+      return kPglRetReadFail;
+    }
+  }
+  uint32_t cur_vblock_variant_ct = kPglVblockSize;
+  uint32_t max_allele_ct = pgfip->max_allele_ct;
+  for (; ; ++vblock_idx) {
+    if (vblock_idx >= vblock_ct_m1) {
+      if (vblock_idx > vblock_ct_m1) {
+        break;
+      }
+      cur_vblock_variant_ct = ModNz(vidx_end, kPglVblockSize);
+    }
+    // 1. handle vrtypes and var_fpos.
+    if (vrtype_and_fpos_storage >= 8) {
+      // Special encodings.
+      uint32_t log2_entry_bit_width = 1;
+      unsigned char vrtype_table[16];
+      uint32_t vrec_len_table[16];
+      vrtype_table[0] = 5;
+      vrtype_table[1] = 0;
+      vrec_len_table[0] = 0;
+      const uint32_t raw_sample_ct4 = NypCtToByteCt(raw_sample_ct);
+      vrec_len_table[1] = raw_sample_ct4;
+      if (vrtype_and_fpos_storage == 8) {
+        log2_entry_bit_width = 0;
+      } else if (vrtype_and_fpos_storage == 9) {
+        vrtype_table[2] = 8;
+        vrtype_table[3] = 8;
+        vrec_len_table[2] = raw_sample_ct4 + 2;
+        vrec_len_table[3] = raw_sample_ct4 + 3;
+      } else if (vrtype_and_fpos_storage == 10) {
+        vrtype_table[2] = 16;
+        vrtype_table[3] = 16;
+        vrec_len_table[2] = raw_sample_ct4 + 1;
+        vrec_len_table[3] = raw_sample_ct4 + 2;
+      } else if (vrtype_and_fpos_storage == 11) {
+        log2_entry_bit_width = 2;
+        vrtype_table[2] = 8;
+        vrtype_table[3] = 8;
+        vrtype_table[4] = 8;
+        vrtype_table[5] = 8;
+        vrtype_table[6] = 8;
+        vrtype_table[7] = 8;
+        // 8 invalid
+        vrtype_table[9] = 16;
+        vrtype_table[10] = 24;
+        vrtype_table[11] = 24;
+        vrtype_table[12] = 24;
+        vrtype_table[13] = 24;
+        vrtype_table[14] = 24;
+        vrtype_table[15] = 24;
+        vrec_len_table[9] = raw_sample_ct4 + 1;
+        for (uint32_t uii = 2; uii < 8; ++uii) {
+          vrec_len_table[uii] = raw_sample_ct4 + uii;
+          vrec_len_table[uii + 8] = raw_sample_ct4 + 1 + uii;
+        }
+      } else if (vrtype_and_fpos_storage == 12) {
+        assert(raw_sample_ct == 1);
+        vrtype_table[2] = 0x45;
+        vrtype_table[3] = 0x40;
+        vrec_len_table[2] = 2;
+        vrec_len_table[3] = 3;
+      } else {
+        // 14 is only remaining possibility for now
+        assert(raw_sample_ct == 1);
+        log2_entry_bit_width = 2;
+        vrtype_table[3] = 0x10;
+        vrtype_table[4] = 0x45;
+        vrtype_table[5] = 0x40;
+        vrtype_table[12] = 0xc5;
+        vrtype_table[13] = 0xc0;
+        vrtype_table[15] = 0xe0;
+        vrec_len_table[3] = 2;
+        vrec_len_table[4] = 2;
+        vrec_len_table[5] = 3;
+        vrec_len_table[12] = 4;
+        vrec_len_table[13] = 5;
+        vrec_len_table[15] = 6;
+      }
+      const uint32_t entry_bit_width = 1 << log2_entry_bit_width;
+      const uint32_t entry_mask = (1 << entry_bit_width) - 1;
+      const uint32_t cur_byte_ct = 1 + ((cur_vblock_variant_ct - 1) >> (3 - log2_entry_bit_width));
+      const unsigned char* loadbuf_biter;
+      if (unlikely(!fread_unlocked(loadbuf, cur_byte_ct, 1, header_ff))) {
+        FillPgenHeaderReadErrstr(header_ff, is_pgi, errstr_buf);
+        return kPglRetReadFail;
+      }
+      loadbuf_biter = loadbuf;
+      const uint32_t log2_entries_per_word = kBitsPerWordLog2 - log2_entry_bit_width;
+      const uint32_t block_len = 1 << log2_entries_per_word;
+      uint32_t cur_vblock_idx = 0;
+      uint32_t cur_vblock_idx_stop = block_len;
+      for (; ; cur_vblock_idx_stop += block_len) {
+        if (cur_vblock_idx_stop > cur_vblock_variant_ct) {
+          if (cur_vblock_idx == cur_vblock_variant_ct) {
+            break;
+          }
+          cur_vblock_idx_stop = cur_vblock_variant_ct;
+        }
+        uintptr_t input_word;
+        CopyFromUnalignedIncrW(&input_word, &loadbuf_biter);
+        for (; cur_vblock_idx != cur_vblock_idx_stop; ++cur_vblock_idx) {
+          const uint32_t input_word_masked = input_word & entry_mask;
+          *vrtypes_iter++ = vrtype_table[input_word_masked];
+          *var_fpos_iter++ = variant_fpos;
+          variant_fpos += vrec_len_table[input_word_masked];
+          input_word >>= entry_bit_width;
+        }
+      }
+    } else {
+      if (vrtype_and_fpos_storage < 4) {
+        // no phase or dosage present, 4-bit vrtypes
+        const uint32_t cur_byte_ct = DivUp(cur_vblock_variant_ct, 2);
+        if (unlikely(!fread_unlocked(loadbuf, cur_byte_ct, 1, header_ff))) {
+          FillPgenHeaderReadErrstr(header_ff, is_pgi, errstr_buf);
+          return kPglRetReadFail;
+        }
+        fread_ptr = loadbuf;
+        Expand4bitTo8(fread_ptr, cur_vblock_variant_ct, 0, vrtypes_iter);
+        vrtypes_iter = &(vrtypes_iter[cur_vblock_variant_ct]);
+      } else {
+        // phase and dosage
+        if (unlikely(!fread_unlocked(vrtypes_iter, cur_vblock_variant_ct, 1, header_ff))) {
+          FillPgenHeaderReadErrstr(header_ff, is_pgi, errstr_buf);
+          return kPglRetReadFail;
+        }
+        vrtypes_iter = &(vrtypes_iter[cur_vblock_variant_ct]);
+      }
+      const uint32_t vrec_len_byte_ct = 1 + (vrtype_and_fpos_storage & 3);
+      const uint32_t cur_byte_ct = cur_vblock_variant_ct * vrec_len_byte_ct;
+      if (unlikely(!fread_unlocked(loadbuf, cur_byte_ct, 1, header_ff))) {
+        FillPgenHeaderReadErrstr(header_ff, is_pgi, errstr_buf);
+        return kPglRetReadFail;
+      }
+      fread_ptr = loadbuf;
+      if (vrec_len_byte_ct == 1) {
+        for (uint32_t cur_vblock_vidx = 0; cur_vblock_vidx != cur_vblock_variant_ct; ++cur_vblock_vidx) {
+          var_fpos_iter[cur_vblock_vidx] = variant_fpos;
+          uint32_t cur_vrec_len = fread_ptr[cur_vblock_vidx];
+          variant_fpos += cur_vrec_len;
+          // no need for correct max_vrec_width
+        }
+      } else if (vrec_len_byte_ct == 2) {
+        for (uint32_t cur_vblock_vidx = 0; cur_vblock_vidx != cur_vblock_variant_ct; ++cur_vblock_vidx) {
+          var_fpos_iter[cur_vblock_vidx] = variant_fpos;
+          uint16_t cur_vrec_len;
+          CopyFromUnalignedU16(&cur_vrec_len, &(fread_ptr[cur_vblock_vidx * 2]));
+          variant_fpos += cur_vrec_len;
+          if (cur_vrec_len > max_vrec_width) {
+            // todo: check whether we're better off just assuming 2^16 - 1
+            max_vrec_width = cur_vrec_len;
+          }
+        }
+      } else if (vrec_len_byte_ct == 3) {
+        for (uint32_t cur_vblock_vidx = 0; cur_vblock_vidx != cur_vblock_variant_ct; ++cur_vblock_vidx) {
+          var_fpos_iter[cur_vblock_vidx] = variant_fpos;
+          uint32_t cur_vrec_len;
+          // safe to read a byte past the end, since that's in loadbuf
+          CopyFromUnalignedU32(&cur_vrec_len, &(fread_ptr[cur_vblock_vidx * 3]));
+          cur_vrec_len &= 0xffffff;
+          variant_fpos += cur_vrec_len;
+          if (cur_vrec_len > max_vrec_width) {
+            max_vrec_width = cur_vrec_len;
+          }
+        }
+      } else {
+        for (uint32_t cur_vblock_vidx = 0; cur_vblock_vidx != cur_vblock_variant_ct; ++cur_vblock_vidx) {
+          var_fpos_iter[cur_vblock_vidx] = variant_fpos;
+          uint32_t cur_vrec_len;
+          CopyFromUnalignedU32(&cur_vrec_len, &(fread_ptr[cur_vblock_vidx * 4]));
+          variant_fpos += cur_vrec_len;
+          if (cur_vrec_len > max_vrec_width) {
+            max_vrec_width = cur_vrec_len;
+          }
+        }
+#ifdef __LP64__
+        if (unlikely(max_vrec_width > kPglMaxBytesPerVariant)) {
+          snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid .pgen%s.\n", is_pgi? ".pgi file" : " header");
+          return kPglRetMalformedInput;
+        }
+#else
+        if (unlikely(max_vrec_width > kMaxBytesPerIO)) {
+          snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Variant records too large for 32-bit pgenlib.\n");
+          return kPglRetNomem;
+        }
+#endif
+      }
+      var_fpos_iter = &(var_fpos_iter[cur_vblock_variant_ct]);
+    }
+    // 2. allele counts?
+    if (alt_allele_ct_byte_ct) {
+      assert(alt_allele_ct_byte_ct == 1);
+      if (unlikely(!fread_unlocked(loadbuf, cur_vblock_variant_ct * alt_allele_ct_byte_ct, 1, header_ff))) {
+        FillPgenHeaderReadErrstr(header_ff, is_pgi, errstr_buf);
+        return kPglRetReadFail;
+      }
+      fread_ptr = loadbuf;
+      // max_allele_ct scan can probably be sped up with _mm{256}_max_epu8()?
+      // probably can't do much for main loop (at least in sizeof(AlleleCode)
+      // == 1 case)
+      if (allele_cts_already_loaded) {
+        // todo: update this for multibyte AlleleCode
+        for (uint32_t cur_vblock_vidx = 0; cur_vblock_vidx != cur_vblock_variant_ct; ++cur_vblock_vidx) {
+          const uintptr_t cur_allele_idx_offset = allele_idx_offsets_iter[cur_vblock_vidx];
+          const uint32_t cur_allele_ct = fread_ptr[cur_vblock_vidx];
+          if (unlikely((cur_allele_idx_offset - prev_allele_idx_offset) != cur_allele_ct)) {
+            snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Loaded allele_idx_offsets do not match values in .pgen%s file.\n", is_pgi? ".pgi" : "");
+            return kPglRetInconsistentInput;
+          }
+          prev_allele_idx_offset = cur_allele_idx_offset;
+          if (cur_allele_ct > max_allele_ct) {
+            max_allele_ct = cur_allele_ct;
+          }
+        }
+      } else {
+        for (uint32_t cur_vblock_vidx = 0; cur_vblock_vidx != cur_vblock_variant_ct; ++cur_vblock_vidx) {
+          const uint32_t cur_allele_ct = fread_ptr[cur_vblock_vidx];
+          allele_idx_offsets_iter[cur_vblock_vidx] = prev_allele_idx_offset;
+          prev_allele_idx_offset += cur_allele_ct;
+          if (cur_allele_ct > max_allele_ct) {
+            max_allele_ct = cur_allele_ct;
+          }
+        }
+      }
+      allele_idx_offsets_iter = &(allele_idx_offsets_iter[cur_vblock_variant_ct]);
+    }
+    // 3. nonref flags?
+    if (nonref_flags_stored) {
+      const uint32_t cur_byte_ct = DivUp(cur_vblock_variant_ct, CHAR_BIT);
+      unsigned char* loadptr = nonref_flags_already_loaded? loadbuf : nonref_flags_iter;
+      if (unlikely(!fread_unlocked(loadptr, cur_byte_ct, 1, header_ff))) {
+        FillPgenHeaderReadErrstr(header_ff, is_pgi, errstr_buf);
+        return kPglRetReadFail;
+      }
+      if (nonref_flags_already_loaded) {
+        if (unlikely(!memequal(nonref_flags_iter, loadbuf, cur_byte_ct))) {
+          snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Loaded nonref_flags do not match values in .pgen%s file.\n", is_pgi? ".pgi" : "");
+          return kPglRetInconsistentInput;
+        }
+      }
+      nonref_flags_iter = &(nonref_flags_iter[cur_byte_ct]);
+    }
+  }
+
+  const uint32_t last_word_byte_ct = cur_vblock_variant_ct % kBytesPerWord;
+  if (last_word_byte_ct) {
+    ProperSubwordStore(0, kBytesPerWord - last_word_byte_ct, vrtypes_iter);
+  } else {
+    // must guarantee a trailing zero for is_ldbase check to work
+    vrtypes_iter[0] = 0;
+  }
+
+  uint64_t footer_extensions_fpos = 0;
+  if (pgfip->extensions_present && (header_exts || footer_exts)) {
+    if (vidx_end < raw_variant_ct) {
+      const uint32_t vrec_len_byte_ct = 1 + (vrtype_and_fpos_storage & 3);
+      const uint32_t phase_or_dosage_present = (vrtype_and_fpos_storage >= 4);
+      const uint64_t ext_fpos = PglHeaderBaseEndOffset(raw_variant_ct, vrec_len_byte_ct, phase_or_dosage_present, nonref_flags_stored);
+      if (unlikely(fseeko(header_ff, ext_fpos, SEEK_SET))) {
+        FillPgenHeaderReadErrstrFromNzErrno(is_pgi, errstr_buf);
+        return kPglRetReadFail;
+      }
+    }
+    PglErr reterr = PgfiInitPhase2PreprocessExts(is_pgi, header_ff, header_exts, nullptr, errstr_buf);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+    reterr = PgfiInitPhase2PreprocessExts(is_pgi, header_ff, footer_exts, &footer_extensions_fpos, errstr_buf);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+    reterr = PgfiInitPhase2FillExtSizes(is_pgi, header_ff, header_exts, errstr_buf);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+  }
+
+  if (is_pgi && (!header_exts) && (!footer_exts)) {
+    if (unlikely(fclose_null(&pgfip->pgi_ff))) {
+      FillPgenHeaderReadErrstrFromNzErrno(1, errstr_buf);
+      return kPglRetReadFail;
+    }
+  }
+
+  const uint64_t actual_fpos = ftello(pgfip->shared_ff);
+  if (actual_fpos != pgfip->var_fpos[0]) {
+    // now > instead of != to allow additional information to be stored between
+    // header and first variant record (e.g. mode 0x11).
+    if (unlikely(actual_fpos > pgfip->var_fpos[0])) {
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid .pgen%s.\n", is_pgi? ".pgi file" : " header");
+      return kPglRetMalformedInput;
+    }
+    if (unlikely(fseeko(pgfip->shared_ff, pgfip->var_fpos[0], SEEK_SET))) {
+      FillPgenReadErrstrFromNzErrno(errstr_buf);
+      return kPglRetReadFail;
+    }
+  }
+  if (footer_extensions_fpos && footer_exts) {
+    if (unlikely(fseeko(pgfip->shared_ff, footer_extensions_fpos, SEEK_SET))) {
+      FillPgenReadErrstrFromNzErrno(errstr_buf);
+      return kPglRetReadFail;
+    }
+    PglErr reterr = PgfiInitPhase2FillExtSizes(0, pgfip->shared_ff, footer_exts, errstr_buf);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+    if (unlikely(fseeko(pgfip->shared_ff, pgfip->var_fpos[0], SEEK_SET))) {
+      FillPgenReadErrstrFromNzErrno(errstr_buf);
+      return kPglRetReadFail;
+    }
+  }
+  pgfip->var_fpos[vidx_end] = variant_fpos;
+  pgfip->max_allele_ct = max_allele_ct;
+  // if difflist/LD might be present, scan for them in a way that's likely to
+  // terminate quickly
+  PgenGlobalFlags new_gflags = kfPgenGlobal0;
+  if (vrtype_and_fpos_storage != 8) {
+    const uint32_t trailing_byte_ct = vidx_end & (kBytesPerVec - 1);
+    if (trailing_byte_ct) {
+      memset(&(pgfip->vrtypes[vidx_end]), 0, kBytesPerVec - trailing_byte_ct);
+    }
+    const VecW* vrtypes_alias_start = R_CAST(VecW*, pgfip->vrtypes);
+    const VecW* vrtypes_alias_end = &(vrtypes_alias_start[DivUp(vidx_end, kBytesPerVec)]);
+    if (vblock_idx_start) {
+      vrtypes_alias_start = &(vrtypes_alias_start[vblock_idx_start * (kPglVblockSize / kBytesPerVec)]);
+    }
+    const VecW* vrtypes_alias_iter = vrtypes_alias_start;
+    if (vrtype_and_fpos_storage < 8) {
+      for (; vrtypes_alias_iter != vrtypes_alias_end; ++vrtypes_alias_iter) {
+        const VecW cur_vvec = *vrtypes_alias_iter;
+#ifdef __LP64__
+        const VecW cur_vvec_bit2 = vecw_slli(cur_vvec, 5);
+        const VecW cur_vvec_bit1 = vecw_slli(cur_vvec, 6);
+        // check if any vrtype has bit 1 set and bit 2 clear
+        if (vecw_movemask(vecw_and_notfirst(cur_vvec_bit2, cur_vvec_bit1))) {
+          new_gflags |= kfPgenGlobalLdCompressionPresent | kfPgenGlobalDifflistOrLdPresent;
+          break;
+        }
+        const VecW cur_vvec_bit0 = vecw_slli(cur_vvec, 7);
+        if (vecw_movemask(cur_vvec_bit0 | cur_vvec_bit2)) {
+          // this catches onebit
+          new_gflags |= kfPgenGlobalDifflistOrLdPresent;
+        }
+#else
+        const uintptr_t cur_vvec_shifted = cur_vvec >> 1;
+        // check if any vrtype has bit 1 set and bit 2 clear
+        if (vecw_and_notfirst(cur_vvec_shifted, cur_vvec) & (2 * kMask0101)) {
+          new_gflags |= kfPgenGlobalLdCompressionPresent | kfPgenGlobalDifflistOrLdPresent;
+          break;
+        }
+        if (cur_vvec & (5 * kMask0101)) {
+          // this catches onebit
+          new_gflags |= kfPgenGlobalDifflistOrLdPresent;
+        }
+#endif
+      }
+    }
+    if (vrtype_and_fpos_storage >= 4) {
+      // Likely for one of {hphase, dosage} to be present without the
+      // other; make this scan faster in that case, at the cost of
+      // failing to early-exit when both are present.
+      // This is also suboptimal for the vrtype_and_fpos_storage > 8
+      // special encodings.
+      VecW or_vvec = vecw_setzero();
+      for (vrtypes_alias_iter = vrtypes_alias_start; vrtypes_alias_iter != vrtypes_alias_end; ++vrtypes_alias_iter) {
+        or_vvec |= *vrtypes_alias_iter;
+      }
+#ifdef __LP64__
+      const VecW or_vvec_bit3 = vecw_slli(or_vvec, 4);
+      if (vecw_movemask(or_vvec_bit3)) {
+        // note that, if no phase or dosage data is present, we don't
+        // look for multiallelic hardcalls.
+        new_gflags |= kfPgenGlobalMultiallelicHardcallFound;
+      }
+      const VecW or_vvec_bit4 = vecw_slli(or_vvec, 3);
+      if (vecw_movemask(or_vvec_bit4)) {
+        new_gflags |= kfPgenGlobalHardcallPhasePresent;
+      }
+      const VecW or_vvec_bit5 = vecw_slli(or_vvec, 2);
+      const VecW or_vvec_bit6 = vecw_slli(or_vvec, 1);
+      if (vecw_movemask(or_vvec_bit5 | or_vvec_bit6)) {
+        new_gflags |= kfPgenGlobalDosagePresent;
+        if (vecw_movemask(or_vvec)) {
+          new_gflags |= kfPgenGlobalDosagePhasePresent;
+        }
+      }
+#else
+      if (or_vvec & (8 * kMask0101)) {
+        new_gflags |= kfPgenGlobalMultiallelicHardcallFound;
+      }
+      if (or_vvec & (0x10 * kMask0101)) {
+        new_gflags |= kfPgenGlobalHardcallPhasePresent;
+      }
+      if (or_vvec & (0x60 * kMask0101)) {
+        new_gflags |= kfPgenGlobalDosagePresent;
+        if (or_vvec & (0x80 * kMask0101)) {
+          new_gflags |= kfPgenGlobalDosagePhasePresent;
+        }
+      }
+#endif
+    }
+    if (vrtype_and_fpos_storage > 8) {
+      if (vrtype_and_fpos_storage == 12) {
+        max_vrec_width = 3;
+      } else if (vrtype_and_fpos_storage == 14) {
+        max_vrec_width = 6;
+      } else {
+        max_vrec_width = NypCtToByteCt(raw_sample_ct);
+        if (vrtype_and_fpos_storage == 9) {
+          max_vrec_width += 3;
+        } else if (vrtype_and_fpos_storage == 10) {
+          max_vrec_width += 2;
+        } else {
+          // 11
+          max_vrec_width += 8;
+        }
+        // 13 and 15 not specified yet
+      }
+    } else if (!(vrtype_and_fpos_storage & 3)) {
+      // 1 byte per vrec_len entry, don't bother to determine true
+      // maximum
+      max_vrec_width = 255;
+    }
+    pgfip->gflags |= new_gflags;
+  } else {
+    // vrtype_and_fpos_storage == 8.
+    max_vrec_width = NypCtToByteCt(raw_sample_ct);
+  }
+  *pgr_alloc_cacheline_ct_ptr = CountPgrAllocCachelinesRequired(raw_sample_ct, new_gflags, max_allele_ct, use_blockload? 0 : max_vrec_width);
+  *max_vrec_width_ptr = max_vrec_width;
+  return kPglRetSuccess;
+}
+
+PglErr PgfiInitReloadExtSet(uint32_t is_pgi, FILE* ff, uintptr_t* ext_bitarr, uint32_t* ext_bitarr_cumulative_popcounts, uint64_t* footer_fpos_ptr, uint32_t* word_ct_ptr, char* errstr_buf) {
+  uintptr_t cur_output_word = 0;
+  uintptr_t nonzero_present = 0;
+  uint32_t write_idx_lowbits = 0;
+  uint32_t widx = 0;
+  ext_bitarr_cumulative_popcounts[0] = 0;
+  while (1) {
+    const int32_t ii = getc_unlocked(ff);
+    if (unlikely(ii == EOF)) {
+      if (ferror_unlocked(ff)) {
+        FillPgenHeaderReadErrstrFromNzErrno(is_pgi, errstr_buf);
+        return kPglRetReadFail;
+      }
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid .pgen%s.\n", is_pgi? ".pgi file" : " header");
+      return kPglRetMalformedInput;
+    }
+    const uintptr_t cur_masked_bits = ii & 127;
+    cur_output_word |= cur_masked_bits << write_idx_lowbits;
+    uint32_t new_write_idx_lowbits = write_idx_lowbits + 7;
+    if (new_write_idx_lowbits >= kBitsPerWord) {
+      ext_bitarr[widx] = cur_output_word;
+      nonzero_present |= cur_output_word;
+      ++widx;
+      ext_bitarr_cumulative_popcounts[widx] = PopcountWord(cur_output_word);
+      cur_output_word = cur_masked_bits >> (kBitsPerWord - write_idx_lowbits);
+      new_write_idx_lowbits -= kBitsPerWord;
+    }
+    write_idx_lowbits = new_write_idx_lowbits;
+    if (!(ii & 128)) {
+      break;
+    }
+    if (unlikely(widx == (256 / kBitsPerWord))) {
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid .pgen%s.\n", is_pgi? ".pgi file" : " header");
+      return kPglRetMalformedInput;
+    }
+  }
+  ext_bitarr[widx] = cur_output_word;
+  nonzero_present |= cur_output_word;
+  *word_ct_ptr = widx + 1;
+  if (footer_fpos_ptr && nonzero_present) {
+    if (unlikely(!fread_unlocked(footer_fpos_ptr, sizeof(int64_t), 1, ff))) {
+      FillPgenHeaderReadErrstr(ff, is_pgi, errstr_buf);
+      return kPglRetReadFail;
+    }
+  }
+  return kPglRetSuccess;
+}
+
+PglErr PgfiInitFillExts(const uintptr_t* ext_bitarr, const uint32_t* ext_cumulative_popcounts, uint32_t word_ct, uint32_t is_pgi, FILE* ff, PgenExtensionLl* exts, char* errstr_buf) {
+  {
+    const uint32_t ext_ct = ext_cumulative_popcounts[word_ct - 1] + PopcountWord(ext_bitarr[word_ct - 1]);
+    uint64_t sizes[256];
+    for (uint32_t seq_idx = 0; seq_idx != ext_ct; ++seq_idx) {
+      const uint64_t cur_size = FGetVint63(ff);
+      if (unlikely(cur_size == (1LLU << 63))) {
+        goto PgfiInitFillExts_error_or_eof;
+      }
+      sizes[seq_idx] = cur_size;
+    }
+    const uint32_t type_idx_limit = word_ct * kBitsPerWord;
+    uint32_t next_seq_idx = 0;
+    for (PgenExtensionLl* exts_iter = exts; exts_iter; exts_iter = exts_iter->next) {
+      const uint32_t type_idx = exts_iter->type_idx;
+      if (type_idx >= type_idx_limit) {
+        break;
+      }
+      if ((exts_iter->size == ~0LLU) || (!IsSet(ext_bitarr, type_idx))) {
+        continue;
+      }
+      const uint32_t seq_idx = RawToSubsettedPos(ext_bitarr, ext_cumulative_popcounts, type_idx);
+      const uint64_t cur_size = sizes[seq_idx];
+      if (unlikely(cur_size != exts_iter->size)) {
+        snprintf(errstr_buf, kPglErrstrBufBlen, "Error: PgfiInitLoadExts() extension byte-size mismatch.\n");
+        return kPglRetImproperFunctionCall;
+      }
+      if (seq_idx > next_seq_idx) {
+        uint64_t bytes_to_skip = 0;
+        for (uint32_t uii = next_seq_idx; uii != seq_idx; ++uii) {
+          bytes_to_skip += sizes[uii];
+        }
+        if (unlikely(fseeko(ff, bytes_to_skip, SEEK_CUR))) {
+          FillPgenHeaderReadErrstrFromNzErrno(is_pgi, errstr_buf);
+          return kPglRetReadFail;
+        }
+      }
+      if (unlikely(fread_checked(exts_iter->contents, cur_size, ff))) {
+        FillPgenHeaderReadErrstr(ff, is_pgi, errstr_buf);
+        return kPglRetReadFail;
+      }
+      next_seq_idx = seq_idx + 1;
+    }
+    return kPglRetSuccess;
+  }
+ PgfiInitFillExts_error_or_eof:
+  if (ferror_unlocked(ff)) {
+    FillPgenHeaderReadErrstrFromNzErrno(is_pgi, errstr_buf);
+    return kPglRetReadFail;
+  }
+  snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid .pgen%s.\n", is_pgi? ".pgi file" : " header");
+  return kPglRetMalformedInput;
+}
+
+PglErr PgfiInitLoadExts(PgenHeaderCtrl header_ctrl, PgenFileInfo* pgfip, PgenExtensionLl* header_exts, PgenExtensionLl* footer_exts, char* errstr_buf) {
+  const uint64_t starting_fpos = ftello(pgfip->shared_ff);
+  FILE* header_ff = pgfip->pgi_ff;
+  const uint32_t is_pgi = (header_ff != nullptr);
+  if (!is_pgi) {
+    header_ff = pgfip->shared_ff;
+    assert(header_ff);
+  }
+  {
+    const uint32_t vrtype_and_fpos_storage = header_ctrl & 15;
+    const uint32_t vrec_len_byte_ct = 1 + (vrtype_and_fpos_storage & 3);
+    const uint32_t phase_or_dosage_present = (vrtype_and_fpos_storage >= 4);
+    const uint32_t nonref_flags_stored = ((header_ctrl >> 6) == 3);
+    const uint64_t ext_fpos = PglHeaderBaseEndOffset(pgfip->raw_variant_ct, vrec_len_byte_ct, phase_or_dosage_present, nonref_flags_stored);
+    if (unlikely(fseeko(header_ff, ext_fpos, SEEK_SET))) {
+      FillPgenHeaderReadErrstrFromNzErrno(is_pgi, errstr_buf);
+      return kPglRetReadFail;
+    }
+  }
+  uintptr_t header_bitarr[(256 / kBitsPerWord) + 1];
+  uint32_t header_bitarr_cumulative_popcounts[(256 / kBitsPerWord) + 1];
+  uint32_t header_ext_word_ct;
+  PglErr reterr = PgfiInitReloadExtSet(is_pgi, header_ff, header_bitarr, header_bitarr_cumulative_popcounts, nullptr, &header_ext_word_ct, errstr_buf);
+  if (unlikely(reterr)) {
+    return reterr;
+  }
+  uintptr_t footer_bitarr[(256 / kBitsPerWord) + 1];
+  uint32_t footer_bitarr_cumulative_popcounts[(256 / kBitsPerWord) + 1];
+  uint32_t footer_ext_word_ct;
+  uint64_t footer_extensions_fpos;
+  reterr = PgfiInitReloadExtSet(is_pgi, header_ff, footer_bitarr, footer_bitarr_cumulative_popcounts, &footer_extensions_fpos, &footer_ext_word_ct, errstr_buf);
+  if (unlikely(reterr)) {
+    return reterr;
+  }
+  if (header_exts) {
+    reterr = PgfiInitFillExts(header_bitarr, header_bitarr_cumulative_popcounts, header_ext_word_ct, is_pgi, header_ff, header_exts, errstr_buf);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+  }
+  if (is_pgi) {
+    if (unlikely(fclose_null(&pgfip->pgi_ff))) {
+      FillPgenHeaderReadErrstrFromNzErrno(1, errstr_buf);
+      return kPglRetReadFail;
+    }
+  }
+  if (footer_exts) {
+    if (unlikely(fseeko(pgfip->shared_ff, footer_extensions_fpos, SEEK_SET))) {
+      FillPgenReadErrstrFromNzErrno(errstr_buf);
+      return kPglRetReadFail;
+    }
+    reterr = PgfiInitFillExts(footer_bitarr, footer_bitarr_cumulative_popcounts, footer_ext_word_ct, 0, pgfip->shared_ff, footer_exts, errstr_buf);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+  }
+  if (unlikely(fseeko(pgfip->shared_ff, starting_fpos, SEEK_SET))) {
+    FillPgenReadErrstrFromNzErrno(errstr_buf);
+    return kPglRetReadFail;
+  }
+  return kPglRetSuccess;
+}
+
+uint32_t GetLdbaseVidx(const unsigned char* vrtypes, uint32_t cur_vidx) {
+#ifdef __LP64__
+  const VecW* vrtypes_valias = R_CAST(const VecW*, vrtypes);
+  const uint32_t cur_vidx_orig_remainder = cur_vidx % kBytesPerVec;
+  uint32_t vidx_vec_idx = cur_vidx / kBytesPerVec;
+  Vec8thUint v8ui = 0;
+  if (cur_vidx_orig_remainder) {
+    const VecW cur_vvec = vrtypes_valias[vidx_vec_idx];
+    // non-ld: ((bit 2) OR (NOT bit 1))
+    const VecW cur_vvec_bit2 = vecw_slli(cur_vvec, 5);
+    const VecW inv_cur_vvec_bit1 = ~vecw_slli(cur_vvec, 6);
+    v8ui = vecw_movemask(cur_vvec_bit2 | inv_cur_vvec_bit1);
+    v8ui = bzhi(v8ui, cur_vidx_orig_remainder);
+  }
+  while (!v8ui) {
+    const VecW cur_vvec = vrtypes_valias[--vidx_vec_idx];
+    const VecW cur_vvec_bit2 = vecw_slli(cur_vvec, 5);
+    const VecW inv_cur_vvec_bit1 = ~vecw_slli(cur_vvec, 6);
+    v8ui = vecw_movemask(cur_vvec_bit2 | inv_cur_vvec_bit1);
+  }
+  return (vidx_vec_idx * kBytesPerVec) + bsru32(v8ui);
+#else
+  const uintptr_t* vrtypes_walias = R_CAST(const uintptr_t*, vrtypes);
+  const uint32_t cur_vidx_orig_remainder = cur_vidx % kBytesPerWord;
+  uint32_t vidx_word_idx = (cur_vidx - 1) / kBytesPerWord;
+  uintptr_t cur_vrtypes_word = vrtypes_walias[vidx_word_idx];
+  if (cur_vidx_orig_remainder) {
+    // make sure we don't detect a byte after the current position.
+    cur_vrtypes_word = bzhi(cur_vrtypes_word, CHAR_BIT * cur_vidx_orig_remainder);
+    cur_vrtypes_word |= (kMask0101 * 2) << (CHAR_BIT * cur_vidx_orig_remainder);
+  }
+  while (1) {
+    // ((bit 2) OR (NOT bit 1)) for each byte.  (possible experiment: see if
+    // the same assembly is generated if this expression is rewritten to use
+    // ands/nots.)
+    const uintptr_t detect_non_ld_word = ((cur_vrtypes_word >> 1) | (~cur_vrtypes_word)) & (kMask0101 * 2);
+    if (detect_non_ld_word) {
+      // find the highest-order set bit in detect_non_ld_word; this corresponds
+      // to the last non-LD-compressed byte (assuming little-endian).
+      const uint32_t new_ldbase_vidx_loworder = bsrw(detect_non_ld_word) / CHAR_BIT;
+      return (vidx_word_idx * kBytesPerWord) + new_ldbase_vidx_loworder;
+    }
+    // everything LD-compressed in the current block.  move back 8 bytes in the
+    // array (or 4-bytes for 32-bit build).
+    cur_vrtypes_word = vrtypes_walias[--vidx_word_idx];
+  }
+#endif
+}
+
+uint64_t GetPgfiLdbaseFpos(const PgenFileInfo* pgfip, uintptr_t vidx) {
+  if (!pgfip->var_fpos) {
+    return pgfip->const_fpos_offset + pgfip->const_vrec_width * S_CAST(uint64_t, vidx);
+  }
+  if (pgfip->vrtypes && ((pgfip->vrtypes[vidx] & 6) == 2)) {
+    vidx = GetLdbaseVidx(pgfip->vrtypes, vidx);
+  }
+  return pgfip->var_fpos[vidx];
+}
+
+uint64_t PgfiMultireadGetCachelineReq(const uintptr_t* variant_include, const PgenFileInfo* pgfip, uint32_t variant_ct, uint32_t block_size) {
+  // if block_size < kPglVblockSize, it's ideal for it to be a power of 2 (to
+  // avoid unnecessary vblock crossing), but that's not required.
+  const uint32_t raw_variant_ct = pgfip->raw_variant_ct;
+  if (variant_ct == raw_variant_ct) {
+    variant_include = nullptr;
+  }
+  uint32_t block_ct_m1 = 0;
+  if (raw_variant_ct < block_size) {
+    block_size = raw_variant_ct;
+  } else {
+    block_ct_m1 = (raw_variant_ct - 1) / block_size;
+  }
+  const uint64_t* var_fpos = pgfip->var_fpos;
+  if ((!variant_include) && (!var_fpos)) {
+    return DivUpU64(S_CAST(uint64_t, pgfip->const_vrec_width) * block_size, kCacheline);
+  }
+  uint64_t max_block_byte_ct = 0;
+  uint32_t max_block_variant_ct = 0;
+  for (uint32_t block_idx = 0; ; ++block_idx) {
+    uint32_t variant_uidx_start = block_idx * block_size;
+    uint32_t variant_uidx_end = variant_uidx_start + block_size;
+    if (block_idx >= block_ct_m1) {
+      if (block_idx > block_ct_m1) {
+        break;
+      }
+      variant_uidx_end = raw_variant_ct;
+    }
+    if (variant_include) {
+      variant_uidx_start = AdvBoundedTo1Bit(variant_include, variant_uidx_start, variant_uidx_end);
+      if (variant_uidx_start == variant_uidx_end) {
+        continue;
+      }
+      variant_uidx_end = 1 + FindLast1BitBefore(variant_include, variant_uidx_end);
+    }
+    if (var_fpos) {
+      if (pgfip->vrtypes && ((pgfip->vrtypes[variant_uidx_start] & 6) == 2)) {
+        // need to start loading from LD-buddy
+        variant_uidx_start = GetLdbaseVidx(pgfip->vrtypes, variant_uidx_start);
+      }
+      uint64_t cur_block_byte_ct = var_fpos[variant_uidx_end] - var_fpos[variant_uidx_start];
+      if (cur_block_byte_ct > max_block_byte_ct) {
+        max_block_byte_ct = cur_block_byte_ct;
+      }
+    } else {
+      // no LD compression here
+      const uint32_t cur_block_variant_ct = variant_uidx_end - variant_uidx_start;
+      if (cur_block_variant_ct > max_block_variant_ct) {
+        max_block_variant_ct = cur_block_variant_ct;
+        if (cur_block_variant_ct == block_size) {
+          // no larger value possible, terminate search
+          break;
+        }
+      }
+    }
+  }
+  if (!var_fpos) {
+    max_block_byte_ct = max_block_variant_ct * S_CAST(uint64_t, pgfip->const_vrec_width);
+  }
+  return DivUpU64(max_block_byte_ct, kCacheline);
+}
+
+PglErr PgfiMultiread(const uintptr_t* variant_include, uint32_t variant_uidx_start, uint32_t variant_uidx_end, uint32_t load_variant_ct, PgenFileInfo* pgfip) {
+  // we could permit 0, but that encourages lots of unnecessary thread wakeups
+  assert(load_variant_ct);
+  if (variant_include) {
+    variant_uidx_start = AdvTo1Bit(variant_include, variant_uidx_start);
+  }
+  assert(variant_uidx_start < pgfip->raw_variant_ct);
+  uint64_t block_offset;
+  if (pgfip->vrtypes && ((pgfip->vrtypes[variant_uidx_start] & 6) == 2)) {
+    // need to start loading from LD-buddy
+    // assume for now that we can't skip any variants between the LD-buddy and
+    // the actual first variant; should remove this assumption later
+    block_offset = pgfip->var_fpos[GetLdbaseVidx(pgfip->vrtypes, variant_uidx_start)];
+  } else {
+    block_offset = GetPgfiFpos(pgfip, variant_uidx_start);
+  }
+  pgfip->block_offset = block_offset;
+  uint64_t next_read_start_fpos = block_offset;
+  // break this up into multiple freads whenever this lets us skip an entire
+  // disk block
+  // (possible todo: make the disk block size a parameter of this function)
+  do {
+    const uint64_t cur_read_start_fpos = next_read_start_fpos;
+    uint32_t cur_read_uidx_end;
+    uint64_t cur_read_end_fpos;
+    while (1) {
+      cur_read_uidx_end = variant_uidx_end;
+      if (cur_read_uidx_end - variant_uidx_start == load_variant_ct) {
+        cur_read_end_fpos = GetPgfiFpos(pgfip, cur_read_uidx_end);
+        load_variant_ct = 0;
+        break;
+      }
+      cur_read_uidx_end = AdvTo0Bit(variant_include, variant_uidx_start);
+      cur_read_end_fpos = GetPgfiFpos(pgfip, cur_read_uidx_end);
+      load_variant_ct -= cur_read_uidx_end - variant_uidx_start;
+      if (!load_variant_ct) {
+        break;
+      }
+      variant_uidx_start = AdvTo1Bit(variant_include, cur_read_uidx_end);
+      next_read_start_fpos = GetPgfiFpos(pgfip, variant_uidx_start);
+      if (pgfip->vrtypes && ((pgfip->vrtypes[variant_uidx_start] & 6) == 2)) {
+        const uint32_t variant_read_uidx_start = GetLdbaseVidx(pgfip->vrtypes, variant_uidx_start);
+        if (variant_read_uidx_start <= cur_read_uidx_end) {
+          continue;
+        }
+        next_read_start_fpos = pgfip->var_fpos[variant_read_uidx_start];
+      }
+      // bugfix: can't use do..while, since previous "continue" needs to skip
+      // this check
+      if (RoundDownPow2U64(cur_read_end_fpos + kDiskBlockSize + 1LLU, kDiskBlockSize) < RoundDownPow2U64(next_read_start_fpos, kDiskBlockSize)) {
+        // minor bugfix (7 Jul 2017): break, not continue
+        break;
+      }
+    }
+    if (unlikely(fseeko(pgfip->shared_ff, cur_read_start_fpos, SEEK_SET))) {
+      return kPglRetReadFail;
+    }
+    uintptr_t len = cur_read_end_fpos - cur_read_start_fpos;
+    if (unlikely(fread_checked(K_CAST(unsigned char*, &(pgfip->block_base[cur_read_start_fpos - block_offset])), len, pgfip->shared_ff))) {
+      if (feof_unlocked(pgfip->shared_ff)) {
+        errno = 0;
+      }
+      return kPglRetReadFail;
+    }
+  } while (load_variant_ct);
+  return kPglRetSuccess;
+}
+
+
+void PreinitPgr(PgenReader* pgr_ptr) {
+  PgenReaderMain* pgrp = GetPgrp(pgr_ptr);
+  pgrp->ff = nullptr;
+}
+
+PglErr PgrInit(const char* fname, uint32_t max_vrec_width, PgenFileInfo* pgfip, PgenReader* pgr_ptr, unsigned char* pgr_alloc) {
+  PgenReaderMain* pgrp = GetPgrp(pgr_ptr);
+  // See CountPgrAllocCachelinesRequired().
+  // Could add a debug mode.
+
+  // Mode 1 (block-fread): block_base initialized, shared_ff != nullptr.  fname
+  //   must be nullptr.
+  // Mode 2 (per-variant fread): block_base == nullptr.  fname must be
+  //   non-null, though it isn't actually referenced during the first
+  //   PgenReader initialization (instead shared_ff is moved).
+  unsigned char* pgr_alloc_iter = pgr_alloc;
+  if (pgfip->block_base != nullptr) {
+    if (unlikely(fname != nullptr)) {
+      return kPglRetImproperFunctionCall;
+    }
+    pgrp->ff = nullptr;  // make sure CleanupPgr() doesn't break
+  } else {
+    if (pgfip->shared_ff != nullptr) {
+      if (unlikely(fname == nullptr)) {
+        return kPglRetImproperFunctionCall;
+      }
+      // move instead of close/reopen.
+      pgrp->ff = pgfip->shared_ff;
+      pgfip->shared_ff = nullptr;
+    } else {
+      pgrp->ff = fopen(fname, FOPEN_RB);
+      if (unlikely(!pgrp->ff)) {
+        return kPglRetOpenFail;
+      }
+    }
+    // now that arbitrary info can be stored between header and first variant
+    // record, always seek.
+    uint64_t seek_pos;
+    if (pgfip->var_fpos) {
+      seek_pos = pgfip->var_fpos[0];
+    } else {
+      seek_pos = pgfip->const_fpos_offset;
+    }
+    if (unlikely(fseeko(pgrp->ff, seek_pos, SEEK_SET))) {
+      return kPglRetReadFail;
+    }
+  }
+  pgrp->fi = *pgfip;  // struct copy
+  if (fname) {
+    // Mode 2 per-reader load buffer
+    pgrp->fread_buf = pgr_alloc_iter;
+    pgr_alloc_iter = &(pgr_alloc_iter[RoundUpPow2(max_vrec_width, kCacheline)]);
+  }
+  pgrp->fp_vidx = 0;
+  pgrp->ldbase_vidx = UINT32_MAX;
+  pgrp->ldbase_stypes = kfPgrLdcache0;
+  pgrp->ldbase_genovec = nullptr;
+  pgrp->ldbase_raregeno = nullptr;
+  pgrp->ldbase_difflist_sample_ids = nullptr;
+
+  const PgenGlobalFlags gflags = pgrp->fi.gflags;
+  const uint32_t raw_sample_ct = pgrp->fi.raw_sample_ct;
+  const uint32_t genovec_bytes_req = NypCtToCachelineCt(raw_sample_ct) * kCacheline;
+  pgrp->ldbase_raw_genovec = S_CAST(uintptr_t*, arena_alloc_raw(genovec_bytes_req, &pgr_alloc_iter));
+  const uint32_t bitvec_bytes_req = BitCtToCachelineCt(raw_sample_ct) * kCacheline;
+  const uint32_t ld_compression_present = (gflags / kfPgenGlobalLdCompressionPresent) & 1;
+  const uint32_t max_difflist_entry_ct_base = (raw_sample_ct / kPglMaxDifflistLenDivisor);
+  const uint32_t max_allele_ct = pgrp->fi.max_allele_ct;
+  pgrp->workspace_difflist_sample_ids = nullptr;
+  if ((gflags & kfPgenGlobalDifflistOrLdPresent) || (max_allele_ct > 2)) {
+    pgrp->workspace_difflist_sample_ids = S_CAST(uint32_t*, arena_alloc_raw_rd((max_difflist_entry_ct_base + 1) * sizeof(int32_t), &pgr_alloc_iter));
+  }
+  if (gflags & kfPgenGlobalDifflistOrLdPresent) {
+    // const uint32_t max_difflist_entry_ct = max_difflist_entry_ct_base * (1 + ld_compression_present);
+
+    const uintptr_t raregeno_bytes_req = NypCtToCachelineCt(max_difflist_entry_ct_base) * kCacheline;
+    pgrp->workspace_raregeno_vec = S_CAST(uintptr_t*, arena_alloc_raw(raregeno_bytes_req, &pgr_alloc_iter));
+    pgrp->workspace_raregeno_tmp_loadbuf = S_CAST(uintptr_t*, arena_alloc_raw(raregeno_bytes_req, &pgr_alloc_iter));
+
+    if (ld_compression_present) {
+      pgrp->ldbase_genovec = S_CAST(uintptr_t*, arena_alloc_raw(genovec_bytes_req, &pgr_alloc_iter));
+
+      pgrp->ldbase_raregeno = S_CAST(uintptr_t*, arena_alloc_raw(raregeno_bytes_req, &pgr_alloc_iter));
+
+      pgrp->ldbase_difflist_sample_ids = S_CAST(uint32_t*, arena_alloc_raw_rd((max_difflist_entry_ct_base + 1) * sizeof(int32_t), &pgr_alloc_iter));
+    }
+  } else {
+    pgrp->workspace_raregeno_vec = nullptr;
+    pgrp->workspace_raregeno_tmp_loadbuf = nullptr;
+  }
+  pgrp->workspace_vec = nullptr;
+  pgrp->workspace_aux1x_present = nullptr;
+  pgrp->workspace_imp_r2 = nullptr;
+  pgrp->workspace_all_hets = nullptr;
+  pgrp->workspace_subset = nullptr;
+  const PgenGlobalFlags gflags_hphase_dosage = gflags & (kfPgenGlobalHardcallPhasePresent | kfPgenGlobalDosagePresent);
+  if ((max_allele_ct > 2) || gflags_hphase_dosage) {
+    pgrp->workspace_vec = S_CAST(uintptr_t*, arena_alloc_raw(genovec_bytes_req, &pgr_alloc_iter));
+    if (max_allele_ct > 2) {
+      pgrp->workspace_aux1x_present = S_CAST(uintptr_t*, arena_alloc_raw(bitvec_bytes_req, &pgr_alloc_iter));
+      pgrp->workspace_imp_r2 = S_CAST(uint64_t*, arena_alloc_raw_rd(2 * max_allele_ct * sizeof(int64_t), &pgr_alloc_iter));
+    }
+    if (gflags & kfPgenGlobalHardcallPhasePresent) {
+      pgrp->workspace_all_hets = S_CAST(uintptr_t*, arena_alloc_raw(bitvec_bytes_req, &pgr_alloc_iter));
+      pgrp->workspace_subset = S_CAST(uintptr_t*, arena_alloc_raw(bitvec_bytes_req, &pgr_alloc_iter));
+    }
+    pgrp->workspace_dosage_present = nullptr;
+    pgrp->workspace_dphase_present = nullptr;
+    if (gflags & kfPgenGlobalDosagePresent) {
+      pgrp->workspace_dosage_present = S_CAST(uintptr_t*, arena_alloc_raw(bitvec_bytes_req, &pgr_alloc_iter));
+      if (gflags & kfPgenGlobalDosagePhasePresent) {
+        pgrp->workspace_dphase_present = S_CAST(uintptr_t*, arena_alloc_raw(bitvec_bytes_req, &pgr_alloc_iter));
+      }
+    }
+  }
+  return kPglRetSuccess;
+}
+
+void PgrPlink1ToPlink2InplaceUnsafe(uint32_t sample_ct, uintptr_t* genovec) {
+  // 00 -> 10, 01 -> 11, 10 -> 01, 11 -> 00
+  // new low bit  = [old low] ^ [old high]
+  // new high bit = ~[old high]
+  // "unsafe" because trailing bits are not zeroed out.
+  const uint32_t vec_ct = NypCtToVecCt(sample_ct);
+  const VecW m1 = VCONST_W(kMask5555);
+  const VecW not_m1 = VCONST_W(kMaskAAAA);
+  VecW* vptr = R_CAST(VecW*, genovec);
+  for (uint32_t vidx = 0; vidx != vec_ct; vidx++) {
+    const VecW not_cur_vec_high = vecw_and_notfirst(vptr[vidx], not_m1);
+    vptr[vidx] = (vecw_and_notfirst(vptr[vidx], m1) ^ vecw_srli(not_cur_vec_high, 1)) | not_cur_vec_high;
+  }
+}
+
+void PgrPlink2ToPlink1InplaceUnsafe(uint32_t sample_ct, uintptr_t* genovec) {
+  // 00 -> 11, 01 -> 10, 10 -> 00, 11 -> 01
+  // new low bit  = [old low] ^ (~[old high])
+  // new high bit = ~[old high]
+  const uint32_t vec_ct = NypCtToVecCt(sample_ct);
+  const VecW not_m1 = VCONST_W(kMaskAAAA);
+  VecW* vptr = R_CAST(VecW*, genovec);
+  for (uint32_t vidx = 0; vidx != vec_ct; vidx++) {
+    VecW cur_vec = vptr[vidx];
+    VecW not_cur_vec_high = vecw_and_notfirst(cur_vec, not_m1);
+    vptr[vidx] = (vecw_and_notfirst(not_m1, cur_vec) ^ vecw_srli(not_cur_vec_high, 1)) | not_cur_vec_high;
+  }
+}
+
+PglErr ParseDifflistHeader(const unsigned char* fread_end, uint32_t raw_sample_ct, const unsigned char** fread_pp, uintptr_t* raregeno_buf, const unsigned char** difflist_group_info_ptr, uint32_t* difflist_len_ptr) {
+  // Can be used for deltalists as well: pass raregeno_buf == nullptr.
+  // Trailing bits of raregeno may not be zeroed out.
+  // Will need a separate 64-bit version of this for multiallelic dosages.
+  const uint32_t difflist_len = GetVint31(fread_end, fread_pp);
+  // moved here to address maybe-uninitialized warnings
+  *difflist_group_info_ptr = *fread_pp;
+  *difflist_len_ptr = difflist_len;
+  if (!difflist_len) {
+    return kPglRetSuccess;
+  }
+  if (unlikely(difflist_len > raw_sample_ct / kPglMaxDifflistLenDivisor)) {
+    // automatically catches GetVint31() failure
+    return kPglRetMalformedInput;
+  }
+  const uint32_t group_ct = DivUp(difflist_len, kPglDifflistGroupSize);
+  const uint32_t sample_id_byte_ct = BytesToRepresentNzU32(raw_sample_ct);
+  const uint32_t difflist_index_byte_ct = group_ct * (sample_id_byte_ct + 1) - 1;
+  if (PtrAddCk(fread_end, difflist_index_byte_ct, fread_pp)) {
+    return kPglRetMalformedInput;
+  }
+  if (!raregeno_buf) {
+    // for sample ID lists without 2-bit genotype info, used for sparse dosage
+    return kPglRetSuccess;
+  }
+  const uint32_t raregeno_byte_ct = NypCtToByteCt(difflist_len);
+  const unsigned char* raregeno_start = *fread_pp;
+  if (PtrAddCk(fread_end, raregeno_byte_ct, fread_pp)) {
+    return kPglRetMalformedInput;
+  }
+  // possible todo: just return raregeno_start, and let the caller perform this
+  // copy
+  memcpy(raregeno_buf, raregeno_start, raregeno_byte_ct);
+  return kPglRetSuccess;
+}
+
+PglErr ParseAndSaveDifflist(const unsigned char* fread_end, uint32_t raw_sample_ct, const unsigned char** fread_pp, uintptr_t* __restrict raregeno, uint32_t* __restrict difflist_sample_ids, uint32_t* __restrict difflist_len_ptr) {
+  // Appropriate when we need to iterate through the difflist multiple times.
+  // Other functions are more efficient if we only need to process the list
+  // once.
+  // Trailing bits of raregeno may not be zeroed out.
+  const unsigned char* group_info_iter;
+  PglErr reterr = ParseDifflistHeader(fread_end, raw_sample_ct, fread_pp, raregeno, &group_info_iter, difflist_len_ptr);
+  uint32_t difflist_len = *difflist_len_ptr;
+  // todo: check if difflist_len == 0 early exit is a net positive or negative
+  // on a few test datasets
+  if (reterr || (!difflist_len)) {
+    return reterr;
+  }
+  const uint32_t sample_id_byte_ct = BytesToRepresentNzU32(raw_sample_ct);
+  uint32_t* difflist_sample_ids_iter = difflist_sample_ids;
+  for (uint32_t difflist_remaining = difflist_len; ; ) {
+    const uint32_t* difflist_sample_ids_stop;
+    if (difflist_remaining < kPglDifflistGroupSize) {
+      if (!difflist_remaining) {
+        return kPglRetSuccess;
+      }
+      difflist_sample_ids_stop = &(difflist_sample_ids_iter[difflist_remaining]);
+      difflist_remaining = 0;
+    } else {
+      difflist_sample_ids_stop = &(difflist_sample_ids_iter[kPglDifflistGroupSize]);
+      difflist_remaining -= kPglDifflistGroupSize;
+    }
+    // can't use uint32_t assignment trick for now since there's a corner case
+    // where that would read past the end of the mapped address range
+    uintptr_t raw_sample_idx = SubU32Load(group_info_iter, sample_id_byte_ct);
+    group_info_iter = &(group_info_iter[sample_id_byte_ct]);
+    while (1) {
+#ifndef __LP64__
+      // perform more frequent checks in 32-bit build since raw_sample_idx may
+      // overflow
+      // misses "small negative" malformed input, but it'll catch data
+      // corruption with very high probability
+      if (unlikely(raw_sample_idx >= raw_sample_ct)) {
+        return kPglRetMalformedInput;
+      }
+#endif
+      *difflist_sample_ids_iter++ = raw_sample_idx;
+      if (difflist_sample_ids_iter == difflist_sample_ids_stop) {
+        break;
+      }
+      raw_sample_idx += GetVint31(fread_end, fread_pp);
+    }
+#ifdef __LP64__
+    if (unlikely(raw_sample_idx >= raw_sample_ct)) {
+      return kPglRetMalformedInput;
+    }
+#endif
+  }
+  return kPglRetSuccess;
+}
+
+PglErr ParseAndSaveDifflistProperSubset(const unsigned char* fread_end, const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, uint32_t raw_sample_ct, const unsigned char** fread_pp, uintptr_t* __restrict raregeno, uint32_t* __restrict difflist_sample_ids, uint32_t* __restrict difflist_len_ptr, uintptr_t* __restrict raregeno_workspace) {
+  // Requires a PROPER subset.  Might want to just merge this with
+  // ParseAndSaveDifflist() and rename appropriately.
+  // Trailing bits of raregeno are zeroed out.
+  uint32_t raw_difflist_len;
+  const unsigned char* group_info_iter;
+  PglErr reterr = ParseDifflistHeader(fread_end, raw_sample_ct, fread_pp, raregeno_workspace, &group_info_iter, &raw_difflist_len);
+  if (reterr || (!raw_difflist_len)) {
+    *difflist_len_ptr = 0;
+    return reterr;
+  }
+  const uint32_t subgroup_idx_last = (raw_difflist_len - 1) / kBitsPerWordD2;
+  const uint32_t sample_id_byte_ct = BytesToRepresentNzU32(raw_sample_ct);
+  uintptr_t* raregeno_workspace_iter = raregeno_workspace;
+  uintptr_t* raregeno_iter = raregeno;
+  uint32_t* difflist_sample_ids_iter = difflist_sample_ids;
+
+  // technically doesn't need to be initialized, but I have principles
+  uintptr_t raw_sample_idx = 0;
+
+  uintptr_t raregeno_word = 0;
+  uint32_t subgroup_len_m1 = kBitsPerWordD2 - 1;
+  uint32_t difflist_len_lowbits = 0;
+  for (uint32_t subgroup_idx = 0; ; ++subgroup_idx) {
+    if (subgroup_idx >= subgroup_idx_last) {
+      if (subgroup_idx > subgroup_idx_last) {
+        if (difflist_len_lowbits) {
+          *raregeno_iter = raregeno_word;
+        }
+        *difflist_len_ptr = S_CAST(uintptr_t, difflist_sample_ids_iter - difflist_sample_ids) + difflist_len_lowbits;
+        return kPglRetSuccess;
+      }
+      subgroup_len_m1 &= raw_difflist_len - 1;
+    }
+    // We need to consume a new rare genotype word every 32 entries, and pull a
+    // raw sample index from the difflist header every 64 entries.  So it's
+    // best to make the inner loop have a period of 32 (call this a 'subgroup',
+    // where 'group' refers to a set of 64 entries).
+    if (!(subgroup_idx % (kPglDifflistGroupSize / kBitsPerWordD2))) {
+#ifdef __LP64__
+      if (unlikely(raw_sample_idx >= raw_sample_ct)) {
+        return kPglRetMalformedInput;
+      }
+#endif
+      raw_sample_idx = SubU32Load(group_info_iter, sample_id_byte_ct);
+      group_info_iter = &(group_info_iter[sample_id_byte_ct]);
+    } else {
+      raw_sample_idx += GetVint31(fread_end, fread_pp);
+    }
+    uintptr_t raregeno_workspace_word = *raregeno_workspace_iter++;
+    for (uint32_t raw_difflist_idx_lowbits = 0; ; ++raw_difflist_idx_lowbits) {
+#ifndef __LP64__
+      if (unlikely(raw_sample_idx >= raw_sample_ct)) {
+        return kPglRetMalformedInput;
+      }
+#endif
+      if (IsSet(sample_include, raw_sample_idx)) {
+        raregeno_word |= ((raregeno_workspace_word >> (2 * raw_difflist_idx_lowbits)) & 3) << (difflist_len_lowbits * 2);
+        difflist_sample_ids_iter[difflist_len_lowbits] = RawToSubsettedPos(sample_include, sample_include_cumulative_popcounts, raw_sample_idx);
+        if (difflist_len_lowbits++ == (kBitsPerWordD2 - 1)) {
+          *raregeno_iter++ = raregeno_word;
+          raregeno_word = 0;
+          difflist_len_lowbits = 0;
+          difflist_sample_ids_iter = &(difflist_sample_ids_iter[kBitsPerWordD2]);
+        }
+      }
+      if (raw_difflist_idx_lowbits == subgroup_len_m1) {
+        break;
+      }
+      raw_sample_idx += GetVint31(fread_end, fread_pp);
+    }
+  }
+}
+
+PglErr ParseLdAndMergeDifflistSubset(const unsigned char* fread_end, const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, const uintptr_t* __restrict ldbase_raregeno, const uint32_t* __restrict ldbase_difflist_sample_ids, uint32_t ldbase_difflist_len, uintptr_t ldbase_common_geno, uint32_t raw_sample_ct, uint32_t sample_ct, const unsigned char** fread_pp, uintptr_t* __restrict merged_raregeno, uint32_t* __restrict merged_difflist_sample_ids, uint32_t* __restrict merged_difflist_len_ptr, uintptr_t* __restrict diff_from_ldbase_raregeno_iter) {
+  // Used when the ldbase variant was saved as a difflist, and it's useful to
+  // process the current variant as a difflist.
+  // * Assumes ldbase_difflist_sample_ids[ldbase_difflist_len]==sample_ct.
+  // * Assumes sample_include == nullptr if no subsetting needed.  (Otherwise,
+  //   it'll still work, but performance will be worse.)
+  // Trailing bits of merged_raregeno may not be zeroed out.
+  // Caller is responsible for inverting ldbase_common_geno and merged_raregeno
+  // afterward if necessary.
+  assert(ldbase_difflist_sample_ids[ldbase_difflist_len] == sample_ct);
+  uint32_t diff_from_ldbase_len;
+  const unsigned char* group_info_iter;
+  PglErr reterr = ParseDifflistHeader(fread_end, raw_sample_ct, fread_pp, diff_from_ldbase_raregeno_iter, &group_info_iter, &diff_from_ldbase_len);
+  if (unlikely(reterr)) {
+    return reterr;
+  }
+  if (!diff_from_ldbase_len) {
+    memcpy(merged_difflist_sample_ids, ldbase_difflist_sample_ids, ldbase_difflist_len * sizeof(int32_t));
+    *merged_difflist_len_ptr = ldbase_difflist_len;
+    CopyNyparr(ldbase_raregeno, ldbase_difflist_len, merged_raregeno);
+    return kPglRetSuccess;
+  }
+  const uint32_t subgroup_idx_last = (diff_from_ldbase_len - 1) / kBitsPerWordD2;
+  const uint32_t sample_id_byte_ct = BytesToRepresentNzU32(raw_sample_ct);
+  uintptr_t* merged_raregeno_iter = merged_raregeno;
+  uint32_t* merged_difflist_sample_ids_iter = merged_difflist_sample_ids;
+  uintptr_t merged_raregeno_word = 0;
+  uintptr_t ldbase_raregeno_word = 0;
+  uintptr_t diff_from_ldbase_raregeno_word = 0;
+  uint32_t ldbase_sample_idx = ldbase_difflist_sample_ids[0];
+  uintptr_t raw_sample_idx = 0;
+  uintptr_t cur_geno = 0;
+  uint32_t sample_idx = 0;
+  uint32_t ldbase_difflist_idx = 0;
+  uint32_t done = 0;
+  uint32_t subgroup_len_m1 = kBitsPerWordD2 - 1;
+  uint32_t merge_idx_lowbits = 0;
+  for (uint32_t subgroup_idx = 0; ; ++subgroup_idx) {
+    uint32_t diff_from_ldbase_idx_lowbits = 0;
+    if (subgroup_idx >= subgroup_idx_last) {
+      if (subgroup_idx > subgroup_idx_last) {
+        done = 1;
+        sample_idx = sample_ct;
+        goto ParseLdAndMergeDifflistSubset_finish;
+      }
+      subgroup_len_m1 &= diff_from_ldbase_len - 1;
+    }
+    if (!(subgroup_idx % (kPglDifflistGroupSize / kBitsPerWordD2))) {
+      raw_sample_idx = SubU32Load(group_info_iter, sample_id_byte_ct);
+      group_info_iter = &(group_info_iter[sample_id_byte_ct]);
+    } else {
+      raw_sample_idx += GetVint31(fread_end, fread_pp);
+    }
+    diff_from_ldbase_raregeno_word = *diff_from_ldbase_raregeno_iter++;
+    for (; ; ++diff_from_ldbase_idx_lowbits) {
+      if (unlikely(raw_sample_idx >= raw_sample_ct)) {
+        return kPglRetMalformedInput;
+      }
+      cur_geno = diff_from_ldbase_raregeno_word & 3;
+      if ((!sample_include) || IsSet(sample_include, raw_sample_idx)) {
+        sample_idx = sample_include? RawToSubsettedPos(sample_include, sample_include_cumulative_popcounts, raw_sample_idx) : raw_sample_idx;
+      ParseLdAndMergeDifflistSubset_finish:
+        while (ldbase_sample_idx < sample_idx) {
+          // replace with blocked copy?
+          if (!(ldbase_difflist_idx % kBitsPerWordD2)) {
+            ldbase_raregeno_word = ldbase_raregeno[ldbase_difflist_idx / kBitsPerWordD2];
+          }
+          *merged_difflist_sample_ids_iter++ = ldbase_sample_idx;
+          merged_raregeno_word |= (ldbase_raregeno_word & 3) << (2 * merge_idx_lowbits);
+          if (merge_idx_lowbits++ == (kBitsPerWordD2 - 1)) {
+            *merged_raregeno_iter++ = merged_raregeno_word;
+            merged_raregeno_word = 0;
+            merge_idx_lowbits = 0;
+          }
+          ++ldbase_difflist_idx;
+          ldbase_raregeno_word >>= 2;
+          ldbase_sample_idx = ldbase_difflist_sample_ids[ldbase_difflist_idx];
+        }
+        if (ldbase_sample_idx == sample_idx) {
+          if (done) {
+            if (merge_idx_lowbits) {
+              *merged_raregeno_iter = merged_raregeno_word;
+            }
+            *merged_difflist_len_ptr = merged_difflist_sample_ids_iter - merged_difflist_sample_ids;
+            return kPglRetSuccess;
+          }
+          if (!(ldbase_difflist_idx % kBitsPerWordD2)) {
+            ldbase_raregeno_word = ldbase_raregeno[ldbase_difflist_idx / kBitsPerWordD2];
+          }
+          ++ldbase_difflist_idx;
+          ldbase_raregeno_word >>= 2;
+          ldbase_sample_idx = ldbase_difflist_sample_ids[ldbase_difflist_idx];
+        }
+        if (cur_geno != ldbase_common_geno) {
+          *merged_difflist_sample_ids_iter++ = sample_idx;
+          merged_raregeno_word |= cur_geno << (2 * merge_idx_lowbits);
+          if (merge_idx_lowbits++ == (kBitsPerWordD2 - 1)) {
+            *merged_raregeno_iter++ = merged_raregeno_word;
+            merged_raregeno_word = 0;
+            merge_idx_lowbits = 0;
+          }
+        }
+      }
+      if (diff_from_ldbase_idx_lowbits == subgroup_len_m1) {
+        break;
+      }
+      raw_sample_idx += GetVint31(fread_end, fread_pp);
+      diff_from_ldbase_raregeno_word >>= 2;
+    }
+  }
+}
+
+/*
+void PrunedDifflistToGenovecSubsetUnsafe(const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, const uintptr_t* __restrict raregeno, const uint32_t* __restrict difflist_sample_ids, uint32_t sample_ct, uint32_t difflist_common_geno, uint32_t difflist_len, uintptr_t* __restrict genovec) {
+  // Designed to be used after genovec subsetting.  Assumes all difflist
+  // entries are valid.  Ok for trailing bits of raregeno to be nonzero.  Does
+  // not zero out trailing bits of genovec.
+  const uint32_t vec_ct = NypCtToVecCt(sample_ct);
+  vecset(genovec, difflist_common_geno * kMask5555, vec_ct);
+  if (!difflist_len) {
+    return;
+  }
+  const uintptr_t* raregeno_incr = raregeno;
+  const uint32_t* difflist_sample_ids_iter = difflist_sample_ids;
+  const uint32_t* difflist_sample_ids_end = &(difflist_sample_ids[difflist_len]);
+  // don't think there's a point to separating out the
+  // difflist_common_geno == 0 case here, since the RawToSubsettedPos
+  // operation is a bit expensive
+  while (1) {
+    // er, get rid of this undefined behavior if we uncomment this function
+    const uint32_t* difflist_sample_ids_stop = &(difflist_sample_ids_iter[kBitsPerWordD2]);
+    uintptr_t raregeno_word = *raregeno_incr++;
+    if (difflist_sample_ids_stop > difflist_sample_ids_end) {
+      if (difflist_sample_ids_iter == difflist_sample_ids_end) {
+        return;
+      }
+      difflist_sample_ids_stop = difflist_sample_ids_end;
+    }
+    while (1) {
+      const uint32_t cur_sample_idx = *difflist_sample_ids_iter;
+      const uint32_t cur_subsetted_pos = RawToSubsettedPos(sample_include, sample_include_cumulative_popcounts, cur_sample_idx);
+      AssignNyparrEntry(cur_subsetted_pos, raregeno_word & 3, genovec);
+      if (difflist_sample_ids_iter++ == difflist_sample_ids_stop) {
+        break;
+      }
+      raregeno_word >>= 2;
+    }
+  }
+}
+*/
+
+PglErr ParseAndApplyDifflist(const unsigned char* fread_end, const unsigned char** fread_pp, PgenReaderMain* pgrp, uintptr_t* __restrict genoarr) {
+  // Side effects: uses pgr.workspace_raregeno_tmp_loadbuf.
+  // Cannot occur after genoarr subsetting since the difflist sample indexes
+  // will be incorrect.
+  const uint32_t raw_sample_ct = pgrp->fi.raw_sample_ct;
+  uintptr_t* cur_raregeno_iter = pgrp->workspace_raregeno_tmp_loadbuf;
+  const unsigned char* group_info_iter;
+  uint32_t difflist_len;
+  PglErr reterr = ParseDifflistHeader(fread_end, raw_sample_ct, fread_pp, cur_raregeno_iter, &group_info_iter, &difflist_len);
+  if (reterr || (!difflist_len)) {
+    return reterr;
+  }
+  const uint32_t sample_id_byte_ct = BytesToRepresentNzU32(raw_sample_ct);
+  const uint32_t subgroup_idx_last = (difflist_len - 1) / kBitsPerWordD2;
+  uintptr_t raw_sample_idx = 0;
+  for (uint32_t subgroup_idx = 0; ; ++subgroup_idx) {
+    uint32_t remaining_deltas_in_subgroup = kBitsPerWordD2 - 1;
+    if (subgroup_idx >= subgroup_idx_last) {
+      if (subgroup_idx > subgroup_idx_last) {
+        return kPglRetSuccess;
+      }
+      remaining_deltas_in_subgroup &= difflist_len - 1;
+    }
+    if (!(subgroup_idx % (kPglDifflistGroupSize / kBitsPerWordD2))) {
+      raw_sample_idx = SubU32Load(group_info_iter, sample_id_byte_ct);
+      group_info_iter = &(group_info_iter[sample_id_byte_ct]);
+    } else {
+      raw_sample_idx += GetVint31(fread_end, fread_pp);
+    }
+    uintptr_t cur_raregeno_word = *cur_raregeno_iter++;
+    // This loop tends to be the decompression bottleneck.  Tried to modify it
+    // to process 4 entries at a time, but that didn't end up helping.
+    for (; ; --remaining_deltas_in_subgroup) {
+      // always check, since otherwise AssignNyparrEntry() can scribble
+      // over arbitrary memory
+      if (unlikely(raw_sample_idx >= raw_sample_ct)) {
+        return kPglRetMalformedInput;
+      }
+      const uintptr_t cur_geno = cur_raregeno_word & 3;
+      AssignNyparrEntry(raw_sample_idx, cur_geno, genoarr);
+      if (!remaining_deltas_in_subgroup) {
+        break;
+      }
+      raw_sample_idx += GetVint31(fread_end, fread_pp);
+      cur_raregeno_word >>= 2;
+    }
+  }
+}
+
+// could merge ParseAndApplyDifflist() with this?
+PglErr ParseAndApplyDifflistSubset(const unsigned char* fread_end, const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, uint32_t sample_ct, const unsigned char** fread_pp, PgenReaderMain* pgrp, uintptr_t* __restrict genoarr) {
+  // Side effects: uses pgr.workspace_raregeno_tmp_loadbuf.
+  const uint32_t raw_sample_ct = pgrp->fi.raw_sample_ct;
+  if (sample_ct == raw_sample_ct) {
+    return ParseAndApplyDifflist(fread_end, fread_pp, pgrp, genoarr);
+  }
+  uintptr_t* cur_raregeno_iter = pgrp->workspace_raregeno_tmp_loadbuf;
+  const unsigned char* group_info_iter;
+  uint32_t difflist_len;
+  PglErr reterr = ParseDifflistHeader(fread_end, raw_sample_ct, fread_pp, cur_raregeno_iter, &group_info_iter, &difflist_len);
+  if (reterr || (!difflist_len)) {
+    return reterr;
+  }
+  const uint32_t sample_id_byte_ct = BytesToRepresentNzU32(raw_sample_ct);
+  const uint32_t subgroup_idx_last = (difflist_len - 1) / kBitsPerWordD2;
+  uintptr_t raw_sample_idx = 0;
+  for (uint32_t subgroup_idx = 0; ; ++subgroup_idx) {
+    uint32_t remaining_deltas_in_subgroup = kBitsPerWordD2 - 1;
+    if (subgroup_idx >= subgroup_idx_last) {
+      if (subgroup_idx > subgroup_idx_last) {
+        return kPglRetSuccess;
+      }
+      remaining_deltas_in_subgroup &= difflist_len - 1;
+    }
+    if (!(subgroup_idx % (kPglDifflistGroupSize / kBitsPerWordD2))) {
+      raw_sample_idx = SubU32Load(group_info_iter, sample_id_byte_ct);
+      group_info_iter = &(group_info_iter[sample_id_byte_ct]);
+    } else {
+      raw_sample_idx += GetVint31(fread_end, fread_pp);
+    }
+    uintptr_t cur_raregeno_word = *cur_raregeno_iter++;
+    // This loop tends to be the decompression bottleneck.  Tried to modify it
+    // to process 4 entries at a time, but that didn't end up helping.
+    for (; ; --remaining_deltas_in_subgroup) {
+      // always check, since otherwise AssignNyparrEntry() can scribble
+      // over arbitrary memory
+      if (unlikely(raw_sample_idx >= raw_sample_ct)) {
+        return kPglRetMalformedInput;
+      }
+      if (IsSet(sample_include, raw_sample_idx)) {
+        const uintptr_t cur_geno = cur_raregeno_word & 3;
+        AssignNyparrEntry(RawToSubsettedPos(sample_include, sample_include_cumulative_popcounts, raw_sample_idx), cur_geno, genoarr);
+      }
+      if (!remaining_deltas_in_subgroup) {
+        break;
+      }
+      raw_sample_idx += GetVint31(fread_end, fread_pp);
+      cur_raregeno_word >>= 2;
+    }
+  }
+}
+
+// vector-alignment preferred
+PglErr ParseOnebitUnsafe(const unsigned char* fread_end, const unsigned char** fread_pp, PgenReaderMain* pgrp, uintptr_t* __restrict genoarr) {
+  // doesn't zero out trailing genoarr bits
+  const uint32_t raw_sample_ct = pgrp->fi.raw_sample_ct;
+  const uint32_t common2_and_bitarray_byte_ct = (raw_sample_ct + 15) / CHAR_BIT;
+  const unsigned char* onebit_main_iter = *fread_pp;
+  if (PtrAddCk(fread_end, common2_and_bitarray_byte_ct, fread_pp)) {
+    return kPglRetMalformedInput;
+  }
+  const uintptr_t common2_code = *onebit_main_iter++;
+  const uintptr_t word_base = (common2_code / 4) * kMask5555;
+  const uintptr_t common_code_delta = common2_code & 3;
+  uint32_t genoarr_widx = 0;
+#if defined(__LP64__) && !defined(USE_AVX2)
+  // this is slower in AVX2 case
+  const uint32_t read_hw_ct = raw_sample_ct / kBitsPerWordD2;
+  if (read_hw_ct >= 2 * kWordsPerVec) {
+    const uint32_t read_vec_ct = raw_sample_ct / kBitsPerVec;
+    const VecW m4 = VCONST_W(kMask0F0F);
+#  ifdef USE_SHUFFLE8
+    // 0, 1, 4, 5, 16, 17, 20, 21, 64, 65, 68, 69, 80, 81, 84, 85 if the codes
+    // are 0 and 1
+    const VecW lookup = {word_base + common_code_delta * 0x1514111005040100LLU,
+                         word_base + common_code_delta * 0x5554515045444140LLU};
+#  else
+    const VecW m1 = VCONST_W(kMask5555);
+    const VecW m2 = VCONST_W(kMask3333);
+    const VecW vec_base = VCONST_W(word_base);
+    const VecW vec_delta = VCONST_W(common_code_delta * kMask5555);
+#  endif
+    for (uint32_t vidx = 0; vidx != read_vec_ct; ++vidx) {
+      const VecW cur_vec = vecw_loadu(&(onebit_main_iter[vidx * kBytesPerVec]));
+      VecW vec_lo;
+      VecW vec_hi;
+      vecw_lo_and_hi_nybbles(cur_vec, m4, &vec_lo, &vec_hi);
+#  ifdef USE_SHUFFLE8
+      vec_lo = vecw_shuffle8(lookup, vec_lo);
+      vec_hi = vecw_shuffle8(lookup, vec_hi);
+#  else
+      // unpack bytes, then use as mask for vec_add.
+      vec_lo = (vec_lo | vecw_slli(vec_lo, 2)) & m2;
+      vec_hi = (vec_hi | vecw_slli(vec_hi, 2)) & m2;
+      vec_lo = (vec_lo | vecw_slli(vec_lo, 1)) & m1;
+      vec_hi = (vec_hi | vecw_slli(vec_hi, 1)) & m1;
+      vec_lo = vec_lo | vecw_slli(vec_lo, 1);
+      vec_hi = vec_hi | vecw_slli(vec_hi, 1);
+      vec_lo = vec_base + (vec_delta & vec_lo);
+      vec_hi = vec_base + (vec_delta & vec_hi);
+#  endif
+      vecw_storeu(&(genoarr[kWordsPerVec * 2 * vidx]), vec_lo);
+      vecw_storeu(&(genoarr[kWordsPerVec * (2 * vidx + 1)]), vec_hi);
+    }
+    genoarr_widx = read_vec_ct * (2 * kWordsPerVec);
+  }
+#endif
+  const uint32_t genoarr_widx_trail = (raw_sample_ct + 7) / kBitsPerWordD2;
+  const uint32_t genoarr_widx_end = NypCtToWordCt(raw_sample_ct);
+  for (; ; ++genoarr_widx) {
+    uintptr_t ww;
+    if (genoarr_widx >= genoarr_widx_trail) {
+      // might want to modify to not go here if last read is an entire halfword
+      if (genoarr_widx == genoarr_widx_end) {
+        break;
+      }
+      ww = ProperSubwordLoad(&(onebit_main_iter[genoarr_widx_trail * sizeof(Halfword)]), 1 + (((raw_sample_ct - 1) % kBitsPerWordD2) / CHAR_BIT));
+    } else {
+      Halfword hw;
+      CopyFromUnalignedOffsetHW(&hw, onebit_main_iter, genoarr_widx);
+      ww = hw;
+    }
+    // apply middle-out operation
+    // 64-bit:
+    //   const uintptr_t middle_out_result = (ww | (ww << 31)) & kMask5555;
+    // 32-bit:
+    //   *genoarr_iter++ = word_base + (ww & kMask5555) * common_code_delta;
+    //   *genoarr_iter++ = word_base + ((ww >> 1) & kMask5555) * common_code_delta;
+    // (scrapped since the time savings don't seem to be worth the extra
+    // end-of-vector corner cases, apparently the extra operations here are
+    // sufficiently cheap, or even negative-cost in AVX2 case)
+
+    ww = UnpackHalfwordToWord(ww);
+    genoarr[genoarr_widx] = word_base + ww * common_code_delta;
+  }
+  return ParseAndApplyDifflist(fread_end, fread_pp, pgrp, genoarr);
+}
+
+// vector-alignment preferred
+PglErr Parse1or2bitGenoarrUnsafe(const unsigned char* fread_end, uint32_t vrtype, const unsigned char** fread_pp, PgenReaderMain* pgrp, uintptr_t* __restrict genoarr) {
+  // Side effect: may use pgrp->workspace_raregeno_tmp_loadbuf.
+  // Does not update fp_vidx, does not rotate plink1-formatted data (since it's
+  // better to do that post-subsetting)
+  if (vrtype & 3) {
+    return ParseOnebitUnsafe(fread_end, fread_pp, pgrp, genoarr);
+  }
+  // uncompressed storage
+  const uint32_t raw_sample_ct = pgrp->fi.raw_sample_ct;
+  const uint32_t genoarr_byte_ct = NypCtToByteCt(raw_sample_ct);
+  const unsigned char* src_genodata = *fread_pp;
+  if (PtrAddCk(fread_end, genoarr_byte_ct, fread_pp)) {
+    return kPglRetMalformedInput;
+  }
+  memcpy(genoarr, src_genodata, genoarr_byte_ct);
+  return kPglRetSuccess;
+}
+
+PglErr ParseNonLdGenovecSubsetUnsafe(const unsigned char* fread_end, const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, uint32_t sample_ct, uint32_t vrtype, const unsigned char** fread_pp, PgenReaderMain* pgrp, uintptr_t* __restrict genovec) {
+  // Side effects:
+  //   may use pgrp->workspace_raregeno_tmp_loadbuf
+  //   fills pgrp->ldbase_raw_genovec iff (!(vrtype & 4)) and
+  //     subsetting_required (does not update ldbase_stypes, caller's
+  //     responsibility to care)
+  // See comments on Parse1or2bitGenoarrUnsafe().
+  const uint32_t raw_sample_ct = pgrp->fi.raw_sample_ct;
+  if (!(vrtype & 4)) {
+    const uint32_t subsetting_required = (sample_ct != raw_sample_ct);
+    uintptr_t* raw_genovec = subsetting_required? pgrp->ldbase_raw_genovec : genovec;
+    PglErr reterr = Parse1or2bitGenoarrUnsafe(fread_end, vrtype, fread_pp, pgrp, raw_genovec);
+    if ((!subsetting_required) || reterr) {
+      return reterr;
+    }
+    CopyNyparrNonemptySubset(raw_genovec, sample_include, raw_sample_ct, sample_ct, genovec);
+    return kPglRetSuccess;
+  }
+  const uint32_t vrtype_low2 = vrtype & 3;
+  if (vrtype_low2 != 1) {
+    const uint32_t vec_ct = NypCtToVecCt(sample_ct);
+
+    // This memset is frequently the limiting operation.  This suggests that we
+    // should eventually make more use of the DifflistOrGenovec interface.
+    vecset(genovec, vrtype_low2 * kMask5555, vec_ct);
+    return ParseAndApplyDifflistSubset(fread_end, sample_include, sample_include_cumulative_popcounts, sample_ct, fread_pp, pgrp, genovec);
+  }
+  // all homozygous-ref special case
+  ZeroWArr(NypCtToWordCt(sample_ct), genovec);
+  return kPglRetSuccess;
+}
+
+uint32_t LdLoadNecessary(uint32_t cur_vidx, PgenReaderMain* pgrp) {
+  // Determines whether LD base variant needs to be loaded (in addition to the
+  // current variant), assuming we need (possibly subsetted) hardcalls.
+  // Important: this updates pgrp->ldbase_vidx when necessary, as a side
+  // effect.
+  // bugfix (22 May 2018): this only checked whether ldbase_stypes was nonzero;
+  // there was an AllHets + cache-clear edge case where that's not good enough.
+  // now that AllHets has been removed, though, it should be safe again.
+  if (pgrp->ldbase_stypes && (cur_vidx == pgrp->fp_vidx)) {
+    // ldbase variant guaranteed to be up-to-date if we didn't skip the last
+    // variant, and cache wasn't cleared
+    return 0;
+  }
+  // Find the last vrtypes[] value before vrtypes[cur_vidx] with bit 1 unset or
+  // bit 2 set.
+  const uint32_t old_ldbase_vidx = pgrp->ldbase_vidx;
+  pgrp->ldbase_vidx = GetLdbaseVidx(pgrp->fi.vrtypes, cur_vidx);
+  return (pgrp->ldbase_vidx != old_ldbase_vidx);
+}
+
+BoolErr InitReadPtrs(uint32_t vidx, PgenReaderMain* pgrp, const unsigned char** fread_pp, const unsigned char** fread_endp) {
+  const unsigned char* block_base = pgrp->fi.block_base;
+  if (block_base != nullptr) {
+    // possible todo: special handling of end of vblock
+    const uint64_t block_offset = pgrp->fi.block_offset;
+    *fread_pp = &(block_base[GetPgfiFpos(&(pgrp->fi), vidx) - block_offset]);
+    *fread_endp = &(block_base[GetPgfiFpos(&(pgrp->fi), vidx + 1) - block_offset]);
+
+    // still a useful hint to LdLoadNecessary()
+    pgrp->fp_vidx = vidx + 1;
+
+    return 0;
+  }
+  if (pgrp->fp_vidx != vidx) {
+    if (unlikely(fseeko(pgrp->ff, GetPgfiFpos(&(pgrp->fi), vidx), SEEK_SET))) {
+      return 1;
+    }
+  }
+  const uintptr_t cur_vrec_width = GetPgfiVrecWidth(&(pgrp->fi), vidx);
+#ifdef __LP64__
+  if (unlikely(fread_checked(pgrp->fread_buf, cur_vrec_width, pgrp->ff))) {
+    if (feof_unlocked(pgrp->ff)) {
+      errno = 0;
+    }
+    return 1;
+  }
+#else
+  // cur_vrec_width < 2^31 since otherwise we error out on initialization
+  if (unlikely(!fread_unlocked(pgrp->fread_buf, cur_vrec_width, 1, pgrp->ff))) {
+    if (feof_unlocked(pgrp->ff)) {
+      errno = 0;
+    }
+    return 1;
+  }
+#endif
+  *fread_pp = pgrp->fread_buf;
+  *fread_endp = &(pgrp->fread_buf[cur_vrec_width]);
+  pgrp->fp_vidx = vidx + 1;
+  return 0;
+}
+
+// Fills dest with subsetted ldbase contents, and ensures ldcache is filled so
+// no explicit reload of ldbase is needed for next variant if we're extracting
+// the same sample subset.  (Reload is occasionally needed if next variant is
+// multiallelic or phased, we only prevent that when convenient.)
+PglErr LdLoadAndCopyGenovecSubset(const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, uint32_t sample_ct, uint32_t vidx, PgenReaderMain* pgrp, uintptr_t* dest) {
+  const uint32_t raw_sample_ct = pgrp->fi.raw_sample_ct;
+  if (LdLoadNecessary(vidx, pgrp)) {
+    const uint32_t ldbase_vidx = pgrp->ldbase_vidx;
+    const unsigned char* fread_ptr;
+    const unsigned char* fread_end;
+    if (unlikely(InitReadPtrs(ldbase_vidx, pgrp, &fread_ptr, &fread_end))) {
+      return kPglRetReadFail;
+    }
+    const uint32_t vrtype = pgrp->fi.vrtypes[ldbase_vidx];
+    PglErr reterr = ParseNonLdGenovecSubsetUnsafe(fread_end, sample_include, sample_include_cumulative_popcounts, sample_ct, vrtype, &fread_ptr, pgrp, dest);
+    pgrp->ldbase_stypes = ((sample_ct != raw_sample_ct) && (!(vrtype & 4)))? (kfPgrLdcacheNyp | kfPgrLdcacheRawNyp) : kfPgrLdcacheNyp;
+    CopyNyparr(dest, sample_ct, pgrp->ldbase_genovec);
+    return reterr;
+  }
+  if (pgrp->ldbase_stypes & kfPgrLdcacheNyp) {
+    CopyNyparr(pgrp->ldbase_genovec, sample_ct, dest);
+  } else {
+    if ((pgrp->ldbase_stypes & kfPgrLdcacheRawNyp) && (sample_ct == raw_sample_ct)) {
+      CopyNyparr(pgrp->ldbase_raw_genovec, sample_ct, dest);
+    } else if (pgrp->ldbase_stypes & kfPgrLdcacheDifflist) {
+      // rematerialize-from-difflist is cheap.
+      PgrDifflistToGenovecUnsafe(pgrp->ldbase_raregeno, pgrp->ldbase_difflist_sample_ids, pgrp->fi.vrtypes[pgrp->ldbase_vidx] & 3, sample_ct, pgrp->ldbase_difflist_len, dest);
+    } else {
+      CopyNyparrNonemptySubset(pgrp->ldbase_raw_genovec, sample_include, pgrp->fi.raw_sample_ct, sample_ct, dest);
+      CopyNyparr(dest, sample_ct, pgrp->ldbase_genovec);
+      pgrp->ldbase_stypes |= kfPgrLdcacheNyp;
+    }
+  }
+  return kPglRetSuccess;
+}
+
+// fread_pp should be non-null iff this is being called by an internal function
+// as part of a more complex read.
+// in multiallelic case:
+//   hom-ref = 0
+//   het-ref = 1
+//   two nonref = 2
+//   missing = 3
+PglErr ReadGenovecSubsetUnsafe(const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, uint32_t sample_ct, uint32_t vidx, PgenReaderMain* pgrp, const unsigned char** fread_pp, const unsigned char** fread_endp, uintptr_t* __restrict genovec) {
+  // Side effects:
+  //   may use pgr.workspace_raregeno_tmp_loadbuf (any difflist)
+  const uint32_t vrtype = GetPgfiVrtype(&(pgrp->fi), vidx);
+  const uint32_t maintrack_vrtype = vrtype & 7;
+  if (VrtypeLdCompressed(maintrack_vrtype)) {
+    // LD compression
+    PglErr reterr = LdLoadAndCopyGenovecSubset(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, pgrp, genovec);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+    const unsigned char* fread_ptr;
+    const unsigned char* fread_end;
+    if (unlikely(InitReadPtrs(vidx, pgrp, &fread_ptr, &fread_end))) {
+      return kPglRetReadFail;
+    }
+    reterr = ParseAndApplyDifflistSubset(fread_end, sample_include, sample_include_cumulative_popcounts, sample_ct, &fread_ptr, pgrp, genovec);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+    if (maintrack_vrtype == 3) {
+      GenovecInvertUnsafe(sample_ct, genovec);
+    }
+    if (fread_pp) {
+      *fread_pp = fread_ptr;
+      *fread_endp = fread_end;
+    }
+    return kPglRetSuccess;
+  }
+  const unsigned char* fread_ptr;
+  const unsigned char* fread_end = nullptr;  // maybe-uninitialized warning
+  // tried inserting special-case code for the plink1 case to avoid a copy, and
+  // it was actually slower
+  if (unlikely(InitReadPtrs(vidx, pgrp, &fread_ptr, &fread_end))) {
+    return kPglRetReadFail;
+  }
+  // tried to add more sophisticated caching, but turns out it isn't worth it
+  PglErr reterr = ParseNonLdGenovecSubsetUnsafe(fread_end, sample_include, sample_include_cumulative_popcounts, sample_ct, maintrack_vrtype, &fread_ptr, pgrp, genovec);
+  if (unlikely(reterr)) {
+    return reterr;
+  }
+  if (vrtype == kPglVrtypePlink1) {
+    PgrPlink1ToPlink2InplaceUnsafe(sample_ct, genovec);
+  } else {
+    const uint32_t is_ldbase = pgrp->fi.vrtypes && VrtypeLdCompressed(pgrp->fi.vrtypes[vidx + 1]);
+    const uint32_t ldbase_raw_genovec_saved = (sample_ct != pgrp->fi.raw_sample_ct) && (!(maintrack_vrtype & 4));
+    if (is_ldbase) {
+      CopyNyparr(genovec, sample_ct, pgrp->ldbase_genovec);
+      pgrp->ldbase_vidx = vidx;
+      // may be better to just always set to kfPgrLdcacheNyp?  this depends
+      // on multiallelic code
+      pgrp->ldbase_stypes = ldbase_raw_genovec_saved? (kfPgrLdcacheNyp | kfPgrLdcacheRawNyp) : kfPgrLdcacheNyp;
+    } else if (ldbase_raw_genovec_saved) {
+      // bugfix (22 Sep 2018): when accessing variants out of order, need to
+      // note that we just clobbered the cache
+      pgrp->ldbase_stypes &= ~kfPgrLdcacheRawNyp;
+    }
+  }
+  if (fread_pp) {
+    *fread_pp = fread_ptr;
+    *fread_endp = fread_end;
+  }
+  return kPglRetSuccess;
+}
+
+PglErr PgrGet(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, PgenReader* pgr_ptr, uintptr_t* __restrict genovec) {
+  if (!sample_ct) {
+    return kPglRetSuccess;
+  }
+  PgenReaderMain* pgrp = GetPgrp(pgr_ptr);
+  assert(vidx < pgrp->fi.raw_variant_ct);
+  return ReadGenovecSubsetUnsafe(sample_include, GetSicp(pssi), sample_ct, vidx, pgrp, nullptr, nullptr, genovec);
+}
+
+// Fills dest with ldbase contents, and ensures ldcache is filled so no
+// explicit reload of ldbase is needed for next variant.
+PglErr LdLoadAndCopyRawGenovec(uint32_t subsetting_required, uint32_t vidx, PgenReaderMain* pgrp, uintptr_t* dest) {
+  const uint32_t genovec_byte_ct = NypCtToVecCt(pgrp->fi.raw_sample_ct) * kBytesPerVec;
+  if (LdLoadNecessary(vidx, pgrp) || (subsetting_required && (!(pgrp->ldbase_stypes & kfPgrLdcacheRawNyp)))) {
+    const uint32_t ldbase_vidx = pgrp->ldbase_vidx;
+    const unsigned char* fread_ptr;
+    const unsigned char* fread_end;
+    if (unlikely(InitReadPtrs(ldbase_vidx, pgrp, &fread_ptr, &fread_end))) {
+      return kPglRetReadFail;
+    }
+    const uint32_t vrtype = pgrp->fi.vrtypes[ldbase_vidx];
+    pgrp->ldbase_stypes = kfPgrLdcacheRawNyp;
+    assert((vrtype & 7) != 5); // all-hom-ref can't be ldbase
+    uintptr_t* raw_genovec = pgrp->ldbase_raw_genovec;
+    PglErr reterr;
+    if (!(vrtype & 4)) {
+      reterr = Parse1or2bitGenoarrUnsafe(fread_end, vrtype, &fread_ptr, pgrp, raw_genovec);
+    } else {
+      const uint32_t vrtype_low2 = vrtype & 3;
+      vecset(raw_genovec, vrtype_low2 * kMask5555, DivUp(genovec_byte_ct, kBytesPerVec));
+      reterr = ParseAndApplyDifflist(fread_end, &fread_ptr, pgrp, raw_genovec);
+    }
+    memcpy(dest, raw_genovec, genovec_byte_ct);
+    return reterr;
+  }
+  if (pgrp->ldbase_stypes & kfPgrLdcacheRawNyp) {
+    memcpy(dest, pgrp->ldbase_raw_genovec, genovec_byte_ct);
+  } else {
+    // no subsetting, can use regular Ldcache entries
+    const uint32_t raw_sample_ct = pgrp->fi.raw_sample_ct;
+    if (pgrp->ldbase_stypes & kfPgrLdcacheNyp) {
+      memcpy(dest, pgrp->ldbase_genovec, genovec_byte_ct);
+    } else {
+      PgrDifflistToGenovecUnsafe(pgrp->ldbase_raregeno, pgrp->ldbase_difflist_sample_ids, pgrp->fi.vrtypes[pgrp->ldbase_vidx] & 3, raw_sample_ct, pgrp->ldbase_difflist_len, dest);
+    }
+  }
+  return kPglRetSuccess;
+}
+
+// Does not zero out trailing bits.
+// Requires fread_pp and fread_endp to be non-null for now.
+PglErr ReadRawGenovec(uint32_t subsetting_required, uint32_t vidx, PgenReaderMain* pgrp, const unsigned char** fread_pp, const unsigned char** fread_endp, uintptr_t* raw_genovec) {
+  const uint32_t vrtype = GetPgfiVrtype(&(pgrp->fi), vidx);
+  const uint32_t maintrack_vrtype = vrtype & 7;
+  const uint32_t raw_sample_ct = pgrp->fi.raw_sample_ct;
+  if (VrtypeLdCompressed(maintrack_vrtype)) {
+    // LD compression
+    PglErr reterr = LdLoadAndCopyRawGenovec(subsetting_required, vidx, pgrp, raw_genovec);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+    if (unlikely(InitReadPtrs(vidx, pgrp, fread_pp, fread_endp))) {
+      return kPglRetReadFail;
+    }
+    reterr = ParseAndApplyDifflist(*fread_endp, fread_pp, pgrp, raw_genovec);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+    if (maintrack_vrtype == 3) {
+      GenovecInvertUnsafe(raw_sample_ct, raw_genovec);
+    }
+    return kPglRetSuccess;
+  }
+  if (unlikely(InitReadPtrs(vidx, pgrp, fread_pp, fread_endp))) {
+    return kPglRetReadFail;
+  }
+  const unsigned char* fread_end = *fread_endp;
+  PglErr reterr;
+  if (!(vrtype & 4)) {
+    reterr = Parse1or2bitGenoarrUnsafe(fread_end, vrtype, fread_pp, pgrp, raw_genovec);
+  } else {
+    const uint32_t vrtype_low2 = vrtype & 3;
+    if (vrtype_low2 == 1) {
+      ZeroWArr(NypCtToWordCt(raw_sample_ct), raw_genovec);
+      // all-hom-ref can't be ldbase
+      return kPglRetSuccess;
+    }
+    const uint32_t vec_ct = NypCtToVecCt(raw_sample_ct);
+    vecset(raw_genovec, vrtype_low2 * kMask5555, vec_ct);
+    reterr = ParseAndApplyDifflist(fread_end, fread_pp, pgrp, raw_genovec);
+  }
+  if (vrtype == kPglVrtypePlink1) {
+    PgrPlink1ToPlink2InplaceUnsafe(raw_sample_ct, raw_genovec);
+  } else {
+    const uint32_t is_ldbase = pgrp->fi.vrtypes && VrtypeLdCompressed(pgrp->fi.vrtypes[vidx + 1]);
+    if (is_ldbase) {
+      CopyNyparr(raw_genovec, raw_sample_ct, pgrp->ldbase_raw_genovec);
+      pgrp->ldbase_vidx = vidx;
+      pgrp->ldbase_stypes = kfPgrLdcacheRawNyp;
+    }
+  }
+  return reterr;
+}
+/*
+void CopyAndSubsetDifflist(const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, const uintptr_t* __restrict raw_raregeno, const uint32_t* __restrict raw_difflist_sample_ids, uint32_t raw_difflist_len, uintptr_t* __restrict new_raregeno, uint32_t* __restrict new_difflist_sample_ids, uint32_t* __restrict new_difflist_len_ptr) {
+  // Trailing bits of new_raregeno are zeroed out.
+  if (!raw_difflist_len) {
+    *new_difflist_len_ptr = 0;
+    return;
+  }
+  const uintptr_t* raw_raregeno_incr = raw_raregeno;
+  const uint32_t* raw_difflist_sample_ids_iter = raw_difflist_sample_ids;
+  const uint32_t* raw_difflist_sample_ids_last = &(raw_difflist_sample_ids[RoundDownPow2(raw_difflist_len - 1, kBitsPerWordD2)]);
+  uintptr_t* new_raregeno_incr = new_raregeno;
+  uintptr_t new_raregeno_word = 0;
+  uint32_t new_difflist_len = 0;
+  uint32_t block_len_m1 = kBitsPerWordD2 - 1;
+  while (1) {
+    if (raw_difflist_sample_ids_iter >= raw_difflist_sample_ids_last) {
+      if (raw_difflist_sample_ids_iter > raw_difflist_sample_ids_last) {
+        if (new_difflist_len % kBitsPerWordD2) {
+          *new_raregeno_incr = new_raregeno_word;
+        }
+        *new_difflist_len_ptr = new_difflist_len;
+        return;
+      }
+      block_len_m1 &= raw_difflist_len - 1;
+    }
+    uintptr_t raw_raregeno_word = *raw_raregeno_incr++;
+    uint32_t raw_difflist_idx_lowbits = 0;
+    while (1) {
+      const uint32_t raw_sample_idx = raw_difflist_sample_ids_iter[raw_difflist_idx_lowbits];
+      if (IsSet(sample_include, raw_sample_idx)) {
+        new_difflist_sample_ids[new_difflist_len] = RawToSubsettedPos(sample_include, sample_include_cumulative_popcounts, raw_sample_idx);
+        new_raregeno_word |= ((raw_raregeno_word >> (2 * raw_difflist_idx_lowbits)) & 3) << (2 * (new_difflist_len % kBitsPerWordD2));
+        ++new_difflist_len;
+        if (!(new_difflist_len % kBitsPerWordD2)) {
+          *new_raregeno_incr++ = new_raregeno_word;
+          new_raregeno_word = 0;
+        }
+      }
+      if (raw_difflist_idx_lowbits == block_len_m1) {
+        break;
+      }
+      ++raw_difflist_idx_lowbits;
+    }
+    raw_difflist_sample_ids_iter = &(raw_difflist_sample_ids_iter[kBitsPerWordD2]);
+  }
+}
+*/
+
+// Populates pgrp->ldbase_genovec or
+// pgrp->ldbase_{raregeno,difflist_sample_ids,difflist_len}, depending on
+// storage type.
+// Currently just called by ReadDifflistOrGenovecSubsetUnsafe().
+PglErr LdLoadMinimalSubsetIfNecessary(const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, uint32_t sample_ct, uint32_t vidx, PgenReaderMain* pgrp) {
+  if (!LdLoadNecessary(vidx, pgrp)) {
+    return kPglRetSuccess;
+  }
+  const uint32_t ldbase_vidx = pgrp->ldbase_vidx;
+  const uint64_t cur_vidx_fpos = pgrp->fi.var_fpos[ldbase_vidx];
+  const uint32_t ldbase_vrtype = pgrp->fi.vrtypes[ldbase_vidx];
+  const uint32_t raw_sample_ct = pgrp->fi.raw_sample_ct;
+  const uint32_t subsetting_required = (sample_ct != raw_sample_ct);
+  uintptr_t* raw_genovec = subsetting_required? pgrp->ldbase_raw_genovec : pgrp->ldbase_genovec;
+  const unsigned char* fread_ptr;
+  const unsigned char* fread_end;
+  const unsigned char* block_base = pgrp->fi.block_base;
+  PglErr reterr = kPglRetSuccess;
+  if (block_base != nullptr) {
+    {
+      const uint64_t block_offset = pgrp->fi.block_offset;
+      fread_ptr = &(block_base[cur_vidx_fpos - block_offset]);
+      fread_end = &(block_base[pgrp->fi.var_fpos[ldbase_vidx + 1] - block_offset]);
+    }
+    if (!(ldbase_vrtype & 4)) {
+      reterr = Parse1or2bitGenoarrUnsafe(fread_end, ldbase_vrtype, &fread_ptr, pgrp, raw_genovec);
+    LdLoadMinimalSubsetIfNecessary_genovec_finish:
+      pgrp->ldbase_stypes = subsetting_required? (kfPgrLdcacheNyp | kfPgrLdcacheRawNyp) : kfPgrLdcacheNyp;
+      if ((!subsetting_required) || reterr) {
+        return reterr;
+      }
+      CopyNyparrNonemptySubset(raw_genovec, sample_include, raw_sample_ct, sample_ct, pgrp->ldbase_genovec);
+      return kPglRetSuccess;
+    }
+    pgrp->fp_vidx = ldbase_vidx + 1;
+  } else {
+    if (unlikely(fseeko(pgrp->ff, pgrp->fi.var_fpos[ldbase_vidx], SEEK_SET))) {
+      return kPglRetReadFail;
+    }
+    const uintptr_t cur_vrec_width = pgrp->fi.var_fpos[ldbase_vidx + 1] - cur_vidx_fpos;
+    pgrp->fp_vidx = ldbase_vidx + 1;
+    if (!(ldbase_vrtype & 7)) {
+      // don't actually need to fread the whole record in this case
+      const uint32_t raw_sample_ct4 = NypCtToByteCt(raw_sample_ct);
+      if (unlikely(!fread_unlocked(raw_genovec, raw_sample_ct4, 1, pgrp->ff))) {
+        if (feof_unlocked(pgrp->ff)) {
+          errno = 0;
+        }
+        return kPglRetReadFail;
+      }
+      if (raw_sample_ct4 != cur_vrec_width) {
+        // ensure this doesn't match
+        pgrp->fp_vidx = 0;
+      }
+      goto LdLoadMinimalSubsetIfNecessary_genovec_finish;
+    }
+    if (unlikely(!fread_unlocked(pgrp->fread_buf, cur_vrec_width, 1, pgrp->ff))) {
+      if (feof_unlocked(pgrp->ff)) {
+        errno = 0;
+      }
+      return kPglRetReadFail;
+    }
+    fread_ptr = pgrp->fread_buf;
+    fread_end = &(pgrp->fread_buf[cur_vrec_width]);
+    if (!(ldbase_vrtype & 4)) {
+      reterr = ParseOnebitUnsafe(fread_end, &fread_ptr, pgrp, raw_genovec);
+      goto LdLoadMinimalSubsetIfNecessary_genovec_finish;
+    }
+  }
+  uint32_t ldbase_difflist_len;
+  if (!subsetting_required) {
+    reterr = ParseAndSaveDifflist(fread_end, raw_sample_ct, &fread_ptr, pgrp->ldbase_raregeno, pgrp->ldbase_difflist_sample_ids, &ldbase_difflist_len);
+  } else {
+    reterr = ParseAndSaveDifflistProperSubset(fread_end, sample_include, sample_include_cumulative_popcounts, raw_sample_ct, &fread_ptr, pgrp->ldbase_raregeno, pgrp->ldbase_difflist_sample_ids, &ldbase_difflist_len, pgrp->workspace_raregeno_tmp_loadbuf);
+  }
+  if (unlikely(reterr)) {
+    return reterr;
+  }
+  pgrp->ldbase_difflist_len = ldbase_difflist_len;
+  pgrp->ldbase_difflist_sample_ids[ldbase_difflist_len] = sample_ct;
+  pgrp->ldbase_stypes = kfPgrLdcacheDifflist;
+  return kPglRetSuccess;
+}
+
+PglErr ReadDifflistOrGenovecSubsetUnsafe(const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, uint32_t sample_ct, uint32_t max_simple_difflist_len, uint32_t vidx, PgenReaderMain* pgrp, const unsigned char** fread_pp, const unsigned char** fread_endp, uintptr_t* __restrict genovec, uint32_t* difflist_common_geno_ptr, uintptr_t* __restrict main_raregeno, uint32_t* __restrict difflist_sample_ids, uint32_t* __restrict difflist_len_ptr) {
+  assert(vidx < pgrp->fi.raw_variant_ct);
+  assert(sample_ct);
+  assert(max_simple_difflist_len < sample_ct);
+  // Side effects:
+  //   may use pgr.workspace_raregeno_tmp_loadbuf
+  // Trailing bits of genovec/main_raregeno may not be zeroed out.
+  const uint32_t vrtype = GetPgfiVrtype(&(pgrp->fi), vidx);
+  const uint32_t maintrack_vrtype = vrtype & 7;
+  const uint32_t raw_sample_ct = pgrp->fi.raw_sample_ct;
+  const uint32_t subsetting_required = (sample_ct != raw_sample_ct);
+  // const uint32_t multiallelic_hc_present = fread_pp && VrtypeMultiallelic(vrtype);
+  if (VrtypeLdCompressed(maintrack_vrtype)) {
+    // LD compression
+
+    // note that this can currently load a difflist longer than
+    // max_simple_difflist_len
+    PglErr reterr = LdLoadMinimalSubsetIfNecessary(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, pgrp);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+    const unsigned char* fread_ptr;
+    const unsigned char* fread_end;
+    if (unlikely(InitReadPtrs(vidx, pgrp, &fread_ptr, &fread_end))) {
+      return kPglRetReadFail;
+    }
+    const uint32_t ld_invert = (maintrack_vrtype == 3);
+    if (pgrp->ldbase_stypes & kfPgrLdcacheDifflist) {
+      const uint32_t ldbase_common_geno = pgrp->fi.vrtypes[pgrp->ldbase_vidx] & 3;
+      // unnecessary for this to branch on LD difflist length, since that's
+      // limited to 3/4 of the ldbase difflist length.
+      *difflist_common_geno_ptr = ldbase_common_geno;
+      reterr = ParseLdAndMergeDifflistSubset(fread_end, subsetting_required? sample_include : nullptr, sample_include_cumulative_popcounts, pgrp->ldbase_raregeno, pgrp->ldbase_difflist_sample_ids, pgrp->ldbase_difflist_len, ldbase_common_geno, raw_sample_ct, sample_ct, &fread_ptr, main_raregeno, difflist_sample_ids, difflist_len_ptr, pgrp->workspace_raregeno_tmp_loadbuf);
+      if (unlikely(reterr)) {
+        return reterr;
+      }
+      if (ld_invert) {
+        *difflist_common_geno_ptr = (6 - ldbase_common_geno) & 3;
+        GenovecInvertUnsafe(*difflist_len_ptr, main_raregeno);
+      }
+      return kPglRetSuccess;
+    }
+    if (pgrp->ldbase_stypes & kfPgrLdcacheNyp) {
+      CopyNyparr(pgrp->ldbase_genovec, sample_ct, genovec);
+    } else {
+      assert(pgrp->ldbase_stypes & kfPgrLdcacheRawNyp);
+      CopyNyparrNonemptySubset(pgrp->ldbase_raw_genovec, sample_include, raw_sample_ct, sample_ct, genovec);
+      CopyNyparr(genovec, sample_ct, pgrp->ldbase_genovec);
+      pgrp->ldbase_stypes |= kfPgrLdcacheNyp;
+    }
+    *difflist_common_geno_ptr = UINT32_MAX;
+    reterr = ParseAndApplyDifflistSubset(fread_end, sample_include, sample_include_cumulative_popcounts, sample_ct, &fread_ptr, pgrp, genovec);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+    if (ld_invert) {
+      GenovecInvertUnsafe(sample_ct, genovec);
+    }
+    if (fread_pp) {
+      *fread_pp = fread_ptr;
+      *fread_endp = fread_end;
+    }
+    return kPglRetSuccess;
+  }
+  const unsigned char* fread_ptr;
+  const unsigned char* fread_end = nullptr;  // maybe-uninitialized warning
+  if (unlikely(InitReadPtrs(vidx, pgrp, &fread_ptr, &fread_end))) {
+    return kPglRetReadFail;
+  }
+  const uint32_t is_ldbase = pgrp->fi.vrtypes && VrtypeLdCompressed(pgrp->fi.vrtypes[vidx + 1]);
+  const uint32_t saved_difflist_len = VrtypeDifflist(vrtype)? PeekVint31(fread_ptr, fread_end) : raw_sample_ct;
+  pgrp->ldbase_vidx = vidx;
+  // no limit is slightly better than /16 but substantially worse than /32 on
+  // the large test dataset (/64 is slightly worse than /32)
+  // no limit is best on the small test dataset
+  if (saved_difflist_len > max_simple_difflist_len) {
+    *difflist_common_geno_ptr = UINT32_MAX;
+    PglErr reterr = ParseNonLdGenovecSubsetUnsafe(fread_end, sample_include, sample_include_cumulative_popcounts, sample_ct, vrtype, &fread_ptr, pgrp, genovec);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+    const uint32_t ldbase_raw_genovec_saved = (subsetting_required && (!(vrtype & 4)));
+    if (is_ldbase) {
+      CopyNyparr(genovec, sample_ct, pgrp->ldbase_genovec);
+      pgrp->ldbase_stypes = ldbase_raw_genovec_saved? (kfPgrLdcacheNyp | kfPgrLdcacheRawNyp) : kfPgrLdcacheNyp;
+    } else if (ldbase_raw_genovec_saved) {
+      // bugfix (22 Sep 2018)
+      pgrp->ldbase_stypes &= ~kfPgrLdcacheRawNyp;
+    }
+    if (vrtype == kPglVrtypePlink1) {
+      PgrPlink1ToPlink2InplaceUnsafe(sample_ct, genovec);
+    }
+    if (fread_pp) {
+      *fread_pp = fread_ptr;
+      *fread_endp = fread_end;
+    }
+    return kPglRetSuccess;
+  }
+  *difflist_common_geno_ptr = vrtype & 3;
+  PglErr reterr;
+  if (!subsetting_required) {
+    reterr = ParseAndSaveDifflist(fread_end, raw_sample_ct, &fread_ptr, main_raregeno, difflist_sample_ids, difflist_len_ptr);
+  } else {
+    reterr = ParseAndSaveDifflistProperSubset(fread_end, sample_include, sample_include_cumulative_popcounts, raw_sample_ct, &fread_ptr, main_raregeno, difflist_sample_ids, difflist_len_ptr, pgrp->workspace_raregeno_tmp_loadbuf);
+  }
+  if (unlikely(reterr)) {
+    return kPglRetMalformedInput;
+  }
+  if (is_ldbase) {
+    const uint32_t difflist_len = *difflist_len_ptr;
+    pgrp->ldbase_stypes = kfPgrLdcacheDifflist;
+    pgrp->ldbase_difflist_len = difflist_len;
+    CopyNyparr(main_raregeno, difflist_len, pgrp->ldbase_raregeno);
+    memcpy(pgrp->ldbase_difflist_sample_ids, difflist_sample_ids, difflist_len * sizeof(int32_t));
+    pgrp->ldbase_difflist_sample_ids[difflist_len] = sample_ct;
+  }
+  if (fread_pp) {
+    *fread_pp = fread_ptr;
+    *fread_endp = fread_end;
+  }
+  return kPglRetSuccess;
+}
+
+PglErr PgrGetDifflistOrGenovec(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t max_simple_difflist_len, uint32_t vidx, PgenReader* pgr_ptr, uintptr_t* __restrict genovec, uint32_t* __restrict difflist_common_geno_ptr, uintptr_t* __restrict main_raregeno, uint32_t* __restrict difflist_sample_ids, uint32_t* __restrict difflist_len_ptr) {
+  if (!sample_ct) {
+    *difflist_common_geno_ptr = UINT32_MAX;
+    return kPglRetSuccess;
+  }
+  PgenReaderMain* pgrp = GetPgrp(pgr_ptr);
+  assert(vidx < pgrp->fi.raw_variant_ct);
+  return ReadDifflistOrGenovecSubsetUnsafe(sample_include, GetSicp(pssi), sample_ct, max_simple_difflist_len, vidx, pgrp, nullptr, nullptr, genovec, difflist_common_geno_ptr, main_raregeno, difflist_sample_ids, difflist_len_ptr);
+}
+
+PglErr LdSubsetAdjustGenocounts(const unsigned char* fread_end, const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, const uintptr_t* __restrict ldbase_genovec, uint32_t raw_sample_ct, const unsigned char** fread_pp, STD_ARRAY_REF(uint32_t, 4) genocounts, uintptr_t* __restrict raregeno_workspace) {
+  // * sample_include assumed to be nullptr if no subsetting required
+  // * Assumes genocounts[] is initialized to the proper values for the LD
+  //   reference variant (including subsetting).
+  // * Tried a hybrid implementation which allowed the base variant to be saved
+  //   as a difflist; turns out it's practically always better to unpack to a
+  //   genovec first.
+  // * There are two modes:
+  //   1. If sample_include is nullptr, we're not selecting a sample subset.
+  //   2. If sample_include and sample_include_cumulative_popcounts are both
+  //      non-null, we're computing counts over a sample subset, and
+  //      ldbase_genovec is assumed to be subsetted.
+  //   Experimented with a third mode where ldbase_genovec was replaced with
+  //   ldbase_raw_genovec in the subsetted case, but that didn't seem to pay
+  //   off.
+  // * This is the main frequency-counting bottleneck.
+  uint32_t raw_difflist_len;
+  const unsigned char* group_info_iter;
+  PglErr reterr = ParseDifflistHeader(fread_end, raw_sample_ct, fread_pp, raregeno_workspace, &group_info_iter, &raw_difflist_len);
+  if (reterr || (!raw_difflist_len)) {
+    return reterr;
+  }
+  const uint32_t subgroup_idx_last = (raw_difflist_len - 1) / kBitsPerWordD2;
+  const uint32_t sample_id_byte_ct = BytesToRepresentNzU32(raw_sample_ct);
+  uintptr_t* raregeno_workspace_iter = raregeno_workspace;
+  uintptr_t raw_sample_idx = 0;
+  STD_ARRAY_DECL(uint32_t, 16, delta_counts);
+  STD_ARRAY_FILL0(delta_counts);
+  for (uint32_t subgroup_idx = 0; ; ++subgroup_idx) {
+    uint32_t remaining_deltas_in_subgroup = kBitsPerWordD2 - 1;
+    if (subgroup_idx >= subgroup_idx_last) {
+      if (subgroup_idx > subgroup_idx_last) {
+        const int32_t incr0 = delta_counts[1] + delta_counts[2] + delta_counts[3] - delta_counts[4] - delta_counts[8] - delta_counts[12];
+        const int32_t incr1 = delta_counts[4] + delta_counts[6] + delta_counts[7] - delta_counts[1] - delta_counts[9] - delta_counts[13];
+        const int32_t incr2 = delta_counts[8] + delta_counts[9] + delta_counts[11] - delta_counts[2] - delta_counts[6] - delta_counts[14];
+        genocounts[0] += incr0;
+        genocounts[1] += incr1;
+        genocounts[2] += incr2;
+        genocounts[3] -= incr0 + incr1 + incr2;
+        return kPglRetSuccess;
+      }
+      remaining_deltas_in_subgroup &= raw_difflist_len - 1;
+    }
+    if (!(subgroup_idx % (kPglDifflistGroupSize / kBitsPerWordD2))) {
+#ifdef __LP64__
+      if (unlikely(raw_sample_idx >= raw_sample_ct)) {
+        return kPglRetMalformedInput;
+      }
+#endif
+      raw_sample_idx = SubU32Load(group_info_iter, sample_id_byte_ct);
+      group_info_iter = &(group_info_iter[sample_id_byte_ct]);
+    } else {
+      raw_sample_idx += GetVint31(fread_end, fread_pp);
+    }
+    uintptr_t cur_raregeno_word = *raregeno_workspace_iter++;
+    if (!sample_include) {
+      for (; ; --remaining_deltas_in_subgroup) {
+#ifndef __LP64__
+        if (unlikely(raw_sample_idx >= raw_sample_ct)) {
+          return kPglRetMalformedInput;
+        }
+#endif
+        const uintptr_t cur_geno = cur_raregeno_word & 3;
+        delta_counts[cur_geno * 4 + GetNyparrEntry(ldbase_genovec, raw_sample_idx)] += 1;
+        if (!remaining_deltas_in_subgroup) {
+          break;
+        }
+        raw_sample_idx += GetVint31(fread_end, fread_pp);
+        cur_raregeno_word >>= 2;
+      }
+    } else {
+      for (; ; --remaining_deltas_in_subgroup) {
+#ifndef __LP64__
+        if (unlikely(raw_sample_idx >= raw_sample_ct)) {
+          return kPglRetMalformedInput;
+        }
+#endif
+        if (IsSet(sample_include, raw_sample_idx)) {
+          const uintptr_t cur_geno = cur_raregeno_word & 3;
+          const uint32_t sample_idx = RawToSubsettedPos(sample_include, sample_include_cumulative_popcounts, raw_sample_idx);
+          delta_counts[cur_geno * 4 + GetNyparrEntry(ldbase_genovec, sample_idx)] += 1;
+        }
+        if (!remaining_deltas_in_subgroup) {
+          break;
+        }
+        raw_sample_idx += GetVint31(fread_end, fread_pp);
+        cur_raregeno_word >>= 2;
+      }
+    }
+  }
+}
+
+PglErr SkipDeltalistIds(const unsigned char* fread_end, const unsigned char* group_info, uint32_t difflist_len, uint32_t raw_sample_ct, uint32_t has_genotypes, const unsigned char** fread_pp) {
+  assert(difflist_len);
+  // fread_pp is a pure output parameter here
+  const uint32_t group_ct = DivUp(difflist_len, kPglDifflistGroupSize);
+  const uint32_t sample_id_byte_ct = BytesToRepresentNzU32(raw_sample_ct);
+  const unsigned char* extra_byte_cts = &(group_info[group_ct * sample_id_byte_ct]);
+  const uint32_t extra_byte_tot = BytesumArr(extra_byte_cts, group_ct - 1);
+
+  // (group_ct - 1) for extra_byte_cts
+  // (difflist_len + 3) / 4 for raregeno
+  // (group_ct - 1) * (kPglDifflistGroupSize - 1) + extra_byte_tot for
+  //   all but last ID block
+  // total = (group_ct - 1) * kPglDifflistGroupSize + extra_byte_tot +
+  //         (difflist_len + 3) / 4
+  const unsigned char* iddiff_start = &(extra_byte_cts[(group_ct - 1) * kPglDifflistGroupSize + extra_byte_tot]);
+  if (has_genotypes) {
+    iddiff_start = &(iddiff_start[NypCtToByteCt(difflist_len)]);
+  }
+  const unsigned char* fread_ptr = iddiff_start;
+  const unsigned char* fread_loop_stop = &(fread_end[-S_CAST(int32_t, kBytesPerWord)]);
+  uint32_t remaining_id_ct = (difflist_len - 1) % kPglDifflistGroupSize;
+#ifdef USE_SSE2
+  while (remaining_id_ct >= kBytesPerVec) {
+    if (unlikely(fread_ptr > fread_loop_stop)) {
+      return kPglRetMalformedInput;
+    }
+    const VecW vv = vecw_loadu(fread_ptr);
+    fread_ptr = &(fread_ptr[kBytesPerVec]);
+    const uint32_t highbits = vecw_movemask(vv);
+    remaining_id_ct -= kBytesPerVec - PopcountVec8thUint(highbits);
+  }
+#endif
+  while (remaining_id_ct >= kBytesPerWord) {
+    // scan a word at a time, count number of high bits set
+    if (unlikely(fread_ptr > fread_loop_stop)) {
+      return kPglRetMalformedInput;
+    }
+#ifdef USE_SSE42
+    uintptr_t ww;
+    CopyFromUnalignedIncrW(&ww, &fread_ptr);
+    ww &= 0x80 * kMask0101;
+    remaining_id_ct -= kBytesPerWord - PopcountWord(ww);
+#else
+    uintptr_t ww;
+    CopyFromUnalignedIncrW(&ww, &fread_ptr);
+    ww = (ww >> 7) & kMask0101;
+    remaining_id_ct -= kBytesPerWord - ((ww * kMask0101) >> (kBitsPerWord - 8));
+#endif
+  }
+  if (!remaining_id_ct) {
+    *fread_pp = fread_ptr;
+    return kPglRetSuccess;
+  }
+  --remaining_id_ct;
+  while (likely(fread_ptr < fread_end)) {
+    if ((*fread_ptr++) <= 127) {
+      if (!remaining_id_ct) {
+        *fread_pp = fread_ptr;
+        return kPglRetSuccess;
+      }
+      --remaining_id_ct;
+    }
+  }
+  return kPglRetMalformedInput;
+}
+
+PglErr CountparseDifflistSubset(const unsigned char* fread_end, const uintptr_t* __restrict sample_include, uint32_t common_geno, uint32_t raw_sample_ct, uint32_t sample_ct, const unsigned char** fread_pp, STD_ARRAY_REF(uint32_t, 4) genocounts, uintptr_t* __restrict raregeno_workspace) {
+  const unsigned char* group_info_iter;
+  uint32_t difflist_len;
+  PglErr reterr = ParseDifflistHeader(fread_end, raw_sample_ct, fread_pp, raregeno_workspace, &group_info_iter, &difflist_len);
+  STD_ARRAY_REF_FILL0(4, genocounts);
+  if (reterr || (!difflist_len)) {
+    genocounts[common_geno] = sample_ct;
+    return reterr;
+  }
+  if (raw_sample_ct == sample_ct) {
+    ZeroTrailingNyps(difflist_len, raregeno_workspace);
+    GenoarrCountFreqsUnsafe(raregeno_workspace, difflist_len, genocounts);
+    genocounts[common_geno] = sample_ct - difflist_len;
+    // bugfix (26 Mar 2019): forgot to advance fread_pp
+    return SkipDeltalistIds(fread_end, group_info_iter, difflist_len, raw_sample_ct, 1, fread_pp);
+  }
+  const uint32_t subgroup_idx_last = (difflist_len - 1) / kBitsPerWordD2;
+  const uint32_t sample_id_byte_ct = BytesToRepresentNzU32(raw_sample_ct);
+  uintptr_t* raregeno_workspace_iter = raregeno_workspace;
+  uintptr_t raw_sample_idx = 0;
+  for (uint32_t subgroup_idx = 0; ; ++subgroup_idx) {
+    uint32_t remaining_deltas_in_subgroup = kBitsPerWordD2 - 1;
+    if (subgroup_idx >= subgroup_idx_last) {
+      if (subgroup_idx > subgroup_idx_last) {
+        genocounts[common_geno] = sample_ct - genocounts[0] - genocounts[1] - genocounts[2] - genocounts[3];
+        return kPglRetSuccess;
+      }
+      remaining_deltas_in_subgroup &= difflist_len - 1;
+    }
+    if (!(subgroup_idx % (kPglDifflistGroupSize / kBitsPerWordD2))) {
+#ifdef __LP64__
+      if (unlikely(raw_sample_idx >= raw_sample_ct)) {
+        return kPglRetMalformedInput;
+      }
+#endif
+      raw_sample_idx = SubU32Load(group_info_iter, sample_id_byte_ct);
+      group_info_iter = &(group_info_iter[sample_id_byte_ct]);
+    } else {
+      raw_sample_idx += GetVint31(fread_end, fread_pp);
+    }
+    uintptr_t cur_raregeno_word = *raregeno_workspace_iter++;
+    for (; ; --remaining_deltas_in_subgroup) {
+#ifndef __LP64__
+      if (unlikely(raw_sample_idx >= raw_sample_ct)) {
+        return kPglRetMalformedInput;
+      }
+#endif
+      if (IsSet(sample_include, raw_sample_idx)) {
+        const uintptr_t cur_geno = cur_raregeno_word & 3;
+        genocounts[cur_geno] += 1;
+      }
+      if (!remaining_deltas_in_subgroup) {
+        break;
+      }
+      raw_sample_idx += GetVint31(fread_end, fread_pp);
+      cur_raregeno_word >>= 2;
+    }
+  }
+}
+
+// 1-bit, unsubsetted: count 1-bit array, then count raregeno
+// 1-bit, subsetted: count [1-bit array AND sample_include], iterate through
+//   difflist
+PglErr CountparseOnebitSubset(const unsigned char* fread_end, const uintptr_t* __restrict sample_include, uint32_t raw_sample_ct, uint32_t sample_ct, const unsigned char** fread_pp, STD_ARRAY_REF(uint32_t, 4) genocounts, uintptr_t* __restrict raregeno_workspace) {
+  const uint32_t initial_bitarray_byte_ct = DivUp(raw_sample_ct, CHAR_BIT);
+  const unsigned char* onebit_main_iter = *fread_pp;
+  if (PtrAddCk(fread_end, initial_bitarray_byte_ct + 1, fread_pp)) {
+    return kPglRetMalformedInput;
+  }
+  const uint32_t common2_code = *onebit_main_iter++;
+  const uint32_t geno_code_low = common2_code / 4;
+  const uint32_t geno_code_high = (common2_code & 3) + geno_code_low;
+  uint32_t high_geno_ct;
+  if (raw_sample_ct == sample_ct) {
+    high_geno_ct = PopcountBytes(onebit_main_iter, initial_bitarray_byte_ct);
+  } else {
+    high_geno_ct = PopcountBytesMasked(onebit_main_iter, sample_include, initial_bitarray_byte_ct);
+  }
+  const unsigned char* group_info_iter;
+  uint32_t difflist_len;
+  PglErr reterr = ParseDifflistHeader(fread_end, raw_sample_ct, fread_pp, raregeno_workspace, &group_info_iter, &difflist_len);
+  STD_ARRAY_REF_FILL0(4, genocounts);
+  if (reterr || (!difflist_len)) {
+    genocounts[geno_code_low] = sample_ct - high_geno_ct;
+    genocounts[geno_code_high] = high_geno_ct;
+    return reterr;
+  }
+  if (raw_sample_ct == sample_ct) {
+    ZeroTrailingNyps(difflist_len, raregeno_workspace);
+    GenoarrCountFreqsUnsafe(raregeno_workspace, difflist_len, genocounts);
+    genocounts[geno_code_low] = sample_ct - difflist_len - high_geno_ct;
+    genocounts[geno_code_high] = high_geno_ct;
+    // bugfix (26 Mar 2019): forgot to advance fread_pp
+    return SkipDeltalistIds(fread_end, group_info_iter, difflist_len, raw_sample_ct, 1, fread_pp);
+  }
+  const uint32_t subgroup_idx_last = (difflist_len - 1) / kBitsPerWordD2;
+  const uint32_t sample_id_byte_ct = BytesToRepresentNzU32(raw_sample_ct);
+  uintptr_t* raregeno_workspace_iter = raregeno_workspace;
+  uintptr_t raw_sample_idx = 0;
+  for (uint32_t subgroup_idx = 0; ; ++subgroup_idx) {
+    uint32_t remaining_deltas_in_subgroup = kBitsPerWordD2 - 1;
+    if (subgroup_idx >= subgroup_idx_last) {
+      if (subgroup_idx > subgroup_idx_last) {
+        // avoid read-after-write dependency?
+        genocounts[geno_code_low] = sample_ct - high_geno_ct - genocounts[0] - genocounts[1] - genocounts[2] - genocounts[3];
+        genocounts[geno_code_high] = high_geno_ct;
+        return kPglRetSuccess;
+      }
+      remaining_deltas_in_subgroup &= difflist_len - 1;
+    }
+    if (!(subgroup_idx % (kPglDifflistGroupSize / kBitsPerWordD2))) {
+#ifdef __LP64__
+      if (unlikely(raw_sample_idx >= raw_sample_ct)) {
+        return kPglRetMalformedInput;
+      }
+#endif
+      raw_sample_idx = SubU32Load(group_info_iter, sample_id_byte_ct);
+      group_info_iter = &(group_info_iter[sample_id_byte_ct]);
+    } else {
+      raw_sample_idx += GetVint31(fread_end, fread_pp);
+    }
+    uintptr_t cur_raregeno_word = *raregeno_workspace_iter++;
+    for (; ; --remaining_deltas_in_subgroup) {
+#ifndef __LP64__
+      if (unlikely(raw_sample_idx >= raw_sample_ct)) {
+        return kPglRetMalformedInput;
+      }
+#endif
+      if (IsSet(sample_include, raw_sample_idx)) {
+        const uintptr_t cur_geno = cur_raregeno_word & 3;
+        genocounts[cur_geno] += 1;
+        high_geno_ct -= IsSetUnaligned(onebit_main_iter, raw_sample_idx);
+      }
+      if (!remaining_deltas_in_subgroup) {
+        break;
+      }
+      raw_sample_idx += GetVint31(fread_end, fread_pp);
+      cur_raregeno_word >>= 2;
+    }
+  }
+}
+
+// loads ldbase variant if necessary, guarantees pgrp->ldbase_genovec is filled
+// on return
+// only called by GetBasicGenotypeCounts(), usually LdLoadAndCopy... is better
+PglErr LdLoadGenovecSubsetIfNecessary(const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, uint32_t sample_ct, uint32_t vidx, PgenReaderMain* pgrp) {
+  if (LdLoadNecessary(vidx, pgrp)) {
+    const uint32_t ldbase_vidx = pgrp->ldbase_vidx;
+    const unsigned char* fread_ptr;
+    const unsigned char* fread_end;
+    if (unlikely(InitReadPtrs(ldbase_vidx, pgrp, &fread_ptr, &fread_end))) {
+      return kPglRetReadFail;
+    }
+    const uint32_t vrtype = pgrp->fi.vrtypes[ldbase_vidx];
+    // bugfix (6 Mar 2019): ldbase_raw_genovec is only filled in (!difflist) &&
+    //   subsetting_required case; (!difflist) isn't enough
+    pgrp->ldbase_stypes = ((vrtype & 4) || (sample_ct == pgrp->fi.raw_sample_ct))? kfPgrLdcacheNyp : (kfPgrLdcacheNyp | kfPgrLdcacheRawNyp);
+    return ParseNonLdGenovecSubsetUnsafe(fread_end, sample_include, sample_include_cumulative_popcounts, sample_ct, vrtype, &fread_ptr, pgrp, pgrp->ldbase_genovec);
+  }
+  if (!(pgrp->ldbase_stypes & kfPgrLdcacheNyp)) {
+    if (pgrp->ldbase_stypes & kfPgrLdcacheDifflist) {
+      PgrDifflistToGenovecUnsafe(pgrp->ldbase_raregeno, pgrp->ldbase_difflist_sample_ids, pgrp->fi.vrtypes[pgrp->ldbase_vidx] & 3, sample_ct, pgrp->ldbase_difflist_len, pgrp->ldbase_genovec);
+    } else {
+      assert(pgrp->ldbase_stypes & kfPgrLdcacheRawNyp);
+      CopyNyparrNonemptySubset(pgrp->ldbase_raw_genovec, sample_include, pgrp->fi.raw_sample_ct, sample_ct, pgrp->ldbase_genovec);
+    }
+    pgrp->ldbase_stypes |= kfPgrLdcacheNyp;
+  }
+  return kPglRetSuccess;
+}
+
+PglErr GetBasicGenotypeCounts(const uintptr_t* __restrict sample_include, const uintptr_t* __restrict sample_include_interleaved_vec, const uint32_t* __restrict sample_include_cumulative_popcounts, uint32_t sample_ct, uint32_t vidx, PgenReaderMain* pgrp, uint32_t* unphased_het_ctp, STD_ARRAY_REF(uint32_t, 4) genocounts) {
+  // genocounts[0] := ref/ref, genocounts[1] := ref/altx,
+  // genocounts[2] := altx/alty, genocounts[3] := missing
+  // If unphased_het_ctp is non-null, this assumes multiallelic hardcalls are
+  // not present, phased hardcalls are present, we aren't subsetting, and
+  // unphased_het_ct is initialized to zero.
+  assert(vidx < pgrp->fi.raw_variant_ct);
+  assert(sample_ct);
+  const uint32_t vrtype = GetPgfiVrtype(&(pgrp->fi), vidx);
+  const uint32_t raw_sample_ct = pgrp->fi.raw_sample_ct;
+  const uint32_t subsetting_required = (sample_ct != raw_sample_ct);
+  const unsigned char* fread_ptr;
+  const unsigned char* fread_end = nullptr;  // maybe-uninitialized warning
+  PglErr reterr;
+  if (VrtypeLdCompressed(vrtype)) {
+    // LD compression
+    reterr = LdLoadGenovecSubsetIfNecessary(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, pgrp);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+    if (unlikely(InitReadPtrs(vidx, pgrp, &fread_ptr, &fread_end))) {
+      return kPglRetReadFail;
+    }
+    if (!(pgrp->ldbase_stypes & kfPgrLdcacheBasicGenocounts)) {
+      ZeroTrailingNyps(sample_ct, pgrp->ldbase_genovec);
+      GenoarrCountFreqsUnsafe(pgrp->ldbase_genovec, sample_ct, pgrp->ldbase_basic_genocounts);
+      assert(pgrp->ldbase_stypes);
+      pgrp->ldbase_stypes |= kfPgrLdcacheBasicGenocounts;
+    }
+    STD_ARRAY_COPY(pgrp->ldbase_basic_genocounts, 4, genocounts);
+    reterr = LdSubsetAdjustGenocounts(fread_end, subsetting_required? sample_include : nullptr, sample_include_cumulative_popcounts, pgrp->ldbase_genovec, raw_sample_ct, &fread_ptr, genocounts, pgrp->workspace_raregeno_tmp_loadbuf);
+    if (vrtype & 1) {
+      // inverted
+      const uint32_t tmpval = genocounts[0];
+      genocounts[0] = genocounts[2];
+      genocounts[2] = tmpval;
+    }
+  } else {
+    if (unlikely(InitReadPtrs(vidx, pgrp, &fread_ptr, &fread_end))) {
+      return kPglRetReadFail;
+    }
+    const uint32_t is_ldbase = pgrp->fi.vrtypes && VrtypeLdCompressed(pgrp->fi.vrtypes[vidx + 1]);
+    if (is_ldbase) {
+      // difflists are very efficient to count directly when not subsetting
+      // (since we can entirely ignore the sample IDs), but it's often better
+      // to unpack them first when subsetting.
+
+      // ...er, the statement above is a lie, unpack-first almost always seems
+      // to be better.
+      pgrp->ldbase_vidx = vidx;
+      // this may be slowed down by the LD caching change.
+      reterr = ParseNonLdGenovecSubsetUnsafe(fread_end, sample_include, sample_include_cumulative_popcounts, sample_ct, vrtype, &fread_ptr, pgrp, pgrp->ldbase_genovec);
+      ZeroTrailingNyps(sample_ct, pgrp->ldbase_genovec);
+      GenoarrCountFreqsUnsafe(pgrp->ldbase_genovec, sample_ct, genocounts);
+      STD_ARRAY_COPY(genocounts, 4, pgrp->ldbase_basic_genocounts);
+      pgrp->ldbase_stypes = (subsetting_required && (!(vrtype & 4)))? (kfPgrLdcacheNyp | kfPgrLdcacheRawNyp | kfPgrLdcacheBasicGenocounts) : (kfPgrLdcacheNyp | kfPgrLdcacheBasicGenocounts);
+    } else if (vrtype & 4) {
+      const uint32_t vrtype_low2 = vrtype & 3;
+      if (vrtype_low2 != 1) {
+        reterr = CountparseDifflistSubset(fread_end, sample_include, vrtype & 3, raw_sample_ct, sample_ct, &fread_ptr, genocounts, pgrp->workspace_raregeno_tmp_loadbuf);
+      } else {
+        genocounts[0] = sample_ct;
+        genocounts[1] = 0;
+        genocounts[2] = 0;
+        genocounts[3] = 0;
+        reterr = kPglRetSuccess;
+      }
+    } else if (vrtype & 1) {
+      reterr = CountparseOnebitSubset(fread_end, sample_include, raw_sample_ct, sample_ct, &fread_ptr, genocounts, pgrp->workspace_raregeno_tmp_loadbuf);
+    } else {
+      const uint32_t genovec_byte_ct = NypCtToByteCt(raw_sample_ct);
+      const unsigned char* genoarrb = fread_ptr;
+      if (PtrAddCk(fread_end, genovec_byte_ct, &fread_ptr)) {
+        return kPglRetMalformedInput;
+      }
+      if (!subsetting_required) {
+        const uint32_t genoarrb_is_unaligned = R_CAST(uintptr_t, genoarrb) % kBytesPerVec;
+        if (genoarrb_is_unaligned) {
+          GenoarrbCountFreqs(genoarrb, raw_sample_ct, genocounts);
+        } else {
+          GenoarrCountFreqs(R_CAST(const uintptr_t*, genoarrb), raw_sample_ct, genocounts);
+        }
+      } else {
+        GenoarrbCountSubsetFreqs(genoarrb, sample_include_interleaved_vec, raw_sample_ct, sample_ct, genocounts);
+      }
+      if (vrtype == kPglVrtypePlink1) {
+        // [3] -> [0]
+        // [2] -> [1]
+        // [1] -> [3]
+        // [0] -> [2]
+        const uint32_t save2 = genocounts[0];
+        const uint32_t save3 = genocounts[1];
+        genocounts[0] = genocounts[3];
+        genocounts[1] = genocounts[2];
+        genocounts[2] = save2;
+        genocounts[3] = save3;
+      }
+      reterr = kPglRetSuccess;
+    }
+  }
+  if ((!unphased_het_ctp) || reterr) {
+    return reterr;
+  }
+  assert((!subsetting_required) && ((vrtype & 0x18) == 0x10));
+  const uint32_t het_ct = genocounts[1];
+  const uint32_t aux2_first_part_byte_ct = 1 + (het_ct / CHAR_BIT);
+  if (PtrCheck(fread_end, fread_ptr, aux2_first_part_byte_ct)) {
+    return kPglRetMalformedInput;
+  }
+  const uint32_t explicit_phasepresent = fread_ptr[0] & 1;
+  if (explicit_phasepresent) {
+    // otherwise initial value if 0 is correct
+    *unphased_het_ctp = het_ct + 1 - PopcountBytes(fread_ptr, aux2_first_part_byte_ct);
+  }
+  return kPglRetSuccess;
+}
+
+PglErr PgrGetCounts(const uintptr_t* __restrict sample_include, const uintptr_t* __restrict sample_include_interleaved_vec, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, PgenReader* pgr_ptr, STD_ARRAY_REF(uint32_t, 4) genocounts) {
+  if (!sample_ct) {
+    STD_ARRAY_REF_FILL0(4, genocounts);
+    return kPglRetSuccess;
+  }
+  PgenReaderMain* pgrp = GetPgrp(pgr_ptr);
+  assert(vidx < pgrp->fi.raw_variant_ct);
+  return GetBasicGenotypeCounts(sample_include, sample_include_interleaved_vec, GetSicp(pssi), sample_ct, vidx, pgrp, nullptr, genocounts);
+}
+
+uint32_t CountNypVec6(const unsigned char* nyp_vvec_biter, uintptr_t nyp_word, uint32_t vec_ct) {
+  assert(!(vec_ct % 6));
+  const VecW m0 = vecw_setzero();
+  const VecW m1 = VCONST_W(kMask5555);
+  const VecW m2 = VCONST_W(kMask3333);
+  const VecW m4 = VCONST_W(kMask0F0F);
+  const VecW xor_vvec = vecw_set1(nyp_word);
+  VecW prev_sad_result = vecw_setzero();
+  VecW acc = vecw_setzero();
+  uintptr_t cur_incr = 60;
+  for (; ; vec_ct -= cur_incr) {
+    if (vec_ct < 60) {
+      if (!vec_ct) {
+        acc = acc + prev_sad_result;
+        return HsumW(acc);
+      }
+      cur_incr = vec_ct;
+    }
+    VecW inner_acc = vecw_setzero();
+    const unsigned char* nyp_vvec_stop = &(nyp_vvec_biter[cur_incr * kBytesPerVec]);
+    do {
+      VecW loader1 = vecw_loadu(nyp_vvec_biter) ^ xor_vvec;
+      nyp_vvec_biter += kBytesPerVec;
+      VecW loader2 = vecw_loadu(nyp_vvec_biter) ^ xor_vvec;
+      nyp_vvec_biter += kBytesPerVec;
+      VecW count1 = vecw_and_notfirst(vecw_srli(loader1, 1) | loader1, m1);
+      VecW count2 = vecw_and_notfirst(vecw_srli(loader2, 1) | loader2, m1);
+
+      loader1 = vecw_loadu(nyp_vvec_biter) ^ xor_vvec;
+      nyp_vvec_biter += kBytesPerVec;
+      loader2 = vecw_loadu(nyp_vvec_biter) ^ xor_vvec;
+      nyp_vvec_biter += kBytesPerVec;
+      count1 = count1 + vecw_and_notfirst(vecw_srli(loader1, 1) | loader1, m1);
+      count2 = count2 + vecw_and_notfirst(vecw_srli(loader2, 1) | loader2, m1);
+
+      loader1 = vecw_loadu(nyp_vvec_biter) ^ xor_vvec;
+      nyp_vvec_biter += kBytesPerVec;
+      loader2 = vecw_loadu(nyp_vvec_biter) ^ xor_vvec;
+      nyp_vvec_biter += kBytesPerVec;
+      count1 = count1 + vecw_and_notfirst(vecw_srli(loader1, 1) | loader1, m1);
+      count2 = count2 + vecw_and_notfirst(vecw_srli(loader2, 1) | loader2, m1);
+
+      count1 = (count1 & m2) + (vecw_srli(count1, 2) & m2);
+      count1 = count1 + (count2 & m2) + (vecw_srli(count2, 2) & m2);
+      inner_acc = inner_acc + (count1 & m4) + (vecw_srli(count1, 4) & m4);
+    } while (nyp_vvec_biter < nyp_vvec_stop);
+    acc = acc + prev_sad_result;
+    prev_sad_result = vecw_bytesum(inner_acc, m0);
+  }
+}
+
+// Ok for nyparr to be unaligned.  Ok if unsafe to read trailing bytes of
+// nyparr.
+uint32_t CountNyp(const void* nyparr, uintptr_t nyp_word, uint32_t nyp_ct) {
+  const unsigned char* nyparr_uc = S_CAST(const unsigned char*, nyparr);
+  const uint32_t fullword_ct = nyp_ct / kBitsPerWordD2;
+  uint32_t word_idx = fullword_ct - (fullword_ct % (6 * kWordsPerVec));
+  uint32_t tot = CountNypVec6(nyparr_uc, nyp_word, word_idx / kWordsPerVec);
+  for (; word_idx != fullword_ct; ++word_idx) {
+    uintptr_t cur_word;
+    CopyFromUnalignedOffsetW(&cur_word, nyparr_uc, word_idx);
+    tot += Popcount01Word(Word00(cur_word ^ nyp_word));
+  }
+  const uint32_t trailing_nyp_ct = nyp_ct % kBitsPerWordD2;
+  if (trailing_nyp_ct) {
+    const uint32_t trailing_byte_ct = DivUp(trailing_nyp_ct, (CHAR_BIT / 2));
+    uintptr_t cur_word = SubwordLoad(&(nyparr_uc[fullword_ct * kBytesPerWord]), trailing_byte_ct) ^ nyp_word;
+    cur_word = bzhi(Word00(cur_word), trailing_nyp_ct * 2);
+    tot += Popcount01Word(cur_word);
+  }
+  return tot;
+}
+
+/*
+uint32_t CountNypSubsetVec6(const VecW* __restrict nyp_vvec, const VecW* __restrict interleaved_mask_vvec, uintptr_t nyp_word, uint32_t vec_ct) {
+  assert(!(vec_ct % 6));
+  const VecW m0 = vecw_setzero();
+  const VecW m1 = VCONST_W(kMask5555);
+  const VecW m2 = VCONST_W(kMask3333);
+  const VecW m4 = VCONST_W(kMask0F0F);
+  const VecW xor_vvec = vecw_set1(nyp_word);
+  const VecW* nyp_vvec_iter = nyp_vvec;
+  const VecW* interleaved_mask_vvec_iter = interleaved_mask_vvec;
+  VecW prev_sad_result = vecw_setzero();
+  VecW acc = vecw_setzero();
+  uintptr_t cur_incr = 60;
+  while (1) {
+    if (vec_ct < 60) {
+      if (!vec_ct) {
+        acc = acc + prev_sad_result;
+        return HsumW(acc);
+      }
+      cur_incr = vec_ct;
+    }
+    VecW inner_acc = vecw_setzero();
+    const VecW* nyp_vvec_stop = &(nyp_vvec_iter[cur_incr]);
+    vec_ct -= cur_incr;
+    do {
+      VecW mask1 = *interleaved_mask_vvec_iter++;
+      VecW loader1 = vecw_loadu(nyp_vvec_iter++) ^ xor_vvec;
+      VecW mask2 = vecw_srli(mask1, 1) & m1;
+      VecW loader2 = vecw_loadu(nyp_vvec_iter++) ^ xor_vvec;
+      mask1 = mask1 & m1;
+      VecW count1 = vecw_and_notfirst(vecw_srli(loader1, 1) | loader1, mask1);
+      VecW count2 = vecw_and_notfirst(vecw_srli(loader2, 1) | loader2, mask2);
+
+      mask1 = *interleaved_mask_vvec_iter++;
+      loader1 = vecw_loadu(nyp_vvec_iter++) ^ xor_vvec;
+      mask2 = vecw_srli(mask1, 1) & m1;
+      loader2 = vecw_loadu(nyp_vvec_iter++) ^ xor_vvec;
+      mask1 = mask1 & m1;
+      count1 = count1 + vecw_and_notfirst(vecw_srli(loader1, 1) | loader1, mask1);
+      count2 = count2 + vecw_and_notfirst(vecw_srli(loader2, 1) | loader2, mask2);
+
+      mask1 = *interleaved_mask_vvec_iter++;
+      loader1 = vecw_loadu(nyp_vvec_iter++) ^ xor_vvec;
+      mask2 = vecw_srli(mask2, 1) & m1;
+      loader2 = vecw_loadu(nyp_vvec_iter++) ^ xor_vvec;
+      mask1 = mask1 & m1;
+      count1 = count1 + vecw_and_notfirst(vecw_srli(loader1, 1) | loader1, mask1);
+      count2 = count2 + vecw_and_notfirst(vecw_srli(loader2, 1) | loader2, mask2);
+
+      count1 = (count1 & m2) + (vecw_srli(count1, 2) & m2);
+      count1 = count1 + (count2 & m2) + (vecw_srli(count2, 2) & m2);
+      inner_acc = inner_acc + (count1 & m4) + (vecw_srli(count1, 4) & m4);
+    } while (nyp_vvec_iter < nyp_vvec_stop);
+    acc = acc + prev_sad_result;
+    prev_sad_result = vecw_bytesum(inner_acc, m0);
+  }
+}
+
+uint32_t CountNypSubset(const uintptr_t* __restrict nypvec, const uintptr_t* __restrict interleaved_vec, uintptr_t nyp_word, uint32_t raw_nyp_ct) {
+  // simplified GenoarrCountSubsetFreqs()
+  const uint32_t raw_nyp_ctv2 = NypCtToVecCt(raw_nyp_ct);
+#ifdef __LP64__
+  uint32_t vec_idx = raw_nyp_ctv2 - (raw_nyp_ctv2 % 6);
+  uint32_t tot = CountNypSubsetVec6(R_CAST(const VecW*, nypvec), R_CAST(const VecW*, interleaved_vec), nyp_word, vec_idx);
+  const uintptr_t* nypvec_iter = &(nypvec[kWordsPerVec * vec_idx]);
+  const uintptr_t* interleaved_mask_iter = &(interleaved_vec[(kWordsPerVec / 2) * vec_idx]);
+#  ifdef USE_AVX2
+  uintptr_t mask_base1 = 0;
+  uintptr_t mask_base2 = 0;
+  uintptr_t mask_base3 = 0;
+  uintptr_t mask_base4 = 0;
+  for (; vec_idx != raw_nyp_ctv2; ++vec_idx) {
+    uintptr_t mask_word1;
+    uintptr_t mask_word2;
+    uintptr_t mask_word3;
+    uintptr_t mask_word4;
+    if (!(vec_idx % 2)) {
+      mask_base1 = *interleaved_mask_iter++;
+      mask_base2 = *interleaved_mask_iter++;
+      mask_base3 = *interleaved_mask_iter++;
+      mask_base4 = *interleaved_mask_iter++;
+      mask_word1 = mask_base1 & kMask5555;
+      mask_word2 = mask_base2 & kMask5555;
+      mask_word3 = mask_base3 & kMask5555;
+      mask_word4 = mask_base4 & kMask5555;
+    } else {
+      mask_word1 = (mask_base1 >> 1) & kMask5555;
+      mask_word2 = (mask_base2 >> 1) & kMask5555;
+      mask_word3 = (mask_base3 >> 1) & kMask5555;
+      mask_word4 = (mask_base4 >> 1) & kMask5555;
+    }
+    uint32_t uii = 0;
+    while (1) {
+      const uintptr_t cur_geno_word1 = (*nypvec_iter++) ^ nyp_word;
+      const uintptr_t cur_geno_word2 = (*nypvec_iter++) ^ nyp_word;
+      const uintptr_t masked1 = mask_word1 & (~(cur_geno_word1 | (cur_geno_word1 >> 1)));
+      const uintptr_t masked2 = mask_word2 & (~(cur_geno_word2 | (cur_geno_word2 >> 1)));
+      tot += PopcountWord((masked1 << 1) | masked2);
+      if (uii) {
+        break;
+      }
+      ++uii;
+      mask_word1 = mask_word3;
+      mask_word2 = mask_word4;
+    }
+  }
+#  else  // not USE_AVX2
+  uintptr_t mask_base1 = 0;
+  uintptr_t mask_base2 = 0;
+  for (; vec_idx != raw_nyp_ctv2; ++vec_idx) {
+    uintptr_t mask_word1;
+    uintptr_t mask_word2;
+    if (!(vec_idx % 2)) {
+      mask_base1 = *interleaved_mask_iter++;
+      mask_base2 = *interleaved_mask_iter++;
+      mask_word1 = mask_base1 & kMask5555;
+      mask_word2 = mask_base2 & kMask5555;
+    } else {
+      mask_word1 = (mask_base1 >> 1) & kMask5555;
+      mask_word2 = (mask_base2 >> 1) & kMask5555;
+    }
+    const uintptr_t cur_geno_word1 = (*nypvec_iter++) ^ nyp_word;
+    const uintptr_t cur_geno_word2 = (*nypvec_iter++) ^ nyp_word;
+    const uintptr_t masked1 = mask_word1 & (~(cur_geno_word1 | (cur_geno_word1 >> 1)));
+    const uintptr_t masked2 = mask_word2 & (~(cur_geno_word2 | (cur_geno_word2 >> 1)));
+#    ifdef USE_SSE42
+    tot += PopcountWord((masked1 << 1) | masked2);
+#    else
+    tot += NypsumWord(masked1 + masked2);
+#    endif
+  }
+#  endif  // not USE_AVX2
+#else  // not __LP64__
+  uint32_t word_idx = raw_nyp_ctv2 - (raw_nyp_ctv2 % 6);
+  uint32_t tot = CountNypSubsetVec6(R_CAST(const VecW*, nypvec), R_CAST(const VecW*, interleaved_vec), nyp_word, word_idx);
+  const uintptr_t* interleaved_mask_iter = &(interleaved_vec[word_idx / 2]);
+  uintptr_t mask_base = 0;
+  for (; word_idx != raw_nyp_ctv2; ++word_idx) {
+    uintptr_t mask_word;
+    if (!(word_idx % 2)) {
+      mask_base = *interleaved_mask_iter++;
+      mask_word = mask_base & kMask5555;
+    } else {
+      mask_word = (mask_base >> 1) & kMask5555;
+    }
+    const uintptr_t cur_geno_word = nypvec[word_idx] ^ nyp_word;
+    const uintptr_t masked = mask_word & (~(cur_geno_word | (cur_geno_word >> 1)));
+    tot += Popcount01Word(masked);
+  }
+#endif
+  return tot;
+}
+*/
+
+// similar to ParseAndSaveDifflist()
+PglErr ParseAndSaveDeltalist(const unsigned char* fread_end, uint32_t raw_sample_ct, const unsigned char** fread_pp, uint32_t* __restrict deltalist, uint32_t* __restrict deltalist_len_ptr) {
+  const unsigned char* group_info_iter;
+  PglErr reterr = ParseDifflistHeader(fread_end, raw_sample_ct, fread_pp, nullptr, &group_info_iter, deltalist_len_ptr);
+  const uint32_t deltalist_len = *deltalist_len_ptr;
+  if (reterr || (!deltalist_len)) {
+    return reterr;
+  }
+  const uint32_t sample_id_byte_ct = BytesToRepresentNzU32(raw_sample_ct);
+  const uint32_t group_idx_last = (deltalist_len - 1) / kPglDifflistGroupSize;
+  uint32_t* deltalist_iter = deltalist;
+  uint32_t group_len_m1 = kPglDifflistGroupSize - 1;
+  for (uint32_t group_idx = 0; ; ++group_idx) {
+    if (group_idx >= group_idx_last) {
+      if (group_idx > group_idx_last) {
+        return kPglRetSuccess;
+      }
+      group_len_m1 &= deltalist_len - 1;
+    }
+    uintptr_t raw_sample_idx = SubU32Load(group_info_iter, sample_id_byte_ct);
+    group_info_iter = &(group_info_iter[sample_id_byte_ct]);
+    for (uint32_t raw_deltalist_idx_lowbits = 0; ; ++raw_deltalist_idx_lowbits) {
+      // always check, otherwise we may scribble over arbitrary memory
+      if (unlikely(raw_sample_idx >= raw_sample_ct)) {
+        return kPglRetMalformedInput;
+      }
+      deltalist_iter[raw_deltalist_idx_lowbits] = raw_sample_idx;
+      if (raw_deltalist_idx_lowbits == group_len_m1) {
+        break;
+      }
+      raw_sample_idx += GetVint31(fread_end, fread_pp);
+    }
+    deltalist_iter = &(deltalist_iter[group_len_m1 + 1]);
+  }
+}
+
+PglErr CountDeltalistIntersect(const unsigned char* fread_end, const uintptr_t* __restrict sample_include, uint32_t raw_sample_ct, const unsigned char** fread_pp, uint32_t* __restrict intersect_ctp, uint32_t* __restrict raw_deltalist_len_ptr) {
+  // Requires a PROPER subset.
+  const unsigned char* group_info_iter;
+  PglErr reterr = ParseDifflistHeader(fread_end, raw_sample_ct, fread_pp, nullptr, &group_info_iter, raw_deltalist_len_ptr);
+  const uint32_t raw_deltalist_len = *raw_deltalist_len_ptr;
+  if (reterr || (!raw_deltalist_len)) {
+    *intersect_ctp = 0;
+    return reterr;
+  }
+  const uint32_t group_idx_last = (raw_deltalist_len - 1) / kPglDifflistGroupSize;
+  const uint32_t sample_id_byte_ct = BytesToRepresentNzU32(raw_sample_ct);
+  uintptr_t intersect_ct = 0;
+
+  // technically doesn't need to be initialized, but I have principles
+  uintptr_t raw_sample_idx = 0;
+
+  uint32_t group_len_m1 = kPglDifflistGroupSize - 1;
+  for (uint32_t group_idx = 0; ; ++group_idx) {
+    if (group_idx >= group_idx_last) {
+      if (group_idx > group_idx_last) {
+        *intersect_ctp = intersect_ct;
+        return kPglRetSuccess;
+      }
+      group_len_m1 &= raw_deltalist_len - 1;
+    }
+    // We need to pull a raw sample index from the deltalist header every 64
+    // entries.
+#ifdef __LP64__
+    if (unlikely(raw_sample_idx >= raw_sample_ct)) {
+      return kPglRetMalformedInput;
+    }
+#endif
+    raw_sample_idx = SubU32Load(group_info_iter, sample_id_byte_ct);
+    group_info_iter = &(group_info_iter[sample_id_byte_ct]);
+    for (uint32_t raw_deltalist_idx_lowbits = 0; ; ++raw_deltalist_idx_lowbits) {
+#ifndef __LP64__
+      if (unlikely(raw_sample_idx >= raw_sample_ct)) {
+        return kPglRetMalformedInput;
+      }
+#endif
+      intersect_ct += IsSet(sample_include, raw_sample_idx);
+      if (raw_deltalist_idx_lowbits == group_len_m1) {
+        break;
+      }
+      raw_sample_idx += GetVint31(fread_end, fread_pp);
+    }
+  }
+}
+
+uint32_t CountAux1aDense(const unsigned char* patch_01_fvals, uint32_t allele_ct, uint32_t allele_idx, uint32_t raw_01_ct, uint32_t rare01_ct) {
+  // The 'f' in patch_01_fset/patch_01_fvals is to distinguish the in-file
+  // representation from the returned AlleleCode*-based representation.
+  if (allele_idx == 1) {
+    // safe to ignore allele codes
+    return raw_01_ct - rare01_ct;
+  }
+  if (allele_ct < 5) {
+    if (allele_ct == 3) {
+      return rare01_ct;
+    }
+    // need to count matches
+    const uint32_t allele_code_byte_ct = DivUp(rare01_ct, 8);
+    const uint32_t alt3_ct = PopcountBytes(patch_01_fvals, allele_code_byte_ct);
+    if (allele_idx == 3) {
+      return alt3_ct;
+    }
+    return rare01_ct - alt3_ct;
+  }
+  if (allele_ct < 19) {
+    if (allele_ct < 7) {
+      return CountNyp(patch_01_fvals, (allele_idx - 2) * kMask5555, rare01_ct);
+    }
+    return CountNybble(patch_01_fvals, (allele_idx - 2) * kMask1111, rare01_ct);
+  }
+  return CountByte(patch_01_fvals, allele_idx - 2, rare01_ct);
+}
+
+uint32_t GetAux1aWidth(uint32_t allele_ct) {
+  if (allele_ct < 7) {
+    if (allele_ct < 5) {
+      return allele_ct - 3;
+    }
+    return 2;
+  }
+  if (allele_ct < 19) {
+    return 4;
+  }
+  return 8;
+}
+
+// Returns allele_code_width.  Other return values are inaccurate for allele_ct
+// == 3, since it's assumed that they're unused in that case.
+uint32_t GetAux1aConsts(uint32_t allele_ct, uintptr_t* detect_mask_hi_ptr, uintptr_t* detect_mask_lo_ptr, uint32_t* allele_code_logwidth_ptr) {
+  if (allele_ct < 7) {
+    if (allele_ct < 5) {
+      *detect_mask_hi_ptr = ~k0LU;
+      *detect_mask_lo_ptr = ~k0LU;
+      *allele_code_logwidth_ptr = 0;
+      return allele_ct - 3;
+    }
+    *detect_mask_hi_ptr = kMaskAAAA;
+    *detect_mask_lo_ptr = kMask5555;
+    *allele_code_logwidth_ptr = 1;
+    return 2;
+  }
+  if (allele_ct < 19) {
+    *detect_mask_hi_ptr = kMask1111 * 8;
+    *detect_mask_lo_ptr = kMask1111;
+    *allele_code_logwidth_ptr = 2;
+    return 4;
+  }
+  *detect_mask_hi_ptr = kMask0101 * 0x80;
+  *detect_mask_lo_ptr = kMask0101;
+  *allele_code_logwidth_ptr = 3;
+  return 8;
+}
+
+// Advances *fread_pp past aux1a, and sets *het_ctp to the number of ref-altx
+// hets where x == allele_idx in sample_include.  (If allele_idx == 1, *het_ctp
+// is raw_01_ct - [# of aux1a entries] when there's no subsetting.)
+// Note that raw_01_ct must be an un-subsetted count.
+// Ok for subsetted_01_ct to be uninitialized if not subsetting, or allele_idx
+// != 1.
+// sample_include assumed to be nullptr if no subsetting required
+PglErr CountAux1a(const unsigned char* fread_end, const uintptr_t* __restrict sample_include, const uintptr_t* __restrict raw_genoarr, uint32_t aux1a_mode, uint32_t raw_sample_ct, uint32_t allele_ct, uint32_t allele_idx, uint32_t raw_01_ct, uint32_t subsetted_01_ct, const unsigned char** fread_pp, uint32_t* __restrict het_ctp, uint32_t* __restrict deltalist_workspace) {
+  if (aux1a_mode == 15) {
+    if (allele_idx == 1) {
+      if (sample_include) {
+        *het_ctp = subsetted_01_ct;
+      } else {
+        *het_ctp = raw_01_ct;
+      }
+    } else {
+      *het_ctp = 0;
+    }
+    return kPglRetSuccess;
+  }
+  const uint32_t ignore_01_fvals = (allele_idx == 1) || (allele_ct == 3);
+  uintptr_t detect_mask_hi;
+  uintptr_t detect_mask_lo;
+  uint32_t allele_code_logwidth;
+  const uint32_t allele_code_width = GetAux1aConsts(allele_ct, &detect_mask_hi, &detect_mask_lo, &allele_code_logwidth);
+  const uintptr_t xor_word = (allele_idx - 2) * detect_mask_lo;
+  if (!aux1a_mode) {
+    // 01-collapsed bitarray
+    const uint32_t fset_byte_ct = DivUp(raw_01_ct, CHAR_BIT);
+    const uint32_t rare01_ct = PopcountBytes(*fread_pp, fset_byte_ct);
+    const unsigned char* patch_01_fset = *fread_pp;
+    *fread_pp += fset_byte_ct;
+    const unsigned char* patch_01_fvals = *fread_pp;
+    const uint32_t fvals_byte_ct = DivUpU64(S_CAST(uint64_t, rare01_ct) * allele_code_width, 8);
+    if (PtrAddCk(fread_end, fvals_byte_ct, fread_pp)) {
+      return kPglRetMalformedInput;
+    }
+    if (!sample_include) {
+      *het_ctp = CountAux1aDense(patch_01_fvals, allele_ct, allele_idx, raw_01_ct, rare01_ct);
+      return kPglRetSuccess;
+    }
+    const Halfword* sample_include_hw = DowncastKWToHW(sample_include);
+    uintptr_t sample_hwidx = 0;
+    uintptr_t cur_raw_genoarr_hets = Word01(raw_genoarr[0]);
+    const uint32_t fset_word_ct_m1 = (fset_byte_ct - 1) / kBytesPerWord;
+    const uint32_t fvals_word_ct_m1 = (fvals_byte_ct - 1) / kBytesPerWord;
+    uintptr_t fvals_bits = 0;
+    uint32_t fvals_widx = 0;
+    uint32_t subsetted_hetx_ct = 0;
+    uint32_t loop_len = kBitsPerWord;
+    uint32_t rare01_lowbits = kBitsPerWord;
+    for (uint32_t fset_widx = 0; ; ++fset_widx) {
+      uintptr_t fset_bits;
+      if (fset_widx >= fset_word_ct_m1) {
+        if (fset_widx > fset_word_ct_m1) {
+          break;
+        }
+        fset_bits = SubwordLoad(&(patch_01_fset[fset_word_ct_m1 * kBytesPerWord]), ModNz(fset_byte_ct, kBytesPerWord));
+        loop_len = ModNz(raw_01_ct, kBitsPerWord);
+      } else {
+        CopyFromUnalignedOffsetW(&fset_bits, patch_01_fset, fset_widx);
+      }
+      // format 0, sample_include non-null
+      if (ignore_01_fvals) {
+        for (uint32_t uii = 0; uii != loop_len; ++uii) {
+          while (!cur_raw_genoarr_hets) {
+            cur_raw_genoarr_hets = Word01(raw_genoarr[++sample_hwidx]);
+          }
+          if (fset_bits & 1) {
+            // Considered replacing cur_raw_genoarr_hets with the result of
+            // two PackWordToHalfword() operations, since that keeps all
+            // the sample word-indexes aligned.  Couldn't justify it given
+            // the expected sparsity of this case, though.
+            const uint32_t sample_uidx_lowbits = ctzw(cur_raw_genoarr_hets) / 2;
+            subsetted_hetx_ct += (sample_include_hw[sample_hwidx] >> sample_uidx_lowbits) & 1;
+          }
+          cur_raw_genoarr_hets &= cur_raw_genoarr_hets - 1;
+          fset_bits = fset_bits >> 1;
+        }
+      } else {
+        for (uint32_t uii = 0; uii != loop_len; ++uii) {
+          while (!cur_raw_genoarr_hets) {
+            cur_raw_genoarr_hets = Word01(raw_genoarr[++sample_hwidx]);
+          }
+          if (fset_bits & 1) {
+            if (rare01_lowbits == kBitsPerWord) {
+              if (fvals_widx == fvals_word_ct_m1) {
+                fvals_bits = SubwordLoad(&(patch_01_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+              } else {
+                CopyFromUnalignedOffsetW(&fvals_bits, patch_01_fvals, fvals_widx);
+              }
+              fvals_bits = fvals_bits ^ xor_word;
+              fvals_bits = (detect_mask_hi & (~(fvals_bits | ((fvals_bits | detect_mask_hi) - detect_mask_lo)))) >> (allele_code_width - 1);
+              // unnecessary to apply bzhi here
+              ++fvals_widx;
+              rare01_lowbits = 0;
+            }
+            if (fvals_bits & (k1LU << rare01_lowbits)) {
+              const uint32_t sample_uidx_lowbits = ctzw(cur_raw_genoarr_hets) / 2;
+              subsetted_hetx_ct += (sample_include_hw[sample_hwidx] >> sample_uidx_lowbits) & 1;
+            }
+            rare01_lowbits += allele_code_width;
+          }
+          cur_raw_genoarr_hets &= cur_raw_genoarr_hets - 1;
+          fset_bits = fset_bits >> 1;
+        }
+      }
+    }
+    if (allele_idx == 1) {
+      *het_ctp = subsetted_01_ct - subsetted_hetx_ct;
+    } else {
+      *het_ctp = subsetted_hetx_ct;
+    }
+    return kPglRetSuccess;
+  }
+  // mode 1: difflist.
+  if (!sample_include) {
+    const unsigned char* group_info_iter;
+    uint32_t rare01_ct;
+    PglErr reterr = ParseDifflistHeader(fread_end, raw_sample_ct, fread_pp, nullptr, &group_info_iter, &rare01_ct);
+    // rare01_ct == 0 should be impossible
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+    reterr = SkipDeltalistIds(fread_end, group_info_iter, rare01_ct, raw_sample_ct, 1, fread_pp);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+    const unsigned char* patch_01_fvals = *fread_pp;
+    const uint32_t fvals_byte_ct = DivUpU64(S_CAST(uint64_t, rare01_ct) * allele_code_width, 8);
+    if (PtrAddCk(fread_end, fvals_byte_ct, fread_pp)) {
+      return kPglRetMalformedInput;
+    }
+
+    *het_ctp = CountAux1aDense(patch_01_fvals, allele_ct, allele_idx, raw_01_ct, rare01_ct);
+    return kPglRetSuccess;
+  }
+  if (ignore_01_fvals) {
+    // Don't need to save deltalist contents in this case.
+    uint32_t subsetted_hetx_ct;
+    uint32_t rare01_ct;
+    PglErr reterr = CountDeltalistIntersect(fread_end, sample_include, raw_sample_ct, fread_pp, &subsetted_hetx_ct, &rare01_ct);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+    if (allele_idx == 1) {
+      *het_ctp = subsetted_01_ct - subsetted_hetx_ct;
+      const uint32_t fvals_byte_ct = DivUpU64(S_CAST(uint64_t, rare01_ct) * allele_code_width, 8);
+      if (PtrAddCk(fread_end, fvals_byte_ct, fread_pp)) {
+        return kPglRetMalformedInput;
+      }
+    } else {
+      *het_ctp = subsetted_hetx_ct;
+    }
+    return kPglRetSuccess;
+  }
+  // Save deltalist elements, iterate.
+  uint32_t rare01_ct;
+  PglErr reterr = ParseAndSaveDeltalist(fread_end, raw_sample_ct, fread_pp, deltalist_workspace, &rare01_ct);
+  if (unlikely(reterr)) {
+    return reterr;
+  }
+  const unsigned char* patch_01_fvals = *fread_pp;
+  const uint32_t fvals_byte_ct = DivUpU64(S_CAST(uint64_t, rare01_ct) * allele_code_width, 8);
+  if (PtrAddCk(fread_end, fvals_byte_ct, fread_pp)) {
+    return kPglRetMalformedInput;
+  }
+  const uint32_t fvals_word_ct_m1 = (fvals_byte_ct - 1) / kBytesPerWord;
+  uint32_t subsetted_hetx_ct = 0;
+  for (uint32_t fvals_widx = 0; ; ++fvals_widx) {
+    uintptr_t fvals_bits;
+    if (fvals_widx >= fvals_word_ct_m1) {
+      if (fvals_widx > fvals_word_ct_m1) {
+        break;
+      }
+      fvals_bits = SubwordLoad(&(patch_01_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+    } else {
+      CopyFromUnalignedOffsetW(&fvals_bits, patch_01_fvals, fvals_widx);
+    }
+    fvals_bits = fvals_bits ^ xor_word;
+    fvals_bits = detect_mask_hi & (~(fvals_bits | ((fvals_bits | detect_mask_hi) - detect_mask_lo)));
+    if (fvals_widx == fvals_word_ct_m1) {
+      fvals_bits = bzhi_max(fvals_bits, ModNz(rare01_ct << allele_code_logwidth, kBitsPerWord));
+    }
+    if (!fvals_bits) {
+      continue;
+    }
+    const uint32_t* cur_deltalist_base = &(deltalist_workspace[fvals_widx << (kBitsPerWordLog2 - allele_code_logwidth)]);
+    do {
+      const uint32_t rare01_idx_lowbits = ctzw(fvals_bits) >> allele_code_logwidth;
+      const uint32_t sample_uidx = cur_deltalist_base[rare01_idx_lowbits];
+      subsetted_hetx_ct += IsSet(sample_include, sample_uidx);
+      fvals_bits &= fvals_bits - 1;
+    } while (fvals_bits);
+  }
+  *het_ctp = subsetted_hetx_ct;
+  return kPglRetSuccess;
+}
+
+void CountAux1bDense(const unsigned char* patch_10_fvals, uint32_t allele_ct, uint32_t allele_idx_m1, uint32_t raw_10_ct, uint32_t rare10_ct, uint32_t* __restrict het_ctp, uint32_t* __restrict hom_ctp) {
+  uint32_t matching_hom_ct = 0;
+  uint32_t het_incr;
+  if (allele_ct < 6) {
+    if (allele_ct == 3) {
+      const uint32_t allele_code_byte_ct = DivUp(rare10_ct, 8);
+      matching_hom_ct = PopcountBytes(patch_10_fvals, allele_code_byte_ct);
+      het_incr = rare10_ct - matching_hom_ct;
+    } else {
+      // 2+2 bits
+      het_incr = CountNyp(patch_10_fvals, allele_idx_m1 * kMask5555, rare10_ct * 2);
+      if (allele_idx_m1) {
+        matching_hom_ct = CountNybble(patch_10_fvals, allele_idx_m1 * kMask5555, rare10_ct);
+      }
+    }
+  } else {
+    if (allele_ct < 18) {
+      // 4+4 bits
+      het_incr = CountNybble(patch_10_fvals, allele_idx_m1 * kMask1111, rare10_ct * 2);
+      if (allele_idx_m1) {
+        matching_hom_ct = CountByte(patch_10_fvals, allele_idx_m1 * 0x11, rare10_ct);
+      }
+    } else {
+      // 8+8 bits
+      het_incr = CountByte(patch_10_fvals, allele_idx_m1 * 0x11, rare10_ct * 2);
+      if (allele_idx_m1) {
+        matching_hom_ct = CountU16(patch_10_fvals, allele_idx_m1 * 0x1111, rare10_ct);
+      }
+    }
+  }
+  if (!allele_idx_m1) {
+    *hom_ctp = raw_10_ct - rare10_ct;
+  } else {
+    het_incr -= 2 * matching_hom_ct;
+    *hom_ctp = matching_hom_ct;
+  }
+  *het_ctp += het_incr;
+}
+
+// Returns allele_code_logwidth.
+uint32_t GetAux1bConsts(uint32_t allele_ct, uintptr_t* detect_hom_mask_lo_ptr) {
+  if (allele_ct < 6) {
+    if (allele_ct == 3) {
+      *detect_hom_mask_lo_ptr = ~k0LU;
+      return 0;
+    }
+    *detect_hom_mask_lo_ptr = kMask1111;
+    return 1;
+  }
+  if (allele_ct < 18) {
+    *detect_hom_mask_lo_ptr = kMask0101;
+    return 2;
+  }
+  *detect_hom_mask_lo_ptr = kMask0001;
+  return 3;
+}
+
+// Advances *fread_pp past aux1b; increments *het_ctp by the number of
+// altx-alty genotypes in aux1b and sample_include with one allele ==
+// allele_idx; and sets *hom_ctp to the number of such hom-allele_idx genotypes
+// present.  (For allele_idx == 1, *hom_ctp is equal to raw_10_ct -
+// <# of aux1b entries> when there's no subsetting.)
+// Trailing bits of raw_genoarr must be cleared.
+// Ok for subsetted_10_ct to be uninitialized if not subsetting, or allele_idx
+// != 1.
+// sample_include assumed to be nullptr if no subsetting required
+PglErr CountAux1b(const unsigned char* fread_end, const uintptr_t* __restrict sample_include, const uintptr_t* __restrict raw_genoarr, uint32_t aux1b_mode, uint32_t raw_sample_ct, uint32_t allele_ct, uint32_t allele_idx, uint32_t raw_10_ct, uint32_t subsetted_10_ct, const unsigned char** fread_pp, uint32_t* __restrict het_ctp, uint32_t* __restrict hom_ctp, uint32_t* __restrict deltalist_workspace) {
+  if (aux1b_mode == 15) {
+    if (allele_idx == 1) {
+      if (sample_include) {
+        *hom_ctp = subsetted_10_ct;
+      } else {
+        *hom_ctp = raw_10_ct;
+      }
+    } else {
+      *hom_ctp = 0;
+    }
+    return kPglRetSuccess;
+  }
+  uintptr_t detect_hom_mask_lo;
+  const uint32_t allele_code_logwidth = GetAux1bConsts(allele_ct, &detect_hom_mask_lo);
+  const uint32_t allele_code_width = 1U << allele_code_logwidth;
+  const uint32_t code10_logwidth = allele_code_logwidth + (allele_code_logwidth != 0);
+  const uint32_t code10_width = 1U << code10_logwidth;
+  const uint32_t allele_idx_m1 = allele_idx - 1;
+  uint32_t rare10_lowbits = kBitsPerWord;
+  if (!aux1b_mode) {
+    // 10-collapsed bitarray
+    const uint32_t fset_byte_ct = DivUp(raw_10_ct, CHAR_BIT);
+    const uint32_t rare10_ct = PopcountBytes(*fread_pp, fset_byte_ct);
+    const unsigned char* patch_10_fset = *fread_pp;
+    *fread_pp += fset_byte_ct;
+    const unsigned char* patch_10_fvals = *fread_pp;
+    const uint32_t fvals_byte_ct = DivUpU64(S_CAST(uint64_t, rare10_ct) * code10_width, 8);
+    if (PtrAddCk(fread_end, fvals_byte_ct, fread_pp)) {
+      return kPglRetMalformedInput;
+    }
+    if (!sample_include) {
+      CountAux1bDense(patch_10_fvals, allele_ct, allele_idx_m1, raw_10_ct, rare10_ct, het_ctp, hom_ctp);
+      return kPglRetSuccess;
+    }
+    const Halfword* sample_include_hw = DowncastKWToHW(sample_include);
+    uintptr_t sample_hwidx = 0;
+    uintptr_t cur_raw_genoarr_xys = Word10(raw_genoarr[0]);
+    const uint32_t fset_word_ct_m1 = (fset_byte_ct - 1) / kBytesPerWord;
+    const uint32_t fvals_word_ct_m1 = (fvals_byte_ct - 1) / kBytesPerWord;
+    uintptr_t fvals_bits = 0;
+    uint32_t fvals_widx = 0;
+    uint32_t loop_len = kBitsPerWord;
+    if ((!allele_idx_m1) || (allele_ct == 3)) {
+      // bugfix (29 Dec 2019)
+      const uintptr_t detect_alt1_mask_hi = detect_hom_mask_lo << (allele_code_width - 1);
+      uint32_t subsetted_rare10_ct = 0;
+      uint32_t het_1x_ct = 0;
+      for (uint32_t fset_widx = 0; ; ++fset_widx) {
+        uintptr_t fset_bits;
+        if (fset_widx >= fset_word_ct_m1) {
+          if (fset_widx > fset_word_ct_m1) {
+            break;
+          }
+          fset_bits = SubwordLoad(&(patch_10_fset[fset_word_ct_m1 * kBytesPerWord]), ModNz(fset_byte_ct, kBytesPerWord));
+          loop_len = ModNz(raw_10_ct, kBitsPerWord);
+        } else {
+          CopyFromUnalignedOffsetW(&fset_bits, patch_10_fset, fset_widx);
+        }
+        for (uint32_t uii = 0; uii != loop_len; ++uii) {
+          while (!cur_raw_genoarr_xys) {
+            cur_raw_genoarr_xys = Word10(raw_genoarr[++sample_hwidx]);
+          }
+          if (fset_bits & 1) {
+            if (rare10_lowbits == kBitsPerWord) {
+              if (fvals_widx == fvals_word_ct_m1) {
+                fvals_bits = SubwordLoad(&(patch_10_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+              } else {
+                CopyFromUnalignedOffsetW(&fvals_bits, patch_10_fvals, fvals_widx);
+              }
+              // This sets each fvals_bits entry to 1 iff the patch genotype is
+              // ALT1-ALTx, i.e. the original low bits were zero.
+              fvals_bits = (detect_alt1_mask_hi & (~(fvals_bits | ((fvals_bits | detect_alt1_mask_hi) - detect_hom_mask_lo)))) >> (allele_code_width - 1);
+              // unnecessary to apply bzhi here
+              ++fvals_widx;
+              rare10_lowbits = 0;
+            }
+            const uint32_t sample_uidx_lowbits = ctzw(cur_raw_genoarr_xys) / 2;
+            if (sample_include_hw[sample_hwidx] & (1U << sample_uidx_lowbits)) {
+              ++subsetted_rare10_ct;
+              het_1x_ct += (fvals_bits >> rare10_lowbits) & 1;
+            }
+            rare10_lowbits += code10_width;
+          }
+          cur_raw_genoarr_xys &= cur_raw_genoarr_xys - 1;
+          fset_bits = fset_bits >> 1;
+        }
+      }
+      if (allele_ct == 3) {
+        if (allele_idx_m1) {
+          *hom_ctp = subsetted_rare10_ct - het_1x_ct;
+          *het_ctp += het_1x_ct;
+          return kPglRetSuccess;
+        }
+      }
+      *hom_ctp = subsetted_10_ct - subsetted_rare10_ct;
+      *het_ctp += het_1x_ct;
+      return kPglRetSuccess;
+    }
+    // allele_idx > 1, allele_ct > 3
+    const uintptr_t detect_all_mask_lo = detect_hom_mask_lo | (detect_hom_mask_lo << allele_code_width);
+    const uintptr_t detect_all_mask_hi = detect_all_mask_lo << (allele_code_width - 1);
+    const uintptr_t xor_word = allele_idx_m1 * detect_all_mask_lo;
+    uint32_t matching_allele_ct = 0;  // 2x hom + 1x het
+    uint32_t matching_het_or_hom_ct = 0;
+    for (uint32_t fset_widx = 0; ; ++fset_widx) {
+      uintptr_t fset_bits;
+      if (fset_widx >= fset_word_ct_m1) {
+        if (fset_widx > fset_word_ct_m1) {
+          break;
+        }
+        fset_bits = SubwordLoad(&(patch_10_fset[fset_word_ct_m1 * kBytesPerWord]), ModNz(fset_byte_ct, kBytesPerWord));
+        loop_len = ModNz(raw_10_ct, kBitsPerWord);
+      } else {
+        CopyFromUnalignedOffsetW(&fset_bits, patch_10_fset, fset_widx);
+      }
+      for (uint32_t uii = 0; uii != loop_len; ++uii) {
+        while (!cur_raw_genoarr_xys) {
+          cur_raw_genoarr_xys = Word10(raw_genoarr[++sample_hwidx]);
+        }
+        if (fset_bits & 1) {
+          if (rare10_lowbits == kBitsPerWord) {
+            if (fvals_widx == fvals_word_ct_m1) {
+              fvals_bits = SubwordLoad(&(patch_10_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+            } else {
+              CopyFromUnalignedOffsetW(&fvals_bits, patch_10_fvals, fvals_widx);
+            }
+            fvals_bits ^= xor_word;
+            fvals_bits = (detect_all_mask_hi & (~(fvals_bits | ((fvals_bits | detect_all_mask_hi) - detect_all_mask_lo)))) >> (allele_code_width - 1);
+            // unnecessary to apply bzhi or detect_hom_mask_lo here
+            fvals_bits = fvals_bits + (fvals_bits >> allele_code_width);
+            ++fvals_widx;
+            rare10_lowbits = 0;
+          }
+          const uintptr_t cur_hit_ct = (fvals_bits >> rare10_lowbits) & 3;
+          rare10_lowbits += code10_width;
+          if (cur_hit_ct) {
+            const uint32_t sample_uidx_lowbits = ctzw(cur_raw_genoarr_xys) / 2;
+            if (sample_include_hw[sample_hwidx] & (1U << sample_uidx_lowbits)) {
+              ++matching_het_or_hom_ct;
+              matching_allele_ct += cur_hit_ct;
+            }
+          }
+        }
+        cur_raw_genoarr_xys &= cur_raw_genoarr_xys - 1;
+        fset_bits = fset_bits >> 1;
+      }
+    }
+    const uint32_t matching_hom_ct = matching_allele_ct - matching_het_or_hom_ct;
+    *hom_ctp = matching_hom_ct;
+    *het_ctp += matching_het_or_hom_ct - matching_hom_ct;
+    return kPglRetSuccess;
+  }
+  // mode 1: difflist.
+  if (!sample_include) {
+    const unsigned char* group_info_iter;
+    uint32_t rare10_ct;
+    PglErr reterr = ParseDifflistHeader(fread_end, raw_sample_ct, fread_pp, nullptr, &group_info_iter, &rare10_ct);
+    // rare10_ct == 0 should be impossible
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+    reterr = SkipDeltalistIds(fread_end, group_info_iter, rare10_ct, raw_sample_ct, 0, fread_pp);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+    const unsigned char* patch_10_fvals = *fread_pp;
+    const uint32_t fvals_byte_ct = DivUpU64(S_CAST(uint64_t, rare10_ct) << code10_logwidth, CHAR_BIT);
+    if (PtrAddCk(fread_end, fvals_byte_ct, fread_pp)) {
+      return kPglRetMalformedInput;
+    }
+    CountAux1bDense(patch_10_fvals, allele_ct, allele_idx_m1, raw_10_ct, rare10_ct, het_ctp, hom_ctp);
+    return kPglRetSuccess;
+  }
+  // Save deltalist elements, iterate.
+  uint32_t rare10_ct;
+  PglErr reterr = ParseAndSaveDeltalist(fread_end, raw_sample_ct, fread_pp, deltalist_workspace, &rare10_ct);
+  if (unlikely(reterr)) {
+    return reterr;
+  }
+  const unsigned char* patch_10_fvals = *fread_pp;
+  const uint32_t fvals_byte_ct = DivUpU64(S_CAST(uint64_t, rare10_ct) << code10_logwidth, CHAR_BIT);
+  if (PtrAddCk(fread_end, fvals_byte_ct, fread_pp)) {
+    return kPglRetMalformedInput;
+  }
+  const uint32_t fvals_word_ct_m1 = (fvals_byte_ct - 1) / kBytesPerWord;
+  if ((!allele_idx_m1) || (allele_ct == 3)) {
+    const uintptr_t detect_alt1_mask_hi = detect_hom_mask_lo << (allele_code_width - 1);
+    uint32_t subsetted_rare10_ct = 0;
+    uint32_t het_1x_ct = 0;
+    uint32_t loop_len = kBitsPerWord >> code10_logwidth;
+    for (uint32_t fvals_widx = 0; ; ++fvals_widx) {
+      uintptr_t fvals_bits;
+      if (fvals_widx >= fvals_word_ct_m1) {
+        if (fvals_widx > fvals_word_ct_m1) {
+          break;
+        }
+        fvals_bits = SubwordLoad(&(patch_10_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+        loop_len = 1 + ((rare10_ct - 1) & ((kBitsPerWord >> code10_logwidth) - 1));
+      } else {
+        CopyFromUnalignedOffsetW(&fvals_bits, patch_10_fvals, fvals_widx);
+      }
+      fvals_bits = (detect_alt1_mask_hi & (~(fvals_bits | ((fvals_bits | detect_alt1_mask_hi) - detect_hom_mask_lo)))) >> (allele_code_width - 1);
+      const uint32_t* cur_deltalist_base = &(deltalist_workspace[fvals_widx << (kBitsPerWordLog2 - code10_logwidth)]);
+      for (uint32_t uii = 0; uii != loop_len; ++uii) {
+        const uint32_t sample_uidx = cur_deltalist_base[uii];
+        if (IsSet(sample_include, sample_uidx)) {
+          ++subsetted_rare10_ct;
+          het_1x_ct += (fvals_bits >> (uii << code10_logwidth)) & 1;
+        }
+      }
+    }
+    if (allele_ct == 3) {
+      if (allele_idx_m1) {
+        *hom_ctp = subsetted_rare10_ct - het_1x_ct;
+        *het_ctp += het_1x_ct;
+        return kPglRetSuccess;
+      }
+    }
+    *hom_ctp = subsetted_10_ct - subsetted_rare10_ct;
+    *het_ctp += het_1x_ct;
+    return kPglRetSuccess;
+  }
+  // allele_idx > 1, allele_ct > 3
+  const uintptr_t detect_all_mask_lo = detect_hom_mask_lo | (detect_hom_mask_lo << allele_code_width);
+  const uintptr_t detect_all_mask_hi = detect_all_mask_lo << (allele_code_width - 1);
+  detect_hom_mask_lo = detect_hom_mask_lo * 3;
+  const uintptr_t xor_word = allele_idx_m1 * detect_all_mask_lo;
+  uint32_t matching_het_or_hom_ct = 0;
+  uint32_t matching_hom_ct = 0;
+  for (uint32_t fvals_widx = 0; ; ++fvals_widx) {
+    uintptr_t fvals_bits;
+    if (fvals_widx >= fvals_word_ct_m1) {
+      if (fvals_widx > fvals_word_ct_m1) {
+        break;
+      }
+      fvals_bits = SubwordLoad(&(patch_10_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+    } else {
+      CopyFromUnalignedOffsetW(&fvals_bits, patch_10_fvals, fvals_widx);
+    }
+    fvals_bits = fvals_bits ^ xor_word;
+    fvals_bits = detect_all_mask_hi & (~(fvals_bits | ((fvals_bits | detect_all_mask_hi) - detect_all_mask_lo)));
+    if (fvals_widx == fvals_word_ct_m1) {
+      fvals_bits = bzhi_max(fvals_bits, ModNz(rare10_ct << code10_logwidth, kBitsPerWord));
+    }
+    if (!fvals_bits) {
+      continue;
+    }
+    fvals_bits = fvals_bits >> (allele_code_width - 1);
+    fvals_bits = (fvals_bits + (fvals_bits >> allele_code_width)) & detect_hom_mask_lo;
+    const uint32_t* cur_deltalist_base = &(deltalist_workspace[fvals_widx << (kBitsPerWordLog2 - code10_logwidth)]);
+    do {
+      const uint32_t bit_idx = ctzw(fvals_bits);
+      const uint32_t sample_uidx = cur_deltalist_base[bit_idx >> code10_logwidth];
+      if (IsSet(sample_include, sample_uidx)) {
+        ++matching_het_or_hom_ct;
+        matching_hom_ct += bit_idx & 1;
+      }
+      fvals_bits &= fvals_bits - 1;
+    } while (fvals_bits);
+  }
+  *hom_ctp = matching_hom_ct;
+  *het_ctp += matching_het_or_hom_ct - matching_hom_ct;
+  return kPglRetSuccess;
+}
+
+PglErr PgrGetInv1Counts(const uintptr_t* __restrict sample_include, const uintptr_t* __restrict sample_include_interleaved_vec, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, uint32_t allele_idx, PgenReader* pgr_ptr, STD_ARRAY_REF(uint32_t, 4) genocounts) {
+  // May use workspace_vec and workspace_difflist_sample_ids.
+  if (!sample_ct) {
+    STD_ARRAY_REF_FILL0(4, genocounts);
+    return kPglRetSuccess;
+  }
+  PgenReaderMain* pgrp = GetPgrp(pgr_ptr);
+  const uint32_t* sample_include_cumulative_popcounts = GetSicp(pssi);
+  const uintptr_t* allele_idx_offsets = pgrp->fi.allele_idx_offsets;
+  PglErr reterr;
+  if ((!allele_idx) || (!allele_idx_offsets)) {
+  PgrGetInv1Counts_biallelic:
+    reterr = GetBasicGenotypeCounts(sample_include, sample_include_interleaved_vec, sample_include_cumulative_popcounts, sample_ct, vidx, pgrp, nullptr, genocounts);
+    if (allele_idx) {
+      const uint32_t homref_ct = genocounts[0];
+      genocounts[0] = genocounts[2];
+      genocounts[2] = homref_ct;
+    }
+    return reterr;
+  }
+  const uint32_t allele_ct = allele_idx_offsets[vidx + 1] - allele_idx_offsets[vidx];
+  if (allele_ct == 2) {
+    goto PgrGetInv1Counts_biallelic;
+  }
+  const uint32_t raw_sample_ct = pgrp->fi.raw_sample_ct;
+  const uint32_t subsetting_required = (sample_ct != raw_sample_ct);
+  uintptr_t* tmp_genovec = pgrp->workspace_vec;
+  const unsigned char* fread_ptr;
+  const unsigned char* fread_end;
+  reterr = ReadRawGenovec(subsetting_required, vidx, pgrp, &fread_ptr, &fread_end, tmp_genovec);
+  if (unlikely(reterr)) {
+    return reterr;
+  }
+  ZeroTrailingNyps(raw_sample_ct, tmp_genovec);
+  const uint32_t aux1_first_byte = *fread_ptr++;
+  const uint32_t aux1a_mode = aux1_first_byte & 15;
+  const uint32_t aux1b_mode = aux1_first_byte >> 4;
+  // raw_01_ct not needed when aux1a uses difflist form and subsetting is
+  // occurring; same applies to raw_10_ct.
+  uint32_t raw_01_ct = 0;
+  uint32_t raw_10_ct = 0;
+  if ((!subsetting_required) || (!aux1a_mode) || (!aux1b_mode)) {
+    GenoarrCountFreqsUnsafe(tmp_genovec, raw_sample_ct, genocounts);
+    raw_01_ct = genocounts[1];
+    raw_10_ct = genocounts[2];
+  }
+  uint32_t subsetted_01_ct = 0;
+  uint32_t subsetted_10_ct = 0;
+  if (subsetting_required) {
+    // need accurate subsetted missing count for allele_idx > 1 case
+    GenoarrCountSubsetFreqs(tmp_genovec, sample_include_interleaved_vec, raw_sample_ct, sample_ct, genocounts);
+    subsetted_01_ct = genocounts[1];
+    subsetted_10_ct = genocounts[2];
+  } else {
+    sample_include = nullptr;
+  }
+  uint32_t het_ct;
+  reterr = CountAux1a(fread_end, sample_include, tmp_genovec, aux1a_mode, raw_sample_ct, allele_ct, allele_idx, raw_01_ct, subsetted_01_ct, &fread_ptr, &het_ct, pgrp->workspace_difflist_sample_ids);
+  if (unlikely(reterr)) {
+    return reterr;
+  }
+  uint32_t hom_ct;
+  reterr = CountAux1b(fread_end, sample_include, tmp_genovec, aux1b_mode, raw_sample_ct, allele_ct, allele_idx, raw_10_ct, subsetted_10_ct, &fread_ptr, &het_ct, &hom_ct, pgrp->workspace_difflist_sample_ids);
+  genocounts[0] = hom_ct;
+  genocounts[1] = het_ct;
+  genocounts[2] = sample_ct - genocounts[3] - hom_ct - het_ct;
+  return reterr;
+}
+
+// sample_include assumed to be nullptr if no subsetting required
+PglErr GenoarrAux1aUpdate(const unsigned char* fread_end, const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, const uintptr_t* __restrict raw_genoarr, uint32_t aux1a_mode, uint32_t raw_sample_ct, uint32_t allele_ct, uint32_t allele_idx, uintptr_t lshifted_bit, uint32_t raw_01_ct, const unsigned char** fread_pp, uintptr_t* __restrict target_genoarr, uint32_t* __restrict deltalist_workspace) {
+  if (aux1a_mode == 15) {
+    return kPglRetSuccess;
+  }
+  const uint32_t ignore_01_fvals = (allele_idx == 1) || (allele_ct == 3);
+  uintptr_t detect_mask_hi;
+  uintptr_t detect_mask_lo;
+  uint32_t allele_code_logwidth;
+  const uint32_t allele_code_width = GetAux1aConsts(allele_ct, &detect_mask_hi, &detect_mask_lo, &allele_code_logwidth);
+  const uintptr_t xor_word = (allele_idx - 2) * detect_mask_lo;
+  if (!aux1a_mode) {
+    const unsigned char* patch_01_fset = *fread_pp;
+    const uint32_t fset_byte_ct = DivUp(raw_01_ct, 8);
+    uint32_t rare01_ct = 0;
+    if (allele_ct > 3) {
+      rare01_ct = PopcountBytes(*fread_pp, fset_byte_ct);
+    }
+    *fread_pp += fset_byte_ct;
+    const unsigned char* patch_01_fvals = *fread_pp;
+    uintptr_t sample_hwidx = 0;
+    uintptr_t cur_raw_genoarr_hets = Word01(raw_genoarr[0]);
+    uint32_t loop_len = kBitsPerWord;
+    const uintptr_t fvals_byte_ct = DivUpU64(S_CAST(uint64_t, rare01_ct) * allele_code_width, 8);
+    if (PtrAddCk(fread_end, fvals_byte_ct, fread_pp)) {
+      return kPglRetMalformedInput;
+    }
+    const uint32_t fset_word_ct_m1 = (fset_byte_ct - 1) / kBytesPerWord;
+    const uint32_t fvals_word_ct_m1 = (fvals_byte_ct - 1) / kBytesPerWord;
+    const uint32_t lshift = lshifted_bit - 1;
+    uintptr_t fvals_bits = 0;
+    uint32_t fvals_widx = 0;
+    uint32_t rare01_lowbits = kBitsPerWord;
+    for (uint32_t fset_widx = 0; ; ++fset_widx) {
+      uintptr_t fset_bits;
+      if (fset_widx >= fset_word_ct_m1) {
+        if (fset_widx > fset_word_ct_m1) {
+          return kPglRetSuccess;
+        }
+        fset_bits = SubwordLoad(&(patch_01_fset[fset_word_ct_m1 * kBytesPerWord]), ModNz(fset_byte_ct, kBytesPerWord));
+        loop_len = ModNz(raw_01_ct, kBitsPerWord);
+      } else {
+        CopyFromUnalignedOffsetW(&fset_bits, patch_01_fset, fset_widx);
+      }
+      if (!sample_include) {
+        if (ignore_01_fvals) {
+          for (uint32_t uii = 0; uii != loop_len; ++uii) {
+            while (!cur_raw_genoarr_hets) {
+              cur_raw_genoarr_hets = Word01(raw_genoarr[++sample_hwidx]);
+            }
+            if (fset_bits & 1) {
+              // ref/altx present for x>1.  Change genovec entry from 01 to 11
+              // (or 11 -> 01 in allele_idx == 2, allele_ct == 3 case; same xor
+              // operation works for that)
+              const uintptr_t lowbit = cur_raw_genoarr_hets & (-cur_raw_genoarr_hets);
+              target_genoarr[sample_hwidx] ^= lowbit << lshift;
+            }
+            cur_raw_genoarr_hets &= cur_raw_genoarr_hets - 1;
+            fset_bits = fset_bits >> 1;
+          }
+        } else {
+          for (uint32_t uii = 0; uii != loop_len; ++uii) {
+            while (!cur_raw_genoarr_hets) {
+              cur_raw_genoarr_hets = Word01(raw_genoarr[++sample_hwidx]);
+            }
+            if (fset_bits & 1) {
+              if (rare01_lowbits == kBitsPerWord) {
+                if (fvals_widx == fvals_word_ct_m1) {
+                  fvals_bits = SubwordLoad(&(patch_01_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+                } else {
+                  CopyFromUnalignedOffsetW(&fvals_bits, patch_01_fvals, fvals_widx);
+                }
+                fvals_bits = fvals_bits ^ xor_word;
+                fvals_bits = (detect_mask_hi & (~(fvals_bits | ((fvals_bits | detect_mask_hi) - detect_mask_lo)))) >> (allele_code_width - 1);
+                // unnecessary to apply bzhi here
+                ++fvals_widx;
+                rare01_lowbits = 0;
+              }
+              if (fvals_bits & (k1LU << rare01_lowbits)) {
+                const uintptr_t lowbit = cur_raw_genoarr_hets & (-cur_raw_genoarr_hets);
+                target_genoarr[sample_hwidx] ^= lowbit << lshift;
+              }
+              rare01_lowbits += allele_code_width;
+            }
+            cur_raw_genoarr_hets &= cur_raw_genoarr_hets - 1;
+            fset_bits = fset_bits >> 1;
+          }
+        }
+      } else {
+        // format 0, sample_include non-null
+        if (ignore_01_fvals) {
+          for (uint32_t uii = 0; uii != loop_len; ++uii) {
+            while (!cur_raw_genoarr_hets) {
+              cur_raw_genoarr_hets = Word01(raw_genoarr[++sample_hwidx]);
+            }
+            if (fset_bits & 1) {
+              // Considered replacing cur_raw_genoarr_hets with the result of
+              // two PackWordToHalfword() operations, since that keeps all
+              // the sample word-indexes aligned.  Couldn't justify it given
+              // the expected sparsity of this case, though.
+              const uint32_t sample_uidx_lowbits = ctzw(cur_raw_genoarr_hets) / 2;
+              if ((DowncastKWToHW(sample_include)[sample_hwidx]) & (1U << sample_uidx_lowbits)) {
+                const uint32_t sample_idx = RawToSubsettedPos(sample_include, sample_include_cumulative_popcounts, sample_hwidx * kBitsPerWordD2 + sample_uidx_lowbits);
+                target_genoarr[sample_idx / kBitsPerWordD2] ^= lshifted_bit << (2 * (sample_idx % kBitsPerWordD2));
+              }
+            }
+            cur_raw_genoarr_hets &= cur_raw_genoarr_hets - 1;
+            fset_bits = fset_bits >> 1;
+          }
+        } else {
+          for (uint32_t uii = 0; uii != loop_len; ++uii) {
+            while (!cur_raw_genoarr_hets) {
+              cur_raw_genoarr_hets = Word01(raw_genoarr[++sample_hwidx]);
+            }
+            if (fset_bits & 1) {
+              if (rare01_lowbits == kBitsPerWord) {
+                if (fvals_widx == fvals_word_ct_m1) {
+                  fvals_bits = SubwordLoad(&(patch_01_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+                } else {
+                  CopyFromUnalignedOffsetW(&fvals_bits, patch_01_fvals, fvals_widx);
+                }
+                fvals_bits = fvals_bits ^ xor_word;
+                fvals_bits = (detect_mask_hi & (~(fvals_bits | ((fvals_bits | detect_mask_hi) - detect_mask_lo)))) >> (allele_code_width - 1);
+                // unnecessary to apply bzhi here
+                ++fvals_widx;
+                rare01_lowbits = 0;
+              }
+              if (fvals_bits & (k1LU << rare01_lowbits)) {
+                const uint32_t sample_uidx_lowbits = ctzw(cur_raw_genoarr_hets) / 2;
+                if ((DowncastKWToHW(sample_include)[sample_hwidx]) & (1U << sample_uidx_lowbits)) {
+                  const uint32_t sample_idx = RawToSubsettedPos(sample_include, sample_include_cumulative_popcounts, sample_hwidx * kBitsPerWordD2 + sample_uidx_lowbits);
+                  target_genoarr[sample_idx / kBitsPerWordD2] ^= lshifted_bit << (2 * (sample_idx % kBitsPerWordD2));
+                }
+              }
+              rare01_lowbits += allele_code_width;
+            }
+            cur_raw_genoarr_hets &= cur_raw_genoarr_hets - 1;
+            fset_bits = fset_bits >> 1;
+          }
+        }
+      }
+    }
+  }
+  // aux1a_mode == 1
+  uint32_t rare01_ct;
+  // Might hardcode the ParseAndSaveDeltalist logic later, but lets get
+  // this working first.
+  PglErr reterr = ParseAndSaveDeltalist(fread_end, raw_sample_ct, fread_pp, deltalist_workspace, &rare01_ct);
+  if (unlikely(reterr)) {
+    return reterr;
+  }
+  const unsigned char* patch_01_fvals = *fread_pp;
+  const uintptr_t fvals_byte_ct = DivUpU64(S_CAST(uint64_t, rare01_ct) * allele_code_width, 8);
+  if (PtrAddCk(fread_end, fvals_byte_ct, fread_pp)) {
+    return kPglRetMalformedInput;
+  }
+  if (ignore_01_fvals) {
+    if (!sample_include) {
+      for (uint32_t rare01_idx = 0; rare01_idx != rare01_ct; ++rare01_idx) {
+        const uint32_t sample_uidx = deltalist_workspace[rare01_idx];
+        // todo: benchmark against k1LU << (lshift + ...)
+        target_genoarr[sample_uidx / kBitsPerWordD2] ^= lshifted_bit << (2 * (sample_uidx % kBitsPerWordD2));
+      }
+      return kPglRetSuccess;
+    }
+    for (uint32_t rare01_idx = 0; rare01_idx != rare01_ct; ++rare01_idx) {
+      const uint32_t sample_uidx = deltalist_workspace[rare01_idx];
+      // could wrap this boilerplate
+      const uint32_t sample_widx = sample_uidx / kBitsPerWord;
+      const uintptr_t lowbit = k1LU << (sample_uidx % kBitsPerWord);
+      const uintptr_t sample_include_word = sample_include[sample_widx];
+      if (sample_include_word & lowbit) {
+        const uint32_t sample_idx = sample_include_cumulative_popcounts[sample_widx] + PopcountWord(sample_include_word & (lowbit - 1));
+        target_genoarr[sample_idx / kBitsPerWordD2] ^= lshifted_bit << (2 * (sample_idx % kBitsPerWordD2));
+      }
+    }
+    return kPglRetSuccess;
+  }
+  const uint32_t fvals_word_ct_m1 = (fvals_byte_ct - 1) / kBytesPerWord;
+  for (uint32_t fvals_widx = 0; ; ++fvals_widx) {
+    uintptr_t fvals_bits;
+    if (fvals_widx >= fvals_word_ct_m1) {
+      if (fvals_widx > fvals_word_ct_m1) {
+        return kPglRetSuccess;
+      }
+      fvals_bits = SubwordLoad(&(patch_01_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+    } else {
+      CopyFromUnalignedOffsetW(&fvals_bits, patch_01_fvals, fvals_widx);
+    }
+    fvals_bits = fvals_bits ^ xor_word;
+    fvals_bits = detect_mask_hi & (~(fvals_bits | ((fvals_bits | detect_mask_hi) - detect_mask_lo)));
+    if (fvals_widx == fvals_word_ct_m1) {
+      fvals_bits = bzhi_max(fvals_bits, ModNz(rare01_ct << allele_code_logwidth, kBitsPerWord));
+    }
+    if (!fvals_bits) {
+      continue;
+    }
+    const uint32_t* cur_deltalist_base = &(deltalist_workspace[fvals_widx << (kBitsPerWordLog2 - allele_code_logwidth)]);
+    if (!sample_include) {
+      do {
+        const uint32_t rare01_idx_lowbits = ctzw(fvals_bits) >> allele_code_logwidth;
+        const uint32_t sample_uidx = cur_deltalist_base[rare01_idx_lowbits];
+        target_genoarr[sample_uidx / kBitsPerWordD2] ^= lshifted_bit << (2 * (sample_uidx % kBitsPerWordD2));
+        fvals_bits &= fvals_bits - 1;
+      } while (fvals_bits);
+    } else {
+      do {
+        const uint32_t rare01_idx_lowbits = ctzw(fvals_bits) >> allele_code_logwidth;
+        const uint32_t sample_uidx = cur_deltalist_base[rare01_idx_lowbits];
+        const uint32_t sample_widx = sample_uidx / kBitsPerWord;
+        const uintptr_t lowbit = k1LU << (sample_uidx % kBitsPerWord);
+        const uintptr_t sample_include_word = sample_include[sample_widx];
+        if (sample_include_word & lowbit) {
+          const uint32_t sample_idx = sample_include_cumulative_popcounts[sample_widx] + PopcountWord(sample_include_word & (lowbit - 1));
+          target_genoarr[sample_idx / kBitsPerWordD2] ^= lshifted_bit << (2 * (sample_idx % kBitsPerWordD2));
+        }
+        fvals_bits &= fvals_bits - 1;
+      } while (fvals_bits);
+    }
+  }
+}
+
+// sample_include assumed to be nullptr if no subsetting required
+PglErr GenoarrAux1bStandardUpdate(const unsigned char* fread_end, const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, const uintptr_t* __restrict raw_genoarr, uint32_t aux1b_mode, uint32_t raw_sample_ct, uint32_t allele_ct, uint32_t allele_idx, uint32_t raw_10_ct, const unsigned char** fread_pp, uintptr_t* __restrict target_genoarr, uint32_t* __restrict deltalist_workspace) {
+  if (aux1b_mode == 15) {
+    return kPglRetSuccess;
+  }
+  const uint32_t allele_idx_m1 = allele_idx - 1;
+  uintptr_t detect_hom_mask_lo;
+  const uint32_t allele_code_logwidth = GetAux1bConsts(allele_ct, &detect_hom_mask_lo);
+  const uint32_t allele_code_width = 1U << allele_code_logwidth;
+  const uint32_t code10_logwidth = allele_code_logwidth + (allele_code_logwidth != 0);
+  const uint32_t code10_width = 1U << code10_logwidth;
+  uint32_t rare10_lowbits = kBitsPerWord;
+  if (!aux1b_mode) {
+    const unsigned char* patch_10_fset = *fread_pp;
+    const uint32_t fset_byte_ct = DivUp(raw_10_ct, 8);
+    const uint32_t fset_word_ct_m1 = (fset_byte_ct - 1) / kBytesPerWord;
+    const uint32_t rare10_ct = PopcountBytes(*fread_pp, fset_byte_ct);
+    *fread_pp += fset_byte_ct;
+    uintptr_t sample_hwidx = 0;
+    uintptr_t cur_raw_genoarr_xys = Word10(raw_genoarr[0]);
+    const unsigned char* patch_10_fvals = *fread_pp;
+    const uint32_t fvals_byte_ct = DivUpU64(S_CAST(uint64_t, rare10_ct) * code10_width, CHAR_BIT);
+    if (PtrAddCk(fread_end, fvals_byte_ct, fread_pp)) {
+      return kPglRetMalformedInput;
+    }
+    const uint32_t fvals_word_ct_m1 = (fvals_byte_ct - 1) / kBytesPerWord;
+    uintptr_t fvals_bits = 0;
+    uint32_t fvals_widx = 0;
+    uint32_t loop_len = kBitsPerWord;
+    if ((!allele_idx_m1) || (allele_ct == 3)) {
+      // bugfix (29 Dec 2019)
+      const uintptr_t detect_alt1_mask_hi = detect_hom_mask_lo << (allele_code_width - 1);
+      // If allele_ct == 3:
+      //   code10_width = 1
+      //   0 -> 1/2, 1 -> 2/2
+      //   if allele_idx == 1:
+      //     we want to convert 2 -> 1 for 1/2 genotypes, and 2 -> 0 for 2/2.
+      //   if allele_idx == 2:
+      //     we want to convert 0 -> 1 for 1/2 genotypes, and 0 -> 2 for 2/2.
+      // If allele_ct == 4 (allele_idx == 1 forced):
+      //   allele_code_width = 2
+      //   code10_width = 4
+      //   we want to convert 2 -> 1 for 1/x genotypes, and 2 -> 0 otherwise.
+      const uint32_t lowcode_add = 2 - allele_idx_m1;
+      for (uint32_t fset_widx = 0; ; ++fset_widx) {
+        uintptr_t fset_bits;
+        if (fset_widx >= fset_word_ct_m1) {
+          if (fset_widx > fset_word_ct_m1) {
+            break;
+          }
+          fset_bits = SubwordLoad(&(patch_10_fset[fset_word_ct_m1 * kBytesPerWord]), ModNz(fset_byte_ct, kBytesPerWord));
+          loop_len = ModNz(raw_10_ct, kBitsPerWord);
+        } else {
+          CopyFromUnalignedOffsetW(&fset_bits, patch_10_fset, fset_widx);
+        }
+        if (!sample_include) {
+          for (uint32_t uii = 0; uii != loop_len; ++uii) {
+            while (!cur_raw_genoarr_xys) {
+              cur_raw_genoarr_xys = Word10(raw_genoarr[++sample_hwidx]);
+            }
+            if (fset_bits & 1) {
+              if (rare10_lowbits == kBitsPerWord) {
+                if (fvals_widx == fvals_word_ct_m1) {
+                  fvals_bits = SubwordLoad(&(patch_10_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+                } else {
+                  CopyFromUnalignedOffsetW(&fvals_bits, patch_10_fvals, fvals_widx);
+                }
+                // modify to het 1/x = 1, otherwise 0, except in allele_idx ==
+                // 2 special case.
+                if (!allele_idx_m1) {
+                  fvals_bits = (detect_alt1_mask_hi & (~(fvals_bits | ((fvals_bits | detect_alt1_mask_hi) - detect_hom_mask_lo)))) >> (allele_code_width - 1);
+                }
+                // unnecessary to apply bzhi here
+                ++fvals_widx;
+                rare10_lowbits = 0;
+              }
+              const uint32_t cur_lowcode0 = (fvals_bits >> rare10_lowbits) & 1;
+              rare10_lowbits += code10_width;
+              const uintptr_t lowbit = cur_raw_genoarr_xys & (-cur_raw_genoarr_xys);
+              target_genoarr[sample_hwidx] ^= lowbit * (lowcode_add + cur_lowcode0);
+            }
+            cur_raw_genoarr_xys &= cur_raw_genoarr_xys - 1;
+            fset_bits = fset_bits >> 1;
+          }
+        } else {
+          // sample_include non-null
+          for (uint32_t uii = 0; uii != loop_len; ++uii) {
+            while (!cur_raw_genoarr_xys) {
+              cur_raw_genoarr_xys = Word10(raw_genoarr[++sample_hwidx]);
+            }
+            if (fset_bits & 1) {
+              if (rare10_lowbits == kBitsPerWord) {
+                if (fvals_widx == fvals_word_ct_m1) {
+                  fvals_bits = SubwordLoad(&(patch_10_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+                } else {
+                  CopyFromUnalignedOffsetW(&fvals_bits, patch_10_fvals, fvals_widx);
+                }
+                // modify to het 1/x = 1, otherwise 0, except in allele_idx ==
+                // 2 special case
+                if (!allele_idx_m1) {
+                  fvals_bits = (detect_alt1_mask_hi & (~(fvals_bits | ((fvals_bits | detect_alt1_mask_hi) - detect_hom_mask_lo)))) >> (allele_code_width - 1);
+                }
+                // unnecessary to apply bzhi here
+                ++fvals_widx;
+                rare10_lowbits = 0;
+              }
+              const uint32_t sample_uidx_lowbits = ctzw(cur_raw_genoarr_xys) / 2;
+              if ((DowncastKWToHW(sample_include)[sample_hwidx]) & (1U << sample_uidx_lowbits)) {
+                const uint32_t sample_idx = RawToSubsettedPos(sample_include, sample_include_cumulative_popcounts, sample_hwidx * kBitsPerWordD2 + sample_uidx_lowbits);
+                const uintptr_t cur_lowcode0 = (fvals_bits >> rare10_lowbits) & 1;
+                const uintptr_t shifted_xor_mult = (lowcode_add + cur_lowcode0) << (2 * (sample_idx % kBitsPerWordD2));
+                target_genoarr[sample_idx / kBitsPerWordD2] ^= shifted_xor_mult;
+              }
+              rare10_lowbits += code10_width;
+            }
+            cur_raw_genoarr_xys &= cur_raw_genoarr_xys - 1;
+            fset_bits = fset_bits >> 1;
+          }
+        }
+      }
+      return kPglRetSuccess;
+    }
+    // allele_idx > 1, allele_ct > 3
+    const uintptr_t detect_all_mask_lo = detect_hom_mask_lo | (detect_hom_mask_lo << allele_code_width);
+    const uintptr_t detect_all_mask_hi = detect_all_mask_lo << (allele_code_width - 1);
+    const uintptr_t xor_word = allele_idx_m1 * detect_all_mask_lo;
+    for (uint32_t fset_widx = 0; ; ++fset_widx) {
+      uintptr_t fset_bits;
+      if (fset_widx >= fset_word_ct_m1) {
+        if (fset_widx > fset_word_ct_m1) {
+          break;
+        }
+        fset_bits = SubwordLoad(&(patch_10_fset[fset_word_ct_m1 * kBytesPerWord]), ModNz(fset_byte_ct, kBytesPerWord));
+        loop_len = ModNz(raw_10_ct, kBitsPerWord);
+      } else {
+        CopyFromUnalignedOffsetW(&fset_bits, patch_10_fset, fset_widx);
+      }
+      if (!sample_include) {
+        for (uint32_t uii = 0; uii != loop_len; ++uii) {
+          while (!cur_raw_genoarr_xys) {
+            cur_raw_genoarr_xys = Word10(raw_genoarr[++sample_hwidx]);
+          }
+          if (fset_bits & 1) {
+            if (rare10_lowbits == kBitsPerWord) {
+              if (fvals_widx == fvals_word_ct_m1) {
+                fvals_bits = SubwordLoad(&(patch_10_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+              } else {
+                CopyFromUnalignedOffsetW(&fvals_bits, patch_10_fvals, fvals_widx);
+              }
+              // modify to hom = 2, het = 1, neither = 0
+              fvals_bits = fvals_bits ^ xor_word;
+              fvals_bits = (detect_all_mask_hi & (~(fvals_bits | ((fvals_bits | detect_all_mask_hi) - detect_all_mask_lo)))) >> (allele_code_width - 1);
+              // unnecessary to apply bzhi or detect_hom_mask_lo here
+              fvals_bits = fvals_bits + (fvals_bits >> allele_code_width);
+              ++fvals_widx;
+              rare10_lowbits = 0;
+            }
+            const uintptr_t cur_hit_ct = (fvals_bits >> rare10_lowbits) & 3;
+            rare10_lowbits += code10_width;
+            if (cur_hit_ct) {
+              const uintptr_t lowbit = cur_raw_genoarr_xys & (-cur_raw_genoarr_xys);
+              target_genoarr[sample_hwidx] ^= lowbit * cur_hit_ct;
+            }
+          }
+          cur_raw_genoarr_xys &= cur_raw_genoarr_xys - 1;
+          fset_bits = fset_bits >> 1;
+        }
+      } else {
+        for (uint32_t uii = 0; uii != loop_len; ++uii) {
+          while (!cur_raw_genoarr_xys) {
+            cur_raw_genoarr_xys = Word10(raw_genoarr[++sample_hwidx]);
+          }
+          if (fset_bits & 1) {
+            if (rare10_lowbits == kBitsPerWord) {
+              if (fvals_widx == fvals_word_ct_m1) {
+                fvals_bits = SubwordLoad(&(patch_10_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+              } else {
+                CopyFromUnalignedOffsetW(&fvals_bits, patch_10_fvals, fvals_widx);
+              }
+              // modify to hom = 2, het = 1, neither = 0
+              fvals_bits = fvals_bits ^ xor_word;
+              fvals_bits = (detect_all_mask_hi & (~(fvals_bits | ((fvals_bits | detect_all_mask_hi) - detect_all_mask_lo)))) >> (allele_code_width - 1);
+              if (fvals_widx == fvals_word_ct_m1) {
+                fvals_bits = bzhi_max(fvals_bits, ModNz(rare10_ct * code10_width, kBitsPerWord));
+              }
+              fvals_bits = fvals_bits + (fvals_bits >> allele_code_width);
+              ++fvals_widx;
+              rare10_lowbits = 0;
+            }
+            const uintptr_t cur_hit_ct = (fvals_bits >> rare10_lowbits) & 3;
+            rare10_lowbits += code10_width;
+            if (cur_hit_ct) {
+              const uint32_t sample_uidx_lowbits = ctzw(cur_raw_genoarr_xys) / 2;
+              if ((DowncastKWToHW(sample_include)[sample_hwidx]) & (1U << sample_uidx_lowbits)) {
+                const uint32_t sample_idx = RawToSubsettedPos(sample_include, sample_include_cumulative_popcounts, sample_hwidx * kBitsPerWordD2 + sample_uidx_lowbits);
+                target_genoarr[sample_idx / kBitsPerWordD2] ^= cur_hit_ct << (2 * (sample_idx % kBitsPerWordD2));
+              }
+            }
+          }
+          cur_raw_genoarr_xys &= cur_raw_genoarr_xys - 1;
+          fset_bits = fset_bits >> 1;
+        }
+      }
+    }
+    return kPglRetSuccess;
+  }
+  // aux1b_mode == 1
+  uint32_t rare10_ct;
+  PglErr reterr = ParseAndSaveDeltalist(fread_end, raw_sample_ct, fread_pp, deltalist_workspace, &rare10_ct);
+  if (unlikely(reterr)) {
+    return reterr;
+  }
+  const unsigned char* patch_10_fvals = *fread_pp;
+  const uint32_t fvals_byte_ct = DivUpU64(S_CAST(uint64_t, rare10_ct) << code10_logwidth, CHAR_BIT);
+  if (PtrAddCk(fread_end, fvals_byte_ct, fread_pp)) {
+    return kPglRetMalformedInput;
+  }
+  const uint32_t fvals_word_ct_m1 = (fvals_byte_ct - 1) / kBytesPerWord;
+  if ((!allele_idx_m1) || (allele_ct == 3)) {
+    // bugfix (29 Dec 2019)
+    const uintptr_t detect_alt1_mask_hi = detect_hom_mask_lo << (allele_code_width - 1);
+    const uintptr_t lowcode_add = 2 - allele_idx_m1;
+    uint32_t loop_len = kBitsPerWord >> code10_logwidth;
+    for (uint32_t fvals_widx = 0; ; ++fvals_widx) {
+      uintptr_t fvals_bits;
+      if (fvals_widx >= fvals_word_ct_m1) {
+        if (fvals_widx > fvals_word_ct_m1) {
+          break;
+        }
+        fvals_bits = SubwordLoad(&(patch_10_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+        loop_len = 1 + ((rare10_ct - 1) & ((kBitsPerWord >> code10_logwidth) - 1));
+      } else {
+        CopyFromUnalignedOffsetW(&fvals_bits, patch_10_fvals, fvals_widx);
+      }
+      if (!allele_idx_m1) {
+        fvals_bits = (detect_alt1_mask_hi & (~(fvals_bits | ((fvals_bits | detect_alt1_mask_hi) - detect_hom_mask_lo)))) >> (allele_code_width - 1);
+      }
+      const uint32_t* cur_deltalist_base = &(deltalist_workspace[fvals_widx << (kBitsPerWordLog2 - code10_logwidth)]);
+      if (!sample_include) {
+        for (uint32_t uii = 0; uii != loop_len; ++uii) {
+          const uint32_t sample_uidx = cur_deltalist_base[uii];
+          const uintptr_t cur_lowcode0 = fvals_bits & 1;
+          const uintptr_t shifted_xor_mult = (lowcode_add + cur_lowcode0) << (2 * (sample_uidx % kBitsPerWordD2));
+          target_genoarr[sample_uidx / kBitsPerWordD2] ^= shifted_xor_mult;
+          fvals_bits = fvals_bits >> code10_width;
+        }
+      } else {
+        for (uint32_t uii = 0; uii != loop_len; ++uii) {
+          const uint32_t sample_uidx = cur_deltalist_base[uii];
+          const uint32_t sample_widx = sample_uidx / kBitsPerWord;
+          const uintptr_t lowbit = k1LU << (sample_uidx % kBitsPerWord);
+          const uintptr_t sample_include_word = sample_include[sample_widx];
+          if (sample_include_word & lowbit) {
+            const uint32_t sample_idx = sample_include_cumulative_popcounts[sample_widx] + PopcountWord(sample_include_word & (lowbit - 1));
+            const uintptr_t cur_lowcode0 = fvals_bits & 1;
+            const uintptr_t shifted_xor_mult = (lowcode_add + cur_lowcode0) << (2 * (sample_idx % kBitsPerWordD2));
+            target_genoarr[sample_idx / kBitsPerWordD2] ^= shifted_xor_mult;
+          }
+          fvals_bits = fvals_bits >> code10_width;
+        }
+      }
+    }
+    return kPglRetSuccess;
+  }
+  // allele_idx > 1, allele_ct > 3
+  const uintptr_t detect_all_mask_lo = detect_hom_mask_lo | (detect_hom_mask_lo << allele_code_width);
+  const uintptr_t detect_all_mask_hi = detect_all_mask_lo << (allele_code_width - 1);
+  detect_hom_mask_lo = detect_hom_mask_lo * 3;
+  const uintptr_t xor_word = allele_idx_m1 * detect_all_mask_lo;
+  for (uint32_t fvals_widx = 0; ; ++fvals_widx) {
+    uintptr_t fvals_bits;
+    if (fvals_widx >= fvals_word_ct_m1) {
+      if (fvals_widx > fvals_word_ct_m1) {
+        break;
+      }
+      fvals_bits = SubwordLoad(&(patch_10_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+    } else {
+      CopyFromUnalignedOffsetW(&fvals_bits, patch_10_fvals, fvals_widx);
+    }
+    fvals_bits = fvals_bits ^ xor_word;
+    fvals_bits = detect_all_mask_hi & (~(fvals_bits | ((fvals_bits | detect_all_mask_hi) - detect_all_mask_lo)));
+    if (fvals_widx == fvals_word_ct_m1) {
+      fvals_bits = bzhi_max(fvals_bits, ModNz(rare10_ct << code10_logwidth, kBitsPerWord));
+    }
+    if (!fvals_bits) {
+      continue;
+    }
+    fvals_bits = fvals_bits >> (allele_code_width - 1);
+    fvals_bits = (fvals_bits + (fvals_bits >> allele_code_width)) & detect_hom_mask_lo;
+    const uint32_t* cur_deltalist_base = &(deltalist_workspace[fvals_widx << (kBitsPerWordLog2 - code10_logwidth)]);
+    if (!sample_include) {
+      do {
+        const uint32_t bit_idx = ctzw(fvals_bits);
+        const uint32_t sample_uidx = cur_deltalist_base[bit_idx >> code10_logwidth];
+        target_genoarr[sample_uidx / kBitsPerWordD2] ^= k1LU << ((bit_idx % 2) + 2 * (sample_uidx % kBitsPerWordD2));
+        fvals_bits &= fvals_bits - 1;
+      } while (fvals_bits);
+    } else {
+      do {
+        const uint32_t bit_idx = ctzw(fvals_bits);
+        const uint32_t sample_uidx = cur_deltalist_base[bit_idx >> code10_logwidth];
+        const uint32_t sample_widx = sample_uidx / kBitsPerWord;
+        const uintptr_t lowbit = k1LU << (sample_uidx % kBitsPerWord);
+        const uintptr_t sample_include_word = sample_include[sample_widx];
+        if (sample_include_word & lowbit) {
+          const uint32_t sample_idx = sample_include_cumulative_popcounts[sample_widx] + PopcountWord(sample_include_word & (lowbit - 1));
+          target_genoarr[sample_idx / kBitsPerWordD2] ^= k1LU << ((bit_idx % 2) + 2 * (sample_idx % kBitsPerWordD2));
+        }
+        fvals_bits &= fvals_bits - 1;
+      } while (fvals_bits);
+    }
+  }
+  return kPglRetSuccess;
+}
+
+// if aux1b_het_present is true, aux1b_hets becomes a 1-bit-per-sample bitarray
+// with the positions of altx/alty hets in aux1b.
+PglErr GetAux1bHets(const unsigned char* fread_end, const uintptr_t* __restrict raw_genoarr, uint32_t aux1b_mode, uint32_t raw_sample_ct, uint32_t allele_ct, uint32_t raw_10_ct, const unsigned char** fread_pp, uintptr_t* __restrict aux1b_hets, uint32_t* __restrict aux1b_het_presentp, uint32_t* __restrict deltalist_workspace) {
+  if (aux1b_mode == 15) {
+    *aux1b_het_presentp = 0;
+    return kPglRetSuccess;
+  }
+  uintptr_t detect_hom_mask_lo;
+  const uint32_t allele_code_logwidth = GetAux1bConsts(allele_ct, &detect_hom_mask_lo);
+  const uint32_t code10_logwidth = allele_code_logwidth + (allele_code_logwidth != 0);
+  const uint32_t code10_width = 1U << code10_logwidth;
+  const uint32_t allele_code_width = 1U << allele_code_logwidth;
+  const uintptr_t detect_all_mask_lo = detect_hom_mask_lo | (detect_hom_mask_lo << allele_code_width);
+  const uintptr_t detect_all_mask_hi = detect_all_mask_lo << (allele_code_width - 1);
+  Halfword* aux1b_hets_alias = DowncastWToHW(aux1b_hets);
+  uint32_t rare10_lowbits = kBitsPerWord;
+  uint32_t aux1b_het_present = 0;
+  if (!aux1b_mode) {
+    const unsigned char* patch_10_fset = *fread_pp;
+    const uint32_t fset_byte_ct = DivUp(raw_10_ct, 8);
+    const uint32_t fset_word_ct_m1 = (fset_byte_ct - 1) / kBytesPerWord;
+    const uint32_t rare10_ct = PopcountBytes(*fread_pp, fset_byte_ct);
+    *fread_pp += fset_byte_ct;
+    uintptr_t sample_hwidx = 0;
+    uintptr_t cur_raw_genoarr_xys = Word10(raw_genoarr[0]);
+    const unsigned char* patch_10_fvals = *fread_pp;
+    const uint32_t fvals_byte_ct = DivUpU64(S_CAST(uint64_t, rare10_ct) * code10_width, CHAR_BIT);
+    if (PtrAddCk(fread_end, fvals_byte_ct, fread_pp)) {
+      return kPglRetMalformedInput;
+    }
+    const uint32_t fvals_word_ct_m1 = (fvals_byte_ct - 1) / kBytesPerWord;
+    uintptr_t fvals_bits = 0;
+    uint32_t fvals_widx = 0;
+    uint32_t loop_len = kBitsPerWord;
+    for (uint32_t fset_widx = 0; ; ++fset_widx) {
+      uintptr_t fset_bits;
+      if (fset_widx >= fset_word_ct_m1) {
+        if (fset_widx > fset_word_ct_m1) {
+          break;
+        }
+        fset_bits = SubwordLoad(&(patch_10_fset[fset_word_ct_m1 * kBytesPerWord]), ModNz(fset_byte_ct, kBytesPerWord));
+        loop_len = ModNz(raw_10_ct, kBitsPerWord);
+      } else {
+        CopyFromUnalignedOffsetW(&fset_bits, patch_10_fset, fset_widx);
+      }
+      for (uint32_t uii = 0; uii != loop_len; ++uii) {
+        while (!cur_raw_genoarr_xys) {
+          cur_raw_genoarr_xys = Word10(raw_genoarr[++sample_hwidx]);
+        }
+        if (fset_bits & 1) {
+          if (rare10_lowbits == kBitsPerWord) {
+            if (fvals_widx == fvals_word_ct_m1) {
+              fvals_bits = SubwordLoad(&(patch_10_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+            } else {
+              CopyFromUnalignedOffsetW(&fvals_bits, patch_10_fvals, fvals_widx);
+            }
+            // allele_ct == 3: just invert raw fvals_bits
+            // allele_ct > 3: shift by allele_code_width, xor with self so that
+            // 0 == hom, detect nonzero by inverting the usual check
+            if (allele_ct == 3) {
+              fvals_bits = ~fvals_bits;
+            } else {
+              fvals_bits = fvals_bits ^ (fvals_bits << allele_code_width);
+              // conveniently, removing a ~ here is equivalent to inverting the
+              // relevant bits of the final result
+              fvals_bits = detect_hom_mask_lo & ((fvals_bits | ((fvals_bits | detect_all_mask_hi) - detect_all_mask_lo)) >> (code10_width - 1));
+            }
+            // bzhi only relevant for detecting if there are any hets at all
+            if (!aux1b_het_present) {
+              if (fvals_widx == fvals_word_ct_m1) {
+                fvals_bits = bzhi_max(fvals_bits, ModNz(rare10_ct * code10_width, kBitsPerWord));
+              }
+              if (fvals_bits) {
+                // lazy-initialize
+                aux1b_het_present = 1;
+                ZeroHwArr(2 * BitCtToWordCt(raw_sample_ct), aux1b_hets_alias);
+              }
+            }
+            ++fvals_widx;
+            rare10_lowbits = 0;
+          }
+          if (fvals_bits & (k1LU << rare10_lowbits)) {
+            const uint32_t bit_idx = ctzw(cur_raw_genoarr_xys) / 2;
+            aux1b_hets_alias[sample_hwidx] |= 1U << bit_idx;
+          }
+          rare10_lowbits += code10_width;
+        }
+        cur_raw_genoarr_xys &= cur_raw_genoarr_xys - 1;
+        fset_bits = fset_bits >> 1;
+      }
+    }
+    *aux1b_het_presentp = aux1b_het_present;
+    return kPglRetSuccess;
+  }
+  // aux1b_mode == 1
+  uint32_t rare10_ct;
+  PglErr reterr = ParseAndSaveDeltalist(fread_end, raw_sample_ct, fread_pp, deltalist_workspace, &rare10_ct);
+  if (unlikely(reterr)) {
+    return reterr;
+  }
+  const unsigned char* patch_10_fvals = *fread_pp;
+  const uint32_t fvals_byte_ct = DivUpU64(S_CAST(uint64_t, rare10_ct) << code10_logwidth, CHAR_BIT);
+  if (PtrAddCk(fread_end, fvals_byte_ct, fread_pp)) {
+    return kPglRetMalformedInput;
+  }
+  const uint32_t fvals_word_ct_m1 = (fvals_byte_ct - 1) / kBytesPerWord;
+  for (uint32_t fvals_widx = 0; ; ++fvals_widx) {
+    uintptr_t fvals_bits;
+    if (fvals_widx >= fvals_word_ct_m1) {
+      if (fvals_widx > fvals_word_ct_m1) {
+        break;
+      }
+      fvals_bits = SubwordLoad(&(patch_10_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+    } else {
+      CopyFromUnalignedOffsetW(&fvals_bits, patch_10_fvals, fvals_widx);
+    }
+    if (allele_ct == 3) {
+      fvals_bits = ~fvals_bits;
+    } else {
+      fvals_bits = fvals_bits ^ (fvals_bits << allele_code_width);
+      fvals_bits = detect_hom_mask_lo & ((fvals_bits | ((fvals_bits | detect_all_mask_hi) - detect_all_mask_lo)) >> (code10_width - 1));
+    }
+    if (fvals_widx == fvals_word_ct_m1) {
+      fvals_bits = bzhi_max(fvals_bits, ModNz(rare10_ct << code10_logwidth, kBitsPerWord));
+    }
+    if (!fvals_bits) {
+      continue;
+    }
+    if (!aux1b_het_present) {
+      aux1b_het_present = 1;
+      ZeroHwArr(2 * BitCtToWordCt(raw_sample_ct), aux1b_hets_alias);
+    }
+    const uint32_t* cur_deltalist_base = &(deltalist_workspace[fvals_widx << (kBitsPerWordLog2 - code10_logwidth)]);
+    do {
+      const uint32_t bit_idx = ctzw(fvals_bits);
+      const uint32_t sample_uidx = cur_deltalist_base[bit_idx >> code10_logwidth];
+      aux1b_hets_alias[sample_uidx / kBitsPerWordD2] |= 1U << (sample_uidx % kBitsPerWordD2);
+      fvals_bits &= fvals_bits - 1;
+    } while (fvals_bits);
+  }
+  *aux1b_het_presentp = aux1b_het_present;
+  return kPglRetSuccess;
+}
+
+static inline void SuppressHets00(const uintptr_t* allele_countvec, uintptr_t* subsetted_all_hets, uint32_t sample_ct, uintptr_t* subsetted_suppressed_hets) {
+  const uint32_t sample_ctl2 = NypCtToWordCt(sample_ct);
+  MaskWordsToHalfwordsInvmatch(allele_countvec, ~k0LU, sample_ctl2, subsetted_all_hets, subsetted_suppressed_hets);
+}
+
+PglErr Get1Multiallelic(const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, uint32_t sample_ct, uint32_t vidx, uint32_t allele_idx, PgenReaderMain* pgrp, const unsigned char** fread_pp, const unsigned char** fread_endp, uintptr_t* __restrict all_hets, uintptr_t* __restrict allele_countvec, uintptr_t** subsetted_suppressed_hetp) {
+  // sample_ct > 0; either allele_idx > 1 or ((allele_idx == 1) &&
+  // multiallelic_hc_present)
+  // subsetted_suppressed_het assumed to be initialized to nullptr, if present
+  // at all
+  const uint32_t raw_sample_ct = pgrp->fi.raw_sample_ct;
+  const uint32_t subsetting_required = (sample_ct != raw_sample_ct);
+  uintptr_t* raw_genovec = pgrp->workspace_vec;
+  const unsigned char* fread_ptr;
+  const unsigned char* fread_end;
+  PglErr reterr = ReadRawGenovec(subsetting_required, vidx, pgrp, &fread_ptr, &fread_end, raw_genovec);
+  if (unlikely(reterr)) {
+    return reterr;
+  }
+
+  const uint32_t vrtype = pgrp->fi.vrtypes[vidx];
+  const uint32_t multiallelic_hc_present = VrtypeMultiallelicHc(vrtype);
+  CopyNyparrNonemptySubset(raw_genovec, sample_include, raw_sample_ct, sample_ct, allele_countvec);
+  ZeroTrailingNyps(raw_sample_ct, raw_genovec);
+  if (fread_pp) {
+    *fread_endp = fread_end;
+    if (all_hets) {
+      PgrDetectGenoarrHets(raw_genovec, raw_sample_ct, all_hets);
+    }
+  }
+  if (allele_idx != 1) {
+    GenovecNonmissingToZeroUnsafe(sample_ct, allele_countvec);
+    if (!multiallelic_hc_present) {
+      if (fread_pp) {
+        *fread_pp = fread_ptr;
+      }
+      return kPglRetSuccess;
+    }
+  }
+  const uint32_t aux1_first_byte = *fread_ptr++;
+  const uint32_t aux1a_mode = aux1_first_byte & 15;
+  const uint32_t aux1b_mode = aux1_first_byte >> 4;
+  // only need to initialize these in dense modes
+  uint32_t raw_01_ct = 0;
+  uint32_t raw_10_ct = 0;
+  if ((!aux1a_mode) || (!aux1b_mode)) {
+    GenovecCount12Unsafe(raw_genovec, raw_sample_ct, &raw_01_ct, &raw_10_ct);
+  }
+
+  const uintptr_t* allele_idx_offsets = pgrp->fi.allele_idx_offsets;
+  const uint32_t allele_ct = allele_idx_offsets[vidx + 1] - allele_idx_offsets[vidx];
+  if (!subsetting_required) {
+    sample_include = nullptr;
+  }
+  // allele_idx == 1 case:
+  //   allele_countvec currently contains ALT counts; we want to reduce them to
+  //   ALT1 counts.  This can be done with the following steps:
+  //   1. For every element of patch_01_fset, reduce the value from 1 to 0.  We
+  //      don't actually need to look at patch_01_fvals.
+  //   2. For every element of patch_10_fset, reduce the value from 2 depending
+  //      on the low bit(s) of the patch_01_fvals entry (reduce to 0 unless low
+  //      bit(s) are all zero).
+  // allele_idx > 1 case:
+  //   1. For every element of patch_01_fset, set a 1 for each matching value
+  //      of patch_01_fvals.
+  //   2. For every element of patch_10_fset, set a 1 for each het-matching
+  //      value of patch_10_fvals, and a 2 for each hom-match.
+  uint32_t* deltalist_workspace = pgrp->workspace_difflist_sample_ids;
+  // Two cases:
+  // - If allele_idx == 1, convert all aux1a entries from 01 to 00.
+  // - Otherwise, for each matching aux1a entry, convert from 00 to 01.
+  reterr = GenoarrAux1aUpdate(fread_end, sample_include, sample_include_cumulative_popcounts, raw_genovec, aux1a_mode, raw_sample_ct, allele_ct, allele_idx, 1, raw_01_ct, &fread_ptr, allele_countvec, deltalist_workspace);
+  if (unlikely(reterr)) {
+    return reterr;
+  }
+  const unsigned char* aux1b_start = fread_ptr;
+  reterr = GenoarrAux1bStandardUpdate(fread_end, sample_include, sample_include_cumulative_popcounts, raw_genovec, aux1b_mode, raw_sample_ct, allele_ct, allele_idx, raw_10_ct, &fread_ptr, allele_countvec, deltalist_workspace);
+  if ((!fread_pp) || reterr) {
+    return reterr;
+  }
+  *fread_pp = fread_ptr;
+  if (all_hets) {
+    // can merge this with GenovecAux1bStandardUpdate if this is ever a
+    // significant bottleneck
+    uintptr_t* aux1b_hets = pgrp->workspace_aux1x_present;
+    uint32_t aux1b_het_present;
+    reterr = GetAux1bHets(fread_end, raw_genovec, aux1b_mode, raw_sample_ct, allele_ct, raw_10_ct, &aux1b_start, aux1b_hets, &aux1b_het_present, deltalist_workspace);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+    if (aux1b_het_present) {
+      BitvecOr(aux1b_hets, BitCtToWordCt(raw_sample_ct), all_hets);
+    }
+    // We now want to make subsetted_suppressed_het flag all hets where neither
+    // allele is equal to allele_idx, i.e. the allele_countvec value is 0 yet
+    // the all_hets bit is set.
+    // This was done incorrectly before 17 Aug 2023.
+    if ((allele_idx > 1) || aux1b_het_present) {
+      // We can now clobber the contents of pgrp->workspace_vec (raw_genovec)
+      // and pgrp->workspace_aux1x_present (aux1b_hets).
+      // We use the former as the subsetted_suppressed_het return buffer.
+      uintptr_t* all_hets_subsetted = all_hets;
+      if (subsetting_required) {
+        all_hets_subsetted = aux1b_hets;
+        CopyBitarrSubset(all_hets, sample_include, sample_ct, all_hets_subsetted);
+      }
+      *subsetted_suppressed_hetp = raw_genovec;
+      SuppressHets00(allele_countvec, all_hets_subsetted, sample_ct, raw_genovec);
+    }
+  }
+  return kPglRetSuccess;
+}
+
+PglErr IMPLPgrGet1(const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, uint32_t sample_ct, uint32_t vidx, uint32_t allele_idx, PgenReaderMain* pgrp, uintptr_t* __restrict allele_countvec) {
+  if (!sample_ct) {
+    return kPglRetSuccess;
+  }
+  const uint32_t vrtype = GetPgfiVrtype(&(pgrp->fi), vidx);
+  const uint32_t multiallelic_hc_present = VrtypeMultiallelicHc(vrtype);
+  if ((!allele_idx) || ((allele_idx == 1) && (!multiallelic_hc_present))) {
+    PglErr reterr = ReadGenovecSubsetUnsafe(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, pgrp, nullptr, nullptr, allele_countvec);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+    if (!allele_idx) {
+      GenovecInvertUnsafe(sample_ct, allele_countvec);
+    }
+    return kPglRetSuccess;
+  }
+  return Get1Multiallelic(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, allele_idx, pgrp, nullptr, nullptr, nullptr, allele_countvec, nullptr);
+}
+
+PglErr IMPLPgrGetInv1(const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, uint32_t sample_ct, uint32_t vidx, uint32_t allele_idx, PgenReaderMain* pgrp, uintptr_t* __restrict allele_invcountvec) {
+  if (!sample_ct) {
+    return kPglRetSuccess;
+  }
+  const uint32_t vrtype = GetPgfiVrtype(&(pgrp->fi), vidx);
+  const uint32_t multiallelic_hc_present = VrtypeMultiallelicHc(vrtype);
+  if ((!allele_idx) || ((allele_idx == 1) && (!multiallelic_hc_present))) {
+    PglErr reterr = ReadGenovecSubsetUnsafe(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, pgrp, nullptr, nullptr, allele_invcountvec);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+    if (allele_idx) {
+      GenovecInvertUnsafe(sample_ct, allele_invcountvec);
+    }
+    return kPglRetSuccess;
+  }
+  PglErr reterr = Get1Multiallelic(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, allele_idx, pgrp, nullptr, nullptr, nullptr, allele_invcountvec, nullptr);
+  GenovecInvertUnsafe(sample_ct, allele_invcountvec);
+  return reterr;
+}
+
+PglErr IMPLPgrGetInv1DifflistOrGenovec(const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, uint32_t sample_ct, uint32_t max_simple_difflist_len, uint32_t vidx, uint32_t allele_idx, PgenReaderMain* pgrp, uintptr_t* __restrict allele_invcountvec, uint32_t* __restrict difflist_common_geno_ptr, uintptr_t* __restrict main_raregeno, uint32_t* __restrict difflist_sample_ids, uint32_t* __restrict difflist_len_ptr) {
+  if (!sample_ct) {
+    *difflist_common_geno_ptr = UINT32_MAX;
+    return kPglRetSuccess;
+  }
+  const uint32_t vrtype = GetPgfiVrtype(&(pgrp->fi), vidx);
+  const uint32_t multiallelic_hc_present = VrtypeMultiallelicHc(vrtype);
+  if ((!allele_idx) || ((allele_idx == 1) && (!multiallelic_hc_present))) {
+    PglErr reterr = ReadDifflistOrGenovecSubsetUnsafe(sample_include, sample_include_cumulative_popcounts, sample_ct, max_simple_difflist_len, vidx, pgrp, nullptr, nullptr, allele_invcountvec, difflist_common_geno_ptr, main_raregeno, difflist_sample_ids, difflist_len_ptr);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+    if (allele_idx) {
+      if (*difflist_common_geno_ptr == UINT32_MAX) {
+        GenovecInvertUnsafe(sample_ct, allele_invcountvec);
+      } else {
+        const uint32_t orig_common_geno = *difflist_common_geno_ptr;
+        GenovecInvertUnsafe(*difflist_len_ptr, main_raregeno);
+        if (orig_common_geno != 3) {
+          *difflist_common_geno_ptr = 2 - orig_common_geno;
+        }
+      }
+    }
+    return kPglRetSuccess;
+  }
+  *difflist_common_geno_ptr = UINT32_MAX;
+  PglErr reterr = Get1Multiallelic(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, allele_idx, pgrp, nullptr, nullptr, nullptr, allele_invcountvec, nullptr);
+  GenovecInvertUnsafe(sample_ct, allele_invcountvec);
+  return reterr;
+}
+
+// Assumes allele_idx0 < allele_idx1, and allele_idx0 < 2.  Rotates hardcalls
+// such that, if no multiallelic hardcalls are present, 0 = 0/0, 1 = 0/1,
+// 2 = 1/1, and 3 = anything else.
+void Rotate2(uint32_t allele_idx0, uint32_t allele_idx1, uint32_t sample_ct, uintptr_t* genovec) {
+  if (!allele_idx0) {
+    if (allele_idx1 > 1) {
+      GenovecNonzeroToMissingUnsafe(sample_ct, genovec);
+    }
+  } else {
+    GenovecInvertThenNonzeroToMissingUnsafe(sample_ct, genovec);
+  }
+}
+
+PglErr SkipAux1a(const unsigned char* fread_end, uint32_t aux1a_mode, uint32_t raw_sample_ct, uint32_t allele_ct, uint32_t raw_01_ct, const unsigned char** fread_pp) {
+  if (aux1a_mode == 15) {
+    return kPglRetSuccess;
+  }
+  uint32_t rare01_ct;
+  if (!aux1a_mode) {
+    const uint32_t fset_byte_ct = DivUp(raw_01_ct, CHAR_BIT);
+    rare01_ct = PopcountBytes(*fread_pp, fset_byte_ct);
+    *fread_pp += fset_byte_ct;
+  } else {
+    const unsigned char* group_info_iter;
+    PglErr reterr = ParseDifflistHeader(fread_end, raw_sample_ct, fread_pp, nullptr, &group_info_iter, &rare01_ct);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+    reterr = SkipDeltalistIds(fread_end, group_info_iter, rare01_ct, raw_sample_ct, 0, fread_pp);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+  }
+  const uint32_t fvals_byte_ct = GetAux1aAlleleEntryByteCt(allele_ct, rare01_ct);
+  if (PtrAddCk(fread_end, fvals_byte_ct, fread_pp)) {
+    return kPglRetMalformedInput;
+  }
+  return kPglRetSuccess;
+}
+
+// sample_include assumed to be nullptr if no subsetting required
+PglErr GenoarrAux1bUpdate2(const unsigned char* fread_end, const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, const uintptr_t* __restrict raw_genoarr, uint32_t aux1b_mode, uint32_t raw_sample_ct, uint32_t allele_ct, uint32_t allele_idx0, uint32_t allele_idx1, uint32_t raw_10_ct, const unsigned char** fread_pp, uintptr_t* __restrict target_genoarr, uint32_t* __restrict deltalist_workspace) {
+  // Possible aux1b updates:
+  // - allele_idx0 == 0:
+  //     allele_idx1 == 1: all altx/alty including a rarealt from 10 to 11
+  //     allele_idx1 > 1: set one rarealtx/rarealtx from 11 to 10
+  //
+  // - allele_idx0 == 1: change all alt1/rarealtx from 00 to 01,
+  //   rarealtx/rarealtx from 00 to 10, and all other aux1b entries to missing.
+  //   This can use the same driver as Get1Multiallelic.
+  //
+  // - allele_idx0 > 1: change all rarealtx/rarealtx from missing to 00,
+  //   rarealtx/rarealty to 01, and rarealty/rarealty to 10.
+  if (aux1b_mode == 15) {
+    return kPglRetSuccess;
+  }
+  if (allele_idx0 == 1) {
+    return GenoarrAux1bStandardUpdate(fread_end, sample_include, sample_include_cumulative_popcounts, raw_genoarr, aux1b_mode, raw_sample_ct, allele_ct, allele_idx1, raw_10_ct, fread_pp, target_genoarr, deltalist_workspace);
+  }
+  uintptr_t detect_hom_mask_lo;
+  const uint32_t allele_code_logwidth = GetAux1bConsts(allele_ct, &detect_hom_mask_lo);
+  const uint32_t code10_logwidth = allele_code_logwidth + (allele_code_logwidth != 0);
+  const uint32_t code10_width = 1U << code10_logwidth;
+  const uintptr_t detect_hom_mask_hi = detect_hom_mask_lo << (code10_width - 1);
+  uintptr_t xor_word2 = allele_idx1 - 1;
+  // fortunately, this sequence of operations happens to work for allele_ct ==
+  // 3
+  xor_word2 = xor_word2 | (xor_word2 << (code10_width / 2));
+  xor_word2 = xor_word2 * detect_hom_mask_lo;
+  uint32_t rare10_lowbits = kBitsPerWord;
+  if (!aux1b_mode) {
+    const unsigned char* patch_10_fset = *fread_pp;
+    const uint32_t fset_byte_ct = DivUp(raw_10_ct, 8);
+    const uint32_t fset_word_ct_m1 = (fset_byte_ct - 1) / kBytesPerWord;
+    const uint32_t rare10_ct = PopcountBytes(*fread_pp, fset_byte_ct);
+    *fread_pp += fset_byte_ct;
+    uintptr_t sample_hwidx = 0;
+    uintptr_t cur_raw_genoarr_xys = Word10(raw_genoarr[0]);
+    const unsigned char* patch_10_fvals = *fread_pp;
+    const uint32_t fvals_byte_ct = DivUpU64(S_CAST(uint64_t, rare10_ct) * code10_width, CHAR_BIT);
+    if (PtrAddCk(fread_end, fvals_byte_ct, fread_pp)) {
+      return kPglRetMalformedInput;
+    }
+    const uint32_t fvals_word_ct_m1 = (fvals_byte_ct - 1) / kBytesPerWord;
+    uintptr_t fvals_bits = 0;
+    uint32_t fvals_widx = 0;
+    uint32_t loop_len = kBitsPerWord;
+    if (!allele_idx0) {
+      for (uint32_t fset_widx = 0; ; ++fset_widx) {
+        uintptr_t fset_bits;
+        if (fset_widx >= fset_word_ct_m1) {
+          if (fset_widx > fset_word_ct_m1) {
+            return kPglRetSuccess;
+          }
+          fset_bits = SubwordLoad(&(patch_10_fset[fset_word_ct_m1 * kBytesPerWord]), ModNz(fset_byte_ct, kBytesPerWord));
+          loop_len = ModNz(raw_10_ct, kBitsPerWord);
+        } else {
+          CopyFromUnalignedOffsetW(&fset_bits, patch_10_fset, fset_widx);
+        }
+        if (!sample_include) {
+          if (allele_idx1 == 1) {
+            // All aux1b 10 -> 11.  Ignore aux1b_fvals.
+            for (uint32_t uii = 0; uii != loop_len; ++uii) {
+              while (!cur_raw_genoarr_xys) {
+                cur_raw_genoarr_xys = Word10(raw_genoarr[++sample_hwidx]);
+              }
+              if (fset_bits & 1) {
+                const uintptr_t lowbit = cur_raw_genoarr_xys & (-cur_raw_genoarr_xys);
+                target_genoarr[sample_hwidx] ^= lowbit;
+              }
+              cur_raw_genoarr_xys &= cur_raw_genoarr_xys - 1;
+              fset_bits = fset_bits >> 1;
+            }
+          } else {
+            // hom-altx 11 -> 10.
+            for (uint32_t uii = 0; uii != loop_len; ++uii) {
+              while (!cur_raw_genoarr_xys) {
+                cur_raw_genoarr_xys = Word10(raw_genoarr[++sample_hwidx]);
+              }
+              if (fset_bits & 1) {
+                if (rare10_lowbits == kBitsPerWord) {
+                  if (fvals_widx == fvals_word_ct_m1) {
+                    fvals_bits = SubwordLoad(&(patch_10_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+                  } else {
+                    CopyFromUnalignedOffsetW(&fvals_bits, patch_10_fvals, fvals_widx);
+                  }
+                  fvals_bits = fvals_bits ^ xor_word2;
+                  fvals_bits = (detect_hom_mask_hi & (~(fvals_bits | ((fvals_bits | detect_hom_mask_hi) - detect_hom_mask_lo)))) >> (code10_width - 1);
+                  // unnecessary to apply bzhi here
+                  ++fvals_widx;
+                  rare10_lowbits = 0;
+                }
+                if (fvals_bits & (k1LU << rare10_lowbits)) {
+                  const uintptr_t lowbit = cur_raw_genoarr_xys & (-cur_raw_genoarr_xys);
+                  target_genoarr[sample_hwidx] ^= lowbit;
+                }
+                rare10_lowbits += code10_width;
+              }
+              cur_raw_genoarr_xys &= cur_raw_genoarr_xys - 1;
+              fset_bits = fset_bits >> 1;
+            }
+          }
+        } else {
+          // sample_include non-null
+          if (allele_idx1 == 1) {
+            for (uint32_t uii = 0; uii != loop_len; ++uii) {
+              while (!cur_raw_genoarr_xys) {
+                cur_raw_genoarr_xys = Word10(raw_genoarr[++sample_hwidx]);
+              }
+              if (fset_bits & 1) {
+                const uint32_t sample_uidx_lowbits = ctzw(cur_raw_genoarr_xys) / 2;
+                if ((DowncastKWToHW(sample_include)[sample_hwidx]) & (1U << sample_uidx_lowbits)) {
+                  const uint32_t sample_idx = RawToSubsettedPos(sample_include, sample_include_cumulative_popcounts, sample_hwidx * kBitsPerWordD2 + sample_uidx_lowbits);
+                  target_genoarr[sample_idx / kBitsPerWordD2] ^= k1LU << (2 * (sample_idx % kBitsPerWordD2));
+                }
+                rare10_lowbits += code10_width;
+              }
+              cur_raw_genoarr_xys &= cur_raw_genoarr_xys - 1;
+              fset_bits = fset_bits >> 1;
+            }
+          } else {
+            for (uint32_t uii = 0; uii != loop_len; ++uii) {
+              while (!cur_raw_genoarr_xys) {
+                cur_raw_genoarr_xys = Word10(raw_genoarr[++sample_hwidx]);
+              }
+              if (fset_bits & 1) {
+                if (rare10_lowbits == kBitsPerWord) {
+                  if (fvals_widx == fvals_word_ct_m1) {
+                    fvals_bits = SubwordLoad(&(patch_10_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+                  } else {
+                    CopyFromUnalignedOffsetW(&fvals_bits, patch_10_fvals, fvals_widx);
+                  }
+                  fvals_bits = fvals_bits ^ xor_word2;
+                  fvals_bits = (detect_hom_mask_hi & (~(fvals_bits | ((fvals_bits | detect_hom_mask_hi) - detect_hom_mask_lo)))) >> (code10_width - 1);
+                  // unnecessary to apply bzhi here
+                  ++fvals_widx;
+                  rare10_lowbits = 0;
+                }
+                if (fvals_bits & (k1LU << rare10_lowbits)) {
+                  const uint32_t sample_uidx_lowbits = ctzw(cur_raw_genoarr_xys) / 2;
+                  if ((DowncastKWToHW(sample_include)[sample_hwidx]) & (1U << sample_uidx_lowbits)) {
+                    const uint32_t sample_idx = RawToSubsettedPos(sample_include, sample_include_cumulative_popcounts, sample_hwidx * kBitsPerWordD2 + sample_uidx_lowbits);
+                    target_genoarr[sample_idx / kBitsPerWordD2] ^= k1LU << (2 * (sample_idx % kBitsPerWordD2));
+                  }
+                }
+                rare10_lowbits += code10_width;
+              }
+              cur_raw_genoarr_xys &= cur_raw_genoarr_xys - 1;
+              fset_bits = fset_bits >> 1;
+            }
+          }
+        }
+      }
+    }
+    // 2 <= allele_idx0 < allele_idx1 (so allele_ct > 3 guaranteed)
+    uintptr_t xor_word1 = allele_idx1 - 1;
+    uintptr_t xor_word0 = allele_idx0 - 1;
+    xor_word1 = xor_word0 | (xor_word1 << (code10_width / 2));
+    xor_word0 = xor_word0 | (xor_word0 << (code10_width / 2));
+    xor_word1 *= detect_hom_mask_lo;
+    xor_word0 *= detect_hom_mask_lo;
+    for (uint32_t fset_widx = 0; ; ++fset_widx) {
+      uintptr_t fset_bits;
+      if (fset_widx >= fset_word_ct_m1) {
+        if (fset_widx > fset_word_ct_m1) {
+          return kPglRetSuccess;
+        }
+        fset_bits = SubwordLoad(&(patch_10_fset[fset_word_ct_m1 * kBytesPerWord]), ModNz(fset_byte_ct, kBytesPerWord));
+        loop_len = ModNz(raw_10_ct, kBitsPerWord);
+      } else {
+        CopyFromUnalignedOffsetW(&fset_bits, patch_10_fset, fset_widx);
+      }
+      if (!sample_include) {
+        for (uint32_t uii = 0; uii != loop_len; ++uii) {
+          while (!cur_raw_genoarr_xys) {
+            cur_raw_genoarr_xys = Word10(raw_genoarr[++sample_hwidx]);
+          }
+          if (fset_bits & 1) {
+            if (rare10_lowbits == kBitsPerWord) {
+              if (fvals_widx == fvals_word_ct_m1) {
+                fvals_bits = SubwordLoad(&(patch_10_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+              } else {
+                CopyFromUnalignedOffsetW(&fvals_bits, patch_10_fvals, fvals_widx);
+              }
+              uintptr_t match0 = fvals_bits ^ xor_word0;
+              uintptr_t match1 = fvals_bits ^ xor_word1;
+              uintptr_t match2 = fvals_bits ^ xor_word2;
+              match0 = detect_hom_mask_hi & (~(match0 | ((match0 | detect_hom_mask_hi) - detect_hom_mask_lo)));
+              match1 = detect_hom_mask_hi & (~(match1 | ((match1 | detect_hom_mask_hi) - detect_hom_mask_lo)));
+              match2 = detect_hom_mask_hi & (~(match2 | ((match2 | detect_hom_mask_hi) - detect_hom_mask_lo)));
+              // Now want match0 -> 11, match1 -> 10, and match2 -> 01.
+              fvals_bits = ((match0 | match1) >> (code10_width - 2)) | ((match0 | match2) >> (code10_width - 1));
+              // unnecessary to apply bzhi here
+              ++fvals_widx;
+              rare10_lowbits = 0;
+            }
+            const uintptr_t xor_val = (fvals_bits >> rare10_lowbits) & 3;
+            if (xor_val) {
+              const uintptr_t lowbit = cur_raw_genoarr_xys & (-cur_raw_genoarr_xys);
+              target_genoarr[sample_hwidx] ^= lowbit * xor_val;
+            }
+            rare10_lowbits += code10_width;
+          }
+          cur_raw_genoarr_xys &= cur_raw_genoarr_xys - 1;
+          fset_bits = fset_bits >> 1;
+        }
+      } else {
+        // sample_include non-null
+        for (uint32_t uii = 0; uii != loop_len; ++uii) {
+          while (!cur_raw_genoarr_xys) {
+            cur_raw_genoarr_xys = Word10(raw_genoarr[++sample_hwidx]);
+          }
+          if (fset_bits & 1) {
+            if (rare10_lowbits == kBitsPerWord) {
+              if (fvals_widx == fvals_word_ct_m1) {
+                fvals_bits = SubwordLoad(&(patch_10_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+              } else {
+                CopyFromUnalignedOffsetW(&fvals_bits, patch_10_fvals, fvals_widx);
+              }
+              uintptr_t match0 = fvals_bits ^ xor_word0;
+              uintptr_t match1 = fvals_bits ^ xor_word1;
+              uintptr_t match2 = fvals_bits ^ xor_word2;
+              match0 = detect_hom_mask_hi & (~(match0 | ((match0 | detect_hom_mask_hi) - detect_hom_mask_lo)));
+              match1 = detect_hom_mask_hi & (~(match1 | ((match1 | detect_hom_mask_hi) - detect_hom_mask_lo)));
+              match2 = detect_hom_mask_hi & (~(match2 | ((match2 | detect_hom_mask_hi) - detect_hom_mask_lo)));
+              fvals_bits = ((match0 | match1) >> (code10_width - 2)) | ((match0 | match2) >> (code10_width - 1));
+              // unnecessary to apply bzhi here
+              ++fvals_widx;
+              rare10_lowbits = 0;
+            }
+            const uintptr_t xor_val = (fvals_bits >> rare10_lowbits) & 3;
+            if (xor_val) {
+              const uint32_t sample_uidx_lowbits = ctzw(cur_raw_genoarr_xys) / 2;
+              if ((DowncastKWToHW(sample_include)[sample_hwidx]) & (1U << sample_uidx_lowbits)) {
+                const uint32_t sample_idx = RawToSubsettedPos(sample_include, sample_include_cumulative_popcounts, sample_hwidx * kBitsPerWordD2 + sample_uidx_lowbits);
+                target_genoarr[sample_idx / kBitsPerWordD2] ^= xor_val << (2 * (sample_idx % kBitsPerWordD2));
+              }
+            }
+            rare10_lowbits += code10_width;
+          }
+          cur_raw_genoarr_xys &= cur_raw_genoarr_xys - 1;
+          fset_bits = fset_bits >> 1;
+        }
+      }
+    }
+  }
+  // aux1b_mode == 1
+  uint32_t rare10_ct;
+  PglErr reterr = ParseAndSaveDeltalist(fread_end, raw_sample_ct, fread_pp, deltalist_workspace, &rare10_ct);
+  if (unlikely(reterr)) {
+    return reterr;
+  }
+  const unsigned char* patch_10_fvals = *fread_pp;
+  const uint32_t fvals_byte_ct = DivUpU64(S_CAST(uint64_t, rare10_ct) << code10_logwidth, CHAR_BIT);
+  if (PtrAddCk(fread_end, fvals_byte_ct, fread_pp)) {
+    return kPglRetMalformedInput;
+  }
+  if (allele_idx1 == 1) {
+    if (!sample_include) {
+      for (uint32_t rare10_idx = 0; rare10_idx != rare10_ct; ++rare10_idx) {
+        const uint32_t sample_uidx = deltalist_workspace[rare10_idx];
+        target_genoarr[sample_uidx / kBitsPerWordD2] ^= k1LU << (2 * (sample_uidx % kBitsPerWordD2));
+      }
+      return kPglRetSuccess;
+    }
+    for (uint32_t rare10_idx = 0; rare10_idx != rare10_ct; ++rare10_idx) {
+      const uint32_t sample_uidx = deltalist_workspace[rare10_idx];
+      const uint32_t sample_widx = sample_uidx / kBitsPerWord;
+      const uintptr_t lowbit = k1LU << (sample_uidx % kBitsPerWord);
+      const uintptr_t sample_include_word = sample_include[sample_widx];
+      if (sample_include_word & lowbit) {
+        const uint32_t sample_idx = sample_include_cumulative_popcounts[sample_widx] + PopcountWord(sample_include_word & (lowbit - 1));
+        target_genoarr[sample_idx / kBitsPerWordD2] ^= k1LU << (2 * (sample_idx % kBitsPerWordD2));
+      }
+    }
+    return kPglRetSuccess;
+  }
+  const uint32_t fvals_word_ct_m1 = (fvals_byte_ct - 1) / kBytesPerWord;
+  if (!allele_idx0) {
+    for (uint32_t fvals_widx = 0; ; ++fvals_widx) {
+      uintptr_t fvals_bits;
+      if (fvals_widx >= fvals_word_ct_m1) {
+        if (fvals_widx > fvals_word_ct_m1) {
+          return kPglRetSuccess;
+        }
+        fvals_bits = SubwordLoad(&(patch_10_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+      } else {
+        CopyFromUnalignedOffsetW(&fvals_bits, patch_10_fvals, fvals_widx);
+      }
+      fvals_bits = fvals_bits ^ xor_word2;
+      fvals_bits = detect_hom_mask_hi & (~(fvals_bits | ((fvals_bits | detect_hom_mask_hi) - detect_hom_mask_lo)));
+      if (fvals_widx == fvals_word_ct_m1) {
+        fvals_bits = bzhi_max(fvals_bits, ModNz(rare10_ct << code10_logwidth, kBitsPerWord));
+      }
+      if (!fvals_bits) {
+        continue;
+      }
+      const uint32_t* cur_deltalist_base = &(deltalist_workspace[fvals_widx << (kBitsPerWordLog2 - code10_logwidth)]);
+      if (!sample_include) {
+        do {
+          const uint32_t bit_idx = ctzw(fvals_bits);
+          const uint32_t sample_uidx = cur_deltalist_base[bit_idx >> code10_logwidth];
+          target_genoarr[sample_uidx / kBitsPerWordD2] ^= k1LU << (2 * (sample_uidx % kBitsPerWordD2));
+          fvals_bits &= fvals_bits - 1;
+        } while (fvals_bits);
+      } else {
+        do {
+          const uint32_t bit_idx = ctzw(fvals_bits);
+          const uint32_t sample_uidx = cur_deltalist_base[bit_idx >> code10_logwidth];
+          const uint32_t sample_widx = sample_uidx / kBitsPerWord;
+          const uintptr_t lowbit = k1LU << (sample_uidx % kBitsPerWord);
+          const uintptr_t sample_include_word = sample_include[sample_widx];
+          if (sample_include_word & lowbit) {
+            const uint32_t sample_idx = sample_include_cumulative_popcounts[sample_widx] + PopcountWord(sample_include_word & (lowbit - 1));
+            target_genoarr[sample_idx / kBitsPerWordD2] ^= k1LU << (2 * (sample_idx % kBitsPerWordD2));
+          }
+          fvals_bits &= fvals_bits - 1;
+        } while (fvals_bits);
+      }
+    }
+  }
+  // 2 <= allele_idx0 < allele_idx1
+  uintptr_t xor_word1 = allele_idx1 - 1;
+  uintptr_t xor_word0 = allele_idx0 - 1;
+  xor_word1 = xor_word0 | (xor_word1 << (code10_width / 2));
+  xor_word0 = xor_word0 | (xor_word0 << (code10_width / 2));
+  xor_word1 *= detect_hom_mask_lo;
+  xor_word0 *= detect_hom_mask_lo;
+  for (uint32_t fvals_widx = 0; ; ++fvals_widx) {
+    uintptr_t fvals_bits;
+    if (fvals_widx >= fvals_word_ct_m1) {
+      if (fvals_widx > fvals_word_ct_m1) {
+        return kPglRetSuccess;
+      }
+      fvals_bits = SubwordLoad(&(patch_10_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+    } else {
+      CopyFromUnalignedOffsetW(&fvals_bits, patch_10_fvals, fvals_widx);
+    }
+    uintptr_t match0 = fvals_bits ^ xor_word0;
+    uintptr_t match1 = fvals_bits ^ xor_word1;
+    uintptr_t match2 = fvals_bits ^ xor_word2;
+    match0 = detect_hom_mask_hi & (~(match0 | ((match0 | detect_hom_mask_hi) - detect_hom_mask_lo)));
+    match1 = detect_hom_mask_hi & (~(match1 | ((match1 | detect_hom_mask_hi) - detect_hom_mask_lo)));
+    match2 = detect_hom_mask_hi & (~(match2 | ((match2 | detect_hom_mask_hi) - detect_hom_mask_lo)));
+    // since code10_width >= 4, we can use match0 == 3 (mod 4), match1 == 2
+    // (mod 4), match2 == 1 (mod 4) representation.
+    fvals_bits = (match0 >> (code10_width - 4)) | (match1 >> (code10_width - 3)) | (match2 >> (code10_width - 2));
+    if (fvals_widx == fvals_word_ct_m1) {
+      fvals_bits = bzhi_max(fvals_bits, ModNz(rare10_ct << code10_logwidth, kBitsPerWord));
+    }
+    if (!fvals_bits) {
+      continue;
+    }
+    const uint32_t* cur_deltalist_base = &(deltalist_workspace[fvals_widx << (kBitsPerWordLog2 - code10_logwidth)]);
+    if (!sample_include) {
+      do {
+        const uintptr_t bit_idx = ctzw(fvals_bits);
+        const uint32_t sample_uidx = cur_deltalist_base[bit_idx >> code10_logwidth];
+        target_genoarr[sample_uidx / kBitsPerWordD2] ^= (bit_idx & 3) << (2 * (sample_uidx % kBitsPerWordD2));
+        fvals_bits &= fvals_bits - 1;
+      } while (fvals_bits);
+    } else {
+      do {
+        const uintptr_t bit_idx = ctzw(fvals_bits);
+        const uint32_t sample_uidx = cur_deltalist_base[bit_idx >> code10_logwidth];
+        const uint32_t sample_widx = sample_uidx / kBitsPerWord;
+        const uintptr_t lowbit = k1LU << (sample_uidx % kBitsPerWord);
+        const uintptr_t sample_include_word = sample_include[sample_widx];
+        if (sample_include_word & lowbit) {
+          const uint32_t sample_idx = sample_include_cumulative_popcounts[sample_widx] + PopcountWord(sample_include_word & (lowbit - 1));
+          target_genoarr[sample_idx / kBitsPerWordD2] ^= (bit_idx & 3) << (2 * (sample_idx % kBitsPerWordD2));
+        }
+        fvals_bits &= fvals_bits - 1;
+      } while (fvals_bits);
+    }
+  }
+}
+
+PglErr IMPLPgrGet2(const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, uint32_t sample_ct, uint32_t vidx, uint32_t allele_idx0, uint32_t allele_idx1, PgenReaderMain* pgrp, uintptr_t* __restrict genovec) {
+  assert(allele_idx0 != allele_idx1);
+  if (!sample_ct) {
+    return kPglRetSuccess;
+  }
+  const uint32_t raw_sample_ct = pgrp->fi.raw_sample_ct;
+  const uint32_t subsetting_required = (sample_ct != raw_sample_ct);
+  const uint32_t vrtype = GetPgfiVrtype(&(pgrp->fi), vidx);
+  const uint32_t multiallelic_hc_present = VrtypeMultiallelicHc(vrtype);
+  if (!multiallelic_hc_present) {
+    if ((allele_idx0 > 1) && (allele_idx1 > 1)) {
+      // Trivial all-missing case.
+      SetAllBits(2 * sample_ct, genovec);
+      return kPglRetSuccess;
+    }
+    PglErr reterr = ReadGenovecSubsetUnsafe(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, pgrp, nullptr, nullptr, genovec);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+    if (allele_idx0 < allele_idx1) {
+      Rotate2(allele_idx0, allele_idx1, sample_ct, genovec);
+      return kPglRetSuccess;
+    }
+    if (allele_idx0 == 1) {
+      GenovecInvertUnsafe(sample_ct, genovec);
+      return kPglRetSuccess;
+    }
+    if (!allele_idx1) {
+      GenovecNonzeroToMissingThenInvertUnsafe(sample_ct, genovec);
+      return kPglRetSuccess;
+    }
+    GenovecNontwoToMissingUnsafe(sample_ct, genovec);
+    return kPglRetSuccess;
+  }
+  uintptr_t* raw_genovec = pgrp->workspace_vec;
+  const unsigned char* fread_ptr;
+  const unsigned char* fread_end;
+  PglErr reterr = ReadRawGenovec(subsetting_required, vidx, pgrp, &fread_ptr, &fread_end, raw_genovec);
+  if (unlikely(reterr)) {
+    return reterr;
+  }
+  ZeroTrailingNyps(raw_sample_ct, raw_genovec);
+
+  uint32_t invert = 0;
+  if (allele_idx0 > allele_idx1) {
+    const uint32_t swap = allele_idx0;
+    allele_idx0 = allele_idx1;
+    allele_idx1 = swap;
+    invert = 1;
+  }
+  if (allele_idx0 > 1) {
+    SetAllBits(2 * sample_ct, genovec);
+  } else {
+    CopyNyparrNonemptySubset(raw_genovec, sample_include, raw_sample_ct, sample_ct, genovec);
+    Rotate2(allele_idx0, allele_idx1, sample_ct, genovec);
+  }
+  const uint32_t aux1_first_byte = *fread_ptr++;
+  const uint32_t aux1a_mode = aux1_first_byte & 15;
+  const uint32_t aux1b_mode = aux1_first_byte >> 4;
+  uint32_t raw_01_ct = 0;
+  uint32_t raw_10_ct = 0;
+  if ((!aux1a_mode) || (!aux1b_mode)) {
+    GenovecCount12Unsafe(raw_genovec, raw_sample_ct, &raw_01_ct, &raw_10_ct);
+  }
+  if (!subsetting_required) {
+    sample_include = nullptr;
+  }
+  const uintptr_t* allele_idx_offsets = pgrp->fi.allele_idx_offsets;
+  const uint32_t allele_ct = allele_idx_offsets[vidx + 1] - allele_idx_offsets[vidx];
+  uint32_t* deltalist_workspace = pgrp->workspace_difflist_sample_ids;
+  if (!allele_idx0) {
+    // Two cases:
+    // - If allele_idx == 1, convert all aux1a entries from 01 to 11.
+    // - Otherwise, for each matching aux1a entry, convert from 11 to 01.
+    reterr = GenoarrAux1aUpdate(fread_end, sample_include, sample_include_cumulative_popcounts, raw_genovec, aux1a_mode, raw_sample_ct, allele_ct, allele_idx1, 2, raw_01_ct, &fread_ptr, genovec, deltalist_workspace);
+  } else {
+    reterr = SkipAux1a(fread_end, aux1a_mode, raw_sample_ct, allele_ct, raw_01_ct, &fread_ptr);
+  }
+  if (unlikely(reterr)) {
+    return reterr;
+  }
+  reterr = GenoarrAux1bUpdate2(fread_end, sample_include, sample_include_cumulative_popcounts, raw_genovec, aux1b_mode, raw_sample_ct, allele_ct, allele_idx0, allele_idx1, raw_10_ct, &fread_ptr, genovec, deltalist_workspace);
+  if (unlikely(reterr)) {
+    return reterr;
+  }
+  if (invert) {
+    GenovecInvertUnsafe(sample_ct, genovec);
+  }
+  return kPglRetSuccess;
+}
+
+void PreinitPgv(PgenVariant* pgvp) {
+  pgvp->genovec = nullptr;
+  pgvp->patch_01_set = nullptr;
+  pgvp->patch_01_vals = nullptr;
+  pgvp->patch_10_set = nullptr;
+  pgvp->patch_10_vals = nullptr;
+  pgvp->phasepresent = nullptr;
+  pgvp->phaseinfo = nullptr;
+  pgvp->dosage_present = nullptr;
+  pgvp->dosage_main = nullptr;
+  pgvp->multidosage_present = nullptr;
+  pgvp->multidosage_cts = nullptr;
+  pgvp->multidosage_codes = nullptr;
+  pgvp->multidosage_vals = nullptr;
+  pgvp->dphase_present = nullptr;
+  pgvp->dphase_delta = nullptr;
+  pgvp->multidphase_present = nullptr;
+  pgvp->multidphase_cts = nullptr;
+  pgvp->multidphase_codes = nullptr;
+  pgvp->multidphase_delta = nullptr;
+
+  pgvp->patch_01_ct = 0;
+  pgvp->patch_10_ct = 0;
+  pgvp->phasepresent_ct = 0;
+  pgvp->dosage_ct = 0;
+  pgvp->multidosage_sample_ct = 0;
+  pgvp->dphase_ct = 0;
+  pgvp->multidphase_sample_ct = 0;
+}
+
+// similar to ParseAndSaveDifflist()
+PglErr ParseAndSaveDeltalistAsBitarr(const unsigned char* fread_end, uint32_t raw_sample_ct, const unsigned char** fread_pp, uintptr_t* deltalist_include, uint32_t* deltalist_len_ptr) {
+  const unsigned char* group_info_iter;
+  PglErr reterr = ParseDifflistHeader(fread_end, raw_sample_ct, fread_pp, nullptr, &group_info_iter, deltalist_len_ptr);
+  const uint32_t deltalist_len = *deltalist_len_ptr;
+  if (reterr || (!deltalist_len)) {
+    return reterr;
+  }
+  const uint32_t sample_id_byte_ct = BytesToRepresentNzU32(raw_sample_ct);
+  const uint32_t raw_sample_ctl = BitCtToWordCt(raw_sample_ct);
+  const uint32_t group_idx_last = (deltalist_len - 1) / kPglDifflistGroupSize;
+  ZeroWArr(raw_sample_ctl, deltalist_include);
+  uint32_t group_len_m1 = kPglDifflistGroupSize - 1;
+  for (uint32_t group_idx = 0; ; ++group_idx) {
+    if (group_idx >= group_idx_last) {
+      if (group_idx > group_idx_last) {
+        return kPglRetSuccess;
+      }
+      group_len_m1 &= deltalist_len - 1;
+    }
+    uintptr_t raw_sample_idx = SubU32Load(group_info_iter, sample_id_byte_ct);
+    group_info_iter = &(group_info_iter[sample_id_byte_ct]);
+    for (uint32_t raw_deltalist_idx_lowbits = 0; ; ++raw_deltalist_idx_lowbits) {
+      // always check, otherwise we may scribble over arbitrary memory
+      if (unlikely(raw_sample_idx >= raw_sample_ct)) {
+        return kPglRetMalformedInput;
+      }
+      SetBit(raw_sample_idx, deltalist_include);
+      if (raw_deltalist_idx_lowbits == group_len_m1) {
+        break;
+      }
+      raw_sample_idx += GetVint31(fread_end, fread_pp);
+    }
+  }
+}
+
+static_assert(sizeof(AlleleCode) == 1, "GetAux1aCodes() must be updated.");
+// read-buffer patch_01_vals, patch_10_vals, etc. assumed to be word-aligned.
+PglErr GetAux1aCodes(const unsigned char* fread_end, uint32_t rare01_ct, uint32_t allele_ct, const unsigned char** fread_pp, AlleleCode* __restrict patch_01_vals) {
+  if (allele_ct == 3) {
+    memset(patch_01_vals, 2, rare01_ct);
+    return kPglRetSuccess;
+  }
+  const unsigned char* patch_01_fvals = *fread_pp;
+  if (allele_ct == 4) {
+    const uint32_t patch_01_fvals_byte_ct = DivUp(rare01_ct, CHAR_BIT);
+    if (PtrAddCk(fread_end, patch_01_fvals_byte_ct, fread_pp)) {
+      return kPglRetMalformedInput;
+    }
+    Expand1bitTo8(patch_01_fvals, rare01_ct, 2, patch_01_vals);
+    return kPglRetSuccess;
+  }
+  if (allele_ct < 7) {
+    const uint32_t patch_01_fvals_byte_ct = DivUp(rare01_ct, 4);
+    if (PtrAddCk(fread_end, patch_01_fvals_byte_ct, fread_pp)) {
+      return kPglRetMalformedInput;
+    }
+    Expand2bitTo8(patch_01_fvals, rare01_ct, 2, patch_01_vals);
+    return kPglRetSuccess;
+  }
+  if (allele_ct < 19) {
+    const uint32_t patch_01_fvals_byte_ct = DivUp(rare01_ct, 2);
+    if (PtrAddCk(fread_end, patch_01_fvals_byte_ct, fread_pp)) {
+      return kPglRetMalformedInput;
+    }
+    Expand4bitTo8(patch_01_fvals, rare01_ct, 2, patch_01_vals);
+    return kPglRetSuccess;
+  }
+  if (PtrAddCk(fread_end, rare01_ct, fread_pp)) {
+    return kPglRetMalformedInput;
+  }
+  // todo: verify the compiler recognizes this
+  for (uint32_t uii = 0; uii < rare01_ct; ++uii) {
+    patch_01_vals[uii] = patch_01_fvals[uii] + 2;
+  }
+  return kPglRetSuccess;
+}
+
+// Assumes aux1a_mode != 15.
+PglErr ExportAux1a(const unsigned char* fread_end, const uintptr_t* __restrict raw_genoarr, uint32_t aux1a_mode, uint32_t raw_sample_ct, uint32_t allele_ct, uint32_t raw_01_ct, const unsigned char** fread_pp, uintptr_t* __restrict patch_01_set, AlleleCode* __restrict patch_01_vals, uint32_t* __restrict rare01_ctp) {
+  uint32_t rare01_ct;
+  if (!aux1a_mode) {
+    const unsigned char* patch_01_fset = *fread_pp;
+    const uint32_t fset_byte_ct = DivUp(raw_01_ct, CHAR_BIT);
+    if (PtrAddCk(fread_end, fset_byte_ct, fread_pp)) {
+      return kPglRetMalformedInput;
+    }
+    rare01_ct = PopcountBytes(patch_01_fset, fset_byte_ct);
+    ExpandBytearrFromGenoarr(patch_01_fset, raw_genoarr, kMask5555, NypCtToWordCt(raw_sample_ct), raw_01_ct, 0, patch_01_set);
+  } else {
+    if (unlikely(ParseAndSaveDeltalistAsBitarr(fread_end, raw_sample_ct, fread_pp, patch_01_set, &rare01_ct))) {
+      return kPglRetMalformedInput;
+    }
+  }
+  *rare01_ctp = rare01_ct;
+  return GetAux1aCodes(fread_end, rare01_ct, allele_ct, fread_pp, patch_01_vals);
+}
+
+PglErr ExportAux1aProperSubset(const unsigned char* fread_end, const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, const uintptr_t* __restrict raw_genoarr, uint32_t aux1a_mode, uint32_t raw_sample_ct, uint32_t sample_ct, uint32_t allele_ct, uint32_t raw_01_ct, const unsigned char** fread_pp, uintptr_t* __restrict dst_01_set, AlleleCode* __restrict dst_01_vals, uint32_t* __restrict rare01_ctp, uint32_t* __restrict deltalist_workspace) {
+  const uint32_t allele_code_width = GetAux1aWidth(allele_ct);
+  const uintptr_t allele_code_mask = (1U << allele_code_width) - 1;
+  memset(dst_01_set, 0, BitCtToWordCt(sample_ct) * sizeof(intptr_t));
+  AlleleCode* dst_01_vals_iter = dst_01_vals;
+  if (!aux1a_mode) {
+    // similar to GenoarrAux1aUpdate()
+    const unsigned char* patch_01_fset = *fread_pp;
+    const uint32_t fset_byte_ct = DivUp(raw_01_ct, CHAR_BIT);
+    const uint32_t rare01_ct = PopcountBytes(patch_01_fset, fset_byte_ct);
+    if (PtrAddCk(fread_end, fset_byte_ct, fread_pp)) {
+      return kPglRetMalformedInput;
+    }
+    const unsigned char* patch_01_fvals = *fread_pp;
+    uintptr_t sample_hwidx = 0;
+    uintptr_t cur_raw_genoarr_hets = Word01(raw_genoarr[0]);
+    uint32_t loop_len = kBitsPerWord;
+    const uintptr_t fvals_byte_ct = DivUpU64(S_CAST(uint64_t, rare01_ct) * allele_code_width, 8);
+    if (PtrAddCk(fread_end, fvals_byte_ct, fread_pp)) {
+      return kPglRetMalformedInput;
+    }
+    const uint32_t fset_word_ct_m1 = (fset_byte_ct - 1) / kBytesPerWord;
+    const uint32_t fvals_word_ct_m1 = (fvals_byte_ct - 1) / kBytesPerWord;
+    uintptr_t fvals_bits = 0;
+    uint32_t fvals_widx = 0;
+    uint32_t rare01_lowbits = kBitsPerWord;
+    for (uint32_t fset_widx = 0; ; ++fset_widx) {
+      uintptr_t fset_bits;
+      if (fset_widx >= fset_word_ct_m1) {
+        if (fset_widx > fset_word_ct_m1) {
+          break;
+        }
+        fset_bits = SubwordLoad(&(patch_01_fset[fset_word_ct_m1 * kBytesPerWord]), ModNz(fset_byte_ct, kBytesPerWord));
+        loop_len = ModNz(raw_01_ct, kBitsPerWord);
+      } else {
+        CopyFromUnalignedOffsetW(&fset_bits, patch_01_fset, fset_widx);
+      }
+      if (allele_ct == 3) {
+        for (uint32_t uii = 0; uii != loop_len; ++uii) {
+          while (!cur_raw_genoarr_hets) {
+            cur_raw_genoarr_hets = Word01(raw_genoarr[++sample_hwidx]);
+          }
+          if (fset_bits & 1) {
+            const uint32_t sample_uidx_lowbits = ctzw(cur_raw_genoarr_hets) / 2;
+            if ((DowncastKWToHW(sample_include)[sample_hwidx]) & (1U << sample_uidx_lowbits)) {
+              const uint32_t sample_idx = RawToSubsettedPos(sample_include, sample_include_cumulative_popcounts, sample_hwidx * kBitsPerWordD2 + sample_uidx_lowbits);
+              SetBit(sample_idx, dst_01_set);
+              *dst_01_vals_iter++ = 2;
+            }
+          }
+          cur_raw_genoarr_hets &= cur_raw_genoarr_hets - 1;
+          fset_bits = fset_bits >> 1;
+        }
+      } else {
+        for (uint32_t uii = 0; uii != loop_len; ++uii) {
+          while (!cur_raw_genoarr_hets) {
+            cur_raw_genoarr_hets = Word01(raw_genoarr[++sample_hwidx]);
+          }
+          if (fset_bits & 1) {
+            if (rare01_lowbits == kBitsPerWord) {
+              if (fvals_widx == fvals_word_ct_m1) {
+                fvals_bits = SubwordLoad(&(patch_01_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+              } else {
+                CopyFromUnalignedOffsetW(&fvals_bits, patch_01_fvals, fvals_widx);
+              }
+              // unnecessary to apply bzhi here
+              ++fvals_widx;
+              rare01_lowbits = 0;
+            }
+            const uint32_t sample_uidx_lowbits = ctzw(cur_raw_genoarr_hets) / 2;
+            if ((DowncastKWToHW(sample_include)[sample_hwidx]) & (1U << sample_uidx_lowbits)) {
+              const uint32_t sample_idx = RawToSubsettedPos(sample_include, sample_include_cumulative_popcounts, sample_hwidx * kBitsPerWordD2 + sample_uidx_lowbits);
+              SetBit(sample_idx, dst_01_set);
+              *dst_01_vals_iter++ = 2 + ((fvals_bits >> rare01_lowbits) & allele_code_mask);
+            }
+            rare01_lowbits += allele_code_width;
+          }
+          cur_raw_genoarr_hets &= cur_raw_genoarr_hets - 1;
+          fset_bits = fset_bits >> 1;
+        }
+      }
+    }
+    *rare01_ctp = dst_01_vals_iter - dst_01_vals;
+    return kPglRetSuccess;
+  }
+  // aux1a_mode == 1
+  uint32_t rare01_ct;
+  PglErr reterr = ParseAndSaveDeltalist(fread_end, raw_sample_ct, fread_pp, deltalist_workspace, &rare01_ct);
+  if (unlikely(reterr)) {
+    return reterr;
+  }
+  const unsigned char* patch_01_fvals = *fread_pp;
+  const uintptr_t fvals_byte_ct = DivUpU64(S_CAST(uint64_t, rare01_ct) * allele_code_width, 8);
+  if (PtrAddCk(fread_end, fvals_byte_ct, fread_pp)) {
+    return kPglRetMalformedInput;
+  }
+  if (allele_ct == 3) {
+    for (uint32_t rare01_idx = 0; rare01_idx != rare01_ct; ++rare01_idx) {
+      const uint32_t sample_uidx = deltalist_workspace[rare01_idx];
+      // could wrap this boilerplate
+      const uint32_t sample_widx = sample_uidx / kBitsPerWord;
+      const uintptr_t lowbit = k1LU << (sample_uidx % kBitsPerWord);
+      const uintptr_t sample_include_word = sample_include[sample_widx];
+      if (sample_include_word & lowbit) {
+        const uint32_t sample_idx = sample_include_cumulative_popcounts[sample_widx] + PopcountWord(sample_include_word & (lowbit - 1));
+        SetBit(sample_idx, dst_01_set);
+        *dst_01_vals_iter++ = 2;
+      }
+    }
+    *rare01_ctp = dst_01_vals_iter - dst_01_vals;
+    return kPglRetSuccess;
+  }
+  const uint32_t fvals_word_ct_m1 = (fvals_byte_ct - 1) / kBytesPerWord;
+  const uint32_t allele_code_logwidth = ctzu32(allele_code_width);
+  uint32_t loop_len = kBitsPerWord >> allele_code_logwidth;
+  for (uint32_t fvals_widx = 0; ; ++fvals_widx) {
+    uintptr_t fvals_bits;
+    if (fvals_widx >= fvals_word_ct_m1) {
+      if (fvals_widx > fvals_word_ct_m1) {
+        break;
+      }
+      fvals_bits = SubwordLoad(&(patch_01_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+      loop_len = 1 + ((rare01_ct - 1) & (loop_len - 1));
+    } else {
+      CopyFromUnalignedOffsetW(&fvals_bits, patch_01_fvals, fvals_widx);
+    }
+    const uint32_t* cur_deltalist_base = &(deltalist_workspace[fvals_widx << (kBitsPerWordLog2 - allele_code_logwidth)]);
+    for (uint32_t uii = 0; uii != loop_len; ++uii) {
+      const uint32_t sample_uidx = cur_deltalist_base[uii];
+      const uint32_t sample_widx = sample_uidx / kBitsPerWord;
+      const uintptr_t lowbit = k1LU << (sample_uidx % kBitsPerWord);
+      const uintptr_t sample_include_word = sample_include[sample_widx];
+      if (sample_include_word & lowbit) {
+        const uint32_t sample_idx = sample_include_cumulative_popcounts[sample_widx] + PopcountWord(sample_include_word & (lowbit - 1));
+        SetBit(sample_idx, dst_01_set);
+        *dst_01_vals_iter++ = 2 + ((fvals_bits >> (uii << allele_code_logwidth)) & allele_code_mask);
+      }
+    }
+  }
+  *rare01_ctp = dst_01_vals_iter - dst_01_vals;
+  return kPglRetSuccess;
+}
+
+static_assert(sizeof(AlleleCode) == 1, "GetAux1bCodes() must be updated.");
+PglErr GetAux1bCodes(const unsigned char* fread_end, uint32_t rare10_ct, uint32_t allele_ct, const unsigned char** fread_pp, AlleleCode* __restrict patch_10_vals) {
+  const unsigned char* patch_10_fvals = *fread_pp;
+  if (allele_ct == 3) {
+    // 1 bit, distinguishes between 0x0201 and 0x0202
+    const uint32_t patch_10_fvals_byte_ct = DivUp(rare10_ct, CHAR_BIT);
+    if (PtrAddCk(fread_end, patch_10_fvals_byte_ct, fread_pp)) {
+      return kPglRetMalformedInput;
+    }
+    Expand1bitTo16(patch_10_fvals, rare10_ct, 0x0201, patch_10_vals);
+    return kPglRetSuccess;
+  }
+  const uint32_t rare10_ct_x2 = rare10_ct * 2;
+  if (allele_ct < 6) {
+    // 2+2 bits, add 1
+    const uint32_t patch_10_fvals_byte_ct = DivUp(rare10_ct, 2);
+    if (PtrAddCk(fread_end, patch_10_fvals_byte_ct, fread_pp)) {
+      return kPglRetMalformedInput;
+    }
+    Expand2bitTo8(patch_10_fvals, rare10_ct_x2, 1, patch_10_vals);
+    return kPglRetSuccess;
+  }
+  if (allele_ct < 18) {
+    // 4+4 bits
+    if (PtrAddCk(fread_end, rare10_ct, fread_pp)) {
+      return kPglRetMalformedInput;
+    }
+    Expand4bitTo8(patch_10_fvals, rare10_ct_x2, 1, patch_10_vals);
+    return kPglRetSuccess;
+  }
+  if (PtrAddCk(fread_end, rare10_ct_x2, fread_pp)) {
+    return kPglRetMalformedInput;
+  }
+  // todo: verify the compiler recognizes this
+  for (uint32_t uii = 0; uii < rare10_ct_x2; ++uii) {
+    patch_10_vals[uii] = patch_10_fvals[uii] + 1;
+  }
+  return kPglRetSuccess;
+}
+
+// Assumes aux1b_mode != 15.
+PglErr ExportAux1b(const unsigned char* fread_end, const uintptr_t* __restrict raw_genoarr, uint32_t aux1b_mode, uint32_t raw_sample_ct, uint32_t allele_ct, uint32_t raw_10_ct, const unsigned char** fread_pp, uintptr_t* __restrict patch_10_set, AlleleCode* __restrict patch_10_vals, uint32_t* __restrict rare10_ctp) {
+  uint32_t rare10_ct;
+  if (!aux1b_mode) {
+    const unsigned char* patch_10_fset = *fread_pp;
+    const uint32_t fset_byte_ct = DivUp(raw_10_ct, CHAR_BIT);
+    if (PtrAddCk(fread_end, fset_byte_ct, fread_pp)) {
+      return kPglRetMalformedInput;
+    }
+    rare10_ct = PopcountBytes(patch_10_fset, fset_byte_ct);
+    ExpandBytearrFromGenoarr(patch_10_fset, raw_genoarr, kMaskAAAA, NypCtToWordCt(raw_sample_ct), raw_10_ct, 0, patch_10_set);
+  } else {
+    if (unlikely(ParseAndSaveDeltalistAsBitarr(fread_end, raw_sample_ct, fread_pp, patch_10_set, &rare10_ct))) {
+      return kPglRetMalformedInput;
+    }
+  }
+  *rare10_ctp = rare10_ct;
+  return GetAux1bCodes(fread_end, rare10_ct, allele_ct, fread_pp, patch_10_vals);
+}
+
+PglErr ExportAux1bProperSubset(const unsigned char* fread_end, const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, const uintptr_t* __restrict raw_genoarr, uint32_t aux1b_mode, uint32_t raw_sample_ct, uint32_t sample_ct, uint32_t allele_ct, uint32_t raw_10_ct, const unsigned char** fread_pp, uintptr_t* __restrict dst_10_set, AlleleCode* __restrict dst_10_vals, uint32_t* __restrict rare10_ctp, uint32_t* __restrict deltalist_workspace) {
+  uintptr_t detect_hom_mask_lo;  // unused
+  const uint32_t allele_code_logwidth = GetAux1bConsts(allele_ct, &detect_hom_mask_lo);
+  const uint32_t allele_code_width = 1U << allele_code_logwidth;
+  const uintptr_t allele_code_mask = (1U << allele_code_width) - 1;
+  const uint32_t code10_logwidth = allele_code_logwidth + (allele_code_logwidth != 0);
+  const uint32_t code10_width = 1U << code10_logwidth;
+  memset(dst_10_set, 0, BitCtToWordCt(sample_ct) * sizeof(intptr_t));
+  AlleleCode* dst_10_vals_iter = dst_10_vals;
+  if (!aux1b_mode) {
+    const unsigned char* patch_10_fset = *fread_pp;
+    const uint32_t fset_byte_ct = DivUp(raw_10_ct, CHAR_BIT);
+    const uint32_t rare10_ct = PopcountBytes(patch_10_fset, fset_byte_ct);
+    if (PtrAddCk(fread_end, fset_byte_ct, fread_pp)) {
+      return kPglRetMalformedInput;
+    }
+    const unsigned char* patch_10_fvals = *fread_pp;
+    uintptr_t sample_hwidx = 0;
+    uintptr_t cur_raw_genoarr_xys = Word10(raw_genoarr[0]);
+    uint32_t loop_len = kBitsPerWord;
+    const uintptr_t fvals_byte_ct = DivUpU64(S_CAST(uint64_t, rare10_ct) * code10_width, 8);
+    if (PtrAddCk(fread_end, fvals_byte_ct, fread_pp)) {
+      return kPglRetMalformedInput;
+    }
+    const uint32_t fset_word_ct_m1 = (fset_byte_ct - 1) / kBytesPerWord;
+    const uint32_t fvals_word_ct_m1 = (fvals_byte_ct - 1) / kBytesPerWord;
+    uintptr_t fvals_bits = 0;
+    uint32_t fvals_widx = 0;
+    uint32_t rare10_lowbits = kBitsPerWord;
+    for (uint32_t fset_widx = 0; ; ++fset_widx) {
+      uintptr_t fset_bits;
+      if (fset_widx >= fset_word_ct_m1) {
+        if (fset_widx > fset_word_ct_m1) {
+          break;
+        }
+        fset_bits = SubwordLoad(&(patch_10_fset[fset_word_ct_m1 * kBytesPerWord]), ModNz(fset_byte_ct, kBytesPerWord));
+        loop_len = ModNz(raw_10_ct, kBitsPerWord);
+      } else {
+        CopyFromUnalignedOffsetW(&fset_bits, patch_10_fset, fset_widx);
+      }
+      if (allele_ct == 3) {
+        for (uint32_t uii = 0; uii != loop_len; ++uii) {
+          while (!cur_raw_genoarr_xys) {
+            cur_raw_genoarr_xys = Word10(raw_genoarr[++sample_hwidx]);
+          }
+          if (fset_bits & 1) {
+            if (rare10_lowbits == kBitsPerWord) {
+              if (fvals_widx == fvals_word_ct_m1) {
+                fvals_bits = SubwordLoad(&(patch_10_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+              } else {
+                CopyFromUnalignedOffsetW(&fvals_bits, patch_10_fvals, fvals_widx);
+              }
+              // unnecessary to apply bzhi here
+              ++fvals_widx;
+              rare10_lowbits = 0;
+            }
+            const uint32_t sample_uidx_lowbits = ctzw(cur_raw_genoarr_xys) / 2;
+            if ((DowncastKWToHW(sample_include)[sample_hwidx]) & (1U << sample_uidx_lowbits)) {
+              const uint32_t sample_idx = RawToSubsettedPos(sample_include, sample_include_cumulative_popcounts, sample_hwidx * kBitsPerWordD2 + sample_uidx_lowbits);
+              SetBit(sample_idx, dst_10_set);
+              *dst_10_vals_iter++ = 1 + ((fvals_bits >> rare10_lowbits) & 1);
+              *dst_10_vals_iter++ = 2;
+            }
+            ++rare10_lowbits;
+          }
+          cur_raw_genoarr_xys &= cur_raw_genoarr_xys - 1;
+          fset_bits = fset_bits >> 1;
+        }
+      } else {
+        for (uint32_t uii = 0; uii != loop_len; ++uii) {
+          while (!cur_raw_genoarr_xys) {
+            cur_raw_genoarr_xys = Word10(raw_genoarr[++sample_hwidx]);
+          }
+          if (fset_bits & 1) {
+            if (rare10_lowbits == kBitsPerWord) {
+              if (fvals_widx == fvals_word_ct_m1) {
+                fvals_bits = SubwordLoad(&(patch_10_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+              } else {
+                CopyFromUnalignedOffsetW(&fvals_bits, patch_10_fvals, fvals_widx);
+              }
+              // unnecessary to apply bzhi here
+              ++fvals_widx;
+              rare10_lowbits = 0;
+            }
+            const uint32_t sample_uidx_lowbits = ctzw(cur_raw_genoarr_xys) / 2;
+            if ((DowncastKWToHW(sample_include)[sample_hwidx]) & (1U << sample_uidx_lowbits)) {
+              const uint32_t sample_idx = RawToSubsettedPos(sample_include, sample_include_cumulative_popcounts, sample_hwidx * kBitsPerWordD2 + sample_uidx_lowbits);
+              SetBit(sample_idx, dst_10_set);
+              const uintptr_t cur_code_pair = fvals_bits >> rare10_lowbits;
+              const uint32_t cur_code_hi = (cur_code_pair >> allele_code_width) & allele_code_mask;
+              const uint32_t cur_code_lo = cur_code_pair & allele_code_mask;
+              *dst_10_vals_iter++ = 1 + cur_code_lo;
+              *dst_10_vals_iter++ = 1 + cur_code_hi;
+            }
+            rare10_lowbits += code10_width;
+          }
+          cur_raw_genoarr_xys &= cur_raw_genoarr_xys - 1;
+          fset_bits = fset_bits >> 1;
+        }
+      }
+    }
+    *rare10_ctp = S_CAST(uintptr_t, dst_10_vals_iter - dst_10_vals) / 2;
+    return kPglRetSuccess;
+  }
+  // aux1b_mode == 1
+  uint32_t rare10_ct;
+  PglErr reterr = ParseAndSaveDeltalist(fread_end, raw_sample_ct, fread_pp, deltalist_workspace, &rare10_ct);
+  if (unlikely(reterr)) {
+    return reterr;
+  }
+  const unsigned char* patch_10_fvals = *fread_pp;
+  const uintptr_t fvals_byte_ct = DivUpU64(S_CAST(uint64_t, rare10_ct) << code10_logwidth, 8);
+  if (PtrAddCk(fread_end, fvals_byte_ct, fread_pp)) {
+    return kPglRetMalformedInput;
+  }
+  const uint32_t fvals_word_ct_m1 = (fvals_byte_ct - 1) / kBytesPerWord;
+  uint32_t loop_len = kBitsPerWord >> code10_logwidth;
+  for (uint32_t fvals_widx = 0; ; ++fvals_widx) {
+    uintptr_t fvals_bits;
+    if (fvals_widx >= fvals_word_ct_m1) {
+      if (fvals_widx > fvals_word_ct_m1) {
+        break;
+      }
+      fvals_bits = SubwordLoad(&(patch_10_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+      loop_len = 1 + ((rare10_ct - 1) & (loop_len - 1));
+    } else {
+      CopyFromUnalignedOffsetW(&fvals_bits, patch_10_fvals, fvals_widx);
+    }
+    const uint32_t* cur_deltalist_base = &(deltalist_workspace[fvals_widx << (kBitsPerWordLog2 - code10_logwidth)]);
+    if (allele_ct == 3) {
+      for (uint32_t uii = 0; uii != loop_len; ++uii) {
+        const uint32_t sample_uidx = cur_deltalist_base[uii];
+        const uint32_t sample_widx = sample_uidx / kBitsPerWord;
+        const uintptr_t lowbit = k1LU << (sample_uidx % kBitsPerWord);
+        const uintptr_t sample_include_word = sample_include[sample_widx];
+        if (sample_include_word & lowbit) {
+          const uint32_t sample_idx = sample_include_cumulative_popcounts[sample_widx] + PopcountWord(sample_include_word & (lowbit - 1));
+          SetBit(sample_idx, dst_10_set);
+          *dst_10_vals_iter++ = 1 + ((fvals_bits >> uii) & 1);
+          *dst_10_vals_iter++ = 2;
+        }
+      }
+    } else {
+      for (uint32_t uii = 0; uii != loop_len; ++uii) {
+        const uint32_t sample_uidx = cur_deltalist_base[uii];
+        const uint32_t sample_widx = sample_uidx / kBitsPerWord;
+        const uintptr_t lowbit = k1LU << (sample_uidx % kBitsPerWord);
+        const uintptr_t sample_include_word = sample_include[sample_widx];
+        if (sample_include_word & lowbit) {
+          const uint32_t sample_idx = sample_include_cumulative_popcounts[sample_widx] + PopcountWord(sample_include_word & (lowbit - 1));
+          SetBit(sample_idx, dst_10_set);
+          const uintptr_t cur_code_pair = fvals_bits >> (uii << code10_logwidth);
+          const uint32_t cur_code_hi = (cur_code_pair >> allele_code_width) & allele_code_mask;
+          const uint32_t cur_code_lo = cur_code_pair & allele_code_mask;
+          *dst_10_vals_iter++ = 1 + cur_code_lo;
+          *dst_10_vals_iter++ = 1 + cur_code_hi;
+        }
+      }
+    }
+  }
+  *rare10_ctp = S_CAST(uintptr_t, dst_10_vals_iter - dst_10_vals) / 2;
+  return kPglRetSuccess;
+}
+
+// Assumes sample_ct > 0, multiallelic-hc track is present, and patch_01_ct and
+// patch_10_ct are zero-initialized.
+PglErr GetMultiallelicCodes(const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, uint32_t sample_ct, uint32_t vidx, PgenReaderMain* pgrp, const unsigned char** fread_pp, const unsigned char** fread_endp, uintptr_t* __restrict all_hets, PgenVariant* pgvp) {
+  const uint32_t raw_sample_ct = pgrp->fi.raw_sample_ct;
+  uint32_t subsetting_required = (sample_ct != raw_sample_ct);
+  uintptr_t* raw_genovec = pgrp->workspace_vec;
+  const unsigned char* fread_ptr;
+  const unsigned char* fread_end;
+  PglErr reterr = ReadRawGenovec(subsetting_required, vidx, pgrp, &fread_ptr, &fread_end, raw_genovec);
+  if (unlikely(reterr)) {
+    return reterr;
+  }
+  CopyNyparrNonemptySubset(raw_genovec, sample_include, raw_sample_ct, sample_ct, pgvp->genovec);
+  ZeroTrailingNyps(raw_sample_ct, raw_genovec);
+  const uint32_t aux1_first_byte = *fread_ptr++;
+  const uint32_t aux1a_mode = aux1_first_byte & 15;
+  const uint32_t aux1b_mode = aux1_first_byte >> 4;
+  uint32_t raw_01_ct = 0;
+  uint32_t raw_10_ct = 0;
+  if ((!aux1a_mode) || (!aux1b_mode)) {
+    GenovecCount12Unsafe(raw_genovec, raw_sample_ct, &raw_01_ct, &raw_10_ct);
+  }
+  const uintptr_t* allele_idx_offsets = pgrp->fi.allele_idx_offsets;
+  const uint32_t allele_ct = allele_idx_offsets[vidx + 1] - allele_idx_offsets[vidx];
+  uint32_t* deltalist_workspace = pgrp->workspace_difflist_sample_ids;
+  if (aux1a_mode != 15) {
+    if (!subsetting_required) {
+      reterr = ExportAux1a(fread_end, raw_genovec, aux1a_mode, raw_sample_ct, allele_ct, raw_01_ct, &fread_ptr, pgvp->patch_01_set, pgvp->patch_01_vals, &(pgvp->patch_01_ct));
+    } else {
+      reterr = ExportAux1aProperSubset(fread_end, sample_include, sample_include_cumulative_popcounts, raw_genovec, aux1a_mode, raw_sample_ct, sample_ct, allele_ct, raw_01_ct, &fread_ptr, pgvp->patch_01_set, pgvp->patch_01_vals, &(pgvp->patch_01_ct), deltalist_workspace);
+    }
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+  }
+  const unsigned char* aux1b_start = fread_ptr;
+  if (aux1b_mode != 15) {
+    if (!subsetting_required) {
+      reterr = ExportAux1b(fread_end, raw_genovec, aux1b_mode, raw_sample_ct, allele_ct, raw_10_ct, &fread_ptr, pgvp->patch_10_set, pgvp->patch_10_vals, &(pgvp->patch_10_ct));
+    } else {
+      reterr = ExportAux1bProperSubset(fread_end, sample_include, sample_include_cumulative_popcounts, raw_genovec, aux1b_mode, raw_sample_ct, sample_ct, allele_ct, raw_10_ct, &fread_ptr, pgvp->patch_10_set, pgvp->patch_10_vals, &(pgvp->patch_10_ct), deltalist_workspace);
+    }
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+  }
+  if (fread_pp) {
+    *fread_pp = fread_ptr;
+    *fread_endp = fread_end;
+    if (all_hets) {
+      PgrDetectGenoarrHets(raw_genovec, raw_sample_ct, all_hets);
+      if (aux1b_mode != 15) {
+        // can merge this with ExportAux1b functions later
+        uintptr_t* aux1b_hets = pgrp->workspace_aux1x_present;
+        uint32_t aux1b_het_present;
+        reterr = GetAux1bHets(fread_end, raw_genovec, aux1b_mode, raw_sample_ct, allele_ct, raw_10_ct, &aux1b_start, aux1b_hets, &aux1b_het_present, deltalist_workspace);
+        if (unlikely(reterr)) {
+          return reterr;
+        }
+        if (aux1b_het_present) {
+          BitvecOr(aux1b_hets, BitCtToWordCt(raw_sample_ct), all_hets);
+        }
+      }
+    }
+  }
+  return kPglRetSuccess;
+}
+
+PglErr PgrGetM(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, PgenReader* pgr_ptr, PgenVariant* pgvp) {
+  pgvp->patch_01_ct = 0;
+  pgvp->patch_10_ct = 0;
+  if (!sample_ct) {
+    return kPglRetSuccess;
+  }
+  PgenReaderMain* pgrp = GetPgrp(pgr_ptr);
+  const uint32_t* sample_include_cumulative_popcounts = GetSicp(pssi);
+  const uint32_t vrtype = GetPgfiVrtype(&(pgrp->fi), vidx);
+  const uint32_t multiallelic_hc_present = VrtypeMultiallelicHc(vrtype);
+  if (!multiallelic_hc_present) {
+    return ReadGenovecSubsetUnsafe(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, pgrp, nullptr, nullptr, pgvp->genovec);
+  }
+  return GetMultiallelicCodes(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, pgrp, nullptr, nullptr, nullptr, pgvp);
+}
+
+void PgrDetectGenoarrHetsMultiallelic(const uintptr_t* __restrict genoarr, const uintptr_t* __restrict patch_10_set, const AlleleCode* __restrict patch_10_vals, uint32_t raw_sample_ct, uintptr_t* __restrict all_hets) {
+  const Halfword* patch_10_set_alias = DowncastKWToHW(patch_10_set);
+  const AlleleCode* patch_10_vals_iter = patch_10_vals;
+  const uint32_t word_ct_m1 = (raw_sample_ct - 1) / kBitsPerWordD2;
+  Halfword* all_hets_hw = DowncastWToHW(all_hets);
+  for (uint32_t widx = 0; ; ++widx) {
+    uintptr_t cur_geno_word;
+    if (widx >= word_ct_m1) {
+      if (widx > word_ct_m1) {
+        if (widx % 2) {
+          all_hets_hw[widx] = 0;
+        }
+        return;
+      }
+      const uint32_t final_ct = ModNz(raw_sample_ct, kBitsPerWordD2);
+      cur_geno_word = bzhi_max(genoarr[widx], 2 * final_ct);
+    } else {
+      cur_geno_word = genoarr[widx];
+    }
+    uint32_t patch_10_hw = patch_10_set_alias[widx];
+    uint32_t cur_hets = Pack01ToHalfword(cur_geno_word);
+    while (patch_10_hw) {
+      const AlleleCode code1 = *patch_10_vals_iter++;
+      const AlleleCode code2 = *patch_10_vals_iter++;
+      const uint32_t lowbit = patch_10_hw & (-patch_10_hw);
+      if (code1 != code2) {
+        cur_hets |= lowbit;
+      }
+      patch_10_hw ^= lowbit;
+    }
+    all_hets_hw[widx] = cur_hets;
+  }
+}
+
+PglErr SkipAux1b(const unsigned char* fread_end, uint32_t aux1b_mode, uint32_t raw_sample_ct, uint32_t allele_ct, uint32_t raw_10_ct, const unsigned char** fread_pp) {
+  if (aux1b_mode == 15) {
+    return kPglRetSuccess;
+  }
+  uint32_t rare10_ct;
+  if (!aux1b_mode) {
+    const uint32_t fset_byte_ct = DivUp(raw_10_ct, CHAR_BIT);
+    rare10_ct = PopcountBytes(*fread_pp, fset_byte_ct);
+    *fread_pp += fset_byte_ct;
+  } else {
+    const unsigned char* group_info_iter;
+    PglErr reterr = ParseDifflistHeader(fread_end, raw_sample_ct, fread_pp, nullptr, &group_info_iter, &rare10_ct);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+    reterr = SkipDeltalistIds(fread_end, group_info_iter, rare10_ct, raw_sample_ct, 0, fread_pp);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+  }
+  const uint32_t fvals_byte_ct = GetAux1bAlleleEntryByteCt(allele_ct, rare10_ct);
+  if (PtrAddCk(fread_end, fvals_byte_ct, fread_pp)) {
+    return kPglRetMalformedInput;
+  }
+  return kPglRetSuccess;
+}
+
+PglErr SkipAux1(const unsigned char* fread_end, const uintptr_t* __restrict raw_genovec, uint32_t raw_sample_ct, uint32_t allele_ct, const unsigned char** fread_pp) {
+  const uint32_t aux1_first_byte = **fread_pp;
+  (*fread_pp) += 1;
+  const uint32_t aux1a_mode = aux1_first_byte & 15;
+  const uint32_t aux1b_mode = aux1_first_byte >> 4;
+  uint32_t raw_01_ct = 0;
+  uint32_t raw_10_ct = 0;
+  if ((!aux1a_mode) || (!aux1b_mode)) {
+    GenovecCount12Unsafe(raw_genovec, raw_sample_ct, &raw_01_ct, &raw_10_ct);
+  }
+  PglErr reterr = SkipAux1a(fread_end, aux1a_mode, raw_sample_ct, allele_ct, raw_01_ct, fread_pp);
+  if (unlikely(reterr)) {
+    return reterr;
+  }
+  return SkipAux1b(fread_end, aux1b_mode, raw_sample_ct, allele_ct, raw_10_ct, fread_pp);
+}
+
+// sample_include assumed to be nullptr if no subsetting required
+// subsetted_suppressed_het should only be provided when you explicitly want to
+// exclude those phase entries
+// set phasepresent == phaseinfo == nullptr if you want to skip the entire
+// track; ok for phasepresent_ct_ptr to be nullptr too in that case
+// (also see SkipAux2() and GetPhasepresentAndSkipPhaseinfo() below)
+PglErr ParseAux2Subset(const unsigned char* fread_end, const uintptr_t* __restrict sample_include, const uintptr_t* __restrict all_hets, const uintptr_t* __restrict subsetted_suppressed_het, uint32_t raw_sample_ct, uint32_t sample_ct, const unsigned char** fread_pp, uintptr_t* __restrict phasepresent, uintptr_t* __restrict phaseinfo, uint32_t* __restrict phasepresent_ct_ptr, uintptr_t* __restrict workspace_subset) {
+  const uint32_t raw_sample_ctl = BitCtToWordCt(raw_sample_ct);
+  const uint32_t het_ct = PopcountWords(all_hets, raw_sample_ctl);
+  if (unlikely(!het_ct)) {
+    // there shouldn't be a hphase track at all in this case, het_ct is not
+    // computed off a subset
+    return kPglRetMalformedInput;
+  }
+  const uint32_t sample_ctl = BitCtToWordCt(sample_ct);
+  const unsigned char* aux2_start = *fread_pp;
+  if (!(aux2_start[0] & 1)) {
+    // phase always present
+    if (PtrAddCk(fread_end, 1 + (het_ct / CHAR_BIT), fread_pp)) {
+      return kPglRetMalformedInput;
+    }
+    if (!phaseinfo) {
+      // for internal callers which just want to skip aux2
+      return kPglRetSuccess;
+    }
+    if (!sample_include) {
+      memcpy(phasepresent, all_hets, raw_sample_ctl * kBytesPerWord);
+      ExpandBytearr(aux2_start, all_hets, raw_sample_ctl, het_ct, 1, phaseinfo);
+      if (!subsetted_suppressed_het) {
+        *phasepresent_ct_ptr = het_ct;
+        return kPglRetSuccess;
+      }
+    } else {
+      CopyBitarrSubset(all_hets, sample_include, sample_ct, phasepresent);
+      if (AllWordsAreZero(phasepresent, sample_ctl)) {
+        *phasepresent_ct_ptr = 0;
+        // bugfix (7 Dec 2017): clear sample_ctl words here, not raw_sample_ctl
+        ZeroWArr(sample_ctl, phaseinfo);
+        return kPglRetSuccess;
+      }
+      ExpandThenSubsetBytearr(aux2_start, all_hets, sample_include, het_ct, sample_ct, 1, phaseinfo);
+    }
+    // bugfix (25 Feb 2020): forgot to mask out subsetted_suppressed_het here
+  } else {
+    const uint32_t het_ctdl = het_ct / kBitsPerWord;
+
+    // explicit phasepresent
+    uintptr_t* aux2_first_part_copy = workspace_subset;
+    aux2_first_part_copy[het_ctdl] = 0;
+    memcpy(aux2_first_part_copy, aux2_start, 1 + (het_ct / CHAR_BIT));
+    const uint32_t raw_phasepresent_ct = PopcountWords(aux2_first_part_copy, het_ctdl + 1) - 1;
+    if (unlikely(!raw_phasepresent_ct)) {
+      // there shouldn't be a hphase track at all in this case
+      return kPglRetMalformedInput;
+    }
+    const unsigned char* aux2_second_part = &(aux2_start[1 + (het_ct / CHAR_BIT)]);
+    *fread_pp = aux2_second_part;
+    if (PtrAddCk(fread_end, DivUp(raw_phasepresent_ct, CHAR_BIT), fread_pp)) {
+      return kPglRetMalformedInput;
+    }
+    if (!phaseinfo) {
+      return kPglRetSuccess;
+    }
+    if (!sample_include) {
+      ExpandBytearrNested(aux2_second_part, aux2_first_part_copy, all_hets, sample_ctl, raw_phasepresent_ct, 1, phasepresent, phaseinfo);
+      if (!subsetted_suppressed_het) {
+        *phasepresent_ct_ptr = raw_phasepresent_ct;
+        return kPglRetSuccess;
+      }
+    } else {
+      // could skip if intersection of phasepresent with sample_include is
+      // empty, but this function call should be fast enough there anyway?
+      ExpandThenSubsetBytearrNested(aux2_second_part, aux2_first_part_copy, all_hets, sample_include, sample_ct, raw_phasepresent_ct, 1, phasepresent, phaseinfo);
+    }
+  }
+  if (subsetted_suppressed_het) {
+    BitvecInvmask(subsetted_suppressed_het, sample_ctl, phasepresent);
+  }
+  *phasepresent_ct_ptr = PopcountWords(phasepresent, sample_ctl);
+  return kPglRetSuccess;
+}
+
+PglErr SkipAux2(const unsigned char* fread_end, uint32_t het_ct, const unsigned char** fread_pp, uint32_t* __restrict phasepresent_ctp) {
+  const unsigned char* aux2_start = *fread_pp;
+  const uint32_t aux2_first_part_byte_ct = 1 + (het_ct / CHAR_BIT);
+  if (PtrAddCk(fread_end, aux2_first_part_byte_ct, fread_pp)) {
+    return kPglRetMalformedInput;
+  }
+  if (!(aux2_start[0] & 1)) {
+    if (phasepresent_ctp) {
+      *phasepresent_ctp = het_ct;
+    }
+    return kPglRetSuccess;
+  }
+  const uint32_t phasepresent_ct = PopcountBytes(aux2_start, aux2_first_part_byte_ct) - 1;
+  if (phasepresent_ctp) {
+    *phasepresent_ctp = phasepresent_ct;
+  }
+  if (PtrAddCk(fread_end, DivUp(phasepresent_ct, CHAR_BIT), fread_pp)) {
+    return kPglRetMalformedInput;
+  }
+  return kPglRetSuccess;
+}
+
+// If fread_pp/fread_endp are non-null, this always moves fread_ptr to the end
+// of aux2.  Set phasepresent/phaseinfo to nullptr when you don't actually care
+// about the contents of aux2.
+// In multiallelic case, this guarantees phasepresent bits are only set at
+// ref/altx hets, not at altx/alty hets.  (We don't currently guarantee this
+// for phaseinfo, since popcounts on that array are meaningless.)  Yes, this is
+// mildly annoying, but the code would be messier if the ordering of
+// multiallelic-hardcall and hardcall-phase info were swapped.
+PglErr ReadGenovecHphaseSubsetUnsafe(const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, uint32_t sample_ct, uint32_t vidx, PgenReaderMain* pgrp, const unsigned char** fread_pp, const unsigned char** fread_endp, uintptr_t* __restrict genovec, uintptr_t* __restrict phasepresent, uintptr_t* __restrict phaseinfo, uint32_t* phasepresent_ct_ptr) {
+  const uint32_t vrtype = GetPgfiVrtype(&(pgrp->fi), vidx);
+  if ((!(vrtype & 0x18)) || ((!fread_pp) && (!VrtypeHphase(vrtype)))) {
+    *phasepresent_ct_ptr = 0;
+    return ReadGenovecSubsetUnsafe(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, pgrp, fread_pp, fread_endp, genovec);
+  }
+  // Either hphase track is present; or if it's absent, multiallelic track is
+  // present and we were asked to advance fread_ptr to the end of aux2.
+  const uint32_t raw_sample_ct = pgrp->fi.raw_sample_ct;
+  const uint32_t subsetting_required = (sample_ct != raw_sample_ct);
+  uintptr_t* raw_genovec = (subsetting_required || VrtypeMultiallelicHc(vrtype))? pgrp->workspace_vec : genovec;
+  const unsigned char* fread_ptr;
+  const unsigned char* fread_end;
+  PglErr reterr = ReadRawGenovec(subsetting_required, vidx, pgrp, &fread_ptr, &fread_end, raw_genovec);
+  if (unlikely(reterr)) {
+    return reterr;
+  }
+  ZeroTrailingNyps(raw_sample_ct, raw_genovec);
+  const uintptr_t* allele_idx_offsets = pgrp->fi.allele_idx_offsets;
+  const uint32_t allele_ct = allele_idx_offsets? (allele_idx_offsets[vidx + 1] - allele_idx_offsets[vidx]) : 2;
+  if (raw_genovec != genovec) {
+    CopyNyparrNonemptySubset(raw_genovec, sample_include, raw_sample_ct, sample_ct, genovec);
+    if (!VrtypeHphase(vrtype)) {
+      // only possible if multiallelic track present and fread_ptr must be
+      // advanced to end of aux2
+      *fread_pp = fread_ptr;
+      *fread_endp = fread_end;
+      return SkipAux1(fread_end, raw_genovec, raw_sample_ct, allele_ct, fread_pp);
+    }
+  }
+  uintptr_t* all_hets = pgrp->workspace_all_hets;
+  PgrDetectGenoarrHets(raw_genovec, raw_sample_ct, all_hets);
+  uintptr_t* subsetted_suppressed_het = nullptr;
+  if (VrtypeMultiallelicHc(vrtype)) {
+    const uint32_t aux1_first_byte = *fread_ptr++;
+    const uint32_t aux1a_mode = aux1_first_byte & 15;
+    const uint32_t aux1b_mode = aux1_first_byte >> 4;
+    uint32_t raw_01_ct = 0;
+    uint32_t raw_10_ct = 0;
+    if ((!aux1a_mode) || (!aux1b_mode)) {
+      GenovecCount12Unsafe(raw_genovec, raw_sample_ct, &raw_01_ct, &raw_10_ct);
+    }
+    reterr = SkipAux1a(fread_end, aux1a_mode, raw_sample_ct, allele_ct, raw_01_ct, &fread_ptr);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+    // 1. fill workspace_aux1x_present with aux1b
+    // 2. clear bit for each hom-altx call in aux1b
+    // 3. bitvec-or to set new workspace_all_hets bits
+    // 4. if not subsetting, set subsetted_suppressed_het := workspace_all_hets
+    //    if subsetting, copy-subset to pgrp->workspace_vec and set to that
+    //    if AllWordsAreZero, keep as nullptr
+    uintptr_t* aux1b_hets = pgrp->workspace_aux1x_present;
+    uint32_t* deltalist_workspace = pgrp->workspace_difflist_sample_ids;
+    uint32_t aux1b_het_present;
+    reterr = GetAux1bHets(fread_end, raw_genovec, aux1b_mode, raw_sample_ct, allele_ct, raw_10_ct, &fread_ptr, aux1b_hets, &aux1b_het_present, deltalist_workspace);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+    if (aux1b_het_present) {
+      BitvecOr(aux1b_hets, BitCtToWordCt(raw_sample_ct), all_hets);
+      if (!subsetting_required) {
+        subsetted_suppressed_het = aux1b_hets;
+      } else {
+        // Don't need raw_genovec any more.
+        CopyBitarrSubset(aux1b_hets, sample_include, sample_ct, raw_genovec);
+        subsetted_suppressed_het = raw_genovec;
+      }
+    }
+  }
+  reterr = ParseAux2Subset(fread_end, subsetting_required? sample_include : nullptr, all_hets, subsetted_suppressed_het, raw_sample_ct, sample_ct, &fread_ptr, phasepresent, phaseinfo, phasepresent_ct_ptr, pgrp->workspace_subset);
+  if (fread_pp) {
+    *fread_pp = fread_ptr;
+    *fread_endp = fread_end;
+  }
+  return reterr;
+}
+
+PglErr PgrGetP(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, PgenReader* pgr_ptr, uintptr_t* __restrict genovec, uintptr_t* __restrict phasepresent, uintptr_t* __restrict phaseinfo, uint32_t* __restrict phasepresent_ct_ptr) {
+  if (!sample_ct) {
+    *phasepresent_ct_ptr = 0;
+    return kPglRetSuccess;
+  }
+  PgenReaderMain* pgrp = GetPgrp(pgr_ptr);
+  assert(vidx < pgrp->fi.raw_variant_ct);
+  return ReadGenovecHphaseSubsetUnsafe(sample_include, GetSicp(pssi), sample_ct, vidx, pgrp, nullptr, nullptr, genovec, phasepresent, phaseinfo, phasepresent_ct_ptr);
+}
+
+// eventually want to return fread_ptr/fread_end, but not relevant until
+// multiallelic dosage working
+PglErr Get1MP(const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, uint32_t sample_ct, uint32_t vidx, uint32_t allele_idx, PgenReaderMain* pgrp, uintptr_t* __restrict allele_countvec, uintptr_t* __restrict phasepresent, uintptr_t* __restrict phaseinfo, uint32_t* __restrict phasepresent_ct_ptr) {
+  // sample_ct > 0; either allele_idx > 1 or ((allele_idx == 1) &&
+  // multiallelic_hc_present)
+  const uint32_t vrtype = pgrp->fi.vrtypes[vidx];
+  if (!VrtypeHphase(vrtype)) {
+    *phasepresent_ct_ptr = 0;
+    return IMPLPgrGet1(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, allele_idx, pgrp, allele_countvec);
+  }
+  uintptr_t* all_hets = pgrp->workspace_all_hets;
+  uintptr_t* subsetted_suppressed_het = nullptr;
+  const unsigned char* fread_ptr;
+  const unsigned char* fread_end;
+  PglErr reterr = Get1Multiallelic(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, allele_idx, pgrp, &fread_ptr, &fread_end, all_hets, allele_countvec, &subsetted_suppressed_het);
+  if (unlikely(reterr)) {
+    return reterr;
+  }
+  const uint32_t raw_sample_ct = pgrp->fi.raw_sample_ct;
+  reterr = ParseAux2Subset(fread_end, (sample_ct != raw_sample_ct)? sample_include : nullptr, all_hets, subsetted_suppressed_het, raw_sample_ct, sample_ct, &fread_ptr, phasepresent, phaseinfo, phasepresent_ct_ptr, pgrp->workspace_subset);
+  // bugfix (7 Sep 2018): Need to postprocess phasepresent when collapsing
+  // multiple alleles.
+  if (reterr || (!(*phasepresent_ct_ptr))) {
+    return reterr;
+  }
+
+  // Might want to make this its own function.
+  const uint32_t sample_ctl2 = NypCtToWordCt(sample_ct);
+  MaskWordsToHalfwordsInvmatch(allele_countvec, kMaskAAAA, sample_ctl2, phasepresent, phasepresent);
+  *phasepresent_ct_ptr = PopcountWords(phasepresent, BitCtToWordCt(sample_ct));
+
+  return kPglRetSuccess;
+}
+
+PglErr PgrGet1P(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, uint32_t allele_idx, PgenReader* pgr_ptr, uintptr_t* __restrict allele_countvec, uintptr_t* __restrict phasepresent, uintptr_t* __restrict phaseinfo, uint32_t* __restrict phasepresent_ct_ptr) {
+  if (!sample_ct) {
+    *phasepresent_ct_ptr = 0;
+    return kPglRetSuccess;
+  }
+  PgenReaderMain* pgrp = GetPgrp(pgr_ptr);
+  const uint32_t* sample_include_cumulative_popcounts = GetSicp(pssi);
+  const uint32_t vrtype = GetPgfiVrtype(&(pgrp->fi), vidx);
+  const uint32_t multiallelic_hc_present = VrtypeMultiallelicHc(vrtype);
+  if ((!allele_idx) || ((allele_idx == 1) && (!multiallelic_hc_present))) {
+    PglErr reterr = ReadGenovecHphaseSubsetUnsafe(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, pgrp, nullptr, nullptr, allele_countvec, phasepresent, phaseinfo, phasepresent_ct_ptr);
+    if (allele_idx) {
+      GenovecInvertUnsafe(sample_ct, allele_countvec);
+      if (*phasepresent_ct_ptr) {
+        BitvecInvert(BitCtToWordCt(sample_ct), phaseinfo);
+      }
+    }
+    return reterr;
+  }
+  return Get1MP(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, allele_idx, pgrp, allele_countvec, phasepresent, phaseinfo, phasepresent_ct_ptr);
+}
+
+PglErr IMPLPgrGetInv1P(const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, uint32_t sample_ct, uint32_t vidx, uint32_t allele_idx, PgenReaderMain* pgrp, uintptr_t* __restrict allele_invcountvec, uintptr_t* __restrict phasepresent, uintptr_t* __restrict phaseinfo, uint32_t* __restrict phasepresent_ct_ptr) {
+  if (!sample_ct) {
+    *phasepresent_ct_ptr = 0;
+    return kPglRetSuccess;
+  }
+  const uint32_t vrtype = GetPgfiVrtype(&(pgrp->fi), vidx);
+  const uint32_t multiallelic_hc_present = VrtypeMultiallelicHc(vrtype);
+  if ((!allele_idx) || ((allele_idx == 1) && (!multiallelic_hc_present))) {
+    PglErr reterr = ReadGenovecHphaseSubsetUnsafe(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, pgrp, nullptr, nullptr, allele_invcountvec, phasepresent, phaseinfo, phasepresent_ct_ptr);
+    if (!allele_idx) {
+      GenovecInvertUnsafe(sample_ct, allele_invcountvec);
+      if (*phasepresent_ct_ptr) {
+        BitvecInvert(BitCtToWordCt(sample_ct), phaseinfo);
+      }
+    }
+    return reterr;
+  }
+  PglErr reterr = Get1MP(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, allele_idx, pgrp, allele_invcountvec, phasepresent, phaseinfo, phasepresent_ct_ptr);
+  if (unlikely(reterr)) {
+    return reterr;
+  }
+  GenovecInvertUnsafe(sample_ct, allele_invcountvec);
+  if (*phasepresent_ct_ptr) {
+    BitvecInvert(BitCtToWordCt(sample_ct), phaseinfo);
+  }
+  return kPglRetSuccess;
+}
+
+void SuppressHets11(const uintptr_t* genovec, uintptr_t* subsetted_all_hets, uint32_t sample_ct, uintptr_t* subsetted_suppressed_hets) {
+  const uint32_t sample_ctl2 = NypCtToWordCt(sample_ct);
+  MaskWordsToHalfwordsInvmatch(genovec, 0, sample_ctl2, subsetted_all_hets, subsetted_suppressed_hets);
+}
+
+PglErr PgrGet2P(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, uint32_t allele_idx0, uint32_t allele_idx1, PgenReader* pgr_ptr, uintptr_t* __restrict genovec, uintptr_t* __restrict phasepresent, uintptr_t* __restrict phaseinfo, uint32_t* __restrict phasepresent_ct_ptr) {
+  PgenReaderMain* pgrp = GetPgrp(pgr_ptr);
+  const uint32_t* sample_include_cumulative_popcounts = GetSicp(pssi);
+  const uint32_t vrtype = GetPgfiVrtype(&(pgrp->fi), vidx);
+  if (!VrtypeHphase(vrtype)) {
+    *phasepresent_ct_ptr = 0;
+    return IMPLPgrGet2(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, allele_idx0, allele_idx1, pgrp, genovec);
+  }
+  if (!sample_ct) {
+    *phasepresent_ct_ptr = 0;
+    return kPglRetSuccess;
+  }
+  if (allele_idx0 + allele_idx1 == 1) {
+    PglErr reterr = ReadGenovecHphaseSubsetUnsafe(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, pgrp, nullptr, nullptr, genovec, phasepresent, phaseinfo, phasepresent_ct_ptr);
+    if (allele_idx0) {
+      GenovecInvertUnsafe(sample_ct, genovec);
+      if (*phasepresent_ct_ptr) {
+        BitvecInvert(BitCtToWordCt(sample_ct), phaseinfo);
+      }
+    }
+    return reterr;
+  }
+  const uint32_t raw_sample_ct = pgrp->fi.raw_sample_ct;
+  const uint32_t subsetting_required = (sample_ct != raw_sample_ct);
+  uintptr_t* raw_genovec = pgrp->workspace_vec;
+  const unsigned char* fread_ptr;
+  const unsigned char* fread_end;
+  PglErr reterr = ReadRawGenovec(subsetting_required, vidx, pgrp, &fread_ptr, &fread_end, raw_genovec);
+  if (unlikely(reterr)) {
+    return reterr;
+  }
+  ZeroTrailingNyps(raw_sample_ct, raw_genovec);
+
+  uint32_t invert = 0;
+  if (allele_idx0 > allele_idx1) {
+    const uint32_t swap = allele_idx0;
+    allele_idx0 = allele_idx1;
+    allele_idx1 = swap;
+    invert = 1;
+  }
+  if (allele_idx0 > 1) {
+    SetAllBits(2 * sample_ct, genovec);
+  } else {
+    CopyNyparrNonemptySubset(raw_genovec, sample_include, raw_sample_ct, sample_ct, genovec);
+    // allele_idx1 > 1 guaranteed
+    if (!allele_idx0) {
+      GenovecNonzeroToMissingUnsafe(sample_ct, genovec);
+    } else {
+      GenovecInvertThenNonzeroToMissingUnsafe(sample_ct, genovec);
+    }
+  }
+  uintptr_t* all_hets = pgrp->workspace_all_hets;
+  PgrDetectGenoarrHets(raw_genovec, raw_sample_ct, all_hets);
+  uintptr_t* subsetted_suppressed_het = nullptr;
+  if (!subsetting_required) {
+    sample_include = nullptr;
+  }
+
+  const uintptr_t* allele_idx_offsets = pgrp->fi.allele_idx_offsets;
+  const uint32_t allele_ct = allele_idx_offsets[vidx + 1] - allele_idx_offsets[vidx];
+  if (VrtypeMultiallelicHc(vrtype)) {
+    // This combines ReadGenovecHphaseSubsetUnsafe() and Get2()'s logic.
+    const uint32_t aux1_first_byte = *fread_ptr++;
+    const uint32_t aux1a_mode = aux1_first_byte & 15;
+    const uint32_t aux1b_mode = aux1_first_byte >> 4;
+    uint32_t raw_01_ct = 0;
+    uint32_t raw_10_ct = 0;
+    if ((!aux1a_mode) || (!aux1b_mode)) {
+      GenovecCount12Unsafe(raw_genovec, raw_sample_ct, &raw_01_ct, &raw_10_ct);
+    }
+    uint32_t* deltalist_workspace = pgrp->workspace_difflist_sample_ids;
+    if (!allele_idx0) {
+      // Two cases:
+      // - If allele_idx == 1, convert all aux1a entries from 01 to 11.
+      // - Otherwise, for each matching aux1a entry, convert from 11 to 01.
+      reterr = GenoarrAux1aUpdate(fread_end, sample_include, sample_include_cumulative_popcounts, raw_genovec, aux1a_mode, raw_sample_ct, allele_ct, allele_idx1, 2, raw_01_ct, &fread_ptr, genovec, deltalist_workspace);
+    } else {
+      reterr = SkipAux1a(fread_end, aux1a_mode, raw_sample_ct, allele_ct, raw_01_ct, &fread_ptr);
+    }
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+    const unsigned char* aux1b_start = fread_ptr;
+    reterr = GenoarrAux1bUpdate2(fread_end, sample_include, sample_include_cumulative_popcounts, raw_genovec, aux1b_mode, raw_sample_ct, allele_ct, allele_idx0, allele_idx1, raw_10_ct, &fread_ptr, genovec, deltalist_workspace);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+    // Can have a modified version of GenoarrAux1bUpdate2() which only requires
+    // one pass, but let's keep the logic simpler for now since I don't expect
+    // this function to be used frequently.
+    uintptr_t* aux1b_hets = pgrp->workspace_aux1x_present;
+    uint32_t aux1b_het_present;
+    reterr = GetAux1bHets(fread_end, raw_genovec, aux1b_mode, raw_sample_ct, allele_ct, raw_10_ct, &aux1b_start, aux1b_hets, &aux1b_het_present, deltalist_workspace);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+    if (aux1b_het_present) {
+      BitvecOr(aux1b_hets, BitCtToWordCt(raw_sample_ct), all_hets);
+    }
+    if ((allele_idx0 + allele_idx1 != 1) || aux1b_het_present) {
+      // We can now clobber the contents of pgrp->workspace_vec (raw_genovec)
+      // and pgrp->workspace_aux1x_present (aux1b_hets).
+      // We use the former as the subsetted_suppressed_het return buffer.
+      uintptr_t* all_hets_subsetted = all_hets;
+      if (sample_include) {
+        all_hets_subsetted = aux1b_hets;
+        CopyBitarrSubset(all_hets, sample_include, sample_ct, all_hets_subsetted);
+      }
+      subsetted_suppressed_het = raw_genovec;
+      SuppressHets11(genovec, all_hets_subsetted, sample_ct, raw_genovec);
+    }
+  }
+  reterr = ParseAux2Subset(fread_end, sample_include, all_hets, subsetted_suppressed_het, raw_sample_ct, sample_ct, &fread_ptr, phasepresent, phaseinfo, phasepresent_ct_ptr, pgrp->workspace_subset);
+  if (unlikely(reterr)) {
+    return reterr;
+  }
+  if (VrtypeMultiallelicHc(vrtype) && (*phasepresent_ct_ptr)) {
+    const uint32_t sample_ctl2 = NypCtToWordCt(sample_ct);
+    MaskWordsToHalfwordsInvmatch(genovec, kMaskAAAA, sample_ctl2, phasepresent, phasepresent);
+    *phasepresent_ct_ptr = PopcountWords(phasepresent, BitCtToWordCt(sample_ct));
+  }
+  if (invert) {
+    GenovecInvertUnsafe(sample_ct, genovec);
+    if (*phasepresent_ct_ptr) {
+      BitvecInvert(BitCtToWordCt(sample_ct), phaseinfo);
+    }
+  }
+  return kPglRetSuccess;
+}
+
+PglErr PgrGetMP(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, PgenReader* pgr_ptr, PgenVariant* pgvp) {
+  pgvp->patch_01_ct = 0;
+  pgvp->patch_10_ct = 0;
+  if (!sample_ct) {
+    pgvp->phasepresent_ct = 0;
+    return kPglRetSuccess;
+  }
+  PgenReaderMain* pgrp = GetPgrp(pgr_ptr);
+  const uint32_t* sample_include_cumulative_popcounts = GetSicp(pssi);
+  const uint32_t vrtype = GetPgfiVrtype(&(pgrp->fi), vidx);
+  const uint32_t multiallelic_hc_present = VrtypeMultiallelicHc(vrtype);
+  if (!multiallelic_hc_present) {
+    return ReadGenovecHphaseSubsetUnsafe(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, pgrp, nullptr, nullptr, pgvp->genovec, pgvp->phasepresent, pgvp->phaseinfo, &(pgvp->phasepresent_ct));
+  }
+  const unsigned char* fread_ptr;
+  const unsigned char* fread_end;
+  uintptr_t* all_hets = VrtypeHphase(vrtype)? pgrp->workspace_all_hets : nullptr;
+  PglErr reterr = GetMultiallelicCodes(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, pgrp, all_hets? (&fread_ptr) : nullptr, all_hets? (&fread_end) : nullptr, all_hets, pgvp);
+  if (reterr || (!all_hets)) {
+    // bugfix (17 Apr 2023): need to zero out phasepresent_ct in this case
+    pgvp->phasepresent_ct = 0;
+    return reterr;
+  }
+  const uint32_t raw_sample_ct = pgrp->fi.raw_sample_ct;
+  return ParseAux2Subset(fread_end, (sample_ct != raw_sample_ct)? sample_include : nullptr, all_hets, nullptr, raw_sample_ct, sample_ct, &fread_ptr, pgvp->phasepresent, pgvp->phaseinfo, &(pgvp->phasepresent_ct), pgrp->workspace_subset);
+}
+
+// ok for sample_include to be nullptr if not subsetting, though this is not
+// required
+PglErr ParseDosage16(const unsigned char* fread_ptr, const unsigned char* fread_end, const uintptr_t* __restrict sample_include, uint32_t sample_ct, uint32_t vidx, uint32_t allele_ct, PgenReaderMain* pgrp, uint32_t* __restrict dosage_ct_ptr, uintptr_t* __restrict dphase_present, int16_t* dphase_delta, uint32_t* __restrict dphase_ct_ptr, uintptr_t* __restrict dosage_present, uint16_t* dosage_main) {
+  // Side effect: may use pgrp->workspace_dosage_present and
+  // pgrp->workspace_dphase_present
+  const uint32_t raw_sample_ct = pgrp->fi.raw_sample_ct;
+  const uint32_t raw_sample_ctl = BitCtToWordCt(raw_sample_ct);
+  const uint32_t subsetting_required = (sample_ct != raw_sample_ct);
+  uintptr_t* raw_dosage_present = subsetting_required? pgrp->workspace_dosage_present : dosage_present;
+  const uint32_t vrtype = GetPgfiVrtype(&(pgrp->fi), vidx);
+  const uint32_t is_unconditional_dosage = ((vrtype & 0x60) == 0x40);
+  uint32_t raw_dosage_ct;
+  if ((vrtype & 0x60) == 0x20) {
+    // case 1: dosage list
+    if (unlikely(ParseAndSaveDeltalistAsBitarr(fread_end, raw_sample_ct, &fread_ptr, raw_dosage_present, &raw_dosage_ct))) {
+      return kPglRetMalformedInput;
+    }
+    if ((!raw_dosage_ct) && (!dosage_ct_ptr)) {
+      // bugfix (7 Oct 2024)
+      ZeroWArr(raw_sample_ctl, raw_dosage_present);
+    }
+  } else if (is_unconditional_dosage) {
+    // case 2: unconditional dosage.  handle separately from other two cases
+    // since missing values may be present.
+    SetAllBits(raw_sample_ct, raw_dosage_present);
+    raw_dosage_ct = raw_sample_ct;
+  } else {
+    // case 3: dosage bitarray
+    raw_dosage_present[raw_sample_ctl - 1] = 0;
+    const uint32_t raw_sample_ctb = DivUp(raw_sample_ct, CHAR_BIT);
+    memcpy(raw_dosage_present, fread_ptr, raw_sample_ctb);
+    fread_ptr = &(fread_ptr[raw_sample_ctb]);
+    raw_dosage_ct = PopcountWords(raw_dosage_present, raw_sample_ctl);
+  }
+  const uint32_t sample_ctl = BitCtToWordCt(sample_ct);
+  uint32_t dosage_ct;
+  if (subsetting_required) {
+    CopyBitarrSubset(raw_dosage_present, sample_include, sample_ct, dosage_present);
+    dosage_ct = PopcountWords(dosage_present, sample_ctl);
+  } else {
+    dosage_ct = raw_dosage_ct;
+  }
+  if (dosage_ct_ptr) {
+    *dosage_ct_ptr = dosage_ct;
+  }
+  if (!dosage_ct) {
+    if (dphase_ct_ptr) {
+      *dphase_ct_ptr = 0;
+    }
+    return kPglRetSuccess;
+  }
+  const unsigned char* dosage_main_read_biter = fread_ptr;
+  uint16_t* dosage_main_write_iter = dosage_main;
+  uint32_t raw_dphase_ct = 0;
+  uint32_t dphase_ct = 0;
+  uintptr_t* raw_dphase_present = nullptr;
+  if (dphase_present && (vrtype & 0x80)) {
+    fread_ptr = &(fread_ptr[raw_dosage_ct * 2]);
+    if (!is_unconditional_dosage) {
+      const unsigned char* file_dphase_present = fread_ptr;
+      fread_ptr = &(fread_ptr[DivUp(raw_dosage_ct, CHAR_BIT)]);
+      raw_dphase_present = subsetting_required? pgrp->workspace_dphase_present : dphase_present;
+      ExpandBytearr(file_dphase_present, raw_dosage_present, raw_sample_ctl, raw_dosage_ct, 0, raw_dphase_present);
+      raw_dphase_ct = PopcountWords(raw_dphase_present, raw_sample_ctl);
+      dphase_ct = raw_dphase_ct;
+      if (subsetting_required) {
+        CopyBitarrSubset(raw_dphase_present, sample_include, sample_ct, dphase_present);
+        dphase_ct = PopcountWords(dphase_present, sample_ctl);
+      }
+    } else {
+      // raw_dphase_present = raw_dosage_present;
+      dphase_ct = dosage_ct;
+      SetAllBits(sample_ct, dphase_present);
+    }
+  }
+  if (!dphase_ct) {
+    if (allele_ct == 2) {
+      if (!is_unconditional_dosage) {
+        if (dosage_ct == raw_dosage_ct) {
+          memcpy(dosage_main_write_iter, dosage_main_read_biter, dosage_ct * sizeof(int16_t));
+        } else {
+          // bugfix (22 May 2017): dosage_entry_idx needs to iterate up to
+          // raw_dosage_ct, not dosage_ct
+          uintptr_t widx = ~k0LU;
+          uint32_t dosage_entry_idx = 0;
+          do {
+            uintptr_t cur_bits;
+            do {
+              cur_bits = raw_dosage_present[++widx];
+            } while (!cur_bits);
+            const uintptr_t sample_include_word = sample_include[widx];
+            do {
+              const uintptr_t low_bit = cur_bits & (-cur_bits);
+              if (sample_include_word & low_bit) {
+                CopyFromUnalignedOffsetU16(dosage_main_write_iter, dosage_main_read_biter, dosage_entry_idx);
+                ++dosage_main_write_iter;
+              }
+              ++dosage_entry_idx;
+              cur_bits ^= low_bit;
+            } while (cur_bits);
+          } while (dosage_entry_idx != raw_dosage_ct);
+        }
+      } else {
+        if (!subsetting_required) {
+          for (uint32_t sample_idx = 0; sample_idx != sample_ct; ++sample_idx) {
+            uint16_t cur_dosage;
+            CopyFromUnalignedIncrU16(&cur_dosage, &dosage_main_read_biter);
+            if (cur_dosage != 65535) {
+              *dosage_main_write_iter++ = cur_dosage;
+            } else {
+              ClearBit(sample_idx, dosage_present);
+            }
+          }
+        } else {
+          uintptr_t widx = ~k0LU;
+          uint32_t sample_idx = 0;
+          do {
+            uintptr_t cur_bits;
+            do {
+              cur_bits = sample_include[++widx];
+            } while (!cur_bits);
+            const uintptr_t sample_uidx_base = widx * kBitsPerWord;
+            const unsigned char* dosage_main_readp = &(dosage_main_read_biter[sample_uidx_base * sizeof(int16_t)]);
+            do {
+              const uint32_t sample_uidx_lowbits = ctzw(cur_bits);
+              uint16_t cur_dosage;
+              CopyFromUnalignedOffsetU16(&cur_dosage, dosage_main_readp, sample_uidx_lowbits);
+              if (cur_dosage != 65535) {
+                *dosage_main_write_iter++ = cur_dosage;
+              } else {
+                ClearBit(sample_idx, dosage_present);
+              }
+              ++sample_idx;
+              cur_bits &= cur_bits - 1;
+            } while (cur_bits);
+          } while (sample_idx != sample_ct);
+        }
+        if (dosage_ct_ptr) {
+          *dosage_ct_ptr = dosage_main_write_iter - dosage_main;
+        }
+      }
+    } else {
+      // todo: multiallelic dosage
+      // need to support downcode to ref/nonref as well as raw load
+      // (dosage_ct_ptr should be nullptr iff we're doing a raw load)
+#ifndef PGENLIB_NOPRINT
+      fputs("multiallelic variants not yet supported by ParseDosage16()\n", stderr);
+#endif
+      return kPglRetNotYetSupported;
+    }
+    if (dphase_ct_ptr) {
+      *dphase_ct_ptr = 0;
+    }
+  } else {
+    // phased dosage
+    if (allele_ct == 2) {
+      if (!is_unconditional_dosage) {
+        // bugfix (15 Sep 2023): dphase_ct == raw_dphase_ct doesn't guarantee
+        // dosage_ct == raw_dosage_ct
+        if (dosage_ct == raw_dosage_ct) {
+          memcpy(dosage_main_write_iter, dosage_main_read_biter, dosage_ct * sizeof(int16_t));
+        } else {
+          uintptr_t widx = ~k0LU;
+          uint32_t dosage_entry_idx = 0;
+          do {
+            uintptr_t cur_bits;
+            do {
+              cur_bits = raw_dosage_present[++widx];
+            } while (!cur_bits);
+            const uintptr_t sample_include_word = sample_include[widx];
+            do {
+              const uintptr_t low_bit = cur_bits & (-cur_bits);
+              if (sample_include_word & low_bit) {
+                CopyFromUnalignedOffsetU16(dosage_main_write_iter, dosage_main_read_biter, dosage_entry_idx);
+                ++dosage_main_write_iter;
+              }
+              ++dosage_entry_idx;
+              cur_bits ^= low_bit;
+            } while (cur_bits);
+          } while (dosage_entry_idx != raw_dosage_ct);
+        }
+        if (dphase_ct == raw_dphase_ct) {
+          memcpy(dphase_delta, fread_ptr, dphase_ct * sizeof(int16_t));
+          if (dphase_ct_ptr) {
+            *dphase_ct_ptr = dphase_ct;
+          }
+        } else {
+          uintptr_t widx = ~k0LU;
+          uint32_t dphase_entry_idx = 0;
+          const unsigned char* dphase_delta_read = fread_ptr;
+          int16_t* dphase_delta_write_iter = dphase_delta;
+          do {
+            uintptr_t cur_bits;
+            do {
+              cur_bits = raw_dphase_present[++widx];
+            } while (!cur_bits);
+            const uintptr_t sample_include_word = sample_include[widx];
+            do {
+              const uintptr_t low_bit = cur_bits & (-cur_bits);
+              if (sample_include_word & low_bit) {
+                CopyFromUnalignedOffsetI16(dphase_delta_write_iter, dphase_delta_read, dphase_entry_idx);
+                ++dphase_delta_write_iter;
+              }
+              ++dphase_entry_idx;
+              cur_bits ^= low_bit;
+            } while (cur_bits);
+          } while (dphase_entry_idx != raw_dphase_ct);
+          if (dphase_ct_ptr) {
+            *dphase_ct_ptr = dphase_delta_write_iter - dphase_delta;
+          }
+        }
+      } else {
+        const unsigned char* dphase_delta_read = fread_ptr;
+        int16_t* dphase_delta_write_iter = dphase_delta;
+        if (!subsetting_required) {
+          for (uint32_t sample_idx = 0; sample_idx != sample_ct; ++sample_idx) {
+            uint16_t cur_dosage;
+            CopyFromUnalignedIncrU16(&cur_dosage, &dosage_main_read_biter);
+            if (cur_dosage != 65535) {
+              *dosage_main_write_iter++ = cur_dosage;
+              int16_t dphase_delta_val;
+              CopyFromUnalignedOffsetI16(&dphase_delta_val, dphase_delta_read, sample_idx);
+              if (dphase_delta_val) {
+                *dphase_delta_write_iter++ = dphase_delta_val;
+              } else {
+                ClearBit(sample_idx, dphase_present);
+              }
+            } else {
+              // assert(dphase_delta_read[sample_idx] == -32768);
+              ClearBit(sample_idx, dosage_present);
+            }
+          }
+        } else {
+          uintptr_t sample_uidx_base = 0;
+          uintptr_t sample_include_bits = sample_include[0];
+          for (uint32_t sample_idx = 0; sample_idx != sample_ct; ++sample_idx) {
+            const uintptr_t sample_uidx = BitIter1(sample_include, &sample_uidx_base, &sample_include_bits);
+            uint16_t cur_dosage;
+            CopyFromUnalignedOffsetU16(&cur_dosage, dosage_main_read_biter, sample_uidx);
+            if (cur_dosage != 65535) {
+              *dosage_main_write_iter++ = cur_dosage;
+              int16_t dphase_delta_val;
+              CopyFromUnalignedOffsetI16(&dphase_delta_val, dphase_delta_read, sample_uidx);
+              if (dphase_delta_val) {
+                *dphase_delta_write_iter++ = dphase_delta_val;
+              } else {
+                ClearBit(sample_idx, dphase_present);
+              }
+            } else {
+              // assert(dphase_delta_read[sample_uidx] == -32768);
+              ClearBit(sample_idx, dosage_present);
+            }
+          }
+        }
+        dosage_ct = dosage_main_write_iter - dosage_main;
+        if (dosage_ct != sample_ct) {
+          BitvecAnd(dosage_present, sample_ctl, dphase_present);
+        }
+        if (dosage_ct_ptr) {
+          *dosage_ct_ptr = dosage_ct;
+        }
+        if (dphase_ct_ptr) {
+          *dphase_ct_ptr = dphase_delta_write_iter - dphase_delta;
+        }
+      }
+    } else {
+      // multiallelic subcase
+#ifndef PGENLIB_NOPRINT
+      fputs("multiallelic variants not yet supported by ParseDosage16()\n", stderr);
+#endif
+      return kPglRetNotYetSupported;
+    }
+  }
+  return kPglRetSuccess;
+}
+
+PglErr IMPLPgrGetD(const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, uint32_t sample_ct, uint32_t vidx, PgenReaderMain* pgrp, uintptr_t* __restrict genovec, uintptr_t* __restrict dosage_present, uint16_t* dosage_main, uint32_t* dosage_ct_ptr) {
+  assert(vidx < pgrp->fi.raw_variant_ct);
+  if (!sample_ct) {
+    *dosage_ct_ptr = 0;
+    return kPglRetSuccess;
+  }
+  const uint32_t vrtype = GetPgfiVrtype(&(pgrp->fi), vidx);
+  if ((!VrtypeDosage(vrtype)) || (!dosage_present)) {
+    *dosage_ct_ptr = 0;
+    return ReadGenovecSubsetUnsafe(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, pgrp, nullptr, nullptr, genovec);
+  }
+  const unsigned char* fread_ptr = nullptr;
+  const unsigned char* fread_end = nullptr;
+  uint32_t phasepresent_ct;
+  PglErr reterr = ReadGenovecHphaseSubsetUnsafe(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, pgrp, &fread_ptr, &fread_end, genovec, nullptr, nullptr, &phasepresent_ct);
+  if (unlikely(reterr)) {
+    return reterr;
+  }
+  const uintptr_t* allele_idx_offsets = pgrp->fi.allele_idx_offsets;
+  const uint32_t allele_ct = allele_idx_offsets? (allele_idx_offsets[vidx + 1] - allele_idx_offsets[vidx]) : 2;
+  return ParseDosage16(fread_ptr, fread_end, sample_include, sample_ct, vidx, allele_ct, pgrp, dosage_ct_ptr, nullptr, nullptr, nullptr, dosage_present, dosage_main);
+}
+
+PglErr PgrGet1D(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, AlleleCode allele_idx, PgenReader* pgr_ptr, uintptr_t* __restrict allele_countvec, uintptr_t* __restrict dosage_present, uint16_t* dosage_main, uint32_t* dosage_ct_ptr) {
+  PgenReaderMain* pgrp = GetPgrp(pgr_ptr);
+  const uint32_t* sample_include_cumulative_popcounts = GetSicp(pssi);
+  const uintptr_t* allele_idx_offsets = pgrp->fi.allele_idx_offsets;
+  const uint32_t allele_ct = allele_idx_offsets? (allele_idx_offsets[vidx + 1] - allele_idx_offsets[vidx]) : 2;
+  if ((allele_ct == 2) || (!allele_idx)) {
+    uint32_t dosage_ct;
+    PglErr reterr = IMPLPgrGetD(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, pgrp, allele_countvec, dosage_present, dosage_main, &dosage_ct);
+    if (!allele_idx) {
+      GenovecInvertUnsafe(sample_ct, allele_countvec);
+      if (dosage_ct) {
+        BiallelicDosage16Invert(dosage_ct, dosage_main);
+      }
+    }
+    *dosage_ct_ptr = dosage_ct;
+    return reterr;
+  }
+  const uint32_t vrtype = pgrp->fi.vrtypes[vidx];
+  if (!VrtypeDosage(vrtype)) {
+    *dosage_ct_ptr = 0;
+    return IMPLPgrGet1(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, allele_idx, pgrp, allele_countvec);
+  }
+#ifndef PGENLIB_NOPRINT
+  fputs("multiallelic variants not yet supported by PgrGet1D()\n", stderr);
+#endif
+  return kPglRetNotYetSupported;
+}
+
+PglErr PgrGetInv1D(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, AlleleCode allele_idx, PgenReader* pgr_ptr, uintptr_t* __restrict allele_invcountvec, uintptr_t* __restrict dosage_present, uint16_t* dosage_main, uint32_t* dosage_ct_ptr) {
+  PgenReaderMain* pgrp = GetPgrp(pgr_ptr);
+  const uint32_t* sample_include_cumulative_popcounts = GetSicp(pssi);
+  const uintptr_t* allele_idx_offsets = pgrp->fi.allele_idx_offsets;
+  const uint32_t allele_ct = allele_idx_offsets? (allele_idx_offsets[vidx + 1] - allele_idx_offsets[vidx]) : 2;
+  if ((allele_ct == 2) || (!allele_idx)) {
+    uint32_t dosage_ct;
+    PglErr reterr = IMPLPgrGetD(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, pgrp, allele_invcountvec, dosage_present, dosage_main, &dosage_ct);
+    if (allele_idx) {
+      GenovecInvertUnsafe(sample_ct, allele_invcountvec);
+      if (dosage_ct) {
+        BiallelicDosage16Invert(dosage_ct, dosage_main);
+      }
+    }
+    *dosage_ct_ptr = dosage_ct;
+    return reterr;
+  }
+  const uint32_t vrtype = pgrp->fi.vrtypes[vidx];
+  if (!VrtypeDosage(vrtype)) {
+    *dosage_ct_ptr = 0;
+    return IMPLPgrGetInv1(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, allele_idx, pgrp, allele_invcountvec);
+  }
+#ifndef PGENLIB_NOPRINT
+  fputs("multiallelic variants not yet supported by PgrGetInv1D()\n", stderr);
+#endif
+  return kPglRetNotYetSupported;
+}
+
+PglErr GetAux1bHetIncr(const unsigned char* fread_end, uint32_t aux1b_mode, uint32_t raw_sample_ct, uint32_t allele_ct, uint32_t raw_10_ct, const unsigned char** fread_pp, uint32_t* __restrict raw_het_ctp) {
+  if (aux1b_mode == 15) {
+    return kPglRetSuccess;
+  }
+  uint32_t rare10_ct;
+  if (!aux1b_mode) {
+    const uint32_t fset_byte_ct = DivUp(raw_10_ct, 8);
+    rare10_ct = PopcountBytes(*fread_pp, fset_byte_ct);
+    *fread_pp += fset_byte_ct;
+  } else {
+    // aux1b_mode == 1
+    const unsigned char* group_info_iter;
+    PglErr reterr = ParseDifflistHeader(fread_end, raw_sample_ct, fread_pp, nullptr, &group_info_iter, &rare10_ct);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+    reterr = SkipDeltalistIds(fread_end, group_info_iter, rare10_ct, raw_sample_ct, 0, fread_pp);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+  }
+  uintptr_t detect_hom_mask_lo;
+  const uint32_t allele_code_logwidth = GetAux1bConsts(allele_ct, &detect_hom_mask_lo);
+  const uint32_t code10_logwidth = allele_code_logwidth + (allele_code_logwidth != 0);
+  const unsigned char* patch_10_fvals = *fread_pp;
+  const uint32_t fvals_byte_ct = DivUpU64(S_CAST(uint64_t, rare10_ct) << code10_logwidth, CHAR_BIT);
+  if (PtrAddCk(fread_end, fvals_byte_ct, fread_pp)) {
+    return kPglRetMalformedInput;
+  }
+  if (allele_ct == 3) {
+    const uint32_t hom22_ct = PopcountBytes(patch_10_fvals, fvals_byte_ct);
+    *raw_het_ctp += rare10_ct - hom22_ct;
+    return kPglRetSuccess;
+  }
+  // possible todo: vectorized het-counter, analogous to CountAux1bDense()
+  const uint32_t code10_width = 1U << code10_logwidth;
+  const uint32_t allele_code_width = 1U << allele_code_logwidth;
+  const uintptr_t detect_all_mask_lo = detect_hom_mask_lo | (detect_hom_mask_lo << allele_code_width);
+  const uintptr_t detect_all_mask_hi = detect_all_mask_lo << (allele_code_width - 1);
+  const uintptr_t detect_hom_mask_hi = detect_hom_mask_lo << (code10_width - 1);
+  const uint32_t fvals_word_ct_m1 = (fvals_byte_ct - 1) / kBytesPerWord;
+  uint32_t het_incr = 0;
+  for (uint32_t fvals_widx = 0; ; ++fvals_widx) {
+    uintptr_t fvals_bits;
+    if (fvals_widx >= fvals_word_ct_m1) {
+      if (fvals_widx > fvals_word_ct_m1) {
+        break;
+      }
+      fvals_bits = SubwordLoad(&(patch_10_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+    } else {
+      CopyFromUnalignedOffsetW(&fvals_bits, patch_10_fvals, fvals_widx);
+    }
+    // allele_ct > 3 guaranteed
+    fvals_bits = fvals_bits ^ (fvals_bits << allele_code_width);
+    fvals_bits = detect_hom_mask_hi & (fvals_bits | ((fvals_bits | detect_all_mask_hi) - detect_all_mask_lo));
+    if (fvals_widx == fvals_word_ct_m1) {
+      fvals_bits = bzhi_max(fvals_bits, ModNz(rare10_ct << code10_logwidth, kBitsPerWord));
+    }
+    het_incr += PopcountWord(fvals_bits);
+  }
+  *raw_het_ctp += het_incr;
+  return kPglRetSuccess;
+}
+
+uint64_t U16VecSum(const uint16_t* __restrict uint16_vec, uint32_t entry_ct) {
+#ifdef USE_SSE2
+  // UniVecHsum32() could overflow once we exceed this
+  const uint32_t max_loop_len = (131072 / kInt32PerVec) - 1;
+
+  const VecW m16 = VCONST_W(kMask0000FFFF);
+  const VecW* uint16_vvec_iter = R_CAST(const VecW*, uint16_vec);
+  uint64_t sum = 0;
+  for (uint32_t full_vecs_remaining = entry_ct / (kBytesPerVec / sizeof(int16_t)); ; ) {
+    UniVec acc_even;
+    UniVec acc_odd;
+    acc_even.vw = vecw_setzero();
+    acc_odd.vw = vecw_setzero();
+    const VecW* uint16_vvec_stop;
+    if (full_vecs_remaining < max_loop_len) {
+      if (!full_vecs_remaining) {
+        const uint32_t trail_ct = entry_ct % (kBytesPerVec / sizeof(int16_t));
+        uint16_vec = DowncastKVecWToU16(uint16_vvec_iter);
+        for (uint32_t uii = 0; uii != trail_ct; ++uii) {
+          sum += uint16_vec[uii];
+        }
+        return sum;
+      }
+      uint16_vvec_stop = &(uint16_vvec_iter[full_vecs_remaining]);
+      full_vecs_remaining = 0;
+    } else {
+      uint16_vvec_stop = &(uint16_vvec_iter[max_loop_len]);
+      full_vecs_remaining -= max_loop_len;
+    }
+    do {
+      const VecW cur_vec = *uint16_vvec_iter++;
+      acc_even.vw = acc_even.vw + (cur_vec & m16);
+      acc_odd.vw = acc_odd.vw + (vecw_srli(cur_vec, 16) & m16);
+    } while (uint16_vvec_iter < uint16_vvec_stop);
+    sum += UniVecHsum32(acc_even);
+    sum += UniVecHsum32(acc_odd);
+  }
+#else
+  uint64_t sum = 0;
+  for (uint32_t uii = 0; uii != entry_ct; ++uii) {
+    sum += uint16_vec[uii];
+  }
+  return sum;
+#endif
+}
+
+PglErr GetPhasepresentAndSkipPhaseinfo(const unsigned char* fread_end, const uintptr_t* __restrict all_hets, uint32_t raw_sample_ct, uint32_t het_ct, const unsigned char** fread_pp, uintptr_t* __restrict phasepresent, uint32_t* __restrict phasepresent_ctp) {
+  const unsigned char* aux2_start = *fread_pp;
+  const uint32_t aux2_first_part_byte_ct = 1 + (het_ct / CHAR_BIT);
+  if (PtrAddCk(fread_end, aux2_first_part_byte_ct, fread_pp)) {
+    return kPglRetMalformedInput;
+  }
+  const uint32_t raw_sample_ctl = BitCtToWordCt(raw_sample_ct);
+  if (!(aux2_start[0] & 1)) {
+    memcpy(phasepresent, all_hets, raw_sample_ctl * kBytesPerWord);
+    *phasepresent_ctp = het_ct;
+    return kPglRetSuccess;
+  }
+  const uint32_t phasepresent_ct = PopcountBytes(aux2_start, aux2_first_part_byte_ct) - 1;
+  if (PtrAddCk(fread_end, DivUp(phasepresent_ct, CHAR_BIT), fread_pp)) {
+    return kPglRetMalformedInput;
+  }
+  *phasepresent_ctp = phasepresent_ct;
+  ExpandBytearr(aux2_start, all_hets, raw_sample_ctl, het_ct, 1, phasepresent);
+  return kPglRetSuccess;
+}
+
+PglErr GetUnphasedBiallelicHetCt(const uintptr_t* __restrict sample_include, const uintptr_t* raw_genoarr, const unsigned char* fread_ptr, const unsigned char* fread_end, uint32_t subsetted_het_ct, PgenReaderMain* pgrp, uint32_t* unphased_het_ctp) {
+  const uint32_t raw_sample_ct = pgrp->fi.raw_sample_ct;
+  uint32_t raw_het_ct;
+  if (!sample_include) {
+    raw_het_ct = subsetted_het_ct;
+  } else {
+    raw_het_ct = CountNyp(raw_genoarr, kMask5555, raw_sample_ct);
+  }
+  const uint32_t aux2_first_part_byte_ct = 1 + (raw_het_ct / CHAR_BIT);
+  if (PtrCheck(fread_end, fread_ptr, aux2_first_part_byte_ct)) {
+    return kPglRetMalformedInput;
+  }
+  const uint32_t explicit_phasepresent = fread_ptr[0] & 1;
+  if (!explicit_phasepresent) {
+    // initial value of 0 is correct
+    return kPglRetSuccess;
+  }
+  if (raw_het_ct == subsetted_het_ct) {
+    *unphased_het_ctp = raw_het_ct + 1 - PopcountBytes(fread_ptr, aux2_first_part_byte_ct);
+    return kPglRetSuccess;
+  }
+  // A dedicated counting function would be faster, but this case
+  // should rarely come up.
+  uintptr_t* all_hets = pgrp->workspace_all_hets;
+  PgrDetectGenoarrHets(raw_genoarr, raw_sample_ct, all_hets);
+  uintptr_t* raw_phasepresent = pgrp->workspace_subset;
+  const uint32_t raw_sample_ctl = BitCtToWordCt(raw_sample_ct);
+  // todo: compare against ExpandThenSubsetBytearr followed by simple popcount
+  ExpandBytearr(fread_ptr, all_hets, raw_sample_ctl, raw_het_ct, 1, raw_phasepresent);
+  *unphased_het_ctp = subsetted_het_ct - PopcountWordsIntersect(raw_phasepresent, sample_include, raw_sample_ctl);
+  return kPglRetSuccess;
+}
+
+PglErr GetPhasedBiallelicGenotypeSubsetCounts(const uintptr_t* __restrict sample_include, const uintptr_t* __restrict sample_include_interleaved_vec, uint32_t sample_ct, uint32_t vidx, PgenReaderMain* pgrp, uint32_t* unphased_het_ctp, STD_ARRAY_REF(uint32_t, 4) genocounts) {
+  // Currently much less optimized than the other count functions.  (This case
+  // shouldn't come up much, the user has to be computing minimac-r2 on a file
+  // with no dosages...)
+  uintptr_t* raw_genovec = pgrp->workspace_vec;
+  const unsigned char* fread_ptr;
+  const unsigned char* fread_end;
+  PglErr reterr = ReadRawGenovec(1, vidx, pgrp, &fread_ptr, &fread_end, raw_genovec);
+  if (unlikely(reterr)) {
+    return reterr;
+  }
+  const uint32_t raw_sample_ct = pgrp->fi.raw_sample_ct;
+  ZeroTrailingNyps(raw_sample_ct, raw_genovec);
+  GenoarrCountSubsetFreqs(raw_genovec, sample_include_interleaved_vec, raw_sample_ct, sample_ct, genocounts);
+  return GetUnphasedBiallelicHetCt(sample_include, raw_genovec, fread_ptr, fread_end, genocounts[1], pgrp, unphased_het_ctp);
+}
+
+// Imputation r^2 computation:
+// * This function assumes the biallelic diploid case.  Divide by two to get
+//   the biallelic haploid value, for whatever that's worth.
+// * chrX requires sex information, so that's handled directly in
+//   LoadAlleleAndGenoCountsThread()... er, actually, we just give up on that
+//   for now.
+// * See PgrGetMDCounts() support functions below for multiallelic-diploid
+//   notes.
+PglErr GetBasicGenotypeCountsAndDosage16s(const uintptr_t* __restrict sample_include, const uintptr_t* __restrict sample_include_interleaved_vec, const uint32_t* __restrict sample_include_cumulative_popcounts, uint32_t sample_ct, uint32_t vidx, uint32_t is_minimac3_r2, PgenReaderMain* pgrp, double* imp_r2_ptr, STD_ARRAY_REF(uint32_t, 4) genocounts, uint64_t* __restrict all_dosages) {
+  // genocounts[0] := ref/ref, genocounts[1] := ref/altx,
+  // genocounts[2] := altx/alty, genocounts[3] := missing
+  const uint32_t vrtype = GetPgfiVrtype(&(pgrp->fi), vidx);
+  const uint32_t raw_sample_ct = pgrp->fi.raw_sample_ct;
+  const uint32_t subsetting_required = (sample_ct != raw_sample_ct);
+  uint32_t unphased_het_ct = 0;
+  // To avoid LD cache thrashing, we try to either always keep a subsetted
+  // cache, or never do so.  (Always, when only hardcalls are present;
+  // otherwise never.)
+  if ((!(pgrp->fi.gflags & kfPgenGlobalDosagePresent)) ||
+      ((!(vrtype & 0x60)) && (!subsetting_required))) {
+    {
+      const uint32_t need_unphased_het_ct = is_minimac3_r2 && VrtypeHphase(vrtype);
+      PglErr reterr;
+      if (!(subsetting_required && need_unphased_het_ct)) {
+        reterr = GetBasicGenotypeCounts(sample_include, sample_include_interleaved_vec, sample_include_cumulative_popcounts, sample_ct, vidx, pgrp, need_unphased_het_ct? (&unphased_het_ct) : nullptr, genocounts);
+      } else {
+        reterr = GetPhasedBiallelicGenotypeSubsetCounts(sample_include, sample_include_interleaved_vec, sample_ct, vidx, pgrp, &unphased_het_ct, genocounts);
+      }
+      if (unlikely(reterr)) {
+        return reterr;
+      }
+    }
+  GetBasicGenotypeCountsAndDosage16s_basic_finish:
+    all_dosages[0] = (genocounts[0] * 2 + genocounts[1]) * 16384LLU;
+    all_dosages[1] = (genocounts[2] * 2 + genocounts[1]) * 16384LLU;
+    if (!imp_r2_ptr) {
+      return kPglRetSuccess;
+    }
+    // yeah, it's sinful to implement imputation r2 here...
+    const uint32_t nm_sample_ct = sample_ct - genocounts[3];
+    const uint64_t alt1_dosage = genocounts[2] * 0x8000LLU + genocounts[1] * 0x4000LLU;
+    uint64_t hap_alt1_ssq_x2 = genocounts[2] * 0x40000000LLU + genocounts[1] * 0x10000000LLU;
+    if (is_minimac3_r2) {
+      if (!VrtypeHphase(vrtype)) {
+        unphased_het_ct = genocounts[1];
+      }
+      hap_alt1_ssq_x2 += (genocounts[1] - unphased_het_ct) * 0x10000000LLU;
+    }
+    *imp_r2_ptr = BiallelicDiploidMinimac3R2(alt1_dosage, hap_alt1_ssq_x2, nm_sample_ct);
+    if (!is_minimac3_r2) {
+      *imp_r2_ptr *= 2;
+    }
+    return kPglRetSuccess;
+  }
+  uintptr_t* raw_genovec = pgrp->workspace_vec;
+  const unsigned char* fread_ptr;
+  const unsigned char* fread_end;
+  PglErr reterr = ReadRawGenovec(subsetting_required, vidx, pgrp, &fread_ptr, &fread_end, raw_genovec);
+  if (unlikely(reterr)) {
+    return reterr;
+  }
+  ZeroTrailingNyps(raw_sample_ct, raw_genovec);
+  if (!subsetting_required) {
+    GenoarrCountFreqsUnsafe(raw_genovec, raw_sample_ct, genocounts);
+  } else {
+    GenoarrCountSubsetFreqs(raw_genovec, sample_include_interleaved_vec, raw_sample_ct, sample_ct, genocounts);
+  }
+  if (!(vrtype & 0x60)) {
+    if (is_minimac3_r2 && VrtypeHphase(vrtype)) {
+      assert(!VrtypeMultiallelicHc(vrtype));
+      reterr = GetUnphasedBiallelicHetCt(subsetting_required? sample_include : nullptr, raw_genovec, fread_ptr, fread_end, genocounts[1], pgrp, &unphased_het_ct);
+      if (unlikely(reterr)) {
+        return reterr;
+      }
+    }
+    goto GetBasicGenotypeCountsAndDosage16s_basic_finish;
+  }
+  const uintptr_t* allele_idx_offsets = pgrp->fi.allele_idx_offsets;
+  const uint32_t allele_ct = allele_idx_offsets? (allele_idx_offsets[vidx + 1] - allele_idx_offsets[vidx]) : 2;
+  const uint32_t raw_sample_ctl = BitCtToWordCt(raw_sample_ct);
+  uintptr_t* raw_phasepresent = pgrp->workspace_subset;
+  uint32_t raw_phasepresent_ct = 0;
+  if (VrtypeHphase(vrtype)) {
+    uint32_t raw_het_ct = genocounts[1];  // inaccurate if subsetting_required
+    if (!is_minimac3_r2) {
+      if (VrtypeMultiallelicHc(vrtype)) {
+        const uint32_t aux1_first_byte = *fread_ptr++;
+        const uint32_t aux1a_mode = aux1_first_byte & 15;
+        const uint32_t aux1b_mode = aux1_first_byte >> 4;
+        uint32_t raw_10_ct = 0;
+        if ((!aux1a_mode) || (!aux1b_mode) || subsetting_required) {
+          GenovecCount12Unsafe(raw_genovec, raw_sample_ct, &raw_het_ct, &raw_10_ct);
+        }
+        reterr = SkipAux1a(fread_end, aux1a_mode, raw_sample_ct, allele_ct, raw_het_ct, &fread_ptr);
+        if (unlikely(reterr)) {
+          return reterr;
+        }
+        reterr = GetAux1bHetIncr(fread_end, aux1b_mode, raw_sample_ct, allele_ct, raw_10_ct, &fread_ptr, &raw_het_ct);
+        if (unlikely(reterr)) {
+          return reterr;
+        }
+      } else if (subsetting_required) {
+        raw_het_ct = CountNyp(raw_genovec, kMask5555, raw_sample_ct);
+      }
+      reterr = SkipAux2(fread_end, raw_het_ct, &fread_ptr, nullptr);
+      if (unlikely(reterr)) {
+        return reterr;
+      }
+    } else {
+      assert(!VrtypeMultiallelicHc(vrtype));
+      uintptr_t* all_hets = pgrp->workspace_all_hets;
+      PgrDetectGenoarrHets(raw_genovec, raw_sample_ct, all_hets);
+      if (subsetting_required) {
+        raw_het_ct = PopcountWords(all_hets, raw_sample_ctl);
+      }
+      const uint32_t first_half_byte_ct = 1 + (raw_het_ct / CHAR_BIT);
+      const uint32_t explicit_phasepresent = fread_ptr[0] & 1;
+      if (explicit_phasepresent) {
+        ExpandBytearr(fread_ptr, all_hets, raw_sample_ctl, raw_het_ct, 1, raw_phasepresent);
+        raw_phasepresent_ct = PopcountBytes(fread_ptr, first_half_byte_ct) - 1;
+        const uint32_t second_half_byte_ct = DivUp(raw_phasepresent_ct, CHAR_BIT);
+        fread_ptr = &(fread_ptr[first_half_byte_ct + second_half_byte_ct]);
+      } else {
+        raw_phasepresent_ct = raw_het_ct;
+        memcpy(raw_phasepresent, all_hets, raw_sample_ctl * sizeof(intptr_t));
+        fread_ptr = &(fread_ptr[first_half_byte_ct]);
+      }
+    }
+  } else if (VrtypeMultiallelicHc(vrtype)) {
+    reterr = SkipAux1(fread_end, raw_genovec, raw_sample_ct, allele_ct, &fread_ptr);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+  }
+  if (allele_ct != 2) {
+    // Maybe make this an invalid function call?  If that happens, the
+    // VrtypeMultiallelicHc() branch above can be removed.
+#ifndef PGENLIB_NOPRINT
+    fputs("multiallelic dosages not yet supported by GetBasicGenotypeCountsAndDosage16s()\n", stderr);
+#endif
+    return kPglRetNotYetSupported;
+  }
+
+  const uint32_t is_unconditional_dosage = ((vrtype & 0x60) == 0x40);
+  uint64_t alt1_dosage = 0;
+  uint32_t dosage_ct = 0;
+  STD_ARRAY_DECL(uint32_t, 4, replaced_genocounts);
+  if ((!is_minimac3_r2) || (!(vrtype & 0x90))) {
+    uint64_t alt1_dosage_sq_sum = 0;
+    if (is_unconditional_dosage) {
+      // needs to be handled separately from the other cases due to possible
+      // presence of missing values.
+      // note that this code will also need to be adjusted when multiallelic
+      // support is added.
+      STD_ARRAY_FILL0(replaced_genocounts);
+      const unsigned char* dosage_main_read = fread_ptr;
+      if (PtrAddCk(fread_end, raw_sample_ct * sizeof(int16_t), &fread_ptr)) {
+        return kPglRetMalformedInput;
+      }
+      if (subsetting_required) {
+        uintptr_t sample_uidx_base = 0;
+        uintptr_t sample_include_bits = sample_include[0];
+        for (uint32_t sample_idx = 0; sample_idx != sample_ct; ++sample_idx) {
+          const uintptr_t sample_uidx = BitIter1(sample_include, &sample_uidx_base, &sample_include_bits);
+          const uintptr_t cur_dosage_val = CopyFromUnalignedOffsetU16ZX(dosage_main_read, sample_uidx);
+          if (cur_dosage_val != 65535) {
+            alt1_dosage += cur_dosage_val;
+
+            // todo: check if this is slow enough to justify removing it from
+            // the main loop
+            alt1_dosage_sq_sum += cur_dosage_val * cur_dosage_val;
+            ++dosage_ct;
+          }
+        }
+      } else {
+        for (uint32_t sample_uidx = 0; sample_uidx != sample_ct; ++sample_uidx) {
+          const uintptr_t cur_dosage_val = CopyFromUnalignedOffsetU16ZX(dosage_main_read, sample_uidx);
+          if (cur_dosage_val != 65535) {
+            alt1_dosage += cur_dosage_val;
+            alt1_dosage_sq_sum += cur_dosage_val * cur_dosage_val;
+            ++dosage_ct;
+          }
+        }
+      }
+      // update (20 Mar 2019): .pgen specification tightened to remove the need
+      // to update replaced_genocounts in the main loops above.
+      STD_ARRAY_COPY(genocounts, 4, replaced_genocounts);
+      replaced_genocounts[3] = replaced_genocounts[3] + dosage_ct - sample_ct;
+    } else {
+      uintptr_t* raw_dosage_present = pgrp->workspace_dosage_present;
+      uint32_t raw_dosage_ct;
+      if (!(vrtype & 0x40)) {
+        // dosage list
+        if (unlikely(ParseAndSaveDeltalistAsBitarr(fread_end, raw_sample_ct, &fread_ptr, raw_dosage_present, &raw_dosage_ct))) {
+          return kPglRetMalformedInput;
+        }
+      } else {
+        // dosage bitarray
+        raw_dosage_present[raw_sample_ctl - 1] = 0;
+        const uint32_t raw_sample_ctb = DivUp(raw_sample_ct, CHAR_BIT);
+        memcpy(raw_dosage_present, fread_ptr, raw_sample_ctb);
+        fread_ptr = &(fread_ptr[raw_sample_ctb]);
+        raw_dosage_ct = PopcountWords(raw_dosage_present, raw_sample_ctl);
+      }
+      const unsigned char* dosage_main_read = fread_ptr;
+      if (PtrAddCk(fread_end, raw_dosage_ct * sizeof(int16_t), &fread_ptr)) {
+        return kPglRetMalformedInput;
+      }
+      if (subsetting_required) {
+        uintptr_t sample_widx = 0;
+        uintptr_t dosage_present_bits = raw_dosage_present[0];
+        for (uint32_t dosage_idx = 0; dosage_idx != raw_dosage_ct; ++dosage_idx) {
+          const uintptr_t lowbit = BitIter1y(raw_dosage_present, &sample_widx, &dosage_present_bits);
+          if (sample_include[sample_widx] & lowbit) {
+            const uintptr_t cur_dosage_val = CopyFromUnalignedOffsetU16ZX(dosage_main_read, dosage_idx);
+            alt1_dosage += cur_dosage_val;
+            alt1_dosage_sq_sum += cur_dosage_val * cur_dosage_val;
+            ++dosage_ct;
+          }
+        }
+        GenoarrCountSubsetIntersectFreqs(raw_genovec, raw_dosage_present, sample_include, raw_sample_ct, replaced_genocounts);
+      } else {
+        if (!imp_r2_ptr) {
+          for (uint32_t dosage_idx = 0; dosage_idx != raw_dosage_ct; ++dosage_idx) {
+            uint16_t cur_dosage_u16;
+            CopyFromUnalignedOffsetU16(&cur_dosage_u16, dosage_main_read, dosage_idx);
+            alt1_dosage += cur_dosage_u16;
+          }
+        } else {
+          for (uint32_t dosage_idx = 0; dosage_idx != raw_dosage_ct; ++dosage_idx) {
+            const uintptr_t cur_dosage_val = CopyFromUnalignedOffsetU16ZX(dosage_main_read, dosage_idx);
+            alt1_dosage += cur_dosage_val;
+            alt1_dosage_sq_sum += cur_dosage_val * cur_dosage_val;
+          }
+        }
+        dosage_ct = raw_dosage_ct;
+        GenoarrCountSubsetFreqs2(raw_genovec, raw_dosage_present, raw_sample_ct, raw_dosage_ct, replaced_genocounts);
+      }
+    }
+    const uint32_t replaced_ct = replaced_genocounts[0] + replaced_genocounts[1] + replaced_genocounts[2];
+    const uint32_t remaining_het_ct = genocounts[1] - replaced_genocounts[1];
+    const uint32_t remaining_hom_alt_ct = genocounts[2] - replaced_genocounts[2];
+    const uint32_t alt1_ct = 2 * remaining_hom_alt_ct + remaining_het_ct;
+    alt1_dosage += alt1_ct * 16384LLU;
+    all_dosages[1] = alt1_dosage;
+    const uint32_t nondosage_nm_ct = sample_ct - genocounts[3] - replaced_ct;
+    const uint32_t new_sample_nm_ct = dosage_ct + nondosage_nm_ct;
+    all_dosages[0] = new_sample_nm_ct * 32768LLU - alt1_dosage;
+    if (!imp_r2_ptr) {
+      return kPglRetSuccess;
+    }
+    // possible todo: also move all-hardcall-phase-present, no-dosage
+    // is_minimac3_r2 case under this branch, since we can just set imp_r2 to
+    // NaN or 1.
+    // 16384^2, 32768^2
+    alt1_dosage_sq_sum += remaining_het_ct * 0x10000000LLU + remaining_hom_alt_ct * 0x40000000LLU;
+    *imp_r2_ptr = BiallelicDiploidMinimac3R2(alt1_dosage, alt1_dosage_sq_sum, new_sample_nm_ct);
+    if (!is_minimac3_r2) {
+      *imp_r2_ptr *= 2;
+    }
+    return kPglRetSuccess;
+  }
+  // Need to deal with implicitly phased dosages.  Best to have raw_genovec,
+  // raw_phasepresent, dosage_present, and dosage_main all available, then loop
+  // over everything at once.
+  // (phaseinfo is irrelevant since only absolute value of (left - right)
+  // matters.)
+
+  // We have the following 2x2x3 cases to deal with:
+  // - Subsetted vs. un-subsetted.  Un-subsetted comes up a lot, so we have an
+  //   optimized code path for it.
+  // - Unconditional vs. conditional dosage.  Unconditional should not come up
+  //   much, so we just mock up raw_dosage_present... er, actually, that
+  //   doesn't work because dosage_main would also need to be collapsed.  Sigh.
+  //   Ok, it's still handled separately.
+  // - Only hardcall-phase, vs. only dosage-phase, vs. both.  At least we can
+  //   merge the "only dosage-phase" and "both" cases.
+  // So we end up with 8 primary code paths.
+  // This is kind of a nightmare; it would obviously be nicer to move this
+  // out of pgenlib_internal, and that may eventually happen.  But we don't
+  // want users to be discouraged from running --minimac3-r2-filter when it's
+  // appropriate just because it's a lot slower than other standard filters;
+  // and this also serves as a testing ground for efficient phased-dosage
+  // handling strategies.
+  if (!VrtypeHphase(vrtype)) {
+    ZeroWArr(raw_sample_ctl, raw_phasepresent);
+  }
+  uintptr_t* raw_dosage_present = nullptr;
+  const unsigned char* dosage_main_read;
+  uint32_t raw_dosage_ct = 0;
+  if (is_unconditional_dosage) {
+    dosage_main_read = fread_ptr;
+    if (PtrAddCk(fread_end, raw_sample_ct * sizeof(int16_t), &fread_ptr)) {
+      return kPglRetMalformedInput;
+    }
+    // raw_dosage_ct unused in this case.
+  } else {
+    // could move some duplicate code before the big branch
+    raw_dosage_present = pgrp->workspace_dosage_present;
+    if (!(vrtype & 0x40)) {
+      // dosage list
+      if (unlikely(ParseAndSaveDeltalistAsBitarr(fread_end, raw_sample_ct, &fread_ptr, raw_dosage_present, &raw_dosage_ct))) {
+        return kPglRetMalformedInput;
+      }
+    } else {
+      // dosage bitarray
+      raw_dosage_present[raw_sample_ctl - 1] = 0;
+      const uint32_t raw_sample_ctb = DivUp(raw_sample_ct, CHAR_BIT);
+      memcpy(raw_dosage_present, fread_ptr, raw_sample_ctb);
+      fread_ptr = &(fread_ptr[raw_sample_ctb]);
+      raw_dosage_ct = PopcountWords(raw_dosage_present, raw_sample_ctl);
+    }
+    dosage_main_read = fread_ptr;
+    if (PtrAddCk(fread_end, raw_dosage_ct * sizeof(int16_t), &fread_ptr)) {
+      return kPglRetMalformedInput;
+    }
+  }
+  const unsigned char* dosage_main_biter = dosage_main_read;
+  uint64_t hap_ssq_x2 = 0;
+  uint32_t phased_hc_het_ct = 0;
+  if (!(vrtype & 0x80)) {
+    if (is_unconditional_dosage) {
+      if (!subsetting_required) {
+        const uint32_t raw_sample_ctl_m1 = raw_sample_ctl - 1;
+        uint32_t loop_len = kBitsPerWord;
+        for (uint32_t widx = 0; ; ++widx) {
+          if (widx >= raw_sample_ctl_m1) {
+            if (widx > raw_sample_ctl_m1) {
+              break;
+            }
+            loop_len = ModNz(raw_sample_ct, kBitsPerWord);
+          }
+          uintptr_t phasepresent_word = raw_phasepresent[widx];
+          for (uint32_t uii = 0; uii != loop_len; ++uii) {
+            const uintptr_t cur_dosage_val = CopyFromUnalignedIncrU16ZX(&dosage_main_biter);
+            if (cur_dosage_val != 65535) {
+              alt1_dosage += cur_dosage_val;
+              hap_ssq_x2 += cur_dosage_val * cur_dosage_val;
+              ++dosage_ct;
+              if (phasepresent_word & 1) {
+                // For each dosage, when phasepresent bit is set, implicit
+                // dphase_delta value is 16384 - |16384 - x|.
+                const uintptr_t homdist = 16384 - abs_i32(16384 - cur_dosage_val);
+                hap_ssq_x2 += homdist * homdist;
+              }
+            }
+            phasepresent_word = phasepresent_word >> 1;
+          }
+        }
+      } else {
+        for (uint32_t widx = 0; widx != raw_sample_ctl; ++widx) {
+          uintptr_t sample_include_word = sample_include[widx];
+          if (!sample_include_word) {
+            continue;
+          }
+          const uintptr_t phasepresent_word = raw_phasepresent[widx];
+          const unsigned char* cur_dosage_main = &(dosage_main_read[widx * kBitsPerWord * sizeof(int16_t)]);
+          do {
+            const uint32_t sample_idx_lowbits = ctzw(sample_include_word);
+            const uintptr_t cur_dosage_val = CopyFromUnalignedOffsetU16ZX(cur_dosage_main, sample_idx_lowbits);
+            const uintptr_t lowbit = sample_include_word & (-sample_include_word);
+            if (cur_dosage_val != 65535) {
+              alt1_dosage += cur_dosage_val;
+              hap_ssq_x2 += cur_dosage_val * cur_dosage_val;
+              ++dosage_ct;
+              if (lowbit & phasepresent_word) {
+                const uintptr_t homdist = 16384 - abs_i32(16384 - cur_dosage_val);
+                hap_ssq_x2 += homdist * homdist;
+              }
+            }
+            sample_include_word ^= lowbit;
+          } while (sample_include_word);
+        }
+      }
+      STD_ARRAY_COPY(genocounts, 4, replaced_genocounts);
+      replaced_genocounts[3] = replaced_genocounts[3] + dosage_ct - sample_ct;
+    } else {  // !is_unconditional_dosage
+      if (!subsetting_required) {
+        // phased_hc_het_ct := popcount(phasepresent & (~dosage_present))
+        phased_hc_het_ct = raw_phasepresent_ct - PopcountWordsIntersect(raw_phasepresent, raw_dosage_present, raw_sample_ctl);
+
+        for (uint32_t widx = 0; widx != raw_sample_ctl; ++widx) {
+          uintptr_t dosage_present_word = raw_dosage_present[widx];
+          if (dosage_present_word) {
+            const uintptr_t phasepresent_word = raw_phasepresent[widx];
+            do {
+              const uintptr_t cur_dosage_val = CopyFromUnalignedIncrU16ZX(&dosage_main_biter);
+              alt1_dosage += cur_dosage_val;
+              const uintptr_t lowbit = dosage_present_word & (-dosage_present_word);
+              hap_ssq_x2 += cur_dosage_val * cur_dosage_val;
+              if (lowbit & phasepresent_word) {
+                const uintptr_t homdist = 16384 - abs_i32(16384 - cur_dosage_val);
+                hap_ssq_x2 += homdist * homdist;
+              }
+              dosage_present_word ^= lowbit;
+            } while (dosage_present_word);
+          }
+        }
+        dosage_ct = raw_dosage_ct;
+        GenoarrCountSubsetFreqs2(raw_genovec, raw_dosage_present, raw_sample_ct, raw_dosage_ct, replaced_genocounts);
+      } else {
+        for (uint32_t widx = 0; widx != raw_sample_ctl; ++widx) {
+          const uintptr_t sample_include_word = sample_include[widx];
+          uintptr_t dosage_present_word = raw_dosage_present[widx];
+          if (!sample_include_word) {
+            dosage_main_biter = &(dosage_main_biter[PopcountWord(dosage_present_word) * sizeof(int16_t)]);
+            continue;
+          }
+          const uintptr_t phasepresent_word = raw_phasepresent[widx];
+          phased_hc_het_ct += PopcountWord(sample_include_word & phasepresent_word & (~dosage_present_word));
+          while (dosage_present_word) {
+            const uintptr_t lowbit = dosage_present_word & (-dosage_present_word);
+            if (lowbit & sample_include_word) {
+              const uintptr_t cur_dosage_val = CopyFromUnalignedU16ZX(dosage_main_biter);
+              alt1_dosage += cur_dosage_val;
+              hap_ssq_x2 += cur_dosage_val * cur_dosage_val;
+              ++dosage_ct;
+              if (lowbit & phasepresent_word) {
+                const uintptr_t homdist = 16384 - abs_i32(16384 - cur_dosage_val);
+                hap_ssq_x2 += homdist * homdist;
+              }
+            }
+            dosage_present_word ^= lowbit;
+            dosage_main_biter += sizeof(int16_t);
+          }
+        }
+        GenoarrCountSubsetIntersectFreqs(raw_genovec, raw_dosage_present, sample_include, raw_sample_ct, replaced_genocounts);
+      }
+    }
+  } else {
+    if (is_unconditional_dosage) {
+      if (PtrCheck(fread_end, fread_ptr, raw_sample_ct * sizeof(int16_t))) {
+        return kPglRetMalformedInput;
+      }
+      const unsigned char* dphase_delta_read = fread_ptr;
+      if (!subsetting_required) {
+        for (uint32_t sample_uidx = 0; sample_uidx != raw_sample_ct; ++sample_uidx) {
+          const uintptr_t cur_dosage_val = CopyFromUnalignedOffsetU16ZX(dosage_main_read, sample_uidx);
+          if (cur_dosage_val != 65535) {
+            alt1_dosage += cur_dosage_val;
+            hap_ssq_x2 += cur_dosage_val * cur_dosage_val;
+            ++dosage_ct;
+            // .pgen specification now requires this value to never be missing.
+            const intptr_t dphase_delta_val = CopyFromUnalignedOffsetI16ZX(dphase_delta_read, sample_uidx);
+            hap_ssq_x2 += dphase_delta_val * dphase_delta_val;
+          }
+        }
+      } else {
+        for (uint32_t widx = 0; widx != raw_sample_ctl; ++widx) {
+          uintptr_t sample_include_word = sample_include[widx];
+          if (!sample_include_word) {
+            continue;
+          }
+          const unsigned char* cur_dosage_main = &(dosage_main_read[widx * kBitsPerWord * sizeof(int16_t)]);
+          const unsigned char* cur_dphase_delta = &(dphase_delta_read[widx * kBitsPerWord * sizeof(int16_t)]);
+          do {
+            const uint32_t sample_idx_lowbits = ctzw(sample_include_word);
+            const uintptr_t cur_dosage_val = CopyFromUnalignedOffsetU16ZX(cur_dosage_main, sample_idx_lowbits);
+            if (cur_dosage_val != 65535) {
+              alt1_dosage += cur_dosage_val;
+              hap_ssq_x2 += cur_dosage_val * cur_dosage_val;
+              ++dosage_ct;
+              const intptr_t dphase_delta_val = CopyFromUnalignedOffsetI16ZX(cur_dphase_delta, sample_idx_lowbits);
+              hap_ssq_x2 += dphase_delta_val * dphase_delta_val;
+            }
+            sample_include_word &= sample_include_word - 1;
+          } while (sample_include_word);
+        }
+      }
+      STD_ARRAY_COPY(genocounts, 4, replaced_genocounts);
+      replaced_genocounts[3] = replaced_genocounts[3] + dosage_ct - sample_ct;
+    } else {
+      const unsigned char* file_dphase_present = fread_ptr;
+      const uint32_t raw_dosage_ctb = DivUp(raw_dosage_ct, CHAR_BIT);
+      if (PtrAddCk(fread_end, raw_dosage_ctb, &fread_ptr)) {
+        return kPglRetMalformedInput;
+      }
+      const uint32_t raw_dphase_ct = PopcountBytes(file_dphase_present, raw_dosage_ctb);
+      if (PtrCheck(fread_end, fread_ptr, raw_dphase_ct * sizeof(int16_t))) {
+        return kPglRetMalformedInput;
+      }
+      uintptr_t* raw_dphase_present = pgrp->workspace_dphase_present;
+      ExpandBytearr(file_dphase_present, raw_dosage_present, raw_sample_ctl, raw_dosage_ct, 0, raw_dphase_present);
+      const unsigned char* dphase_delta_biter = fread_ptr;
+      if (!subsetting_required) {
+        phased_hc_het_ct = raw_phasepresent_ct - PopcountWordsIntersect(raw_phasepresent, raw_dosage_present, raw_sample_ctl);
+
+        for (uint32_t widx = 0; widx != raw_sample_ctl; ++widx) {
+          uintptr_t dosage_present_word = raw_dosage_present[widx];
+          if (dosage_present_word) {
+            const uintptr_t phasepresent_word = raw_phasepresent[widx];
+            const uintptr_t dphase_present_word = raw_dphase_present[widx];
+            do {
+              const uintptr_t cur_dosage_val = CopyFromUnalignedIncrU16ZX(&dosage_main_biter);
+              alt1_dosage += cur_dosage_val;
+              const uintptr_t lowbit = dosage_present_word & (-dosage_present_word);
+              hap_ssq_x2 += cur_dosage_val * cur_dosage_val;
+              if (lowbit & dphase_present_word) {
+                const intptr_t dphase_delta_val = CopyFromUnalignedIncrI16ZX(&dphase_delta_biter);
+                hap_ssq_x2 += dphase_delta_val * dphase_delta_val;
+              } else if (lowbit & phasepresent_word) {
+                const uintptr_t homdist = 16384 - abs_i32(16384 - cur_dosage_val);
+                hap_ssq_x2 += homdist * homdist;
+              }
+              dosage_present_word ^= lowbit;
+            } while (dosage_present_word);
+          }
+        }
+        dosage_ct = raw_dosage_ct;
+        GenoarrCountSubsetFreqs2(raw_genovec, raw_dosage_present, raw_sample_ct, raw_dosage_ct, replaced_genocounts);
+      } else {
+        for (uint32_t widx = 0; widx != raw_sample_ctl; ++widx) {
+          const uintptr_t sample_include_word = sample_include[widx];
+          const uintptr_t dphase_present_word = raw_dphase_present[widx];
+          uintptr_t dosage_present_word = raw_dosage_present[widx];
+          if (!sample_include_word) {
+            dosage_main_biter = &(dosage_main_biter[PopcountWord(dosage_present_word) * sizeof(int16_t)]);
+            dphase_delta_biter = &(dphase_delta_biter[PopcountWord(dphase_present_word) * sizeof(int16_t)]);
+            continue;
+          }
+          const uintptr_t phasepresent_word = raw_phasepresent[widx];
+          phased_hc_het_ct += PopcountWord(sample_include_word & phasepresent_word & (~dosage_present_word));
+          while (dosage_present_word) {
+            const uintptr_t lowbit = dosage_present_word & (-dosage_present_word);
+            const uintptr_t dphase_here = lowbit & dphase_present_word;
+            if (lowbit & sample_include_word) {
+              const uintptr_t cur_dosage_val = CopyFromUnalignedU16ZX(dosage_main_biter);
+              alt1_dosage += cur_dosage_val;
+              hap_ssq_x2 += cur_dosage_val * cur_dosage_val;
+              ++dosage_ct;
+              if (dphase_here) {
+                const intptr_t dphase_delta_val = CopyFromUnalignedI16ZX(dphase_delta_biter);
+                hap_ssq_x2 += dphase_delta_val * dphase_delta_val;
+              } else if (lowbit & phasepresent_word) {
+                const uintptr_t homdist = 16384 - abs_i32(16384 - cur_dosage_val);
+                hap_ssq_x2 += homdist * homdist;
+              }
+            }
+            dphase_delta_biter += (dphase_here != 0) * sizeof(int16_t);
+            dosage_present_word ^= lowbit;
+            dosage_main_biter += sizeof(int16_t);
+          }
+        }
+        GenoarrCountSubsetIntersectFreqs(raw_genovec, raw_dosage_present, sample_include, raw_sample_ct, replaced_genocounts);
+      }
+    }
+  }
+  const uint32_t replaced_ct = replaced_genocounts[0] + replaced_genocounts[1] + replaced_genocounts[2];
+  const uint32_t remaining_het_ct = genocounts[1] - replaced_genocounts[1];
+  const uint32_t remaining_hom_alt_ct = genocounts[2] - replaced_genocounts[2];
+  const uint32_t alt1_ct = 2 * remaining_hom_alt_ct + remaining_het_ct;
+  alt1_dosage += alt1_ct * 16384LLU;
+  all_dosages[1] = alt1_dosage;
+  const uint32_t nondosage_nm_ct = sample_ct - genocounts[3] - replaced_ct;
+  const uint32_t new_sample_nm_ct = dosage_ct + nondosage_nm_ct;
+  all_dosages[0] = new_sample_nm_ct * 32768LLU - alt1_dosage;
+  hap_ssq_x2 += (remaining_het_ct + phased_hc_het_ct) * 0x10000000LLU + remaining_hom_alt_ct * 0x40000000LLU;
+  *imp_r2_ptr = BiallelicDiploidMinimac3R2(alt1_dosage, hap_ssq_x2, new_sample_nm_ct);
+  return kPglRetSuccess;
+}
+
+PglErr PgrGetDCounts(const uintptr_t* __restrict sample_include, const uintptr_t* __restrict sample_include_interleaved_vec, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, uint32_t is_minimac3_r2, PgenReader* pgr_ptr, double* imp_r2_ptr, STD_ARRAY_REF(uint32_t, 4) genocounts, uint64_t* __restrict all_dosages) {
+  if (!sample_ct) {
+    STD_ARRAY_REF_FILL0(4, genocounts);
+    all_dosages[0] = 0;
+    all_dosages[1] = 0;
+    if (imp_r2_ptr) {
+      *imp_r2_ptr = 0.0 / 0.0;
+    }
+    return kPglRetSuccess;
+  }
+  PgenReaderMain* pgrp = GetPgrp(pgr_ptr);
+  assert(vidx < pgrp->fi.raw_variant_ct);
+  return GetBasicGenotypeCountsAndDosage16s(sample_include, sample_include_interleaved_vec, GetSicp(pssi), sample_ct, vidx, is_minimac3_r2, pgrp, imp_r2_ptr, genocounts, all_dosages);
+}
+
+// Does not zero-initialize results[].
+void CountAllBytes64(const void* bytearr, uintptr_t byte_ct, uint64_t* __restrict results) {
+  const unsigned char* bytearr_uc = S_CAST(const unsigned char*, bytearr);
+  for (uintptr_t ulii = 0; ulii != byte_ct; ++ulii) {
+    results[bytearr_uc[ulii]] += 1;
+  }
+}
+
+// Does not zero-initialize results[].
+void CountAllNybbles64(const void* nybblearr, uintptr_t nybble_ct, uint64_t* __restrict results) {
+  // possible todo: for sufficiently large nybble_ct, use CountAllBytes and
+  // then postprocess
+  const uintptr_t fullbyte_ct = nybble_ct / 2;
+  const unsigned char* nybblearr_uc = S_CAST(const unsigned char*, nybblearr);
+  for (uintptr_t ulii = 0; ulii != fullbyte_ct; ++ulii) {
+    const uint32_t uii = nybblearr_uc[ulii];
+    results[uii & 15] += 1;
+    results[uii >> 4] += 1;
+  }
+  if (nybble_ct % 2) {
+    results[nybblearr_uc[fullbyte_ct] & 15] += 1;
+  }
+}
+
+void CountAllAux1aDense(const void* patch_01_fvals, uint32_t allele_ct, uint32_t rare01_ct, uint64_t* __restrict one_cts) {
+  one_cts[1] -= rare01_ct;
+  if (allele_ct < 5) {
+    if (allele_ct == 3) {
+      // all entries are 0/1 -> 0/2
+      one_cts[2] = rare01_ct;
+      return;
+    }
+    const uint32_t allele_code_byte_ct = DivUp(rare01_ct, 8);
+    const uint32_t alt3_ct = PopcountBytes(patch_01_fvals, allele_code_byte_ct);
+    one_cts[2] = rare01_ct - alt3_ct;
+    one_cts[3] = alt3_ct;
+    return;
+  }
+  if (allele_ct < 19) {
+    if (allele_ct < 7) {
+      STD_ARRAY_DECL(uint32_t, 4, rare0het_counts);
+#ifndef NO_UNALIGNED
+      GenoarrCountFreqs(S_CAST(const uintptr_t*, patch_01_fvals), rare01_ct, rare0het_counts);
+#else
+      GenoarrbCountFreqs(S_CAST(const unsigned char*, patch_01_fvals), rare01_ct, rare0het_counts);
+#endif
+      for (uint32_t allele_idx_p2 = 2; allele_idx_p2 != allele_ct; ++allele_idx_p2) {
+        one_cts[allele_idx_p2] = rare0het_counts[allele_idx_p2 - 2];
+      }
+      return;
+    }
+    CountAllNybbles64(patch_01_fvals, rare01_ct, &(one_cts[2]));
+    return;
+  }
+  CountAllBytes64(patch_01_fvals, rare01_ct, &(one_cts[2]));
+}
+
+// assumes one_cts[1] initialized to genocounts[1]
+// sample_include should be nullptr if we aren't subsetting
+PglErr CountAllAux1a(const unsigned char* fread_end, const uintptr_t* __restrict sample_include, const uintptr_t* __restrict raw_genoarr, uint32_t aux1a_mode, uint32_t raw_sample_ct, uint32_t allele_ct, uint32_t raw_01_ct, const unsigned char** fread_pp, uint64_t* __restrict one_cts, uint32_t* __restrict deltalist_workspace) {
+  if (aux1a_mode == 15) {
+    return kPglRetSuccess;
+  }
+  if (!sample_include) {
+    uint32_t rare01_ct;
+    if (!aux1a_mode) {
+      const uint32_t fset_byte_ct = DivUp(raw_01_ct, CHAR_BIT);
+      rare01_ct = PopcountBytes(*fread_pp, fset_byte_ct);
+      *fread_pp += fset_byte_ct;
+    } else {
+      const unsigned char* group_info_iter;
+      PglErr reterr = ParseDifflistHeader(fread_end, raw_sample_ct, fread_pp, nullptr, &group_info_iter, &rare01_ct);
+      if (unlikely(reterr)) {
+        return reterr;
+      }
+      reterr = SkipDeltalistIds(fread_end, group_info_iter, rare01_ct, raw_sample_ct, 0, fread_pp);
+      if (unlikely(reterr)) {
+        return reterr;
+      }
+    }
+    const unsigned char* patch_01_fvals = *fread_pp;
+    const uint32_t fvals_byte_ct = GetAux1aAlleleEntryByteCt(allele_ct, rare01_ct);
+    if (PtrAddCk(fread_end, fvals_byte_ct, fread_pp)) {
+      return kPglRetMalformedInput;
+    }
+    CountAllAux1aDense(patch_01_fvals, allele_ct, rare01_ct, one_cts);
+    return kPglRetSuccess;
+  }
+  const uint32_t allele_code_width = GetAux1aWidth(allele_ct);
+  const uintptr_t allele_code_mask = (1U << allele_code_width) - 1;
+  uint64_t* one_cts_offset2 = &(one_cts[2]);
+  if (!aux1a_mode) {
+    const uint32_t fset_byte_ct = DivUp(raw_01_ct, CHAR_BIT);
+    const uint32_t rare01_ct = PopcountBytes(*fread_pp, fset_byte_ct);
+    const unsigned char* patch_01_fset = *fread_pp;
+    *fread_pp += fset_byte_ct;
+    const unsigned char* patch_01_fvals = *fread_pp;
+    const uint32_t fvals_byte_ct = DivUpU64(S_CAST(uint64_t, rare01_ct) * allele_code_width, 8);
+    if (PtrAddCk(fread_end, fvals_byte_ct, fread_pp)) {
+      return kPglRetMalformedInput;
+    }
+    const Halfword* sample_include_hw = DowncastKWToHW(sample_include);
+    uintptr_t sample_hwidx = 0;
+    uintptr_t cur_raw_genoarr_hets = Word01(raw_genoarr[0]);
+    const uint32_t fset_word_ct_m1 = (fset_byte_ct - 1) / kBytesPerWord;
+    const uint32_t fvals_word_ct_m1 = (fvals_byte_ct - 1) / kBytesPerWord;
+    uintptr_t fvals_bits = 0;
+    uint32_t fvals_widx = 0;
+    uint32_t subsetted_rare01_ct = 0;
+    uint32_t loop_len = kBitsPerWord;
+    uint32_t rare01_lowbits = kBitsPerWord;
+    for (uint32_t fset_widx = 0; ; ++fset_widx) {
+      uintptr_t fset_bits;
+      if (fset_widx >= fset_word_ct_m1) {
+        if (fset_widx > fset_word_ct_m1) {
+          break;
+        }
+        fset_bits = SubwordLoad(&(patch_01_fset[fset_word_ct_m1 * kBytesPerWord]), ModNz(fset_byte_ct, kBytesPerWord));
+        loop_len = ModNz(raw_01_ct, kBitsPerWord);
+      } else {
+        CopyFromUnalignedOffsetW(&fset_bits, patch_01_fset, fset_widx);
+      }
+      if (allele_ct == 3) {
+        for (uint32_t uii = 0; uii != loop_len; ++uii) {
+          while (!cur_raw_genoarr_hets) {
+            cur_raw_genoarr_hets = Word01(raw_genoarr[++sample_hwidx]);
+          }
+          if (fset_bits & 1) {
+            const uint32_t sample_uidx_lowbits = ctzw(cur_raw_genoarr_hets) / 2;
+            subsetted_rare01_ct += (sample_include_hw[sample_hwidx] >> sample_uidx_lowbits) & 1;
+          }
+          cur_raw_genoarr_hets &= cur_raw_genoarr_hets - 1;
+          fset_bits = fset_bits >> 1;
+        }
+      } else {
+        for (uint32_t uii = 0; uii != loop_len; ++uii) {
+          while (!cur_raw_genoarr_hets) {
+            cur_raw_genoarr_hets = Word01(raw_genoarr[++sample_hwidx]);
+          }
+          if (fset_bits & 1) {
+            if (rare01_lowbits == kBitsPerWord) {
+              if (fvals_widx == fvals_word_ct_m1) {
+                fvals_bits = SubwordLoad(&(patch_01_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+              } else {
+                CopyFromUnalignedOffsetW(&fvals_bits, patch_01_fvals, fvals_widx);
+              }
+              // unnecessary to apply bzhi here
+              ++fvals_widx;
+              rare01_lowbits = 0;
+            }
+            const uint32_t sample_uidx_lowbits = ctzw(cur_raw_genoarr_hets) / 2;
+            if (sample_include_hw[sample_hwidx] & (1U << sample_uidx_lowbits)) {
+              ++subsetted_rare01_ct;
+              one_cts_offset2[(fvals_bits >> rare01_lowbits) & allele_code_mask] += 1;
+            }
+            rare01_lowbits += allele_code_width;
+          }
+          cur_raw_genoarr_hets &= cur_raw_genoarr_hets - 1;
+          fset_bits = fset_bits >> 1;
+        }
+      }
+    }
+    one_cts_offset2[-1] -= subsetted_rare01_ct;
+    if (allele_ct == 3) {
+      one_cts_offset2[0] = subsetted_rare01_ct;
+    }
+    return kPglRetSuccess;
+  }
+  // mode 1: difflist.
+  if (allele_ct == 3) {
+    // Use CountDeltalistIntersect shortcut here.
+    uint32_t subsetted_02_ct;
+    uint32_t rare01_ct;
+    PglErr reterr = CountDeltalistIntersect(fread_end, sample_include, raw_sample_ct, fread_pp, &subsetted_02_ct, &rare01_ct);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+    one_cts_offset2[-1] -= subsetted_02_ct;
+    one_cts_offset2[0] = subsetted_02_ct;
+    return kPglRetSuccess;
+  }
+  // Save deltalist elements, iterate.
+  uint32_t rare01_ct;
+  PglErr reterr = ParseAndSaveDeltalist(fread_end, raw_sample_ct, fread_pp, deltalist_workspace, &rare01_ct);
+  if (unlikely(reterr)) {
+    return reterr;
+  }
+  const unsigned char* patch_01_fvals = *fread_pp;
+  const uint32_t fvals_byte_ct = DivUpU64(S_CAST(uint64_t, rare01_ct) * allele_code_width, 8);
+  if (PtrAddCk(fread_end, fvals_byte_ct, fread_pp)) {
+    return kPglRetMalformedInput;
+  }
+  const uint32_t fvals_word_ct_m1 = (fvals_byte_ct - 1) / kBytesPerWord;
+  const uint32_t allele_code_logwidth = ctzu32(allele_code_width);
+  uint32_t subsetted_rare01_ct = 0;
+  uint32_t loop_len = kBitsPerWord >> allele_code_logwidth;
+  for (uint32_t fvals_widx = 0; ; ++fvals_widx) {
+    uintptr_t fvals_bits;
+    if (fvals_widx >= fvals_word_ct_m1) {
+      if (fvals_widx > fvals_word_ct_m1) {
+        break;
+      }
+      fvals_bits = SubwordLoad(&(patch_01_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+      loop_len = 1 + ((rare01_ct - 1) & (loop_len - 1));
+    } else {
+      CopyFromUnalignedOffsetW(&fvals_bits, patch_01_fvals, fvals_widx);
+    }
+    const uint32_t* cur_deltalist_base = &(deltalist_workspace[fvals_widx << (kBitsPerWordLog2 - allele_code_logwidth)]);
+    for (uint32_t uii = 0; uii != loop_len; ++uii) {
+      const uint32_t sample_uidx = cur_deltalist_base[uii];
+      if (IsSet(sample_include, sample_uidx)) {
+        ++subsetted_rare01_ct;
+        one_cts_offset2[(fvals_bits >> (uii << allele_code_logwidth)) & allele_code_mask] += 1;
+      }
+    }
+  }
+  one_cts_offset2[-1] -= subsetted_rare01_ct;
+  return kPglRetSuccess;
+}
+
+void CountAllAux1bDense(const void* __restrict patch_10_fvals, uint32_t allele_ct, uint32_t rare10_ct, uint64_t* __restrict one_cts_offset1, uint64_t* __restrict two_cts_offset1) {
+  // probable todo: faster path if two_cts_offset1 == nullptr
+  const uint32_t allele_ct_m1 = allele_ct - 1;
+  two_cts_offset1[0] -= rare10_ct;
+  if (allele_ct_m1 < 5) {
+    if (allele_ct_m1 == 2) {
+      const uint32_t allele_code_byte_ct = DivUp(rare10_ct, 8);
+      const uint32_t hom22_ct = PopcountBytes(patch_10_fvals, allele_code_byte_ct);
+      const uint32_t het12_ct = rare10_ct - hom22_ct;
+      one_cts_offset1[0] += het12_ct;
+      one_cts_offset1[1] += het12_ct;
+      two_cts_offset1[1] = hom22_ct;
+      return;
+    }
+    STD_ARRAY_DECL(uint32_t, 4, alt_counts);
+#ifndef NO_UNALIGNED
+    GenoarrCountFreqs(S_CAST(const uintptr_t*, patch_10_fvals), rare10_ct * 2, alt_counts);
+#else
+    GenoarrbCountFreqs(S_CAST(const unsigned char*, patch_10_fvals), rare10_ct * 2, alt_counts);
+#endif
+    one_cts_offset1[0] += alt_counts[0];
+    for (uint32_t allele_idx_m1 = 1; allele_idx_m1 != allele_ct_m1; ++allele_idx_m1) {
+      const uint32_t homxx_ct = CountNybble(S_CAST(const unsigned char*, patch_10_fvals), allele_idx_m1 * kMask5555, rare10_ct);
+      one_cts_offset1[allele_idx_m1] += alt_counts[allele_idx_m1] - 2 * homxx_ct;
+      two_cts_offset1[allele_idx_m1] = homxx_ct;
+    }
+    return;
+  }
+  const unsigned char* patch_10_fvals_uc = S_CAST(const unsigned char*, patch_10_fvals);
+  if (allele_ct_m1 < 17) {
+    // for larger rare10_ct, this should use a byte counter
+    for (uint32_t uii = 0; uii != rare10_ct; ++uii) {
+      const uint32_t cur_byte = patch_10_fvals_uc[uii];
+      const uint32_t cur_byte_hi = cur_byte >> 4;
+      const uint32_t cur_byte_lo = cur_byte & 15;
+      if (cur_byte_hi == cur_byte_lo) {
+        two_cts_offset1[cur_byte_lo] += 1;
+      } else {
+        one_cts_offset1[cur_byte_lo] += 1;
+        one_cts_offset1[cur_byte_hi] += 1;
+      }
+    }
+    return;
+  }
+  for (uint32_t uii = 0; uii != rare10_ct; ++uii) {
+    const uint32_t cur_byte_lo = patch_10_fvals_uc[2 * uii];
+    const uint32_t cur_byte_hi = patch_10_fvals_uc[2 * uii + 1];
+    if (cur_byte_hi == cur_byte_lo) {
+      two_cts_offset1[cur_byte_lo] += 1;
+    } else {
+      one_cts_offset1[cur_byte_lo] += 1;
+      one_cts_offset1[cur_byte_hi] += 1;
+    }
+  }
+}
+
+PglErr CountAllAux1b(const unsigned char* fread_end, const uintptr_t* __restrict sample_include, const uintptr_t* __restrict raw_genoarr, uint32_t aux1b_mode, uint32_t raw_sample_ct, uint32_t allele_ct, uint32_t raw_10_ct, const unsigned char** fread_pp, uint64_t* __restrict one_cts, uint64_t* __restrict two_cts, uint32_t* __restrict deltalist_workspace) {
+  if (aux1b_mode == 15) {
+    return kPglRetSuccess;
+  }
+  uint64_t* one_cts_offset1 = &(one_cts[1]);
+  uint64_t* two_cts_offset1 = &(two_cts[1]);
+  if (!sample_include) {
+    uint32_t rare10_ct;
+    if (!aux1b_mode) {
+      const uint32_t fset_byte_ct = DivUp(raw_10_ct, CHAR_BIT);
+      rare10_ct = PopcountBytes(*fread_pp, fset_byte_ct);
+      *fread_pp += fset_byte_ct;
+    } else {
+      const unsigned char* group_info_iter;
+      PglErr reterr = ParseDifflistHeader(fread_end, raw_sample_ct, fread_pp, nullptr, &group_info_iter, &rare10_ct);
+      if (unlikely(reterr)) {
+        return reterr;
+      }
+      reterr = SkipDeltalistIds(fread_end, group_info_iter, rare10_ct, raw_sample_ct, 0, fread_pp);
+      if (unlikely(reterr)) {
+        return reterr;
+      }
+    }
+    const unsigned char* patch_10_fvals = *fread_pp;
+    const uint32_t fvals_byte_ct = GetAux1bAlleleEntryByteCt(allele_ct, rare10_ct);
+    if (PtrAddCk(fread_end, fvals_byte_ct, fread_pp)) {
+      return kPglRetMalformedInput;
+    }
+    CountAllAux1bDense(patch_10_fvals, allele_ct, rare10_ct, one_cts_offset1, two_cts_offset1);
+    return kPglRetSuccess;
+  }
+  uintptr_t detect_hom_mask_lo;  // unused
+  const uint32_t allele_code_logwidth = GetAux1bConsts(allele_ct, &detect_hom_mask_lo);
+  const uint32_t code10_logwidth = allele_code_logwidth + (allele_code_logwidth != 0);
+  const uint32_t allele_code_width = 1U << allele_code_logwidth;
+  const uint32_t allele_code_mask = (1U << allele_code_width) - 1;
+  const uint32_t allele_ct_m1 = allele_ct - 1;
+  uint32_t rare10_lowbits = kBitsPerWord;
+  // probable todo: faster paths when two_cts_offset1 == nullptr
+  if (!aux1b_mode) {
+    const uint32_t fset_byte_ct = DivUp(raw_10_ct, CHAR_BIT);
+    const uint32_t rare10_ct = PopcountBytes(*fread_pp, fset_byte_ct);
+    const unsigned char* patch_10_fset = *fread_pp;
+    *fread_pp += fset_byte_ct;
+    const unsigned char* patch_10_fvals = *fread_pp;
+    const uint32_t fvals_byte_ct = DivUpU64(S_CAST(uint64_t, rare10_ct) << code10_logwidth, 8);
+    if (PtrAddCk(fread_end, fvals_byte_ct, fread_pp)) {
+      return kPglRetMalformedInput;
+    }
+    const Halfword* sample_include_hw = DowncastKWToHW(sample_include);
+    uintptr_t sample_hwidx = 0;
+    uintptr_t cur_raw_genoarr_xys = Word10(raw_genoarr[0]);
+    const uint32_t fset_word_ct_m1 = (fset_byte_ct - 1) / kBytesPerWord;
+    const uint32_t fvals_word_ct_m1 = (fvals_byte_ct - 1) / kBytesPerWord;
+    const uint32_t code10_width = 1U << code10_logwidth;
+    uintptr_t fvals_bits = 0;
+    uint32_t fvals_widx = 0;
+    uint32_t subsetted_rare10_ct = 0;
+    uint32_t loop_len = kBitsPerWord;
+    for (uint32_t fset_widx = 0; ; ++fset_widx) {
+      uintptr_t fset_bits;
+      if (fset_widx >= fset_word_ct_m1) {
+        if (fset_widx > fset_word_ct_m1) {
+          break;
+        }
+        fset_bits = SubwordLoad(&(patch_10_fset[fset_word_ct_m1 * kBytesPerWord]), ModNz(fset_byte_ct, kBytesPerWord));
+        loop_len = ModNz(raw_10_ct, kBitsPerWord);
+      } else {
+        CopyFromUnalignedOffsetW(&fset_bits, patch_10_fset, fset_widx);
+      }
+      if (allele_ct_m1 == 2) {
+        for (uint32_t uii = 0; uii != loop_len; ++uii) {
+          while (!cur_raw_genoarr_xys) {
+            cur_raw_genoarr_xys = Word10(raw_genoarr[++sample_hwidx]);
+          }
+          if (fset_bits & 1) {
+            if (rare10_lowbits == kBitsPerWord) {
+              if (fvals_widx == fvals_word_ct_m1) {
+                fvals_bits = SubwordLoad(&(patch_10_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+              } else {
+                CopyFromUnalignedOffsetW(&fvals_bits, patch_10_fvals, fvals_widx);
+              }
+              // unnecessary to apply bzhi here
+              ++fvals_widx;
+              rare10_lowbits = 0;
+            }
+            const uint32_t sample_uidx_lowbits = ctzw(cur_raw_genoarr_xys) / 2;
+            if (sample_include_hw[sample_hwidx] & (1U << sample_uidx_lowbits)) {
+              ++subsetted_rare10_ct;
+              two_cts_offset1[1] += (fvals_bits >> rare10_lowbits) & 1;
+            }
+            ++rare10_lowbits;
+          }
+          cur_raw_genoarr_xys &= cur_raw_genoarr_xys - 1;
+          fset_bits = fset_bits >> 1;
+        }
+      } else {
+        for (uint32_t uii = 0; uii != loop_len; ++uii) {
+          while (!cur_raw_genoarr_xys) {
+            cur_raw_genoarr_xys = Word10(raw_genoarr[++sample_hwidx]);
+          }
+          if (fset_bits & 1) {
+            if (rare10_lowbits == kBitsPerWord) {
+              if (fvals_widx == fvals_word_ct_m1) {
+                fvals_bits = SubwordLoad(&(patch_10_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+              } else {
+                CopyFromUnalignedOffsetW(&fvals_bits, patch_10_fvals, fvals_widx);
+              }
+              // unnecessary to apply bzhi here
+              ++fvals_widx;
+              rare10_lowbits = 0;
+            }
+            const uint32_t sample_uidx_lowbits = ctzw(cur_raw_genoarr_xys) / 2;
+            if (sample_include_hw[sample_hwidx] & (1U << sample_uidx_lowbits)) {
+              ++subsetted_rare10_ct;
+              const uintptr_t cur_code_pair = fvals_bits >> rare10_lowbits;
+              const uint32_t cur_code_hi = (cur_code_pair >> allele_code_width) & allele_code_mask;
+              const uint32_t cur_code_lo = cur_code_pair & allele_code_mask;
+              if (cur_code_hi == cur_code_lo) {
+                two_cts_offset1[cur_code_lo] += 1;
+              } else {
+                one_cts_offset1[cur_code_lo] += 1;
+                one_cts_offset1[cur_code_hi] += 1;
+              }
+            }
+            rare10_lowbits += code10_width;
+          }
+          cur_raw_genoarr_xys &= cur_raw_genoarr_xys - 1;
+          fset_bits = fset_bits >> 1;
+        }
+      }
+    }
+    two_cts_offset1[0] -= subsetted_rare10_ct;
+    if (allele_ct == 3) {
+      const uint32_t subsetted_het12_ct = subsetted_rare10_ct - two_cts_offset1[1];
+      one_cts_offset1[0] += subsetted_het12_ct;
+      one_cts_offset1[1] += subsetted_het12_ct;
+    }
+    return kPglRetSuccess;
+  }
+  // Save deltalist elements, iterate.
+  uint32_t rare10_ct;
+  PglErr reterr = ParseAndSaveDeltalist(fread_end, raw_sample_ct, fread_pp, deltalist_workspace, &rare10_ct);
+  if (unlikely(reterr)) {
+    return reterr;
+  }
+  const unsigned char* patch_10_fvals = *fread_pp;
+  const uint32_t fvals_byte_ct = DivUpU64(S_CAST(uint64_t, rare10_ct) << code10_logwidth, 8);
+  if (PtrAddCk(fread_end, fvals_byte_ct, fread_pp)) {
+    return kPglRetMalformedInput;
+  }
+  const uint32_t fvals_word_ct_m1 = (fvals_byte_ct - 1) / kBytesPerWord;
+  uint32_t subsetted_rare10_ct = 0;
+  uint32_t loop_len = kBitsPerWord >> code10_logwidth;
+  for (uint32_t fvals_widx = 0; ; ++fvals_widx) {
+    uintptr_t fvals_bits;
+    if (fvals_widx >= fvals_word_ct_m1) {
+      if (fvals_widx > fvals_word_ct_m1) {
+        break;
+      }
+      fvals_bits = SubwordLoad(&(patch_10_fvals[fvals_widx * kBytesPerWord]), ModNz(fvals_byte_ct, kBytesPerWord));
+      loop_len = 1 + ((rare10_ct - 1) & (loop_len - 1));
+    } else {
+      CopyFromUnalignedOffsetW(&fvals_bits, patch_10_fvals, fvals_widx);
+    }
+    const uint32_t* cur_deltalist_base = &(deltalist_workspace[fvals_widx << (kBitsPerWordLog2 - code10_logwidth)]);
+    if (allele_ct == 3) {
+      for (uint32_t uii = 0; uii != loop_len; ++uii) {
+        const uint32_t sample_uidx = cur_deltalist_base[uii];
+        if (IsSet(sample_include, sample_uidx)) {
+          ++subsetted_rare10_ct;
+          two_cts_offset1[1] += (fvals_bits >> uii) & 1;
+        }
+      }
+    } else {
+      for (uint32_t uii = 0; uii != loop_len; ++uii) {
+        const uint32_t sample_uidx = cur_deltalist_base[uii];
+        if (IsSet(sample_include, sample_uidx)) {
+          ++subsetted_rare10_ct;
+          const uintptr_t cur_code_pair = fvals_bits >> (uii << code10_logwidth);
+          const uint32_t cur_code_hi = (cur_code_pair >> allele_code_width) & allele_code_mask;
+          const uint32_t cur_code_lo = cur_code_pair & allele_code_mask;
+          if (cur_code_hi == cur_code_lo) {
+            two_cts_offset1[cur_code_lo] += 1;
+          } else {
+            one_cts_offset1[cur_code_lo] += 1;
+            one_cts_offset1[cur_code_hi] += 1;
+          }
+        }
+      }
+    }
+  }
+  two_cts_offset1[0] -= subsetted_rare10_ct;
+  if (allele_ct == 3) {
+    const uint32_t subsetted_het12_ct = subsetted_rare10_ct - two_cts_offset1[1];
+    one_cts_offset1[0] += subsetted_het12_ct;
+    one_cts_offset1[1] += subsetted_het12_ct;
+  }
+  return kPglRetSuccess;
+}
+
+PglErr GetMultiallelicCountsAndDosage16s(const uintptr_t* __restrict sample_include, const uintptr_t* __restrict sample_include_interleaved_vec, uint32_t sample_ct, uint32_t vidx, uint32_t allele_ct, __maybe_unused uint32_t is_minimac3_r2, PgenReaderMain* pgrp, double* __restrict imp_r2_ptr, uint32_t* __restrict het_ctp, STD_ARRAY_REF(uint32_t, 4) genocounts, uint64_t* all_dosages) {
+  // only called on multiallelic variants
+  // no dosages for now
+  const uint32_t vrtype = GetPgfiVrtype(&(pgrp->fi), vidx);
+  const uint32_t raw_sample_ct = pgrp->fi.raw_sample_ct;
+  const uint32_t subsetting_required = (sample_ct != raw_sample_ct);
+  uintptr_t* raw_genovec = pgrp->workspace_vec;
+  const unsigned char* fread_ptr;
+  const unsigned char* fread_end;
+  PglErr reterr = ReadRawGenovec(subsetting_required, vidx, pgrp, &fread_ptr, &fread_end, raw_genovec);
+  if (unlikely(reterr)) {
+    return reterr;
+  }
+  ZeroTrailingNyps(raw_sample_ct, raw_genovec);
+  if (!subsetting_required) {
+    GenoarrCountFreqsUnsafe(raw_genovec, raw_sample_ct, genocounts);
+    sample_include = nullptr;
+  } else {
+    GenoarrCountSubsetFreqs(raw_genovec, sample_include_interleaved_vec, raw_sample_ct, sample_ct, genocounts);
+  }
+  uint64_t* one_cts = pgrp->workspace_imp_r2;
+  uint64_t* two_cts = &(one_cts[allele_ct]);
+  one_cts[0] = genocounts[1];
+  one_cts[1] = genocounts[1];
+  ZeroU64Arr(allele_ct - 2, &(one_cts[2]));
+  two_cts[0] = genocounts[0];
+  two_cts[1] = genocounts[2];
+  ZeroU64Arr(allele_ct - 2, &(two_cts[2]));
+  // Cases:
+  // - No hardcall-phase present.  Then we don't need to know raw_het_ct.
+  // - No multiallelic dosages present, not computing minimac3-r2.  Then we
+  //   still don't need to know raw_het_ct.
+  // - Otherwise, we need to know raw_het_ct, either for the minimac3-r2
+  //   computation or to locate the beginning of aux3/aux4.
+  //   If we're computing minimac3-r2, AND
+  //     (i) we're subsetting, or
+  //     (ii) multiallelic dosages are present,
+  //   it's also necessary to compute all_hets, either to compute correct
+  //   subsetted minimac3-r2 or to know how many phased-hardcalls are
+  //   overridden by phased dosages.
+  const uint32_t raw_het_ct_needed = VrtypeHphase(vrtype) && (is_minimac3_r2 || (vrtype & 0x60));
+  uintptr_t* all_hets = nullptr;
+  const uint32_t raw_sample_ctl = BitCtToWordCt(raw_sample_ct);
+  uint32_t raw_het_ct = genocounts[1]; // inaccurate, corrected later if needed
+  if (VrtypeMultiallelicHc(vrtype)) {
+    const uint32_t aux1_first_byte = *fread_ptr++;
+    const uint32_t aux1a_mode = aux1_first_byte & 15;
+    const uint32_t aux1b_mode = aux1_first_byte >> 4;
+    uint32_t raw_10_ct = 0;
+    if ((!aux1a_mode) || (!aux1b_mode) || sample_include) {
+      GenovecCount12Unsafe(raw_genovec, raw_sample_ct, &raw_het_ct, &raw_10_ct);
+    }
+    uint32_t* deltalist_workspace = pgrp->workspace_difflist_sample_ids;
+    reterr = CountAllAux1a(fread_end, sample_include, raw_genovec, aux1a_mode, raw_sample_ct, allele_ct, raw_het_ct, &fread_ptr, one_cts, deltalist_workspace);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+    const unsigned char* aux1b_start = fread_ptr;
+    reterr = CountAllAux1b(fread_end, sample_include, raw_genovec, aux1b_mode, raw_sample_ct, allele_ct, raw_10_ct, &fread_ptr, one_cts, two_cts, deltalist_workspace);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+    if (raw_het_ct_needed) {
+      if (!sample_include) {
+        raw_het_ct += genocounts[2];
+        for (uint32_t aidx = 1; aidx != allele_ct; ++aidx) {
+          raw_het_ct -= two_cts[aidx];
+        }
+      }
+      if (sample_include || (is_minimac3_r2 && (vrtype & 0x60))) {
+        all_hets = pgrp->workspace_all_hets;
+        PgrDetectGenoarrHets(raw_genovec, raw_sample_ct, all_hets);
+        if (aux1b_mode != 15) {
+          uintptr_t* aux1b_hets = pgrp->workspace_aux1x_present;
+          uint32_t aux1b_het_present;
+          reterr = GetAux1bHets(fread_end, raw_genovec, aux1b_mode, raw_sample_ct, allele_ct, raw_10_ct, &aux1b_start, aux1b_hets, &aux1b_het_present, deltalist_workspace);
+          if (unlikely(reterr)) {
+            return reterr;
+          }
+          if (aux1b_het_present) {
+            BitvecOr(aux1b_hets, raw_sample_ctl, all_hets);
+          }
+        }
+        if (sample_include) {
+          raw_het_ct = PopcountWords(all_hets, raw_sample_ctl);
+        }
+      }
+    }
+  }
+  uintptr_t* raw_phasepresent = nullptr;
+  uint32_t extra_phased_het_ct = 0;
+  if (raw_het_ct_needed) {
+    if (!all_hets) {
+      reterr = SkipAux2(fread_end, raw_het_ct, &fread_ptr, is_minimac3_r2? (&extra_phased_het_ct) : nullptr);
+      if (unlikely(reterr)) {
+        return reterr;
+      }
+    } else {
+      raw_phasepresent = pgrp->workspace_subset;
+      reterr = GetPhasepresentAndSkipPhaseinfo(fread_end, all_hets, raw_sample_ct, raw_het_ct, &fread_ptr, raw_phasepresent, &extra_phased_het_ct);
+      if (unlikely(reterr)) {
+        return reterr;
+      }
+      if (sample_include) {
+        extra_phased_het_ct = PopcountWordsIntersect(raw_phasepresent, sample_include, raw_sample_ctl);
+      }
+    }
+  }
+  if (!(vrtype & 0x60)) {
+    uint32_t hom_hc_ct = 0;
+    for (uint32_t allele_idx = 0; allele_idx != allele_ct; ++allele_idx) {
+      const uint64_t cur_hom_ct = two_cts[allele_idx];
+      hom_hc_ct += cur_hom_ct;
+      const uint64_t two_dosage = cur_hom_ct * 0x8000LLU;
+      const uint64_t dosage_sum = one_cts[allele_idx] * 0x4000LLU + two_dosage;
+      all_dosages[allele_idx] = dosage_sum;
+      // Repurpose two_cts[] to store ssqs.
+      two_cts[allele_idx] = (dosage_sum + two_dosage) * 0x4000LLU;
+    }
+    const uint32_t nm_sample_ct = sample_ct - genocounts[3];
+    *het_ctp = nm_sample_ct - hom_hc_ct;
+    if (!imp_r2_ptr) {
+      return kPglRetSuccess;
+    }
+    *imp_r2_ptr = MultiallelicDiploidMinimac3R2(all_dosages, two_cts, nm_sample_ct, allele_ct, extra_phased_het_ct);
+    if (!is_minimac3_r2) {
+      *imp_r2_ptr *= 2;
+    }
+    return kPglRetSuccess;
+  }
+#ifndef PGENLIB_NOPRINT
+  fputs("dosages not yet supported by GetMultiallelicCountsAndDosage16s()\n", stderr);
+#endif
+  return kPglRetNotYetSupported;
+}
+
+PglErr PgrGetMDCounts(const uintptr_t* __restrict sample_include, const uintptr_t* __restrict sample_include_interleaved_vec, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, uint32_t is_minimac3_r2, PgenReader* pgr_ptr, double* __restrict imp_r2_ptr, uint32_t* __restrict het_ctp, STD_ARRAY_REF(uint32_t, 4) genocounts, uint64_t* __restrict all_dosages) {
+  PgenReaderMain* pgrp = GetPgrp(pgr_ptr);
+  assert(vidx < pgrp->fi.raw_variant_ct);
+  const uintptr_t* allele_idx_offsets = pgrp->fi.allele_idx_offsets;
+  const uint32_t allele_ct = allele_idx_offsets? (allele_idx_offsets[vidx + 1] - allele_idx_offsets[vidx]) : 2;
+  if (!sample_ct) {
+    STD_ARRAY_REF_FILL0(4, genocounts);
+    ZeroU64Arr(allele_ct, all_dosages);
+    if (imp_r2_ptr) {
+      *imp_r2_ptr = 0.0 / 0.0;
+    }
+    return kPglRetSuccess;
+  }
+  const uint32_t* sample_include_cumulative_popcounts = GetSicp(pssi);
+  const uint32_t vrtype = GetPgfiVrtype(&(pgrp->fi), vidx);
+  if ((allele_ct == 2) || (!(vrtype & 0x68))) {
+    PglErr reterr = GetBasicGenotypeCountsAndDosage16s(sample_include, sample_include_interleaved_vec, sample_include_cumulative_popcounts, sample_ct, vidx, is_minimac3_r2, pgrp, imp_r2_ptr, genocounts, all_dosages);
+    *het_ctp = genocounts[1];
+    ZeroU64Arr(allele_ct - 2, &(all_dosages[2]));
+    return reterr;
+  }
+  return GetMultiallelicCountsAndDosage16s(sample_include, sample_include_interleaved_vec, sample_ct, vidx, allele_ct, is_minimac3_r2, pgrp, imp_r2_ptr, het_ctp, genocounts, all_dosages);
+}
+
+PglErr PgrGetMD(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, PgenReader* pgr_ptr, PgenVariant* pgvp) {
+  pgvp->patch_01_ct = 0;
+  pgvp->patch_10_ct = 0;
+  pgvp->dosage_ct = 0;
+  pgvp->multidosage_sample_ct = 0;
+  if (!sample_ct) {
+    return kPglRetSuccess;
+  }
+  PgenReaderMain* pgrp = GetPgrp(pgr_ptr);
+  const uint32_t* sample_include_cumulative_popcounts = GetSicp(pssi);
+  const uintptr_t* allele_idx_offsets = pgrp->fi.allele_idx_offsets;
+  const uint32_t allele_ct = allele_idx_offsets? (allele_idx_offsets[vidx + 1] - allele_idx_offsets[vidx]) : 2;
+  const uint32_t vrtype = GetPgfiVrtype(&(pgrp->fi), vidx);
+  if ((allele_ct == 2) || (!(vrtype & 0x68))) {
+    return IMPLPgrGetD(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, pgrp, pgvp->genovec, pgvp->dosage_present, pgvp->dosage_main, &(pgvp->dosage_ct));
+  }
+  const unsigned char* fread_ptr;
+  const unsigned char* fread_end;
+  uintptr_t* all_hets = VrtypeHphase(vrtype)? pgrp->workspace_all_hets : nullptr;
+  if (VrtypeMultiallelicHc(vrtype)) {
+    PglErr reterr = GetMultiallelicCodes(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, pgrp, all_hets? (&fread_ptr) : nullptr, all_hets? (&fread_end) : nullptr, all_hets, pgvp);
+    if (!(vrtype & 0x60)) {
+      return reterr;
+    }
+  } else {
+    // todo: ReadRawGenovec, etc.
+  }
+#ifndef PGENLIB_NOPRINT
+  fputs("true multiallelic dosages not yet supported by PgrGetMD()\n", stderr);
+#endif
+  return kPglRetNotYetSupported;
+}
+
+PglErr IMPLPgrGetDp(const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, uint32_t sample_ct, uint32_t vidx, PgenReaderMain* pgrp, PgenVariant* pgvp) {
+  assert(vidx < pgrp->fi.raw_variant_ct);
+  if (!sample_ct) {
+    pgvp->phasepresent_ct = 0;
+    pgvp->dosage_ct = 0;
+    pgvp->dphase_ct = 0;
+    return kPglRetSuccess;
+  }
+  const unsigned char* fread_ptr = nullptr;
+  const unsigned char* fread_end = nullptr;
+  const uint32_t vrtype = GetPgfiVrtype(&(pgrp->fi), vidx);
+  const uint32_t dosage_is_present = VrtypeDosage(vrtype);
+  PglErr reterr = ReadGenovecHphaseSubsetUnsafe(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, pgrp, dosage_is_present? (&fread_ptr) : nullptr, dosage_is_present? (&fread_end) : nullptr, pgvp->genovec, pgvp->phasepresent, pgvp->phaseinfo, &(pgvp->phasepresent_ct));
+  if (reterr || (!dosage_is_present)) {
+    pgvp->dosage_ct = 0;
+    pgvp->dphase_ct = 0;
+    return reterr;
+  }
+  const uintptr_t* allele_idx_offsets = pgrp->fi.allele_idx_offsets;
+  const uint32_t allele_ct = allele_idx_offsets? (allele_idx_offsets[vidx + 1] - allele_idx_offsets[vidx]) : 2;
+  return ParseDosage16(fread_ptr, fread_end, sample_include, sample_ct, vidx, allele_ct, pgrp, &(pgvp->dosage_ct), pgvp->dphase_present, pgvp->dphase_delta, &(pgvp->dphase_ct), pgvp->dosage_present, pgvp->dosage_main);
+}
+
+PglErr PgrGetInv1Dp(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, AlleleCode allele_idx, PgenReader* pgr_ptr, PgenVariant* pgvp) {
+  PgenReaderMain* pgrp = GetPgrp(pgr_ptr);
+  const uint32_t* sample_include_cumulative_popcounts = GetSicp(pssi);
+  const uintptr_t* allele_idx_offsets = pgrp->fi.allele_idx_offsets;
+  const uint32_t allele_ct = allele_idx_offsets? (allele_idx_offsets[vidx + 1] - allele_idx_offsets[vidx]) : 2;
+  if ((allele_ct == 2) || (!allele_idx)) {
+    PglErr reterr = IMPLPgrGetDp(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, pgrp, pgvp);
+    if (allele_idx) {
+      GenovecInvertUnsafe(sample_ct, pgvp->genovec);
+      if (pgvp->phasepresent_ct) {
+        BitvecInvert(BitCtToWordCt(sample_ct), pgvp->phaseinfo);
+      }
+      if (pgvp->dosage_ct) {
+        BiallelicDosage16Invert(pgvp->dosage_ct, pgvp->dosage_main);
+        if (pgvp->dphase_ct) {
+          BiallelicDphase16Invert(pgvp->dphase_ct, pgvp->dphase_delta);
+        }
+      }
+    }
+    return reterr;
+  }
+  const uint32_t vrtype = pgrp->fi.vrtypes[vidx];
+  if (!VrtypeDosage(vrtype)) {
+    pgvp->dosage_ct = 0;
+    pgvp->dphase_ct = 0;
+    return IMPLPgrGetInv1P(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, allele_idx, pgrp, pgvp->genovec, pgvp->phasepresent, pgvp->phaseinfo, &(pgvp->phasepresent_ct));
+  }
+#ifndef PGENLIB_NOPRINT
+  fputs("multiallelic dosage not yet supported by GetInv1Dp()\n", stderr);
+#endif
+  return kPglRetNotYetSupported;
+}
+
+PglErr PgrGetMDp(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, PgenReader* pgr_ptr, PgenVariant* pgvp) {
+  PgenReaderMain* pgrp = GetPgrp(pgr_ptr);
+  const uint32_t* sample_include_cumulative_popcounts = GetSicp(pssi);
+  pgvp->patch_01_ct = 0;
+  pgvp->patch_10_ct = 0;
+  pgvp->phasepresent_ct = 0;
+  pgvp->dosage_ct = 0;
+  pgvp->multidosage_sample_ct = 0;
+  pgvp->dphase_ct = 0;
+  pgvp->multidphase_sample_ct = 0;
+  if (!sample_ct) {
+    return kPglRetSuccess;
+  }
+  const uintptr_t* allele_idx_offsets = pgrp->fi.allele_idx_offsets;
+  const uint32_t allele_ct = allele_idx_offsets? (allele_idx_offsets[vidx + 1] - allele_idx_offsets[vidx]) : 2;
+  const uint32_t vrtype = GetPgfiVrtype(&(pgrp->fi), vidx);
+  if ((allele_ct == 2) || (!(vrtype & 0x68))) {
+    return IMPLPgrGetDp(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, pgrp, pgvp);
+  }
+  const unsigned char* fread_ptr;
+  const unsigned char* fread_end;
+  uintptr_t* all_hets = VrtypeHphase(vrtype)? pgrp->workspace_all_hets : nullptr;
+  if (VrtypeMultiallelicHc(vrtype)) {
+    PglErr reterr = GetMultiallelicCodes(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, pgrp, all_hets? (&fread_ptr) : nullptr, all_hets? (&fread_end) : nullptr, all_hets, pgvp);
+    if (reterr || (!all_hets)) {
+      pgvp->phasepresent_ct = 0;
+      return reterr;
+    }
+    if (!(vrtype & 0x60)) {
+      const uint32_t raw_sample_ct = pgrp->fi.raw_sample_ct;
+      return ParseAux2Subset(fread_end, (sample_ct != raw_sample_ct)? sample_include : nullptr, all_hets, nullptr, raw_sample_ct, sample_ct, &fread_ptr, pgvp->phasepresent, pgvp->phaseinfo, &(pgvp->phasepresent_ct), pgrp->workspace_subset);
+    }
+  } else {
+    // todo: ReadRawGenovec, etc.
+  }
+#ifndef PGENLIB_NOPRINT
+  fputs("true multiallelic dosages not yet supported by PgrGetMDp()\n", stderr);
+#endif
+  return kPglRetNotYetSupported;
+}
+
+static_assert(sizeof(AlleleCode) == 1, "CountAux1bHets() must be updated.");
+uintptr_t CountAux1bHets(const AlleleCode* patch_10_vals, uintptr_t rare10_ct) {
+  // Similar to CountByte().
+  uintptr_t byte_ct = rare10_ct * 2;
+#ifdef __LP64__
+  if (byte_ct < kBytesPerVec) {
+#endif
+    uintptr_t tot = 0;
+    for (uintptr_t offset = 0; offset < byte_ct; offset += 2) {
+      tot += (patch_10_vals[offset] != patch_10_vals[offset + 1]);
+    }
+    return tot;
+#ifdef __LP64__
+  }
+  const unsigned char* bytearr_uc_iter = DowncastKToUc(patch_10_vals);
+  const VecW m0 = vecw_setzero();
+  const VecW m8 = VCONST_W(kMask00FF);
+  VecW acc = vecw_setzero();
+  while (byte_ct > 255 * kBytesPerVec) {
+    VecUc inner_acc = vecuc_setzero();
+    for (uint32_t uii = 0; uii != 255; ++uii) {
+      const VecUc cur_vvec = vecuc_loadu(bytearr_uc_iter);
+      bytearr_uc_iter = &(bytearr_uc_iter[kBytesPerVec]);
+      const VecUc shifted_vvec = VecWToUc(vecw_srli(VecUcToW(cur_vvec), 8));
+      inner_acc = inner_acc - (cur_vvec == shifted_vvec);
+    }
+    const VecW partial_sums = VecUcToW(inner_acc) & m8;
+    acc = acc + vecw_sad(partial_sums, m0);
+    byte_ct -= 255 * kBytesPerVec;
+  }
+  const unsigned char* bytearr_uc_final = &(bytearr_uc_iter[byte_ct - kBytesPerVec]);
+  VecUc inner_acc = vecuc_setzero();
+  while (bytearr_uc_iter < bytearr_uc_final) {
+    const VecUc cur_vvec = vecuc_loadu(bytearr_uc_iter);
+    bytearr_uc_iter = &(bytearr_uc_iter[kBytesPerVec]);
+    const VecUc shifted_vvec = VecWToUc(vecw_srli(VecUcToW(cur_vvec), 8));
+    inner_acc = inner_acc - (cur_vvec == shifted_vvec);
+  }
+  VecUc cur_vvec = vecuc_loadu(bytearr_uc_final);
+  const uintptr_t overlap_byte_ct = bytearr_uc_iter - bytearr_uc_final;
+  const VecUc shifted_vvec = VecWToUc(vecw_srli(VecUcToW(cur_vvec), 8));
+  const VecUc mask_vvec = vecuc_loadu(&(kLeadMask[kBytesPerVec - overlap_byte_ct]));
+  cur_vvec = (cur_vvec == shifted_vvec) & mask_vvec;
+  inner_acc = inner_acc - cur_vvec;
+  const VecW partial_sums = VecUcToW(inner_acc) & m8;
+  acc = acc + vecw_sad(partial_sums, m0);
+  const uintptr_t tot = HsumW(acc);
+  return rare10_ct - tot;
+#endif
+}
+
+PglErr PgrGetRaw(uint32_t vidx, PgenGlobalFlags read_gflags, PgenReader* pgr_ptr, uintptr_t** loadbuf_iter_ptr, unsigned char* loaded_vrtype_ptr) {
+  PgenReaderMain* pgrp = GetPgrp(pgr_ptr);
+  // currently handles multiallelic hardcalls, hardcall phase, and biallelic
+  // dosage (both unphased and phased)
+  // todo: multiallelic dosage
+  const uint32_t raw_sample_ct = pgrp->fi.raw_sample_ct;
+  const uint32_t vrtype = GetPgfiVrtype(&(pgrp->fi), vidx);
+  uintptr_t* genovec = (*loadbuf_iter_ptr);
+  uintptr_t* loadbuf_iter = &(genovec[NypCtToAlignedWordCt(raw_sample_ct)]);
+  const uint32_t multiallelic_hc_present = (vrtype / 8) & 1;
+  const uint32_t save_multiallelic_hc = multiallelic_hc_present && (read_gflags & kfPgenGlobalMultiallelicHardcallFound);
+  const uint32_t hphase_is_present = (vrtype / 0x10) & 1;
+  const uint32_t save_hphase = hphase_is_present && (read_gflags & kfPgenGlobalHardcallPhasePresent);
+  const uint32_t dosage_is_present = (vrtype & 0x60)? 1 : 0;
+  const uint32_t save_dosage = dosage_is_present && (read_gflags & kfPgenGlobalDosagePresent);
+
+  const uint32_t save_dphase = (vrtype & 0x80) && (read_gflags & kfPgenGlobalDosagePhasePresent);
+  assert(save_dosage || (!save_dphase));
+
+  if (loaded_vrtype_ptr) {
+    *loaded_vrtype_ptr = save_multiallelic_hc * 8 + save_hphase * 0x10 + save_dosage * 0x60 + save_dphase * 0x80;
+  }
+  const unsigned char* fread_ptr;
+  const unsigned char* fread_end;
+  PglErr reterr = ReadRawGenovec(0, vidx, pgrp, &fread_ptr, &fread_end, genovec);
+  if ((!(multiallelic_hc_present || save_hphase || save_dosage)) || reterr) {
+    *loadbuf_iter_ptr = loadbuf_iter;
+    return reterr;
+  }
+
+  const uint32_t raw_sample_ctl = BitCtToWordCt(raw_sample_ct);
+  ZeroTrailingNyps(raw_sample_ct, genovec);
+  const uintptr_t* allele_idx_offsets = pgrp->fi.allele_idx_offsets;
+  const uint32_t allele_ct = allele_idx_offsets? (allele_idx_offsets[vidx + 1] - allele_idx_offsets[vidx]) : 2;
+  uint32_t het_ct = 0;
+  if (multiallelic_hc_present) {
+    if (!save_multiallelic_hc) {
+      // todo: erase-alt2+ fast path
+      // mostly mirror PgrGet2P(0, 1), but a bit of extra logic is needed to
+      // throw out phased-10het entries
+      return kPglRetNotYetSupported;
+    }
+    // assume we always save multiallelic info
+    // raw format:
+    //   rare01_ct, padded out to a word
+    //   rare10_ct, padded out to a word
+    //   [round up to vector boundary, for patch_01_set]
+    //   aux1a, if not mode 15:
+    //     patch_01_set as bitarray, raw_sample_ctl words
+    //     patch_01_vals, round up to word boundary
+    //     [round up to vector boundary, for patch_10_set]
+    //   aux1b, if not mode 15:
+    //     patch_10_set as bitarray, raw_sample_ctl words
+    //     patch_10_vals, round up to word boundary
+    // round up to vector boundary at end
+    const uint32_t aux1_first_byte = *fread_ptr++;
+    const uint32_t aux1a_mode = aux1_first_byte & 15;
+    const uint32_t aux1b_mode = aux1_first_byte >> 4;
+    uint32_t raw_10_ct = 0;
+    if ((!aux1a_mode) || hphase_is_present) {
+      if (!aux1b_mode) {
+        GenovecCount12Unsafe(genovec, raw_sample_ct, &het_ct, &raw_10_ct);
+      } else {
+        het_ct = CountNyp(genovec, kMask5555, raw_sample_ct);
+      }
+    } else if (!aux1b_mode) {
+      raw_10_ct = CountNyp(genovec, kMaskAAAA, raw_sample_ct);
+    }
+    uintptr_t* multihc_raw = loadbuf_iter;
+    loadbuf_iter = &(loadbuf_iter[RoundUpPow2(2, kWordsPerVec)]);
+    uint32_t rare01_ct = 0;
+    if (aux1a_mode != 15) {
+      uintptr_t* patch_01_set = loadbuf_iter;
+      loadbuf_iter = &(loadbuf_iter[raw_sample_ctl]);
+      // (could decide to vector-align patch_01_vals later)
+      AlleleCode* patch_01_vals = DowncastWToAC(loadbuf_iter);
+      reterr = ExportAux1a(fread_end, genovec, aux1a_mode, raw_sample_ct, allele_ct, het_ct, &fread_ptr, patch_01_set, patch_01_vals, &rare01_ct);
+      if (unlikely(reterr)) {
+        return reterr;
+      }
+      loadbuf_iter = &(loadbuf_iter[DivUp(rare01_ct, kBytesPerWord / sizeof(AlleleCode))]);
+      AlignWToVec(&loadbuf_iter);
+    }
+    uint32_t rare10_ct = 0;
+    if (aux1b_mode != 15) {
+      uintptr_t* patch_10_set = loadbuf_iter;
+      loadbuf_iter = &(loadbuf_iter[raw_sample_ctl]);
+      AlleleCode* patch_10_vals = DowncastWToAC(loadbuf_iter);
+      reterr = ExportAux1b(fread_end, genovec, aux1b_mode, raw_sample_ct, allele_ct, raw_10_ct, &fread_ptr, patch_10_set, patch_10_vals, &rare10_ct);
+      if (unlikely(reterr)) {
+        return reterr;
+      }
+      loadbuf_iter = &(loadbuf_iter[DivUp(rare10_ct, kBytesPerWord / (2 * sizeof(AlleleCode)))]);
+      AlignWToVec(&loadbuf_iter);
+      if (hphase_is_present) {
+        het_ct += CountAux1bHets(patch_10_vals, rare10_ct);
+      }
+    }
+    multihc_raw[0] = rare01_ct;
+    multihc_raw[1] = rare10_ct;
+  } else if (hphase_is_present) {
+    het_ct = CountNyp(genovec, kMask5555, raw_sample_ct);
+  }
+
+  if (hphase_is_present) {
+    if (unlikely(!het_ct)) {
+      // there shouldn't be a hphase track at all in this case
+      return kPglRetMalformedInput;
+    }
+    const uint32_t het_ctdl = het_ct / kBitsPerWord;
+    uintptr_t* phaseraw = loadbuf_iter;
+    const uint32_t first_half_byte_ct = 1 + (het_ct / CHAR_BIT);
+    if (save_hphase) {
+      // this needs to be synced with MakePgenThread()
+#ifdef __LP64__
+      // save het_ct later so we can use PopcountWords() below
+      phaseraw[0] = 0;
+#else
+      phaseraw[0] = het_ct;
+      phaseraw[1] = 0;
+#endif
+      loadbuf_iter = &(loadbuf_iter[8 / kBytesPerWord]);
+      loadbuf_iter[het_ctdl] = 0;
+      memcpy(loadbuf_iter, fread_ptr, first_half_byte_ct);
+      loadbuf_iter = &(loadbuf_iter[1 + het_ctdl]);
+    }
+    const uint32_t explicit_phasepresent = fread_ptr[0] & 1;
+    const unsigned char* aux2_start = fread_ptr;
+    fread_ptr = &(fread_ptr[first_half_byte_ct]);
+    if (explicit_phasepresent) {
+      uint32_t raw_phasepresent_ct;
+      if (save_hphase) {
+#ifdef __LP64__
+        raw_phasepresent_ct = PopcountWords(phaseraw, het_ctdl + 2);
+#else
+        raw_phasepresent_ct = PopcountWords(&(phaseraw[2]), het_ctdl + 1);
+#endif
+      } else {
+        // bugfix (11 Apr 2018): not copied to phaseraw in this case
+        raw_phasepresent_ct = PopcountBytes(aux2_start, first_half_byte_ct);
+      }
+      --raw_phasepresent_ct;
+      if (unlikely(!raw_phasepresent_ct)) {
+        // there shouldn't be a hphase track at all in this case, either
+        return kPglRetMalformedInput;
+      }
+      const uint32_t second_half_byte_ct = DivUp(raw_phasepresent_ct, CHAR_BIT);
+      if (save_hphase) {
+#ifdef __LP64__
+        phaseraw[0] = het_ct | (S_CAST(uint64_t, raw_phasepresent_ct) << 32);
+#else
+        phaseraw[1] = raw_phasepresent_ct;
+#endif
+        memcpy(loadbuf_iter, fread_ptr, second_half_byte_ct);
+        loadbuf_iter = &(loadbuf_iter[BitCtToWordCt(raw_phasepresent_ct)]);
+      }
+      fread_ptr = &(fread_ptr[second_half_byte_ct]);
+    }
+#ifdef __LP64__
+    if (save_hphase) {
+      if (!explicit_phasepresent) {
+        phaseraw[0] = het_ct;
+      }
+      AlignWToVec(&loadbuf_iter);
+    }
+#endif
+  }
+  if (!save_dosage) {
+    *loadbuf_iter_ptr = loadbuf_iter;
+    return kPglRetSuccess;
+  }
+  uintptr_t* dosage_present = loadbuf_iter;
+  const uint32_t raw_sample_ctaw = BitCtToAlignedWordCt(raw_sample_ct);
+  loadbuf_iter = &(loadbuf_iter[raw_sample_ctaw]);
+  uint16_t* dosage_main = DowncastWToU16(loadbuf_iter);
+  // probable todo: pack this more tightly in the future
+  const uintptr_t dosage_main_aligned_wordct = kWordsPerVec * DivUp(raw_sample_ct, (kBytesPerVec / sizeof(int16_t)));
+  loadbuf_iter = &(loadbuf_iter[dosage_main_aligned_wordct]);
+  uintptr_t* dphase_present = nullptr;
+  int16_t* dphase_delta = nullptr;
+  if (save_dphase) {
+    dphase_present = loadbuf_iter;
+    loadbuf_iter = &(loadbuf_iter[raw_sample_ctaw]);
+    dphase_delta = DowncastWToI16(loadbuf_iter);
+    loadbuf_iter = &(loadbuf_iter[dosage_main_aligned_wordct]);
+  }
+  *loadbuf_iter_ptr = loadbuf_iter;
+  reterr = ParseDosage16(fread_ptr, fread_end, nullptr, raw_sample_ct, vidx, allele_ct, pgrp, nullptr, dphase_present, dphase_delta, nullptr, dosage_present, dosage_main);
+  return reterr;
+}
+
+
+// Currently assumes no phase or multiallelic hardcalls.
+// tried to have more custom code, turned out to not be worth it
+PglErr ReadMissingness(const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, uint32_t sample_ct, uint32_t vidx, PgenReaderMain* pgrp, const unsigned char** fread_pp, const unsigned char** fread_endp, uintptr_t* __restrict missingness, uintptr_t* __restrict hets, uintptr_t* __restrict genovec_buf) {
+  const unsigned char* fread_ptr;
+  const unsigned char* fread_end;
+  PglErr reterr = ReadGenovecSubsetUnsafe(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, pgrp, &fread_ptr, &fread_end, genovec_buf);
+  ZeroTrailingNyps(sample_ct, genovec_buf);
+  GenoarrToMissingnessUnsafe(genovec_buf, sample_ct, missingness);
+  if (hets) {
+    PgrDetectGenoarrHetsUnsafe(genovec_buf, NypCtToWordCt(sample_ct), hets);
+  }
+  if (fread_pp) {
+    *fread_pp = fread_ptr;
+    *fread_endp = fread_end;
+  }
+  return reterr;
+}
+
+PglErr PgrGetMissingness(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, PgenReader* pgr_ptr, uintptr_t* __restrict missingness, uintptr_t* __restrict genovec_buf) {
+  if (!sample_ct) {
+    return kPglRetSuccess;
+  }
+  PgenReaderMain* pgrp = GetPgrp(pgr_ptr);
+  // may as well add a hets parameter?
+  assert(vidx < pgrp->fi.raw_variant_ct);
+  return ReadMissingness(sample_include, GetSicp(pssi), sample_ct, vidx, pgrp, nullptr, nullptr, missingness, nullptr, genovec_buf);
+}
+
+PglErr PgrGetMissingnessD(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, PgenReader* pgr_ptr, uintptr_t* __restrict missingness_hc, uintptr_t* __restrict missingness_dosage, uintptr_t* __restrict hets, uintptr_t* __restrict genovec_buf) {
+  if (!sample_ct) {
+    return kPglRetSuccess;
+  }
+  PgenReaderMain* pgrp = GetPgrp(pgr_ptr);
+  // sample_include can't be null
+  // either missingness_hc or missingness_dosage must be non-null
+  assert(vidx < pgrp->fi.raw_variant_ct);
+  const uint32_t* sample_include_cumulative_popcounts = GetSicp(pssi);
+  const uint32_t vrtype = GetPgfiVrtype(&(pgrp->fi), vidx);
+  const uint32_t dosage_is_relevant = missingness_dosage && VrtypeDosage(vrtype);
+  const uint32_t need_to_skip_aux1or2 = dosage_is_relevant && (vrtype & 0x18);
+  const uint32_t raw_sample_ct = pgrp->fi.raw_sample_ct;
+  const uint32_t raw_sample_ctl = BitCtToWordCt(raw_sample_ct);
+  const uint32_t subsetting_required = (sample_ct != raw_sample_ct);
+  const unsigned char* fread_ptr = nullptr;
+  const unsigned char* fread_end = nullptr;
+  uintptr_t* missingness_base = missingness_hc? missingness_hc : missingness_dosage;
+  if (!need_to_skip_aux1or2) {
+    PglErr reterr = ReadMissingness(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, pgrp, dosage_is_relevant? (&fread_ptr) : nullptr, dosage_is_relevant? (&fread_end) : nullptr, missingness_base, hets, genovec_buf);
+    if (missingness_dosage && missingness_hc) {
+      memcpy(missingness_dosage, missingness_hc, BitCtToWordCt(sample_ct) * sizeof(intptr_t));
+    }
+    if (reterr || (!dosage_is_relevant)) {
+      return reterr;
+    }
+  } else {
+    PglErr reterr = ReadRawGenovec(subsetting_required, vidx, pgrp, &fread_ptr, &fread_end, genovec_buf);
+    if (unlikely(reterr)) {
+      return reterr;
+    }
+    ZeroTrailingNyps(raw_sample_ct, genovec_buf);
+    uintptr_t* subsetted_genovec = pgrp->workspace_vec;
+    CopyNyparrNonemptySubset(genovec_buf, sample_include, raw_sample_ct, sample_ct, subsetted_genovec);
+    GenoarrToMissingnessUnsafe(subsetted_genovec, sample_ct, missingness_base);
+    if (missingness_hc) {
+      memcpy(missingness_dosage, missingness_hc, BitCtToWordCt(sample_ct) * sizeof(intptr_t));
+    }
+
+    const uintptr_t* allele_idx_offsets = pgrp->fi.allele_idx_offsets;
+    const uint32_t allele_ct = allele_idx_offsets? (allele_idx_offsets[vidx + 1] - allele_idx_offsets[vidx]) : 2;
+    if (VrtypeHphase(vrtype) || hets) {
+      uintptr_t* all_hets = pgrp->workspace_all_hets;
+      PgrDetectGenoarrHets(genovec_buf, raw_sample_ct, all_hets);
+      if (VrtypeMultiallelicHc(vrtype)) {
+        // see analogous branch in ReadGenovecHphaseSubsetUnsafe()
+        // probable todo: make this a separate function
+        const uint32_t aux1_first_byte = *fread_ptr++;
+        const uint32_t aux1a_mode = aux1_first_byte & 15;
+        const uint32_t aux1b_mode = aux1_first_byte >> 4;
+        uint32_t raw_01_ct = 0;
+        uint32_t raw_10_ct = 0;
+        if ((!aux1a_mode) || (!aux1b_mode)) {
+          GenovecCount12Unsafe(genovec_buf, raw_sample_ct, &raw_01_ct, &raw_10_ct);
+        }
+        reterr = SkipAux1a(fread_end, aux1a_mode, raw_sample_ct, allele_ct, raw_01_ct, &fread_ptr);
+        if (unlikely(reterr)) {
+          return reterr;
+        }
+        uintptr_t* aux1b_hets = pgrp->workspace_aux1x_present;
+        uint32_t* deltalist_workspace = pgrp->workspace_difflist_sample_ids;
+        uint32_t aux1b_het_present;
+        reterr = GetAux1bHets(fread_end, genovec_buf, aux1b_mode, raw_sample_ct, allele_ct, raw_10_ct, &fread_ptr, aux1b_hets, &aux1b_het_present, deltalist_workspace);
+        if (unlikely(reterr)) {
+          return reterr;
+        }
+        if (aux1b_het_present) {
+          BitvecOr(aux1b_hets, raw_sample_ctl, all_hets);
+        }
+      }
+      if (hets) {
+        CopyBitarrSubset(all_hets, sample_include, sample_ct, hets);
+      }
+      if (VrtypeHphase(vrtype)) {
+        reterr = SkipAux2(fread_end, PopcountWords(all_hets, raw_sample_ctl), &fread_ptr, nullptr);
+        if (unlikely(reterr)) {
+          return reterr;
+        }
+      }
+    } else {
+      SkipAux1(fread_end, genovec_buf, raw_sample_ct, allele_ct, &fread_ptr);
+    }
+  }
+  // now perform bitwise andnot with dosage_present
+  if ((vrtype & 0x60) == 0x40) {
+    // unconditional dosage.  spot-check the appropriate entries for equality
+    // to 65535.
+    const unsigned char* dosage_main_read = fread_ptr;
+    // bugfix (18 Feb 2019): sample_include is permitted to be nullptr here
+    if (!subsetting_required) {
+      // probable todo: faster iteration over set bits
+      for (uint32_t widx = 0; widx != raw_sample_ctl; ++widx) {
+        uintptr_t missing_dosage_bits = missingness_dosage[widx];
+        if (missing_dosage_bits) {
+          const unsigned char* cur_dosage_main = &(dosage_main_read[widx * kBitsPerWord * sizeof(int16_t)]);
+          do {
+            uint32_t sample_idx_lowbits = ctzw(missing_dosage_bits);
+            uint16_t cur_dosage_u16;
+            CopyFromUnalignedOffsetU16(&cur_dosage_u16, cur_dosage_main, sample_idx_lowbits);
+            if (cur_dosage_u16 != 65535) {
+              missingness_dosage[widx] ^= missing_dosage_bits & (-missing_dosage_bits);
+            }
+            missing_dosage_bits &= missing_dosage_bits - 1;
+          } while (missing_dosage_bits);
+        }
+      }
+    } else {
+      uintptr_t sample_uidx_base = 0;
+      uintptr_t sample_include_bits = sample_include[0];
+      for (uint32_t sample_idx = 0; sample_idx != sample_ct; ++sample_idx) {
+        const uintptr_t sample_uidx = BitIter1(sample_include, &sample_uidx_base, &sample_include_bits);
+        if (!IsSet(missingness_dosage, sample_idx)) {
+          continue;
+        }
+        uint16_t cur_dosage_u16;
+        CopyFromUnalignedOffsetU16(&cur_dosage_u16, dosage_main_read, sample_uidx);
+        if (cur_dosage_u16 != 65535) {
+          ClearBit(sample_idx, missingness_dosage);
+        }
+      }
+    }
+    return kPglRetSuccess;
+  }
+  uintptr_t* dosage_present = pgrp->workspace_dosage_present;
+  if ((vrtype & 0x60) == 0x20) {
+    // dosage list
+    uint32_t dummy;
+    if (unlikely(ParseAndSaveDeltalistAsBitarr(fread_end, raw_sample_ct, &fread_ptr, dosage_present, &dummy))) {
+      return kPglRetMalformedInput;
+    }
+  } else {
+    // dosage bitarray
+    dosage_present[raw_sample_ctl - 1] = 0;
+    const uint32_t raw_sample_ctb = DivUp(raw_sample_ct, CHAR_BIT);
+    memcpy(dosage_present, fread_ptr, raw_sample_ctb);
+  }
+  if (subsetting_required) {
+    CopyBitarrSubset(dosage_present, sample_include, sample_ct, pgrp->workspace_vec);
+    dosage_present = pgrp->workspace_vec;
+  }
+  BitvecInvmask(dosage_present, BitCtToWordCt(sample_ct), missingness_dosage);
+  return kPglRetSuccess;
+}
+
+static inline BoolErr ValidateVint31(const unsigned char* buf_end, const unsigned char** bufpp, uint32_t* val_ptr) {
+  if (unlikely(buf_end <= (*bufpp))) {
+    return 1;
+  }
+  uint32_t vint32 = *((*bufpp)++);
+  if (vint32 <= 127) {
+    *val_ptr = vint32;
+    return 0;
+  }
+  vint32 &= 127;
+  for (uint32_t shift = 7; shift != 28; shift += 7) {
+    if (unlikely(buf_end == (*bufpp))) {
+      return 1;
+    }
+    uint32_t uii = *((*bufpp)++);
+    vint32 |= (uii & 127) << shift;
+    if (uii <= 127) {
+      *val_ptr = vint32;
+      return 0;
+    }
+  }
+  if (unlikely(buf_end == (*bufpp))) {
+    return 1;
+  }
+  uint32_t uii = *((*bufpp)++);
+  if (unlikely(uii > 7)) {
+    return 1;
+  }
+  vint32 |= uii << 28;
+  *val_ptr = vint32;
+  return 0;
+}
+
+BoolErr ValidateDifflistHeader(const unsigned char* fread_end, uint32_t sample_ct, const unsigned char** fread_pp, uintptr_t* raregeno_buf, const unsigned char** difflist_group_info_ptr, uint32_t* difflist_len_ptr) {
+  // can be used for deltalists: pass raregeno_buf == nullptr.
+  if (unlikely(ValidateVint31(fread_end, fread_pp, difflist_len_ptr))) {
+    // todo: ensure fread_pp points to a problematic byte whenever a validate_
+    // function returns an error, so the error message can provide an accurate
+    // byte offset.
+    return 1;
+  }
+  const uint32_t difflist_len = *difflist_len_ptr;
+  *difflist_group_info_ptr = *fread_pp;
+  if (!difflist_len) {
+    return 0;
+  }
+  if (unlikely(difflist_len > sample_ct / kPglMaxDifflistLenDivisor)) {
+    return 1;
+  }
+  const uint32_t group_ct = DivUp(difflist_len, kPglDifflistGroupSize);
+  const uint32_t sample_id_byte_ct = BytesToRepresentNzU32(sample_ct);
+  const uint32_t difflist_index_byte_ct = group_ct * (sample_id_byte_ct + 1) - 1;
+  if (PtrAddCk(fread_end, difflist_index_byte_ct, fread_pp)) {
+    return 1;
+  }
+  if (!raregeno_buf) {
+    return 0;
+  }
+  const uint32_t raregeno_byte_ct = NypCtToByteCt(difflist_len);
+  const unsigned char* raregeno_start = *fread_pp;
+  if (PtrAddCk(fread_end, raregeno_byte_ct, fread_pp)) {
+    return 1;
+  }
+  memcpy(raregeno_buf, raregeno_start, raregeno_byte_ct);
+  const uint32_t difflist_len_mod4 = difflist_len % 4;
+  if (difflist_len_mod4) {
+    const uint32_t last_raregeno_byte = (*fread_pp)[-1];
+    if (unlikely(last_raregeno_byte >> (2 * difflist_len_mod4))) {
+      return 1;
+    }
+  }
+  return 0;
+}
+
+BoolErr ValidateAndApplyDifflist(const unsigned char* fread_end, uint32_t common2_code, const unsigned char** fread_pp, PgenReaderMain* pgrp, uintptr_t* __restrict genoarr) {
+  // Side effects: uses pgr.workspace_raregeno_tmp_loadbuf.
+  // Similar to ParseAndApplyDifflist(), but with exhaustive input
+  // validation.
+  const uint32_t sample_ct = pgrp->fi.raw_sample_ct;
+  uintptr_t* cur_raregeno_iter = pgrp->workspace_raregeno_tmp_loadbuf;
+  const unsigned char* group_info_iter;
+  uint32_t difflist_len;
+  if (unlikely(ValidateDifflistHeader(fread_end, sample_ct, fread_pp, cur_raregeno_iter, &group_info_iter, &difflist_len))) {
+    return 1;
+  }
+  if (!difflist_len) {
+    return 0;
+  }
+  const uint32_t subgroup_idx_last = (difflist_len - 1) / kBitsPerWordD2;
+  if (common2_code) {
+    // 1-bit format + list of exceptions.  In this case,
+    //   (i) the length of the exception list must be < (sample_ct / 16)
+    //   (ii) every raregeno entry must either be one of the two rare genotype
+    //        values, or involve a rare alt allele.
+    if (unlikely(difflist_len >= (sample_ct / (2 * kPglMaxDifflistLenDivisor)))) {
+      return 1;
+    }
+    const uintptr_t common_code_delta = common2_code & 3;
+    const uintptr_t inv_common_word1 = (3 - common2_code / 4) * kMask5555;
+    const uintptr_t inv_common_word2 = inv_common_word1 - (common_code_delta * kMask5555);
+    for (uint32_t subgroup_idx = 0; ; ++subgroup_idx) {
+      uintptr_t cur_raregeno_word = cur_raregeno_iter[subgroup_idx];
+      const uintptr_t match1 = Word11(cur_raregeno_word ^ inv_common_word1);
+      const uintptr_t match2 = Word11(cur_raregeno_word ^ inv_common_word2);
+      if (subgroup_idx == subgroup_idx_last) {
+        // ignore trailing bits
+        const uint32_t lshift = ((-difflist_len) % kBitsPerWordD2) * 2;
+        if (unlikely((match1 << lshift) || (match2 << lshift))) {
+          return 1;
+        }
+        break;
+      }
+      if (unlikely(match1 || match2)) {
+        // todo: if (multiallelic_hc_present && (!inv_common_word2)), record
+        // might be fine; but we need to verify these are actually rare alt
+        // alleles.
+        // (er, above comment is obsolete)
+        return 1;
+      }
+    }
+  }
+  const uint32_t sample_id_byte_ct = BytesToRepresentNzU32(sample_ct);
+  const unsigned char* group_byte_cts_iter = &(group_info_iter[DivUp(difflist_len, kPglDifflistGroupSize) * sample_id_byte_ct]);
+  const unsigned char* prev_group_start = *fread_pp;
+
+  uintptr_t sample_idx = 0;
+  for (uint32_t subgroup_idx = 0; ; ++subgroup_idx) {
+    uint32_t remaining_deltas_in_subgroup = kBitsPerWordD2 - 1;
+    if (subgroup_idx >= subgroup_idx_last) {
+      if (subgroup_idx > subgroup_idx_last) {
+        return 0;
+      }
+      remaining_deltas_in_subgroup &= difflist_len - 1;
+    }
+    if (!(subgroup_idx % (kPglDifflistGroupSize / kBitsPerWordD2))) {
+      uintptr_t new_sample_idx_start = SubU32Load(group_info_iter, sample_id_byte_ct);
+      if (subgroup_idx) {
+        if (unlikely(sample_idx >= new_sample_idx_start)) {
+          return 1;
+        }
+        const uint32_t group_byte_ct = S_CAST(uint32_t, *group_byte_cts_iter++) + 63;
+        if (unlikely(S_CAST(uintptr_t, (*fread_pp) - prev_group_start) != group_byte_ct)) {
+          return 1;
+        }
+        prev_group_start = *fread_pp;
+      }
+      sample_idx = new_sample_idx_start;
+      group_info_iter = &(group_info_iter[sample_id_byte_ct]);
+    } else {
+      uint32_t sample_idx_incr;
+      if (unlikely(ValidateVint31(fread_end, fread_pp, &sample_idx_incr) || (!sample_idx_incr))) {
+        return 1;
+      }
+      sample_idx += sample_idx_incr;
+    }
+    uintptr_t cur_raregeno_word = *cur_raregeno_iter++;
+    for (; ; --remaining_deltas_in_subgroup) {
+      if (unlikely(sample_idx >= sample_ct)) {
+        return 1;
+      }
+      const uintptr_t cur_geno = cur_raregeno_word & 3;
+      AssignNyparrEntry(sample_idx, cur_geno, genoarr);
+      if (!remaining_deltas_in_subgroup) {
+        break;
+      }
+      uint32_t sample_idx_incr;
+      if (unlikely(ValidateVint31(fread_end, fread_pp, &sample_idx_incr) || (!sample_idx_incr))) {
+        return 1;
+      }
+      sample_idx += sample_idx_incr;
+      cur_raregeno_word >>= 2;
+    }
+  }
+}
+
+BoolErr ValidateOnebit(const unsigned char* fread_end, const unsigned char** fread_pp, PgenReaderMain* pgrp, uintptr_t* __restrict genoarr) {
+  // ParseOnebitUnsafe() with exhaustive input validation.
+  const uint32_t sample_ct = pgrp->fi.raw_sample_ct;
+  const uint32_t common2_and_bitarray_byte_ct = (sample_ct + 15) / CHAR_BIT;
+  const unsigned char* onebit_main_iter = *fread_pp;
+  if (PtrAddCk(fread_end, common2_and_bitarray_byte_ct, fread_pp)) {
+    return 1;
+  }
+  const uintptr_t common2_code = *onebit_main_iter++;
+  const uintptr_t common_code_delta = common2_code & 3;
+  uintptr_t word_base = common2_code / 4;
+  if (unlikely((!common_code_delta) || (word_base + common_code_delta > 3))) {
+    return 1;
+  }
+  word_base *= kMask5555;
+  const uint32_t genoarr_widx_trail = (sample_ct + 7) / kBitsPerWordD2;
+  const uint32_t genoarr_widx_end = NypCtToWordCt(sample_ct);
+  for (uint32_t genoarr_widx = 0; ; ++genoarr_widx) {
+    uintptr_t ww;
+    if (genoarr_widx >= genoarr_widx_trail) {
+      if (genoarr_widx == genoarr_widx_end) {
+        break;
+      }
+      const uint32_t nontrail_byte_ct = ((sample_ct - 1) % kBitsPerWordD2) / CHAR_BIT;
+      ww = ProperSubwordLoad(&(onebit_main_iter[genoarr_widx_trail * sizeof(Halfword)]), 1 + nontrail_byte_ct);
+      const uint32_t sample_ct_mod8 = sample_ct % 8;
+      if (sample_ct_mod8) {
+        if (unlikely(ww >> (nontrail_byte_ct * 8 + sample_ct_mod8))) {
+          return 1;
+        }
+      }
+    } else {
+      Halfword hw;
+      CopyFromUnalignedOffsetHW(&hw, onebit_main_iter, genoarr_widx);
+      ww = hw;
+    }
+    ww = UnpackHalfwordToWord(ww);
+    genoarr[genoarr_widx] = word_base + ww * common_code_delta;
+  }
+  return ValidateAndApplyDifflist(fread_end, common2_code, fread_pp, pgrp, genoarr);
+}
+
+// assumes that we aren't dealing with the trivial fixed-width case.
+// saves main genotype array to genovec.  does not zero out trailing bits.
+BoolErr ValidateGeno(const unsigned char* fread_end, uint32_t vidx, PgenReaderMain* pgrp, const unsigned char** fread_pp, uintptr_t* genovec, char* errstr_buf) {
+  const uint32_t vrtype = pgrp->fi.vrtypes[vidx];
+  const uint32_t sample_ct = pgrp->fi.raw_sample_ct;
+  if (VrtypeLdCompressed(vrtype)) {
+    CopyNyparr(pgrp->ldbase_genovec, sample_ct, genovec);
+    if (unlikely(ValidateAndApplyDifflist(fread_end, 0, fread_pp, pgrp, genovec))) {
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid LD difflist for (0-based) variant #%u.\n", vidx);
+      return 1;
+    }
+    if (vrtype & 1) {
+      GenovecInvertUnsafe(sample_ct, genovec);
+    }
+    return 0;
+  }
+  const uint32_t is_ldbase = VrtypeLdCompressed(pgrp->fi.vrtypes[vidx + 1]);
+  if (!(vrtype & 4)) {
+    if (vrtype & 1) {
+      if (unlikely(ValidateOnebit(fread_end, fread_pp, pgrp, genovec))) {
+        snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid 1-bit genotype record for (0-based) variant #%u.\n", vidx);
+        return 1;
+      }
+    } else {
+      const uint32_t genovec_byte_ct = DivUp(sample_ct, 4);
+      const unsigned char* src_genodata = *fread_pp;
+      if (PtrAddCk(fread_end, genovec_byte_ct, fread_pp)) {
+        snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid 2-bit genotype record for (0-based) variant #%u\n", vidx);
+        return 1;
+      }
+      memcpy(genovec, src_genodata, genovec_byte_ct);
+      const uint32_t sample_ct_mod4 = sample_ct % 4;
+      if (sample_ct_mod4) {
+        const uint32_t last_geno_byte = (*fread_pp)[-1];
+        if (unlikely(last_geno_byte >> (2 * sample_ct_mod4))) {
+          snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Last genotype byte for (0-based) variant #%u has nonzero trailing bits.\n", vidx);
+          return 1;
+        }
+      }
+    }
+  } else {
+    const uint32_t vrtype_low2 = vrtype & 3;
+    if (vrtype_low2 != 1) {
+      const uint32_t vec_ct = NypCtToVecCt(sample_ct);
+      vecset(genovec, vrtype_low2 * kMask5555, vec_ct);
+      if (unlikely(ValidateAndApplyDifflist(fread_end, 0, fread_pp, pgrp, genovec))) {
+        snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid genotype difflist for (0-based) variant #%u.\n", vidx);
+        return 1;
+      }
+    } else {
+      if (is_ldbase) {
+        snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid LD back-reference from variant #%u to all-hom-ref variant #%u.\n", vidx + 1, vidx);
+        return 1;
+      }
+      ZeroWArr(NypCtToWordCt(sample_ct), genovec);
+    }
+  }
+  if (is_ldbase) {
+    CopyNyparr(genovec, sample_ct, pgrp->ldbase_genovec);
+  }
+  return 0;
+}
+
+BoolErr ValidateAndCountDeltalist(const unsigned char* fread_end, uint32_t sample_ct, const unsigned char** fread_pp, uint32_t* __restrict deltalist, uint32_t* deltalist_len_ptr) {
+  // pass deltalist == nullptr when actual bit positions aren't needed
+  const unsigned char* group_info_iter;
+  if (unlikely(ValidateDifflistHeader(fread_end, sample_ct, fread_pp, nullptr, &group_info_iter, deltalist_len_ptr))) {
+    return 1;
+  }
+  const uint32_t deltalist_len = *deltalist_len_ptr;
+  if (!deltalist_len) {
+    return 0;
+  }
+  const uint32_t sample_id_byte_ct = BytesToRepresentNzU32(sample_ct);
+  const uint32_t group_idx_last = (deltalist_len - 1) / kPglDifflistGroupSize;
+  const unsigned char* group_byte_cts_iter = &(group_info_iter[DivUp(deltalist_len, kPglDifflistGroupSize) * sample_id_byte_ct]);
+  const unsigned char* prev_group_start = *fread_pp;
+  uint32_t* deltalist_iter = deltalist;
+  uint32_t group_len_m1 = kPglDifflistGroupSize - 1;
+  uintptr_t sample_idx = 0;
+  for (uint32_t group_idx = 0; ; ++group_idx) {
+    if (group_idx >= group_idx_last) {
+      if (group_idx > group_idx_last) {
+        return 0;
+      }
+      group_len_m1 &= deltalist_len - 1;
+    }
+    uintptr_t new_sample_idx = SubU32Load(group_info_iter, sample_id_byte_ct);
+    if (group_idx) {
+      if (unlikely(sample_idx >= new_sample_idx)) {
+        return 1;
+      }
+      const uint32_t group_byte_ct = S_CAST(uint32_t, *group_byte_cts_iter++) + 63;
+      if (unlikely(S_CAST(uintptr_t, (*fread_pp) - prev_group_start) != group_byte_ct)) {
+        return 1;
+      }
+      prev_group_start = *fread_pp;
+    }
+    sample_idx = new_sample_idx;
+    group_info_iter = &(group_info_iter[sample_id_byte_ct]);
+    for (uint32_t deltalist_idx_lowbits = 0; ; ++deltalist_idx_lowbits) {
+      if (unlikely(sample_idx >= sample_ct)) {
+        return 1;
+      }
+      if (deltalist_iter) {
+        *deltalist_iter++ = sample_idx;
+      }
+      if (deltalist_idx_lowbits == group_len_m1) {
+        break;
+      }
+      uint32_t sample_idx_incr;
+      if (unlikely(ValidateVint31(fread_end, fread_pp, &sample_idx_incr) || (!sample_idx_incr))) {
+        return 1;
+      }
+      sample_idx += sample_idx_incr;
+    }
+  }
+}
+
+BoolErr ValidateMultiallelicHc(const unsigned char* fread_end, const uintptr_t* __restrict raw_genovec, uint32_t vidx, uint32_t allele_ct, PgenReaderMain* pgrp, const unsigned char** fread_pp, uint32_t* __restrict het_ctp, char* __restrict errstr_buf) {
+  if (unlikely(allele_ct <= 2)) {
+    snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Multiallelic hardcall track present for (0-based) variant #%u, but it apparently has only %u allele%s.\n", vidx, allele_ct, (allele_ct == 1)? "" : "s");
+    return 1;
+  }
+  const uint32_t sample_ct = pgrp->fi.raw_sample_ct;
+  const uint32_t aux1_first_byte = **fread_pp;
+  *fread_pp += 1;
+  if (unlikely(aux1_first_byte &&
+               (aux1_first_byte != 1) &&
+               (aux1_first_byte != 15) &&
+               (aux1_first_byte != 16) &&
+               (aux1_first_byte != 17) &&
+               (aux1_first_byte != 31) &&
+               (aux1_first_byte != 240) &&
+               (aux1_first_byte != 241))) {
+    snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid multiallelic hardcall track mode byte (%u; must be in {0, 1, 15, 16, 17, 31, 240, 241}) in (0-based) variant #%u.\n", aux1_first_byte, vidx);
+    return 1;
+  }
+  const uint32_t aux1a_mode = aux1_first_byte & 15;
+  const uint32_t aux1b_mode = aux1_first_byte >> 4;
+  uint32_t raw_01_ct;
+  uint32_t raw_10_ct;
+  GenovecCount12Unsafe(raw_genovec, sample_ct, &raw_01_ct, &raw_10_ct);
+  uint32_t* deltalist_workspace = pgrp->workspace_difflist_sample_ids;
+  if (aux1a_mode != 15) {
+    if (unlikely(!raw_01_ct)) {
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Multiallelic het-ref hardcall track present for (0-based) variant #%u, but no het-ref calls exist.\n", vidx);
+      return 1;
+    }
+    uint32_t rare01_ct;
+    if (!aux1a_mode) {
+      const uint32_t subset_byte_ct = DivUp(raw_01_ct, CHAR_BIT);
+      if (PtrCheck(fread_end, *fread_pp, subset_byte_ct)) {
+        snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid multiallelic het-ref hardcall bitarray-subset for (0-based) variant #%u.\n", vidx);
+        return 1;
+      }
+      rare01_ct = PopcountBytes(*fread_pp, subset_byte_ct);
+      if (unlikely(!rare01_ct)) {
+        snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Empty multiallelic het-ref hardcall bitarray-subset for (0-based) variant #%u.\n", vidx);
+        return 1;
+      }
+      *fread_pp += subset_byte_ct;
+      const uint32_t raw_01_ct_mod8 = raw_01_ct % 8;
+      if (raw_01_ct_mod8) {
+        if (unlikely((*fread_pp)[-1] >> raw_01_ct_mod8)) {
+          snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Multiallelic het-ref hardcall bitarray-subset for (0-based) variant #%u has nonzero trailing bits.\n", vidx);
+          return 1;
+        }
+      }
+    } else {
+      if (unlikely(ValidateAndCountDeltalist(fread_end, sample_ct, fread_pp, deltalist_workspace, &rare01_ct) || (!rare01_ct))) {
+        snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid multiallelic het-ref hardcall deltalist-subset for (0-based) variant #%u.\n", vidx);
+        return 1;
+      }
+      for (uint32_t uii = 0; uii != rare01_ct; ++uii) {
+        if (unlikely(GetNyparrEntry(raw_genovec, deltalist_workspace[uii]) != 1)) {
+          snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid multiallelic het-ref hardcall deltalist-subset for (0-based) variant #%u (an index doesn't correspond to a het-ref call).\n", vidx);
+          return 1;
+        }
+      }
+    }
+    if (allele_ct < 5) {
+      // Nothing to do for allele_ct == 3.
+      if (allele_ct == 4) {
+        // 1-bit entries.  Contents must be in range, so just validate trailing
+        // bits.
+        const uint32_t fvals_byte_ct = DivUp(rare01_ct, 8);
+        if (PtrAddCk(fread_end, fvals_byte_ct, fread_pp)) {
+          snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid multiallelic het-ref hardcall track for (0-based) variant #%u (shorter than expected).\n", vidx);
+          return 1;
+        }
+        const uint32_t rare01_ct_mod8 = rare01_ct % 8;
+        if (rare01_ct_mod8) {
+          if (unlikely((*fread_pp)[-1] >> rare01_ct_mod8)) {
+            snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid multiallelic het-ref hardcall track for (0-based) variant #%u (nonzero trailing bits).\n", vidx);
+            return 1;
+          }
+        }
+      }
+    } else {
+      const unsigned char* fvals = *fread_pp;
+      if (allele_ct < 19) {
+        if (allele_ct < 7) {
+          // 2-bit entries.
+          const uint32_t fvals_byte_ct = DivUp(rare01_ct, 4);
+          if (PtrAddCk(fread_end, fvals_byte_ct, fread_pp)) {
+            snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid multiallelic het-ref hardcall track for (0-based) variant #%u (shorter than expected).\n", vidx);
+            return 1;
+          }
+          if (allele_ct == 5) {
+            // Contents may be out-of-range.
+            const uint32_t fullword_ct = fvals_byte_ct / kBytesPerWord;
+            uint32_t widx = 0;
+            if (fullword_ct) {
+              for (; widx != fullword_ct; ++widx) {
+                uintptr_t cur_word;
+                CopyFromUnalignedOffsetW(&cur_word, fvals, widx);
+                if (unlikely(cur_word & (cur_word >> 1) & kMask5555)) {
+                  snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid multiallelic het-ref hardcall track for (0-based) variant #%u (out-of-range allele code).\n", vidx);
+                  return 1;
+                }
+              }
+            }
+            for (uint32_t uii = widx * kBytesPerWord; uii != fvals_byte_ct; ++uii) {
+              const uint32_t cur_byte = fvals[uii];
+              if (unlikely(cur_byte & (cur_byte >> 1) & 0x55)) {
+                snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid multiallelic het-ref hardcall track for (0-based) variant #%u (out-of-range allele code).\n", vidx);
+                return 1;
+              }
+            }
+          }
+          // Validate trailing bits.
+          const uint32_t rare01_ct_mod4 = rare01_ct % 4;
+          if (rare01_ct_mod4) {
+            if (unlikely((*fread_pp)[-1] >> (2 * rare01_ct_mod4))) {
+              snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid multiallelic het-ref hardcall track for (0-based) variant #%u (nonzero trailing bits).\n", vidx);
+              return 1;
+            }
+          }
+        } else {
+          // 4-bit entries.
+          const uint32_t fvals_byte_ct = DivUp(rare01_ct, 2);
+          if (PtrAddCk(fread_end, fvals_byte_ct, fread_pp)) {
+            snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid multiallelic het-ref hardcall track for (0-based) variant #%u (shorter than expected).\n", vidx);
+            return 1;
+          }
+          if (allele_ct != 18) {
+            // Contents may be out-of-range.
+            // (Can optimize this loop later.)
+            const uint32_t max_code = allele_ct - 3;
+            for (uint32_t uii = 0; uii != fvals_byte_ct; ++uii) {
+              const uint32_t cur_byte = fvals[uii];
+              if (unlikely(((cur_byte & 15) > max_code) || ((cur_byte >> 4) > max_code))) {
+                snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid multiallelic het-ref hardcall track for (0-based) variant #%u (out-of-range allele code).\n", vidx);
+                return 1;
+              }
+            }
+          }
+          // Validate trailing bits.
+          const uint32_t rare01_ct_mod2 = rare01_ct % 2;
+          if (rare01_ct_mod2) {
+            if (unlikely((*fread_pp)[-1] >> 4)) {
+              snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid multiallelic het-ref hardcall track for (0-based) variant #%u (nonzero trailing bits).\n", vidx);
+              return 1;
+            }
+          }
+        }
+      } else {
+        // 8-bit entries.
+        if (PtrAddCk(fread_end, rare01_ct, fread_pp)) {
+          snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid multiallelic het-ref hardcall track for (0-based) variant #%u (shorter than expected).\n", vidx);
+          return 1;
+        }
+        // Can optimize this loop later.
+        const uint32_t max_code = allele_ct - 3;
+        for (uint32_t uii = 0; uii != rare01_ct; ++uii) {
+          const uint32_t cur_byte = fvals[uii];
+          if (unlikely(cur_byte > max_code)) {
+            snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid multiallelic het-ref hardcall track for (0-based) variant #%u (out-of-range allele code).\n", vidx);
+            return 1;
+          }
+        }
+      }
+    }
+  }
+  if (aux1b_mode != 15) {
+    if (unlikely(!raw_10_ct)) {
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Multiallelic altxy hardcall track present for (0-based) variant #%u, but no altxy calls exist.\n", vidx);
+      return 1;
+    }
+    uint32_t rare10_ct;
+    if (!aux1b_mode) {
+      const uint32_t subset_byte_ct = DivUp(raw_10_ct, CHAR_BIT);
+      if (PtrCheck(fread_end, *fread_pp, subset_byte_ct)) {
+        snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid multiallelic altxy hardcall bitarray-subset for (0-based) variant #%u.\n", vidx);
+        return 1;
+      }
+      rare10_ct = PopcountBytes(*fread_pp, subset_byte_ct);
+      if (unlikely(!rare10_ct)) {
+        snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Empty multiallelic altxy hardcall bitarray-subset for (0-based) variant #%u.\n", vidx);
+        return 1;
+      }
+      *fread_pp += subset_byte_ct;
+      const uint32_t raw_10_ct_mod8 = raw_10_ct % 8;
+      if (raw_10_ct_mod8) {
+        if (unlikely((*fread_pp)[-1] >> raw_10_ct_mod8)) {
+          snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Multiallelic altxy hardcall bitarray-subset for (0-based) variant #%u has nonzero trailing bits.\n", vidx);
+          return 1;
+        }
+      }
+    } else {
+      if (unlikely(ValidateAndCountDeltalist(fread_end, sample_ct, fread_pp, deltalist_workspace, &rare10_ct) || (!rare10_ct))) {
+        snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid multiallelic altxy hardcall deltalist-subset for (0-based) variant #%u.\n", vidx);
+        return 1;
+      }
+      for (uint32_t uii = 0; uii != rare10_ct; ++uii) {
+        if (unlikely(GetNyparrEntry(raw_genovec, deltalist_workspace[uii]) != 2)) {
+          snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid multiallelic altxy hardcall deltalist-subset for (0-based) variant #%u (an index doesn't correspond to an altxy call).\n", vidx);
+          return 1;
+        }
+      }
+    }
+    const unsigned char* fvals = *fread_pp;
+    uint32_t het_incr;
+    if (allele_ct < 6) {
+      if (allele_ct == 3) {
+        // 1-bit entries.
+        const uint32_t fvals_byte_ct = DivUp(rare10_ct, 8);
+        if (PtrAddCk(fread_end, fvals_byte_ct, fread_pp)) {
+          snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid multiallelic altxy hardcall track for (0-based) variant #%u (shorter than expected).\n", vidx);
+          return 1;
+        }
+        const uint32_t rare10_ct_mod8 = rare10_ct % 8;
+        if (rare10_ct_mod8) {
+          if (unlikely((*fread_pp)[-1] >> rare10_ct_mod8)) {
+            snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid multiallelic altxy hardcall track for (0-based) variant #%u (nonzero trailing bits).\n", vidx);
+            return 1;
+          }
+        }
+        het_incr = rare10_ct - PopcountBytes(fvals, fvals_byte_ct);
+      } else {
+        // 2+2 bit entries.
+        const uint32_t fvals_byte_ct = DivUp(rare10_ct, 2);
+        if (PtrAddCk(fread_end, fvals_byte_ct, fread_pp)) {
+          snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid multiallelic altxy hardcall track for (0-based) variant #%u (shorter than expected).\n", vidx);
+          return 1;
+        }
+        // Can optimize this later.
+        uint64_t nybble_cts[16];
+        ZeroU64Arr(16, nybble_cts);
+        CountAllNybbles64(fvals, rare10_ct, nybble_cts);
+        // 1/1 is invalid here
+        if (nybble_cts[0]) {
+          snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid multiallelic altxy hardcall track for (0-based) variant #%u (out-of-range allele code pair).\n", vidx);
+          return 1;
+        }
+        const uint32_t max_code = allele_ct - 2;
+        for (uint32_t hi_code = 0; hi_code != 4; ++hi_code) {
+          uint32_t lo_code = hi_code + 1;
+          if (hi_code > max_code) {
+            lo_code = 0;
+          }
+          const uint64_t* nybble_cts_offset = &(nybble_cts[hi_code * 4]);
+          for (; lo_code != 4; ++lo_code) {
+            if (nybble_cts_offset[lo_code]) {
+              snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid multiallelic altxy hardcall track for (0-based) variant #%u (out-of-range allele code pair).\n", vidx);
+              return 1;
+            }
+          }
+        }
+        const uintptr_t rarehom_ct = nybble_cts[5] + nybble_cts[10] + nybble_cts[15];
+        het_incr = rare10_ct - rarehom_ct;
+        const uint32_t rare10_ct_mod2 = rare10_ct % 2;
+        if (rare10_ct_mod2) {
+          if (unlikely((*fread_pp)[-1] >> 4)) {
+            snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid multiallelic altxy hardcall track for (0-based) variant #%u (nonzero trailing bits).\n", vidx);
+            return 1;
+          }
+        }
+      }
+    } else {
+      if (allele_ct < 18) {
+        // 4+4 bit entries.
+        if (PtrAddCk(fread_end, rare10_ct, fread_pp)) {
+          snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid multiallelic altxy hardcall track for (0-based) variant #%u (shorter than expected).\n", vidx);
+          return 1;
+        }
+        const uint32_t max_code = allele_ct - 2;
+        het_incr = 0;
+        for (uint32_t uii = 0; uii != rare10_ct; ++uii) {
+          const uint32_t cur_byte = fvals[uii];
+          const uint32_t lo_code = cur_byte & 15;
+          const uint32_t hi_code = cur_byte >> 4;
+          if (unlikely((!hi_code) || (hi_code > max_code) || (lo_code > hi_code))) {
+            snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid multiallelic altxy hardcall track for (0-based) variant #%u (out-of-range or misordered allele code pair).\n", vidx);
+            return 1;
+          }
+          het_incr += (lo_code != hi_code);
+        }
+      } else {
+        // 8+8 bit entries
+        if (PtrAddCk(fread_end, 2 * rare10_ct, fread_pp)) {
+          snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid multiallelic altxy hardcall track for (0-based) variant #%u (shorter than expected).\n", vidx);
+          return 1;
+        }
+        const uint32_t max_code = allele_ct - 2;
+        het_incr = 0;
+        for (uint32_t uii = 0; uii != rare10_ct; ++uii) {
+          const AlleleCode lo_code = fvals[2 * uii];
+          const AlleleCode hi_code = fvals[2 * uii + 1];
+          if (unlikely((!hi_code) || (hi_code > max_code) || (lo_code > hi_code))) {
+            snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid multiallelic altxy hardcall track for (0-based) variant #%u (out-of-range or misordered allele code pair).\n", vidx);
+            return 1;
+          }
+          het_incr += (lo_code != hi_code);
+        }
+      }
+    }
+    *het_ctp += het_incr;
+  }
+  return 0;
+}
+
+BoolErr ValidateHphase(const unsigned char* fread_end, uint32_t vidx, uint32_t het_ct, const unsigned char** fread_pp, char* errstr_buf) {
+  if (unlikely(!het_ct)) {
+    snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Hardcall phase track present for (0-based) variant #%u, but there were no heterozygous calls.\n", vidx);
+    return 1;
+  }
+  const uint32_t aux2_first_part_byte_ct = 1 + (het_ct / CHAR_BIT);
+  const unsigned char* aux2_first_part = *fread_pp;
+  if (PtrAddCk(fread_end, aux2_first_part_byte_ct, fread_pp)) {
+    snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid hardcall phase track present for (0-based) variant #%u.\n", vidx);
+    return 1;
+  }
+  const uint32_t het_ct_p1_mod8 = (het_ct + 1) % CHAR_BIT;
+  if (het_ct_p1_mod8) {
+    // verify trailing bits are zero
+    if (unlikely((*fread_pp)[-1] >> het_ct_p1_mod8)) {
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Hardcall phase track for (0-based) variant #%u has nonzero trailing bits.\n", vidx);
+      return 1;
+    }
+  }
+  if (!((*aux2_first_part) & 1)) {
+    // phase always present, "first part" is only part
+    return 0;
+  }
+  const uint32_t phasepresent_ct = PopcountBytes(aux2_first_part, aux2_first_part_byte_ct) - 1;
+  if (unlikely(!phasepresent_ct)) {
+    snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Hardcall phase track for (0-based) variant #%u does not have any actual phase information.\n", vidx);
+    return 1;
+  }
+  const uint32_t phaseinfo_byte_ct = DivUp(phasepresent_ct, CHAR_BIT);
+  if (PtrAddCk(fread_end, phaseinfo_byte_ct, fread_pp)) {
+    snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid hardcall phase track present for (0-based) variant #%u.\n", vidx);
+    return 1;
+  }
+  const uint32_t phasepresent_ct_mod8 = phasepresent_ct % 8;
+  if (phasepresent_ct_mod8) {
+    if (unlikely((*fread_pp)[-1] >> phasepresent_ct_mod8)) {
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Hardcall phase track for (0-based) variant #%u has nonzero trailing bits.\n", vidx);
+      return 1;
+    }
+  }
+  return 0;
+}
+
+PglErr ValidateDosage16(const unsigned char* fread_end, uint32_t vidx, PgenReaderMain* pgrp, const unsigned char** fread_pp, char* errstr_buf) {
+  // similar to ParseDosage16().  doesn't support multiallelic data yet.
+  const uint32_t vrtype = pgrp->fi.vrtypes[vidx];
+  const uint32_t sample_ct = pgrp->fi.raw_sample_ct;
+  if ((vrtype & 0x60) == 0x40) {
+    // unconditional dosage.  handle separately from other two cases since
+    // 65535 is valid.
+    const unsigned char* dosage_main_read = *fread_pp;
+    if (PtrAddCk(fread_end, sample_ct * sizeof(int16_t), fread_pp)) {
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid unconditional dosage track for (0-based) variant #%u.\n", vidx);
+      return kPglRetMalformedInput;
+    }
+    // todo: verify genotype and dosage are consistent
+    for (uint32_t sample_idx = 0; sample_idx != sample_ct; ++sample_idx) {
+      uint16_t cur_dosage_val_p1;
+      CopyFromUnalignedOffsetU16(&cur_dosage_val_p1, dosage_main_read, sample_idx);
+      cur_dosage_val_p1 += 1;  // intentional overflow on 65535
+      if (unlikely(cur_dosage_val_p1 > 32769)) {
+        snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid unconditional dosage track for (0-based) variant #%u (dosage is greater than 2).\n", vidx);
+        return kPglRetMalformedInput;
+      }
+    }
+    if (vrtype & 0x80) {
+      const unsigned char* dphase_delta_read = *fread_pp;
+      if (PtrAddCk(fread_end, sample_ct * sizeof(int16_t), fread_pp)) {
+        snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid unconditional phased-dosages for (0-based) variant #%u.\n", vidx);
+        return kPglRetMalformedInput;
+      }
+      for (uint32_t sample_idx = 0; sample_idx != sample_ct; ++sample_idx) {
+        uint16_t dosage_val;
+        CopyFromUnalignedOffsetU16(&dosage_val, dosage_main_read, sample_idx);
+        int16_t dphase_delta_val;
+        CopyFromUnalignedOffsetI16(&dphase_delta_val, dphase_delta_read, sample_idx);
+        const uint16_t dpiece0_x2 = dosage_val + dphase_delta_val;
+        const uint16_t dpiece1_x2 = dosage_val - dphase_delta_val;
+        // Update (11 May 2018): parity condition removed.
+        if ((dpiece0_x2 > 32768) || (dpiece1_x2 > 32768)) {
+          if (unlikely((dphase_delta_val != -32768) || (dosage_val != 65535))) {
+            snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid unconditional phased-dosages for (0-based) variant #%u.\n", vidx);
+            return kPglRetMalformedInput;
+          }
+        }
+      }
+    }
+    return kPglRetSuccess;
+  }
+  uint32_t dosage_ct;
+  if ((vrtype & 0x60) == 0x20) {
+    // dosage list
+    if (unlikely(ValidateAndCountDeltalist(fread_end, sample_ct, fread_pp, nullptr, &dosage_ct))) {
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid dosage list for (0-based) variant #%u.\n", vidx);
+      return kPglRetMalformedInput;
+    }
+  } else {
+    const uint32_t sample_ctb = DivUp(sample_ct, CHAR_BIT);
+    if (PtrCheck(fread_end, *fread_pp, sample_ctb)) {
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid dosage subset for (0-based) variant #%u.\n", vidx);
+      return kPglRetMalformedInput;
+    }
+    dosage_ct = PopcountBytes(*fread_pp, sample_ctb);
+    *fread_pp += sample_ctb;
+    const uint32_t sample_ct_mod8 = sample_ct % 8;
+    if (sample_ct_mod8) {
+      if (unlikely((*fread_pp)[-1] >> sample_ct_mod8)) {
+        snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Dosage subset bitarray for (0-based) variant #%u has nonzero trailing bits.\n", vidx);
+        return kPglRetMalformedInput;
+      }
+    }
+  }
+  const unsigned char* dosage_main_read = *fread_pp;
+  if (PtrAddCk(fread_end, dosage_ct * sizeof(int16_t), fread_pp)) {
+    snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid dosage track for (0-based) variant #%u.\n", vidx);
+    return kPglRetMalformedInput;
+  }
+  for (uint32_t dosage_idx = 0; dosage_idx != dosage_ct; ++dosage_idx) {
+    uint16_t cur_dosage_u16;
+    CopyFromUnalignedOffsetU16(&cur_dosage_u16, dosage_main_read, dosage_idx);
+    if (unlikely(cur_dosage_u16 > 32768)) {
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid dosage track for (0-based) variant #%u (dosage is greater than 2).\n", vidx);
+      return kPglRetMalformedInput;
+    }
+  }
+  if (vrtype & 0x80) {
+    const unsigned char* file_dphase_present = *fread_pp;
+    const uint32_t dphase_present_byte_ct = DivUp(dosage_ct, CHAR_BIT);
+    if (PtrAddCk(fread_end, dphase_present_byte_ct, fread_pp)) {
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid phased-dosage track for (0-based) variant #%u.\n", vidx);
+      return kPglRetMalformedInput;
+    }
+    const uint32_t trailing_bit_ct = dosage_ct % CHAR_BIT;
+    if (unlikely(trailing_bit_ct && ((*fread_pp)[-1] & (255 << trailing_bit_ct)))) {
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid phased-dosage track for (0-based) variant #%u.\n", vidx);
+      return kPglRetMalformedInput;
+    }
+    const unsigned char* dosage_main_read_biter = dosage_main_read;
+    const unsigned char* dphase_delta_read_biter = *fread_pp;
+    const uint32_t dphase_widx_last = (dphase_present_byte_ct - 1) / kBytesPerWord;
+    uint32_t loop_end = kBitsPerWord;
+    for (uint32_t dphase_widx = 0; ; ++dphase_widx) {
+      uintptr_t ww;
+      if (dphase_widx >= dphase_widx_last) {
+        if (dphase_widx > dphase_widx_last) {
+          break;
+        }
+        loop_end = 1 + ((dosage_ct - 1) % kBitsPerWord);
+        const uint32_t final_byte_ct = DivUp(loop_end, CHAR_BIT);
+        ww = SubwordLoad(&(file_dphase_present[dphase_widx * kBytesPerWord]), final_byte_ct);
+      } else {
+        CopyFromUnalignedOffsetW(&ww, file_dphase_present, dphase_widx);
+      }
+      for (uint32_t dphase_lowbits = 0; dphase_lowbits != loop_end; ++dphase_lowbits, dosage_main_read_biter += sizeof(int16_t)) {
+        if (!((ww >> dphase_lowbits) & 1)) {
+          continue;
+        }
+        uint16_t dosage_val;
+        CopyFromUnalignedU16(&dosage_val, dosage_main_read_biter);
+        int16_t dphase_delta_val;
+        CopyFromUnalignedIncrI16(&dphase_delta_val, &dphase_delta_read_biter);
+        const uint16_t dpiece0_x2 = dosage_val + dphase_delta_val;
+        const uint16_t dpiece1_x2 = dosage_val - dphase_delta_val;
+        if (unlikely((dpiece0_x2 > 32768) || (dpiece1_x2 > 32768))) {
+          snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid phased-dosage track for (0-based) variant #%u.\n", vidx);
+          return kPglRetMalformedInput;
+        }
+      }
+    }
+    if (unlikely(dphase_delta_read_biter == *fread_pp)) {
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid phased-dosage track for (0-based) variant #%u.\n", vidx);
+      return kPglRetMalformedInput;
+    }
+    *fread_pp = dphase_delta_read_biter;
+    if (PtrCheck(fread_end, *fread_pp, 0)) {
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid phased-dosage track for (0-based) variant #%u.\n", vidx);
+      return kPglRetMalformedInput;
+    }
+  }
+  return kPglRetSuccess;
+}
+
+static_assert(kPglVblockSize == 65536, "PgrValidate() needs to have an error message updated.");
+PglErr PgrValidate(PgenReader* pgr_ptr, uintptr_t* genovec_buf, char* errstr_buf) {
+  PgenReaderMain* pgrp = GetPgrp(pgr_ptr);
+  // Performs all validation which isn't done by pgfi_init_phase{1,2}() and
+  // PgrInit().
+  const uintptr_t* allele_idx_offsets = pgrp->fi.allele_idx_offsets;
+  const uint32_t variant_ct = pgrp->fi.raw_variant_ct;
+  const uint32_t sample_ct = pgrp->fi.raw_sample_ct;
+  const uint32_t const_vrtype = pgrp->fi.const_vrtype;
+  if (const_vrtype != UINT32_MAX) {
+    if (unlikely(allele_idx_offsets && (allele_idx_offsets[variant_ct] != 2 * variant_ct))) {
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: .pvar file contains multiallelic variant(s), but .%s file does not.\n", (const_vrtype == kPglVrtypePlink1)? "bed" : "pgen");
+      return kPglRetInconsistentInput;
+    }
+    // const uintptr_t const_vrec_width = pgrp->fi.const_vrec_width;
+    if ((!const_vrtype) || (const_vrtype == kPglVrtypePlink1)) {
+      // only thing that can go wrong is nonzero trailing bits
+      const uint32_t dbl_sample_ct_mod4 = 2 * (sample_ct % 4);
+      if (!dbl_sample_ct_mod4) {
+        return kPglRetSuccess;
+      }
+      for (uint32_t vidx = 0; vidx != variant_ct; ++vidx) {
+        const unsigned char* fread_ptr;
+        const unsigned char* fread_end = nullptr;
+        if (unlikely(InitReadPtrs(vidx, pgrp, &fread_ptr, &fread_end))) {
+          FillPgenReadErrstrFromErrno(errstr_buf);
+          return kPglRetReadFail;
+        }
+        const uint32_t last_byte_in_record = fread_end[-1];
+        if (unlikely(last_byte_in_record >> dbl_sample_ct_mod4)) {
+          snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Last byte of (0-based) variant #%u has nonzero trailing bits.\n", vidx);
+          return kPglRetMalformedInput;
+        }
+      }
+      return kPglRetSuccess;
+    }
+    // todo: 16-bit dosage entries can't be in [32769,65534]
+    snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Validation of fixed-width dosage formats is not implemented yet.\n");
+    return kPglRetNotYetSupported;
+  }
+  const unsigned char* vrtypes = pgrp->fi.vrtypes;
+  for (uint32_t vidx = 0; vidx < variant_ct; vidx += kPglVblockSize) {
+    if (unlikely(VrtypeLdCompressed(vrtypes[vidx]))) {
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: (0-based) variant #%u is LD-compressed; this is prohibited when the variant index is a multiple of 65536.\n", vidx);
+      return kPglRetMalformedInput;
+    }
+  }
+  // file size may not be validated yet.
+  uint64_t fsize;
+  FILE* ff = pgrp->ff;
+  if (unlikely(fseeko(ff, 0, SEEK_END))) {
+    FillPgenReadErrstrFromNzErrno(errstr_buf);
+    return kPglRetReadFail;
+  }
+  fsize = ftello(ff);
+  pgrp->fp_vidx = 1;  // force fseek when loading first variant
+  // todo: verify equality if no mode-0x11 footer; and if there is a footer,
+  // validate it
+  const uint64_t expected_fsize_min = pgrp->fi.var_fpos[variant_ct];
+  if (unlikely(expected_fsize_min > fsize)) {
+    char* write_iter = strcpya_k(errstr_buf, "Error: .pgen header indicates that file size should be at least ");
+    write_iter = i64toa(expected_fsize_min, write_iter);
+    write_iter = strcpya_k(write_iter, " bytes, but actual file size is ");
+    write_iter = i64toa(fsize, write_iter);
+    strcpy_k(write_iter, " bytes.\n");
+    return kPglRetMalformedInput;
+  }
+  const uint32_t vblock_ct = DivUp(variant_ct, kPglVblockSize);
+  uint32_t header_ctrl = 0;
+  if (unlikely(fseeko(ff, 11, SEEK_SET))) {
+    FillPgenReadErrstrFromNzErrno(errstr_buf);
+    return kPglRetReadFail;
+  }
+  header_ctrl = getc_unlocked(ff);
+  if (unlikely(header_ctrl > 255)) {
+    FillPgenReadErrstr(ff, errstr_buf);
+    return kPglRetReadFail;
+  }
+  for (uint32_t vblock_idx = 0; vblock_idx != vblock_ct; ++vblock_idx) {
+    uint64_t vblock_start_fpos;
+    if (unlikely(!fread_unlocked(&vblock_start_fpos, sizeof(int64_t), 1, ff))) {
+      FillPgenReadErrstr(ff, errstr_buf);
+      return kPglRetReadFail;
+    }
+    if (unlikely(vblock_start_fpos != pgrp->fi.var_fpos[vblock_idx * kPglVblockSize])) {
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: .pgen header vblock-start index is inconsistent with variant record length index.\n");
+      return kPglRetMalformedInput;
+    }
+  }
+  const uint32_t vrtype_and_fpos_storage = header_ctrl & 15;
+  const uint32_t alt_allele_ct_byte_ct = (header_ctrl >> 4) & 3;
+  const uint32_t nonref_flags_stored = ((header_ctrl >> 6) == 3);
+
+  // does not include vrtypes yet
+  uint64_t vblock_index_byte_ct = kPglVblockSize * (1 + (vrtype_and_fpos_storage & 3) + alt_allele_ct_byte_ct);
+  if (nonref_flags_stored) {
+    vblock_index_byte_ct += kPglVblockSize / CHAR_BIT;
+  }
+  uint64_t last_vrtype_byte_offset = 0;
+  uint32_t trailing_shift = 4;
+  if (vrtype_and_fpos_storage & 8) {
+    vblock_index_byte_ct += kPglVblockSize >> (10 - vrtype_and_fpos_storage);
+    if (vrtype_and_fpos_storage == 8) {
+      const uint32_t variant_ct_mod4 = variant_ct % 4;
+      if (variant_ct_mod4) {
+        last_vrtype_byte_offset = 20 + (vblock_ct - 1) * (vblock_index_byte_ct + sizeof(int64_t)) + ((variant_ct % kPglVblockSize) / 4);
+        trailing_shift = variant_ct_mod4 * 2;
+      }
+    } else {
+      assert(vrtype_and_fpos_storage == 9);
+      if (variant_ct % 2) {
+        last_vrtype_byte_offset = 20 + (vblock_ct - 1) * (vblock_index_byte_ct + sizeof(int64_t)) + ((variant_ct % kPglVblockSize) / 2);
+      }
+    }
+  } else if (!(vrtype_and_fpos_storage & 4)) {
+    vblock_index_byte_ct += kPglVblockSize / 2;
+    if (variant_ct % 2) {
+      // bugfix (22 Nov 2017): forgot to add offset in last block
+      last_vrtype_byte_offset = 20 + (vblock_ct - 1) * (vblock_index_byte_ct + sizeof(int64_t)) + ((variant_ct % kPglVblockSize) / 2);
+    }
+    /*
+  } else {
+    vblock_index_byte_ct += kPglVblockSize;
+    */
+  }
+  if (last_vrtype_byte_offset) {
+    uint32_t last_vrtype_byte = 0;
+    if (unlikely(fseeko(ff, last_vrtype_byte_offset, SEEK_SET))) {
+      FillPgenReadErrstrFromNzErrno(errstr_buf);
+      return kPglRetReadFail;
+    }
+    last_vrtype_byte = getc_unlocked(ff);
+    if (unlikely(last_vrtype_byte > 255)) {
+      FillPgenReadErrstr(ff, errstr_buf);
+      return kPglRetReadFail;
+    }
+    if (unlikely(last_vrtype_byte >> trailing_shift)) {
+      snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Nonzero trailing bits in last vrtype index byte.\n");
+      return kPglRetMalformedInput;
+    }
+  }
+  const uintptr_t* nonref_flags = pgrp->fi.nonref_flags;
+  if (nonref_flags) {
+    const uint32_t variant_ct_modl = variant_ct % kBitsPerWord;
+    if (variant_ct % CHAR_BIT) {
+      if (unlikely(nonref_flags[variant_ct / kBitsPerWord] >> variant_ct_modl)) {
+        snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Nonzero trailing bits in last nonref_flags byte.\n");
+        return kPglRetMalformedInput;
+      }
+    }
+  }
+
+  // could move most of this into plink2_common and make it multithreaded, if
+  // speed is ever an issue.
+  uint32_t allele_ct = 2;
+  for (uint32_t vidx = 0; vidx != variant_ct; ++vidx) {
+    const unsigned char* fread_ptr;
+    const unsigned char* fread_end;
+    if (unlikely(InitReadPtrs(vidx, pgrp, &fread_ptr, &fread_end))) {
+      FillPgenReadErrstrFromErrno(errstr_buf);
+      return kPglRetReadFail;
+    }
+    const unsigned char* fread_ptr_start = fread_ptr;
+    if (unlikely(ValidateGeno(fread_end, vidx, pgrp, &fread_ptr, genovec_buf, errstr_buf))) {
+      return kPglRetMalformedInput;
+    }
+    ZeroTrailingNyps(sample_ct, genovec_buf);
+    const uint32_t vrtype = vrtypes[vidx];
+    uint32_t het_ct = CountNyp(genovec_buf, kMask5555, sample_ct);
+    if (allele_idx_offsets) {
+      allele_ct = allele_idx_offsets[vidx + 1] - allele_idx_offsets[vidx];
+    }
+    if (VrtypeMultiallelicHc(vrtype)) {
+      if (unlikely(ValidateMultiallelicHc(fread_end, genovec_buf, vidx, allele_ct, pgrp, &fread_ptr, &het_ct, errstr_buf))) {
+        return kPglRetMalformedInput;
+      }
+    }
+    // don't need genovec_buf to store main genotypes past this point.
+    if (VrtypeHphase(vrtype)) {
+      if (unlikely(ValidateHphase(fread_end, vidx, het_ct, &fread_ptr, errstr_buf))) {
+        return kPglRetMalformedInput;
+      }
+    }
+    if (vrtype & 0xe0) {
+      if (unlikely((vrtype & 0xe0) == 0x80)) {
+        snprintf(errstr_buf, kPglErrstrBufBlen, "Error: Invalid record type for (0-based) variant #%u (phased dosage bit set, but main dosage bits unset).\n", vidx);
+        return kPglRetMalformedInput;
+      }
+      PglErr reterr = ValidateDosage16(fread_end, vidx, pgrp, &fread_ptr, errstr_buf);
+      if (unlikely(reterr)) {
+        return reterr;
+      }
+    }
+    if (unlikely(fread_ptr != fread_end)) {
+      // possible todo: tolerate this at the end of a vblock.
+      char* write_iter = strcpya_k(errstr_buf, "Error: Extra byte(s) in (0-based) variant record #");
+      write_iter = u32toa(vidx, write_iter);
+      write_iter = strcpya_k(write_iter, ". (record type = ");
+      write_iter = u32toa(vrtype, write_iter);
+      write_iter = strcpya_k(write_iter, "; expected length = ");
+      write_iter = wtoa(S_CAST(uintptr_t, fread_ptr - fread_ptr_start), write_iter);
+      write_iter = strcpya_k(write_iter, ", actual = ");
+      write_iter = wtoa(S_CAST(uintptr_t, fread_end - fread_ptr_start), write_iter);
+      memcpy_k(write_iter, ")\n\0", 4);
+      return kPglRetMalformedInput;
+    }
+  }
+  return kPglRetSuccess;
+}
+
+
+BoolErr CleanupPgfi(PgenFileInfo* pgfip, PglErr* reterrp) {
+  // memory is the responsibility of the caller
+  if (pgfip->shared_ff) {
+    BoolErr pgi_fclose_err = 0;
+    if (pgfip->pgi_ff) {
+      pgi_fclose_err = fclose_null(&pgfip->pgi_ff);
+    }
+    if (unlikely(fclose_null(&pgfip->shared_ff) || pgi_fclose_err)) {
+      if (*reterrp == kPglRetSuccess) {
+        *reterrp = kPglRetReadFail;
+        return 1;
+      }
+    }
+  } else {
+    assert(!pgfip->pgi_ff);
+  }
+  return 0;
+}
+
+BoolErr CleanupPgr(PgenReader* pgr_ptr, PglErr* reterrp) {
+  PgenReaderMain* pgrp = GetPgrp(pgr_ptr);
+  // assume file is open if pgr.ff is not null
+  // memory is the responsibility of the caller for now
+  if (!pgrp->ff) {
+    return 0;
+  }
+  if (fclose_null(&(pgrp->ff))) {
+    if (*reterrp == kPglRetSuccess) {
+      *reterrp = kPglRetReadFail;
+      return 1;
+    }
+  }
+  return 0;
+}
+
+#ifdef __cplusplus
+}  // namespace plink2
+#endif
diff --git a/external_libs/pgenlib/include/pgenlib_read.h b/external_libs/pgenlib/include/pgenlib_read.h
new file mode 100644
index 0000000..734e81a
--- /dev/null
+++ b/external_libs/pgenlib/include/pgenlib_read.h
@@ -0,0 +1,727 @@
+#ifndef __PGENLIB_READ_H__
+#define __PGENLIB_READ_H__
+
+// This library is part of PLINK 2.0, copyright (C) 2005-2024 Shaun Purcell,
+// Christopher Chang.
+//
+// This library is free software: you can redistribute it and/or modify it
+// under the terms of the GNU Lesser General Public License as published by the
+// Free Software Foundation; either version 3 of the License, or (at your
+// option) any later version.
+//
+// This library is distributed in the hope that it will be useful, but WITHOUT
+// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public License
+// for more details.
+//
+// You should have received a copy of the GNU Lesser General Public License
+// along with this library.  If not, see <http://www.gnu.org/licenses/>.
+
+
+// pgenlib_read contains reader-specific code.
+
+#include "pgenlib_misc.h"
+
+#ifdef __cplusplus
+namespace plink2 {
+#endif
+
+FLAGSET_DEF_START()
+  kfPgrLdcache0,
+  kfPgrLdcacheNyp = (1 << 0),
+  kfPgrLdcacheDifflist = (1 << 1),
+  kfPgrLdcacheRawNyp = (1 << 2),
+  // may also want RawDifflist
+  kfPgrLdcacheBasicGenocounts = (1 << 3)
+FLAGSET_DEF_END(PgrLdcacheFlags);
+
+// PgenFileInfo and PgenReader are the main exported "classes".
+// Exported functions involving these data structure should all have
+// "pgfi"/"pgr" in their names.
+
+// Note that this can be default-copied.
+typedef struct PgenFileInfoStruct {
+  // ----- Header information, constant after initialization -----
+  uint32_t raw_variant_ct;
+  uint32_t raw_sample_ct;
+
+  // 0 if variant records aren't all the same length.
+  // If they are (e.g. PLINK 1 encoding; or vrtype bits 0-5 unset), we just
+  // fseek to
+  //   const_fpos_offset + const_vrec_width * ((uint64_t)variant_idx).
+  uint64_t const_fpos_offset;
+
+  uint32_t const_vrec_width;
+
+  // see below.  positioned here instead of slightly later due to struct
+  // packing behavior.
+  uint32_t const_vrtype;  // 256 for plink 1 encoding, UINT32_MAX for nonconst
+
+  // size (raw_variant_ct + 1), so that the number of bytes of (zero-based)
+  // variant n is var_fpos[n+1] - var_fpos[n].  nullptr if
+  // const_vrec_width is nonzero.
+  // It's not difficult to save some memory here (e.g. unless we're dealing
+  // with >256 TB files, it's trivial to go from 8 bytes down to 6 bytes per
+  // entry), but I doubt that's worth the trouble; let's worry about
+  // O(mn)-or-worse stuff, and on-disk stuff, first.
+  uint64_t* var_fpos;
+
+  // Variant record type codes.
+  // base pointer is null if mode is 0x01-0x04 (const_vrtype != UINT32_MAX).
+  // if not nullptr, required to be length >=
+  //   max(raw_variant_ct + 1, RoundUpPow2(raw_variant_ct, kBytesPerWord))
+  unsigned char* vrtypes;
+
+  // alt allele counts.
+
+  // This can be nullptr if all alt allele counts are 1.
+  // (actually, we store the allele index offsets, so
+  // (allele_idx_offsets[n+1] - allele_idx_offsets[n]) is the number of alleles
+  // for variant n.  Otherwise, we'd need another data structure to support
+  // fast allele name lookup.)
+  uintptr_t* allele_idx_offsets;
+
+  uintptr_t* nonref_flags;
+
+  // If pgr.nonref_flags is nullptr and kfPgenGlobalAllNonref is unset, all
+  // reference alleles are assumed to be correct.
+  PgenGlobalFlags gflags;
+
+  uint32_t max_allele_ct;
+  // uint32_t max_dosage_allele_ct;  // might need this later
+
+  uint32_t extensions_present;
+
+  // if using per-variant fread(), this is non-null during PgenFileInfo
+  // initialization, but it's then "moved" to the first Pgen_reader and set to
+  // nullptr.
+  FILE* shared_ff;
+
+  // can only be non-null after PgfiInitPhase1 and before PgfiInitPhase2 /
+  // PgfiInitLoadExts, and only if the external-index-file representation is
+  // used.
+  FILE* pgi_ff;
+
+  const unsigned char* block_base;  // nullptr if using per-variant fread()
+  uint64_t block_offset;
+} PgenFileInfo;
+
+typedef struct PgenReaderMainStruct {
+  MOVABLE_BUT_NONCOPYABLE(PgenReaderMainStruct);
+  // would like to make this const, but that makes initialization really
+  // annoying in C99
+  struct PgenFileInfoStruct fi;
+
+  // ----- Mutable state -----
+  // If we don't fseek, what's the next variant we'd read?
+  uint32_t fp_vidx;
+
+  // ** per-variant fread()-only **
+  FILE* ff;
+  unsigned char* fread_buf;
+  // ** end per-variant fread()-only **
+
+  // if LD compression is present, cache the last non-LD-compressed variant
+  uint32_t ldbase_vidx;
+
+  // flags indicating which base_variant buffers are populated
+  PgrLdcacheFlags ldbase_stypes;
+
+  uint32_t ldbase_difflist_len;
+
+  // these should be treated as private after initial allocation.
+  // not currently guaranteed to have trailing zeroes.
+  uintptr_t* ldbase_raw_genovec;  // now allocated even with no LD compression
+  uintptr_t* ldbase_genovec;
+  uintptr_t* ldbase_raregeno;
+
+  // when ldbase_difflist_sample_ids[] is initialized, element
+  // [ldbase_difflist_len] must be set to sample_ct.
+  uint32_t* ldbase_difflist_sample_ids;
+
+  // common genotype can be looked up from vrtypes[]
+
+  STD_ARRAY_DECL(uint32_t, 4, ldbase_basic_genocounts);
+
+  // now only allocated if multiallelic variants, phase, and/or dosage present
+  // most commonly used for unsubsetted genovec; all_hets can be computed from
+  // this and patch_10_{set,vals}, and then aux2 can be interpreted.
+  // can also be used for other purposes after we're done processing aux2.
+  uintptr_t* workspace_vec;
+
+  // currently must hold (raw_sample_ct / kPglMaxDifflistLenDivisor)
+  // entries; may need to double the sizes later
+  // some top-level interface functions use these, so several lower-level
+  // functions cannot
+  uintptr_t* workspace_raregeno_vec;
+  uint32_t* workspace_difflist_sample_ids;
+
+  // must hold (raw_sample_ct / kPglMaxDifflistLenDivisor) entries
+  uintptr_t* workspace_raregeno_tmp_loadbuf;
+
+  uintptr_t* workspace_aux1x_present;
+  uint64_t* workspace_imp_r2;  // needed in multiallelic case
+
+  uintptr_t* workspace_all_hets;
+  uintptr_t* workspace_subset;  // currently used for hphase decoding
+
+  uintptr_t* workspace_dosage_present;
+  uintptr_t* workspace_dphase_present;
+
+  // phase set loading (footer track in mode 0x11) unimplemented for now;
+  // should be a sequence of (sample ID, [uint32_t phase set begin, set end),
+  // [set begin, set end), ...).
+} PgenReaderMain;
+
+typedef struct PgenReaderStruct {
+#ifdef __cplusplus
+  PgenReaderMain& GET_PRIVATE_m() { return m; }
+  PgenReaderMain const& GET_PRIVATE_m() const { return m; }
+ private:
+#endif
+  PgenReaderMain m;
+} PgenReader;
+
+CONSTI32(kPglVrtypePlink1, 256);
+
+HEADER_INLINE uint32_t GetPgfiVrtype(const PgenFileInfo* pgfip, uint32_t vidx) {
+  if (pgfip->vrtypes) {
+    return pgfip->vrtypes[vidx];
+  }
+  return pgfip->const_vrtype;
+}
+
+HEADER_INLINE uint64_t GetPgfiFpos(const PgenFileInfo* pgfip, uintptr_t vidx) {
+  if (pgfip->var_fpos) {
+    return pgfip->var_fpos[vidx];
+  }
+  return pgfip->const_fpos_offset + pgfip->const_vrec_width * S_CAST(uint64_t, vidx);
+}
+
+HEADER_INLINE uint32_t GetPgfiVrecWidth(const PgenFileInfo* pgfip, uint32_t vidx) {
+  if (pgfip->var_fpos) {
+    return pgfip->var_fpos[vidx + 1] - pgfip->var_fpos[vidx];
+  }
+  return pgfip->const_vrec_width;
+}
+
+HEADER_INLINE uint32_t PgfiIsSimpleFormat(const PgenFileInfo* pgfip) {
+  return (pgfip->const_vrtype != UINT32_MAX);
+}
+
+HEADER_INLINE uint32_t VrtypeDifflist(uint32_t vrtype) {
+  return (vrtype & 4) && ((vrtype & 3) != 1);
+}
+
+HEADER_INLINE uint32_t VrtypeLdCompressed(uint32_t vrtype) {
+  return (vrtype & 6) == 2;
+}
+
+// Only checks for rarealt-containing hardcall.  Multiallelic dosage may still
+// be present when this returns zero.
+HEADER_INLINE uint32_t VrtypeMultiallelicHc(uint32_t vrtype) {
+  return (vrtype & 8);
+}
+
+HEADER_INLINE uint32_t VrtypeHphase(uint32_t vrtype) {
+  return (vrtype & 0x10);
+}
+
+HEADER_INLINE uint32_t VrtypeAuxTracksPresent(uint32_t vrtype) {
+  return (vrtype & 0x78);
+}
+
+HEADER_INLINE uint32_t VrtypeVariableWidth(uint32_t vrtype) {
+  return (vrtype & 0x3e);
+}
+
+HEADER_INLINE uint32_t VrtypeDosage(uint32_t vrtype) {
+  return (vrtype & 0x60);
+}
+
+static_assert(kPglMaxAltAlleleCt <= 254, "GetAux1xAlleleEntryByteCt() needs to be updated.");
+HEADER_INLINE uintptr_t GetAux1aAlleleEntryByteCt(uint32_t allele_ct, uint32_t rare01_ct) {
+  assert(allele_ct >= 3);
+  if (allele_ct == 3) {
+    return 0;
+  }
+  if (allele_ct == 4) {
+    return DivUp(rare01_ct, 8);
+  }
+  if (allele_ct <= 6) {
+    return DivUp(rare01_ct, 4);
+  }
+  if (allele_ct <= 18) {
+    return DivUp(rare01_ct, 2);
+  }
+  return rare01_ct;
+}
+
+HEADER_INLINE unsigned char* PgrGetFreadBuf(PgenReader* pgr_ptr) {
+  PgenReaderMain* pgrp = &GET_PRIVATE(*pgr_ptr, m);
+  return pgrp->fread_buf;
+}
+
+HEADER_INLINE unsigned char* PgrGetVrtypes(PgenReader* pgr_ptr) {
+  PgenReaderMain* pgrp = &GET_PRIVATE(*pgr_ptr, m);
+  return pgrp->fi.vrtypes;
+}
+
+HEADER_INLINE uint32_t PgrGetVrtype(const PgenReader* pgr_ptr, uint32_t vidx) {
+  const PgenReaderMain* pgrp = &GET_PRIVATE(*pgr_ptr, m);
+  if (pgrp->fi.vrtypes) {
+    return pgrp->fi.vrtypes[vidx];
+  }
+  return pgrp->fi.const_vrtype;
+}
+
+HEADER_INLINE uintptr_t* PgrGetNonrefFlags(PgenReader* pgr_ptr) {
+  PgenReaderMain* pgrp = &GET_PRIVATE(*pgr_ptr, m);
+  return pgrp->fi.nonref_flags;
+}
+
+HEADER_INLINE PgenGlobalFlags PgrGetGflags(const PgenReader* pgr_ptr) {
+  const PgenReaderMain* pgrp = &GET_PRIVATE(*pgr_ptr, m);
+  return pgrp->fi.gflags;
+}
+
+HEADER_INLINE uint32_t PgrGetMaxAlleleCt(const PgenReader* pgr_ptr) {
+  const PgenReaderMain* pgrp = &GET_PRIVATE(*pgr_ptr, m);
+  return pgrp->fi.max_allele_ct;
+}
+
+HEADER_INLINE void PgrSetFreadBuf(unsigned char* fread_buf, PgenReader* pgr_ptr) {
+  PgenReaderMain* pgrp = &GET_PRIVATE(*pgr_ptr, m);
+  pgrp->fread_buf = fread_buf;
+}
+
+HEADER_INLINE void PgrCopyBaseAndOffset(const PgenFileInfo* pgfip, uint32_t thread_ct, PgenReader** pgr_ptr_arr) {
+  for (uint32_t tidx = 0; tidx != thread_ct; ++tidx) {
+    PgenReaderMain* pgrp = &GET_PRIVATE(*(pgr_ptr_arr[tidx]), m);
+    pgrp->fi.block_base = pgfip->block_base;
+    pgrp->fi.block_offset = pgfip->block_offset;
+  }
+}
+
+// This is necessary when changing sample_include, unless the new query is
+// iterating from the first variant.  (Which can almost never be assumed in
+// plink2 since variant_include[] may not include the first variant.)
+HEADER_INLINE void PgrClearLdCache(PgenReader* pgr_ptr) {
+  PgenReaderMain* pgrp = &GET_PRIVATE(*pgr_ptr, m);
+  pgrp->ldbase_stypes &= kfPgrLdcacheRawNyp;
+
+  // bugfix, LdLoadNecessary() was otherwise claiming that reload wasn't
+  // necessary in certain cases
+  pgrp->ldbase_vidx = 0x80000000U;
+}
+
+// Design change (30 Nov 2019): It is easy to forget to call PgrClearLdCache
+// when changing sample_include.  However, each sample_include change must be
+// accompanied by a sample_include_cumulative_popcounts update.  So, if we
+// define a sample_include_cumulative_popcounts wrapper-type which can only be
+// initialized by a function that also clears a PgenReader LD cache, and modify
+// all PgrGet... functions to require this wrapper-type, the frequency of
+// foot-shooting should go down.
+//
+// The key usage rule is: only use this as a local variable type, and define
+// only one of these per function (unless you're using multiple PgenReaders
+// simultaneously, anyway).  If you're changing the sample-subset when entering
+// and exiting chrY, call PgrSetSampleSubsetIndex on your single
+// PgrSampleSubsetIndex at the time you're crossing a chrY boundary.  Don't
+// define two preinitialized PgrSetSampleSubsetIndexes...
+// (possible todo: if compiling as C++ and NDEBUG isn't defined, add a counter
+// field to PgenReader which is initialized to zero, asserted to be zero and
+// then incremented by PgrSetSampleSubsetIndex, and decremented by the
+// PgrSampleSubsetIndex destructor.)
+typedef struct PgrSampleSubsetIndexStruct {
+#ifdef __cplusplus
+  const uint32_t*& GET_PRIVATE_cumulative_popcounts() { return cumulative_popcounts; }
+  const uint32_t* const& GET_PRIVATE_cumulative_popcounts() const { return cumulative_popcounts; }
+ private:
+#endif
+  const uint32_t* cumulative_popcounts;
+} PgrSampleSubsetIndex;
+
+HEADER_INLINE void PgrSetSampleSubsetIndex(const uint32_t* sample_include_cumulative_popcounts, PgenReader* pgr_ptr, PgrSampleSubsetIndex* pssi_ptr) {
+  GET_PRIVATE(*pssi_ptr, cumulative_popcounts) = sample_include_cumulative_popcounts;
+  PgrClearLdCache(pgr_ptr);
+}
+
+HEADER_INLINE void PgrClearSampleSubsetIndex(PgenReader* pgr_ptr, PgrSampleSubsetIndex* pssi_ptr) {
+  GET_PRIVATE(*pssi_ptr, cumulative_popcounts) = nullptr;
+  if (pgr_ptr) {
+    PgrClearLdCache(pgr_ptr);
+  }
+}
+
+HEADER_INLINE void PgrSetBaseAndOffset0(unsigned char* block_base, uint32_t thread_ct, PgenReader** pgr_ptr_arr) {
+  for (uint32_t tidx = 0; tidx != thread_ct; ++tidx) {
+    PgenReader* pgr_ptr = pgr_ptr_arr[tidx];
+    PgrClearLdCache(pgr_ptr);
+    PgenReaderMain* pgrp = &GET_PRIVATE(*pgr_ptr, m);
+    pgrp->fi.block_base = block_base;
+    pgrp->fi.block_offset = 0;
+  }
+}
+
+// PgenFileInfo initialization is split into two phases, to decouple
+// plink2's arena allocator from this library.  (obvious todo: provide a simple
+// malloc-using PgenReader constructor for anyone who doesn't want to worry
+// about these details.)
+//
+// Phase 1: Open the .pgen (and .pgen.pgi, if relevant); verify that the
+//   initial bytes are consistent with the file format; load/verify sample and
+//   variant counts, initialize pgfi.const_vrtype, pgfi.const_vrec_width, and
+//   pgfi.const_fpos_offset; determine initial memory allocation requirement.
+//   pgfi_alloc_cacheline_ct does not include allele counts and nonref flags,
+//   since it may be more appropriate to allocate those arrays earlier (during
+//   loading of a .bim-like file).
+//
+//   pgfi.var_fpos is set to nullptr if pgfi.const_vrec_width is nonzero.
+//   pgfi.vrtypes/var_allele_cts are set to nullptr in the plink1-format case.
+//
+//   raw_sample_ct and raw_variant_ct should be UINT32_MAX if not previously
+//   known.
+//
+// Intermission: Caller obtains a block of pgfi_alloc_cacheline_ct * 64 bytes,
+//   64-byte aligned.  The cachealigned_malloc() function can be used for this
+//   purpose.  If necessary, pgfi.allele_idx_offsets and pgfi.nonref_flags
+//   should be pointed at already-loaded data, or allocated so they can be
+//   loaded during phase 2.
+//
+// Phase 2: Initialize most pointers in the PgenReader struct to appropriate
+//   positions in first_alloc.  For modes 0x10-0x11, load pgfi.var_fpos and
+//   pgfi.vrtypes, load/validate pgfi.allele_idx_offsets and pgfi.nonref_flags
+//   if appropriate, and initialize pgfi.gflags, pgfi.max_allele_ct, and
+//   pgfi.max_dosage_allele_ct.
+//
+// Finally, if block-fread mode is being used, pgfi.block_base must be
+//   initialized to point to a memory large enough to handle the largest
+//   pgfi_block_read() operation that will be attempted.
+//   pgfi_blockload_get_cacheline_req() can be used to determine the necessary
+//   buffer size.
+
+// This type may change if we introduce a more read-optimized format in the
+// future.  Right now it just tracks the presence/absence of two optional
+// pieces of information: allele counts and nonref flags.
+typedef uint32_t PgenHeaderCtrl;
+
+void PreinitPgfi(PgenFileInfo* pgfip);
+
+// There are two modes of operation:
+// 1. fread block-load.  Block-load operations are single-threaded, while
+//    decompression/counting is multithreaded.  Appropriate for whole-genome
+//    queries, since even with a SSD, reading from multiple parts of a file
+//    simultaneously doesn't work well.
+// 2. fread single-variant-at-a-time.  Simpler interface than block-load, and
+//    doesn't share its inability to handle multiple queries at a time, but
+//    less performant for CPU-heavy operations on the whole genome.
+// First mode corresponds to use_blockload == 1 in phase2, and second mode
+// corresponds to use_blockload == 0.
+//
+// There was originally a third mmap-based mode, which was removed on 14 Mar
+// 2022.  If you are interested in building e.g. a webserver backend that can
+// address multiple queries in parallel, refer to plink-ng commit c470317,
+// which captures the state of the codebase immediately preceding removal of
+// the mmap mode.
+//
+// Other notes:
+// - If pgi_fname is nullptr but the .pgen has an external index file, the
+//   index file name is assumed to be the .pgen filename with .pgi appended.
+// - pgi_fname is ignored if the .pgen does not have an external index file.
+// - raw_variant_ct must be in [1, 2^31 - 3], and raw_sample_ct must be in [1,
+//   2^31 - 2].
+PglErr PgfiInitPhase1(const char* fname, const char* pgi_fname, uint32_t raw_variant_ct, uint32_t raw_sample_ct, PgenHeaderCtrl* header_ctrl_ptr, PgenFileInfo* pgfip, uintptr_t* pgfi_alloc_cacheline_ct_ptr, char* errstr_buf);
+
+// If allele_cts_already_loaded is set, but they're present in the file,
+// they'll be validated; similarly for nonref_flags_already_loaded.
+//
+// If caller is interested in extensions, they should pass in header_exts
+// and/or footer_exts entries with type_idx set to those of the extensions of
+// interest, and type_idx values in increasing order.  On return, .size values
+// of each entry will be filled when the extension is present, and set to ~0LLU
+// when the extension is absent.
+PglErr PgfiInitPhase2Ex(PgenHeaderCtrl header_ctrl, uint32_t allele_cts_already_loaded, uint32_t nonref_flags_already_loaded, uint32_t use_blockload, uint32_t vblock_idx_start, uint32_t vidx_end, uint32_t* max_vrec_width_ptr, PgenFileInfo* pgfip, unsigned char* pgfi_alloc, PgenExtensionLl* header_exts, PgenExtensionLl* footer_exts, uintptr_t* pgr_alloc_cacheline_ct_ptr, char* errstr_buf);
+
+HEADER_INLINE PglErr PgfiInitPhase2(PgenHeaderCtrl header_ctrl, uint32_t allele_cts_already_loaded, uint32_t nonref_flags_already_loaded, uint32_t use_blockload, uint32_t vblock_idx_start, uint32_t vidx_end, uint32_t* max_vrec_width_ptr, PgenFileInfo* pgfip, unsigned char* pgfi_alloc, uintptr_t* pgr_alloc_cacheline_ct_ptr, char* errstr_buf) {
+  return PgfiInitPhase2Ex(header_ctrl, allele_cts_already_loaded, nonref_flags_already_loaded, use_blockload, vblock_idx_start, vidx_end, max_vrec_width_ptr, pgfip, pgfi_alloc, nullptr, nullptr, pgr_alloc_cacheline_ct_ptr, errstr_buf);
+}
+
+// Expected to be called right after PgfiInitPhase2Ex(), after memory buffers
+// are provided for header_exts / footer_exts entries.
+PglErr PgfiInitLoadExts(PgenHeaderCtrl header_ctrl, PgenFileInfo* pgfip, PgenExtensionLl* header_exts, PgenExtensionLl* footer_exts, char* errstr_buf);
+
+uint64_t GetPgfiLdbaseFpos(const PgenFileInfo* pgfip, uintptr_t vidx);
+
+uint64_t PgfiMultireadGetCachelineReq(const uintptr_t* variant_include, const PgenFileInfo* pgfip, uint32_t variant_ct, uint32_t block_size);
+
+// variant_include can be nullptr; in that case, we simply load all the
+// variants (load_variant_ct must be variant_uidx_end - variant_uidx_start).)
+// IMPORTANT: pgfi.block_offset must be manually copied to each reader for now.
+//   (todo: probably replace pgr.fi with a pointer.  when doing that, need to
+//   ensure multiple per-variant readers still works.)
+PglErr PgfiMultiread(const uintptr_t* variant_include, uint32_t variant_uidx_start, uint32_t variant_uidx_end, uint32_t load_variant_ct, PgenFileInfo* pgfip);
+
+
+void PreinitPgr(PgenReader* pgr_ptr);
+
+// Before PgrInit() is called, the caller must obtain a block of
+// pgr_alloc_cacheline_ct * 64 bytes (this value is returned by
+// pgfi_init_phase2), 64-byte aligned; this is the pgr_alloc parameter.
+//
+// There's also a modal usage difference:
+//
+// * Mode 1 (block-fread): There is one PgenFileInfo per file which doesn't
+//   belong to any reader.  After it's initialized, multiple PgenReaders can be
+//   based off of it.  When the PgenFileInfo is destroyed, those PgenReaders
+//   are invalidated and should be destroyed if that hasn't already happened.
+//
+//   fname parameter must be nullptr.
+//
+// * Mode 2 (per-variant fread): Destruction of the original PgenFileInfo
+//   struct does not invalidate any extant PgenReader instances (at least
+//   from pgenlib_read's perspective).  Instead, destruction of the
+//   corresponding memory block or allele_idx_offsets/nonref_flags invalidates
+//   the associated PgenReaders.
+//
+//   The only difference between the first reader and later readers of the same
+//   file is that the first reader steals the shared_ff used to read the
+//   header.
+//
+//   fname parameter must be non-null.
+
+// max_vrec_width ignored when using mode 1.
+PglErr PgrInit(const char* fname, uint32_t max_vrec_width, PgenFileInfo* pgfip, PgenReader* pgr_ptr, unsigned char* pgr_alloc);
+
+// practically all these functions require genovec to be allocated up to
+// vector, not word, boundary
+void PgrPlink1ToPlink2InplaceUnsafe(uint32_t sample_ct, uintptr_t* genovec);
+
+void PgrPlink2ToPlink1InplaceUnsafe(uint32_t sample_ct, uintptr_t* genovec);
+
+// Function names for the main reader functions were getting ridiculous.
+// New naming scheme:
+// * PgrGet() is the basic two-bit genovec loader.  All ALT alleles are treated
+//   as equivalent.  (00 = hom ref, 01 = het ref, 10 = two alt alleles, 11 =
+//   missing.)
+// * PgrGetInv1() is similar, except that the allele index to treat as REF can
+//   be changed.
+// * PgrGet1() only counts the specified allele.  To minimize inversion costs,
+//   GetInv1() should be called on major alleles and Get1() should be called on
+//   minor ones.
+// * PgrGetM() is the multiallelic loader which doesn't collapse multiple
+//   alleles into one.  This retrieves a sparse form identical to what
+//   PwcAppendMultiallelicSparse takes.
+//   Multiallelic-dosage read functions (PgrReadRaw() included) will probably
+//   fill a 3-part data structure of the following form:
+//   1. Bitarray indicating which samples have at least one rarealt dosage.
+//   2. unsigned char array where, if bits a, b, and c are the only set ones in
+//      the first array, the first three elements of the second array are
+//      rarealt dosage counts (1..255) for those three samples.  (Could also
+//      put those in positions [a], [b], and [c], but that produces worse
+//      memory access locality, and it makes sense to treat multiallelic
+//      dosages as fundamentally sparse.)
+//   3. Let R := MINV(255, allele_ct - 2).
+//      a. Length-(sample_ct x R) array of AlleleCodes.
+//      b. Length-(sample_ct x R) array of uint16_t dosage (or int16_t dphase)
+//         values.
+//      Again we use the sparse representation, with payload values packed at
+//      the beginning.
+//   (--indiv-sort algorithm: initialize an array of uintptr_ts of length
+//   sample_ct where [k] has that sample's start index in the payload arrays.)
+// * PgrGetDifflistOrGenovec() opportunistically returns the sparse genotype
+//   representation ('difflist'), for functions capable of taking advantage of
+//   it.  See SampleCountsThread() in plink2_misc for a usage example.
+// * PgrGetCounts() is equivalent to calling PgrGet() and then counting the
+//   number of 00s, 01s, 10s, and 11s, without the overhead of fully expanding
+//   the compressed data, etc.
+// * P suffix = also returns hardcall-phase information.
+// * D suffix = also returns dosage information.
+// * Dp suffix = also returns hardcall-phase, dosage and phased-dosage
+//   information.
+// * PgrGet2() and PgrGet2P() loads biallelic (possibly phased) hardcalls from
+//   a possibly-multiallelic variant.  Any hardcall where either allele is not
+//   one of the specified two alleles is set to missing.
+//   There is no dosage-supporting version of this because rescaling sucks.
+
+// This will normally extract only the genotype indexes corresponding to set
+// bits in sample_include.  Set sample_ct == raw_sample_ct if you don't want
+// any subsetting to occur (in this case sample_include is ignored, can be
+// nullptr).
+// sample_ct cannot be zero.  Trailing bits of genovec are not zeroed out.
+// Ok if genovec only has space for sample_ct values.
+PglErr PgrGet(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, PgenReader* pgr_ptr, uintptr_t* __restrict genovec);
+
+// Loads the specified variant as a difflist if that's more efficient, setting
+// difflist_common_geno to the common genotype value in that case.  Otherwise,
+// genovec is populated and difflist_common_geno is set to UINT32_MAX.
+//
+// max_simple_difflist_len must be smaller than sample_ct.
+//
+// Note that the returned difflist_len can be much larger than
+// max_simple_difflist_len when the variant is LD-encoded; it's bounded by
+//   2 * (raw_sample_ct / kPglMaxDifflistLenDivisor).
+// (probable todo: this interface has... rather sharp edges, even relative to
+// the rest of this low-level library.  Maybe it shouldn't be deleted, but it
+// would be better if there was a function that took a max_difflist_len
+// parameter, and it was safe for difflist_sample_ids to only be allocated up
+// to that length.)
+PglErr PgrGetDifflistOrGenovec(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t max_simple_difflist_len, uint32_t vidx, PgenReader* pgr_ptr, uintptr_t* __restrict genovec, uint32_t* __restrict difflist_common_geno_ptr, uintptr_t* __restrict main_raregeno, uint32_t* __restrict difflist_sample_ids, uint32_t* __restrict difflist_len_ptr);
+
+// genocounts[0] = # hom ref, [1] = # het ref, [2] = two alts, [3] = missing
+PglErr PgrGetCounts(const uintptr_t* __restrict sample_include, const uintptr_t* __restrict sample_include_interleaved_vec, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, PgenReader* pgr_ptr, STD_ARRAY_REF(uint32_t, 4) genocounts);
+
+// genocounts[0] = # of hardcalls with two copies of specified allele
+// genocounts[1] = # of hardcalls with exactly one copy of specified allele
+// genocounts[2] = # of hardcalls with no copies
+// genocounts[3] = missing
+PglErr PgrGetInv1Counts(const uintptr_t* __restrict sample_include, const uintptr_t* __restrict sample_include_interleaved_vec, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, uint32_t allele_idx, PgenReader* pgr_ptr, STD_ARRAY_REF(uint32_t, 4) genocounts);
+
+PglErr IMPLPgrGet1(const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, uint32_t sample_ct, uint32_t vidx, uint32_t allele_idx, PgenReaderMain* pgrp, uintptr_t* __restrict allele_countvec);
+
+// Loads a nypvec with counts of a single allele (allele_idx 0 corresponds to
+// the reference allele, allele_idx 1 corresponds to alt1, etc.).  0b11 ==
+// missing call.
+// Note that calling this with allele_idx == 0 is similar to a plink1 load
+// (except with missing == 0b11, of course).
+// todo: provide a difflist interface once anyone wants it.
+HEADER_INLINE PglErr PgrGet1(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, uint32_t allele_idx, PgenReader* pgr_ptr, uintptr_t* __restrict allele_countvec) {
+  PgenReaderMain* pgrp = &GET_PRIVATE(*pgr_ptr, m);
+  const uint32_t* sample_include_cumulative_popcounts = GET_PRIVATE(pssi, cumulative_popcounts);
+  return IMPLPgrGet1(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, allele_idx, pgrp, allele_countvec);
+}
+
+PglErr IMPLPgrGetInv1(const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, uint32_t sample_ct, uint32_t vidx, uint32_t allele_idx, PgenReaderMain* pgrp, uintptr_t* __restrict allele_invcountvec);
+
+HEADER_INLINE PglErr PgrGetInv1(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, uint32_t allele_idx, PgenReader* pgr_ptr, uintptr_t* __restrict allele_invcountvec) {
+  PgenReaderMain* pgrp = &GET_PRIVATE(*pgr_ptr, m);
+  const uint32_t* sample_include_cumulative_popcounts = GET_PRIVATE(pssi, cumulative_popcounts);
+  return IMPLPgrGetInv1(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, allele_idx, pgrp, allele_invcountvec);
+}
+
+PglErr IMPLPgrGetInv1DifflistOrGenovec(const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, uint32_t sample_ct, uint32_t max_simple_difflist_len, uint32_t vidx, uint32_t allele_idx, PgenReaderMain* pgrp, uintptr_t* __restrict allele_invcountvec, uint32_t* __restrict difflist_common_geno_ptr, uintptr_t* __restrict main_raregeno, uint32_t* __restrict difflist_sample_ids, uint32_t* __restrict difflist_len_ptr);
+
+HEADER_INLINE PglErr PgrGetInv1DifflistOrGenovec(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t max_simple_difflist_len, uint32_t vidx, uint32_t allele_idx, PgenReader* pgr_ptr, uintptr_t* __restrict allele_invcountvec, uint32_t* __restrict difflist_common_geno_ptr, uintptr_t* __restrict main_raregeno, uint32_t* __restrict difflist_sample_ids, uint32_t* __restrict difflist_len_ptr) {
+  PgenReaderMain* pgrp = &GET_PRIVATE(*pgr_ptr, m);
+  const uint32_t* sample_include_cumulative_popcounts = GET_PRIVATE(pssi, cumulative_popcounts);
+  return IMPLPgrGetInv1DifflistOrGenovec(sample_include, sample_include_cumulative_popcounts, sample_ct, max_simple_difflist_len, vidx, allele_idx, pgrp, allele_invcountvec, difflist_common_geno_ptr, main_raregeno, difflist_sample_ids, difflist_len_ptr);
+}
+
+PglErr IMPLPgrGet2(const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, uint32_t sample_ct, uint32_t vidx, uint32_t allele_idx0, uint32_t allele_idx1, PgenReaderMain* pgrp, uintptr_t* __restrict genovec);
+
+HEADER_INLINE PglErr PgrGet2(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, uint32_t allele_idx0, uint32_t allele_idx1, PgenReader* pgr_ptr, uintptr_t* __restrict genovec) {
+  PgenReaderMain* pgrp = &GET_PRIVATE(*pgr_ptr, m);
+  const uint32_t* sample_include_cumulative_popcounts = GET_PRIVATE(pssi, cumulative_popcounts);
+  return IMPLPgrGet2(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, allele_idx0, allele_idx1, pgrp, genovec);
+}
+
+void PreinitPgv(PgenVariant* pgvp);
+
+PglErr PgrGetM(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, PgenReader* pgr_ptr, PgenVariant* pgvp);
+
+// possible todo: add functions which directly support MAF-based queries.  Note
+// that when the difflist representation is used, we can disqualify some
+// low-MAF variants without actually loading the genotype data, since the size
+// of the record puts an upper bound on the alt allele frequency.
+
+// requires trailing bits of genoarr to be zeroed out.
+HEADER_INLINE void PgrDetectGenoarrHetsUnsafe(const uintptr_t*__restrict genoarr, uint32_t raw_sample_ctl2, uintptr_t* __restrict all_hets) {
+  PackWordsToHalfwordsInvmatch(genoarr, kMaskAAAA, raw_sample_ctl2, all_hets);
+  if (raw_sample_ctl2 % 2) {
+    Halfword* __attribute__((may_alias)) all_hets_alias = DowncastWToHW(all_hets);
+    all_hets_alias[raw_sample_ctl2] = 0;
+  }
+}
+
+HEADER_INLINE void PgrDetectGenoarrHets(const uintptr_t* __restrict genoarr, uint32_t raw_sample_ct, uintptr_t* __restrict all_hets) {
+  PackWordsToHalfwordsInvmatch(genoarr, kMaskAAAA, NypCtToWordCt(raw_sample_ct), all_hets);
+  ZeroTrailingBits(raw_sample_ct, all_hets);
+}
+
+// sample_ct > 0.  ok for trailing bits of genoarr to not be zeroed out.
+void PgrDetectGenoarrHetsMultiallelic(const uintptr_t* __restrict genoarr, const uintptr_t* __restrict patch_10_set, const AlleleCode* __restrict patch_10_vals, uint32_t raw_sample_ct, uintptr_t* __restrict all_hets);
+
+// cannot assume phaseinfo bit is clear when phasepresent is clear.
+PglErr PgrGetP(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, PgenReader* pgr_ptr, uintptr_t* __restrict genovec, uintptr_t* __restrict phasepresent, uintptr_t* __restrict phaseinfo, uint32_t* __restrict phasepresent_ct_ptr);
+
+PglErr PgrGet1P(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, uint32_t allele_idx, PgenReader* pgr_ptr, uintptr_t* __restrict allele_countvec, uintptr_t* __restrict phasepresent, uintptr_t* __restrict phaseinfo, uint32_t* __restrict phasepresent_ct_ptr);
+
+PglErr IMPLPgrGetInv1P(const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, uint32_t sample_ct, uint32_t vidx, uint32_t allele_idx, PgenReaderMain* pgrp, uintptr_t* __restrict allele_invcountvec, uintptr_t* __restrict phasepresent, uintptr_t* __restrict phaseinfo, uint32_t* __restrict phasepresent_ct_ptr);
+
+HEADER_INLINE PglErr PgrGetInv1P(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, uint32_t allele_idx, PgenReader* pgr_ptr, uintptr_t* __restrict allele_invcountvec, uintptr_t* __restrict phasepresent, uintptr_t* __restrict phaseinfo, uint32_t* __restrict phasepresent_ct_ptr) {
+  PgenReaderMain* pgrp = &GET_PRIVATE(*pgr_ptr, m);
+  const uint32_t* sample_include_cumulative_popcounts = GET_PRIVATE(pssi, cumulative_popcounts);
+  return IMPLPgrGetInv1P(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, allele_idx, pgrp, allele_invcountvec, phasepresent, phaseinfo, phasepresent_ct_ptr);
+}
+
+PglErr PgrGet2P(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, uint32_t allele_idx0, uint32_t allele_idx1, PgenReader* pgr_ptr, uintptr_t* __restrict genovec, uintptr_t* __restrict phasepresent, uintptr_t* __restrict phaseinfo, uint32_t* __restrict phasepresent_ct_ptr);
+
+PglErr PgrGetMP(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, PgenReader* pgr_ptr, PgenVariant* pgvp);
+
+PglErr IMPLPgrGetD(const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, uint32_t sample_ct, uint32_t vidx, PgenReaderMain* pgrp, uintptr_t* __restrict genovec, uintptr_t* __restrict dosage_present, uint16_t* dosage_main, uint32_t* dosage_ct_ptr);
+
+// if dosage_present and dosage_main are nullptr, dosage data is ignored
+HEADER_INLINE PglErr PgrGetD(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, PgenReader* pgr_ptr, uintptr_t* __restrict genovec, uintptr_t* __restrict dosage_present, uint16_t* dosage_main, uint32_t* dosage_ct_ptr) {
+  PgenReaderMain* pgrp = &GET_PRIVATE(*pgr_ptr, m);
+  const uint32_t* sample_include_cumulative_popcounts = GET_PRIVATE(pssi, cumulative_popcounts);
+  return IMPLPgrGetD(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, pgrp, genovec, dosage_present, dosage_main, dosage_ct_ptr);
+}
+
+PglErr PgrGet1D(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, AlleleCode allele_idx, PgenReader* pgr_ptr, uintptr_t* __restrict allele_countvec, uintptr_t* __restrict dosage_present, uint16_t* dosage_main, uint32_t* dosage_ct_ptr);
+
+PglErr PgrGetInv1D(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, AlleleCode allele_idx, PgenReader* pgr_ptr, uintptr_t* __restrict allele_invcountvec, uintptr_t* __restrict dosage_present, uint16_t* dosage_main, uint32_t* dosage_ct_ptr);
+
+// When computing either form of imputation-r2, this function requires the
+// variant to be biallelic; PgrGetMDCounts must be called in that multiallelic
+// case.
+// imp_r2_ptr must be non-null when is_minimac3_r2 is set.
+PglErr PgrGetDCounts(const uintptr_t* __restrict sample_include, const uintptr_t* __restrict sample_include_interleaved_vec, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, uint32_t is_minimac3_r2, PgenReader* pgr_ptr, double* imp_r2_ptr, STD_ARRAY_REF(uint32_t, 4) genocounts, uint64_t* __restrict all_dosages);
+
+PglErr PgrGetMDCounts(const uintptr_t* __restrict sample_include, const uintptr_t* __restrict sample_include_interleaved_vec, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, uint32_t is_minimac3_r2, PgenReader* pgr_ptr, double* __restrict imp_r2_ptr, uint32_t* __restrict het_ctp, STD_ARRAY_REF(uint32_t, 4) genocounts, uint64_t* __restrict all_dosages);
+
+PglErr PgrGetMD(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, PgenReader* pgr_ptr, PgenVariant* pgvp);
+
+PglErr IMPLPgrGetDp(const uintptr_t* __restrict sample_include, const uint32_t* __restrict sample_include_cumulative_popcounts, uint32_t sample_ct, uint32_t vidx, PgenReaderMain* pgrp, PgenVariant* pgvp);
+
+// ok for both dosage_present and dosage_main to be nullptr when no dosage data
+// is present
+// ok for dphase_present/dphase_delta to be nullptr; dphase_ct always set to 0
+// in that case
+HEADER_INLINE PglErr PgrGetDp(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, PgenReader* pgr_ptr, PgenVariant* pgvp) {
+  PgenReaderMain* pgrp = &GET_PRIVATE(*pgr_ptr, m);
+  const uint32_t* sample_include_cumulative_popcounts = GET_PRIVATE(pssi, cumulative_popcounts);
+  return IMPLPgrGetDp(sample_include, sample_include_cumulative_popcounts, sample_ct, vidx, pgrp, pgvp);
+}
+
+// pgvp->genovec filled with inverse-counts for specified allele
+PglErr PgrGetInv1Dp(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, AlleleCode allele_idx, PgenReader* pgr_ptr, PgenVariant* pgvp);
+
+PglErr PgrGetMDp(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, PgenReader* pgr_ptr, PgenVariant* pgvp);
+
+// interface used by --make-pgen, just performs basic LD/difflist decompression
+// to maximize parallelism
+PglErr PgrGetRaw(uint32_t vidx, PgenGlobalFlags read_gflags, PgenReader* pgr_ptr, uintptr_t** loadbuf_iter_ptr, unsigned char* loaded_vrtype_ptr);
+
+PglErr PgrValidate(PgenReader* pgr_ptr, uintptr_t* genovec_buf, char* errstr_buf);
+
+// missingness bit is set iff hardcall is not present (even if dosage info *is*
+// present)
+PglErr PgrGetMissingness(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, PgenReader* pgr_ptr, uintptr_t* __restrict missingness, uintptr_t* __restrict genovec_buf);
+
+// either missingness_hc (hardcall) or missingness_dosage must be non-null for
+// now
+// missingness_dosage must be vector-aligned
+PglErr PgrGetMissingnessD(const uintptr_t* __restrict sample_include, PgrSampleSubsetIndex pssi, uint32_t sample_ct, uint32_t vidx, PgenReader* pgr_ptr, uintptr_t* __restrict missingness_hc, uintptr_t* __restrict missingness_dosage, uintptr_t* __restrict hets, uintptr_t* __restrict genovec_buf);
+
+
+// error-return iff reterr was success and was changed to kPglRetReadFail (i.e.
+// an error message should be printed).
+BoolErr CleanupPgfi(PgenFileInfo* pgfip, PglErr* reterrp);
+
+BoolErr CleanupPgr(PgenReader* pgr_ptr, PglErr* reterrp);
+
+#ifdef __cplusplus
+}  // namespace plink2
+#endif
+
+#endif  // __PGENLIB_READ_H__
diff --git a/external_libs/pgenlib/include/pgenlib_read.o b/external_libs/pgenlib/include/pgenlib_read.o
new file mode 100644
index 0000000..26268e0
Binary files /dev/null and b/external_libs/pgenlib/include/pgenlib_read.o differ
diff --git a/external_libs/pgenlib/include/plink2_base.cc b/external_libs/pgenlib/include/plink2_base.cc
new file mode 100644
index 0000000..58f7f4e
--- /dev/null
+++ b/external_libs/pgenlib/include/plink2_base.cc
@@ -0,0 +1,717 @@
+// This library is part of PLINK 2.0, copyright (C) 2005-2024 Shaun Purcell,
+// Christopher Chang.
+//
+// This library is free software: you can redistribute it and/or modify it
+// under the terms of the GNU Lesser General Public License as published by the
+// Free Software Foundation; either version 3 of the License, or (at your
+// option) any later version.
+//
+// This library is distributed in the hope that it will be useful, but WITHOUT
+// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public License
+// for more details.
+//
+// You should have received a copy of the GNU Lesser General Public License
+// along with this library.  If not, see <http://www.gnu.org/licenses/>.
+
+
+#include "plink2_base.h"
+
+#ifdef __cplusplus
+namespace plink2 {
+#endif
+
+uint64_t g_failed_alloc_attempt_size = 0;
+
+#if (((__GNUC__ == 4) && (__GNUC_MINOR__ < 7)) || (__GNUC__ >= 11)) && !defined(__APPLE__)
+BoolErr pgl_malloc(uintptr_t size, void* pp) {
+  *S_CAST(unsigned char**, pp) = S_CAST(unsigned char*, malloc(size));
+  if (likely(*S_CAST(unsigned char**, pp))) {
+    return 0;
+  }
+  g_failed_alloc_attempt_size = size;
+  return 1;
+}
+#endif
+
+BoolErr fwrite_checked(const void* buf, uintptr_t len, FILE* outfile) {
+  while (len > kMaxBytesPerIO) {
+    // OS X fwrite() doesn't support 2GiB+ writes
+    // typical disk block size is 4kb, so 0x7ffff000 is the largest sensible
+    // write size
+    // bugfix (9 Mar 2018): forgot a 'not' here...
+    if (unlikely(!fwrite_unlocked(buf, kMaxBytesPerIO, 1, outfile))) {
+      return 1;
+    }
+    buf = &(S_CAST(const unsigned char*, buf)[kMaxBytesPerIO]);
+    len -= kMaxBytesPerIO;
+  }
+  uintptr_t written_byte_ct = fwrite_unlocked(buf, 1, len, outfile);
+  // must do the right thing when len == 0
+  return (written_byte_ct != len);
+}
+
+/*
+IntErr fread_checked2(void* buf, uintptr_t len, FILE* infile, uintptr_t* bytes_read_ptr) {
+  uintptr_t bytes_read = 0;
+  while (len > kMaxBytesPerIO) {
+    const uintptr_t cur_bytes_read = fread_unlocked(buf, 1, kMaxBytesPerIO, infile);
+    bytes_read += cur_bytes_read;
+    if (cur_bytes_read != kMaxBytesPerIO) {
+      *bytes_read_ptr = bytes_read;
+      return ferror_unlocked(infile);
+    }
+    buf = &(((char*)buf)[kMaxBytesPerIO]);
+    len -= kMaxBytesPerIO;
+  }
+  bytes_read += fread_unlocked(buf, 1, len, infile);
+  *bytes_read_ptr = bytes_read;
+  // could skip ferror_unlocked call if bytes_read == original len
+  return ferror_unlocked(infile);
+}
+*/
+
+BoolErr fread_checked(void* buf, uintptr_t len, FILE* infile) {
+  while (len > kMaxBytesPerIO) {
+    const uintptr_t cur_bytes_read = fread_unlocked(buf, 1, kMaxBytesPerIO, infile);
+    if (unlikely(cur_bytes_read != kMaxBytesPerIO)) {
+      return 1;
+    }
+    buf = &(S_CAST(unsigned char*, buf)[kMaxBytesPerIO]);
+    len -= kMaxBytesPerIO;
+  }
+  const uintptr_t cur_bytes_read = fread_unlocked(buf, 1, len, infile);
+  return (cur_bytes_read != len);
+}
+
+#ifdef __LP64__
+static inline BoolErr ScanUintCappedFinish(const char* str_iter, uint64_t cap, uint32_t* valp) {
+  uint64_t val = *valp;
+  while (1) {
+    // a little bit of unrolling seems to help
+    const uint64_t cur_digit = ctou64(*str_iter++) - 48;
+    if (cur_digit >= 10) {
+      break;
+    }
+    // val = val * 10 + cur_digit;
+    const uint64_t cur_digit2 = ctou64(*str_iter++) - 48;
+    if (cur_digit2 >= 10) {
+      val = val * 10 + cur_digit;
+      if (unlikely(val > cap)) {
+        return 1;
+      }
+      break;
+    }
+    val = val * 100 + cur_digit * 10 + cur_digit2;
+    if (unlikely(val > cap)) {
+      return 1;
+    }
+  }
+  *valp = val;
+  return 0;
+}
+
+BoolErr ScanPosintCapped(const char* str_iter, uint64_t cap, uint32_t* valp) {
+  // '0' has ascii code 48
+  assert(ctou32(str_iter[0]) > 32);
+  *valp = ctou32(*str_iter++) - 48;
+  if (*valp >= 10) {
+    // permit leading '+' (ascii 43), but not '++' or '+-'
+    // reasonable to use unlikely() here since these functions aren't used for
+    // numeric vs. non-numeric classification anyway due to erroring out on
+    // overflow
+    if (unlikely(*valp != 0xfffffffbU)) {
+      return 1;
+    }
+    *valp = ctou32(*str_iter++) - 48;
+    if (unlikely(*valp >= 10)) {
+      return 1;
+    }
+  }
+  while (!(*valp)) {
+    *valp = ctou32(*str_iter++) - 48;
+    if (unlikely((*valp) >= 10)) {
+      return 1;
+    }
+  }
+  return ScanUintCappedFinish(str_iter, cap, valp);
+}
+
+// Note that NumericRangeListToBitarr() can call this in an ignore-overflow
+// mode.  If similar logic ever goes into an inner loop, remove all unlikely()
+// annotations in this function and its children.
+BoolErr ScanUintCapped(const char* str_iter, uint64_t cap, uint32_t* valp) {
+  // Reads an integer in [0, cap].  Assumes first character is nonspace.
+  assert(ctou32(str_iter[0]) > 32);
+  uint32_t val = ctou32(*str_iter++) - 48;
+  if (val >= 10) {
+    if (val != 0xfffffffbU) {
+      // '-' has ascii code 45, so unsigned 45 - 48 = 0xfffffffdU
+      if (unlikely((val != 0xfffffffdU) || (*str_iter != '0'))) {
+        return 1;
+      }
+      // accept "-0", "-00", etc.
+      while (*(++str_iter) == '0');
+      *valp = 0;
+      return (ctou32(*str_iter) - 48) < 10;
+    }
+    // accept leading '+'
+    val = ctou32(*str_iter++) - 48;
+    if (unlikely(val >= 10)) {
+      return 1;
+    }
+  }
+  *valp = val;
+  return ScanUintCappedFinish(str_iter, cap, valp);
+}
+
+BoolErr ScanIntAbsBounded(const char* str_iter, uint64_t bound, int32_t* valp) {
+  // Reads an integer in [-bound, bound].  Assumes first character is nonspace.
+  assert(ctou32(str_iter[0]) > 32);
+  *valp = ctou32(*str_iter++) - 48;
+  int32_t sign = 1;
+  if (ctou32(*valp) >= 10) {
+    if (*valp == -3) {
+      sign = -1;
+    } else if (unlikely(*valp != -5)) {
+      return 1;
+    }
+    *valp = ctou32(*str_iter++) - 48;
+    if (unlikely(*valp >= 10)) {
+      return 1;
+    }
+  }
+  if (unlikely(ScanUintCappedFinish(str_iter, bound, I32ToU32(valp)))) {
+    return 1;
+  }
+  *valp *= sign;
+  return 0;
+}
+#else  // not __LP64__
+BoolErr ScanPosintCapped32(const char* str_iter, uint32_t cap_div_10, uint32_t cap_mod_10, uint32_t* valp) {
+  // '0' has ascii code 48
+  assert(ctou32(str_iter[0]) > 32);
+  uint32_t val = ctou32(*str_iter++) - 48;
+  if (val >= 10) {
+    if (unlikely(val != 0xfffffffbU)) {
+      return 1;
+    }
+    val = ctou32(*str_iter++) - 48;
+    if (unlikely(val >= 10)) {
+      return 1;
+    }
+  }
+  while (!val) {
+    val = ctou32(*str_iter++) - 48;
+    if (unlikely(val >= 10)) {
+      return 1;
+    }
+  }
+  for (; ; ++str_iter) {
+    const uint32_t cur_digit = ctou32(*str_iter) - 48;
+    if (cur_digit >= 10) {
+      *valp = val;
+      return 0;
+    }
+    // avoid integer overflow in middle of computation
+    if (unlikely((val >= cap_div_10) && ((val > cap_div_10) || (cur_digit > cap_mod_10)))) {
+      return 1;
+    }
+    val = val * 10 + cur_digit;
+  }
+}
+
+BoolErr ScanUintCapped32(const char* str_iter, uint32_t cap_div_10, uint32_t cap_mod_10, uint32_t* valp) {
+  // Reads an integer in [0, cap].  Assumes first character is nonspace.
+  assert(ctou32(str_iter[0]) > 32);
+  uint32_t val = ctou32(*str_iter++) - 48;
+  if (val >= 10) {
+    if (val != 0xfffffffbU) {
+      if (unlikely((val != 0xfffffffdU) || (*str_iter != '0'))) {
+        return 1;
+      }
+      while (*(++str_iter) == '0');
+      *valp = 0;
+      return (ctou32(*str_iter) - 48) < 10;
+    }
+    val = ctou32(*str_iter++) - 48;
+    if (unlikely(val >= 10)) {
+      return 1;
+    }
+  }
+  for (; ; ++str_iter) {
+    const uint32_t cur_digit = ctou32(*str_iter) - 48;
+    if (cur_digit >= 10) {
+      *valp = val;
+      return 0;
+    }
+    if (unlikely((val >= cap_div_10) && ((val > cap_div_10) || (cur_digit > cap_mod_10)))) {
+      return 1;
+    }
+    val = val * 10 + cur_digit;
+  }
+}
+
+BoolErr ScanIntAbsBounded32(const char* str_iter, uint32_t bound_div_10, uint32_t bound_mod_10, int32_t* valp) {
+  // Reads an integer in [-bound, bound].  Assumes first character is nonspace.
+  assert(ctou32(str_iter[0]) > 32);
+  uint32_t val = ctou32(*str_iter++) - 48;
+  int32_t sign = 1;
+  if (val >= 10) {
+    if (val == 0xfffffffdU) {
+      sign = -1;
+    } else if (unlikely(val != 0xfffffffbU)) {
+      return 1;
+    }
+    val = ctou32(*str_iter++) - 48;
+    if (unlikely(val >= 10)) {
+      return 1;
+    }
+  }
+  for (; ; ++str_iter) {
+    const uint32_t cur_digit = ctou32(*str_iter) - 48;
+    if (cur_digit >= 10) {
+      *valp = sign * S_CAST(int32_t, val);
+      return 0;
+    }
+    if (unlikely((val >= bound_div_10) && ((val > bound_div_10) || (cur_digit > bound_mod_10)))) {
+      return 1;
+    }
+    val = val * 10 + cur_digit;
+  }
+}
+#endif
+
+BoolErr aligned_malloc(uintptr_t size, uintptr_t alignment, void* aligned_pp) {
+  // Assumes malloc returns word-aligned addresses.
+  assert(alignment);
+  assert(!(alignment % kBytesPerWord));
+  uintptr_t malloc_addr;
+  if (unlikely(pgl_malloc(size + alignment, &malloc_addr))) {
+    return 1;
+  }
+  assert(!(malloc_addr % kBytesPerWord));
+  uintptr_t** casted_aligned_pp = S_CAST(uintptr_t**, aligned_pp);
+  *casted_aligned_pp = R_CAST(uintptr_t*, RoundDownPow2(malloc_addr + alignment, alignment));
+  (*casted_aligned_pp)[-1] = malloc_addr;
+  return 0;
+}
+
+#if defined(USE_SSE2) && !defined(NO_UNALIGNED)
+int32_t memequal(const void* m1, const void* m2, uintptr_t byte_ct) {
+  const unsigned char* m1_uc = S_CAST(const unsigned char*, m1);
+  const unsigned char* m2_uc = S_CAST(const unsigned char*, m2);
+  if (byte_ct < 16 + (kBytesPerVec / 2)) {
+    if (byte_ct < kBytesPerWord) {
+      if (byte_ct < 4) {
+        if (byte_ct < 2) {
+          return (!byte_ct) || (m1_uc[0] == m2_uc[0]);
+        }
+        if ((*S_CAST(const uint16_t*, m1)) != (*S_CAST(const uint16_t*, m2))) {
+          return 0;
+        }
+        if ((byte_ct == 3) && (m1_uc[2] != m2_uc[2])) {
+          return 0;
+        }
+        return 1;
+      }
+      if ((*R_CAST(const uint32_t*, m1_uc)) != (*R_CAST(const uint32_t*, m2_uc))) {
+        return 0;
+      }
+      if (byte_ct > 4) {
+        const uintptr_t final_offset = byte_ct - 4;
+        if ((*R_CAST(const uint32_t*, &(m1_uc[final_offset]))) != (*R_CAST(const uint32_t*, &(m2_uc[final_offset])))) {
+          return 0;
+        }
+      }
+      return 1;
+    }
+    const uintptr_t* m1_alias = R_CAST(const uintptr_t*, m1_uc);
+    const uintptr_t* m2_alias = R_CAST(const uintptr_t*, m2_uc);
+    if (m1_alias[0] != m2_alias[0]) {
+      return 0;
+    }
+    if (byte_ct >= 16) {
+      if (m1_alias[1] != m2_alias[1]) {
+        return 0;
+      }
+#  ifdef USE_AVX2
+      if (byte_ct >= 24) {
+        if (m1_alias[2] != m2_alias[2]) {
+          return 0;
+        }
+      }
+#  endif
+    }
+    if (byte_ct % kBytesPerWord) {
+      const uintptr_t final_offset = byte_ct - kBytesPerWord;
+      if ((*R_CAST(const uintptr_t*, &(m1_uc[final_offset]))) != (*R_CAST(const uintptr_t*, &(m2_uc[final_offset])))) {
+        return 0;
+      }
+    }
+    return 1;
+  }
+  // Don't use VecW since _mm_cmpeq_epi64() not defined until SSE4.1.
+  const VecUc* m1_alias = S_CAST(const VecUc*, m1);
+  const VecUc* m2_alias = S_CAST(const VecUc*, m2);
+  const uintptr_t vec_ct = byte_ct / kBytesPerVec;
+  for (uintptr_t vidx = 0; vidx != vec_ct; ++vidx) {
+    // tried unrolling this, doesn't make a difference
+    const VecUc v1 = vecuc_loadu(&(m1_alias[vidx]));
+    const VecUc v2 = vecuc_loadu(&(m2_alias[vidx]));
+    if (vecuc_movemask(v1 == v2) != kVec8thUintMax) {
+      return 0;
+    }
+  }
+  if (byte_ct % kBytesPerVec) {
+    // put this last instead of first, for better behavior when inputs are
+    // aligned
+    const uintptr_t final_offset = byte_ct - kBytesPerVec;
+    const VecUc v1 = vecuc_loadu(&(m1_uc[final_offset]));
+    const VecUc v2 = vecuc_loadu(&(m2_uc[final_offset]));
+    if (vecuc_movemask(v1 == v2) != kVec8thUintMax) {
+      return 0;
+    }
+  }
+  return 1;
+}
+
+// clang/gcc memcmp is not that well-optimized for the short strings we usually
+// compare.
+int32_t Memcmp(const void* m1, const void* m2, uintptr_t byte_ct) {
+  const unsigned char* m1_uc = S_CAST(const unsigned char*, m1);
+  const unsigned char* m2_uc = S_CAST(const unsigned char*, m2);
+  // tried larger crossover threshold, doesn't help
+  if (byte_ct < kBytesPerVec) {
+    if (byte_ct < kBytesPerWord) {
+      if (byte_ct < 4) {
+        for (uintptr_t pos = 0; pos != byte_ct; ++pos) {
+          const unsigned char ucc1 = m1_uc[pos];
+          const unsigned char ucc2 = m2_uc[pos];
+          if (ucc1 != ucc2) {
+            return (ucc1 < ucc2)? -1 : 1;
+          }
+        }
+        return 0;
+      }
+      uint32_t m1_u32 = *S_CAST(const uint32_t*, m1);
+      uint32_t m2_u32 = *S_CAST(const uint32_t*, m2);
+      if (m1_u32 != m2_u32) {
+        return (__builtin_bswap32(m1_u32) < __builtin_bswap32(m2_u32))? -1 : 1;
+      }
+      if (byte_ct > 4) {
+        const uintptr_t final_offset = byte_ct - 4;
+        m1_u32 = *R_CAST(const uint32_t*, &(m1_uc[final_offset]));
+        m2_u32 = *R_CAST(const uint32_t*, &(m2_uc[final_offset]));
+        if (m1_u32 != m2_u32) {
+          return (__builtin_bswap32(m1_u32) < __builtin_bswap32(m2_u32))? -1 : 1;
+        }
+      }
+      return 0;
+    }
+    const uintptr_t* m1_alias = R_CAST(const uintptr_t*, m1_uc);
+    const uintptr_t* m2_alias = R_CAST(const uintptr_t*, m2_uc);
+    uintptr_t m1_word = m1_alias[0];
+    uintptr_t m2_word = m2_alias[0];
+    if (m1_word != m2_word) {
+      return (__builtin_bswap64(m1_word) < __builtin_bswap64(m2_word))? -1 : 1;
+    }
+#  ifdef USE_AVX2
+    if (byte_ct >= 16) {
+      m1_word = m1_alias[1];
+      m2_word = m2_alias[1];
+      if (m1_word != m2_word) {
+        return (__builtin_bswap64(m1_word) < __builtin_bswap64(m2_word))? -1 : 1;
+      }
+      if (byte_ct >= 24) {
+        m1_word = m1_alias[2];
+        m2_word = m2_alias[2];
+        if (m1_word != m2_word) {
+          return (__builtin_bswap64(m1_word) < __builtin_bswap64(m2_word))? -1 : 1;
+        }
+      }
+    }
+#  endif
+    if (byte_ct % kBytesPerWord) {
+      const uintptr_t final_offset = byte_ct - kBytesPerWord;
+      m1_word = *R_CAST(const uintptr_t*, &(m1_uc[final_offset]));
+      m2_word = *R_CAST(const uintptr_t*, &(m2_uc[final_offset]));
+      if (m1_word != m2_word) {
+        return (__builtin_bswap64(m1_word) < __builtin_bswap64(m2_word))? -1 : 1;
+      }
+    }
+    return 0;
+  }
+  const VecUc* m1_alias = S_CAST(const VecUc*, m1);
+  const VecUc* m2_alias = S_CAST(const VecUc*, m2);
+  const uintptr_t fullvec_ct = byte_ct / kBytesPerVec;
+  // uh, clang/LLVM -O2 optimizes this better when comparison is != instead of
+  // <?  ugh, time to change all of the for loops...
+  // (and yes, both -O3 configurations generate worse code here)
+  // at least for loop is better than do-while loop even when 1 iteration is
+  // guaranteed...
+  for (uintptr_t vidx = 0; vidx != fullvec_ct; ++vidx) {
+    const VecUc v1 = vecuc_loadu(&(m1_alias[vidx]));
+    const VecUc v2 = vecuc_loadu(&(m2_alias[vidx]));
+    // is this even worthwhile now in non-AVX2 case?
+    const uint32_t movemask_result = vecuc_movemask(v1 == v2);
+    if (movemask_result != kVec8thUintMax) {
+      const uintptr_t diff_pos = vidx * kBytesPerVec + ctzu32(~movemask_result);
+      return (m1_uc[diff_pos] < m2_uc[diff_pos])? -1 : 1;
+    }
+  }
+  if (byte_ct % kBytesPerVec) {
+    const uintptr_t final_offset = byte_ct - kBytesPerVec;
+    const VecUc v1 = vecuc_loadu(&(m1_uc[final_offset]));
+    const VecUc v2 = vecuc_loadu(&(m2_uc[final_offset]));
+    const uint32_t movemask_result = vecuc_movemask(v1 == v2);
+    if (movemask_result != kVec8thUintMax) {
+      const uintptr_t diff_pos = final_offset + ctzu32(~movemask_result);
+      return (m1_uc[diff_pos] < m2_uc[diff_pos])? -1 : 1;
+    }
+  }
+  return 0;
+}
+#endif // defined(USE_SSE2) && !defined(NO_UNALIGNED)
+
+const uint16_t kDigitPair[] = {
+  0x3030, 0x3130, 0x3230, 0x3330, 0x3430, 0x3530, 0x3630, 0x3730, 0x3830, 0x3930,
+  0x3031, 0x3131, 0x3231, 0x3331, 0x3431, 0x3531, 0x3631, 0x3731, 0x3831, 0x3931,
+  0x3032, 0x3132, 0x3232, 0x3332, 0x3432, 0x3532, 0x3632, 0x3732, 0x3832, 0x3932,
+  0x3033, 0x3133, 0x3233, 0x3333, 0x3433, 0x3533, 0x3633, 0x3733, 0x3833, 0x3933,
+  0x3034, 0x3134, 0x3234, 0x3334, 0x3434, 0x3534, 0x3634, 0x3734, 0x3834, 0x3934,
+  0x3035, 0x3135, 0x3235, 0x3335, 0x3435, 0x3535, 0x3635, 0x3735, 0x3835, 0x3935,
+  0x3036, 0x3136, 0x3236, 0x3336, 0x3436, 0x3536, 0x3636, 0x3736, 0x3836, 0x3936,
+  0x3037, 0x3137, 0x3237, 0x3337, 0x3437, 0x3537, 0x3637, 0x3737, 0x3837, 0x3937,
+  0x3038, 0x3138, 0x3238, 0x3338, 0x3438, 0x3538, 0x3638, 0x3738, 0x3838, 0x3938,
+  0x3039, 0x3139, 0x3239, 0x3339, 0x3439, 0x3539, 0x3639, 0x3739, 0x3839, 0x3939};
+
+char* u32toa(uint32_t uii, char* start) {
+  // Memory-efficient fast integer writer.  (You can do a bit better sometimes
+  // by using a larger lookup table, but on average I doubt that pays off.)
+  // Returns a pointer to the end of the integer (not null-terminated).
+  //
+  // Nearly identical to 'branchlut' from
+  // https://github.com/miloyip/itoa-benchmark , except that the hardcoded
+  // binary search is more balanced (start by comparing 6+ digits vs. <6,
+  // instead of 9+ digits vs. <8).  This tends to be slightly better unless the
+  // integers are almost uniformly distributed over [0, 2^32).
+  //
+  // Todo: compare against an_itoa in https://github.com/appnexus/acf/ .
+  //
+  // (Making the first comparison 7+ digits vs. <7 would seem to make sense,
+  // but it seems to benchmark slightly worse on my Mac?)
+  //
+  // (Since we want to execute different code depending on the number of
+  // digits, the UintSlen() approach doesn't pay off.)
+  uint32_t quotient;
+  if (uii < 100000) {
+    if (uii < 100) {
+      if (uii >= 10) {
+        goto u32toa_just2;
+      }
+      *start++ = '0' + uii;
+      return start;
+    }
+    if (uii < 10000) {
+      if (uii >= 1000) {
+        goto u32toa_just4;
+      }
+      quotient = uii / 100;
+      *start++ = '0' + quotient;
+      goto u32toa_2left;
+    }
+    quotient = uii / 10000;
+    *start++ = '0' + quotient;
+    goto u32toa_4left;
+  }
+  if (uii < 100000000) {
+    if (uii < 1000000) {
+      goto u32toa_just6;
+    }
+    if (uii >= 10000000) {
+      goto u32toa_just8;
+    }
+    quotient = uii / 1000000;
+    *start++ = '0' + quotient;
+    goto u32toa_6left;
+  }
+  quotient = uii / 100000000;
+  if (uii < 1000000000) {
+    *start++ = '0' + quotient;
+  } else {
+    start = memcpya_k(start, &(kDigitPair[quotient]), 2);
+  }
+  uii -= quotient * 100000000;
+ u32toa_just8:
+  quotient = uii / 1000000;
+  start = memcpya_k(start, &(kDigitPair[quotient]), 2);
+ u32toa_6left:
+  uii -= quotient * 1000000;
+ u32toa_just6:
+  quotient = uii / 10000;
+  start = memcpya_k(start, &(kDigitPair[quotient]), 2);
+ u32toa_4left:
+  uii -= quotient * 10000;
+ u32toa_just4:
+  quotient = uii / 100;
+  start = memcpya_k(start, &(kDigitPair[quotient]), 2);
+ u32toa_2left:
+  uii -= quotient * 100;
+ u32toa_just2:
+  return memcpya_k(start, &(kDigitPair[uii]), 2);
+}
+
+char* i64toa(int64_t llii, char* start) {
+  uint64_t ullii = llii;
+  uint64_t top_digits;
+  uint32_t bottom_eight;
+  uint32_t middle_eight;
+  if (llii < 0) {
+    *start++ = '-';
+    ullii = -ullii;
+  }
+  if (ullii <= 0xffffffffLLU) {
+    return u32toa(S_CAST(uint32_t, ullii), start);
+  }
+  top_digits = ullii / 100000000;
+  bottom_eight = S_CAST(uint32_t, ullii - (top_digits * 100000000));
+  if (top_digits <= 0xffffffffLLU) {
+    start = u32toa(S_CAST(uint32_t, top_digits), start);
+    return uitoa_z8(bottom_eight, start);
+  }
+  ullii = top_digits / 100000000;
+  middle_eight = S_CAST(uint32_t, top_digits - (ullii * 100000000));
+  start = u32toa(S_CAST(uint32_t, ullii), start);
+  start = uitoa_z8(middle_eight, start);
+  return uitoa_z8(bottom_eight, start);
+}
+
+#if defined(USE_SSE2) && !defined(NO_UNALIGNED)
+uintptr_t FirstUnequal4(const void* arr1, const void* arr2, uintptr_t nbytes) {
+  // Similar to memequal().
+  if (nbytes < kBytesPerVec) {
+    if (nbytes < kBytesPerWord) {
+      uint32_t xor_result = (*S_CAST(const uint32_t*, arr1)) ^ (*S_CAST(const uint32_t*, arr2));
+      if (xor_result) {
+        return ctzu32(xor_result) / CHAR_BIT;
+      }
+      if (nbytes > 4) {
+        const uintptr_t final_offset = nbytes - 4;
+        const char* s1 = S_CAST(const char*, arr1);
+        const char* s2 = S_CAST(const char*, arr2);
+        xor_result = (*R_CAST(const uint32_t*, &(s1[final_offset]))) ^ (*R_CAST(const uint32_t*, &(s2[final_offset])));
+        if (xor_result) {
+          return final_offset + ctzu32(xor_result) / CHAR_BIT;
+        }
+      }
+      return nbytes;
+    }
+    const uintptr_t* arr1_alias = S_CAST(const uintptr_t*, arr1);
+    const uintptr_t* arr2_alias = S_CAST(const uintptr_t*, arr2);
+    const uintptr_t word_ct = nbytes / kBytesPerWord;
+    for (uint32_t widx = 0; widx != word_ct; ++widx) {
+      const uintptr_t xor_result = arr1_alias[widx] ^ arr2_alias[widx];
+      if (xor_result) {
+        return widx * kBytesPerWord + ctzw(xor_result) / CHAR_BIT;
+      }
+    }
+    if (nbytes % kBytesPerWord) {
+      const uintptr_t final_offset = nbytes - kBytesPerWord;
+      const char* s1 = S_CAST(const char*, arr1);
+      const char* s2 = S_CAST(const char*, arr2);
+      const uintptr_t xor_result = (*R_CAST(const uintptr_t*, &(s1[final_offset]))) ^ (*R_CAST(const uintptr_t*, &(s2[final_offset])));
+      if (xor_result) {
+        return final_offset + ctzw(xor_result) / CHAR_BIT;
+      }
+    }
+    return nbytes;
+  }
+  const VecUc* arr1_alias = S_CAST(const VecUc*, arr1);
+  const VecUc* arr2_alias = S_CAST(const VecUc*, arr2);
+  const uintptr_t vec_ct = nbytes / kBytesPerVec;
+  for (uintptr_t vidx = 0; vidx != vec_ct; ++vidx) {
+    const VecUc v1 = vecuc_loadu(&(arr1_alias[vidx]));
+    const VecUc v2 = vecuc_loadu(&(arr2_alias[vidx]));
+    const uint32_t eq_result = vecw_movemask(v1 == v2);
+    if (eq_result != kVec8thUintMax) {
+      return vidx * kBytesPerVec + ctzu32(~eq_result);
+    }
+  }
+  if (nbytes % kBytesPerVec) {
+    const uintptr_t final_offset = nbytes - kBytesPerVec;
+    const char* s1 = S_CAST(const char*, arr1);
+    const char* s2 = S_CAST(const char*, arr2);
+    const VecW v1 = vecw_loadu(&(s1[final_offset]));
+    const VecW v2 = vecw_loadu(&(s2[final_offset]));
+    const uint32_t eq_result = vecw_movemask(v1 == v2);
+    if (eq_result != kVec8thUintMax) {
+      return final_offset + ctzu32(~eq_result);
+    }
+  }
+  return nbytes;
+}
+#else // !(defined(USE_SSE2) && !defined(NO_UNALIGNED))
+uintptr_t FirstUnequalW(const void* arr1, const void* arr2, uintptr_t nbytes) {
+  const unsigned char* arr1b = S_CAST(const unsigned char*, arr1);
+  const unsigned char* arr2b = S_CAST(const unsigned char*, arr2);
+  const uintptr_t word_ct = nbytes / kBytesPerWord;
+  for (uintptr_t widx = 0; widx != word_ct; ++widx) {
+    uintptr_t arr1_word;
+    uintptr_t arr2_word;
+    CopyFromUnalignedOffsetW(&arr1_word, arr1b, widx);
+    CopyFromUnalignedOffsetW(&arr2_word, arr2b, widx);
+    const uintptr_t xor_result = arr1_word ^ arr2_word;
+    if (xor_result) {
+      return widx * kBytesPerWord + ctzw(xor_result) / CHAR_BIT;
+    }
+  }
+  if (nbytes % kBytesPerWord) {
+    const uintptr_t final_offset = nbytes - kBytesPerWord;
+    uintptr_t arr1_word;
+    uintptr_t arr2_word;
+    CopyFromUnalignedW(&arr1_word, &(arr1b[final_offset]));
+    CopyFromUnalignedW(&arr2_word, &(arr2b[final_offset]));
+    const uintptr_t xor_result = arr1_word ^ arr2_word;
+    if (xor_result) {
+      return final_offset + ctzw(xor_result) / CHAR_BIT;
+    }
+  }
+  return nbytes;
+}
+#endif
+
+#ifdef __LP64__
+uintptr_t CountVintsNonempty(const unsigned char* buf, const unsigned char* buf_end) {
+  const uintptr_t starting_addr = R_CAST(uintptr_t, buf);
+  const VecUc* buf_viter = R_CAST(const VecUc*, RoundDownPow2(starting_addr, kBytesPerVec));
+  const uintptr_t ending_addr = R_CAST(uintptr_t, buf_end);
+  const VecUc* buf_vlast = R_CAST(const VecUc*, RoundDownPow2(ending_addr - 1, kBytesPerVec));
+  const uint32_t leading_byte_ct = starting_addr - R_CAST(uintptr_t, buf_viter);
+  Vec8thUint vint_ends = (UINT32_MAX << leading_byte_ct) & (~vecuc_movemask(*buf_viter));
+  uintptr_t total = 0;
+  while (buf_viter != buf_vlast) {
+    total += PopcountVec8thUint(vint_ends);
+    ++buf_viter;
+    vint_ends = ~vecuc_movemask(*buf_viter);
+  }
+  const uint32_t trailing_byte_ct = ending_addr - R_CAST(uintptr_t, buf_vlast);
+  vint_ends &= (k1LU << trailing_byte_ct) - 1;
+  total += PopcountVec8thUint(vint_ends);
+  return total;
+}
+#else
+uintptr_t CountVints(const unsigned char* buf, const unsigned char* buf_end) {
+  // Could check one word at a time.
+  const uintptr_t len = buf_end - buf;
+  uintptr_t inv_result = 0;
+  for (uintptr_t ulii = 0; ulii != len; ++ulii) {
+    inv_result += buf[ulii] >> 7;
+  }
+  return len - inv_result;
+}
+#endif
+
+#ifdef __cplusplus
+}  // namespace plink2
+#endif
diff --git a/external_libs/pgenlib/include/plink2_base.h b/external_libs/pgenlib/include/plink2_base.h
new file mode 100644
index 0000000..b9d9a29
--- /dev/null
+++ b/external_libs/pgenlib/include/plink2_base.h
@@ -0,0 +1,4323 @@
+#ifndef __PLINK2_BASE_H__
+#define __PLINK2_BASE_H__
+
+// This library is part of PLINK 2.0, copyright (C) 2005-2024 Shaun Purcell,
+// Christopher Chang.
+//
+// This library is free software: you can redistribute it and/or modify it
+// under the terms of the GNU Lesser General Public License as published by the
+// Free Software Foundation; either version 3 of the License, or (at your
+// option) any later version.
+//
+// This library is distributed in the hope that it will be useful, but WITHOUT
+// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public License
+// for more details.
+//
+// You should have received a copy of the GNU Lesser General Public License
+// along with this library.  If not, see <http://www.gnu.org/licenses/>.
+
+
+// Low-level C99/C++03/C++11 library covering basic I/O, SWAR/SIMD, and
+// Windows/OS X/Linux portability.  We try to benefit from as much C++ type
+// safety as we can without either breaking compatibility with C-only codebases
+// or making extension of pgenlib/plink2 code more difficult than the old
+// type-unsafe style.
+//
+// Parameter conventions:
+// - Input parameters, then in/out, then pure outputs, then temporary buffers.
+//   Reference-style input parameters tend to go in the very front, to make it
+//   more obvious that they aren't in/out.
+// - "bitarr" indicates a word-aligned, packed array of bits, while "bitvec"
+//   indicates vector-alignment in 64-bit builds.  ("vector" always means SIMD
+//   inputs/outputs here; C++ std::vector is not used in this codebase.)
+// - Most pointers are stationary; moving pointers have an _iter suffix.
+//
+// Type-choice guidelines:
+// - Integers are unsigned by default, signed only when necessary.
+//   It's necessary to choose one or the other to avoid drowning in a sea of
+//   casts and unexpected behavior.  Each choice has its own surprising
+//   pitfalls that the developer had better be aware of; and I definitely do
+//   not take the position that unsigned is the better default *in all C and/or
+//   C++ code*.  However, for this codebase, the extremely high frequency of
+//   bitwise operations makes unsigned-default the only sane choice.
+//   Some consequences of this choice:
+//   - All pointer differences that are part of a larger arithmetic or
+//     comparison expression are explicitly casted to uintptr_t.
+//   - Since uint64_t -> double conversion is frequently slower than int64_t ->
+//     double conversion, u63tod() should be used when the integer is known to
+//     be less than 2^63.  If we also know it's less than 2^31, u31tod() can
+//     provide a performance improvement on Win32.
+// - Integers that can be >= 2^32 in some of the largest existing datasets, but
+//   are usually smaller, should be defined as uintptr_t, to strike a good
+//   balance between 32-bit performance and 64-bit scaling.  Exhaustive
+//   overflow checking in the 32-bit build is a non-goal; but I do aim for very
+//   high statistical reliability, by inserting checks whenever it occurs to me
+//   that overflow is especially likely (e.g. when multiplying two potentially
+//   large 32-bit numbers).
+// - Bitarrays and 'nyparrays' (packed arrays of 2-bit elements, such as a row
+//   of a plink 1.x .bed file) are usually uintptr_t*, to encourage
+//   word-at-a-time iteration without requiring vector-alignment.  Quite a few
+//   low-level library functions cast them to VecW*.  As mentioned above, the
+//   affected function parameter names must end in 'vec' when this creates an
+//   alignment requirement.
+// - A buffer/iterator expected to contain only UTF-8 text should be char*.
+//   unsigned char* should be reserved for byte-array buffers and iterators
+//   which are expected to interact with some non-text bytes, and generic
+//   memory-location pointers which will be subject to pointer arithmetic.
+//   (Note that this creates some clutter in low-level parsing code: since the
+//   signedness of char is platform-dependent, it becomes necessary to use e.g.
+//   ctou32() a fair bit.)
+// - unsigned char is an acceptable argument type for functions intended to
+//   process a single text character, thanks to implicit char -> unsigned char
+//   conversion; it's just unsigned char* that should be avoided.
+// - void* return values should be restricted to generic pointers which are
+//   *not* expected to be subject to pointer arithmetic.  void* as input
+//   parameter type should only be used when there are at least two equally
+//   valid input types, NOT counting VecW*.
+
+
+// gcc 8.3.0 has been miscompiling the ParseOnebitUnsafe() function in
+// pgenlib_read.cc for the last several years.  gcc 8.4 does not have this
+// problem, and neither does any other gcc major version I've tested to date.
+#ifndef __clang__
+#  if (__GNUC__ == 8) && (__GNUC_MINOR__ < 4)
+#    error "gcc 8.3 is known to have a miscompilation bug that was fixed in 8.4."
+#  endif
+#endif
+
+#if (__GNUC__ < 4)
+// may eventually add MSVC support to gain access to MKL on Windows, but can't
+// justify doing that before all major features are implemented.
+#  error "gcc 4.x+ or clang equivalent required."
+#endif
+
+// The -Wshorten-64-to-32 diagnostic forces the code to be cluttered with
+// meaningless uintptr_t -> uint32_t static casts (number known to be < 2^32,
+// just stored in a uintptr_t because there's no speed penalty and we generally
+// want to think in terms of word-based operations).  The code is more readable
+// if S_CAST(uint32_t, <potentially wider value>) is reserved for situations
+// where a higher bit may actually be set.  This pragma can always be commented
+// out on the few occasions where inappropriate silent truncation is suspected.
+#ifdef __clang__
+#  pragma clang diagnostic ignored "-Wshorten-64-to-32"
+#endif
+
+// 10000 * major + 100 * minor + patch
+// Exception to CONSTI32, since we want the preprocessor to have access
+// to this value.  Named with all caps as a consequence.
+#define PLINK2_BASE_VERNUM 815
+
+
+#define _FILE_OFFSET_BITS 64
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <stddef.h>  // offsetof()
+#include <stdint.h>
+#ifndef __STDC_FORMAT_MACROS
+#  define __STDC_FORMAT_MACROS 1
+#endif
+#include <inttypes.h>
+#include <limits.h>  // CHAR_BIT, PATH_MAX
+
+// #define NDEBUG
+#include <assert.h>
+
+#ifdef _WIN32
+  // needed for EnterCriticalSection, etc.
+#  ifndef _WIN64
+#    define WINVER 0x0501
+#  else
+#    define __LP64__
+#  endif
+#  ifndef WIN32_LEAN_AND_MEAN
+#    define WIN32_LEAN_AND_MEAN
+#  endif
+#  include <windows.h>
+#endif
+
+#if __cplusplus >= 201103L
+#  include <array>
+#endif
+
+#ifdef __LP64__
+// TODO: working no-SSE2 fallback on 64-bit little-endian platforms unsupported
+// by simde.  Can perform early test by compiling on M1/M2 without simde.
+#  define USE_SSE2
+#  ifdef __x86_64__
+#    include <emmintrin.h>
+#  else
+#    define SIMDE_ENABLE_NATIVE_ALIASES
+// Since e.g. an old zstd system header breaks the build, and plink2 is
+// expected to remain under active development for the next few years, we
+// currently default to using vendored copies of zstd/libdeflate/simde, which
+// are manually updated as necessary.
+// To use system headers, define IGNORE_BUNDLED_{ZSTD,LIBDEFLATE.SIMDE}.
+#    ifdef IGNORE_BUNDLED_SIMDE
+#      include <simde/x86/sse2.h>
+#    else
+#      include "../simde/x86/sse2.h"
+#    endif
+#    ifdef SIMDE_ARM_NEON_A32V8_NATIVE
+// For Apple M1, we effectively use SSE2 + constrained _mm_shuffle_epi8().
+// - We don't want to use simde's emulated _mm_shuffle_epi8 since it has an
+//   extra and-with-0x8f step that we never need.
+//   In the event the and-with-0x8f is actually needed, we'll define
+//   vec..._x86_shuffle8() helper functions.
+// - M1 also doesn't have efficient word-popcount.
+#      define USE_SHUFFLE8
+#    endif
+#  endif
+#  ifdef __SSE4_2__
+#    define USE_SSE42
+#    define USE_SHUFFLE8
+#    include <smmintrin.h>
+#    ifdef __AVX2__
+#      if defined(__BMI__) && defined(__BMI2__) && defined(__LZCNT__)
+#        include <immintrin.h>
+#        define USE_AVX2
+#      else
+// Graceful downgrade, in case -march=native misfires on a VM.  See
+// https://github.com/chrchang/plink-ng/issues/155 .
+#        warning "AVX2 builds require -mbmi, -mbmi2, and -mlzcnt as well.  Downgrading to SSE4.2 build."
+#        undef USE_AVX2
+#      endif
+#    endif
+#  endif
+#  define ALIGNV16 __attribute__ ((aligned (16)))
+#else
+#  define ALIGNV16
+#endif
+
+// done with #includes, can start C++ namespace...
+#ifdef __cplusplus
+namespace plink2 {
+#endif
+
+// ...though a bunch of symbols remain to be #defined; try to reduce the number
+// over time.
+
+#ifndef UINT32_MAX
+  // can theoretically be undefined in C++03
+#  define UINT32_MAX 0xffffffffU
+#endif
+
+#define UINT32_MAXM1 0xfffffffeU
+
+#ifndef UINT64_MAX
+#  define UINT64_MAX 0xffffffffffffffffLLU
+#endif
+
+#ifdef __cplusplus
+#  define HEADER_INLINE inline
+// Previously went on a wild constexpr spree, but now these are mostly unused.
+// Reserve for cases where (i) there's a clear constant-initialization use case
+// for an imaginable downstream program (I'm looking at you, DivUp() and
+// RoundUpPow2()...), or (ii) it allows a useful static_assert to be inserted
+// for a hardcoded constant.
+#  if __cplusplus >= 201103L
+#    define HEADER_CINLINE constexpr
+#    define CSINLINE static constexpr
+#    if __cplusplus > 201103L
+#      define HEADER_CINLINE2 constexpr
+#      define CSINLINE2 static constexpr
+#    else
+#      define HEADER_CINLINE2 inline
+#      define CSINLINE2 static inline
+#    endif
+#  else
+#    define HEADER_CINLINE inline
+#    define HEADER_CINLINE2 inline
+#    define CSINLINE static inline
+#    define CSINLINE2 static inline
+#  endif
+#  if __cplusplus <= 199711L
+    // this may be defined anyway, at least on OS X
+#    ifndef static_assert
+      // todo: check other cases
+#      define static_assert(cond, msg)
+#    endif
+#  endif
+#else
+#  define HEADER_INLINE static inline
+#  define HEADER_CINLINE static inline
+#  define HEADER_CINLINE2 static inline
+#  define CSINLINE static inline
+#  define CSINLINE2 static inline
+  // _Static_assert() should work in gcc 4.6+
+#  if (__GNUC__ == 4) && (__GNUC_MINOR__ < 6)
+#    if defined(__clang__) && defined(__has_feature) && defined(__has_extension)
+#      if __has_feature(c_static_assert) || __has_extension(c_static_assert)
+#        define static_assert _Static_assert
+#      else
+#        define static_assert(cond, msg)
+#      endif
+#    else
+#      define static_assert(cond, msg)
+#    endif
+#  else
+#    define static_assert _Static_assert
+#  endif
+#endif
+
+#define __maybe_unused __attribute__((unused))
+
+// Rule of thumb: Use these macros if, and only if, the condition would always
+// trigger exit-from-program.  As a side effect, this makes it more
+// straightforward, if still tedious, to make global changes to error-handling
+// strategy (always dump backtrace and exit immediately?), though provision
+// must still be made for sometimes-error-sometimes-not return paths which
+// don't get an unlikely annotation.
+#ifndef likely
+#  define likely(expr) __builtin_expect(!!(expr), 1)
+#  define unlikely(expr) __builtin_expect(!!(expr), 0)
+#endif
+
+#ifdef __cplusplus
+#  define K_CAST(type, val) (const_cast<type>(val))
+#  define R_CAST(type, val) (reinterpret_cast<type>(val))
+#  define S_CAST(type, val) (static_cast<type>(val))
+#else
+#  define K_CAST(type, val) ((type)(val))
+#  define R_CAST(type, val) ((type)(val))
+#  define S_CAST(type, val) ((type)(val))
+#endif
+
+// (from Linux kernel)
+// container_of - cast a member of a structure out to the containing structure
+// @ptr: the pointer to the member.
+// @type: the type of the container struct this is embedded in.
+// @member: the name of the member within the struct.
+#define container_of(ptr, type, member) \
+  (R_CAST(type*, R_CAST(char*, ptr) - offsetof(type, member)))
+
+// original macro doesn't work in C++ when e.g. ptr is a const char*, and the
+// quick workaround of casting away the const is unsafe.
+#define const_container_of(ptr, type, member) \
+  (R_CAST(const type*, R_CAST(const char*, ptr) - offsetof(type, member)))
+
+HEADER_INLINE double u31tod(uint32_t uii) {
+  const int32_t ii = uii;
+  assert(ii >= 0);
+  return S_CAST(double, ii);
+}
+
+HEADER_INLINE double swtod(intptr_t lii) {
+  return S_CAST(double, lii);
+}
+
+HEADER_INLINE double u63tod(uint64_t ullii) {
+  const int64_t llii = ullii;
+  assert(llii >= 0);
+  return S_CAST(double, llii);
+}
+
+HEADER_INLINE float u31tof(uint32_t uii) {
+  const int32_t ii = uii;
+  assert(ii >= 0);
+  return S_CAST(float, ii);
+}
+
+HEADER_INLINE uint32_t ctou32(char cc) {
+  return S_CAST(unsigned char, cc);
+}
+
+HEADER_INLINE uintptr_t ctow(char cc) {
+  return S_CAST(unsigned char, cc);
+}
+
+HEADER_INLINE uint64_t ctou64(char cc) {
+  return S_CAST(unsigned char, cc);
+}
+
+HEADER_INLINE unsigned char* CToUc(char* pp) {
+  return R_CAST(unsigned char*, pp);
+}
+
+// Error return types.  All of these evaluate to true on error and false on
+// success, but otherwise they have slightly different semantics:
+// * PglErr is the general-purpose enum.  Unlike an enum, implicit conversion
+//   *to* int, not just from int, is prevented by the C++11 compiler (and the
+//   C++11-compiler-validated code still works under C99).  (To achieve this
+//   additional safety, we engage in a bit of code duplication which would be
+//   unreasonable for flagsets.)
+//   (Previously, explicit cast to uint32_t, but not int32_t, was supported, to
+//   reflect the fact that all error codes are positive.  This was deemed
+//   silly.)
+// * BoolErr allows implicit conversion from int, but conversion back to
+//   uint32_t requires an explicit cast.  (It should always be 0/1-valued, but
+//   this isn't enforced by the compiler.)
+// * IntErr allows implicit conversion from int, but conversion back to
+//   int32_t requires an explicit cast.  It mainly serves as a holding pen for
+//   C standard library error return values, which can be negative.
+#if __cplusplus >= 201103L
+struct PglErr {
+  enum class ec
+#else
+typedef enum
+#endif
+  {
+  kPglRetSuccess,
+  kPglRetSkipped,
+  kPglRetNomem,
+  kPglRetOpenFail,
+  kPglRetReadFail,
+  kPglRetWriteFail,
+  // MalformedInput should be returned on low-level file format violations,
+  // while InconsistentInput should be returned for higher-level logical
+  // problems like mismatched files (generally solvable by fixing the command
+  // line), and DegenerateData for properly-formatted-and-matched files that
+  // yields degenerate computational results due to e.g. divide by zero or
+  // insufficient rank.
+  kPglRetMalformedInput,
+  kPglRetInconsistentInput,
+  kPglRetInvalidCmdline,
+  kPglRetThreadCreateFail,
+  kPglRetNetworkFail,
+  kPglRetVarRecordTooLarge,
+  kPglRetUnsupportedInstructions,
+  kPglRetDegenerateData,
+  kPglRetDecompressFail, // also distinguish this from MalformedInput
+  kPglRetRewindFail,
+  kPglRetGpuFail,
+  kPglRetInternalUse1,
+  kPglRetSampleMajorBed = 32,
+  kPglRetNomemCustomMsg = 59,
+  kPglRetInternalError = 60,
+  kPglRetWarningErrcode = 61,
+  kPglRetImproperFunctionCall = 62,
+  kPglRetNotYetSupported = 63,
+
+  // These are only for internal use.  If any of these reach the top level
+  // instead of being handled or converted to another error code, that's a bug,
+  // and plink2 prints a message to that effect.
+  kPglRetRetry = 124,
+  kPglRetHelp = 125,
+  kPglRetLongLine = 126,
+  kPglRetEof = 127}
+#if __cplusplus >= 201103L
+  ;
+
+  PglErr() {}
+
+  PglErr(const PglErr& source) : value_(source.value_) {}
+
+  PglErr(ec source) : value_(source) {}
+
+  // Allow explicit conversion from uint64_t, and NOT uint32_t, to this error
+  // type, to support reproducible multithreaded error reporting (where
+  // multiple threads may atomically attempt to modify a single uint64_t with
+  // the error code in the low 32 bits and a priority number in the high bits).
+  explicit PglErr(uint64_t source) : value_(static_cast<ec>(source)) {}
+
+  PglErr& operator=(const PglErr&) = default;
+
+  operator ec() const {
+    return value_;
+  }
+
+  explicit operator uint32_t() const {
+    return static_cast<uint32_t>(value_);
+  }
+
+  explicit operator int32_t() const {
+    return static_cast<int32_t>(value_);
+  }
+
+  explicit operator bool() const {
+    return (static_cast<uint32_t>(value_) != 0);
+  }
+
+private:
+  ec value_;
+};
+
+const PglErr kPglRetSuccess = PglErr::ec::kPglRetSuccess;
+const PglErr kPglRetSkipped = PglErr::ec::kPglRetSkipped;
+const PglErr kPglRetNomem = PglErr::ec::kPglRetNomem;
+const PglErr kPglRetOpenFail = PglErr::ec::kPglRetOpenFail;
+const PglErr kPglRetReadFail = PglErr::ec::kPglRetReadFail;
+const PglErr kPglRetWriteFail = PglErr::ec::kPglRetWriteFail;
+const PglErr kPglRetMalformedInput = PglErr::ec::kPglRetMalformedInput;
+const PglErr kPglRetInconsistentInput = PglErr::ec::kPglRetInconsistentInput;
+const PglErr kPglRetInvalidCmdline = PglErr::ec::kPglRetInvalidCmdline;
+const PglErr kPglRetRetry = PglErr::ec::kPglRetRetry;
+const PglErr kPglRetHelp = PglErr::ec::kPglRetHelp;
+const PglErr kPglRetThreadCreateFail = PglErr::ec::kPglRetThreadCreateFail;
+const PglErr kPglRetNetworkFail = PglErr::ec::kPglRetNetworkFail;
+const PglErr kPglRetVarRecordTooLarge = PglErr::ec::kPglRetVarRecordTooLarge;
+const PglErr kPglRetUnsupportedInstructions = PglErr::ec::kPglRetUnsupportedInstructions;
+const PglErr kPglRetDegenerateData = PglErr::ec::kPglRetDegenerateData;
+const PglErr kPglRetDecompressFail = PglErr::ec::kPglRetDecompressFail;
+const PglErr kPglRetRewindFail = PglErr::ec::kPglRetRewindFail;
+const PglErr kPglRetGpuFail = PglErr::ec::kPglRetGpuFail;
+const PglErr kPglRetInternalUse1 = PglErr::ec::kPglRetInternalUse1;
+const PglErr kPglRetSampleMajorBed = PglErr::ec::kPglRetSampleMajorBed;
+const PglErr kPglRetWarningErrcode = PglErr::ec::kPglRetWarningErrcode;
+const PglErr kPglRetNomemCustomMsg = PglErr::ec::kPglRetNomemCustomMsg;
+const PglErr kPglRetInternalError = PglErr::ec::kPglRetInternalError;
+const PglErr kPglRetImproperFunctionCall = PglErr::ec::kPglRetImproperFunctionCall;
+const PglErr kPglRetNotYetSupported = PglErr::ec::kPglRetNotYetSupported;
+const PglErr kPglRetLongLine = PglErr::ec::kPglRetLongLine;
+const PglErr kPglRetEof = PglErr::ec::kPglRetEof;
+#else
+  PglErr;
+#endif
+
+#if __cplusplus >= 201103L
+// allow efficient arithmetic on these, but force them to require explicit
+// int32_t/uint32_t casts; only permit implicit assignment from
+// int32_t/uint32_t by default.
+// built-in bool type does too many things we don't want...
+
+// expected to be integer-valued, but not necessarily 0/1 or positive
+struct IntErr {
+  IntErr() {}
+
+  IntErr(int32_t source) : value_(source) {}
+
+  explicit operator int32_t() const {
+    return value_;
+  }
+
+  explicit operator bool() const {
+    return (value_ != 0);
+  }
+
+private:
+  int32_t value_;
+};
+
+// expected to be 0/1-valued
+struct BoolErr {
+  BoolErr() {}
+
+  BoolErr(uint32_t source) : value_(source) {}
+
+  explicit operator uint32_t() const {
+    return value_;
+  }
+
+  explicit operator bool() const {
+    return (value_ != 0);
+  }
+
+private:
+  uint32_t value_;
+};
+#else
+typedef int32_t IntErr;
+typedef uint32_t BoolErr;
+#endif
+
+// make this work on 32-bit as well as 64-bit systems, across
+// Windows/OS X/Linux
+// (todo: clean this up a bit.  it's inherently a baling-wire-and-duct-tape
+// sort of thing, though...)
+#ifdef _WIN32
+  // must compile with -std=gnu++11, not c++11, on 32-bit Windows since
+  // otherwise fseeko64 not defined...
+#  define fseeko fseeko64
+#  define ftello ftello64
+#  define FOPEN_RB "rb"
+#  define FOPEN_WB "wb"
+#  define FOPEN_AB "ab"
+#  define ferror_unlocked ferror
+#  define feof_unlocked feof
+#  ifdef __LP64__
+#    define getc_unlocked _fgetc_nolock
+#    define putc_unlocked _fputc_nolock
+    // todo: find mingw-w64 build which properly links _fread_nolock, and
+    // conditional-compile
+#    define fread_unlocked fread
+#    define fwrite_unlocked fwrite
+#  else
+#    define getc_unlocked getc
+#    define putc_unlocked putc
+#    define fread_unlocked fread
+#    define fwrite_unlocked fwrite
+#  endif
+#  if __cplusplus < 201103L
+#    define uint64_t unsigned long long
+#    define int64_t long long
+#  endif
+#else  // Linux or OS X
+#  define FOPEN_RB "r"
+#  define FOPEN_WB "w"
+#  define FOPEN_AB "a"
+#  if defined(__APPLE__) || defined(__FreeBSD__) || defined(__NetBSD__)
+#    define fread_unlocked fread
+#    define fwrite_unlocked fwrite
+#  endif
+#  if defined(__NetBSD__)
+#    define ferror_unlocked ferror
+#    define feof_unlocked feof
+#  endif
+#endif
+
+#ifdef _WIN32
+#  undef PRId64
+#  undef PRIu64
+#  define PRId64 "I64d"
+#  define PRIu64 "I64u"
+#else
+#  ifdef __cplusplus
+#    ifndef PRId64
+#      define PRId64 "lld"
+#    endif
+#  endif
+#endif
+
+// These are useful for defending against base-pointer integer overflow on bad
+// input.
+HEADER_INLINE BoolErr PtrAddCk(const unsigned char* end, intptr_t incr, const unsigned char** basep) {
+  *basep += incr;
+  return unlikely((end - (*basep)) < 0);
+}
+
+// 'W' for writable
+HEADER_INLINE BoolErr PtrWSubCk(unsigned char* base, intptr_t decr, unsigned char** endp) {
+  *endp -= decr;
+  return unlikely(((*endp) - base) < 0);
+}
+
+HEADER_INLINE BoolErr PtrCheck(const void* end, const void* base, intptr_t req) {
+  const unsigned char* end_uc = S_CAST(const unsigned char*, end);
+  const unsigned char* base_uc = S_CAST(const unsigned char*, base);
+  return unlikely((end_uc - base_uc) < req);
+}
+
+// We want this to return an uint32_t, not an int32_t.
+HEADER_INLINE uint32_t ctzu32(uint32_t uii) {
+  return __builtin_ctz(uii);
+}
+
+// this should always compile down to bsr.
+HEADER_INLINE uint32_t bsru32(uint32_t uii) {
+  return 31 - __builtin_clz(uii);
+}
+
+#ifdef _WIN64
+HEADER_INLINE uint32_t ctzw(unsigned long long ullii) {
+  return __builtin_ctzll(ullii);
+}
+
+HEADER_INLINE uint32_t bsrw(unsigned long long ullii) {
+  // Note that this actually compiles to a single instruction on x86; it's
+  // naked __builtin_clzll which requires an additional subtraction.
+  return 63 - __builtin_clzll(ullii);
+}
+#else
+HEADER_INLINE uint32_t ctzw(unsigned long ulii) {
+  return __builtin_ctzl(ulii);
+}
+
+HEADER_INLINE uint32_t bsrw(unsigned long ulii) {
+  return (8 * sizeof(intptr_t) - 1) - __builtin_clzl(ulii);
+}
+#  ifndef __LP64__
+    // needed to prevent GCC 6 build failure
+#    if (__GNUC__ == 4) && (__GNUC_MINOR__ < 8)
+#      if (__cplusplus < 201103L) && !defined(__APPLE__)
+#        ifndef uintptr_t
+#          define uintptr_t unsigned long
+#        endif
+#        ifndef intptr_t
+#          define intptr_t long
+#        endif
+#      endif
+#    endif
+#  endif
+#endif
+
+#ifdef __LP64__
+#  ifdef _WIN32 // i.e. Win64
+
+#    undef PRIuPTR
+#    undef PRIdPTR
+#    define PRIuPTR PRIu64
+#    define PRIdPTR PRId64
+#    define PRIxPTR2 "016I64x"
+
+#  else  // not _WIN32
+
+#    ifndef PRIuPTR
+#      define PRIuPTR "lu"
+#    endif
+#    ifndef PRIdPTR
+#      define PRIdPTR "ld"
+#    endif
+#    define PRIxPTR2 "016lx"
+
+#  endif  // Win64
+
+#else  // not __LP64__
+
+  // without this, we get ridiculous warning spew...
+  // not 100% sure this is the right cutoff, but this has been tested on 4.7
+  // and 4.8 build machines, so it plausibly is.
+#  if (__GNUC__ == 4) && (__GNUC_MINOR__ < 8) && (__cplusplus < 201103L)
+#    undef PRIuPTR
+#    undef PRIdPTR
+#    define PRIuPTR "lu"
+#    define PRIdPTR "ld"
+#  endif
+
+#  define PRIxPTR2 "08lx"
+
+#endif
+
+#ifndef HAVE_NULLPTR
+#  ifndef __cplusplus
+#    define nullptr NULL
+#  else
+#    if __cplusplus <= 199711L
+#      ifndef nullptr
+#        define nullptr NULL
+#      endif
+#    endif
+#  endif
+#endif
+
+// Checked a bunch of alternatives to #define constants.  For integer constants
+// in [-2^31, 2^31), enum {} avoids macro expansion issues that actually
+// matter, and that more than cancels out any tiny increase in binary size due
+// to additional debugger information (which has value, anyway).  However, we
+// don't want to use this under C++ due to enumeral/non-enumeral conditional
+// expression warnings, so this isn't one-size-fits-all; and plain old const
+// int has all the functionality we want under C++ (including internal linkage,
+// so it's fine to define them in header files).  Thus we wrap the
+// implementation in a macro.
+//
+// Otherwise, the macro expansion thing is still annoying but we suck it up due
+// to the need for too much duplicate C vs. C++ code ("initializer element is
+// not constant" when using const <type> in C99...)
+//
+// We start most plink2- and pgenlib-specific numeric constant names here with
+// "kPgl", which should have a vanishingly small chance of colliding with
+// anything in C99.  Note that stuff like kBytesPerWord is not considered
+// library-specific, so it's exempt from having "Pgl" in the name.  Also, the
+// few string literals here are of the FOPEN_WB sort, which have similar usage
+// patterns to e.g. PRIuPTR which shouldn't be renamed, so those remain
+// all-caps.
+//
+// (Update, May 2018: CONSTU31 was renamed to CONSTI32 and changed to type
+// int32_t, to prevent C vs. C++ differences.  This almost never makes a
+// difference, since when int32_t and uint32_t are mixed in the same
+// expression, the former gets converted to unsigned.  However, unpleasant
+// surprises are occasionally possible when mixing these constants with
+// uint16_t or unsigned char values, since then the unsigned values are
+// promoted to int32_t.  Also, this essentially forces use of -Wno-sign-compare
+// when using gcc 4.4.
+//
+// Biggest thing to watch out for is mixing of Halfword with these constants in
+// 32-bit builds.  Dosage and Vec8thUint are also relevant.)
+#ifdef __cplusplus
+#  define CONSTI32(name, expr) const int32_t name = (expr)
+#else
+#  define CONSTI32(name, expr) enum {name = (expr)}
+#endif
+
+// useful because of its bitwise complement: ~k0LU is a word with all 1 bits,
+// while ~0 is always 32 1 bits.
+// LLU is used over ULL for searchability (no conflict with NULL).
+static const uintptr_t k0LU = S_CAST(uintptr_t, 0);
+
+// mainly useful for bitshifts: (k1LU << 32) works in 64-bit builds, while
+// (1 << 32) is undefined.  also used as a quicker-to-type way of casting
+// numbers/expressions to uintptr_t (via multiplication).
+static const uintptr_t k1LU = S_CAST(uintptr_t, 1);
+
+#ifdef __LP64__
+CONSTI32(kBitsPerWord, 64);
+CONSTI32(kBitsPerWordLog2, 6);
+
+typedef uint32_t Halfword;
+typedef uint16_t Quarterword;
+#else
+CONSTI32(kBitsPerWord, 32);
+CONSTI32(kBitsPerWordLog2, 5);
+
+typedef uint16_t Halfword;
+typedef uint8_t Quarterword;
+#endif
+
+#ifdef USE_SSE2
+#  ifdef USE_AVX2
+CONSTI32(kBytesPerVec, 32);
+
+// 16 still seems to noticeably outperform 32 on my Mac test machine, and
+// is about equal on my Linux test machine, probably due to reduced clock
+// frequency when 32-byte floating point vector operations are used (as in, ALL
+// operations, sometimes on ALL cores, become slower when a single core
+// performs a 32-byte fp vector operation).
+// However, processor power management, numeric libraries, and my AVX2 code
+// should improve over time.  There will probably come a time where switching
+// to 32-byte fp is worthwhile.
+#    define FVEC_32
+
+// bleah, have to define these here, vector_size doesn't see enum values
+typedef uintptr_t VecW __attribute__ ((vector_size (32)));
+typedef uint32_t VecU32 __attribute__ ((vector_size (32)));
+typedef int32_t VecI32 __attribute__ ((vector_size (32)));
+typedef unsigned short VecU16 __attribute__ ((vector_size (32)));
+typedef short VecI16 __attribute__ ((vector_size (32)));
+// documentation says 'char', but int8_t works fine under gcc 4.4 and conveys
+// intent better (char not guaranteed to be signed)
+typedef int8_t VecI8 __attribute__ ((vector_size (32)));
+typedef unsigned char VecUc __attribute__ ((vector_size (32)));
+
+HEADER_INLINE VecW VecToW(__m256i vv) {
+  return R_CAST(VecW, vv);
+}
+
+HEADER_INLINE VecU32 VecToU32(__m256i vv) {
+  return R_CAST(VecU32, vv);
+}
+
+HEADER_INLINE VecI32 VecToI32(__m256i vv) {
+  return R_CAST(VecI32, vv);
+}
+
+HEADER_INLINE VecU16 VecToU16(__m256i vv) {
+  return R_CAST(VecU16, vv);
+}
+
+HEADER_INLINE VecI16 VecToI16(__m256i vv) {
+  return R_CAST(VecI16, vv);
+}
+
+HEADER_INLINE VecUc VecToUc(__m256i vv) {
+  return R_CAST(VecUc, vv);
+}
+
+HEADER_INLINE VecI8 VecToI8(__m256i vv) {
+  return R_CAST(VecI8, vv);
+}
+
+HEADER_INLINE __m256i WToVec(VecW vv) {
+  return R_CAST(__m256i, vv);
+}
+
+HEADER_INLINE __m256i U32ToVec(VecU32 vv) {
+  return R_CAST(__m256i, vv);
+}
+
+HEADER_INLINE __m256i I32ToVec(VecI32 vv) {
+  return R_CAST(__m256i, vv);
+}
+
+HEADER_INLINE __m256i U16ToVec(VecU16 vv) {
+  return R_CAST(__m256i, vv);
+}
+
+HEADER_INLINE __m256i I16ToVec(VecI16 vv) {
+  return R_CAST(__m256i, vv);
+}
+
+HEADER_INLINE __m256i UcToVec(VecUc vv) {
+  return R_CAST(__m256i, vv);
+}
+
+HEADER_INLINE __m256i I8ToVec(VecI8 vv) {
+  return R_CAST(__m256i, vv);
+}
+
+// _mm256_set1_... seems to have the same performance; could use that instead.
+#    define VCONST_W(xx) {xx, xx, xx, xx}
+#    define VCONST_S(xx) {xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx}
+#    define VCONST_C(xx) {xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx}
+#    define VCONST_UC VCONST_C
+
+// vv = VCONST_W(k0LU) doesn't work (only ok for initialization)
+HEADER_INLINE VecW vecw_setzero() {
+  return VecToW(_mm256_setzero_si256());
+}
+
+HEADER_INLINE VecU32 vecu32_setzero() {
+  return VecToU32(_mm256_setzero_si256());
+}
+
+HEADER_INLINE VecU16 vecu16_setzero() {
+  return VecToU16(_mm256_setzero_si256());
+}
+
+HEADER_INLINE VecI16 veci16_setzero() {
+  return VecToI16(_mm256_setzero_si256());
+}
+
+HEADER_INLINE VecUc vecuc_setzero() {
+  return VecToUc(_mm256_setzero_si256());
+}
+
+HEADER_INLINE VecI8 veci8_setzero() {
+  return VecToI8(_mm256_setzero_si256());
+}
+
+// "vv >> ct" doesn't work, and Scientific Linux gcc 4.4 might not optimize
+// VCONST_W shift properly (todo: test this)
+HEADER_INLINE VecW vecw_srli(VecW vv, uint32_t ct) {
+  return VecToW(_mm256_srli_epi64(WToVec(vv), ct));
+}
+
+HEADER_INLINE VecW vecw_slli(VecW vv, uint32_t ct) {
+  return VecToW(_mm256_slli_epi64(WToVec(vv), ct));
+}
+
+HEADER_INLINE VecU32 vecu32_srli(VecU32 vv, uint32_t ct) {
+  return VecToU32(_mm256_srli_epi32(U32ToVec(vv), ct));
+}
+
+HEADER_INLINE VecU32 vecu32_slli(VecU32 vv, uint32_t ct) {
+  return VecToU32(_mm256_slli_epi32(U32ToVec(vv), ct));
+}
+
+HEADER_INLINE VecU16 vecu16_srli(VecU16 vv, uint32_t ct) {
+  return VecToU16(_mm256_srli_epi16(U16ToVec(vv), ct));
+}
+
+HEADER_INLINE VecU16 vecu16_slli(VecU16 vv, uint32_t ct) {
+  return VecToU16(_mm256_slli_epi16(U16ToVec(vv), ct));
+}
+
+// Compiler still doesn't seem to be smart enough to use andnot properly.
+HEADER_INLINE VecW vecw_and_notfirst(VecW excl, VecW main) {
+  return VecToW(_mm256_andnot_si256(WToVec(excl), WToVec(main)));
+}
+
+HEADER_INLINE VecU32 vecu32_and_notfirst(VecU32 excl, VecU32 main) {
+  return VecToU32(_mm256_andnot_si256(U32ToVec(excl), U32ToVec(main)));
+}
+
+HEADER_INLINE VecI32 veci32_and_notfirst(VecI32 excl, VecI32 main) {
+  return VecToI32(_mm256_andnot_si256(I32ToVec(excl), I32ToVec(main)));
+}
+
+HEADER_INLINE VecU16 vecu16_and_notfirst(VecU16 excl, VecU16 main) {
+  return VecToU16(_mm256_andnot_si256(U16ToVec(excl), U16ToVec(main)));
+}
+
+HEADER_INLINE VecI16 veci16_and_notfirst(VecI16 excl, VecI16 main) {
+  return VecToI16(_mm256_andnot_si256(I16ToVec(excl), I16ToVec(main)));
+}
+
+HEADER_INLINE VecUc vecuc_and_notfirst(VecUc excl, VecUc main) {
+  return VecToUc(_mm256_andnot_si256(UcToVec(excl), UcToVec(main)));
+}
+
+HEADER_INLINE VecI8 veci8_and_notfirst(VecI8 excl, VecI8 main) {
+  return VecToI8(_mm256_andnot_si256(I8ToVec(excl), I8ToVec(main)));
+}
+
+HEADER_INLINE VecW vecw_set1(uintptr_t ulii) {
+  return VecToW(_mm256_set1_epi64x(ulii));
+}
+
+HEADER_INLINE VecU32 vecu32_set1(uint32_t uii) {
+  return VecToU32(_mm256_set1_epi32(uii));
+}
+
+HEADER_INLINE VecI32 veci32_set1(int32_t ii) {
+  return VecToI32(_mm256_set1_epi32(ii));
+}
+
+HEADER_INLINE VecU16 vecu16_set1(unsigned short usi) {
+  return VecToU16(_mm256_set1_epi16(usi));
+}
+
+HEADER_INLINE VecI16 veci16_set1(short si) {
+  return VecToI16(_mm256_set1_epi16(si));
+}
+
+HEADER_INLINE VecUc vecuc_set1_epi16(unsigned short usi) {
+  return VecToUc(_mm256_set1_epi16(usi));
+}
+
+HEADER_INLINE VecUc vecuc_set1(unsigned char ucc) {
+  return VecToUc(_mm256_set1_epi8(ucc));
+}
+
+HEADER_INLINE VecI8 veci8_set1(char cc) {
+  return VecToI8( _mm256_set1_epi8(cc));
+}
+
+// TODO: on ARM, replace most movemask uses:
+// https://community.arm.com/arm-community-blogs/b/infrastructure-solutions-blog/posts/porting-x86-vector-bitmask-optimizations-to-arm-neon
+HEADER_INLINE uint32_t vecw_movemask(VecW vv) {
+  return _mm256_movemask_epi8(WToVec(vv));
+}
+
+HEADER_INLINE uint32_t vecu32_movemask(VecU32 vv) {
+  return _mm256_movemask_epi8(U32ToVec(vv));
+}
+
+HEADER_INLINE uint32_t veci32_movemask(VecI32 vv) {
+  return _mm256_movemask_epi8(I32ToVec(vv));
+}
+
+HEADER_INLINE uint32_t vecu16_movemask(VecU16 vv) {
+  return _mm256_movemask_epi8(U16ToVec(vv));
+}
+
+HEADER_INLINE uint32_t veci16_movemask(VecI16 vv) {
+  return _mm256_movemask_epi8(I16ToVec(vv));
+}
+
+HEADER_INLINE uint32_t veci8_movemask(VecI8 vv) {
+  return _mm256_movemask_epi8(I8ToVec(vv));
+}
+
+HEADER_INLINE uint32_t vecuc_movemask(VecUc vv) {
+  return _mm256_movemask_epi8(UcToVec(vv));
+}
+
+// Repeats elements in second lane in AVX2 case.
+HEADER_INLINE VecW vecw_setr8(char e15, char e14, char e13, char e12, char e11, char e10, char e9, char e8, char e7, char e6, char e5, char e4, char e3, char e2, char e1, char e0) {
+  return VecToW(_mm256_setr_epi8(e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0, e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0));
+}
+
+HEADER_INLINE VecU16 vecu16_setr8(char e15, char e14, char e13, char e12, char e11, char e10, char e9, char e8, char e7, char e6, char e5, char e4, char e3, char e2, char e1, char e0) {
+  return VecToU16(_mm256_setr_epi8(e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0, e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0));
+}
+
+HEADER_INLINE VecUc vecuc_setr8(char e15, char e14, char e13, char e12, char e11, char e10, char e9, char e8, char e7, char e6, char e5, char e4, char e3, char e2, char e1, char e0) {
+  return VecToUc(_mm256_setr_epi8(e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0, e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0));
+}
+
+// Discards last 16 arguments in SSE2/SSE4.2 case.
+HEADER_INLINE VecW vecw_setr8x(char e31, char e30, char e29, char e28, char e27, char e26, char e25, char e24, char e23, char e22, char e21, char e20, char e19, char e18, char e17, char e16, char e15, char e14, char e13, char e12, char e11, char e10, char e9, char e8, char e7, char e6, char e5, char e4, char e3, char e2, char e1, char e0) {
+  return VecToW(_mm256_setr_epi8(e31, e30, e29, e28, e27, e26, e25, e24, e23, e22, e21, e20, e19, e18, e17, e16, e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0));
+}
+
+HEADER_INLINE VecUc vecuc_setr8x(char e31, char e30, char e29, char e28, char e27, char e26, char e25, char e24, char e23, char e22, char e21, char e20, char e19, char e18, char e17, char e16, char e15, char e14, char e13, char e12, char e11, char e10, char e9, char e8, char e7, char e6, char e5, char e4, char e3, char e2, char e1, char e0) {
+  return VecToUc(_mm256_setr_epi8(e31, e30, e29, e28, e27, e26, e25, e24, e23, e22, e21, e20, e19, e18, e17, e16, e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0));
+}
+
+HEADER_INLINE VecW vecw_setr32(uint32_t e3, uint32_t e2, uint32_t e1, uint32_t e0) {
+  return VecToW(_mm256_setr_epi32(e3, e2, e1, e0, e3, e2, e1, e0));
+}
+
+
+HEADER_INLINE VecW vecw_unpacklo8(VecW evens, VecW odds) {
+  return VecToW(_mm256_unpacklo_epi8(WToVec(evens), WToVec(odds)));
+}
+
+HEADER_INLINE VecW vecw_unpackhi8(VecW evens, VecW odds) {
+  return VecToW(_mm256_unpackhi_epi8(WToVec(evens), WToVec(odds)));
+}
+
+HEADER_INLINE VecI8 veci8_unpacklo8(VecI8 evens, VecI8 odds) {
+  return VecToI8(_mm256_unpacklo_epi8(I8ToVec(evens), I8ToVec(odds)));
+}
+
+HEADER_INLINE VecI8 veci8_unpackhi8(VecI8 evens, VecI8 odds) {
+  return VecToI8(_mm256_unpackhi_epi8(I8ToVec(evens), I8ToVec(odds)));
+}
+
+HEADER_INLINE VecUc vecuc_unpacklo8(VecUc evens, VecUc odds) {
+  return VecToUc(_mm256_unpacklo_epi8(UcToVec(evens), UcToVec(odds)));
+}
+
+HEADER_INLINE VecUc vecuc_unpackhi8(VecUc evens, VecUc odds) {
+  return VecToUc(_mm256_unpackhi_epi8(UcToVec(evens), UcToVec(odds)));
+}
+
+HEADER_INLINE VecW vecw_unpacklo16(VecW evens, VecW odds) {
+  return VecToW(_mm256_unpacklo_epi16(WToVec(evens), WToVec(odds)));
+}
+
+HEADER_INLINE VecW vecw_unpackhi16(VecW evens, VecW odds) {
+  return VecToW(_mm256_unpackhi_epi16(WToVec(evens), WToVec(odds)));
+}
+
+HEADER_INLINE VecW vecw_unpacklo32(VecW evens, VecW odds) {
+  return VecToW(_mm256_unpacklo_epi32(WToVec(evens), WToVec(odds)));
+}
+
+HEADER_INLINE VecW vecw_unpackhi32(VecW evens, VecW odds) {
+  return VecToW(_mm256_unpackhi_epi32(WToVec(evens), WToVec(odds)));
+}
+
+HEADER_INLINE VecW vecw_permute0xd8_if_avx2(VecW vv) {
+  return VecToW(_mm256_permute4x64_epi64(WToVec(vv), 0xd8));
+}
+
+HEADER_INLINE VecI8 veci8_permute0xd8_if_avx2(VecI8 vv) {
+  return VecToI8(_mm256_permute4x64_epi64(I8ToVec(vv), 0xd8));
+}
+
+HEADER_INLINE VecUc vecuc_permute0xd8_if_avx2(VecUc vv) {
+  return VecToUc(_mm256_permute4x64_epi64(UcToVec(vv), 0xd8));
+}
+
+// Could have a single-src gather_even function, but that should wait until
+// there is a clear SSE2 use case.
+HEADER_INLINE VecW vecw_gather_even(VecW src_lo, VecW src_hi, VecW m8) {
+  const VecW gathered_laneswapped = VecToW(_mm256_packus_epi16(WToVec(src_lo & m8), WToVec(src_hi & m8)));
+  return vecw_permute0xd8_if_avx2(gathered_laneswapped);
+}
+
+HEADER_INLINE VecUc vecuc_gather_even(VecUc src_lo, VecUc src_hi, VecUc m8) {
+  const VecUc gathered_laneswapped = VecToUc(_mm256_packus_epi16(UcToVec(src_lo & m8), UcToVec(src_hi & m8)));
+  return vecuc_permute0xd8_if_avx2(gathered_laneswapped);
+}
+
+HEADER_INLINE VecUc vecuc_gather_odd(VecUc src_lo, VecUc src_hi) {
+  const VecUc gathered_laneswapped = VecToUc(_mm256_packus_epi16(_mm256_srli_epi16(UcToVec(src_lo), 8), _mm256_srli_epi16(UcToVec(src_hi), 8)));
+  return vecuc_permute0xd8_if_avx2(gathered_laneswapped);
+}
+
+HEADER_INLINE VecW vecw_shuffle8(VecW table, VecW indexes) {
+  return VecToW(_mm256_shuffle_epi8(WToVec(table), WToVec(indexes)));
+}
+
+HEADER_INLINE VecU16 vecu16_shuffle8(VecU16 table, VecU16 indexes) {
+  return VecToU16(_mm256_shuffle_epi8(U16ToVec(table), U16ToVec(indexes)));
+}
+
+HEADER_INLINE VecUc vecuc_shuffle8(VecUc table, VecUc indexes) {
+  return VecToUc(_mm256_shuffle_epi8(UcToVec(table), UcToVec(indexes)));
+}
+
+HEADER_INLINE uintptr_t vecw_extract64_0(VecW vv) {
+  return _mm256_extract_epi64(WToVec(vv), 0);
+}
+
+HEADER_INLINE uintptr_t vecw_extract64_1(VecW vv) {
+  return _mm256_extract_epi64(WToVec(vv), 1);
+}
+
+// *** AVX2-only section ***
+HEADER_INLINE uintptr_t vecw_extract64_2(VecW vv) {
+  return _mm256_extract_epi64(WToVec(vv), 2);
+}
+
+HEADER_INLINE uintptr_t vecw_extract64_3(VecW vv) {
+  return _mm256_extract_epi64(WToVec(vv), 3);
+}
+
+// todo: permute
+
+// *** end AVX2-only section ***
+
+#    define kVec8thUintMax UINT32_MAX
+
+typedef uint16_t Vec16thUint;
+typedef uint32_t Vec8thUint;
+typedef uint64_t Vec4thUint;
+
+HEADER_INLINE VecW vecw_load(const void* mem_addr) {
+  return VecToW(_mm256_load_si256(S_CAST(const __m256i*, mem_addr)));
+}
+
+// There may be some value in adding a 4-consecutive-vector load function when
+// addresses are expected to be unaligned: see
+//   https://www.agner.org/optimize/blog/read.php?i=627&v=t
+
+HEADER_INLINE VecW vecw_loadu(const void* mem_addr) {
+  return VecToW(_mm256_loadu_si256(S_CAST(const __m256i*, mem_addr)));
+}
+
+HEADER_INLINE VecU32 vecu32_loadu(const void* mem_addr) {
+  return VecToU32(_mm256_loadu_si256(S_CAST(const __m256i*, mem_addr)));
+}
+
+HEADER_INLINE VecI32 veci32_loadu(const void* mem_addr) {
+  return VecToI32(_mm256_loadu_si256(S_CAST(const __m256i*, mem_addr)));
+}
+
+HEADER_INLINE VecU16 vecu16_loadu(const void* mem_addr) {
+  return VecToU16(_mm256_loadu_si256(S_CAST(const __m256i*, mem_addr)));
+}
+
+HEADER_INLINE VecI16 veci16_loadu(const void* mem_addr) {
+  return VecToI16(_mm256_loadu_si256(S_CAST(const __m256i*, mem_addr)));
+}
+
+HEADER_INLINE VecUc vecuc_loadu(const void* mem_addr) {
+  return VecToUc(_mm256_loadu_si256(S_CAST(const __m256i*, mem_addr)));
+}
+
+HEADER_INLINE VecI8 veci8_loadu(const void* mem_addr) {
+  return VecToI8(_mm256_loadu_si256(S_CAST(const __m256i*, mem_addr)));
+}
+
+HEADER_INLINE void vec_storeu(void* mem_addr, __m256i vv) {
+  _mm256_storeu_si256(S_CAST(__m256i*, mem_addr), vv);
+}
+
+HEADER_INLINE VecI32 veci32_max(VecI32 v1, VecI32 v2) {
+  return VecToI32(_mm256_max_epi32(I32ToVec(v1), I32ToVec(v2)));
+}
+
+HEADER_INLINE VecI16 veci16_max(VecI16 v1, VecI16 v2) {
+  return VecToI16(_mm256_max_epi16(I16ToVec(v1), I16ToVec(v2)));
+}
+
+HEADER_INLINE VecW vecw_sad(VecW v1, VecW v2) {
+  return VecToW(_mm256_sad_epu8(WToVec(v1), WToVec(v2)));
+}
+
+HEADER_INLINE VecUc vecuc_adds(VecUc v1, VecUc v2) {
+  return VecToUc(_mm256_adds_epu8(UcToVec(v1), UcToVec(v2)));
+}
+
+HEADER_INLINE VecU16 vecu16_min8(VecU16 v1, VecU16 v2) {
+  return VecToU16(_mm256_min_epu8(U16ToVec(v1), U16ToVec(v2)));
+}
+
+HEADER_INLINE VecUc vecuc_min(VecUc v1, VecUc v2) {
+  return VecToUc(_mm256_min_epu8(UcToVec(v1), UcToVec(v2)));
+}
+
+HEADER_INLINE VecW vecw_blendv(VecW aa, VecW bb, VecW mask) {
+  return VecToW(_mm256_blendv_epi8(WToVec(aa), WToVec(bb), WToVec(mask)));
+}
+
+HEADER_INLINE VecU32 vecu32_blendv(VecU32 aa, VecU32 bb, VecU32 mask) {
+  return VecToU32(_mm256_blendv_epi8(U32ToVec(aa), U32ToVec(bb), U32ToVec(mask)));
+}
+
+HEADER_INLINE VecU16 vecu16_blendv(VecU16 aa, VecU16 bb, VecU16 mask) {
+  return VecToU16(_mm256_blendv_epi8(U16ToVec(aa), U16ToVec(bb), U16ToVec(mask)));
+}
+
+HEADER_INLINE VecUc vecuc_blendv(VecUc aa, VecUc bb, VecUc mask) {
+  return VecToUc(_mm256_blendv_epi8(UcToVec(aa), UcToVec(bb), UcToVec(mask)));
+}
+
+#  else  // USE_SSE2, !USE_AVX2
+
+CONSTI32(kBytesPerVec, 16);
+typedef uintptr_t VecW __attribute__ ((vector_size (16)));
+typedef uint32_t VecU32 __attribute ((vector_size (16)));
+typedef int32_t VecI32 __attribute ((vector_size (16)));
+typedef unsigned short VecU16 __attribute__ ((vector_size (16)));
+typedef short VecI16 __attribute__ ((vector_size (16)));
+typedef int8_t VecI8 __attribute__ ((vector_size (16)));
+typedef unsigned char VecUc __attribute__ ((vector_size (16)));
+
+HEADER_INLINE VecW VecToW(__m128i vv) {
+  return R_CAST(VecW, vv);
+}
+
+HEADER_INLINE VecU32 VecToU32(__m128i vv) {
+  return R_CAST(VecU32, vv);
+}
+
+HEADER_INLINE VecI32 VecToI32(__m128i vv) {
+  return R_CAST(VecI32, vv);
+}
+
+HEADER_INLINE VecU16 VecToU16(__m128i vv) {
+  return R_CAST(VecU16, vv);
+}
+
+HEADER_INLINE VecI16 VecToI16(__m128i vv) {
+  return R_CAST(VecI16, vv);
+}
+
+HEADER_INLINE VecUc VecToUc(__m128i vv) {
+  return R_CAST(VecUc, vv);
+}
+
+HEADER_INLINE VecI8 VecToI8(__m128i vv) {
+  return R_CAST(VecI8, vv);
+}
+
+HEADER_INLINE __m128i WToVec(VecW vv) {
+  return R_CAST(__m128i, vv);
+}
+
+HEADER_INLINE __m128i U32ToVec(VecU32 vv) {
+  return R_CAST(__m128i, vv);
+}
+
+HEADER_INLINE __m128i I32ToVec(VecI32 vv) {
+  return R_CAST(__m128i, vv);
+}
+
+HEADER_INLINE __m128i U16ToVec(VecU16 vv) {
+  return R_CAST(__m128i, vv);
+}
+
+HEADER_INLINE __m128i I16ToVec(VecI16 vv) {
+  return R_CAST(__m128i, vv);
+}
+
+HEADER_INLINE __m128i UcToVec(VecUc vv) {
+  return R_CAST(__m128i, vv);
+}
+
+HEADER_INLINE __m128i I8ToVec(VecI8 vv) {
+  return R_CAST(__m128i, vv);
+}
+
+#    define VCONST_W(xx) {xx, xx}
+#    define VCONST_S(xx) {xx, xx, xx, xx, xx, xx, xx, xx}
+#    define VCONST_C(xx) {xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx, xx}
+#    define VCONST_UC VCONST_C
+
+HEADER_INLINE VecW vecw_setzero() {
+  return VecToW(_mm_setzero_si128());
+}
+
+HEADER_INLINE VecU32 vecu32_setzero() {
+  return VecToU32(_mm_setzero_si128());
+}
+
+HEADER_INLINE VecU16 vecu16_setzero() {
+  return VecToU16(_mm_setzero_si128());
+}
+
+HEADER_INLINE VecI16 veci16_setzero() {
+  return VecToI16(_mm_setzero_si128());
+}
+
+HEADER_INLINE VecUc vecuc_setzero() {
+  return VecToUc(_mm_setzero_si128());
+}
+
+HEADER_INLINE VecI8 veci8_setzero() {
+  return VecToI8(_mm_setzero_si128());
+}
+
+// simde is incompatible with defining these as inline functions
+#    define vecw_srli(vv, ct) VecToW(_mm_srli_epi64(WToVec(vv), ct))
+
+#    define vecw_slli(vv, ct) VecToW(_mm_slli_epi64(WToVec(vv), ct))
+
+#    define vecu32_srli(vv, ct) VecToU32(_mm_srli_epi32(U32ToVec(vv), ct))
+
+#    define vecu32_slli(vv, ct) VecToU32(_mm_slli_epi32(U32ToVec(vv), ct))
+
+#    define vecu16_srli(vv, ct) VecToU16(_mm_srli_epi16(U16ToVec(vv), ct))
+
+#    define vecu16_slli(vv, ct) VecToU16(_mm_slli_epi16(U16ToVec(vv), ct))
+
+HEADER_INLINE VecW vecw_and_notfirst(VecW excl, VecW main) {
+  return VecToW(_mm_andnot_si128(WToVec(excl), WToVec(main)));
+}
+
+HEADER_INLINE VecU32 vecu32_and_notfirst(VecU32 excl, VecU32 main) {
+  return VecToU32(_mm_andnot_si128(U32ToVec(excl), U32ToVec(main)));
+}
+
+HEADER_INLINE VecI32 veci32_and_notfirst(VecI32 excl, VecI32 main) {
+  return VecToI32(_mm_andnot_si128(I32ToVec(excl), I32ToVec(main)));
+}
+
+HEADER_INLINE VecU16 vecu16_and_notfirst(VecU16 excl, VecU16 main) {
+  return VecToU16(_mm_andnot_si128(U16ToVec(excl), U16ToVec(main)));
+}
+
+HEADER_INLINE VecI16 veci16_and_notfirst(VecI16 excl, VecI16 main) {
+  return VecToI16(_mm_andnot_si128(I16ToVec(excl), I16ToVec(main)));
+}
+
+HEADER_INLINE VecUc vecuc_and_notfirst(VecUc excl, VecUc main) {
+  return VecToUc(_mm_andnot_si128(UcToVec(excl), UcToVec(main)));
+}
+
+HEADER_INLINE VecI8 veci8_and_notfirst(VecI8 excl, VecI8 main) {
+  return VecToI8(_mm_andnot_si128(I8ToVec(excl), I8ToVec(main)));
+}
+
+HEADER_INLINE VecW vecw_set1(uintptr_t ulii) {
+  return VecToW(_mm_set1_epi64x(ulii));
+}
+
+HEADER_INLINE VecU32 vecu32_set1(uint32_t uii) {
+  return VecToU32(_mm_set1_epi32(uii));
+}
+
+HEADER_INLINE VecI32 veci32_set1(int32_t ii) {
+  return VecToI32(_mm_set1_epi32(ii));
+}
+
+HEADER_INLINE VecU16 vecu16_set1(unsigned short usi) {
+  return VecToU16(_mm_set1_epi16(usi));
+}
+
+HEADER_INLINE VecI16 veci16_set1(short si) {
+  return VecToI16(_mm_set1_epi16(si));
+}
+
+HEADER_INLINE VecUc vecuc_set1_epi16(unsigned short usi) {
+  return VecToUc(_mm_set1_epi16(usi));
+}
+
+HEADER_INLINE VecUc vecuc_set1(unsigned char ucc) {
+  return VecToUc(_mm_set1_epi8(ucc));
+}
+
+HEADER_INLINE VecI8 veci8_set1(char cc) {
+  return VecToI8(_mm_set1_epi8(cc));
+}
+
+HEADER_INLINE uint32_t vecw_movemask(VecW vv) {
+  return _mm_movemask_epi8(WToVec(vv));
+}
+
+HEADER_INLINE uint32_t vecu32_movemask(VecU32 vv) {
+  return _mm_movemask_epi8(U32ToVec(vv));
+}
+
+HEADER_INLINE uint32_t veci32_movemask(VecI32 vv) {
+  return _mm_movemask_epi8(I32ToVec(vv));
+}
+
+HEADER_INLINE uint32_t vecu16_movemask(VecU16 vv) {
+  return _mm_movemask_epi8(U16ToVec(vv));
+}
+
+HEADER_INLINE uint32_t veci16_movemask(VecI16 vv) {
+  return _mm_movemask_epi8(I16ToVec(vv));
+}
+
+HEADER_INLINE uint32_t veci8_movemask(VecI8 vv) {
+  return _mm_movemask_epi8(I8ToVec(vv));
+}
+
+HEADER_INLINE uint32_t vecuc_movemask(VecUc vv) {
+  return _mm_movemask_epi8(UcToVec(vv));
+}
+
+CONSTI32(kVec8thUintMax, 65535);
+
+// #    define kVec8thUintMax 65535
+
+typedef unsigned char Vec16thUint;
+typedef uint16_t Vec8thUint;
+typedef uint32_t Vec4thUint;
+
+HEADER_INLINE VecW vecw_load(const void* mem_addr) {
+  return VecToW(_mm_load_si128(S_CAST(const __m128i*, mem_addr)));
+}
+
+HEADER_INLINE VecW vecw_loadu(const void* mem_addr) {
+  return VecToW(_mm_loadu_si128(S_CAST(const __m128i*, mem_addr)));
+}
+
+HEADER_INLINE VecU32 vecu32_loadu(const void* mem_addr) {
+  return VecToU32(_mm_loadu_si128(S_CAST(const __m128i*, mem_addr)));
+}
+
+HEADER_INLINE VecI32 veci32_loadu(const void* mem_addr) {
+  return VecToI32(_mm_loadu_si128(S_CAST(const __m128i*, mem_addr)));
+}
+
+HEADER_INLINE VecU16 vecu16_loadu(const void* mem_addr) {
+  return VecToU16(_mm_loadu_si128(S_CAST(const __m128i*, mem_addr)));
+}
+
+HEADER_INLINE VecI16 veci16_loadu(const void* mem_addr) {
+  return VecToI16(_mm_loadu_si128(S_CAST(const __m128i*, mem_addr)));
+}
+
+HEADER_INLINE VecUc vecuc_loadu(const void* mem_addr) {
+  return VecToUc(_mm_loadu_si128(S_CAST(const __m128i*, mem_addr)));
+}
+
+HEADER_INLINE VecI8 veci8_loadu(const void* mem_addr) {
+  return VecToI8(_mm_loadu_si128(S_CAST(const __m128i*, mem_addr)));
+}
+
+HEADER_INLINE void vec_storeu(void* mem_addr, __m128i vv) {
+  _mm_storeu_si128(S_CAST(__m128i*, mem_addr), vv);
+}
+
+// Repeats arguments in AVX2 case.
+HEADER_INLINE VecW vecw_setr8(char e15, char e14, char e13, char e12, char e11, char e10, char e9, char e8, char e7, char e6, char e5, char e4, char e3, char e2, char e1, char e0) {
+  return VecToW(_mm_setr_epi8(e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0));
+}
+
+HEADER_INLINE VecU16 vecu16_setr8(char e15, char e14, char e13, char e12, char e11, char e10, char e9, char e8, char e7, char e6, char e5, char e4, char e3, char e2, char e1, char e0) {
+  return VecToU16(_mm_setr_epi8(e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0));
+}
+
+HEADER_INLINE VecUc vecuc_setr8(char e15, char e14, char e13, char e12, char e11, char e10, char e9, char e8, char e7, char e6, char e5, char e4, char e3, char e2, char e1, char e0) {
+  return VecToUc(_mm_setr_epi8(e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0));
+}
+
+// Discards last 16 arguments in SSE2/SSE4.2 case.
+HEADER_INLINE VecW vecw_setr8x(
+    char e31, char e30, char e29, char e28,
+    char e27, char e26, char e25, char e24,
+    char e23, char e22, char e21, char e20,
+    char e19, char e18, char e17, char e16,
+    __maybe_unused char e15, __maybe_unused char e14,
+    __maybe_unused char e13, __maybe_unused char e12,
+    __maybe_unused char e11, __maybe_unused char e10,
+    __maybe_unused char e9, __maybe_unused char e8,
+    __maybe_unused char e7, __maybe_unused char e6,
+    __maybe_unused char e5, __maybe_unused char e4,
+    __maybe_unused char e3, __maybe_unused char e2,
+    __maybe_unused char e1, __maybe_unused char e0) {
+  return VecToW(_mm_setr_epi8(e31, e30, e29, e28, e27, e26, e25, e24, e23, e22, e21, e20, e19, e18, e17, e16));
+}
+
+HEADER_INLINE VecUc vecuc_setr8x(
+    char e31, char e30, char e29, char e28,
+    char e27, char e26, char e25, char e24,
+    char e23, char e22, char e21, char e20,
+    char e19, char e18, char e17, char e16,
+    __maybe_unused char e15, __maybe_unused char e14,
+    __maybe_unused char e13, __maybe_unused char e12,
+    __maybe_unused char e11, __maybe_unused char e10,
+    __maybe_unused char e9, __maybe_unused char e8,
+    __maybe_unused char e7, __maybe_unused char e6,
+    __maybe_unused char e5, __maybe_unused char e4,
+    __maybe_unused char e3, __maybe_unused char e2,
+    __maybe_unused char e1, __maybe_unused char e0) {
+  return VecToUc(_mm_setr_epi8(e31, e30, e29, e28, e27, e26, e25, e24, e23, e22, e21, e20, e19, e18, e17, e16));
+}
+
+HEADER_INLINE VecW vecw_setr32(uint32_t e3, uint32_t e2, uint32_t e1, uint32_t e0) {
+  return VecToW(_mm_setr_epi32(e3, e2, e1, e0));
+}
+
+HEADER_INLINE VecW vecw_unpacklo8(VecW evens, VecW odds) {
+  return VecToW(_mm_unpacklo_epi8(WToVec(evens), WToVec(odds)));
+}
+
+HEADER_INLINE VecW vecw_unpackhi8(VecW evens, VecW odds) {
+  return VecToW(_mm_unpackhi_epi8(WToVec(evens), WToVec(odds)));
+}
+
+HEADER_INLINE VecI8 veci8_unpacklo8(VecI8 evens, VecI8 odds) {
+  return VecToI8(_mm_unpacklo_epi8(I8ToVec(evens), I8ToVec(odds)));
+}
+
+HEADER_INLINE VecI8 veci8_unpackhi8(VecI8 evens, VecI8 odds) {
+  return VecToI8(_mm_unpackhi_epi8(I8ToVec(evens), I8ToVec(odds)));
+}
+
+HEADER_INLINE VecUc vecuc_unpacklo8(VecUc evens, VecUc odds) {
+  return VecToUc(_mm_unpacklo_epi8(UcToVec(evens), UcToVec(odds)));
+}
+
+HEADER_INLINE VecUc vecuc_unpackhi8(VecUc evens, VecUc odds) {
+  return VecToUc(_mm_unpackhi_epi8(UcToVec(evens), UcToVec(odds)));
+}
+
+HEADER_INLINE VecW vecw_unpacklo16(VecW evens, VecW odds) {
+  return VecToW(_mm_unpacklo_epi16(WToVec(evens), WToVec(odds)));
+}
+
+HEADER_INLINE VecW vecw_unpackhi16(VecW evens, VecW odds) {
+  return VecToW(_mm_unpackhi_epi16(WToVec(evens), WToVec(odds)));
+}
+
+HEADER_INLINE VecW vecw_unpacklo32(VecW evens, VecW odds) {
+  return VecToW(_mm_unpacklo_epi32(WToVec(evens), WToVec(odds)));
+}
+
+HEADER_INLINE VecW vecw_unpackhi32(VecW evens, VecW odds) {
+  return VecToW(_mm_unpackhi_epi32(WToVec(evens), WToVec(odds)));
+}
+
+HEADER_INLINE VecW vecw_unpacklo64(VecW evens, VecW odds) {
+  return VecToW(_mm_unpacklo_epi64(WToVec(evens), WToVec(odds)));
+}
+
+HEADER_INLINE VecW vecw_unpackhi64(VecW evens, VecW odds) {
+  return VecToW(_mm_unpackhi_epi64(WToVec(evens), WToVec(odds)));
+}
+
+HEADER_INLINE VecW vecw_permute0xd8_if_avx2(VecW vv) {
+  return vv;
+}
+
+HEADER_INLINE VecI8 veci8_permute0xd8_if_avx2(VecI8 vv) {
+  return vv;
+}
+
+HEADER_INLINE VecUc vecuc_permute0xd8_if_avx2(VecUc vv) {
+  return vv;
+}
+
+HEADER_INLINE VecW vecw_gather_even(VecW src_lo, VecW src_hi, VecW m8) {
+  return VecToW(_mm_packus_epi16(WToVec(src_lo & m8), WToVec(src_hi & m8)));
+}
+
+HEADER_INLINE VecUc vecuc_gather_even(VecUc src_lo, VecUc src_hi, VecUc m8) {
+  return VecToUc(_mm_packus_epi16(UcToVec(src_lo & m8), UcToVec(src_hi & m8)));
+}
+
+HEADER_INLINE VecUc vecuc_gather_odd(VecUc src_lo, VecUc src_hi) {
+  return VecToUc(_mm_packus_epi16(_mm_srli_epi16(UcToVec(src_lo), 8), _mm_srli_epi16(UcToVec(src_hi), 8)));
+}
+
+#    ifdef USE_SHUFFLE8
+#      ifdef SIMDE_ARM_NEON_A64V8_NATIVE
+// See simde_mm_shuffle_epi8().
+// In the future, this may need to be written more carefully in the
+// IGNORE_BUNDLED_SIMDE case.  But this is compatible with simde v0.7.x and
+// v0.8.x.
+SIMDE_FUNCTION_ATTRIBUTES simde__m128i _mm_shuffle_epi8(simde__m128i a, simde__m128i b) {
+  simde__m128i_private a_ = simde__m128i_to_private(a);
+  simde__m128i_private b_ = simde__m128i_to_private(b);
+  simde__m128i_private r_;
+  r_.neon_i8 = vqtbl1q_s8(a_.neon_i8, b_.neon_u8);
+  return simde__m128i_from_private(r_);
+}
+#      endif
+HEADER_INLINE VecW vecw_shuffle8(VecW table, VecW indexes) {
+  return VecToW(_mm_shuffle_epi8(WToVec(table), WToVec(indexes)));
+}
+
+HEADER_INLINE VecU16 vecu16_shuffle8(VecU16 table, VecU16 indexes) {
+  return VecToU16(_mm_shuffle_epi8(U16ToVec(table), U16ToVec(indexes)));
+}
+
+HEADER_INLINE VecUc vecuc_shuffle8(VecUc table, VecUc indexes) {
+  return VecToUc(_mm_shuffle_epi8(UcToVec(table), UcToVec(indexes)));
+}
+#    endif
+#    ifdef USE_SSE42
+HEADER_INLINE VecI32 veci32_max(VecI32 v1, VecI32 v2) {
+  return VecToI32(_mm_max_epi32(I32ToVec(v1), I32ToVec(v2)));
+}
+
+HEADER_INLINE uintptr_t vecw_extract64_0(VecW vv) {
+  return _mm_extract_epi64(WToVec(vv), 0);
+}
+
+HEADER_INLINE uintptr_t vecw_extract64_1(VecW vv) {
+  return _mm_extract_epi64(WToVec(vv), 1);
+}
+
+HEADER_INLINE VecW vecw_blendv(VecW aa, VecW bb, VecW mask) {
+  return VecToW(_mm_blendv_epi8(WToVec(aa), WToVec(bb), WToVec(mask)));
+}
+
+HEADER_INLINE VecU32 vecu32_blendv(VecU32 aa, VecU32 bb, VecU32 mask) {
+  return VecToU32(_mm_blendv_epi8(U32ToVec(aa), U32ToVec(bb), U32ToVec(mask)));
+}
+
+HEADER_INLINE VecU16 vecu16_blendv(VecU16 aa, VecU16 bb, VecU16 mask) {
+  return VecToU16(_mm_blendv_epi8(U16ToVec(aa), U16ToVec(bb), U16ToVec(mask)));
+}
+
+HEADER_INLINE VecUc vecuc_blendv(VecUc aa, VecUc bb, VecUc mask) {
+  return VecToUc(_mm_blendv_epi8(UcToVec(aa), UcToVec(bb), UcToVec(mask)));
+}
+#    else // USE_SSE2, !USE_SSE42
+HEADER_INLINE uintptr_t vecw_extract64_0(VecW vv) {
+  return R_CAST(uintptr_t, _mm_movepi64_pi64(WToVec(vv)));
+}
+
+// compiler recognizes this on ARMv8
+HEADER_INLINE uintptr_t vecw_extract64_1(VecW vv) {
+  const __m128i v0 = _mm_srli_si128(WToVec(vv), 8);
+  return R_CAST(uintptr_t, _mm_movepi64_pi64(v0));
+}
+
+// N.B. we do *not* enforce the low bits of each mask byte matching the high
+// bit.
+HEADER_INLINE VecW vecw_blendv(VecW aa, VecW bb, VecW mask) {
+  return vecw_and_notfirst(mask, aa) | (mask & bb);
+}
+
+HEADER_INLINE VecU32 vecu32_blendv(VecU32 aa, VecU32 bb, VecU32 mask) {
+  return vecu32_and_notfirst(mask, aa) | (mask & bb);
+}
+
+HEADER_INLINE VecU16 vecu16_blendv(VecU16 aa, VecU16 bb, VecU16 mask) {
+  return vecu16_and_notfirst(mask, aa) | (mask & bb);
+}
+
+HEADER_INLINE VecUc vecuc_blendv(VecUc aa, VecUc bb, VecUc mask) {
+  return vecuc_and_notfirst(mask, aa) | (mask & bb);
+}
+#    endif
+
+HEADER_INLINE VecI16 veci16_max(VecI16 v1, VecI16 v2) {
+  return VecToI16(_mm_max_epi16(I16ToVec(v1), I16ToVec(v2)));
+}
+
+HEADER_INLINE VecW vecw_sad(VecW v1, VecW v2) {
+  return VecToW(_mm_sad_epu8(WToVec(v1), WToVec(v2)));
+}
+
+HEADER_INLINE VecUc vecuc_adds(VecUc v1, VecUc v2) {
+  return VecToUc(_mm_adds_epu8(UcToVec(v1), UcToVec(v2)));
+}
+
+HEADER_INLINE VecU16 vecu16_min8(VecU16 v1, VecU16 v2) {
+  return VecToU16(_mm_min_epu8(U16ToVec(v1), U16ToVec(v2)));
+}
+
+HEADER_INLINE VecUc vecuc_min(VecUc v1, VecUc v2) {
+  return VecToUc(_mm_min_epu8(UcToVec(v1), UcToVec(v2)));
+}
+#  endif  // USE_SSE2, !USE_AVX2
+
+HEADER_INLINE void vecw_storeu(void* mem_addr, VecW vv) {
+  vec_storeu(mem_addr, WToVec(vv));
+}
+
+HEADER_INLINE void vecu32_storeu(void* mem_addr, VecU32 vv) {
+  vec_storeu(mem_addr, U32ToVec(vv));
+}
+
+HEADER_INLINE void veci32_storeu(void* mem_addr, VecI32 vv) {
+  vec_storeu(mem_addr, I32ToVec(vv));
+}
+
+HEADER_INLINE void vecu16_storeu(void* mem_addr, VecU16 vv) {
+  vec_storeu(mem_addr, U16ToVec(vv));
+}
+
+HEADER_INLINE void veci16_storeu(void* mem_addr, VecI16 vv) {
+  vec_storeu(mem_addr, I16ToVec(vv));
+}
+
+HEADER_INLINE void vecuc_storeu(void* mem_addr, VecUc vv) {
+  vec_storeu(mem_addr, UcToVec(vv));
+}
+
+HEADER_INLINE VecW vecw_bytesum(VecW src, VecW m0) {
+  return vecw_sad(src, m0);
+}
+
+CONSTI32(kVec8thUintPerWord, sizeof(intptr_t) / sizeof(Vec8thUint));
+
+#  ifdef FVEC_32
+
+#    ifndef __FMA__
+#      error "32-byte-float-vector builds require FMA3 as well."
+#    endif
+
+CONSTI32(kBytesPerFVec, 32);
+CONSTI32(kBytesPerDVec, 32);
+typedef float VecF __attribute__ ((vector_size (32)));
+typedef double VecD __attribute__ ((vector_size (32)));
+
+#    define VCONST_F(xx) {xx, xx, xx, xx, xx, xx, xx, xx}
+#    define VCONST_D(xx) {xx, xx, xx, xx}
+
+HEADER_INLINE VecF VecToF(__m256 xxv) {
+  return R_CAST(VecF, xxv);
+}
+
+HEADER_INLINE VecD VecToD(__m256d xxv) {
+  return R_CAST(VecD, xxv);
+}
+
+HEADER_INLINE __m256 FToVec(VecF xxv) {
+  return R_CAST(__m256, xxv);
+}
+
+HEADER_INLINE __m256d DToVec(VecD xxv) {
+  return R_CAST(__m256d, xxv);
+}
+
+HEADER_INLINE VecF vecf_setzero() {
+  return VecToF(_mm256_setzero_ps());
+}
+
+HEADER_INLINE VecD vecd_setzero() {
+  return VecToD(_mm256_setzero_pd());
+}
+
+#  else  // !FVEC_32
+
+CONSTI32(kBytesPerFVec, 16);
+CONSTI32(kBytesPerDVec, 16);
+typedef float VecF __attribute__ ((vector_size (16)));
+typedef double VecD __attribute__ ((vector_size (16)));
+
+#    define VCONST_F(xx) {xx, xx, xx, xx}
+#    define VCONST_D(xx) {xx, xx}
+
+HEADER_INLINE VecF VecToF(__m128 xxv) {
+  return R_CAST(VecF, xxv);
+}
+
+HEADER_INLINE VecD VecToD(__m128d xxv) {
+  return R_CAST(VecD, xxv);
+}
+
+HEADER_INLINE __m128 FToVec(VecF xxv) {
+  return R_CAST(__m128, xxv);
+}
+
+HEADER_INLINE __m128d DToVec(VecD xxv) {
+  return R_CAST(__m128d, xxv);
+}
+
+HEADER_INLINE VecF vecf_setzero() {
+  return VecToF(_mm_setzero_ps());
+}
+
+HEADER_INLINE VecD vecd_setzero() {
+  return VecToD(_mm_setzero_pd());
+}
+
+#  endif  // !FVEC_32
+
+HEADER_INLINE VecUc VecWToUc(VecW vv) {
+  return R_CAST(VecUc, vv);
+}
+
+HEADER_INLINE VecW VecU16ToW(VecU16 vv) {
+  return R_CAST(VecW, vv);
+}
+
+HEADER_INLINE VecW VecUcToW(VecUc vv) {
+  return R_CAST(VecW, vv);
+}
+
+HEADER_INLINE void vecw_lo_and_hi_nybbles(VecW cur_vec, VecW m4, VecW* vec_lo_ptr, VecW* vec_hi_ptr) {
+  // Assumes m4 is VCONST_W(kMask0F0F).
+  // Returned vec_lo and vec_hi have top nybble of each byte zeroed out.
+  cur_vec = vecw_permute0xd8_if_avx2(cur_vec);
+  // AVX2:
+  //   vec_even contains {0, 2, 4, ..., 14, 32, 34, ..., 46,
+  //                      16, 18, ..., 30, 48, ... 62}
+  //   vec_odd contains {1, 3, 5, ..., 15, 33, 35, ..., 47,
+  //                     17, 19, ..., 31, 49, ..., 63}
+  // SSE2:
+  //   vec_even contains {0, 2, 4, ..., 30}
+  //   vec_odd contains {1, 3, 5, ..., 31}
+  const VecW vec_even = cur_vec & m4;
+  const VecW vec_odd = vecw_srli(cur_vec, 4) & m4;
+
+  // AVX2:
+  //   vec_lo contains {0, 1, 2, ..., 31}
+  //   vec_hi contains {32, 33, 34, ..., 63}
+  // SSE2:
+  //   vec_lo contains {0, 1, 2, ..., 15}
+  //   vec_hi contains {16, 17, 18, ..., 31}
+  *vec_lo_ptr = vecw_unpacklo8(vec_even, vec_odd);
+  *vec_hi_ptr = vecw_unpackhi8(vec_even, vec_odd);
+}
+#else  // !USE_SSE2
+#  ifdef __LP64__
+CONSTI32(kBytesPerVec, 8);
+#  else
+CONSTI32(kBytesPerVec, 4);
+#  endif
+CONSTI32(kBytesPerFVec, 4);
+CONSTI32(kBytesPerDVec, 8);
+
+typedef uintptr_t VecW;
+typedef uint32_t VecU32;
+typedef float VecF;
+typedef double VecD;
+// VecI16 and VecI8 aren't worth the trouble of scaling down to 32-bit
+
+#  define VCONST_W(xx) (xx)
+
+HEADER_INLINE VecW vecw_setzero() {
+  return k0LU;
+}
+
+HEADER_INLINE VecW vecw_srli(VecW vv, uint32_t ct) {
+  return vv >> ct;
+}
+
+HEADER_INLINE VecW vecw_slli(VecW vv, uint32_t ct) {
+  return vv << ct;
+}
+
+HEADER_INLINE VecW vecw_set1(uintptr_t ulii) {
+  return ulii;
+}
+
+HEADER_INLINE VecW vecw_loadu(const void* mem_addr) {
+  return *S_CAST(const VecW*, mem_addr);
+}
+
+#  ifdef __LP64__
+HEADER_INLINE VecW vecw_bytesum(VecW src, __maybe_unused VecW m0) {
+  src = (src & 0x00ff00ff00ff00ffLLU) + ((src >> 8) & 0x00ff00ff00ff00ffLLU);
+  return (src * 0x1000100010001LLU) >> 48;
+}
+#  else
+HEADER_INLINE VecW vecw_bytesum(VecW src, __maybe_unused VecW m0) {
+  src = (src & 0x00ff00ff) + ((src >> 8) & 0x00ff00ff);
+  return (src & 0xffff) + (src >> 16);
+}
+#  endif
+
+HEADER_INLINE VecW vecw_and_notfirst(VecW excl, VecW main) {
+  return (~excl) & main;
+}
+
+HEADER_INLINE VecU32 vecu32_and_notfirst(VecU32 excl, VecU32 main) {
+  return (~excl) & main;
+}
+#endif  // !USE_SSE2
+
+HEADER_INLINE uint32_t* I32ToU32(int32_t* pp) {
+  return R_CAST(uint32_t*, pp);
+}
+
+// Unfortunately, we need to spell out S_CAST(uintptr_t, 0) instead of just
+// typing k0LU in C99.
+static const uintptr_t kMask5555 = (~S_CAST(uintptr_t, 0)) / 3;
+static const uintptr_t kMaskAAAA = ((~S_CAST(uintptr_t, 0)) / 3) * 2;
+static const uintptr_t kMask3333 = (~S_CAST(uintptr_t, 0)) / 5;
+static const uintptr_t kMask1111 = (~S_CAST(uintptr_t, 0)) / 15;
+static const uintptr_t kMask0F0F = (~S_CAST(uintptr_t, 0)) / 17;
+static const uintptr_t kMask0101 = (~S_CAST(uintptr_t, 0)) / 255;
+static const uintptr_t kMask00FF = (~S_CAST(uintptr_t, 0)) / 257;
+static const uintptr_t kMask0001 = (~S_CAST(uintptr_t, 0)) / 65535;
+static const uintptr_t kMask0000FFFF = (~S_CAST(uintptr_t, 0)) / 65537;
+static const uintptr_t kMask00000001 = (~S_CAST(uintptr_t, 0)) / 4294967295U;
+
+static const uintptr_t kMask000000FF = (~S_CAST(uintptr_t, 0)) / 16843009;
+static const uintptr_t kMask000F = (~S_CAST(uintptr_t, 0)) / 4369;
+static const uintptr_t kMask0303 = (~S_CAST(uintptr_t, 0)) / 85;
+
+CONSTI32(kBitsPerVec, kBytesPerVec * CHAR_BIT);
+
+// We now use Knuth's Nyp/Nybble vocabulary for 2-bit and 4-bit elements,
+// respectively.
+CONSTI32(kNypsPerVec, kBytesPerVec * 4);
+CONSTI32(kNybblesPerVec, kBytesPerVec * 2);
+
+CONSTI32(kBitsPerWordD2, kBitsPerWord / 2);
+CONSTI32(kBitsPerWordD4, kBitsPerWord / 4);
+
+// number of bytes in a word
+CONSTI32(kBytesPerWord, kBitsPerWord / CHAR_BIT);
+
+CONSTI32(kInt16PerWord, kBytesPerWord / 2);
+
+static_assert(CHAR_BIT == 8, "plink2_base requires CHAR_BIT == 8.");
+static_assert(sizeof(int8_t) == 1, "plink2_base requires sizeof(int8_t) == 1.");
+static_assert(sizeof(int16_t) == 2, "plink2_base requires sizeof(int16_t) == 2.");
+static_assert(sizeof(int32_t) == 4, "plink2_base requires sizeof(int32_t) == 4.");
+static_assert(sizeof(int) >= 4, "plink2_base requires sizeof(int) >= 4.");
+static_assert(sizeof(intptr_t) == kBytesPerWord, "plink2_base requires sizeof(intptr_t) == kBytesPerWord.");
+static_assert(sizeof(int64_t) == 8, "plink2_base requires sizeof(int64_t) == 8.");
+
+CONSTI32(kWordsPerVec, kBytesPerVec / kBytesPerWord);
+CONSTI32(kInt32PerVec, kBytesPerVec / 4);
+CONSTI32(kInt16PerVec, kBytesPerVec / 2);
+
+CONSTI32(kFloatPerFVec, kBytesPerFVec / 4);
+CONSTI32(kDoublePerDVec, kBytesPerDVec / 8);
+
+#if defined(__APPLE__) && defined(__LP64__) && !defined(__x86_64__)
+// TODO: make this 128 once that stops breaking code
+#  define CACHELINE128
+CONSTI32(kCacheline, 128);
+#else
+#  define CACHELINE64
+CONSTI32(kCacheline, 64);
+#endif
+
+CONSTI32(kBitsPerCacheline, kCacheline * CHAR_BIT);
+CONSTI32(kNypsPerCacheline, kCacheline * 4);
+CONSTI32(kInt16PerCacheline, kCacheline / sizeof(int16_t));
+CONSTI32(kInt32PerCacheline, kCacheline / sizeof(int32_t));
+CONSTI32(kInt64PerCacheline, kCacheline / sizeof(int64_t));
+CONSTI32(kWordsPerCacheline, kCacheline / kBytesPerWord);
+CONSTI32(kDoublesPerCacheline, kCacheline / sizeof(double));
+CONSTI32(kVecsPerCacheline, kCacheline / kBytesPerVec);
+
+// could use ioctl, etc. to dynamically determine this later, and pass it as a
+// parameter to e.g. PgfiMultiread()
+CONSTI32(kDiskBlockSize, 4096);
+
+CONSTI32(kPglFwriteBlockSize, 131072);
+
+// unsafe to fread or fwrite more bytes than this on e.g. OS X
+CONSTI32(kMaxBytesPerIO, 0x7ffff000);
+
+// Maximum size of "dynamically" allocated line load buffer.  (This is the
+// limit that applies to .vcf and similar files.)  Inconvenient to go higher
+// since fgets() takes a int32_t size argument.
+#if defined(__APPLE__) && defined(__LP64__) && !defined(__x86_64__)
+CONSTI32(kMaxLongLine, 0x7fffff80);
+#else
+CONSTI32(kMaxLongLine, 0x7fffffc0);
+#endif
+static_assert(!(kMaxLongLine % kCacheline), "kMaxLongLine must be a multiple of kCacheline.");
+
+#ifdef __APPLE__
+// OS X is limited to 256?
+CONSTI32(kMaxOpenFiles, 252);
+#else
+// Can't assume more than 512 are allowed on Windows, with current compilation
+// settings.
+CONSTI32(kMaxOpenFiles, 504);
+#endif
+
+// note that this is NOT foolproof: see e.g.
+// http://insanecoding.blogspot.com/2007/11/pathmax-simply-isnt.html .  (This
+// is why I haven't bothered with OS-based #ifdefs here.)  But it should be
+// good enough in practice.  And PATH_MAX itself is still relevant due to use
+// of realpath().
+CONSTI32(kPglFnamesize, 4096);
+#if defined(PATH_MAX) && !defined(_WIN32)
+static_assert(kPglFnamesize >= PATH_MAX, "plink2_base assumes PATH_MAX <= 4096.  (Safe to increase kPglFnamesize to address this, up to 131072.)");
+#endif
+
+// safe errstr_buf size for PgenInitPhase{1,2}(), PgrValidate(),
+// BitmapReaderInitPhase{1,2}()
+CONSTI32(kPglErrstrBufBlen, kPglFnamesize + 256);
+
+// shared between .pgen and plink-bitmap formats
+// currently must be power of 2, and multiple of (kBitsPerWord / 2)
+CONSTI32(kPglDifflistGroupSize, 64);
+
+// debug
+HEADER_INLINE void PrintVec(const void* vv) {
+  const unsigned char* vv_alias = S_CAST(const unsigned char*, vv);
+  for (uint32_t uii = 0; uii != kBytesPerVec; ++uii) {
+    printf("%u ", vv_alias[uii]);
+  }
+  printf("\n");
+}
+
+HEADER_INLINE void PrintVecD(const VecD* vv_ptr, const char* preprint) {
+  fputs(preprint, stdout);
+  const double* vv_alias = R_CAST(const double*, vv_ptr);
+  for (uint32_t uii = 0; uii != kDoublePerDVec; ++uii) {
+    printf(" %g", vv_alias[uii]);
+  }
+  fputs("\n", stdout);
+}
+
+#if __cplusplus >= 201103L
+// Main application of std::array in this codebase is enforcing length when
+// passing references between functions.  Conversely, if the array type has
+// different lengths in different functions (e.g. col_skips[]/col_types[]), we
+// actively want to avoid &arr[0] clutter.
+// When neither applies, it doesn't really matter whether we use this or not;
+// I normally won't use it unless it plausibly makes sense to pass
+// fixed-length-array-references in the future.
+#  define STD_ARRAY_DECL(tt, nn, vv) std::array<tt, nn> vv
+#  define STD_ARRAY_REF(tt, nn) std::array<tt, nn>&
+
+// necessary if tt is a pointer type, otherwise optional
+#  define STD_ARRAY_KREF(tt, nn) const std::array<tt, nn>&
+
+#  define STD_ARRAY_COPY(src, nn, dst) static_assert(sizeof(dst) == sizeof((dst)[0]) * nn, "Invalid STD_ARRAY_COPY() invocation."); (dst) = (src)
+
+#  define STD_ARRAY_PTR_TYPE(tt, nn) std::array<tt, nn>*
+#  define STD_ARRAY_PTR_DECL(tt, nn, vv) std::array<tt, nn>* vv
+
+// argh, need double-braces for C++11 std::array and single-braces for C
+#  define STD_ARRAY_INIT_START() {
+#  define STD_ARRAY_INIT_END() }
+
+template <class T, std::size_t N> void STD_ARRAY_FILL0(std::array<T, N>& arr) {
+  arr.fill(0);
+}
+
+// plain STD_ARRAY_FILL0() can't be used on array-references due to fallback
+// code.
+// this macro ensures that we *only* use it with uint32_t array-references
+#  define STD_ARRAY_REF_FILL0(ct, aref) static_assert(ct * sizeof(aref[0]) == sizeof(aref), "invalid STD_ARRAY_REF_FILL0() invocation"); aref.fill(0)
+
+#  define NONCOPYABLE(struct_name) \
+  struct_name() = default; \
+  struct_name(const struct_name&) = delete; \
+  struct_name& operator=(const struct_name&) = delete
+
+#  define MOVABLE_BUT_NONCOPYABLE(struct_name) \
+  struct_name() = default; \
+  struct_name(const struct_name&) = delete; \
+  struct_name& operator=(const struct_name&) = delete; \
+  struct_name(struct_name&&) = default; \
+  struct_name& operator=(struct_name&&) = default
+
+#else
+#  define STD_ARRAY_DECL(tt, nn, vv) tt vv[nn]
+#  define STD_ARRAY_REF(tt, nn) tt* const
+#  define STD_ARRAY_KREF(tt, nn) tt const* const
+#  define STD_ARRAY_COPY(src, nn, dst) memcpy(dst, src, nn * sizeof(dst[0]));
+#  define STD_ARRAY_PTR_TYPE(tt, nn) tt(*)[nn]
+#  define STD_ARRAY_PTR_DECL(tt, nn, vv) tt(*vv)[nn]
+#  define STD_ARRAY_INIT_START()
+#  define STD_ARRAY_INIT_END()
+#  define STD_ARRAY_FILL0(arr) memset(arr, 0, sizeof(arr))
+#  define STD_ARRAY_REF_FILL0(ct, aref) memset(aref, 0, ct * sizeof(*aref))
+
+#  define NONCOPYABLE(struct_name)
+#  define MOVABLE_BUT_NONCOPYABLE(struct_name)
+#endif
+
+typedef union {
+  VecW vw;
+
+  STD_ARRAY_DECL(uintptr_t, kWordsPerVec, w);
+
+  STD_ARRAY_DECL(uint32_t, kInt32PerVec, u32);
+} UniVec;
+
+typedef union {
+  VecF vf;
+  STD_ARRAY_DECL(float, kFloatPerFVec, f4);
+} UniVecF;
+
+typedef union {
+  VecD vd;
+  STD_ARRAY_DECL(double, kDoublePerDVec, d8);
+} UniVecD;
+
+// sum must fit in 16 bits
+HEADER_INLINE uintptr_t UniVecHsum16(UniVec uv) {
+#ifdef __LP64__
+#  ifdef USE_AVX2
+  return ((uv.w[0] + uv.w[1] + uv.w[2] + uv.w[3]) * kMask0001) >> 48;
+#  else
+  return ((uv.w[0] + uv.w[1]) * kMask0001) >> 48;
+#  endif
+#else
+  return (uv.w[0] * kMask0001) >> 16;
+#endif
+}
+
+// sum must fit in 32 bits
+HEADER_INLINE uintptr_t UniVecHsum32(UniVec uv) {
+#ifdef __LP64__
+#  ifdef USE_AVX2
+  return ((uv.w[0] + uv.w[1] + uv.w[2] + uv.w[3]) * kMask00000001) >> 32;
+#  else
+  return ((uv.w[0] + uv.w[1]) * kMask00000001) >> 32;
+#  endif
+#else
+  return uv.w[0];
+#endif
+}
+
+HEADER_INLINE float VecFHsum(VecF vecf) {
+  UniVecF uvf;
+  uvf.vf = vecf;
+#ifdef __LP64__
+#  ifdef FVEC_32
+  // tested various uses of _mm256_hadd_ps, couldn't get them to be faster
+  return uvf.f4[0] + uvf.f4[1] + uvf.f4[2] + uvf.f4[3] + uvf.f4[4] + uvf.f4[5] + uvf.f4[6] + uvf.f4[7];
+#  else
+  return uvf.f4[0] + uvf.f4[1] + uvf.f4[2] + uvf.f4[3];
+#  endif
+#else
+  return uvf.f4[0];
+#endif
+}
+
+HEADER_INLINE double VecDHsum(VecD vecd) {
+  UniVecD uvd;
+  uvd.vd = vecd;
+#ifdef __LP64__
+#  ifdef FVEC_32
+  return uvd.d8[0] + uvd.d8[1] + uvd.d8[2] + uvd.d8[3];
+#  else
+  return uvd.d8[0] + uvd.d8[1];
+#  endif
+#else
+  return uvd.d8[0];
+#endif
+}
+
+#ifdef USE_AVX2
+HEADER_INLINE uintptr_t UnpackHalfwordToWord(uintptr_t hw) {
+  return _pdep_u64(hw, kMask5555);
+}
+
+HEADER_INLINE uintptr_t UnpackHalfwordToWordShift1(uintptr_t hw) {
+  return _pdep_u64(hw, kMaskAAAA);
+}
+
+HEADER_INLINE Vec4thUint UnpackVec8thUintTo4th(Vec8thUint hw) {
+  return _pdep_u64(hw, kMask5555);
+}
+
+HEADER_INLINE Halfword PackWordToHalfword(uintptr_t ww) {
+  return _pext_u64(ww, kMask5555);
+}
+
+HEADER_INLINE Halfword PackWordToHalfwordMask5555(uintptr_t ww) {
+  return _pext_u64(ww, kMask5555);
+}
+
+HEADER_INLINE Halfword PackWordToHalfwordMaskAAAA(uintptr_t ww) {
+  return _pext_u64(ww, kMaskAAAA);
+}
+
+HEADER_INLINE uintptr_t PackTwo5555Mask(uintptr_t lo, uintptr_t hi) {
+  const Halfword lo_packed = PackWordToHalfwordMask5555(lo);
+  const uintptr_t hi_packed = _pext_u64(hi, kMask5555);
+  return lo_packed | (hi_packed << kBitsPerWordD2);
+}
+
+HEADER_INLINE Vec8thUint PackVec4thUintTo8th(Vec4thUint ww) {
+  return _pext_u64(ww, kMask5555);
+}
+
+HEADER_INLINE Vec16thUint PackVec8thUintTo16th(Vec8thUint ww) {
+  return _pext_u64(ww, kMask5555);
+}
+
+HEADER_INLINE Halfword Pack3333(uintptr_t ww) {
+  return _pext_u64(ww, kMask3333);
+}
+
+HEADER_INLINE Halfword Pack3333Mask(uintptr_t ww) {
+  return _pext_u64(ww, kMask3333);
+}
+
+HEADER_INLINE uintptr_t PackTwo3333Mask(uintptr_t lo, uintptr_t hi) {
+  const Halfword lo_packed = Pack3333Mask(lo);
+  const uintptr_t hi_packed = _pext_u64(hi, kMask3333);
+  return lo_packed | (hi_packed << kBitsPerWordD2);
+}
+
+HEADER_INLINE uintptr_t Unpack0F0F(uintptr_t hw) {
+  return _pdep_u64(hw, kMask0F0F);
+}
+
+HEADER_INLINE Halfword Pack0F0F(uintptr_t ww) {
+  return _pext_u64(ww, kMask0F0F);
+}
+
+HEADER_INLINE Halfword Pack0F0FMask(uintptr_t ww) {
+  return _pext_u64(ww, kMask0F0F);
+}
+
+HEADER_INLINE uintptr_t PackTwo0F0F(uintptr_t lo, uintptr_t hi) {
+  const Halfword lo_packed = _pext_u64(lo, kMask0F0F);
+  const uintptr_t hi_packed = _pext_u64(hi, kMask0F0F);
+  return lo_packed | (hi_packed << kBitsPerWordD2);
+}
+
+HEADER_INLINE uintptr_t PackTwo0F0FMask(uintptr_t lo, uintptr_t hi) {
+  return PackTwo0F0F(lo, hi);
+}
+
+HEADER_INLINE uintptr_t Unpack0303(uintptr_t qw) {
+  return _pdep_u64(qw, kMask0303);
+}
+
+HEADER_INLINE Quarterword Pack0303(uintptr_t ww) {
+  return _pext_u64(ww, kMask0303);
+}
+
+HEADER_INLINE Quarterword Pack0303Mask(uintptr_t ww) {
+  return _pext_u64(ww, kMask0303);
+}
+
+// See https://stackoverflow.com/questions/21622212/how-to-perform-the-inverse-of-mm256-movemask-epi8-vpmovmskb .
+HEADER_INLINE VecUc InverseMovemaskFF(Vec8thUint mask) {
+  __m256i vmask = _mm256_set1_epi32(mask);
+  const __m256i byte_gather = _mm256_setr_epi64x(0, kMask0101, 2 * kMask0101, 3 * kMask0101);
+  vmask = _mm256_shuffle_epi8(vmask, byte_gather);
+  const __m256i bit_mask = _mm256_set1_epi64x(0x7fbfdfeff7fbfdfeLL);
+  vmask = _mm256_or_si256(vmask, bit_mask);
+  return R_CAST(VecUc, _mm256_cmpeq_epi8(vmask, _mm256_set1_epi64x(-1)));
+}
+
+// If we're only interested in the even bits of mask.  No need to mask out odd
+// bits before calling.
+HEADER_INLINE VecUc InverseMovespreadmaskFF(Vec4thUint mask) {
+  __m256i vmask = _mm256_set1_epi64x(mask);
+  const __m256i byte_gather = _mm256_setr_epi32(0, 0x01010101, 0x02020202, 0x03030303, 0x04040404, 0x05050505, 0x06060606, 0x07070707);
+  vmask = _mm256_shuffle_epi8(vmask, byte_gather);
+  const __m256i bit_mask = _mm256_set1_epi32(0xbfeffbfeU);
+  vmask = _mm256_or_si256(vmask, bit_mask);
+  return R_CAST(VecUc, _mm256_cmpeq_epi8(vmask, _mm256_set1_epi64x(-1)));
+}
+
+#else  // !USE_AVX2
+HEADER_INLINE uintptr_t UnpackHalfwordToWord(uintptr_t hw) {
+#  ifdef __LP64__
+  hw = (hw | (hw << 16)) & kMask0000FFFF;
+#  endif
+  hw = (hw | (hw << 8)) & kMask00FF;
+  hw = (hw | (hw << 4)) & kMask0F0F;
+  hw = (hw | (hw << 2)) & kMask3333;
+  return ((hw | (hw << 1)) & kMask5555);
+}
+
+HEADER_INLINE uintptr_t UnpackHalfwordToWordShift1(uintptr_t hw) {
+  return UnpackHalfwordToWord(hw) << 1;
+}
+
+HEADER_INLINE Halfword PackWordToHalfword(uintptr_t ww) {
+  // assumes only even bits of ww can be set
+  ww = (ww | (ww >> 1)) & kMask3333;
+  ww = (ww | (ww >> 2)) & kMask0F0F;
+  ww = (ww | (ww >> 4)) & kMask00FF;
+#  ifdef __LP64__
+  ww = (ww | (ww >> 8)) & kMask0000FFFF;
+#  endif
+  return S_CAST(Halfword, ww | (ww >> kBitsPerWordD4));
+}
+
+HEADER_INLINE Halfword PackWordToHalfwordMask5555(uintptr_t ww) {
+  return PackWordToHalfword(ww & kMask5555);
+}
+
+HEADER_INLINE Halfword PackWordToHalfwordMaskAAAA(uintptr_t ww) {
+  return PackWordToHalfword((ww >> 1) & kMask5555);
+}
+
+HEADER_INLINE uintptr_t PackTwo5555Mask(uintptr_t lo, uintptr_t hi) {
+  const Halfword lo_packed = PackWordToHalfwordMask5555(lo);
+
+  // Avoid Halfword cast here.
+  hi = hi & kMask5555;
+  hi = (hi | (hi >> 1)) & kMask3333;
+  hi = (hi | (hi >> 2)) & kMask0F0F;
+  hi = (hi | (hi >> 4)) & kMask00FF;
+#  ifdef __LP64__
+  hi = (hi | (hi >> 8)) & kMask0000FFFF;
+#  endif
+  const uintptr_t hi_packed = hi | (hi >> kBitsPerWordD4);
+  return lo_packed | (hi_packed << kBitsPerWordD2);
+}
+
+HEADER_INLINE Halfword Pack3333(uintptr_t ww) {
+  ww = (ww | (ww >> 2)) & kMask0F0F;
+  ww = (ww | (ww >> 4)) & kMask00FF;
+#  ifdef __LP64__
+  ww = (ww | (ww >> 8)) & kMask0000FFFF;
+#  endif
+  return S_CAST(Halfword, ww | (ww >> kBitsPerWordD4));
+}
+
+HEADER_INLINE Halfword Pack3333Mask(uintptr_t ww) {
+  return Pack3333(ww & kMask3333);
+}
+
+HEADER_INLINE uintptr_t PackTwo3333Mask(uintptr_t lo, uintptr_t hi) {
+  const Halfword lo_packed = Pack3333Mask(lo);
+
+  // Avoid Halfword cast here.
+  hi = hi & kMask3333;
+  hi = (hi | (hi >> 2)) & kMask0F0F;
+  hi = (hi | (hi >> 4)) & kMask00FF;
+#  ifdef __LP64__
+  hi = (hi | (hi >> 8)) & kMask0000FFFF;
+#  endif
+  const uintptr_t hi_packed = hi | (hi >> kBitsPerWordD4);
+  return lo_packed | (hi_packed << kBitsPerWordD2);
+}
+
+HEADER_INLINE uintptr_t Unpack0F0F(uintptr_t hw) {
+#  ifdef __LP64__
+  hw = (hw | (hw << 16)) & kMask0000FFFF;
+#  endif
+  hw = (hw | (hw << 8)) & kMask00FF;
+  return ((hw | (hw << 4)) & kMask0F0F);
+}
+
+HEADER_INLINE Halfword Pack0F0F(uintptr_t ww) {
+  ww = (ww | (ww >> 4)) & kMask00FF;
+#  ifdef __LP64__
+  ww = (ww | (ww >> 8)) & kMask0000FFFF;
+#  endif
+  return S_CAST(Halfword, ww | (ww >> kBitsPerWordD4));
+}
+
+HEADER_INLINE Halfword Pack0F0FMask(uintptr_t ww) {
+  return Pack0F0F(ww & kMask0F0F);
+}
+
+HEADER_INLINE uintptr_t PackTwo0F0F(uintptr_t lo, uintptr_t hi) {
+  const Halfword lo_packed = Pack0F0F(lo);
+
+  // Avoid Halfword cast here.
+  hi = (hi | (hi >> 4)) & kMask00FF;
+#  ifdef __LP64__
+  hi = (hi | (hi >> 8)) & kMask0000FFFF;
+#  endif
+  const uintptr_t hi_packed = hi | (hi >> kBitsPerWordD4);
+  return lo_packed | (hi_packed << kBitsPerWordD2);
+}
+
+HEADER_INLINE uintptr_t PackTwo0F0FMask(uintptr_t lo, uintptr_t hi) {
+  const Halfword lo_packed = Pack0F0FMask(lo);
+
+  // Avoid Halfword cast here.
+  hi = hi & kMask0F0F;
+  hi = (hi | (hi >> 4)) & kMask00FF;
+#  ifdef __LP64__
+  hi = (hi | (hi >> 8)) & kMask0000FFFF;
+#  endif
+  const uintptr_t hi_packed = hi | (hi >> kBitsPerWordD4);
+  return lo_packed | (hi_packed << kBitsPerWordD2);
+}
+
+
+HEADER_INLINE uintptr_t Unpack0303(uintptr_t qw) {
+  // ................................................fedcba9876543210
+#  ifdef __LP64__
+  qw = (qw | (qw << 24)) & kMask000000FF;
+  // ........................fedcba98........................76543210
+#  endif
+  qw = qw | (qw << 12);
+  // ............fedcba98....fedcba98............76543210....76543210
+
+  qw = qw | (qw << 6);
+  // ......fedcbaXXdcbaXXdcbaXXdcba98......765432XX5432XX5432XX543210
+
+  return (qw & kMask0303);
+  // ......fe......dc......ba......98......76......54......32......10
+}
+
+HEADER_INLINE Quarterword Pack0303(uintptr_t ww) {
+  // ......fe......dc......ba......98......76......54......32......10
+
+  ww = ww | (ww >> 6);
+  // ......fe....fedc....dcba....ba98....9876....7654....5432....3210
+
+  ww = ww | (ww >> 12);
+  // ......fe....fedc..fedcbafedcba98dcba9876ba9876549876543276543210
+
+#  ifdef __LP64__
+  ww = ww & kMask000000FF;
+  // ........................fedcba98........................76543210
+
+  return S_CAST(Quarterword, ww | (ww >> 24));
+#  else
+  return S_CAST(Quarterword, ww);
+#  endif
+}
+
+HEADER_INLINE uintptr_t Pack0303Mask(uintptr_t ww) {
+  return Pack0303(ww & kMask0303);
+}
+
+#  ifdef USE_SSE2
+HEADER_INLINE Vec4thUint UnpackVec8thUintTo4th(Vec8thUint hw) {
+  hw = (hw | (hw << 8)) & 0x00ff00ffU;
+  hw = (hw | (hw << 4)) & 0x0f0f0f0fU;
+  hw = (hw | (hw << 2)) & 0x33333333U;
+  return (hw | (hw << 1)) & 0x55555555U;
+}
+
+HEADER_INLINE Vec8thUint PackVec4thUintTo8th(Vec4thUint ww) {
+  ww = (ww | (ww >> 1)) & kMask3333;
+  ww = (ww | (ww >> 2)) & kMask0F0F;
+  ww = (ww | (ww >> 4)) & kMask00FF;
+  return S_CAST(Vec8thUint, ww | (ww >> 8));
+}
+
+HEADER_INLINE Vec16thUint PackVec8thUintTo16th(Vec8thUint ww) {
+  ww = (ww | (ww >> 1)) & 0x3333;
+  ww = (ww | (ww >> 2)) & 0x0f0f;
+  return S_CAST(Vec16thUint, ww | (ww >> 4));
+}
+
+#    ifdef USE_SSE42
+HEADER_INLINE VecUc InverseMovemaskFF(Vec8thUint mask) {
+  __m128i vmask = _mm_set1_epi16(mask);
+  const __m128i byte_gather = _mm_setr_epi32(0, 0, 0x01010101, 0x01010101);
+  vmask = _mm_shuffle_epi8(vmask, byte_gather);
+  const __m128i bit_mask = _mm_set1_epi64x(0x7fbfdfeff7fbfdfeLL);
+  vmask = _mm_or_si128(vmask, bit_mask);
+  return R_CAST(VecUc, _mm_cmpeq_epi8(vmask, _mm_set1_epi64x(-1)));
+}
+
+HEADER_INLINE VecUc InverseMovespreadmaskFF(Vec4thUint mask) {
+  __m128i vmask = _mm_set1_epi32(mask);
+  const __m128i byte_gather = _mm_setr_epi32(0, 0x01010101, 0x02020202, 0x03030303);
+  vmask = _mm_shuffle_epi8(vmask, byte_gather);
+  const __m128i bit_mask = _mm_set1_epi32(0xbfeffbfeU);
+  vmask = _mm_or_si128(vmask, bit_mask);
+  return R_CAST(VecUc, _mm_cmpeq_epi8(vmask, _mm_set1_epi64x(-1)));
+}
+#    endif
+
+#  endif // !USE_SSE2
+#endif  // !USE_AVX2
+
+// alignment must be a power of 2
+// tried splitting out RoundDownPow2U32() and RoundUpPow2U32() functions, no
+// practical difference
+HEADER_CINLINE uintptr_t RoundDownPow2(uintptr_t val, uintptr_t alignment) {
+  return val & (~(alignment - 1));
+}
+
+HEADER_CINLINE uint64_t RoundDownPow2U64(uint64_t val, uint64_t alignment) {
+  return val & (~(alignment - 1));
+}
+
+HEADER_CINLINE uintptr_t RoundUpPow2(uintptr_t val, uintptr_t alignment) {
+  return (val + alignment - 1) & (~(alignment - 1));
+}
+
+HEADER_CINLINE uint64_t RoundUpPow2U64(uint64_t val, uint64_t alignment) {
+  return (val + alignment - 1) & (~(alignment - 1));
+}
+
+
+// This is best when the divisor is constant (so (divisor - 1) can be
+// collapsed), and handles val == 0 properly.  If the divisor isn't constant
+// and val is guaranteed to be nonzero, go with explicit
+// "1 + (val - 1) / divisor".
+//
+// Note that this fails if (val + divisor - 1) overflows the widest integer
+// type on the left.
+//
+// Since forced-uint32_t RoundDownPow2 was pointless, it stands to reason that
+// the same applies to DivUp.  With that said, we may as well make divisor a
+// uint32_t just in case this ever gets used on a not-known-at-compile-time
+// divisor, since 64/64 can be slower than 64/32.
+HEADER_CINLINE uintptr_t DivUp(uintptr_t val, uint32_t divisor) {
+  return (val + divisor - 1) / divisor;
+}
+
+HEADER_CINLINE uint64_t DivUpU64(uint64_t val, uint32_t divisor) {
+  return (val + divisor - 1) / divisor;
+}
+
+// "Nz" means nonzero in two ways:
+// * result is in [1, modulus], not [0, modulus - 1]
+// * val should not be zero (though this expression still works if val is zero
+//   and modulus is a hardcoded power of 2)
+HEADER_INLINE uint32_t ModNz(uintptr_t val, uint32_t modulus) {
+  return (1 + ((val - 1) % modulus));
+}
+
+// No need for ModNzU64 in practice, since high bits don't affect result when
+// modulus is a power of 2.
+
+// Equivalent to (static_cast<int32_t>(uii) < 0).  Most frequently used on
+// possibly-error chromosome indexes.
+HEADER_INLINE uint32_t IsI32Neg(uint32_t uii) {
+  return uii >> 31;
+}
+
+HEADER_INLINE uint32_t abs_i32(int32_t ii) {
+  // Arithmetic right shift.  0xffffffffU when ii is negative, 0 otherwise.
+  const uint32_t neg_sign_bit = S_CAST(uint32_t, ii >> 31);
+
+  return (S_CAST(uint32_t, ii) ^ neg_sign_bit) - neg_sign_bit;
+}
+
+extern uint64_t g_failed_alloc_attempt_size;
+// with NDEBUG undefined, may want to define a bunch of macros so that line
+// number is printed as well; see e.g.
+//   https://stackoverflow.com/questions/15884793/how-to-get-the-name-or-file-and-line-of-caller-method
+
+#if (((__GNUC__ == 4) && (__GNUC_MINOR__ < 7)) || (__GNUC__ >= 11)) && !defined(__APPLE__)
+// putting this in the header file caused a bunch of gcc 4.4 strict-aliasing
+// warnings, while not doing so seems to inhibit some malloc-related compiler
+// optimizations, bleah
+// compromise: header-inline iff gcc version >= 4.7 (might not be the right
+// cutoff?)
+// update (18 Feb 2022): looks like inlined pgl_malloc is not compiled as
+// intended by gcc 11, due to new ipa-modref pass?  Open to suggestions on how
+// to fix this; maybe it's now necessary to define type-specific malloc
+// wrappers, ugh...
+BoolErr pgl_malloc(uintptr_t size, void* pp);
+#else
+// Unfortunately, defining the second parameter to be of type void** doesn't do
+// the right thing.
+HEADER_INLINE BoolErr pgl_malloc(uintptr_t size, void* pp) {
+  *S_CAST(unsigned char**, pp) = S_CAST(unsigned char*, malloc(size));
+  if (likely(*S_CAST(unsigned char**, pp))) {
+    return 0;
+  }
+  g_failed_alloc_attempt_size = size;
+  return 1;
+}
+#endif
+
+// This must be used for all fwrite() calls where len could be >= 2^31, since
+// OS X raw fwrite() doesn't work in that case.
+static_assert(sizeof(size_t) == sizeof(intptr_t), "plink2_base assumes size_t and intptr_t are synonymous.");
+BoolErr fwrite_checked(const void* buf, uintptr_t len, FILE* outfile);
+
+HEADER_INLINE IntErr putc_checked(int32_t ii, FILE* outfile) {
+  putc_unlocked(ii, outfile);
+  return ferror_unlocked(outfile);
+}
+
+// Only use this if loading < len bytes is not an error.
+// IntErr fread_checked2(void* buf, uintptr_t len, FILE* infile, uintptr_t* bytes_read_ptr);
+
+BoolErr fread_checked(void* buf, uintptr_t len, FILE* infile);
+
+HEADER_INLINE BoolErr fclose_null(FILE** fptr_ptr) {
+  int32_t ii = ferror_unlocked(*fptr_ptr);
+  int32_t jj = fclose(*fptr_ptr);
+  *fptr_ptr = nullptr;
+  return ii || jj;
+}
+
+
+#ifdef __LP64__
+// Reads an integer in [1, cap].
+// * Errors out unless first character is a digit, or is '+' followed by a
+//   digit.  Initial whitespace is not permitted.
+// * Like atoi(), this considereds the number to be terminated by *any*
+//   nondigit character.  E.g. "1000genomes" is treated as a valid instance of
+//   1000 rather than a nonnumeric token, and "98.6" is treated as 98.  (See
+//   ScanmovPosintCapped(), ScanmovUintCapped(), etc. in plink2_string if
+//   you want strtol-like semantics, where the pointer is moved.)
+// * Errors out on overflow.  This may be the biggest advantage over atoi().
+BoolErr ScanPosintCapped(const char* str_iter, uint64_t cap, uint32_t* valp);
+
+// [0, cap]
+BoolErr ScanUintCapped(const char* str_iter, uint64_t cap, uint32_t* valp);
+
+// [-bound, bound]
+BoolErr ScanIntAbsBounded(const char* str_iter, uint64_t bound, int32_t* valp);
+#else  // not __LP64__
+// Need to be more careful in 32-bit case due to overflow.
+// A funny-looking div_10/mod_10 interface is used since the cap will usually
+// be a constant, and we want the integer division/modulus to occur at compile
+// time.
+BoolErr ScanPosintCapped32(const char* str_iter, uint32_t cap_div_10, uint32_t cap_mod_10, uint32_t* valp);
+
+BoolErr ScanUintCapped32(const char* str_iter, uint32_t cap_div_10, uint32_t cap_mod_10, uint32_t* valp);
+
+BoolErr ScanIntAbsBounded32(const char* str_iter, uint32_t bound_div_10, uint32_t bound_mod_10, int32_t* valp);
+
+HEADER_INLINE BoolErr ScanPosintCapped(const char* str, uint32_t cap, uint32_t* valp) {
+  return ScanPosintCapped32(str, cap / 10, cap % 10, valp);
+}
+
+HEADER_INLINE BoolErr ScanUintCapped(const char* str, uint32_t cap, uint32_t* valp) {
+  return ScanUintCapped32(str, cap / 10, cap % 10, valp);
+}
+
+HEADER_INLINE BoolErr ScanIntAbsBounded(const char* str, uint32_t bound, int32_t* valp) {
+  return ScanIntAbsBounded32(str, bound / 10, bound % 10, valp);
+}
+#endif
+
+
+// intentionally rejects -2^31 for now
+// (that's a reason why this doesn't have the shorter name 'ScanI32')
+HEADER_INLINE BoolErr ScanInt32(const char* str, int32_t* valp) {
+  return ScanIntAbsBounded(str, 0x7fffffff, valp);
+}
+
+// default cap = 0x7ffffffe
+HEADER_INLINE BoolErr ScanPosintDefcap(const char* str, uint32_t* valp) {
+  return ScanPosintCapped(str, 0x7ffffffe, valp);
+}
+
+HEADER_INLINE BoolErr ScanUintDefcap(const char* str, uint32_t* valp) {
+  return ScanUintCapped(str, 0x7ffffffe, valp);
+}
+
+HEADER_INLINE BoolErr ScanIntAbsDefcap(const char* str, int32_t* valp) {
+  return ScanIntAbsBounded(str, 0x7ffffffe, valp);
+}
+
+HEADER_INLINE BoolErr ScanUintIcap(const char* str, uint32_t* valp) {
+  return ScanUintCapped(str, 0x7fffffff, valp);
+}
+
+
+// memcpya() tends to be used to copy known-length text strings, while
+// memseta() has more mixed usage but char* type is also at least as common as
+// unsigned char*; append comes up less when working with raw byte arrays.  So
+// give the shortest-name forms char* return types.
+HEADER_INLINE char* memseta(void* target, unsigned char val, uintptr_t ct) {
+  memset(target, val, ct);
+  return &(S_CAST(char*, target)[ct]);
+}
+
+HEADER_INLINE unsigned char* memsetua(void* target, unsigned char val, uintptr_t ct) {
+  memset(target, val, ct);
+  return &(S_CAST(unsigned char*, target)[ct]);
+}
+
+HEADER_CINLINE uintptr_t BitCtToVecCt(uintptr_t val) {
+  return DivUp(val, kBitsPerVec);
+}
+
+HEADER_CINLINE uintptr_t BitCtToWordCt(uintptr_t val) {
+  return DivUp(val, kBitsPerWord);
+}
+
+HEADER_CINLINE uintptr_t BitCtToAlignedWordCt(uintptr_t val) {
+  return kWordsPerVec * BitCtToVecCt(val);
+}
+
+HEADER_CINLINE uintptr_t BitCtToCachelineCt(uintptr_t val) {
+  return DivUp(val, kBitsPerCacheline);
+}
+
+HEADER_CINLINE uintptr_t Int32CtToVecCt(uintptr_t val) {
+  return DivUp(val, kInt32PerVec);
+}
+
+HEADER_CINLINE uintptr_t Int32CtToCachelineCt(uintptr_t val) {
+  return DivUp(val, kInt32PerCacheline);
+}
+
+HEADER_CINLINE uintptr_t WordCtToVecCt(uintptr_t val) {
+  return DivUp(val, kWordsPerVec);
+}
+
+HEADER_CINLINE uintptr_t WordCtToCachelineCt(uintptr_t val) {
+  return DivUp(val, kWordsPerCacheline);
+}
+
+HEADER_CINLINE uint64_t WordCtToCachelineCtU64(uint64_t val) {
+  return DivUpU64(val, kWordsPerCacheline);
+}
+
+#ifdef __LP64__
+HEADER_CINLINE uintptr_t Int64CtToVecCt(uintptr_t val) {
+  return DivUp(val, kBytesPerVec / 8);
+}
+#else
+HEADER_CINLINE uintptr_t Int64CtToVecCt(uintptr_t val) {
+  return val * 2;
+}
+#endif
+
+HEADER_CINLINE uintptr_t Int64CtToCachelineCt(uintptr_t val) {
+  return DivUp(val, kInt64PerCacheline);
+}
+
+HEADER_CINLINE uintptr_t DblCtToVecCt(uintptr_t val) {
+  return Int64CtToVecCt(val);
+}
+
+HEADER_CINLINE uintptr_t VecCtToCachelineCt(uintptr_t val) {
+  return DivUp(val, kVecsPerCacheline);
+}
+
+HEADER_CINLINE uint64_t VecCtToCachelineCtU64(uint64_t val) {
+  return DivUpU64(val, kVecsPerCacheline);
+}
+
+// C++11 standard guarantees std::min and std::max return leftmost minimum in
+// case of equality; best to adhere to that
+// We don't actually use std::min/max since casting one argument when comparing
+// e.g. a uint32_t with a uintptr_t is pointlessly verbose.  Compiler will
+// still warn against comparison of signed with unsigned.
+#define MAXV(aa, bb) (((bb) > (aa))? (bb) : (aa))
+#define MINV(aa, bb) (((bb) < (aa))? (bb) : (aa))
+
+
+// don't use PglErr here since there's only one failure mode, it's
+// obvious what it is, and stacking multiple aligned_mallocs in a single
+// if-statement is useful.
+BoolErr aligned_malloc(uintptr_t size, uintptr_t alignment, void* aligned_pp);
+
+#ifdef USE_SSE42
+HEADER_CINLINE uint32_t NypsumWord(uintptr_t val) {
+  return __builtin_popcountll(val) + __builtin_popcountll(val & kMaskAAAA);
+}
+#else
+HEADER_CINLINE2 uint32_t NypsumWord(uintptr_t val) {
+  val = (val & kMask3333) + ((val >> 2) & kMask3333);
+  return (((val + (val >> 4)) & kMask0F0F) * kMask0101) >> (kBitsPerWord - 8);
+}
+#endif
+
+// the simple version, good enough for all non-time-critical stuff
+// (without SSE4.2, PopcountWords() tends to be >3x as fast on arrays.  with
+// SSE4.2 but no AVX2, there's no noticeable difference.  with AVX2,
+// PopcountWords() gains another factor of 1.5-2x.)
+#ifdef USE_SSE42
+HEADER_CINLINE uint32_t PopcountWord(uintptr_t val) {
+  return __builtin_popcountll(val);
+}
+#else
+HEADER_CINLINE2 uint32_t PopcountWord(uintptr_t val) {
+  // Sadly, this was still faster than the LLVM implementation of the intrinsic
+  // as of 2016.
+  return NypsumWord(val - ((val >> 1) & kMask5555));
+}
+#endif
+
+#ifdef USE_SSE42
+HEADER_INLINE uint32_t Popcount2Words(uintptr_t val0, uintptr_t val1) {
+  return __builtin_popcountll(val0) + __builtin_popcountll(val1);
+}
+#else
+HEADER_INLINE uint32_t Popcount2Words(uintptr_t val0, uintptr_t val1) {
+  val0 -= (val0 >> 1) & kMask5555;
+  val1 -= (val1 >> 1) & kMask5555;
+  const uintptr_t four_bit = (val0 & kMask3333) + ((val0 >> 2) & kMask3333) + (val1 & kMask3333) + ((val1 >> 2) & kMask3333);
+  // up to 16 values in 0..12; sum fits in 8 bits
+  return (((four_bit & kMask0F0F) + ((four_bit >> 4) & kMask0F0F)) * kMask0101) >> (kBitsPerWord - 8);
+}
+#endif
+
+#ifndef __LP64__
+HEADER_INLINE uint32_t Popcount4Words(uintptr_t val0, uintptr_t val1, uintptr_t val2, uintptr_t val3) {
+  val0 -= (val0 >> 1) & kMask5555;
+  val1 -= (val1 >> 1) & kMask5555;
+  val2 -= (val2 >> 1) & kMask5555;
+  val3 -= (val3 >> 1) & kMask5555;
+  const uintptr_t four_bit_0 = (val0 & kMask3333) + ((val0 >> 2) & kMask3333) + (val1 & kMask3333) + ((val1 >> 2) & kMask3333);
+  const uintptr_t four_bit_1 = (val2 & kMask3333) + ((val2 >> 2) & kMask3333) + (val3 & kMask3333) + ((val3 >> 2) & kMask3333);
+  return (((four_bit_0 & kMask0F0F) + ((four_bit_0 >> 4) & kMask0F0F) + (four_bit_1 & kMask0F0F) + ((four_bit_1 >> 4) & kMask0F0F)) * kMask0101) >> (kBitsPerWord - 8);
+}
+#endif
+
+#ifdef USE_SSE42
+HEADER_INLINE uint32_t PopcountHW(uint32_t val) {
+  return __builtin_popcount(val);
+}
+
+HEADER_INLINE uint32_t PopcountByte(uint32_t val) {
+  return __builtin_popcount(val);
+}
+#else
+#  ifdef __LP64__
+HEADER_INLINE uint32_t PopcountHW(uint32_t val) {
+  val = val - ((val >> 1) & 0x55555555);
+  val = (val & 0x33333333) + ((val >> 2) & 0x33333333);
+  val = (val + (val >> 4)) & 0x0f0f0f0f;
+  return (val * 0x1010101) >> 24;
+}
+#  else
+HEADER_INLINE uint32_t PopcountHW(uint32_t val) {
+  val = val - ((val >> 1) & 0x5555);
+  val = (val & 0x3333) + ((val >> 2) & 0x3333);
+  val = (val + (val >> 4)) & 0x0f0f;
+  return (val + (val >> 8)) & 0xff;
+}
+#  endif
+
+HEADER_INLINE uint32_t PopcountByte(uint32_t val) {
+  val = val - ((val >> 1) & 0x55);
+  val = (val & 0x33) + ((val >> 2) & 0x33);
+  return (val + (val >> 4)) & 0xf;
+}
+#endif
+
+#ifdef USE_SSE2
+#  ifdef USE_SSE42
+HEADER_INLINE uint32_t PopcountVec8thUint(uint32_t val) {
+  return __builtin_popcount(val);
+}
+#  else
+HEADER_INLINE uint32_t PopcountVec8thUint(uint32_t val) {
+  // May as well exploit the fact that only the low 16 bits may be set.
+  val = val - ((val >> 1) & 0x5555);
+  val = (val & 0x3333) + ((val >> 2) & 0x3333);
+  val = (val + (val >> 4)) & 0x0f0f;
+  return (val + (val >> 8)) & 0xff;
+}
+#  endif
+#endif
+
+// Downcasts don't risk alignment issues.
+HEADER_INLINE unsigned char* DowncastToUc(void* pp) {
+  return S_CAST(unsigned char*, pp);
+}
+
+HEADER_INLINE char* DowncastToC(void* pp) {
+  return S_CAST(char*, pp);
+}
+
+HEADER_INLINE const unsigned char* DowncastKToUc(const void* pp) {
+  return S_CAST(const unsigned char*, pp);
+}
+
+HEADER_INLINE const char* DowncastKToC(const void* pp) {
+  return S_CAST(const char*, pp);
+}
+
+HEADER_INLINE uintptr_t* DowncastVecWToW(VecW* pp) {
+  return R_CAST(uintptr_t*, pp);
+}
+
+HEADER_INLINE uint32_t* DowncastVecWToU32(VecW* pp) {
+  return R_CAST(uint32_t*, pp);
+}
+
+HEADER_INLINE Halfword* DowncastWToHW(uintptr_t* pp) {
+  return R_CAST(Halfword*, pp);
+}
+
+HEADER_INLINE uint32_t* DowncastWToU32(uintptr_t* pp) {
+  return R_CAST(uint32_t*, pp);
+}
+
+HEADER_INLINE uint16_t* DowncastWToU16(uintptr_t* pp) {
+  return R_CAST(uint16_t*, pp);
+}
+
+HEADER_INLINE int16_t* DowncastWToI16(uintptr_t* pp) {
+  return R_CAST(int16_t*, pp);
+}
+
+#ifdef USE_SSE2
+HEADER_INLINE Vec8thUint* DowncastWToV8(uintptr_t* pp) {
+  return R_CAST(Vec8thUint*, pp);
+}
+#endif
+
+HEADER_INLINE uint16_t* DowncastU32ToU16(uint32_t* pp) {
+  return R_CAST(uint16_t*, pp);
+}
+
+HEADER_INLINE const uintptr_t* DowncastKVecWToW(const VecW* pp) {
+  return R_CAST(const uintptr_t*, pp);
+}
+
+HEADER_INLINE const uint16_t* DowncastKVecWToU16(const VecW* pp) {
+  return R_CAST(const uint16_t*, pp);
+}
+
+HEADER_INLINE const Halfword* DowncastKWToHW(const uintptr_t* pp) {
+  return R_CAST(const Halfword*, pp);
+}
+
+HEADER_INLINE const uint32_t* DowncastKWToU32(const uintptr_t* pp) {
+  return R_CAST(const uint32_t*, pp);
+}
+
+HEADER_INLINE const uint16_t* DowncastKWToU16(const uintptr_t* pp) {
+  return R_CAST(const uint16_t*, pp);
+}
+
+HEADER_INLINE const uint16_t* DowncastKU64ToU16(const uint64_t* pp) {
+  return R_CAST(const uint16_t*, pp);
+}
+
+
+HEADER_INLINE uint32_t IsVecAligned(const void* ptr) {
+  return !(R_CAST(uintptr_t, ptr) % kBytesPerVec);
+}
+
+#ifdef USE_SSE2
+HEADER_INLINE void AlignWToVec(uintptr_t** pp) {
+  const uintptr_t addr = R_CAST(uintptr_t, *pp);
+  *pp = R_CAST(uintptr_t*, RoundUpPow2(addr, kBytesPerVec));
+}
+#else
+HEADER_INLINE void AlignWToVec(__maybe_unused uintptr_t** pp) {
+}
+#endif
+
+HEADER_INLINE void AlignKUcToVec(const unsigned char** pp) {
+  const uintptr_t addr = R_CAST(uintptr_t, *pp);
+  *pp = R_CAST(const unsigned char*, RoundUpPow2(addr, kBytesPerVec));
+}
+
+/*
+HEADER_INLINE uint32_t AlignToVecW(void* prestart, VecW** result_ptr) {
+  unsigned char* prestart_uc = S_CAST(unsigned char*, prestart);
+  const uint32_t lead_byte_ct = (-R_CAST(uintptr_t, prestart_uc)) % kBytesPerVec;
+  *result_ptr = R_CAST(VecW*, &(prestart_uc[lead_byte_ct]));
+  return lead_byte_ct;
+}
+*/
+
+HEADER_INLINE uint32_t AlignKToAW(const void* prestart, const uintptr_t** result_ptr) {
+  const unsigned char* prestart_uc = S_CAST(const unsigned char*, prestart);
+  const uint32_t lead_byte_ct = (-R_CAST(uintptr_t, prestart_uc)) % kBytesPerVec;
+  *result_ptr = R_CAST(const uintptr_t*, &(prestart_uc[lead_byte_ct]));
+  return lead_byte_ct;
+}
+
+HEADER_INLINE uint32_t AlignKToW(const void* prestart, const uintptr_t** result_ptr) {
+  const unsigned char* prestart_uc = S_CAST(const unsigned char*, prestart);
+  const uint32_t lead_byte_ct = (-R_CAST(uintptr_t, prestart_uc)) % kBytesPerWord;
+  *result_ptr = R_CAST(const uintptr_t*, &(prestart_uc[lead_byte_ct]));
+  return lead_byte_ct;
+}
+
+
+// Turns out memcpy(&cur_word, bytearr, ct) can't be trusted to be fast when ct
+// isn't known at compile time.
+//
+// ct must be less than sizeof(intptr_t).  ct == 0 handled correctly, albeit
+// inefficiently.
+#ifndef NO_UNALIGNED
+HEADER_INLINE uintptr_t ProperSubwordLoad(const void* bytearr, uint32_t ct) {
+  const unsigned char* bytearr_uc = S_CAST(const unsigned char*, bytearr);
+#  ifdef __LP64__
+  if (ct >= 4) {
+    const uint32_t remainder = ct - 4;
+    bytearr_uc = &(bytearr_uc[remainder]);
+    uintptr_t cur_word = *R_CAST(const uint32_t*, bytearr_uc);
+    if (remainder) {
+      cur_word <<= remainder * CHAR_BIT;
+      cur_word |= *S_CAST(const uint32_t*, bytearr);
+    }
+    return cur_word;
+  }
+#  endif
+  if (ct >= 2) {
+    const uint32_t remainder = ct & 1;
+    uintptr_t cur_word = *R_CAST(const uint16_t*, &(bytearr_uc[remainder]));
+    if (remainder) {
+      cur_word <<= 8;
+      cur_word |= bytearr_uc[0];
+    }
+    return cur_word;
+  }
+  return ct? bytearr_uc[0] : 0;
+}
+
+HEADER_INLINE uintptr_t SubwordLoad(const void* bytearr, uint32_t ct) {
+  if (ct == S_CAST(uint32_t, kBytesPerWord)) {
+    return *S_CAST(const uintptr_t*, bytearr);
+  }
+  return ProperSubwordLoad(bytearr, ct);
+}
+
+// ct must be in 1..4.
+HEADER_INLINE uint32_t SubU32Load(const void* bytearr, uint32_t ct) {
+  if (ct & 1) {
+    const unsigned char* bytearr_iter = S_CAST(const unsigned char*, bytearr);
+    uint32_t cur_uint = *bytearr_iter;
+    if (ct == 3) {
+      ++bytearr_iter;
+      cur_uint |= S_CAST(uint32_t, *R_CAST(const uint16_t*, bytearr_iter)) << 8;
+    }
+    return cur_uint;
+  }
+  if (ct == 2) {
+    return *S_CAST(const uint16_t*, bytearr);
+  }
+  return *S_CAST(const uint32_t*, bytearr);
+}
+
+// ct must be 1 or 2.
+HEADER_INLINE uint16_t SubU16Load(const void* bytearr, uint32_t ct) {
+  if (ct == 1) {
+    const unsigned char* bytearr_uc = S_CAST(const unsigned char*, bytearr);
+    return bytearr_uc[0];
+  }
+  return *S_CAST(const uint16_t*, bytearr);
+}
+
+// ct must be in 1..sizeof(Halfword).
+#ifdef __LP64__
+HEADER_INLINE Halfword SubHWLoad(const void* bytearr, uint32_t ct) {
+  return SubU32Load(bytearr, ct);
+}
+#else
+HEADER_INLINE Halfword SubHWLoad(const void* bytearr, uint32_t ct) {
+  return SubU16Load(bytearr, ct);
+}
+#endif
+
+// tried making this non-inline, loop took more than 50% longer
+HEADER_INLINE void ProperSubwordStore(uintptr_t cur_word, uint32_t byte_ct, void* target) {
+  unsigned char* target_iter = S_CAST(unsigned char*, target);
+#  ifdef __LP64__
+  if (byte_ct >= 4) {
+    *R_CAST(uint32_t*, target_iter) = cur_word;
+    if (byte_ct == 4) {
+      return;
+    }
+    const uint32_t remainder = byte_ct - 4;
+    target_iter = &(target_iter[remainder]);
+    cur_word >>= remainder * CHAR_BIT;
+    *R_CAST(uint32_t*, target_iter) = cur_word;
+    return;
+  }
+#  endif
+  if (byte_ct & 1) {
+    *target_iter++ = cur_word;
+    cur_word >>= 8;
+  }
+  if (byte_ct & 2) {
+    *R_CAST(uint16_t*, target_iter) = cur_word;
+  }
+}
+
+HEADER_INLINE void SubwordStore(uintptr_t cur_word, uint32_t byte_ct, void* target) {
+  if (byte_ct == kBytesPerWord) {
+    *S_CAST(uintptr_t*, target) = cur_word;
+    return;
+  }
+  ProperSubwordStore(cur_word, byte_ct, target);
+}
+
+// byte_ct must be in 1..4.
+HEADER_INLINE void SubU32Store(uint32_t cur_uint, uint32_t byte_ct, void* target) {
+  if (byte_ct & 1) {
+    unsigned char* target_iter = S_CAST(unsigned char*, target);
+    *target_iter = cur_uint;
+    if (byte_ct == 3) {
+      ++target_iter;
+      *R_CAST(uint16_t*, target_iter) = cur_uint >> 8;
+    }
+    return;
+  }
+  if (byte_ct == 2) {
+    *S_CAST(uint16_t*, target) = cur_uint;
+    return;
+  }
+  *S_CAST(uint32_t*, target) = cur_uint;
+  return;
+}
+#else  // NO_UNALIGNED
+HEADER_INLINE uintptr_t ProperSubwordLoad(const void* bytearr, uint32_t ct) {
+  uintptr_t cur_word = 0;
+  memcpy(&cur_word, bytearr, ct);
+  return cur_word;
+}
+
+HEADER_INLINE uintptr_t SubwordLoad(const void* bytearr, uint32_t ct) {
+  uintptr_t cur_word = 0;
+  memcpy(&cur_word, bytearr, ct);
+  return cur_word;
+}
+
+HEADER_INLINE uint32_t SubU32Load(const void* bytearr, uint32_t ct) {
+  uint32_t cur_uint = 0;
+  memcpy(&cur_uint, bytearr, ct);
+  return cur_uint;
+}
+
+HEADER_INLINE Halfword SubHWLoad(const void* bytearr, uint32_t ct) {
+  Halfword cur_uint = 0;
+  memcpy(&cur_uint, bytearr, ct);
+  return cur_uint;
+}
+
+HEADER_INLINE void ProperSubwordStore(uintptr_t cur_word, uint32_t byte_ct, void* target) {
+  memcpy(target, &cur_word, byte_ct);
+}
+
+HEADER_INLINE void SubwordStore(uintptr_t cur_word, uint32_t byte_ct, void* target) {
+  memcpy(target, &cur_word, byte_ct);
+}
+
+HEADER_INLINE void SubU32Store(uint32_t cur_uint, uint32_t byte_ct, void* target) {
+  memcpy(target, &cur_uint, byte_ct);
+}
+#endif // NO_UNALIGNED
+
+HEADER_INLINE uint64_t SubU64Load(const void* bytearr, uint32_t ct) {
+#ifdef __LP64__
+  return SubwordLoad(bytearr, ct);
+#else
+  uint64_t cur_u64 = 0;
+  memcpy(&cur_u64, bytearr, ct);
+  return cur_u64;
+#endif
+}
+
+HEADER_INLINE void ProperSubwordStoreMov(uintptr_t cur_word, uint32_t byte_ct, unsigned char** targetp) {
+  ProperSubwordStore(cur_word, byte_ct, *targetp);
+  *targetp += byte_ct;
+}
+
+HEADER_INLINE void SubwordStoreMov(uintptr_t cur_word, uint32_t byte_ct, unsigned char** targetp) {
+  SubwordStore(cur_word, byte_ct, *targetp);
+  *targetp += byte_ct;
+}
+
+HEADER_INLINE void SubU32StoreMov(uint32_t cur_uint, uint32_t byte_ct, unsigned char** targetp) {
+  SubU32Store(cur_uint, byte_ct, *targetp);
+  *targetp += byte_ct;
+}
+
+#ifndef NO_UNALIGNED
+#  ifdef __LP64__
+HEADER_INLINE void SubU64StoreMov(uint64_t cur_u64, uint32_t byte_ct, unsigned char** targetp) {
+  return SubwordStoreMov(cur_u64, byte_ct, targetp);
+}
+#  else
+HEADER_INLINE void SubU64StoreMov(uint64_t cur_u64, uint32_t byte_ct, unsigned char** targetp) {
+  if (byte_ct > 4) {
+    *R_CAST(uint32_t*, *targetp) = cur_u64;
+    *targetp += 4;
+    byte_ct -= 4;
+    cur_u64 >>= 32;
+  }
+  return SubU32StoreMov(cur_u64, byte_ct, targetp);
+}
+#  endif
+#else
+HEADER_INLINE void SubU64StoreMov(uint64_t cur_u64, uint32_t byte_ct, unsigned char** targetp) {
+  memcpy(*targetp, &cur_u64, byte_ct);
+  *targetp += byte_ct;
+}
+#endif
+
+
+HEADER_INLINE BoolErr vecaligned_malloc(uintptr_t size, void* aligned_pp) {
+#ifdef USE_AVX2
+  return aligned_malloc(size, kBytesPerVec, aligned_pp);
+#else
+#  if defined(__APPLE__) || !defined(__LP64__)
+  const BoolErr ret_boolerr = pgl_malloc(size, aligned_pp);
+  assert(IsVecAligned(*S_CAST(uintptr_t**, aligned_pp)));
+  return ret_boolerr;
+#  else
+  return aligned_malloc(size, kBytesPerVec, aligned_pp);
+#  endif
+#endif
+}
+
+HEADER_INLINE BoolErr cachealigned_malloc(uintptr_t size, void* aligned_pp) {
+  return aligned_malloc(size, kCacheline, aligned_pp);
+}
+
+HEADER_INLINE void aligned_free(void* aligned_ptr) {
+  free(R_CAST(void*, S_CAST(uintptr_t*, aligned_ptr)[-1]));
+}
+
+HEADER_INLINE void aligned_free_cond(void* aligned_ptr) {
+  if (aligned_ptr) {
+    free(R_CAST(void*, S_CAST(uintptr_t*, aligned_ptr)[-1]));
+  }
+}
+
+// C spec is slightly broken here
+HEADER_INLINE void free_const(const void* memptr) {
+  free(K_CAST(void*, memptr));
+}
+
+HEADER_INLINE void free_cond(const void* memptr) {
+  if (memptr) {
+    free_const(memptr);
+  }
+}
+
+#ifdef USE_AVX2
+HEADER_INLINE void vecaligned_free(void* aligned_ptr) {
+  aligned_free(aligned_ptr);
+}
+
+HEADER_INLINE void vecaligned_free_cond(void* aligned_ptr) {
+  aligned_free_cond(aligned_ptr);
+}
+#else
+#  if defined(__APPLE__) || !defined(__LP64__)
+HEADER_INLINE void vecaligned_free(void* aligned_ptr) {
+  free(aligned_ptr);
+}
+
+HEADER_INLINE void vecaligned_free_cond(void* aligned_ptr) {
+  free_cond(aligned_ptr);
+}
+#  else
+HEADER_INLINE void vecaligned_free(void* aligned_ptr) {
+  aligned_free(aligned_ptr);
+}
+
+HEADER_INLINE void vecaligned_free_cond(void* aligned_ptr) {
+  aligned_free_cond(aligned_ptr);
+}
+#  endif
+#endif
+
+
+#if defined(USE_SSE2) && !defined(NO_UNALIGNED)
+int32_t memequal(const void* m1, const void* m2, uintptr_t byte_ct);
+
+// This is also better than the June 2018 OS X/LLVM stock implementation,
+// especially for small values of ct.
+// (gcc 7.1 and clang 6.0.0 should have better stock implementations;
+// re-benchmark this once Linux build machine is upgraded to Ubuntu 18.04.)
+int32_t Memcmp(const void* m1, const void* m2, uintptr_t ct);
+#else
+HEADER_INLINE int32_t memequal(const void* m1, const void* m2, uintptr_t byte_ct) {
+  return !memcmp(m1, m2, byte_ct);
+}
+
+HEADER_INLINE int32_t Memcmp(const void* m1, const void* m2, uintptr_t ct) {
+  return memcmp(m1, m2, ct);
+}
+#endif
+
+
+HEADER_INLINE char* memcpya(void* __restrict target, const void* __restrict source, uintptr_t ct) {
+  memcpy(target, source, ct);
+  return &(S_CAST(char*, target)[ct]);
+}
+
+HEADER_INLINE unsigned char* memcpyua(void* __restrict target, const void* __restrict source, uintptr_t ct) {
+  memcpy(target, source, ct);
+  return &(S_CAST(unsigned char*, target)[ct]);
+}
+
+// Tried beating memcpy for usually-small strings not known to have length <=
+// 8, gave up.
+
+#if defined(USE_SSE2) && defined(__cplusplus) && !defined(NO_UNALIGNED)
+// See https://stackoverflow.com/questions/9510514/integer-range-based-template-specialisation .
+
+template <bool> struct TRange;
+
+// This makes MemequalKImpl<byte_ct> expand to
+// MemequalKImpl<byte_ct, TRange<true> >.
+// If a later single-parameter template defines the same thing, that takes
+// precedence.
+template <uint32_t N, typename = TRange<true> > struct MemequalKImpl {
+  static int32_t MemequalK(const void* m1, const void* m2) {
+    return memequal(m1, m2, N);
+  }
+};
+
+template <> struct MemequalKImpl<1> {
+  static int32_t MemequalK(const void* m1, const void* m2) {
+    const unsigned char* m1_uc = S_CAST(const unsigned char*, m1);
+    const unsigned char* m2_uc = S_CAST(const unsigned char*, m2);
+    return (m1_uc[0] == m2_uc[0]);
+  }
+};
+
+template <> struct MemequalKImpl<2> {
+  static int32_t MemequalK(const void* m1, const void* m2) {
+    return ((*R_CAST(const uint16_t*, m1)) == (*R_CAST(const uint16_t*, m2)));
+  }
+};
+
+template <> struct MemequalKImpl<3> {
+  static int32_t MemequalK(const void* m1, const void* m2) {
+    const unsigned char* m1_uc = S_CAST(const unsigned char*, m1);
+    const unsigned char* m2_uc = S_CAST(const unsigned char*, m2);
+    return
+      ((*R_CAST(const uint16_t*, m1)) == (*R_CAST(const uint16_t*, m2))) &&
+      (m1_uc[2] == m2_uc[2]);
+  }
+};
+
+template <> struct MemequalKImpl<4> {
+  static int32_t MemequalK(const void* m1, const void* m2) {
+    return ((*R_CAST(const uint32_t*, m1)) == (*R_CAST(const uint32_t*, m2)));
+  }
+};
+
+template <uint32_t N> struct MemequalKImpl<N, TRange<(5 <= N) && (N <= 7)> > {
+  static int32_t MemequalK(const void* m1, const void* m2) {
+    const unsigned char* m1_uc = S_CAST(const unsigned char*, m1);
+    const unsigned char* m2_uc = S_CAST(const unsigned char*, m2);
+    return
+      ((*R_CAST(const uint32_t*, m1)) == (*R_CAST(const uint32_t*, m2))) &&
+      ((*R_CAST(const uint32_t*, &(m1_uc[N - 4]))) == (*R_CAST(const uint32_t*, &(m2_uc[N - 4]))));
+  }
+};
+
+template <> struct MemequalKImpl<8> {
+  static int32_t MemequalK(const void* m1, const void* m2) {
+    return ((*R_CAST(const uint64_t*, m1)) == (*R_CAST(const uint64_t*, m2)));
+  }
+};
+
+template <uint32_t N> struct MemequalKImpl<N, TRange<(9 <= N) && (N <= 15)> > {
+  static int32_t MemequalK(const void* m1, const void* m2) {
+    const unsigned char* m1_uc = S_CAST(const unsigned char*, m1);
+    const unsigned char* m2_uc = S_CAST(const unsigned char*, m2);
+    return
+      ((*R_CAST(const uint64_t*, m1)) == (*R_CAST(const uint64_t*, m2))) &&
+      ((*R_CAST(const uint64_t*, &(m1_uc[N - 8]))) == (*R_CAST(const uint64_t*, &(m2_uc[N - 8]))));
+  }
+};
+
+template <> struct MemequalKImpl<16> {
+  static int32_t MemequalK(const void* m1, const void* m2) {
+    const __m128i v1 = _mm_loadu_si128(S_CAST(const __m128i*, m1));
+    const __m128i v2 = _mm_loadu_si128(S_CAST(const __m128i*, m2));
+    return (_mm_movemask_epi8(_mm_cmpeq_epi8(v1, v2)) == 65535);
+  }
+};
+
+template <uint32_t N> struct MemequalKImpl<N, TRange<(17 <= N) && (N <= 24)> > {
+  static int32_t MemequalK(const void* m1, const void* m2) {
+    const unsigned char* m1_uc = S_CAST(const unsigned char*, m1);
+    const unsigned char* m2_uc = S_CAST(const unsigned char*, m2);
+    const __m128i v1 = _mm_loadu_si128(S_CAST(const __m128i*, m1));
+    const __m128i v2 = _mm_loadu_si128(S_CAST(const __m128i*, m2));
+    return
+      (_mm_movemask_epi8(_mm_cmpeq_epi8(v1, v2)) == 65535) &&
+      ((*R_CAST(const uint64_t*, &(m1_uc[N - 8]))) == (*R_CAST(const uint64_t*, &(m2_uc[N - 8]))));
+  }
+};
+
+template <uint32_t N> struct MemequalKImpl<N, TRange<(25 <= N) && (N <= 31)> > {
+  static int32_t MemequalK(const void* m1, const void* m2) {
+    __m128i v1 = _mm_loadu_si128(S_CAST(const __m128i*, m1));
+    __m128i v2 = _mm_loadu_si128(S_CAST(const __m128i*, m2));
+    if (_mm_movemask_epi8(_mm_cmpeq_epi8(v1, v2)) != 65535) {
+      return 0;
+    }
+    const unsigned char* m1_uc = S_CAST(const unsigned char*, m1);
+    const unsigned char* m2_uc = S_CAST(const unsigned char*, m2);
+    v1 = _mm_loadu_si128(R_CAST(const __m128i*, &(m1_uc[N - 16])));
+    v2 = _mm_loadu_si128(R_CAST(const __m128i*, &(m2_uc[N - 16])));
+    return (_mm_movemask_epi8(_mm_cmpeq_epi8(v1, v2)) == 65535);
+  }
+};
+
+#  define memequal_k(m1, m2, byte_ct) plink2::MemequalKImpl<byte_ct>::MemequalK(m1, m2)
+
+template <uint32_t N, typename = TRange<true> > struct MemcpyKImpl {
+  static void MemcpyK(void* __restrict dst, const void* __restrict src) {
+    memcpy(dst, src, N);
+  }
+};
+
+// Patch a bunch of cases where some commonly-used gcc and clang versions
+// generate suboptimal code.  (Since this code is shamelessly x86-specific, we
+// don't worry about the formal undefinedness of unaligned pointer dereferences
+// here.)
+// (todo: check if/when this has been fixed, and remove this bloat once all
+// production build machines have sufficiently new compilers.)
+template <> struct MemcpyKImpl<2> {
+  static void MemcpyK(void* __restrict dst, const void* __restrict src) {
+    *S_CAST(uint16_t*, dst) = *S_CAST(const uint16_t*, src);
+  }
+};
+
+template <> struct MemcpyKImpl<3> {
+  static void MemcpyK(void* __restrict dst, const void* __restrict src) {
+    unsigned char* dst_uc = S_CAST(unsigned char*, dst);
+    const unsigned char* src_uc = S_CAST(const unsigned char*, src);
+    *S_CAST(uint16_t*, dst) = *S_CAST(const uint16_t*, src);
+    dst_uc[2] = src_uc[2];
+  }
+};
+
+template <> struct MemcpyKImpl<5> {
+  static void MemcpyK(void* __restrict dst, const void* __restrict src) {
+    unsigned char* dst_uc = S_CAST(unsigned char*, dst);
+    const unsigned char* src_uc = S_CAST(const unsigned char*, src);
+    *S_CAST(uint32_t*, dst) = *S_CAST(const uint32_t*, src);
+    dst_uc[4] = src_uc[4];
+  }
+};
+
+template <> struct MemcpyKImpl<6> {
+  static void MemcpyK(void* __restrict dst, const void* __restrict src) {
+    uint16_t* dst_u16 = S_CAST(uint16_t*, dst);
+    const uint16_t* src_u16 = S_CAST(const uint16_t*, src);
+    *S_CAST(uint32_t*, dst) = *S_CAST(const uint32_t*, src);
+    dst_u16[2] = src_u16[2];
+  }
+};
+
+template <> struct MemcpyKImpl<7> {
+  static void MemcpyK(void* __restrict dst, const void* __restrict src) {
+    unsigned char* dst_uc = S_CAST(unsigned char*, dst);
+    const unsigned char* src_uc = S_CAST(const unsigned char*, src);
+    *S_CAST(uint32_t*, dst) = *S_CAST(const uint32_t*, src);
+    *R_CAST(uint32_t*, &(dst_uc[3])) = *R_CAST(const uint32_t*, &(src_uc[3]));
+  }
+};
+
+template <> struct MemcpyKImpl<9> {
+  static void MemcpyK(void* __restrict dst, const void* __restrict src) {
+    unsigned char* dst_uc = S_CAST(unsigned char*, dst);
+    const unsigned char* src_uc = S_CAST(const unsigned char*, src);
+    *S_CAST(uint64_t*, dst) = *S_CAST(const uint64_t*, src);
+    dst_uc[8] = src_uc[8];
+  }
+};
+
+template <> struct MemcpyKImpl<10> {
+  static void MemcpyK(void* __restrict dst, const void* __restrict src) {
+    uint16_t* dst_u16 = S_CAST(uint16_t*, dst);
+    const uint16_t* src_u16 = S_CAST(const uint16_t*, src);
+    *S_CAST(uint64_t*, dst) = *S_CAST(const uint64_t*, src);
+    dst_u16[4] = src_u16[4];
+  }
+};
+
+template <uint32_t N> struct MemcpyKImpl<N, TRange<(11 <= N) && (N <= 12)> > {
+  static void MemcpyK(void* __restrict dst, const void* __restrict src) {
+    unsigned char* dst_uc = S_CAST(unsigned char*, dst);
+    const unsigned char* src_uc = S_CAST(const unsigned char*, src);
+    *S_CAST(uint64_t*, dst) = *S_CAST(const uint64_t*, src);
+    *R_CAST(uint32_t*, &(dst_uc[N - 4])) = *R_CAST(const uint32_t*, &(src_uc[N - 4]));
+  }
+};
+
+template <uint32_t N> struct MemcpyKImpl<N, TRange<(13 <= N) && (N <= 15)> > {
+  static void MemcpyK(void* __restrict dst, const void* __restrict src) {
+    unsigned char* dst_uc = S_CAST(unsigned char*, dst);
+    const unsigned char* src_uc = S_CAST(const unsigned char*, src);
+    *S_CAST(uint64_t*, dst) = *S_CAST(const uint64_t*, src);
+    *R_CAST(uint64_t*, &(dst_uc[N - 8])) = *R_CAST(const uint64_t*, &(src_uc[N - 8]));
+  }
+};
+
+template <> struct MemcpyKImpl<17> {
+  static void MemcpyK(void* __restrict dst, const void* __restrict src) {
+    unsigned char* dst_uc = S_CAST(unsigned char*, dst);
+    const unsigned char* src_uc = S_CAST(const unsigned char*, src);
+    const __m128i vv = _mm_loadu_si128(S_CAST(const __m128i*, src));
+    _mm_storeu_si128(S_CAST(__m128i*, dst), vv);
+    dst_uc[16] = src_uc[16];
+  }
+};
+
+template <> struct MemcpyKImpl<18> {
+  static void MemcpyK(void* __restrict dst, const void* __restrict src) {
+    uint16_t* dst_u16 = S_CAST(uint16_t*, dst);
+    const uint16_t* src_u16 = S_CAST(const uint16_t*, src);
+    const __m128i vv = _mm_loadu_si128(S_CAST(const __m128i*, src));
+    _mm_storeu_si128(S_CAST(__m128i*, dst), vv);
+    dst_u16[8] = src_u16[8];
+  }
+};
+
+template <uint32_t N> struct MemcpyKImpl<N, TRange<(19 <= N) && (N <= 20)> > {
+  static void MemcpyK(void* __restrict dst, const void* __restrict src) {
+    unsigned char* dst_uc = S_CAST(unsigned char*, dst);
+    const unsigned char* src_uc = S_CAST(const unsigned char*, src);
+    const __m128i vv = _mm_loadu_si128(S_CAST(const __m128i*, src));
+    _mm_storeu_si128(S_CAST(__m128i*, dst), vv);
+    *R_CAST(uint32_t*, &(dst_uc[N - 4])) = *R_CAST(const uint32_t*, &(src_uc[N - 4]));
+  }
+};
+
+template <uint32_t N> struct MemcpyKImpl<N, TRange<(21 <= N) && (N <= 24)> > {
+  static void MemcpyK(void* __restrict dst, const void* __restrict src) {
+    unsigned char* dst_uc = S_CAST(unsigned char*, dst);
+    const unsigned char* src_uc = S_CAST(const unsigned char*, src);
+    const __m128i vv = _mm_loadu_si128(S_CAST(const __m128i*, src));
+    _mm_storeu_si128(S_CAST(__m128i*, dst), vv);
+    *R_CAST(uint64_t*, &(dst_uc[N - 8])) = *R_CAST(const uint64_t*, &(src_uc[N - 8]));
+  }
+};
+
+template <uint32_t N> struct MemcpyKImpl<N, TRange<(25 <= N) && (N <= 31)> > {
+  static void MemcpyK(void* __restrict dst, const void* __restrict src) {
+    unsigned char* dst_uc = S_CAST(unsigned char*, dst);
+    const unsigned char* src_uc = S_CAST(const unsigned char*, src);
+    const __m128i v1 = _mm_loadu_si128(S_CAST(const __m128i*, src));
+    const __m128i v2 = _mm_loadu_si128(R_CAST(const __m128i*, &(src_uc[N - 16])));
+    _mm_storeu_si128(S_CAST(__m128i*, dst), v1);
+    _mm_storeu_si128(R_CAST(__m128i*, &(dst_uc[N - 16])), v2);
+  }
+};
+
+// Note that there's no difference between memcpy() and memcpy_k() for common
+// 'well-behaved' sizes like 1, 4, 8, and 16.  It's the funny numbers in
+// between, which often arise with constant strings, which this template is
+// targeting.
+#  define memcpy_k(dst, src, ct) plink2::MemcpyKImpl<ct>::MemcpyK(dst, src)
+
+template <uint32_t N> char* MemcpyaK(void* __restrict dst, const void* __restrict src) {
+  MemcpyKImpl<N>::MemcpyK(dst, src);
+  char* dst_c = S_CAST(char*, dst);
+  return &(dst_c[N]);
+}
+
+#  define memcpya_k(dst, src, ct) plink2::MemcpyaK<ct>(dst, src)
+#  define memcpyua_k(dst, src, ct) CToUc(plink2::MemcpyaK<ct>(dst, src))
+
+template <uint32_t N> struct MemcpyoKImpl {
+  static void MemcpyoK(void* __restrict dst, const void* __restrict src) {
+    MemcpyKImpl<N>::MemcpyK(dst, src);
+  }
+};
+
+template <> struct MemcpyoKImpl<3> {
+  static void MemcpyoK(void* __restrict dst, const void* __restrict src) {
+    *S_CAST(uint32_t*, dst) = *S_CAST(const uint32_t*, src);
+  }
+};
+
+template <> struct MemcpyoKImpl<7> {
+  static void MemcpyoK(void* __restrict dst, const void* __restrict src) {
+    *S_CAST(uint64_t*, dst) = *S_CAST(const uint64_t*, src);
+  }
+};
+
+template <> struct MemcpyoKImpl<15> {
+  static void MemcpyoK(void* __restrict dst, const void* __restrict src) {
+    const __m128i vv = _mm_loadu_si128(S_CAST(const __m128i*, src));
+    _mm_storeu_si128(S_CAST(__m128i*, dst), vv);
+  }
+};
+
+// interestingly, __m256i copy does not seem to be better in 31 byte case
+
+#  define memcpyo_k(dst, src, ct) plink2::MemcpyoKImpl<ct>::MemcpyoK(dst, src)
+
+template <uint32_t N> char* MemcpyaoK(void* __restrict dst, const void* __restrict src) {
+  MemcpyoKImpl<N>::MemcpyoK(dst, src);
+  char* dst_c = S_CAST(char*, dst);
+  return &(dst_c[N]);
+}
+
+#  define memcpyao_k(dst, src, ct) plink2::MemcpyaoK<ct>(dst, src)
+#  define memcpyuao_k(dst, src, ct) DowncastToUc(plink2::MemcpyaoK<ct>(dst, src))
+
+#  else  // !(defined(__LP64__) && defined(__cplusplus) && !defined(NO_UNALIGNED))
+
+HEADER_INLINE int32_t memequal_k(const void* m1, const void* m2, uintptr_t ct) {
+  return !memcmp(m1, m2, ct);
+}
+
+HEADER_INLINE void memcpy_k(void* __restrict dst, const void* __restrict src, uintptr_t ct) {
+  memcpy(dst, src, ct);
+}
+
+HEADER_INLINE char* memcpya_k(void* __restrict dst, const void* __restrict src, uintptr_t ct) {
+  return memcpya(dst, src, ct);
+}
+
+HEADER_INLINE unsigned char* memcpyua_k(void* __restrict dst, const void* __restrict src, uintptr_t ct) {
+  return memcpyua(dst, src, ct);
+}
+
+HEADER_INLINE void memcpyo_k(void* __restrict dst, const void* __restrict src, uintptr_t ct) {
+  memcpy(dst, src, ct);
+}
+
+HEADER_INLINE char* memcpyao_k(void* __restrict dst, const void* __restrict src, uintptr_t ct) {
+  return memcpya(dst, src, ct);
+}
+
+HEADER_INLINE unsigned char* memcpyuao_k(void* __restrict dst, const void* __restrict src, uintptr_t ct) {
+  return memcpyua(dst, src, ct);
+}
+
+#endif
+
+HEADER_INLINE char* strcpya(char* __restrict dst, const void* __restrict src) {
+  const uintptr_t slen = strlen(S_CAST(const char*, src));
+  return memcpya(dst, src, slen);
+}
+
+#if defined(__LP64__) && (__cplusplus >= 201103L)
+constexpr uint32_t CompileTimeSlen(const char* k_str) {
+  return k_str[0]? (1 + CompileTimeSlen(&(k_str[1]))) : 0;
+}
+#endif
+
+#if defined(USE_SSE2) && (__cplusplus >= 201103L) && !defined(NO_UNALIGNED)
+
+#  define strcpy_k(dst, src) plink2::MemcpyKImpl<plink2::CompileTimeSlen(src) + 1>::MemcpyK(dst, src);
+
+#  define strcpya_k(dst, src) plink2::MemcpyaoK<plink2::CompileTimeSlen(src)>(dst, src);
+
+#else
+
+HEADER_INLINE void strcpy_k(char* __restrict dst, const void* __restrict src) {
+  strcpy(dst, S_CAST(const char*, src));
+}
+
+HEADER_INLINE char* strcpya_k(char* __restrict dst, const void* __restrict src) {
+  return strcpya(dst, src);
+}
+
+#endif
+
+// A few more string-rendering functions that would normally live in
+// plink2_string, to work around PRI{d,u}PTR and PRI{d,u}64 warning on CRAN
+// Windows builds.
+
+extern const uint16_t kDigitPair[];
+
+char* u32toa(uint32_t uii, char* start);
+
+HEADER_INLINE char* uitoa_z4(uint32_t uii, char* start) {
+  uint32_t quotient = uii / 100;
+  assert(quotient < 100);
+  uii -= 100 * quotient;
+  start = memcpya_k(start, &(kDigitPair[quotient]), 2);
+  return memcpya_k(start, &(kDigitPair[uii]), 2);
+}
+
+HEADER_INLINE char* u32toa_z6(uint32_t uii, char* start) {
+  uint32_t quotient = uii / 10000;
+  start = memcpya_k(start, &(kDigitPair[quotient]), 2);
+  return uitoa_z4(uii - 10000 * quotient, start);
+}
+
+HEADER_INLINE char* uitoa_z8(uint32_t uii, char* start) {
+  uint32_t quotient = uii / 1000000;
+  start = memcpya_k(start, &(kDigitPair[quotient]), 2);
+  return u32toa_z6(uii - 1000000 * quotient, start);
+}
+
+char* i64toa(int64_t llii, char* start);
+
+#ifdef __LP64__
+// really just for printing line numbers
+// must be less than 2^63
+HEADER_INLINE char* wtoa(uintptr_t ulii, char* start) {
+  return i64toa(ulii, start);
+}
+#else
+HEADER_INLINE char* wtoa(uintptr_t ulii, char* start) {
+  return u32toa(ulii, start);
+}
+#endif
+
+HEADER_INLINE void CopyFromUnalignedW(uintptr_t* dst, const unsigned char* src) {
+  memcpy_k(dst, src, kBytesPerWord);
+}
+
+HEADER_INLINE void CopyFromUnalignedU32(uint32_t* dst, const unsigned char* src) {
+  memcpy_k(dst, src, sizeof(int32_t));
+}
+
+HEADER_INLINE void CopyFromUnalignedU16(uint16_t* dst, const unsigned char* src) {
+  memcpy_k(dst, src, sizeof(int16_t));
+}
+
+HEADER_INLINE void CopyFromUnalignedI16(int16_t* dst, const unsigned char* src) {
+  memcpy_k(dst, src, sizeof(int16_t));
+}
+
+HEADER_INLINE void CopyFromUnalignedF(float* dst, const unsigned char* src) {
+  memcpy_k(dst, src, sizeof(float));
+}
+
+// [u]int16_t (and unsigned char) arithmetic is slower than uint32_t/uint64_t
+// arithmetic on some CPUs.
+// todo: check whether uint32_t vs. uintptr_t return value matters
+HEADER_INLINE uint32_t CopyFromUnalignedU16ZX(const unsigned char* src) {
+#ifndef NO_UNALIGNED
+  return *R_CAST(const uint16_t*, src);
+#else
+  uint16_t cur_u16;
+  memcpy_k(&cur_u16, src, sizeof(int16_t));
+  return cur_u16;
+#endif
+}
+
+HEADER_INLINE int32_t CopyFromUnalignedI16ZX(const unsigned char* src) {
+#ifndef NO_UNALIGNED
+  return *R_CAST(const int16_t*, src);
+#else
+  int16_t cur_i16;
+  memcpy_k(&cur_i16, src, sizeof(int16_t));
+  return cur_i16;
+#endif
+}
+
+HEADER_INLINE void CopyToUnalignedW(unsigned char* dst, const uintptr_t* src) {
+  memcpy_k(dst, src, kBytesPerWord);
+}
+
+HEADER_INLINE void CopyToUnalignedU64(unsigned char* dst, const uint64_t* src) {
+  memcpy_k(dst, src, sizeof(int64_t));
+}
+
+HEADER_INLINE void CopyToUnalignedU32(unsigned char* dst, const uint32_t* src) {
+  memcpy_k(dst, src, sizeof(int32_t));
+}
+
+HEADER_INLINE void CopyToUnalignedF(unsigned char* dst, const float* src) {
+  memcpy_k(dst, src, sizeof(float));
+}
+
+HEADER_INLINE void CopyFromUnalignedOffsetW(uintptr_t* dst, const unsigned char* src, uintptr_t offset) {
+  memcpy_k(dst, &(src[offset * kBytesPerWord]), kBytesPerWord);
+}
+
+HEADER_INLINE void CopyFromUnalignedOffsetHW(Halfword* dst, const unsigned char* src, uintptr_t offset) {
+  memcpy_k(dst, &(src[offset * sizeof(Halfword)]), sizeof(Halfword));
+}
+
+HEADER_INLINE void CopyFromUnalignedOffsetQW(Quarterword* dst, const unsigned char* src, uintptr_t offset) {
+  memcpy_k(dst, &(src[offset * sizeof(Quarterword)]), sizeof(Quarterword));
+}
+
+HEADER_INLINE void CopyFromUnalignedOffsetU64(uint64_t* dst, const unsigned char* src, uintptr_t offset) {
+  memcpy_k(dst, &(src[offset * sizeof(int64_t)]), sizeof(int64_t));
+}
+
+HEADER_INLINE void CopyFromUnalignedOffsetU32(uint32_t* dst, const unsigned char* src, uintptr_t offset) {
+  memcpy_k(dst, &(src[offset * sizeof(int32_t)]), sizeof(int32_t));
+}
+
+HEADER_INLINE void CopyFromUnalignedOffsetI32(int32_t* dst, const unsigned char* src, uintptr_t offset) {
+  memcpy_k(dst, &(src[offset * sizeof(int32_t)]), sizeof(int32_t));
+}
+
+HEADER_INLINE void CopyFromUnalignedOffsetU16(uint16_t* dst, const unsigned char* src, uintptr_t offset) {
+  memcpy_k(dst, &(src[offset * sizeof(int16_t)]), sizeof(int16_t));
+}
+
+HEADER_INLINE void CopyFromUnalignedOffsetI16(int16_t* dst, const unsigned char* src, uintptr_t offset) {
+  memcpy_k(dst, &(src[offset * sizeof(int16_t)]), sizeof(int16_t));
+}
+
+HEADER_INLINE void CopyFromUnalignedOffsetF(float* dst, const unsigned char* src, uintptr_t offset) {
+  memcpy_k(dst, &(src[offset * sizeof(float)]), sizeof(float));
+}
+
+HEADER_INLINE uint32_t CopyFromUnalignedOffsetU16ZX(const unsigned char* src, uintptr_t offset) {
+#ifndef NO_UNALIGNED
+  return R_CAST(const uint16_t*, src)[offset];
+#else
+  uint16_t cur_u16;
+  memcpy_k(&cur_u16, &(src[offset * sizeof(int16_t)]), sizeof(int16_t));
+  return cur_u16;
+#endif
+}
+
+HEADER_INLINE int32_t CopyFromUnalignedOffsetI16ZX(const unsigned char* src, uintptr_t offset) {
+#ifndef NO_UNALIGNED
+  return R_CAST(const int16_t*, src)[offset];
+#else
+  int16_t cur_i16;
+  memcpy_k(&cur_i16, &(src[offset * sizeof(int16_t)]), sizeof(int16_t));
+  return cur_i16;
+#endif
+}
+
+HEADER_INLINE void CopyToUnalignedOffsetW(unsigned char* dst, const uintptr_t* src, uintptr_t offset) {
+  memcpy_k(&(dst[offset * sizeof(intptr_t)]), src, sizeof(intptr_t));
+}
+
+HEADER_INLINE void CopyToUnalignedOffsetHW(unsigned char* dst, const Halfword* src, uintptr_t offset) {
+  memcpy_k(&(dst[offset * sizeof(Halfword)]), src, sizeof(Halfword));
+}
+
+HEADER_INLINE void CopyToUnalignedOffsetU64(unsigned char* dst, const uint64_t* src, uintptr_t offset) {
+  memcpy_k(&(dst[offset * sizeof(int64_t)]), src, sizeof(int64_t));
+}
+
+HEADER_INLINE void CopyToUnalignedOffsetU32(unsigned char* dst, const uint32_t* src, uintptr_t offset) {
+  memcpy_k(&(dst[offset * sizeof(int32_t)]), src, sizeof(int32_t));
+}
+
+HEADER_INLINE void CopyToUnalignedOffsetU16(unsigned char* dst, const uint16_t* src, uintptr_t offset) {
+  memcpy_k(&(dst[offset * sizeof(int16_t)]), src, sizeof(int16_t));
+}
+
+HEADER_INLINE void CopyToUnalignedOffsetI16(unsigned char* dst, const int16_t* src, uintptr_t offset) {
+  memcpy_k(&(dst[offset * sizeof(int16_t)]), src, sizeof(int16_t));
+}
+
+HEADER_INLINE void CopyToUnalignedOffsetF(unsigned char* dst, const float* src, uintptr_t offset) {
+  memcpy_k(&(dst[offset * sizeof(float)]), src, sizeof(float));
+}
+
+#ifdef USE_SSE2
+HEADER_INLINE void CopyToUnalignedOffsetV8(unsigned char* dst, const Vec8thUint* src, uintptr_t offset) {
+  memcpy_k(&(dst[offset * sizeof(Vec8thUint)]), src, sizeof(Vec8thUint));
+}
+
+HEADER_INLINE void CopyToUnalignedOffsetV16(unsigned char* dst, const Vec16thUint* src, uintptr_t offset) {
+  memcpy_k(&(dst[offset * sizeof(Vec16thUint)]), src, sizeof(Vec16thUint));
+}
+#endif
+
+HEADER_INLINE void CopyFromUnalignedIncrW(uintptr_t* dst, const unsigned char** srcp) {
+  memcpy_k(dst, *srcp, kBytesPerWord);
+  *srcp += kBytesPerWord;
+}
+
+HEADER_INLINE void CopyFromUnalignedIncrU32(uint32_t* dst, const unsigned char** srcp) {
+  memcpy_k(dst, *srcp, sizeof(int32_t));
+  *srcp += sizeof(int32_t);
+}
+
+HEADER_INLINE void CopyFromUnalignedIncrU16(uint16_t* dst, const unsigned char** srcp) {
+  memcpy_k(dst, *srcp, sizeof(int16_t));
+  *srcp += sizeof(int16_t);
+}
+
+HEADER_INLINE void CopyFromUnalignedIncrI16(int16_t* dst, const unsigned char** srcp) {
+  memcpy_k(dst, *srcp, sizeof(int16_t));
+  *srcp += sizeof(int16_t);
+}
+
+HEADER_INLINE uint32_t CopyFromUnalignedIncrU16ZX(const unsigned char** srcp) {
+#ifndef NO_UNALIGNED
+  const uint32_t result = *R_CAST(const uint16_t*, *srcp);
+#else
+  uint16_t result;
+  memcpy_k(&result, *srcp, sizeof(int16_t));
+#endif
+  *srcp += sizeof(int16_t);
+  return result;
+}
+
+HEADER_INLINE int32_t CopyFromUnalignedIncrI16ZX(const unsigned char** srcp) {
+#ifndef NO_UNALIGNED
+  const int32_t result = *R_CAST(const int16_t*, *srcp);
+#else
+  int16_t result;
+  memcpy_k(&result, *srcp, sizeof(int16_t));
+#endif
+  *srcp += sizeof(int16_t);
+  return result;
+}
+
+// no need to spell out 'CopyToUnalignedIncr' here; and we append constants
+// often enough to justify no src pointer
+
+HEADER_INLINE void AppendW(uintptr_t ulii, unsigned char** targetp) {
+  memcpy_k(*targetp, &ulii, kBytesPerWord);
+  *targetp += kBytesPerWord;
+}
+
+HEADER_INLINE void AppendU64(uint64_t ullii, unsigned char** targetp) {
+  memcpy_k(*targetp, &ullii, sizeof(int64_t));
+  *targetp += sizeof(int64_t);
+}
+
+HEADER_INLINE void AppendU32(uint32_t uii, unsigned char** targetp) {
+  memcpy_k(*targetp, &uii, sizeof(int32_t));
+  *targetp += sizeof(int32_t);
+}
+
+HEADER_INLINE void AppendU16(uint16_t usii, unsigned char** targetp) {
+  memcpy_k(*targetp, &usii, sizeof(int16_t));
+  *targetp += sizeof(int16_t);
+}
+
+HEADER_INLINE void CAppendW(uintptr_t ulii, char** targetp) {
+  memcpy_k(*targetp, &ulii, kBytesPerWord);
+  *targetp += kBytesPerWord;
+}
+
+HEADER_INLINE void CAppendU32(uint32_t uii, char** targetp) {
+  memcpy_k(*targetp, &uii, sizeof(int32_t));
+  *targetp += sizeof(int32_t);
+}
+
+HEADER_INLINE void CAppendU16(uint16_t usii, char** targetp) {
+  memcpy_k(*targetp, &usii, sizeof(int16_t));
+  *targetp += sizeof(int16_t);
+}
+
+
+// now compiling with gcc >= 4.4 (or clang equivalent) on all platforms, so
+// safe to use memset everywhere
+HEADER_INLINE void ZeroU32Arr(uintptr_t entry_ct, uint32_t* u32arr) {
+  memset(u32arr, 0, entry_ct * sizeof(int32_t));
+}
+
+HEADER_INLINE void ZeroWArr(uintptr_t entry_ct, uintptr_t* warr) {
+  memset(warr, 0, entry_ct * sizeof(intptr_t));
+}
+
+HEADER_INLINE void ZeroU64Arr(uintptr_t entry_ct, uint64_t* u64arr) {
+  memset(u64arr, 0, entry_ct * sizeof(int64_t));
+}
+
+HEADER_INLINE void ZeroPtrArr(uintptr_t entry_ct, void* pp) {
+  memset(pp, 0, entry_ct * sizeof(intptr_t));
+}
+
+HEADER_INLINE void ZeroHwArr(uintptr_t entry_ct, Halfword* hwarr) {
+  memset(hwarr, 0, entry_ct * sizeof(Halfword));
+}
+
+HEADER_INLINE void SetAllWArr(uintptr_t entry_ct, uintptr_t* warr) {
+  // todo: test this against vecset()
+  for (uintptr_t idx = 0; idx != entry_ct; ++idx) {
+    warr[idx] = ~k0LU;
+  }
+}
+
+
+// tried _bzhi_u64() in AVX2 case, it was actually worse on my Mac (more
+// opaque to compiler?)
+// todo: check gcc behavior since it may be different: see
+// https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82298 .
+//
+// This is undefined if idx == kBitsPerWord.
+HEADER_INLINE uintptr_t bzhi(uintptr_t ww, uint32_t idx) {
+  return ww & ((k1LU << idx) - k1LU);
+}
+
+// This is undefined if idx == 0.
+HEADER_INLINE uintptr_t bzhi_max(uintptr_t ww, uint32_t idx) {
+  return ww & ((~k0LU) >> (kBitsPerWord - idx));
+}
+
+// Don't bother defining blsr(), compiler should automatically use the
+// instruction under -mbmi and regular code is more readable?  (again, should
+// verify this is true for gcc)
+
+HEADER_INLINE uint32_t BytesToRepresentNzU32(uint32_t uii) {
+  return 1 + (bsru32(uii) / CHAR_BIT);
+}
+
+// analogous to memset()
+// this can be slightly slower if e.g. system supports AVX2 but non-AVX2 plink2
+// build is in use; fine to pay that price given the small-array advantage for
+// now.  Should revisit this after next build-machine Ubuntu upgrade, though.
+HEADER_INLINE void vecset(void* target_vec, uintptr_t ww, uintptr_t vec_ct) {
+  VecW* target_vec_iter = S_CAST(VecW*, target_vec);
+#ifdef USE_SSE2
+  const VecW payload = VCONST_W(ww);
+  for (uintptr_t vec_idx = 0; vec_idx != vec_ct; ++vec_idx) {
+    *target_vec_iter++ = payload;
+  }
+#else
+  for (uintptr_t vec_idx = 0; vec_idx != vec_ct; ++vec_idx) {
+    *target_vec_iter++ = ww;
+  }
+#endif
+}
+
+// todo: make sure these are efficient for small ct
+HEADER_INLINE void u16set(void* dst, uint16_t usii, uintptr_t ct) {
+  uint16_t* dst_u16 = S_CAST(uint16_t*, dst);
+  for (uintptr_t ulii = 0; ulii != ct; ++ulii) {
+    dst_u16[ulii] = usii;
+  }
+}
+
+HEADER_INLINE char* u16setsa(char* dst, uint16_t usii, uintptr_t ct) {
+  u16set(dst, usii, ct);
+  return &(dst[ct * 2]);
+}
+
+HEADER_INLINE uintptr_t ClearBottomSetBits(uint32_t ct, uintptr_t ulii) {
+#ifdef USE_AVX2
+  return _pdep_u64((~k0LU) << ct, ulii);
+#else
+  for (uint32_t uii = 0; uii != ct; ++uii) {
+    ulii &= ulii - 1;
+  }
+  return ulii;
+#endif
+}
+
+HEADER_INLINE uint32_t WordBitIdxToUidx(uintptr_t ulii, uint32_t bit_idx) {
+  return ctzw(ClearBottomSetBits(bit_idx, ulii));
+}
+
+CONSTI32(kNybblesPerWord, 2 * kBytesPerWord);
+CONSTI32(kNybblesPerCacheline, 2 * kCacheline);
+
+HEADER_CINLINE uintptr_t NybbleCtToByteCt(uintptr_t val) {
+  return DivUp(val, 2);
+}
+
+HEADER_CINLINE uintptr_t NybbleCtToWordCt(uintptr_t val) {
+  return DivUp(val, kNybblesPerWord);
+}
+
+HEADER_INLINE uintptr_t GetNybbleArrEntry(const uintptr_t* nybblearr, uint32_t idx) {
+  return (nybblearr[idx / kBitsPerWordD4] >> (4 * (idx % kBitsPerWordD4))) & 15;
+}
+
+// Returns zero when ww has no zero bytes, and a word where the lowest set bit
+// is at position 8x + 7 when the first zero byte is [8x .. 8x+7].
+HEADER_INLINE uintptr_t DetectFirstZeroByte(uintptr_t ww) {
+  return (ww - kMask0101) & (~ww) & (kMask0101 * 0x80);
+}
+
+// From TAOCP 4a, 7.1.3, (91).
+// Position 8x + 7 is always set iff byte x is zero.  All other bits are always
+// zero.
+HEADER_INLINE uintptr_t DetectAllZeroBytes(uintptr_t ww) {
+  return (kMask0101 * 0x80) & (~(ww | ((ww | (kMask0101 * 0x80)) - kMask0101)));
+}
+
+HEADER_INLINE uintptr_t DetectAllZeroNybbles(uintptr_t ww) {
+  return (kMask1111 * 8) & (~(ww | ((ww | (kMask1111 * 8)) - kMask1111)));
+}
+
+#if defined(USE_SSE2) && !defined(NO_UNALIGNED)
+// This requires nbytes >= 4.
+uintptr_t FirstUnequal4(const void* arr1, const void* arr2, uintptr_t nbytes);
+
+HEADER_INLINE uintptr_t FirstUnequal(const void* arr1, const void* arr2, uintptr_t nbytes) {
+  // Returns position of first byte mismatch, or nbytes if none was found.
+  if (nbytes >= 4) {
+    return FirstUnequal4(arr1, arr2, nbytes);
+  }
+  const char* s1 = S_CAST(const char*, arr1);
+  const char* s2 = S_CAST(const char*, arr2);
+  for (uintptr_t pos = 0; pos != nbytes; ++pos) {
+    if (s1[pos] != s2[pos]) {
+      return pos;
+    }
+  }
+  return nbytes;
+}
+#else // !(defined(USE_SSE2) && !defined(NO_UNALIGNED))
+// This requires nbytes >= kBytesPerWord.
+uintptr_t FirstUnequalW(const void* arr1, const void* arr2, uintptr_t nbytes);
+
+HEADER_INLINE uintptr_t FirstUnequal(const void* arr1, const void* arr2, uintptr_t nbytes) {
+  // Returns position of first byte mismatch, or nbytes if none was found.
+  if (nbytes >= kBytesPerWord) {
+    return FirstUnequalW(arr1, arr2, nbytes);
+  }
+  const char* s1 = S_CAST(const char*, arr1);
+  const char* s2 = S_CAST(const char*, arr2);
+  for (uintptr_t pos = 0; pos != nbytes; ++pos) {
+    if (s1[pos] != s2[pos]) {
+      return pos;
+    }
+  }
+  return nbytes;
+}
+#endif
+
+
+HEADER_INLINE uintptr_t FirstUnequalFrom(const void* arr1, const void* arr2, uintptr_t start, uintptr_t nbytes) {
+  const char* s1 = S_CAST(const char*, arr1);
+  const char* s2 = S_CAST(const char*, arr2);
+  return start + FirstUnequal(&(s1[start]), &(s2[start]), nbytes - start);
+}
+
+
+HEADER_INLINE void* arena_alloc_raw(uintptr_t size, unsigned char** arena_bottom_ptr) {
+  assert(!(size % kCacheline));
+  unsigned char* alloc_ptr = *arena_bottom_ptr;
+  *arena_bottom_ptr = &(alloc_ptr[size]);
+  return alloc_ptr;
+}
+
+HEADER_INLINE void* arena_alloc_raw_rd(uintptr_t size, unsigned char** arena_bottom_ptr) {
+  unsigned char* alloc_ptr = *arena_bottom_ptr;
+  *arena_bottom_ptr = &(alloc_ptr[RoundUpPow2(size, kCacheline)]);
+  return alloc_ptr;
+}
+
+// A VINT is a sequence of bytes where each byte stores just 7 bits of an
+// an integer, and the high bit is set when the integer has more nonzero bits.
+// See e.g.
+//   https://developers.google.com/protocol-buffers/docs/encoding#varints
+// (Note that protocol buffers used "group varints" at one point, but then
+// abandoned them.  I suspect they'd be simultaneously slower and less
+// compact here.)
+
+HEADER_INLINE unsigned char* Vint32Append(uint32_t uii, unsigned char* buf) {
+  while (uii > 127) {
+    *buf++ = (uii & 127) + 128;
+    uii >>= 7;
+  }
+  *buf++ = uii;
+  return buf;
+}
+
+// Returns 0x80000000U on read-past-end instead of UINT32_MAX so overflow check
+// works properly in 32-bit build.  Named "GetVint31" to make it more obvious
+// that a 2^31 return value can't be legitimate.
+HEADER_INLINE uint32_t GetVint31(const unsigned char* buf_end, const unsigned char** buf_iterp) {
+  if (likely(buf_end > (*buf_iterp))) {
+    uint32_t vint32 = *((*buf_iterp)++);
+    if (vint32 <= 127) {
+      return vint32;
+    }
+    vint32 &= 127;
+    uint32_t shift = 7;
+    while (likely(buf_end > (*buf_iterp))) {
+      uint32_t uii = *((*buf_iterp)++);
+      vint32 |= (uii & 127) << shift;
+      if (uii <= 127) {
+        return vint32;
+      }
+      shift += 7;
+      // currently don't check for shift >= 32 (that's what ValidateVint31()
+      // is for).
+    }
+  }
+  return 0x80000000U;
+}
+
+#ifdef __LP64__
+uintptr_t CountVintsNonempty(const unsigned char* buf, const unsigned char* buf_end);
+
+HEADER_INLINE uintptr_t CountVints(const unsigned char* buf, const unsigned char* buf_end) {
+  if (buf == buf_end) {
+    return 0;
+  }
+  return CountVintsNonempty(buf, buf_end);
+}
+#else
+uintptr_t CountVints(const unsigned char* buf, const unsigned char* buf_end);
+
+HEADER_INLINE uintptr_t CountVintsNonempty(const unsigned char* buf, const unsigned char* buf_end) {
+  return CountVints(buf, buf_end);
+}
+#endif
+
+// Number of bytes required to encode ulii as a varint.
+HEADER_INLINE uint32_t VintBytect(uintptr_t ulii) {
+  if (ulii < 128) {
+    // bsrw(0) is undefined.
+    return 1;
+  }
+  return 1 + (bsrw(ulii) / 7);
+}
+
+// Flagset conventions:
+// * Each 32-bit and 64-bit flagset has its own type, which is guaranteed to be
+//   the appropriate width.  (Todo: verify that bit 31 works properly in 32-bit
+//   case.)
+// * Constant flag names start with "kf[CamelCase description]", followed by a
+//   description that shouldn't suck too badly.  The zero flagset is always
+//   named kf[CamelCase description]0.
+// * The type name is always of the form [snake_case description]_flags_t.
+// * To gain the desired level of type-checking under C++11 without pointless
+//   verbosity, &, |, ^, ~, &=, |=, and ^= operations are defined; [my_flags_t
+//   variable] |= [another my_flags_t variable] & [a my_flags_t constant] works
+//   without an explicit cast.  (Defining "struct my_flags_t" separately from
+//   the enum global-scope-constants container is necessary to make |= work
+//   without a cast.  inline is needed due to duplicate operator definitions
+//   across multiple files.)
+// * To slightly reduce the chance of breakage under C99/C++03, the enum is
+//   nameless; the flagset type is just a uint32_t/uint64_t alias.  This is
+//   because the C99 and C++03 specs do not provide enough control over the
+//   enum base type to make it safe for the enum to serve as the flagset type.
+// * Implicit conversion to int is not prevented for now, since I'm trying to
+//   keep PglErr-style code duplication to a minimum.
+#if __cplusplus >= 201103L
+
+  // could avoid the typedef here, but that leads to a bit more verbosity.
+#  define FLAGSET_DEF_START() typedef enum : uint32_t {
+#  define FLAGSET_DEF_END(tname) } tname ## _PLINK2_BASE_DO_NOT_USE__ ; \
+  \
+inline tname ## _PLINK2_BASE_DO_NOT_USE__ operator|(tname ## _PLINK2_BASE_DO_NOT_USE__ aa, tname ## _PLINK2_BASE_DO_NOT_USE__ bb) { \
+  return static_cast<tname ## _PLINK2_BASE_DO_NOT_USE__>(static_cast<uint32_t>(aa) | static_cast<uint32_t>(bb)); \
+} \
+  \
+inline tname ## _PLINK2_BASE_DO_NOT_USE__ operator&(tname ## _PLINK2_BASE_DO_NOT_USE__ aa, tname ## _PLINK2_BASE_DO_NOT_USE__ bb) { \
+  return static_cast<tname ## _PLINK2_BASE_DO_NOT_USE__>(static_cast<uint32_t>(aa) & static_cast<uint32_t>(bb)); \
+} \
+  \
+inline tname ## _PLINK2_BASE_DO_NOT_USE__ operator^(tname ## _PLINK2_BASE_DO_NOT_USE__ aa, tname ## _PLINK2_BASE_DO_NOT_USE__ bb) { \
+  return static_cast<tname ## _PLINK2_BASE_DO_NOT_USE__>(static_cast<uint32_t>(aa) ^ static_cast<uint32_t>(bb)); \
+} \
+  \
+inline tname ## _PLINK2_BASE_DO_NOT_USE__ operator~(tname ## _PLINK2_BASE_DO_NOT_USE__ aa) { \
+  return static_cast<tname ## _PLINK2_BASE_DO_NOT_USE__>(~static_cast<uint32_t>(aa)); \
+} \
+  \
+struct tname { \
+  tname() {} \
+  \
+  tname(const tname& source) : value_(source.value_) {} \
+  \
+  tname(const tname ## _PLINK2_BASE_DO_NOT_USE__ source) : value_(static_cast<uint32_t>(source)) {} \
+  \
+  explicit tname(uint32_t source) : value_(source) {} \
+  \
+  operator tname ## _PLINK2_BASE_DO_NOT_USE__() const { \
+    return static_cast<tname ## _PLINK2_BASE_DO_NOT_USE__>(value_); \
+  } \
+  \
+  tname& operator|=(const tname ## _PLINK2_BASE_DO_NOT_USE__ rhs) { \
+    value_ |= rhs; \
+    return *this; \
+  } \
+  \
+  tname& operator&=(const tname ## _PLINK2_BASE_DO_NOT_USE__ rhs) { \
+    value_ &= rhs; \
+    return *this; \
+  } \
+  \
+  tname& operator^=(const tname ## _PLINK2_BASE_DO_NOT_USE__ rhs) { \
+    value_ ^= rhs; \
+    return *this; \
+  } \
+  \
+  tname& operator=(const tname& rhs) = default; \
+  \
+private: \
+  uint32_t value_; \
+}
+
+#  define FLAGSET64_DEF_START() typedef enum : uint64_t {
+#  define FLAGSET64_DEF_END(tname) } tname ## _PLINK2_BASE_DO_NOT_USE__ ; \
+  \
+inline tname ## _PLINK2_BASE_DO_NOT_USE__ operator|(tname ## _PLINK2_BASE_DO_NOT_USE__ aa, tname ## _PLINK2_BASE_DO_NOT_USE__ bb) { \
+  return static_cast<tname ## _PLINK2_BASE_DO_NOT_USE__>(static_cast<uint64_t>(aa) | static_cast<uint64_t>(bb)); \
+} \
+  \
+inline tname ## _PLINK2_BASE_DO_NOT_USE__ operator&(tname ## _PLINK2_BASE_DO_NOT_USE__ aa, tname ## _PLINK2_BASE_DO_NOT_USE__ bb) { \
+  return static_cast<tname ## _PLINK2_BASE_DO_NOT_USE__>(static_cast<uint64_t>(aa) & static_cast<uint64_t>(bb)); \
+} \
+  \
+inline tname ## _PLINK2_BASE_DO_NOT_USE__ operator^(tname ## _PLINK2_BASE_DO_NOT_USE__ aa, tname ## _PLINK2_BASE_DO_NOT_USE__ bb) { \
+  return static_cast<tname ## _PLINK2_BASE_DO_NOT_USE__>(static_cast<uint64_t>(aa) ^ static_cast<uint64_t>(bb)); \
+} \
+  \
+inline tname ## _PLINK2_BASE_DO_NOT_USE__ operator~(tname ## _PLINK2_BASE_DO_NOT_USE__ aa) { \
+  return static_cast<tname ## _PLINK2_BASE_DO_NOT_USE__>(~static_cast<uint64_t>(aa)); \
+} \
+  \
+struct tname { \
+  tname() {} \
+  \
+  tname(const tname& source) : value_(source.value_) {} \
+  \
+  tname(const tname ## _PLINK2_BASE_DO_NOT_USE__ source) : value_(static_cast<uint64_t>(source)) {} \
+  \
+  explicit tname(uint64_t source) : value_(source) {} \
+  \
+  operator tname ## _PLINK2_BASE_DO_NOT_USE__() const { \
+    return static_cast<tname ## _PLINK2_BASE_DO_NOT_USE__>(value_); \
+  } \
+  \
+  tname& operator|=(const tname ## _PLINK2_BASE_DO_NOT_USE__ rhs) { \
+    value_ |= rhs; \
+    return *this; \
+  } \
+  \
+  tname& operator&=(const tname ## _PLINK2_BASE_DO_NOT_USE__ rhs) { \
+    value_ &= rhs; \
+    return *this; \
+  } \
+  \
+  tname& operator^=(const tname ## _PLINK2_BASE_DO_NOT_USE__ rhs) { \
+    value_ ^= rhs; \
+    return *this; \
+  } \
+  \
+  tname& operator=(const tname& rhs) = default; \
+  \
+private: \
+  uint64_t value_; \
+}
+
+#  define ENUM_U31_DEF_START() typedef enum : uint32_t {
+#  define ENUM_U31_DEF_END(tname) } tname
+
+#else  // !__cplusplus >= 201103L
+
+#  define FLAGSET_DEF_START() enum {
+#  define FLAGSET_DEF_END(tname) } ; \
+typedef uint32_t tname
+
+  // don't use a nameless enum here, since we want to be able to static_assert
+  // the enum size.
+  // best to artificially add an element to the end for now to force width to
+  // 64-bit, otherwise gcc actually shrinks it even when the constants are
+  // defined with LLU.
+#  define FLAGSET64_DEF_START() typedef enum {
+#  define FLAGSET64_DEF_END(tname) , \
+  tname ## PLINK2_BASE_DO_NOT_USE__ALL_64_SET__ = ~(0LLU) } tname ## _PLINK2_BASE_DO_NOT_USE__ ; \
+static_assert(sizeof(tname ## _PLINK2_BASE_DO_NOT_USE__) == 8, "64-bit flagset constants are not actually uint64_ts."); \
+typedef uint64_t tname
+
+#  define ENUM_U31_DEF_START() typedef enum {
+#  define ENUM_U31_DEF_END(tname) } tname ## _PLINK2_BASE_DO_NOT_USE__ ; \
+typedef uint32_t tname
+
+#endif
+
+// This supports private struct members in code that still compiles as C.
+//
+// Internal code should access these members with GET_PRIVATE(), and define a
+// pair of public C++-only GET_PRIVATE_...() member functions (one const and
+// one non-const) that each return a reference to the member; see plink2_thread
+// for examples.  In addition, .cc API code should define a small number of
+// standard GET_PRIVATE() accessors at the top of the file, and practically all
+// private-member access should occur through those file-scope accessors; this
+// keeps the surface area under control.
+//
+// (Tried to define a DECLARE_PRIVATE(typ, member) macro as well, but didn't
+// get that to work.  This is already pretty painless if it's restricted to key
+// APIs, though.)
+//
+// probable todo: see if the intended effect can be achieved in a simpler
+// manner with well-chosen explicit and implicit type conversions.
+#ifdef __cplusplus
+#  define GET_PRIVATE(par, member) (par).GET_PRIVATE_ ## member()
+#else
+#  define GET_PRIVATE(par, member) (par).member
+#endif
+
+static const double kLn2 = 0.6931471805599453;
+
+#ifdef __cplusplus
+}  // namespace plink2
+#endif
+
+#endif  // __PLINK2_BASE_H__
diff --git a/external_libs/pgenlib/include/plink2_base.o b/external_libs/pgenlib/include/plink2_base.o
new file mode 100644
index 0000000..8364da4
Binary files /dev/null and b/external_libs/pgenlib/include/plink2_base.o differ
diff --git a/external_libs/pgenlib/include/plink2_bits.cc b/external_libs/pgenlib/include/plink2_bits.cc
new file mode 100644
index 0000000..08ef9de
--- /dev/null
+++ b/external_libs/pgenlib/include/plink2_bits.cc
@@ -0,0 +1,2945 @@
+// This library is part of PLINK 2, copyright (C) 2005-2024 Shaun Purcell,
+// Christopher Chang.
+//
+// This library is free software: you can redistribute it and/or modify it
+// under the terms of the GNU Lesser General Public License as published by the
+// Free Software Foundation; either version 3 of the License, or (at your
+// option) any later version.
+//
+// This library is distributed in the hope that it will be useful, but WITHOUT
+// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public License
+// for more details.
+//
+// You should have received a copy of the GNU Lesser General Public License
+// along with this library.  If not, see <http://www.gnu.org/licenses/>.
+
+
+#include "plink2_bits.h"
+
+#ifdef __cplusplus
+namespace plink2 {
+#endif
+
+#if defined(USE_SSE2) && !defined(USE_AVX2)
+void Pack32bTo16bMask(const void* words_vec, uintptr_t ct_32b, void* dest) {
+  // This is also competitive in the AVX2 case, but never quite beats the
+  // simple loop.  (We'd want to enable a similar function for Ryzen,
+  // processing one 32-byte vector instead of two 16-byte vectors at a time in
+  // the main loop since _mm256_packus_epi16() doesn't do what we want.)
+  const VecW m1 = VCONST_W(kMask5555);
+#  ifdef USE_SHUFFLE8
+  const VecW swap12 = vecw_setr8(
+      0, 1, 4, 5, 2, 3, 6, 7,
+      8, 9, 12, 13, 10, 11, 14, 15);
+#  else
+  const VecW m2 = VCONST_W(kMask3333);
+#  endif
+  const VecW m4 = VCONST_W(kMask0F0F);
+  const VecW m8 = VCONST_W(kMask00FF);
+  const VecW* words_valias = S_CAST(const VecW*, words_vec);
+  unsigned char* dest_uc = S_CAST(unsigned char*, dest);
+  for (uintptr_t vidx = 0; vidx != ct_32b; ++vidx) {
+    VecW vec_lo = vecw_loadu(&(words_valias[2 * vidx])) & m1;
+    VecW vec_hi = vecw_loadu(&(words_valias[2 * vidx + 1])) & m1;
+#  ifdef USE_SHUFFLE8
+    // this right-shift-3 + shuffle shortcut saves two operations.
+    vec_lo = (vec_lo | vecw_srli(vec_lo, 3)) & m4;
+    vec_hi = (vec_hi | vecw_srli(vec_hi, 3)) & m4;
+    vec_lo = vecw_shuffle8(swap12, vec_lo);
+    vec_hi = vecw_shuffle8(swap12, vec_hi);
+#  else
+    vec_lo = (vec_lo | vecw_srli(vec_lo, 1)) & m2;
+    vec_hi = (vec_hi | vecw_srli(vec_hi, 1)) & m2;
+    vec_lo = (vec_lo | vecw_srli(vec_lo, 2)) & m4;
+    vec_hi = (vec_hi | vecw_srli(vec_hi, 2)) & m4;
+#  endif
+    vec_lo = vec_lo | vecw_srli(vec_lo, 4);
+    vec_hi = vec_hi | vecw_srli(vec_hi, 4);
+    const VecW vec_packed = vecw_gather_even(vec_lo, vec_hi, m8);
+    vecw_storeu(&(dest_uc[vidx * 16]), vec_packed);
+  }
+}
+#endif
+
+#ifdef __x86_64__
+VecW vecw_slli_variable_ct(VecW vv, uint32_t ct) {
+  return vecw_slli(vv, ct);
+}
+#else
+// Using a lookup table because NEON bit shift functions can only be called
+// with compile-time constants
+// https://eigen.tuxfamily.org/bz/show_bug.cgi?id=1631
+// https://github.com/VectorCamp/vectorscan/issues/21
+VecW vecw_slli_variable_ct(VecW vv, uint32_t ct) {
+  switch(ct) {
+    default: return vv;
+    case 1: return vecw_slli(vv, 1);
+    case 2: return vecw_slli(vv, 2);
+    case 3: return vecw_slli(vv, 3);
+    case 4: return vecw_slli(vv, 4);
+    case 5: return vecw_slli(vv, 5);
+    case 6: return vecw_slli(vv, 6);
+    case 7: return vecw_slli(vv, 7);
+  }
+}
+#endif
+
+void SetAllBits(uintptr_t ct, uintptr_t* bitarr) {
+  // leaves bits beyond the end unset
+  // ok for ct == 0
+  uintptr_t quotient = ct / kBitsPerWord;
+  uintptr_t remainder = ct % kBitsPerWord;
+  SetAllWArr(quotient, bitarr);
+  if (remainder) {
+    bitarr[quotient] = (k1LU << remainder) - k1LU;
+  }
+}
+
+void FillBitsNz(uintptr_t start_idx, uintptr_t end_idx, uintptr_t* bitarr) {
+  assert(end_idx > start_idx);
+  uintptr_t maj_start = start_idx / kBitsPerWord;
+  uintptr_t maj_end = end_idx / kBitsPerWord;
+  uintptr_t minor;
+  if (maj_start == maj_end) {
+    bitarr[maj_start] |= (k1LU << (end_idx % kBitsPerWord)) - (k1LU << (start_idx % kBitsPerWord));
+  } else {
+    bitarr[maj_start] |= ~((k1LU << (start_idx % kBitsPerWord)) - k1LU);
+    SetAllWArr(maj_end - maj_start - 1, &(bitarr[maj_start + 1]));
+    minor = end_idx % kBitsPerWord;
+    if (minor) {
+      bitarr[maj_end] |= (k1LU << minor) - k1LU;
+    }
+  }
+}
+
+void ClearBitsNz(uintptr_t start_idx, uintptr_t end_idx, uintptr_t* bitarr) {
+  assert(end_idx > start_idx);
+  uintptr_t maj_start = start_idx / kBitsPerWord;
+  uintptr_t maj_end = end_idx / kBitsPerWord;
+  uintptr_t minor;
+  if (maj_start == maj_end) {
+    bitarr[maj_start] &= ~((k1LU << (end_idx % kBitsPerWord)) - (k1LU << (start_idx % kBitsPerWord)));
+  } else {
+    bitarr[maj_start] = bzhi(bitarr[maj_start], start_idx % kBitsPerWord);
+    ZeroWArr(maj_end - maj_start - 1, &(bitarr[maj_start + 1]));
+    minor = end_idx % kBitsPerWord;
+    if (minor) {
+      bitarr[maj_end] &= ~((k1LU << minor) - k1LU);
+    }
+  }
+}
+
+void BitvecAnd(const uintptr_t* __restrict arg_bitvec, uintptr_t word_ct, uintptr_t* __restrict main_bitvec) {
+  // main_bitvec := main_bitvec AND arg_bitvec
+#ifdef USE_SSE2
+  VecW* main_bitvvec_iter = R_CAST(VecW*, main_bitvec);
+  const VecW* arg_bitvvec_iter = R_CAST(const VecW*, arg_bitvec);
+  const uintptr_t full_vec_ct = word_ct / kWordsPerVec;
+  // ok, retested this explicit unroll (Jun 2018) and it's still noticeably
+  // faster for small cases than the simple loop.  sigh.
+  if (full_vec_ct & 1) {
+    *main_bitvvec_iter++ &= *arg_bitvvec_iter++;
+  }
+  if (full_vec_ct & 2) {
+    *main_bitvvec_iter++ &= *arg_bitvvec_iter++;
+    *main_bitvvec_iter++ &= *arg_bitvvec_iter++;
+  }
+  for (uintptr_t ulii = 3; ulii < full_vec_ct; ulii += 4) {
+    *main_bitvvec_iter++ &= *arg_bitvvec_iter++;
+    *main_bitvvec_iter++ &= *arg_bitvvec_iter++;
+    *main_bitvvec_iter++ &= *arg_bitvvec_iter++;
+    *main_bitvvec_iter++ &= *arg_bitvvec_iter++;
+  }
+#  ifdef USE_AVX2
+  if (word_ct & 2) {
+    const uintptr_t base_idx = full_vec_ct * kWordsPerVec;
+    main_bitvec[base_idx] &= arg_bitvec[base_idx];
+    main_bitvec[base_idx + 1] &= arg_bitvec[base_idx + 1];
+  }
+#  endif
+  if (word_ct & 1) {
+    main_bitvec[word_ct - 1] &= arg_bitvec[word_ct - 1];
+  }
+#else
+  for (uintptr_t widx = 0; widx != word_ct; ++widx) {
+    main_bitvec[widx] &= arg_bitvec[widx];
+  }
+#endif
+}
+
+void BitvecInvmask(const uintptr_t* __restrict exclude_bitvec, uintptr_t word_ct, uintptr_t* __restrict main_bitvec) {
+  // main_bitvec := main_bitvec ANDNOT exclude_bitvec
+  // note that this is the reverse of the _mm_andnot() operand order
+#ifdef USE_SSE2
+  VecW* main_bitvvec_iter = R_CAST(VecW*, main_bitvec);
+  const VecW* exclude_bitvvec_iter = R_CAST(const VecW*, exclude_bitvec);
+  const uintptr_t full_vec_ct = word_ct / kWordsPerVec;
+  if (full_vec_ct & 1) {
+    *main_bitvvec_iter = vecw_and_notfirst(*exclude_bitvvec_iter++, *main_bitvvec_iter);
+    ++main_bitvvec_iter;
+  }
+  if (full_vec_ct & 2) {
+    *main_bitvvec_iter = vecw_and_notfirst(*exclude_bitvvec_iter++, *main_bitvvec_iter);
+    ++main_bitvvec_iter;
+    *main_bitvvec_iter = vecw_and_notfirst(*exclude_bitvvec_iter++, *main_bitvvec_iter);
+    ++main_bitvvec_iter;
+  }
+  for (uintptr_t ulii = 3; ulii < full_vec_ct; ulii += 4) {
+    *main_bitvvec_iter = vecw_and_notfirst(*exclude_bitvvec_iter++, *main_bitvvec_iter);
+    ++main_bitvvec_iter;
+    *main_bitvvec_iter = vecw_and_notfirst(*exclude_bitvvec_iter++, *main_bitvvec_iter);
+    ++main_bitvvec_iter;
+    *main_bitvvec_iter = vecw_and_notfirst(*exclude_bitvvec_iter++, *main_bitvvec_iter);
+    ++main_bitvvec_iter;
+    *main_bitvvec_iter = vecw_and_notfirst(*exclude_bitvvec_iter++, *main_bitvvec_iter);
+    ++main_bitvvec_iter;
+  }
+#  ifdef USE_AVX2
+  if (word_ct & 2) {
+    const uintptr_t base_idx = full_vec_ct * kWordsPerVec;
+    main_bitvec[base_idx] &= ~exclude_bitvec[base_idx];
+    main_bitvec[base_idx + 1] &= ~exclude_bitvec[base_idx + 1];
+  }
+#  endif
+  if (word_ct & 1) {
+    main_bitvec[word_ct - 1] &= ~exclude_bitvec[word_ct - 1];
+  }
+#else
+  for (uintptr_t widx = 0; widx != word_ct; ++widx) {
+    main_bitvec[widx] &= ~exclude_bitvec[widx];
+  }
+#endif
+}
+
+void BitvecOr(const uintptr_t* __restrict arg_bitvec, uintptr_t word_ct, uintptr_t* main_bitvec) {
+  // main_bitvec := main_bitvec OR arg_bitvec
+#ifdef USE_SSE2
+  VecW* main_bitvvec_iter = R_CAST(VecW*, main_bitvec);
+  const VecW* arg_bitvvec_iter = R_CAST(const VecW*, arg_bitvec);
+  const uintptr_t full_vec_ct = word_ct / kWordsPerVec;
+  if (full_vec_ct & 1) {
+    *main_bitvvec_iter++ |= (*arg_bitvvec_iter++);
+  }
+  if (full_vec_ct & 2) {
+    *main_bitvvec_iter++ |= (*arg_bitvvec_iter++);
+    *main_bitvvec_iter++ |= (*arg_bitvvec_iter++);
+  }
+  for (uintptr_t ulii = 3; ulii < full_vec_ct; ulii += 4) {
+    *main_bitvvec_iter++ |= (*arg_bitvvec_iter++);
+    *main_bitvvec_iter++ |= (*arg_bitvvec_iter++);
+    *main_bitvvec_iter++ |= (*arg_bitvvec_iter++);
+    *main_bitvvec_iter++ |= (*arg_bitvvec_iter++);
+  }
+#  ifdef USE_AVX2
+  if (word_ct & 2) {
+    const uintptr_t base_idx = full_vec_ct * kWordsPerVec;
+    main_bitvec[base_idx] |= arg_bitvec[base_idx];
+    main_bitvec[base_idx + 1] |= arg_bitvec[base_idx + 1];
+  }
+#  endif
+  if (word_ct & 1) {
+    main_bitvec[word_ct - 1] |= arg_bitvec[word_ct - 1];
+  }
+#else
+  for (uintptr_t widx = 0; widx != word_ct; ++widx) {
+    main_bitvec[widx] |= arg_bitvec[widx];
+  }
+#endif
+}
+
+void BitvecInvert(uintptr_t word_ct, uintptr_t* main_bitvec) {
+#ifdef USE_SSE2
+  VecW* main_bitvvec_iter = R_CAST(VecW*, main_bitvec);
+  const uintptr_t full_vec_ct = word_ct / kWordsPerVec;
+  const VecW all1 = VCONST_W(~k0LU);
+  if (full_vec_ct & 1) {
+    *main_bitvvec_iter++ ^= all1;
+  }
+  if (full_vec_ct & 2) {
+    *main_bitvvec_iter++ ^= all1;
+    *main_bitvvec_iter++ ^= all1;
+  }
+  for (uintptr_t ulii = 3; ulii < full_vec_ct; ulii += 4) {
+    *main_bitvvec_iter++ ^= all1;
+    *main_bitvvec_iter++ ^= all1;
+    *main_bitvvec_iter++ ^= all1;
+    *main_bitvvec_iter++ ^= all1;
+  }
+#  ifdef USE_AVX2
+  if (word_ct & 2) {
+    const uintptr_t base_idx = full_vec_ct * kWordsPerVec;
+    main_bitvec[base_idx] ^= ~k0LU;
+    main_bitvec[base_idx + 1] ^= ~k0LU;
+  }
+#  endif
+  if (word_ct & 1) {
+    main_bitvec[word_ct - 1] ^= ~k0LU;
+  }
+#else
+  for (uintptr_t widx = 0; widx != word_ct; ++widx) {
+    main_bitvec[widx] ^= ~k0LU;
+  }
+#endif
+}
+
+void BitvecXorCopy(const uintptr_t* __restrict source1_bitvec, const uintptr_t* __restrict source2_bitvec, uintptr_t word_ct, uintptr_t* target_bitvec) {
+#ifdef USE_SSE2
+  VecW* target_bitvvec = R_CAST(VecW*, target_bitvec);
+  const VecW* source1_bitvvec = R_CAST(const VecW*, source1_bitvec);
+  const VecW* source2_bitvvec = R_CAST(const VecW*, source2_bitvec);
+  const uintptr_t full_vec_ct = word_ct / kWordsPerVec;
+  for (uintptr_t ulii = 0; ulii != full_vec_ct; ++ulii) {
+    target_bitvvec[ulii] = source1_bitvvec[ulii] ^ source2_bitvvec[ulii];
+  }
+#  ifdef USE_AVX2
+  if (word_ct & 2) {
+    const uintptr_t base_idx = full_vec_ct * kWordsPerVec;
+    target_bitvec[base_idx] = source1_bitvec[base_idx] ^ source2_bitvec[base_idx];
+    target_bitvec[base_idx + 1] = source1_bitvec[base_idx + 1] ^ source2_bitvec[base_idx + 1];
+  }
+#  endif
+  if (word_ct & 1) {
+    target_bitvec[word_ct - 1] = source1_bitvec[word_ct - 1] ^ source2_bitvec[word_ct - 1];
+  }
+#else
+  for (uintptr_t widx = 0; widx != word_ct; ++widx) {
+    target_bitvec[widx] = source1_bitvec[widx] ^ source2_bitvec[widx];
+  }
+#endif
+}
+
+void BitvecInvertCopy(const uintptr_t* __restrict source_bitvec, uintptr_t word_ct, uintptr_t* __restrict target_bitvec) {
+#ifdef USE_SSE2
+  const VecW* source_bitvvec_iter = R_CAST(const VecW*, source_bitvec);
+  VecW* target_bitvvec_iter = R_CAST(VecW*, target_bitvec);
+  const uintptr_t full_vec_ct = word_ct / kWordsPerVec;
+  const VecW all1 = VCONST_W(~k0LU);
+  // As of Apple clang 11, this manual unroll is no longer relevant.  todo:
+  // check Linux performance, and remove all of these unrolls if perf is good
+  // enough without them.
+  if (full_vec_ct & 1) {
+    *target_bitvvec_iter++ = (*source_bitvvec_iter++) ^ all1;
+  }
+  if (full_vec_ct & 2) {
+    *target_bitvvec_iter++ = (*source_bitvvec_iter++) ^ all1;
+    *target_bitvvec_iter++ = (*source_bitvvec_iter++) ^ all1;
+  }
+  for (uintptr_t ulii = 3; ulii < full_vec_ct; ulii += 4) {
+    *target_bitvvec_iter++ = (*source_bitvvec_iter++) ^ all1;
+    *target_bitvvec_iter++ = (*source_bitvvec_iter++) ^ all1;
+    *target_bitvvec_iter++ = (*source_bitvvec_iter++) ^ all1;
+    *target_bitvvec_iter++ = (*source_bitvvec_iter++) ^ all1;
+  }
+#  ifdef USE_AVX2
+  if (word_ct & 2) {
+    const uintptr_t base_idx = full_vec_ct * kWordsPerVec;
+    target_bitvec[base_idx] = ~source_bitvec[base_idx];
+    target_bitvec[base_idx + 1] = ~source_bitvec[base_idx + 1];
+  }
+#  endif
+  if (word_ct & 1) {
+    target_bitvec[word_ct - 1] = ~source_bitvec[word_ct - 1];
+  }
+#else
+  for (uintptr_t widx = 0; widx != word_ct; ++widx) {
+    target_bitvec[widx] = ~source_bitvec[widx];
+  }
+#endif
+}
+
+uintptr_t AdvTo1Bit(const uintptr_t* bitarr, uintptr_t loc) {
+  const uintptr_t* bitarr_iter = &(bitarr[loc / kBitsPerWord]);
+  uintptr_t ulii = (*bitarr_iter) >> (loc % kBitsPerWord);
+  if (ulii) {
+    return loc + ctzw(ulii);
+  }
+  do {
+    ulii = *(++bitarr_iter);
+  } while (!ulii);
+  return S_CAST(uintptr_t, bitarr_iter - bitarr) * kBitsPerWord + ctzw(ulii);
+}
+
+uintptr_t AdvTo0Bit(const uintptr_t* bitarr, uintptr_t loc) {
+  const uintptr_t* bitarr_iter = &(bitarr[loc / kBitsPerWord]);
+  uintptr_t ulii = (~(*bitarr_iter)) >> (loc % kBitsPerWord);
+  if (ulii) {
+    return loc + ctzw(ulii);
+  }
+  do {
+    ulii = *(++bitarr_iter);
+  } while (ulii == ~k0LU);
+  return S_CAST(uintptr_t, bitarr_iter - bitarr) * kBitsPerWord + ctzw(~ulii);
+}
+
+/*
+uintptr_t NextNonmissingUnsafe(const uintptr_t* genoarr, uintptr_t loc) {
+  const uintptr_t* genoarr_iter = &(genoarr[loc / kBitsPerWordD2]);
+  uintptr_t ulii = (~(*genoarr_iter)) >> (2 * (loc % kBitsPerWordD2));
+  if (ulii) {
+    return loc + (ctzw(ulii) / 2);
+  }
+  do {
+    ulii = *(++genoarr_iter);
+  } while (ulii == ~k0LU);
+  return S_CAST(uintptr_t, genoarr_iter - genoarr) * kBitsPerWordD2 + (ctzw(~ulii) / 2);
+}
+*/
+
+uint32_t AdvBoundedTo1Bit(const uintptr_t* bitarr, uint32_t loc, uint32_t ceil) {
+  // safe version.
+  const uintptr_t* bitarr_iter = &(bitarr[loc / kBitsPerWord]);
+  uintptr_t ulii = (*bitarr_iter) >> (loc % kBitsPerWord);
+  if (ulii) {
+    const uint32_t rval = loc + ctzw(ulii);
+    return MINV(rval, ceil);
+  }
+  const uintptr_t* bitarr_last = &(bitarr[(ceil - 1) / kBitsPerWord]);
+  do {
+    if (bitarr_iter >= bitarr_last) {
+      return ceil;
+    }
+    ulii = *(++bitarr_iter);
+  } while (!ulii);
+  const uint32_t rval = S_CAST(uintptr_t, bitarr_iter - bitarr) * kBitsPerWord + ctzw(ulii);
+  return MINV(rval, ceil);
+}
+
+uintptr_t AdvBoundedTo0Bit(const uintptr_t* bitarr, uintptr_t loc, uintptr_t ceil) {
+  assert(ceil >= 1);
+  const uintptr_t* bitarr_ptr = &(bitarr[loc / kBitsPerWord]);
+  uintptr_t ulii = (~(*bitarr_ptr)) >> (loc % kBitsPerWord);
+  if (ulii) {
+    loc += ctzw(ulii);
+    return MINV(loc, ceil);
+  }
+  const uintptr_t* bitarr_last = &(bitarr[(ceil - 1) / kBitsPerWord]);
+  do {
+    if (bitarr_ptr >= bitarr_last) {
+      return ceil;
+    }
+    ulii = *(++bitarr_ptr);
+  } while (ulii == ~k0LU);
+  loc = S_CAST(uintptr_t, bitarr_ptr - bitarr) * kBitsPerWord + ctzw(~ulii);
+  return MINV(loc, ceil);
+}
+
+uintptr_t FindLast1BitBefore(const uintptr_t* bitarr, uintptr_t loc) {
+  // unlike the next_{un}set family, this always returns a STRICTLY earlier
+  // position
+  const uintptr_t* bitarr_iter = &(bitarr[loc / kBitsPerWord]);
+  const uint32_t remainder = loc % kBitsPerWord;
+  uintptr_t ulii;
+  if (remainder) {
+    ulii = bzhi(*bitarr_iter, remainder);
+    if (ulii) {
+      return loc - remainder + bsrw(ulii);
+    }
+  }
+  do {
+    ulii = *(--bitarr_iter);
+  } while (!ulii);
+  return S_CAST(uintptr_t, bitarr_iter - bitarr) * kBitsPerWord + bsrw(ulii);
+}
+
+#ifndef NO_UNALIGNED
+uint32_t AllBytesAreX(const unsigned char* bytes, unsigned char match, uintptr_t byte_ct) {
+  if (byte_ct < kBytesPerWord) {
+    for (uint32_t uii = 0; uii != byte_ct; ++uii) {
+      if (bytes[uii] != match) {
+        return 0;
+      }
+    }
+    return 1;
+  }
+  const uintptr_t* bytes_alias = R_CAST(const uintptr_t*, bytes);
+  const uintptr_t word_match = S_CAST(uintptr_t, match) * kMask0101;
+  uintptr_t word_ct_m1 = (byte_ct - 1) / kBytesPerWord;
+  // todo: try movemask in AVX2 case
+  for (uintptr_t widx = 0; widx != word_ct_m1; ++widx) {
+    if (bytes_alias[widx] != word_match) {
+      return 0;
+    }
+  }
+  const uintptr_t last_word = *R_CAST(const uintptr_t*, &(bytes[byte_ct - kBytesPerWord]));
+  if (last_word != word_match) {
+    return 0;
+  }
+  return 1;
+}
+#else // NO_UNALIGNED
+uint32_t AllBytesAreX(const unsigned char* bytes, unsigned char match, uintptr_t byte_ct) {
+  if (byte_ct < 2 * kBytesPerWord - 1) {
+    // use simple loop instead of main algorithm unless byte_ct guarantees
+    // fullword_ct >= 1
+    for (uint32_t uii = 0; uii != byte_ct; ++uii) {
+      if (bytes[uii] != match) {
+        return 0;
+      }
+    }
+    return 1;
+  }
+  // todo: try movemask in AVX2 case
+  const uintptr_t* bytes_alias;
+  const uint32_t lead_byte_ct = AlignKToW(bytes, &bytes_alias);
+  for (uint32_t uii = 0; uii != lead_byte_ct; ++uii) {
+    if (bytes[uii] != match) {
+      return 0;
+    }
+  }
+  bytes = &(bytes[lead_byte_ct]);
+  byte_ct -= lead_byte_ct;
+  const uintptr_t fullword_ct = byte_ct / kBytesPerWord;
+  const uintptr_t word_match = S_CAST(uintptr_t, match) * kMask0101;
+  for (uintptr_t widx = 0; widx != fullword_ct; ++widx) {
+    if (bytes_alias[widx] != word_match) {
+      return 0;
+    }
+  }
+  for (uintptr_t ulii = fullword_ct * kBytesPerWord; ulii != byte_ct; ++ulii) {
+    if (bytes[ulii] != match) {
+      return 0;
+    }
+  }
+  return 1;
+}
+#endif
+
+#ifdef USE_AVX2
+// void CopyBitarrSubsetEx(const uintptr_t* __restrict raw_bitarr, const uintptr_t* __restrict subset_mask, uint32_t bit_idx_start, uint32_t output_bit_idx_end, uintptr_t* __restrict output_bitarr) {
+void CopyBitarrSubset(const uintptr_t* __restrict raw_bitarr, const uintptr_t* __restrict subset_mask, uint32_t output_bit_idx_end, uintptr_t* __restrict output_bitarr) {
+  const uint32_t output_bit_idx_end_lowbits = output_bit_idx_end % kBitsPerWord;
+  uintptr_t* output_bitarr_iter = output_bitarr;
+  uintptr_t* output_bitarr_last = &(output_bitarr[output_bit_idx_end / kBitsPerWord]);
+  uintptr_t cur_output_word = 0;
+  uint32_t read_widx = UINT32_MAX;  // deliberate overflow
+  uint32_t write_idx_lowbits = 0;
+  while ((output_bitarr_iter != output_bitarr_last) || (write_idx_lowbits != output_bit_idx_end_lowbits)) {
+    uintptr_t cur_mask_word;
+    // sparse subset_mask optimization
+    // guaranteed to terminate since there's at least one more set bit
+    do {
+      cur_mask_word = subset_mask[++read_widx];
+    } while (!cur_mask_word);
+    uintptr_t extracted_bits = raw_bitarr[read_widx];
+    uint32_t set_bit_ct = kBitsPerWord;
+    if (cur_mask_word != ~k0LU) {
+      extracted_bits = _pext_u64(extracted_bits, cur_mask_word);
+      set_bit_ct = PopcountWord(cur_mask_word);
+    }
+    cur_output_word |= extracted_bits << write_idx_lowbits;
+    const uint32_t new_write_idx_lowbits = write_idx_lowbits + set_bit_ct;
+    if (new_write_idx_lowbits >= kBitsPerWord) {
+      *output_bitarr_iter++ = cur_output_word;
+      // ...and these are the bits that fell off
+      // bugfix: unsafe to right-shift 64
+      if (write_idx_lowbits) {
+        cur_output_word = extracted_bits >> (kBitsPerWord - write_idx_lowbits);
+      } else {
+        cur_output_word = 0;
+      }
+    }
+    write_idx_lowbits = new_write_idx_lowbits % kBitsPerWord;
+  }
+  if (write_idx_lowbits) {
+    *output_bitarr_iter = cur_output_word;
+  }
+}
+
+#  ifdef NO_UNALIGNED
+void CopyBitarrSubsetToUnaligned(const uintptr_t* __restrict raw_bitarr, const uintptr_t* __restrict subset_mask, uint32_t output_bit_idx_end, void* __restrict output_bitarr) {
+  const uint32_t output_bit_idx_end_lowbits = output_bit_idx_end % kBitsPerWord;
+  unsigned char* output_bitarr_iter = S_CAST(unsigned char*, output_bitarr);
+  unsigned char* output_bitarr_last = &(output_bitarr_iter[(output_bit_idx_end / kBitsPerWord) * kBytesPerWord]);
+  uintptr_t cur_output_word = 0;
+  uint32_t read_widx = UINT32_MAX;  // deliberate overflow
+  uint32_t write_idx_lowbits = 0;
+  while ((output_bitarr_iter != output_bitarr_last) || (write_idx_lowbits != output_bit_idx_end_lowbits)) {
+    uintptr_t cur_mask_word;
+    // sparse subset_mask optimization
+    // guaranteed to terminate since there's at least one more set bit
+    do {
+      cur_mask_word = subset_mask[++read_widx];
+    } while (!cur_mask_word);
+    uintptr_t extracted_bits = raw_bitarr[read_widx];
+    uint32_t set_bit_ct = kBitsPerWord;
+    if (cur_mask_word != ~k0LU) {
+      extracted_bits = _pext_u64(extracted_bits, cur_mask_word);
+      set_bit_ct = PopcountWord(cur_mask_word);
+    }
+    cur_output_word |= extracted_bits << write_idx_lowbits;
+    const uint32_t new_write_idx_lowbits = write_idx_lowbits + set_bit_ct;
+    if (new_write_idx_lowbits >= kBitsPerWord) {
+      AppendW(cur_output_word, &output_bitarr_iter);
+      // ...and these are the bits that fell off
+      // bugfix: unsafe to right-shift 64
+      if (write_idx_lowbits) {
+        cur_output_word = extracted_bits >> (kBitsPerWord - write_idx_lowbits);
+      } else {
+        cur_output_word = 0;
+      }
+    }
+    write_idx_lowbits = new_write_idx_lowbits % kBitsPerWord;
+  }
+  if (write_idx_lowbits) {
+    CopyToUnalignedW(output_bitarr_iter, &cur_output_word);
+  }
+}
+#  endif
+
+uintptr_t PopcountVecsAvx2(const VecW* bit_vvec, uintptr_t vec_ct) {
+  // See popcnt_avx2() in libpopcnt.
+  VecW cnt = vecw_setzero();
+  VecW ones = vecw_setzero();
+  VecW twos = vecw_setzero();
+  VecW fours = vecw_setzero();
+  VecW eights = vecw_setzero();
+  VecW prev_sad_result = vecw_setzero();
+  const uintptr_t vec_ct_a16 = RoundDownPow2(vec_ct, 16);
+  for (uintptr_t vec_idx = 0; vec_idx != vec_ct_a16; vec_idx += 16) {
+    VecW twos_a = Csa256(bit_vvec[vec_idx + 0], bit_vvec[vec_idx + 1], &ones);
+    VecW twos_b = Csa256(bit_vvec[vec_idx + 2], bit_vvec[vec_idx + 3], &ones);
+    VecW fours_a = Csa256(twos_a, twos_b, &twos);
+
+    twos_a = Csa256(bit_vvec[vec_idx + 4], bit_vvec[vec_idx + 5], &ones);
+    twos_b = Csa256(bit_vvec[vec_idx + 6], bit_vvec[vec_idx + 7], &ones);
+    VecW fours_b = Csa256(twos_a, twos_b, &twos);
+    const VecW eights_a = Csa256(fours_a, fours_b, &fours);
+
+    twos_a = Csa256(bit_vvec[vec_idx + 8], bit_vvec[vec_idx + 9], &ones);
+    twos_b = Csa256(bit_vvec[vec_idx + 10], bit_vvec[vec_idx + 11], &ones);
+    fours_a = Csa256(twos_a, twos_b, &twos);
+
+    twos_a = Csa256(bit_vvec[vec_idx + 12], bit_vvec[vec_idx + 13], &ones);
+    twos_b = Csa256(bit_vvec[vec_idx + 14], bit_vvec[vec_idx + 15], &ones);
+    fours_b = Csa256(twos_a, twos_b, &twos);
+    const VecW eights_b = Csa256(fours_a, fours_b, &fours);
+    const VecW sixteens = Csa256(eights_a, eights_b, &eights);
+    cnt = cnt + prev_sad_result;
+    // work around high SAD latency
+    prev_sad_result = PopcountVecAvx2(sixteens);
+  }
+  bit_vvec = &(bit_vvec[vec_ct_a16]);
+  const uintptr_t remainder = vec_ct % 16;
+  cnt = cnt + prev_sad_result;
+  if (remainder < 12) {
+    cnt = vecw_slli(cnt, 4);
+    if (remainder) {
+      VecW popcnt1_acc = vecw_setzero();
+      VecW popcnt2_acc = vecw_setzero();
+      const VecW lookup1 = vecw_setr8(4, 5, 5, 6, 5, 6, 6, 7,
+                                      5, 6, 6, 7, 6, 7, 7, 8);
+      const VecW lookup2 = vecw_setr8(4, 3, 3, 2, 3, 2, 2, 1,
+                                      3, 2, 2, 1, 2, 1, 1, 0);
+
+      const VecW m4 = VCONST_W(kMask0F0F);
+      for (uintptr_t vec_idx = 0; vec_idx != remainder; ++vec_idx) {
+        const VecW vv = bit_vvec[vec_idx];
+        const VecW lo = vv & m4;
+        const VecW hi = vecw_srli(vv, 4) & m4;
+        popcnt1_acc = popcnt1_acc + vecw_shuffle8(lookup1, lo);
+        popcnt2_acc = popcnt2_acc + vecw_shuffle8(lookup2, hi);
+      }
+      cnt = cnt + vecw_sad(popcnt1_acc, popcnt2_acc);
+    }
+  } else {
+    VecW twos_a = Csa256(bit_vvec[0], bit_vvec[1], &ones);
+    VecW twos_b = Csa256(bit_vvec[2], bit_vvec[3], &ones);
+    VecW fours_a = Csa256(twos_a, twos_b, &twos);
+    twos_a = Csa256(bit_vvec[4], bit_vvec[5], &ones);
+    twos_b = Csa256(bit_vvec[6], bit_vvec[7], &ones);
+    VecW fours_b = Csa256(twos_a, twos_b, &twos);
+    const VecW eights_a = Csa256(fours_a, fours_b, &fours);
+    twos_a = Csa256(bit_vvec[8], bit_vvec[9], &ones);
+    twos_b = Csa256(bit_vvec[10], bit_vvec[11], &ones);
+    fours_a = Csa256(twos_a, twos_b, &twos);
+    twos_a = vecw_setzero();
+    if (remainder & 2) {
+      twos_a = Csa256(bit_vvec[12], bit_vvec[13], &ones);
+    }
+    twos_b = vecw_setzero();
+    if (remainder & 1) {
+      twos_b = CsaOne256(bit_vvec[remainder - 1], &ones);
+    }
+    fours_b = Csa256(twos_a, twos_b, &twos);
+    const VecW eights_b = Csa256(fours_a, fours_b, &fours);
+    const VecW sixteens = Csa256(eights_a, eights_b, &eights);
+    cnt = cnt + PopcountVecAvx2(sixteens);
+    cnt = vecw_slli(cnt, 4);
+  }
+  // Appears to be counterproductive to put multiple SAD instructions in
+  // flight.
+  // Compiler is smart enough that it's pointless to manually inline
+  // PopcountVecAvx2.  (Tried combining the 4 SAD calls into one, didn't help.)
+  cnt = cnt + vecw_slli(PopcountVecAvx2(eights), 3);
+  cnt = cnt + vecw_slli(PopcountVecAvx2(fours), 2);
+  cnt = cnt + vecw_slli(PopcountVecAvx2(twos), 1);
+  cnt = cnt + PopcountVecAvx2(ones);
+  return HsumW(cnt);
+}
+
+uintptr_t PopcountVecsAvx2Intersect(const VecW* __restrict vvec1_iter, const VecW* __restrict vvec2_iter, uintptr_t vec_ct) {
+  // See popcnt_avx2() in libpopcnt.  vec_ct must be a multiple of 16.
+  VecW cnt = vecw_setzero();
+  VecW ones = vecw_setzero();
+  VecW twos = vecw_setzero();
+  VecW fours = vecw_setzero();
+  VecW eights = vecw_setzero();
+  for (uintptr_t vec_idx = 0; vec_idx < vec_ct; vec_idx += 16) {
+    VecW twos_a = Csa256(vvec1_iter[vec_idx + 0] & vvec2_iter[vec_idx + 0], vvec1_iter[vec_idx + 1] & vvec2_iter[vec_idx + 1], &ones);
+    VecW twos_b = Csa256(vvec1_iter[vec_idx + 2] & vvec2_iter[vec_idx + 2], vvec1_iter[vec_idx + 3] & vvec2_iter[vec_idx + 3], &ones);
+    VecW fours_a = Csa256(twos_a, twos_b, &twos);
+
+    twos_a = Csa256(vvec1_iter[vec_idx + 4] & vvec2_iter[vec_idx + 4], vvec1_iter[vec_idx + 5] & vvec2_iter[vec_idx + 5], &ones);
+    twos_b = Csa256(vvec1_iter[vec_idx + 6] & vvec2_iter[vec_idx + 6], vvec1_iter[vec_idx + 7] & vvec2_iter[vec_idx + 7], &ones);
+    VecW fours_b = Csa256(twos_a, twos_b, &twos);
+    const VecW eights_a = Csa256(fours_a, fours_b, &fours);
+
+    twos_a = Csa256(vvec1_iter[vec_idx + 8] & vvec2_iter[vec_idx + 8], vvec1_iter[vec_idx + 9] & vvec2_iter[vec_idx + 9], &ones);
+    twos_b = Csa256(vvec1_iter[vec_idx + 10] & vvec2_iter[vec_idx + 10], vvec1_iter[vec_idx + 11] & vvec2_iter[vec_idx + 11], &ones);
+    fours_a = Csa256(twos_a, twos_b, &twos);
+
+    twos_a = Csa256(vvec1_iter[vec_idx + 12] & vvec2_iter[vec_idx + 12], vvec1_iter[vec_idx + 13] & vvec2_iter[vec_idx + 13], &ones);
+    twos_b = Csa256(vvec1_iter[vec_idx + 14] & vvec2_iter[vec_idx + 14], vvec1_iter[vec_idx + 15] & vvec2_iter[vec_idx + 15], &ones);
+    fours_b = Csa256(twos_a, twos_b, &twos);
+    const VecW eights_b = Csa256(fours_a, fours_b, &fours);
+    const VecW sixteens = Csa256(eights_a, eights_b, &eights);
+    cnt = cnt + PopcountVecAvx2(sixteens);
+  }
+  cnt = vecw_slli(cnt, 4);
+  cnt = cnt + vecw_slli(PopcountVecAvx2(eights), 3);
+  cnt = cnt + vecw_slli(PopcountVecAvx2(fours), 2);
+  cnt = cnt + vecw_slli(PopcountVecAvx2(twos), 1);
+  cnt = cnt + PopcountVecAvx2(ones);
+  return HsumW(cnt);
+}
+
+uintptr_t PopcountWordsIntersect(const uintptr_t* __restrict bitvec1_iter, const uintptr_t* __restrict bitvec2_iter, uintptr_t word_ct) {
+  const uintptr_t* bitvec1_end = &(bitvec1_iter[word_ct]);
+  const uintptr_t block_ct = word_ct / (16 * kWordsPerVec);
+  uintptr_t tot = 0;
+  if (block_ct) {
+    tot = PopcountVecsAvx2Intersect(R_CAST(const VecW*, bitvec1_iter), R_CAST(const VecW*, bitvec2_iter), block_ct * 16);
+    bitvec1_iter = &(bitvec1_iter[block_ct * (16 * kWordsPerVec)]);
+    bitvec2_iter = &(bitvec2_iter[block_ct * (16 * kWordsPerVec)]);
+  }
+  while (bitvec1_iter < bitvec1_end) {
+    tot += PopcountWord((*bitvec1_iter++) & (*bitvec2_iter++));
+  }
+  return tot;
+}
+
+uintptr_t PopcountVecsAvx2Xor(const VecW* __restrict vvec1_iter, const VecW* __restrict vvec2_iter, uintptr_t vec_ct) {
+  // vec_ct must be a multiple of 16.
+  VecW cnt = vecw_setzero();
+  VecW ones = vecw_setzero();
+  VecW twos = vecw_setzero();
+  VecW fours = vecw_setzero();
+  VecW eights = vecw_setzero();
+  for (uintptr_t vec_idx = 0; vec_idx < vec_ct; vec_idx += 16) {
+    VecW twos_a = Csa256(vvec1_iter[vec_idx + 0] ^ vvec2_iter[vec_idx + 0], vvec1_iter[vec_idx + 1] ^ vvec2_iter[vec_idx + 1], &ones);
+    VecW twos_b = Csa256(vvec1_iter[vec_idx + 2] ^ vvec2_iter[vec_idx + 2], vvec1_iter[vec_idx + 3] ^ vvec2_iter[vec_idx + 3], &ones);
+    VecW fours_a = Csa256(twos_a, twos_b, &twos);
+
+    twos_a = Csa256(vvec1_iter[vec_idx + 4] ^ vvec2_iter[vec_idx + 4], vvec1_iter[vec_idx + 5] ^ vvec2_iter[vec_idx + 5], &ones);
+    twos_b = Csa256(vvec1_iter[vec_idx + 6] ^ vvec2_iter[vec_idx + 6], vvec1_iter[vec_idx + 7] ^ vvec2_iter[vec_idx + 7], &ones);
+    VecW fours_b = Csa256(twos_a, twos_b, &twos);
+    const VecW eights_a = Csa256(fours_a, fours_b, &fours);
+
+    twos_a = Csa256(vvec1_iter[vec_idx + 8] ^ vvec2_iter[vec_idx + 8], vvec1_iter[vec_idx + 9] ^ vvec2_iter[vec_idx + 9], &ones);
+    twos_b = Csa256(vvec1_iter[vec_idx + 10] ^ vvec2_iter[vec_idx + 10], vvec1_iter[vec_idx + 11] ^ vvec2_iter[vec_idx + 11], &ones);
+    fours_a = Csa256(twos_a, twos_b, &twos);
+
+    twos_a = Csa256(vvec1_iter[vec_idx + 12] ^ vvec2_iter[vec_idx + 12], vvec1_iter[vec_idx + 13] ^ vvec2_iter[vec_idx + 13], &ones);
+    twos_b = Csa256(vvec1_iter[vec_idx + 14] ^ vvec2_iter[vec_idx + 14], vvec1_iter[vec_idx + 15] ^ vvec2_iter[vec_idx + 15], &ones);
+    fours_b = Csa256(twos_a, twos_b, &twos);
+    const VecW eights_b = Csa256(fours_a, fours_b, &fours);
+    const VecW sixteens = Csa256(eights_a, eights_b, &eights);
+    cnt = cnt + PopcountVecAvx2(sixteens);
+  }
+  cnt = vecw_slli(cnt, 4);
+  cnt = cnt + vecw_slli(PopcountVecAvx2(eights), 3);
+  cnt = cnt + vecw_slli(PopcountVecAvx2(fours), 2);
+  cnt = cnt + vecw_slli(PopcountVecAvx2(twos), 1);
+  cnt = cnt + PopcountVecAvx2(ones);
+  return HsumW(cnt);
+}
+
+uintptr_t PopcountWordsXor(const uintptr_t* __restrict bitvec1_iter, const uintptr_t* __restrict bitvec2_iter, uintptr_t word_ct) {
+  const uintptr_t* bitvec1_end = &(bitvec1_iter[word_ct]);
+  const uintptr_t block_ct = word_ct / (16 * kWordsPerVec);
+  uintptr_t tot = 0;
+  if (block_ct) {
+    tot = PopcountVecsAvx2Xor(R_CAST(const VecW*, bitvec1_iter), R_CAST(const VecW*, bitvec2_iter), block_ct * 16);
+    bitvec1_iter = &(bitvec1_iter[block_ct * (16 * kWordsPerVec)]);
+    bitvec2_iter = &(bitvec2_iter[block_ct * (16 * kWordsPerVec)]);
+  }
+  while (bitvec1_iter < bitvec1_end) {
+    tot += PopcountWord((*bitvec1_iter++) ^ (*bitvec2_iter++));
+  }
+  return tot;
+}
+
+/*
+uintptr_t PopcountVecsAvx2Intersect3(const VecW* __restrict vvec1_iter, const VecW* __restrict vvec2_iter, const VecW* __restrict vvec3_iter, uintptr_t vec_ct) {
+  VecW cnt = vecw_setzero();
+  VecW ones = vecw_setzero();
+  VecW twos = vecw_setzero();
+  VecW fours = vecw_setzero();
+  VecW eights = vecw_setzero();
+  for (uintptr_t vec_idx = 0; vec_idx < vec_ct; vec_idx += 16) {
+    VecW twos_a = Csa256(vvec1_iter[vec_idx + 0] & vvec2_iter[vec_idx + 0] & vvec3_iter[vec_idx + 0], vvec1_iter[vec_idx + 1] & vvec2_iter[vec_idx + 1] & vvec3_iter[vec_idx + 1], &ones);
+    VecW twos_b = Csa256(vvec1_iter[vec_idx + 2] & vvec2_iter[vec_idx + 2] & vvec3_iter[vec_idx + 2], vvec1_iter[vec_idx + 3] & vvec2_iter[vec_idx + 3] & vvec3_iter[vec_idx + 3], &ones);
+    VecW fours_a = Csa256(twos_a, twos_b, &twos);
+
+    twos_a = Csa256(vvec1_iter[vec_idx + 4] & vvec2_iter[vec_idx + 4] & vvec3_iter[vec_idx + 4], vvec1_iter[vec_idx + 5] & vvec2_iter[vec_idx + 5] & vvec3_iter[vec_idx + 5], &ones);
+    twos_b = Csa256(vvec1_iter[vec_idx + 6] & vvec2_iter[vec_idx + 6] & vvec3_iter[vec_idx + 6], vvec1_iter[vec_idx + 7] & vvec2_iter[vec_idx + 7] & vvec3_iter[vec_idx + 7], &ones);
+    VecW fours_b = Csa256(twos_a, twos_b, &twos);
+    const VecW eights_a = Csa256(fours_a, fours_b, &fours);
+
+    twos_a = Csa256(vvec1_iter[vec_idx + 8] & vvec2_iter[vec_idx + 8] & vvec3_iter[vec_idx + 8], vvec1_iter[vec_idx + 9] & vvec2_iter[vec_idx + 9] & vvec3_iter[vec_idx + 9], &ones);
+    twos_b = Csa256(vvec1_iter[vec_idx + 10] & vvec2_iter[vec_idx + 10] & vvec3_iter[vec_idx + 10], vvec1_iter[vec_idx + 11] & vvec2_iter[vec_idx + 11] & vvec3_iter[vec_idx + 11], &ones);
+    fours_a = Csa256(twos_a, twos_b, &twos);
+
+    twos_a = Csa256(vvec1_iter[vec_idx + 12] & vvec2_iter[vec_idx + 12] & vvec3_iter[vec_idx + 12], vvec1_iter[vec_idx + 13] & vvec2_iter[vec_idx + 13] & vvec3_iter[vec_idx + 13], &ones);
+    twos_b = Csa256(vvec1_iter[vec_idx + 14] & vvec2_iter[vec_idx + 14] & vvec3_iter[vec_idx + 14], vvec1_iter[vec_idx + 15] & vvec2_iter[vec_idx + 15] & vvec3_iter[vec_idx + 15], &ones);
+    fours_b = Csa256(twos_a, twos_b, &twos);
+    const VecW eights_b = Csa256(fours_a, fours_b, &fours);
+    const VecW sixteens = Csa256(eights_a, eights_b, &eights);
+    cnt = cnt + PopcountVecAvx2(sixteens);
+  }
+  cnt = vecw_slli(cnt, 4);
+  cnt = cnt + vecw_slli(PopcountVecAvx2(eights), 3);
+  cnt = cnt + vecw_slli(PopcountVecAvx2(fours), 2);
+  cnt = cnt + vecw_slli(PopcountVecAvx2(twos), 1);
+  cnt = cnt + PopcountVecAvx2(ones);
+  return HsumW(cnt);
+}
+
+uintptr_t PopcountWordsIntersect3(const uintptr_t* __restrict bitvec1_iter, const uintptr_t* __restrict bitvec2_iter, const uintptr_t* __restrict bitvec3_iter, uintptr_t word_ct) {
+  const uintptr_t* bitvec1_end = &(bitvec1_iter[word_ct]);
+  const uintptr_t block_ct = word_ct / (16 * kWordsPerVec);
+  uintptr_t tot = 0;
+  if (block_ct) {
+    tot = PopcountVecsAvx2Intersect3(R_CAST(const VecW*, bitvec1_iter), R_CAST(const VecW*, bitvec2_iter), R_CAST(const VecW*, bitvec3_iter), block_ct * 16);
+    bitvec1_iter = &(bitvec1_iter[block_ct * (16 * kWordsPerVec)]);
+    bitvec2_iter = &(bitvec2_iter[block_ct * (16 * kWordsPerVec)]);
+    bitvec3_iter = &(bitvec3_iter[block_ct * (16 * kWordsPerVec)]);
+  }
+  while (bitvec1_iter < bitvec1_end) {
+    tot += PopcountWord((*bitvec1_iter++) & (*bitvec2_iter++) & (*bitvec3_iter++));
+  }
+  return tot;
+}
+*/
+
+void ExpandBytearr(const void* __restrict compact_bitarr, const uintptr_t* __restrict expand_mask, uint32_t word_ct, uint32_t expand_size, uint32_t read_start_bit, uintptr_t* __restrict target) {
+  const uint32_t expand_sizex_m1 = expand_size + read_start_bit - 1;
+  const uint32_t leading_byte_ct = 1 + (expand_sizex_m1 % kBitsPerWord) / CHAR_BIT;
+  uintptr_t compact_word = SubwordLoad(compact_bitarr, leading_byte_ct) >> read_start_bit;
+  const unsigned char* compact_bitarr_biter = &(S_CAST(const unsigned char*, compact_bitarr)[leading_byte_ct]);
+  uint32_t compact_idx_lowbits = read_start_bit + CHAR_BIT * (sizeof(intptr_t) - leading_byte_ct);
+  for (uint32_t widx = 0; widx != word_ct; ++widx) {
+    const uintptr_t mask_word = expand_mask[widx];
+    uintptr_t write_word = 0;
+    if (mask_word) {
+      const uint32_t mask_set_ct = PopcountWord(mask_word);
+      uint32_t next_compact_idx_lowbits = compact_idx_lowbits + mask_set_ct;
+      if (next_compact_idx_lowbits <= kBitsPerWord) {
+        write_word = _pdep_u64(compact_word, mask_word);
+        if (mask_set_ct != kBitsPerWord) {
+          compact_word = compact_word >> mask_set_ct;
+        } else {
+          // avoid nasal demons
+          compact_word = 0;
+        }
+      } else {
+        uintptr_t next_compact_word;
+        CopyFromUnalignedIncrW(&next_compact_word, &compact_bitarr_biter);
+        next_compact_idx_lowbits -= kBitsPerWord;
+        compact_word |= next_compact_word << (kBitsPerWord - compact_idx_lowbits);
+        write_word = _pdep_u64(compact_word, mask_word);
+        if (next_compact_idx_lowbits != kBitsPerWord) {
+          compact_word = next_compact_word >> next_compact_idx_lowbits;
+        } else {
+          compact_word = 0;
+        }
+      }
+      compact_idx_lowbits = next_compact_idx_lowbits;
+    }
+    target[widx] = write_word;
+  }
+}
+
+void ExpandThenSubsetBytearr(const void* __restrict compact_bitarr, const uintptr_t* __restrict expand_mask, const uintptr_t* __restrict subset_mask, uint32_t expand_size, uint32_t subset_size, uint32_t read_start_bit, uintptr_t* __restrict target) {
+  const uint32_t expand_sizex_m1 = expand_size + read_start_bit - 1;
+  const uint32_t leading_byte_ct = 1 + (expand_sizex_m1 % kBitsPerWord) / CHAR_BIT;
+  uintptr_t compact_word = SubwordLoad(compact_bitarr, leading_byte_ct) >> read_start_bit;
+  const unsigned char* compact_bitarrb = &(S_CAST(const unsigned char*, compact_bitarr)[leading_byte_ct]);
+  uint32_t compact_widx = UINT32_MAX;  // deliberate overflow
+  uint32_t compact_idx_lowbits = read_start_bit + CHAR_BIT * (sizeof(uintptr_t) - leading_byte_ct);
+  const uint32_t subset_size_lowbits = subset_size % kBitsPerWord;
+  uintptr_t* target_iter = target;
+  uintptr_t* target_last = &(target[subset_size / kBitsPerWord]);
+  uintptr_t cur_output_word = 0;
+  uint32_t read_widx = UINT32_MAX;  // deliberate overflow
+  uint32_t write_idx_lowbits = 0;
+
+  // bugfix (5 Feb 2018): missed a case in sparse subset_mask optimization
+  uint32_t expand_bit_ct_skip = 0;
+  while ((target_iter != target_last) || (write_idx_lowbits != subset_size_lowbits)) {
+    uintptr_t expand_word;
+    uintptr_t subset_word;
+    uint32_t expand_bit_ct;
+    while (1) {
+      ++read_widx;
+      expand_word = expand_mask[read_widx];
+      subset_word = subset_mask[read_widx];
+      expand_bit_ct = PopcountWord(expand_word);
+      if (subset_word) {
+        break;
+      }
+      expand_bit_ct_skip += expand_bit_ct;
+    }
+    uintptr_t extracted_bits = 0;
+    const uint32_t set_bit_ct = PopcountWord(subset_word);
+    if (expand_word & subset_word) {
+      // lazy load
+      compact_idx_lowbits += expand_bit_ct_skip;
+      if (compact_idx_lowbits >= kBitsPerWord) {
+        compact_widx += compact_idx_lowbits / kBitsPerWord;
+        compact_idx_lowbits = compact_idx_lowbits % kBitsPerWord;
+        CopyFromUnalignedOffsetW(&compact_word, compact_bitarrb, compact_widx);
+        compact_word >>= compact_idx_lowbits;
+      } else {
+        compact_word = compact_word >> expand_bit_ct_skip;
+      }
+      uint32_t next_compact_idx_lowbits = compact_idx_lowbits + expand_bit_ct;
+      uintptr_t expanded_bits;
+      if (next_compact_idx_lowbits <= kBitsPerWord) {
+        expanded_bits = _pdep_u64(compact_word, expand_word);
+        if (expand_bit_ct != kBitsPerWord) {
+          compact_word = compact_word >> expand_bit_ct;
+        }
+      } else {
+        ++compact_widx;
+        uintptr_t next_compact_word;
+        CopyFromUnalignedOffsetW(&next_compact_word, compact_bitarrb, compact_widx);
+        next_compact_idx_lowbits -= kBitsPerWord;
+        compact_word |= next_compact_word << (kBitsPerWord - compact_idx_lowbits);
+        expanded_bits = _pdep_u64(compact_word, expand_word);
+        if (next_compact_idx_lowbits != kBitsPerWord) {
+          compact_word = next_compact_word >> next_compact_idx_lowbits;
+        }
+      }
+      extracted_bits = _pext_u64(expanded_bits, subset_word);
+      compact_idx_lowbits = next_compact_idx_lowbits;
+      cur_output_word |= extracted_bits << write_idx_lowbits;
+      expand_bit_ct_skip = 0;
+    } else {
+      expand_bit_ct_skip += expand_bit_ct;
+    }
+    const uint32_t new_write_idx_lowbits = write_idx_lowbits + set_bit_ct;
+    if (new_write_idx_lowbits >= kBitsPerWord) {
+      *target_iter++ = cur_output_word;
+      // ...and these are the bits that fell off
+      if (write_idx_lowbits) {
+        cur_output_word = extracted_bits >> (kBitsPerWord - write_idx_lowbits);
+      } else {
+        cur_output_word = 0;
+      }
+    }
+    write_idx_lowbits = new_write_idx_lowbits % kBitsPerWord;
+  }
+  if (write_idx_lowbits) {
+    *target_iter = cur_output_word;
+  }
+}
+
+void ExpandBytearrNested(const void* __restrict compact_bitarr, const uintptr_t* __restrict mid_bitarr, const uintptr_t* __restrict top_expand_mask, uint32_t word_ct, uint32_t mid_popcount, uint32_t mid_start_bit, uintptr_t* __restrict mid_target, uintptr_t* __restrict compact_target) {
+  assert(mid_popcount);
+  const uint32_t leading_byte_ct = 1 + ((mid_popcount - 1) % kBitsPerWord) / CHAR_BIT;
+  uintptr_t compact_read_word = SubwordLoad(compact_bitarr, leading_byte_ct);
+  uint32_t compact_idx_lowbits = CHAR_BIT * (sizeof(intptr_t) - leading_byte_ct);
+  const unsigned char* compact_bitarr_biter = &(S_CAST(const unsigned char*, compact_bitarr)[leading_byte_ct]);
+  const uintptr_t* mid_bitarr_iter = mid_bitarr;
+  uint32_t mid_idx_lowbits = mid_start_bit;
+  uintptr_t mid_read_word = (*mid_bitarr_iter) >> mid_start_bit;
+  for (uint32_t widx = 0; widx != word_ct; ++widx) {
+    const uintptr_t top_word = top_expand_mask[widx];
+    uintptr_t mid_write_word = 0;
+    uintptr_t compact_write_word = 0;
+    if (top_word) {
+      const uint32_t top_set_ct = PopcountWord(top_word);
+      uint32_t next_mid_idx_lowbits = mid_idx_lowbits + top_set_ct;
+      if (next_mid_idx_lowbits <= kBitsPerWord) {
+        mid_write_word = _pdep_u64(mid_read_word, top_word);
+        if (top_set_ct != kBitsPerWord) {
+          mid_read_word = mid_read_word >> top_set_ct;
+        } else {
+          // avoid nasal demons
+          mid_read_word = 0;
+        }
+      } else {
+        uintptr_t next_mid_read_word = *(++mid_bitarr_iter);
+        next_mid_idx_lowbits -= kBitsPerWord;
+        mid_read_word |= next_mid_read_word << (kBitsPerWord - mid_idx_lowbits);
+        mid_write_word = _pdep_u64(mid_read_word, top_word);
+        if (next_mid_idx_lowbits != kBitsPerWord) {
+          mid_read_word = next_mid_read_word >> next_mid_idx_lowbits;
+        } else {
+          mid_read_word = 0;
+        }
+      }
+      mid_idx_lowbits = next_mid_idx_lowbits;
+      if (mid_write_word) {
+        const uint32_t mid_set_ct = PopcountWord(mid_write_word);
+        uint32_t next_compact_idx_lowbits = compact_idx_lowbits + mid_set_ct;
+        if (next_compact_idx_lowbits <= kBitsPerWord) {
+          compact_write_word = _pdep_u64(compact_read_word, mid_write_word);
+          if (mid_set_ct != kBitsPerWord) {
+            compact_read_word = compact_read_word >> mid_set_ct;
+          } else {
+            compact_read_word = 0;
+          }
+        } else {
+          uintptr_t next_compact_word;
+          CopyFromUnalignedIncrW(&next_compact_word, &compact_bitarr_biter);
+          next_compact_idx_lowbits -= kBitsPerWord;
+          compact_read_word |= next_compact_word << (kBitsPerWord - compact_idx_lowbits);
+          compact_write_word = _pdep_u64(compact_read_word, mid_write_word);
+          if (next_compact_idx_lowbits != kBitsPerWord) {
+            compact_read_word = next_compact_word >> next_compact_idx_lowbits;
+          } else {
+            compact_read_word = 0;
+          }
+        }
+        compact_idx_lowbits = next_compact_idx_lowbits;
+      }
+    }
+    mid_target[widx] = mid_write_word;
+    compact_target[widx] = compact_write_word;
+  }
+}
+
+void ExpandThenSubsetBytearrNested(const void* __restrict compact_bitarr, const uintptr_t* __restrict mid_bitarr, const uintptr_t* __restrict top_expand_mask, const uintptr_t* __restrict subset_mask, uint32_t subset_size, uint32_t mid_popcount, uint32_t mid_start_bit, uintptr_t* __restrict mid_target, uintptr_t* __restrict compact_target) {
+  assert(mid_popcount);
+  const uint32_t leading_byte_ct = 1 + ((mid_popcount - 1) % kBitsPerWord) / CHAR_BIT;
+  uintptr_t compact_read_word = SubwordLoad(compact_bitarr, leading_byte_ct);
+  uint32_t compact_idx_lowbits = CHAR_BIT * (sizeof(intptr_t) - leading_byte_ct);
+  const unsigned char* compact_bitarrb = &(S_CAST(const unsigned char*, compact_bitarr)[leading_byte_ct]);
+  const uintptr_t* mid_bitarr_iter = mid_bitarr;
+  const uint32_t subset_size_lowbits = subset_size % kBitsPerWord;
+  const uint32_t write_widx_last = subset_size / kBitsPerWord;
+  uintptr_t mid_read_word = (*mid_bitarr_iter) >> mid_start_bit;
+  uintptr_t mid_output_word = 0;
+  uintptr_t compact_output_word = 0;
+  uint32_t mid_idx_lowbits = mid_start_bit;
+  uint32_t compact_widx = UINT32_MAX;  // deliberate overflow
+  uint32_t read_widx = UINT32_MAX;  // deliberate overflow
+  uint32_t write_idx_lowbits = 0;
+  uint32_t write_widx = 0;
+
+  // bugfix (5 Feb 2018): missed a case in sparse subset_mask optimization
+  uint32_t mid_set_skip = 0;
+  while ((write_widx != write_widx_last) || (write_idx_lowbits != subset_size_lowbits)) {
+    uintptr_t subset_word;
+    uintptr_t mid_expanded_bits;
+    uint32_t mid_set_ct;
+    while (1) {
+      ++read_widx;
+      uintptr_t top_word = top_expand_mask[read_widx];
+      subset_word = subset_mask[read_widx];
+      mid_expanded_bits = 0;
+      if (top_word) {
+        uint32_t top_set_ct = PopcountWord(top_word);
+        uint32_t next_mid_idx_lowbits = mid_idx_lowbits + top_set_ct;
+        if (next_mid_idx_lowbits <= kBitsPerWord) {
+          mid_expanded_bits = _pdep_u64(mid_read_word, top_word);
+          if (top_set_ct != kBitsPerWord) {
+            mid_read_word = mid_read_word >> top_set_ct;
+          } else {
+            // avoid nasal demons
+            mid_read_word = 0;
+          }
+        } else {
+          uintptr_t next_mid_read_word = *(++mid_bitarr_iter);
+          next_mid_idx_lowbits -= kBitsPerWord;
+          mid_read_word |= next_mid_read_word << (kBitsPerWord - mid_idx_lowbits);
+          mid_expanded_bits = _pdep_u64(mid_read_word, top_word);
+          if (next_mid_idx_lowbits != kBitsPerWord) {
+            mid_read_word = next_mid_read_word >> next_mid_idx_lowbits;
+          } else {
+            mid_read_word = 0;
+          }
+        }
+        mid_idx_lowbits = next_mid_idx_lowbits;
+      }
+      mid_set_ct = PopcountWord(mid_expanded_bits);
+      if (subset_word) {
+        break;
+      }
+      mid_set_skip += mid_set_ct;
+    }
+
+    uintptr_t mid_extracted_bits = 0;
+    uintptr_t compact_extracted_bits = 0;
+    uint32_t set_bit_ct = PopcountWord(subset_word);
+    if (mid_expanded_bits & subset_word) {
+      // lazy load
+      compact_idx_lowbits += mid_set_skip;
+      if (compact_idx_lowbits >= kBitsPerWord) {
+        compact_widx += compact_idx_lowbits / kBitsPerWord;
+        compact_idx_lowbits = compact_idx_lowbits % kBitsPerWord;
+        CopyFromUnalignedOffsetW(&compact_read_word, compact_bitarrb, compact_widx);
+        compact_read_word >>= compact_idx_lowbits;
+      } else {
+        compact_read_word = compact_read_word >> mid_set_skip;
+      }
+      uint32_t next_compact_idx_lowbits = compact_idx_lowbits + mid_set_ct;
+      uintptr_t compact_expanded_bits;
+      if (next_compact_idx_lowbits <= kBitsPerWord) {
+        compact_expanded_bits = _pdep_u64(compact_read_word, mid_expanded_bits);
+        if (mid_set_ct != kBitsPerWord) {
+          compact_read_word = compact_read_word >> mid_set_ct;
+        }
+      } else {
+        ++compact_widx;
+        uintptr_t next_compact_word;
+        CopyFromUnalignedOffsetW(&next_compact_word, compact_bitarrb, compact_widx);
+        next_compact_idx_lowbits -= kBitsPerWord;
+        compact_read_word |= next_compact_word << (kBitsPerWord - compact_idx_lowbits);
+        compact_expanded_bits = _pdep_u64(compact_read_word, mid_expanded_bits);
+        if (next_compact_idx_lowbits != kBitsPerWord) {
+          compact_read_word = next_compact_word >> next_compact_idx_lowbits;
+        }
+      }
+      compact_extracted_bits = _pext_u64(compact_expanded_bits, subset_word);
+      mid_extracted_bits = _pext_u64(mid_expanded_bits, subset_word);
+      compact_idx_lowbits = next_compact_idx_lowbits;
+      compact_output_word |= compact_extracted_bits << write_idx_lowbits;
+      mid_output_word |= mid_extracted_bits << write_idx_lowbits;
+      mid_set_skip = 0;
+    } else {
+      mid_set_skip += mid_set_ct;
+    }
+    const uint32_t new_write_idx_lowbits = write_idx_lowbits + set_bit_ct;
+    if (new_write_idx_lowbits >= kBitsPerWord) {
+      mid_target[write_widx] = mid_output_word;
+      compact_target[write_widx] = compact_output_word;
+      ++write_widx;
+      if (write_idx_lowbits) {
+        mid_output_word = mid_extracted_bits >> (kBitsPerWord - write_idx_lowbits);
+        compact_output_word = compact_extracted_bits >> (kBitsPerWord - write_idx_lowbits);
+      } else {
+        mid_output_word = 0;
+        compact_output_word = 0;
+      }
+    }
+    write_idx_lowbits = new_write_idx_lowbits % kBitsPerWord;
+  }
+  if (write_idx_lowbits) {
+    mid_target[write_widx] = mid_output_word;
+    compact_target[write_widx] = compact_output_word;
+  }
+}
+#else  // !USE_AVX2
+void CopyBitarrSubset(const uintptr_t* __restrict raw_bitarr, const uintptr_t* __restrict subset_mask, uint32_t output_bit_idx_end, uintptr_t* __restrict output_bitarr) {
+  const uint32_t output_bit_idx_end_lowbits = output_bit_idx_end % kBitsPerWord;
+  uintptr_t* output_bitarr_iter = output_bitarr;
+  uintptr_t* output_bitarr_last = &(output_bitarr[output_bit_idx_end / kBitsPerWord]);
+  uintptr_t cur_output_word = 0;
+  uint32_t read_widx = UINT32_MAX;  // deliberate overflow
+  uint32_t write_idx_lowbits = 0;
+  while ((output_bitarr_iter != output_bitarr_last) || (write_idx_lowbits != output_bit_idx_end_lowbits)) {
+    uintptr_t cur_mask_word;
+    // sparse subset_mask optimization
+    // guaranteed to terminate since there's at least one more set bit
+    do {
+      cur_mask_word = subset_mask[++read_widx];
+    } while (!cur_mask_word);
+    uintptr_t cur_masked_input_word = raw_bitarr[read_widx] & cur_mask_word;
+    const uint32_t cur_mask_popcount = PopcountWord(cur_mask_word);
+    uintptr_t subsetted_input_word = 0;
+    while (cur_masked_input_word) {
+      const uintptr_t mask_word_high = (cur_mask_word | (cur_masked_input_word ^ (cur_masked_input_word - 1))) + 1;
+      if (!mask_word_high) {
+        subsetted_input_word |= cur_masked_input_word >> (kBitsPerWord - cur_mask_popcount);
+        break;
+      }
+      const uint32_t cur_read_end = ctzw(mask_word_high);
+      const uintptr_t bits_to_copy = cur_masked_input_word & (~mask_word_high);
+      cur_masked_input_word ^= bits_to_copy;
+      const uint32_t cur_write_end = PopcountWord(cur_mask_word & (~mask_word_high));
+      subsetted_input_word |= bits_to_copy >> (cur_read_end - cur_write_end);
+    }
+    cur_output_word |= subsetted_input_word << write_idx_lowbits;
+    const uint32_t new_write_idx_lowbits = write_idx_lowbits + cur_mask_popcount;
+    if (new_write_idx_lowbits >= kBitsPerWord) {
+      *output_bitarr_iter++ = cur_output_word;
+      // ...and these are the bits that fell off
+      // bugfix: unsafe to right-shift 64
+      if (write_idx_lowbits) {
+        cur_output_word = subsetted_input_word >> (kBitsPerWord - write_idx_lowbits);
+      } else {
+        cur_output_word = 0;
+      }
+    }
+    write_idx_lowbits = new_write_idx_lowbits % kBitsPerWord;
+  }
+  if (write_idx_lowbits) {
+    *output_bitarr_iter = cur_output_word;
+  }
+}
+
+#  ifdef NO_UNALIGNED
+void CopyBitarrSubsetToUnaligned(const uintptr_t* __restrict raw_bitarr, const uintptr_t* __restrict subset_mask, uint32_t output_bit_idx_end, void* __restrict output_bitarr) {
+  const uint32_t output_bit_idx_end_lowbits = output_bit_idx_end % kBitsPerWord;
+  unsigned char* output_bitarr_iter = S_CAST(unsigned char*, output_bitarr);
+  unsigned char* output_bitarr_last = &(output_bitarr_iter[(output_bit_idx_end / kBitsPerWord) * kBytesPerWord]);
+  uintptr_t cur_output_word = 0;
+  uint32_t read_widx = UINT32_MAX;  // deliberate overflow
+  uint32_t write_idx_lowbits = 0;
+  while ((output_bitarr_iter != output_bitarr_last) || (write_idx_lowbits != output_bit_idx_end_lowbits)) {
+    uintptr_t cur_mask_word;
+    // sparse subset_mask optimization
+    // guaranteed to terminate since there's at least one more set bit
+    do {
+      cur_mask_word = subset_mask[++read_widx];
+    } while (!cur_mask_word);
+    uintptr_t cur_masked_input_word = raw_bitarr[read_widx] & cur_mask_word;
+    const uint32_t cur_mask_popcount = PopcountWord(cur_mask_word);
+    uintptr_t subsetted_input_word = 0;
+    while (cur_masked_input_word) {
+      const uintptr_t mask_word_high = (cur_mask_word | (cur_masked_input_word ^ (cur_masked_input_word - 1))) + 1;
+      if (!mask_word_high) {
+        subsetted_input_word |= cur_masked_input_word >> (kBitsPerWord - cur_mask_popcount);
+        break;
+      }
+      const uint32_t cur_read_end = ctzw(mask_word_high);
+      const uintptr_t bits_to_copy = cur_masked_input_word & (~mask_word_high);
+      cur_masked_input_word ^= bits_to_copy;
+      const uint32_t cur_write_end = PopcountWord(cur_mask_word & (~mask_word_high));
+      subsetted_input_word |= bits_to_copy >> (cur_read_end - cur_write_end);
+    }
+    cur_output_word |= subsetted_input_word << write_idx_lowbits;
+    const uint32_t new_write_idx_lowbits = write_idx_lowbits + cur_mask_popcount;
+    if (new_write_idx_lowbits >= kBitsPerWord) {
+      AppendW(cur_output_word, &output_bitarr_iter);
+      // ...and these are the bits that fell off
+      // bugfix: unsafe to right-shift 64
+      if (write_idx_lowbits) {
+        cur_output_word = subsetted_input_word >> (kBitsPerWord - write_idx_lowbits);
+      } else {
+        cur_output_word = 0;
+      }
+    }
+    write_idx_lowbits = new_write_idx_lowbits % kBitsPerWord;
+  }
+  if (write_idx_lowbits) {
+    CopyToUnalignedW(output_bitarr_iter, &cur_output_word);
+  }
+}
+#  endif
+
+// Basic SSE2 implementation of Lauradoux/Walisch popcount.
+uintptr_t PopcountVecsNoAvx2(const VecW* bit_vvec, uintptr_t vec_ct) {
+  // popcounts vptr[0..(vec_ct-1)].  Assumes vec_ct is a multiple of 3 (0 ok).
+  assert(!(vec_ct % 3));
+  const VecW m0 = vecw_setzero();
+  const VecW m1 = VCONST_W(kMask5555);
+  const VecW m2 = VCONST_W(kMask3333);
+  const VecW m4 = VCONST_W(kMask0F0F);
+  const VecW* bit_vvec_iter = bit_vvec;
+  VecW prev_sad_result = vecw_setzero();
+  VecW acc = vecw_setzero();
+  uintptr_t cur_incr = 30;
+  for (; ; vec_ct -= cur_incr) {
+    if (vec_ct < 30) {
+      if (!vec_ct) {
+        acc = acc + prev_sad_result;
+        return HsumW(acc);
+      }
+      cur_incr = vec_ct;
+    }
+    VecW inner_acc = vecw_setzero();
+    const VecW* bit_vvec_stop = &(bit_vvec_iter[cur_incr]);
+    do {
+      VecW count1 = *bit_vvec_iter++;
+      VecW count2 = *bit_vvec_iter++;
+      VecW half1 = *bit_vvec_iter++;
+      VecW half2 = vecw_srli(half1, 1) & m1;
+      half1 = half1 & m1;
+      // Two bits can represent values from 0-3, so make each pair in count1
+      // count2 store a partial bitcount covering themselves AND another bit
+      // from elsewhere.
+      count1 = count1 - (vecw_srli(count1, 1) & m1);
+      count2 = count2 - (vecw_srli(count2, 1) & m1);
+      count1 = count1 + half1;
+      count2 = count2 + half2;
+      // Four bits represent 0-15, so we can safely add four 0-3 partial
+      // bitcounts together.
+      count1 = (count1 & m2) + (vecw_srli(count1, 2) & m2);
+      count1 = count1 + (count2 & m2) + (vecw_srli(count2, 2) & m2);
+      // Accumulator stores sixteen 0-255 counts in parallel.
+      // (32 in AVX2 case, 4 in 32-bit case)
+      inner_acc = inner_acc + (count1 & m4) + (vecw_srli(count1, 4) & m4);
+    } while (bit_vvec_iter < bit_vvec_stop);
+    // _mm_sad_epu8() has better throughput than the previous method of
+    // horizontal-summing the bytes in inner_acc, by enough to compensate for
+    // the loop length being reduced from 30 to 15 vectors, but it has high
+    // latency.  We work around that by waiting till the end of the next full
+    // loop iteration to actually use the SAD result.
+    acc = acc + prev_sad_result;
+    prev_sad_result = vecw_bytesum(inner_acc, m0);
+  }
+}
+
+static inline uintptr_t PopcountVecsNoAvx2Intersect(const VecW* __restrict vvec1_iter, const VecW* __restrict vvec2_iter, uintptr_t vec_ct) {
+  // popcounts vvec1 AND vvec2[0..(ct-1)].  ct is a multiple of 3.
+  assert(!(vec_ct % 3));
+  const VecW m0 = vecw_setzero();
+  const VecW m1 = VCONST_W(kMask5555);
+  const VecW m2 = VCONST_W(kMask3333);
+  const VecW m4 = VCONST_W(kMask0F0F);
+  VecW prev_sad_result = vecw_setzero();
+  VecW acc = vecw_setzero();
+  uintptr_t cur_incr = 30;
+  for (; ; vec_ct -= cur_incr) {
+    if (vec_ct < 30) {
+      if (!vec_ct) {
+        acc = acc + prev_sad_result;
+        return HsumW(acc);
+      }
+      cur_incr = vec_ct;
+    }
+    VecW inner_acc = vecw_setzero();
+    const VecW* vvec1_stop = &(vvec1_iter[cur_incr]);
+    do {
+      VecW count1 = (*vvec1_iter++) & (*vvec2_iter++);
+      VecW count2 = (*vvec1_iter++) & (*vvec2_iter++);
+      VecW half1 = (*vvec1_iter++) & (*vvec2_iter++);
+      const VecW half2 = vecw_srli(half1, 1) & m1;
+      half1 = half1 & m1;
+      count1 = count1 - (vecw_srli(count1, 1) & m1);
+      count2 = count2 - (vecw_srli(count2, 1) & m1);
+      count1 = count1 + half1;
+      count2 = count2 + half2;
+      count1 = (count1 & m2) + (vecw_srli(count1, 2) & m2);
+      count1 = count1 + (count2 & m2) + (vecw_srli(count2, 2) & m2);
+      inner_acc = inner_acc + (count1 & m4) + (vecw_srli(count1, 4) & m4);
+    } while (vvec1_iter < vvec1_stop);
+    acc = acc + prev_sad_result;
+    prev_sad_result = vecw_bytesum(inner_acc, m0);
+  }
+}
+
+uintptr_t PopcountWordsIntersect(const uintptr_t* __restrict bitvec1_iter, const uintptr_t* __restrict bitvec2_iter, uintptr_t word_ct) {
+  uintptr_t tot = 0;
+  const uintptr_t* bitvec1_end = &(bitvec1_iter[word_ct]);
+  const uintptr_t trivec_ct = word_ct / (3 * kWordsPerVec);
+  tot += PopcountVecsNoAvx2Intersect(R_CAST(const VecW*, bitvec1_iter), R_CAST(const VecW*, bitvec2_iter), trivec_ct * 3);
+  bitvec1_iter = &(bitvec1_iter[trivec_ct * (3 * kWordsPerVec)]);
+  bitvec2_iter = &(bitvec2_iter[trivec_ct * (3 * kWordsPerVec)]);
+  while (bitvec1_iter < bitvec1_end) {
+    tot += PopcountWord((*bitvec1_iter++) & (*bitvec2_iter++));
+  }
+  return tot;
+}
+
+static inline uintptr_t PopcountVecsNoAvx2Xor(const VecW* __restrict vvec1_iter, const VecW* __restrict vvec2_iter, uintptr_t vec_ct) {
+  // popcounts vvec1 XOR vvec2[0..(ct-1)].  ct is a multiple of 3.
+  assert(!(vec_ct % 3));
+  const VecW m0 = vecw_setzero();
+  const VecW m1 = VCONST_W(kMask5555);
+  const VecW m2 = VCONST_W(kMask3333);
+  const VecW m4 = VCONST_W(kMask0F0F);
+  VecW prev_sad_result = vecw_setzero();
+  VecW acc = vecw_setzero();
+  uintptr_t cur_incr = 30;
+  for (; ; vec_ct -= cur_incr) {
+    if (vec_ct < 30) {
+      if (!vec_ct) {
+        acc = acc + prev_sad_result;
+        return HsumW(acc);
+      }
+      cur_incr = vec_ct;
+    }
+    VecW inner_acc = vecw_setzero();
+    const VecW* vvec1_stop = &(vvec1_iter[cur_incr]);
+    do {
+      VecW count1 = (*vvec1_iter++) ^ (*vvec2_iter++);
+      VecW count2 = (*vvec1_iter++) ^ (*vvec2_iter++);
+      VecW half1 = (*vvec1_iter++) ^ (*vvec2_iter++);
+      const VecW half2 = vecw_srli(half1, 1) & m1;
+      half1 = half1 & m1;
+      count1 = count1 - (vecw_srli(count1, 1) & m1);
+      count2 = count2 - (vecw_srli(count2, 1) & m1);
+      count1 = count1 + half1;
+      count2 = count2 + half2;
+      count1 = (count1 & m2) + (vecw_srli(count1, 2) & m2);
+      count1 = count1 + (count2 & m2) + (vecw_srli(count2, 2) & m2);
+      inner_acc = inner_acc + (count1 & m4) + (vecw_srli(count1, 4) & m4);
+    } while (vvec1_iter < vvec1_stop);
+    acc = acc + prev_sad_result;
+    prev_sad_result = vecw_bytesum(inner_acc, m0);
+  }
+}
+
+uintptr_t PopcountWordsXor(const uintptr_t* __restrict bitvec1_iter, const uintptr_t* __restrict bitvec2_iter, uintptr_t word_ct) {
+  uintptr_t tot = 0;
+  const uintptr_t* bitvec1_end = &(bitvec1_iter[word_ct]);
+  const uintptr_t trivec_ct = word_ct / (3 * kWordsPerVec);
+  tot += PopcountVecsNoAvx2Xor(R_CAST(const VecW*, bitvec1_iter), R_CAST(const VecW*, bitvec2_iter), trivec_ct * 3);
+  bitvec1_iter = &(bitvec1_iter[trivec_ct * (3 * kWordsPerVec)]);
+  bitvec2_iter = &(bitvec2_iter[trivec_ct * (3 * kWordsPerVec)]);
+  while (bitvec1_iter < bitvec1_end) {
+    tot += PopcountWord((*bitvec1_iter++) ^ (*bitvec2_iter++));
+  }
+  return tot;
+}
+
+/*
+static inline uintptr_t PopcountVecsNoAvx2Intersect3(const VecW* __restrict vvec1_iter, const VecW* __restrict vvec2_iter, const VecW* __restrict vvec3_iter, uintptr_t vec_ct) {
+  assert(!(vec_ct % 3));
+  const VecW m0 = vecw_setzero();
+  const VecW m1 = VCONST_W(kMask5555);
+  const VecW m2 = VCONST_W(kMask3333);
+  const VecW m4 = VCONST_W(kMask0F0F);
+  VecW prev_sad_result = vecw_setzero();
+  VecW acc = vecw_setzero();
+  uintptr_t cur_incr = 30;
+  for (; ; vec_ct -= cur_incr) {
+    if (vec_ct < 30) {
+      if (!vec_ct) {
+        acc = acc + prev_sad_result;
+        return HsumW(acc);
+      }
+      cur_incr = vec_ct;
+    }
+    VecW inner_acc = vecw_setzero();
+    const VecW* vvec1_stop = &(vvec1_iter[cur_incr]);
+    do {
+      VecW count1 = (*vvec1_iter++) & (*vvec2_iter++) & (*vvec3_iter++);
+      VecW count2 = (*vvec1_iter++) & (*vvec2_iter++) & (*vvec3_iter++);
+      VecW half1 = (*vvec1_iter++) & (*vvec2_iter++) & (*vvec3_iter++);
+      const VecW half2 = vecw_srli(half1, 1) & m1;
+      half1 = half1 & m1;
+      count1 = count1 - (vecw_srli(count1, 1) & m1);
+      count2 = count2 - (vecw_srli(count2, 1) & m1);
+      count1 = count1 + half1;
+      count2 = count2 + half2;
+      count1 = (count1 & m2) + (vecw_srli(count1, 2) & m2);
+      count1 = count1 + (count2 & m2) + (vecw_srli(count2, 2) & m2);
+      inner_acc = inner_acc + (count1 & m4) + (vecw_srli(count1, 4) & m4);
+    } while (vvec1_iter < vvec1_stop);
+    acc = acc + prev_sad_result;
+    prev_sad_result = vecw_bytesum(inner_acc, m0);
+  }
+}
+
+uintptr_t PopcountWordsIntersect3(const uintptr_t* __restrict bitvec1_iter, const uintptr_t* __restrict bitvec2_iter, const uintptr_t* __restrict bitvec3_iter, uintptr_t word_ct) {
+  uintptr_t tot = 0;
+  const uintptr_t* bitvec1_end = &(bitvec1_iter[word_ct]);
+  const uintptr_t trivec_ct = word_ct / (3 * kWordsPerVec);
+  tot += PopcountVecsNoAvx2Intersect3(R_CAST(const VecW*, bitvec1_iter), R_CAST(const VecW*, bitvec2_iter), R_CAST(const VecW*, bitvec3_iter), trivec_ct * 3);
+  bitvec1_iter = &(bitvec1_iter[trivec_ct * (3 * kWordsPerVec)]);
+  bitvec2_iter = &(bitvec2_iter[trivec_ct * (3 * kWordsPerVec)]);
+  bitvec3_iter = &(bitvec3_iter[trivec_ct * (3 * kWordsPerVec)]);
+  while (bitvec1_iter < bitvec1_end) {
+    tot += PopcountWord((*bitvec1_iter++) & (*bitvec2_iter++) & (*bitvec3_iter++));
+  }
+  return tot;
+}
+*/
+
+void ExpandBytearr(const void* __restrict compact_bitarr, const uintptr_t* __restrict expand_mask, uint32_t word_ct, uint32_t expand_size, uint32_t read_start_bit, uintptr_t* __restrict target) {
+  ZeroWArr(word_ct, target);
+  const unsigned char* compact_bitarrb = S_CAST(const unsigned char*, compact_bitarr);
+  const uint32_t expand_sizex_m1 = expand_size + read_start_bit - 1;
+  const uint32_t compact_widx_last = expand_sizex_m1 / kBitsPerWord;
+  uint32_t compact_idx_lowbits = read_start_bit;
+  uint32_t loop_len = kBitsPerWord;
+  uintptr_t write_widx = 0;
+  uintptr_t expand_mask_bits = expand_mask[0];
+  for (uint32_t compact_widx = 0; ; ++compact_widx) {
+    uintptr_t compact_word;
+    if (compact_widx >= compact_widx_last) {
+      if (compact_widx > compact_widx_last) {
+        return;
+      }
+      loop_len = 1 + (expand_sizex_m1 % kBitsPerWord);
+      // avoid possible segfault
+      compact_word = SubwordLoad(&(compact_bitarrb[compact_widx * kBytesPerWord]), DivUp(loop_len, CHAR_BIT));
+    } else {
+      CopyFromUnalignedOffsetW(&compact_word, compact_bitarrb, compact_widx);
+    }
+    for (; compact_idx_lowbits != loop_len; ++compact_idx_lowbits) {
+      const uintptr_t lowbit = BitIter1y(expand_mask, &write_widx, &expand_mask_bits);
+      // bugfix: can't just use (compact_word & 1) and compact_word >>= 1,
+      // since we may skip the first bit on the first loop iteration
+      if ((compact_word >> compact_idx_lowbits) & 1) {
+        target[write_widx] |= lowbit;
+      }
+    }
+    compact_idx_lowbits = 0;
+  }
+}
+
+void ExpandThenSubsetBytearr(const void* __restrict compact_bitarr, const uintptr_t* __restrict expand_mask, const uintptr_t* __restrict subset_mask, uint32_t expand_size, uint32_t subset_size, uint32_t read_start_bit, uintptr_t* __restrict target) {
+  const uint32_t expand_sizex_m1 = expand_size + read_start_bit - 1;
+  const uint32_t leading_byte_ct = 1 + (expand_sizex_m1 % kBitsPerWord) / CHAR_BIT;
+  uint32_t read_idx_lowbits = CHAR_BIT * (sizeof(intptr_t) - leading_byte_ct);
+  uintptr_t compact_read_word = SubwordLoad(compact_bitarr, leading_byte_ct) << read_idx_lowbits;
+  read_idx_lowbits += read_start_bit;
+  const unsigned char* compact_bitarr_biter = &(S_CAST(const unsigned char*, compact_bitarr)[leading_byte_ct]);
+  const uint32_t subset_size_lowbits = subset_size % kBitsPerWord;
+  uintptr_t* target_iter = target;
+  uintptr_t* target_last = &(target[subset_size / kBitsPerWord]);
+  uintptr_t compact_write_word = 0;
+  uint32_t read_widx = 0;
+  // further improvement is probably possible (e.g. use AVX2 lazy-load), but
+  // I'll postpone for now
+  uint32_t write_idx_lowbits = 0;
+  while ((target_iter != target_last) || (write_idx_lowbits != subset_size_lowbits)) {
+    const uintptr_t subset_word = subset_mask[read_widx];
+    const uintptr_t expand_word = expand_mask[read_widx];
+    ++read_widx;
+    uintptr_t tmp_compact_write_word = 0;
+    if (expand_word) {
+      const uint32_t expand_bit_ct = PopcountWord(expand_word);
+      uint32_t read_idx_lowbits_end = read_idx_lowbits + expand_bit_ct;
+      uintptr_t tmp_compact_read_word = 0;
+      if (read_idx_lowbits != kBitsPerWord) {
+        tmp_compact_read_word = compact_read_word >> read_idx_lowbits;
+      }
+      if (read_idx_lowbits_end > kBitsPerWord) {
+        CopyFromUnalignedIncrW(&compact_read_word, &compact_bitarr_biter);
+        tmp_compact_read_word |= compact_read_word << (kBitsPerWord - read_idx_lowbits);
+        read_idx_lowbits_end -= kBitsPerWord;
+      }
+      tmp_compact_read_word = bzhi_max(tmp_compact_read_word, expand_bit_ct);
+      read_idx_lowbits = read_idx_lowbits_end;
+      if (tmp_compact_read_word) {
+        uintptr_t cur_intersect = subset_word & expand_word;
+        while (cur_intersect) {
+          const uintptr_t cur_intersect_and_arg = cur_intersect - k1LU;
+          const uintptr_t lowmask = (cur_intersect ^ cur_intersect_and_arg) >> 1;
+          const uint32_t read_idx_offset = PopcountWord(expand_word & lowmask);
+          uintptr_t shifted_compact_read_word = tmp_compact_read_word >> read_idx_offset;
+          if (shifted_compact_read_word & 1) {
+            tmp_compact_write_word |= (k1LU << PopcountWord(subset_word & lowmask));
+            if (shifted_compact_read_word == 1) {
+              break;
+            }
+          }
+          cur_intersect &= cur_intersect_and_arg;
+        }
+      }
+      compact_write_word |= tmp_compact_write_word << write_idx_lowbits;
+    }
+    const uint32_t write_idx_lowbits_end = write_idx_lowbits + PopcountWord(subset_word);
+    if (write_idx_lowbits_end >= kBitsPerWord) {
+      *target_iter++ = compact_write_word;
+      if (write_idx_lowbits) {
+        compact_write_word = tmp_compact_write_word >> (kBitsPerWord - write_idx_lowbits);
+      } else {
+        compact_write_word = 0;
+      }
+    }
+    write_idx_lowbits = write_idx_lowbits_end % kBitsPerWord;
+  }
+  if (write_idx_lowbits) {
+    *target_iter = compact_write_word;
+  }
+}
+
+// compact_bitarr := phaseinfo
+// mid_bitarr := phasepresent, [1 + het_ct]
+// top_expand_mask := all_hets, [raw_sample_ct]
+void ExpandBytearrNested(const void* __restrict compact_bitarr, const uintptr_t* __restrict mid_bitarr, const uintptr_t* __restrict top_expand_mask, uint32_t word_ct, uint32_t mid_popcount, uint32_t mid_start_bit, uintptr_t* __restrict mid_target, uintptr_t* __restrict compact_target) {
+  ZeroWArr(word_ct, mid_target);
+  ZeroWArr(word_ct, compact_target);
+  const unsigned char* compact_bitarrb = S_CAST(const unsigned char*, compact_bitarr);
+  const uint32_t mid_popcount_m1 = mid_popcount - 1;
+  const uint32_t compact_widx_last = mid_popcount_m1 / kBitsPerWord;
+  uint32_t mid_idx = mid_start_bit;
+  // can allow compact_idx_lowbits to be initialized to nonzero
+  uint32_t loop_len = kBitsPerWord;
+  uintptr_t write_widx = 0;
+  uintptr_t top_expand_mask_bits = top_expand_mask[0];
+  for (uint32_t compact_widx = 0; ; ++compact_widx) {
+    uintptr_t compact_word;
+    if (compact_widx >= compact_widx_last) {
+      if (compact_widx > compact_widx_last) {
+        return;
+      }
+      loop_len = 1 + (mid_popcount_m1 % kBitsPerWord);
+      // avoid possible segfault
+      compact_word = SubwordLoad(&(compact_bitarrb[compact_widx * kBytesPerWord]), DivUp(loop_len, CHAR_BIT));
+    } else {
+      CopyFromUnalignedOffsetW(&compact_word, compact_bitarrb, compact_widx);
+    }
+    for (uint32_t compact_idx_lowbits = 0; compact_idx_lowbits != loop_len; ++mid_idx) {
+      const uintptr_t lowbit = BitIter1y(top_expand_mask, &write_widx, &top_expand_mask_bits);
+      if (IsSet(mid_bitarr, mid_idx)) {
+        mid_target[write_widx] |= lowbit;
+        compact_target[write_widx] |= lowbit * (compact_word & 1);
+        compact_word >>= 1;
+        ++compact_idx_lowbits;
+      }
+    }
+  }
+}
+
+void ExpandThenSubsetBytearrNested(const void* __restrict compact_bitarr, const uintptr_t* __restrict mid_bitarr, const uintptr_t* __restrict top_expand_mask, const uintptr_t* __restrict subset_mask, uint32_t subset_size, uint32_t mid_popcount, uint32_t mid_start_bit, uintptr_t* __restrict mid_target, uintptr_t* __restrict compact_target) {
+  assert(mid_popcount);
+  const uint32_t leading_byte_ct = 1 + ((mid_popcount - 1) % kBitsPerWord) / CHAR_BIT;
+  uint32_t compact_idx_lowbits = CHAR_BIT * (sizeof(intptr_t) - leading_byte_ct);
+  uintptr_t compact_read_word = SubwordLoad(compact_bitarr, leading_byte_ct) << compact_idx_lowbits;
+  const unsigned char* compact_bitarr_biter = &(S_CAST(const unsigned char*, compact_bitarr)[leading_byte_ct]);
+  // bugfix (12 Apr 2018): need to round down here
+  const uint32_t subset_size_dl = subset_size / kBitsPerWord;
+  const uint32_t subset_size_lowbits = subset_size % kBitsPerWord;
+  const uintptr_t* mid_read_iter = mid_bitarr;
+  uintptr_t mid_read_word = *mid_read_iter++;
+  uintptr_t mid_write_word = 0;
+  uintptr_t compact_write_word = 0;
+  uint32_t mid_idx_lowbits = mid_start_bit;
+  uint32_t write_idx_lowbits = 0;
+  uint32_t write_widx = 0;
+  uint32_t read_widx = 0;
+  while ((write_widx != subset_size_dl) || (write_idx_lowbits != subset_size_lowbits)) {
+    const uintptr_t subset_word = subset_mask[read_widx];
+    const uintptr_t top_word = top_expand_mask[read_widx];
+    ++read_widx;
+    uintptr_t tmp_mid_write_word = 0;
+    uintptr_t tmp_compact_write_word = 0;
+    if (top_word) {
+      const uint32_t top_set_ct = PopcountWord(top_word);
+      uint32_t mid_idx_lowbits_end = mid_idx_lowbits + top_set_ct;
+      uintptr_t tmp_mid_read_word = 0;
+      if (mid_idx_lowbits != kBitsPerWord) {
+        tmp_mid_read_word = mid_read_word >> mid_idx_lowbits;
+      }
+      if (mid_idx_lowbits_end > kBitsPerWord) {
+        // be paranoid for now re: reading an extra word off the end of
+        // mid_bitarr
+        mid_read_word = *mid_read_iter++;
+        tmp_mid_read_word |= mid_read_word << (kBitsPerWord - mid_idx_lowbits);
+        mid_idx_lowbits_end -= kBitsPerWord;
+      }
+      tmp_mid_read_word = bzhi_max(tmp_mid_read_word, top_set_ct);
+      mid_idx_lowbits = mid_idx_lowbits_end;
+      if (tmp_mid_read_word) {
+        const uint32_t mid_set_ct = PopcountWord(tmp_mid_read_word);
+        uintptr_t tmp_compact_read_word;
+        if (compact_idx_lowbits != kBitsPerWord) {
+          const uint32_t compact_idx_lowbits_end = compact_idx_lowbits + mid_set_ct;
+          tmp_compact_read_word = compact_read_word >> compact_idx_lowbits;
+          // avoid reading off end of compact_bitarr here
+          if (compact_idx_lowbits_end <= kBitsPerWord) {
+            compact_idx_lowbits = compact_idx_lowbits_end;
+          } else {
+            CopyFromUnalignedIncrW(&compact_read_word, &compact_bitarr_biter);
+            tmp_compact_read_word |= compact_read_word << (kBitsPerWord - compact_idx_lowbits);
+            compact_idx_lowbits = compact_idx_lowbits_end - kBitsPerWord;
+          }
+        } else {
+          // special case, can't right-shift 64
+          CopyFromUnalignedIncrW(&compact_read_word, &compact_bitarr_biter);
+          compact_idx_lowbits = mid_set_ct;
+          tmp_compact_read_word = compact_read_word;
+        }
+        tmp_compact_read_word = bzhi_max(tmp_compact_read_word, mid_set_ct);
+
+        uintptr_t cur_masked_top = subset_word & top_word;
+        while (cur_masked_top) {
+          const uintptr_t cur_masked_top_and_arg = cur_masked_top - k1LU;
+          const uintptr_t lowmask = (cur_masked_top ^ cur_masked_top_and_arg) >> 1;
+          const uint32_t read_idx_offset = PopcountWord(top_word & lowmask);
+          uintptr_t shifted_mid_read_word = tmp_mid_read_word >> read_idx_offset;
+          if (shifted_mid_read_word & 1) {
+            // bugfix (7 Sep 2017): forgot the "k1LU << " part of this
+            const uintptr_t cur_bit = k1LU << PopcountWord(subset_word & lowmask);
+            tmp_mid_write_word |= cur_bit;
+            tmp_compact_write_word += cur_bit * ((tmp_compact_read_word >> (mid_set_ct - PopcountWord(shifted_mid_read_word))) & 1);
+            if (shifted_mid_read_word == 1) {
+              break;
+            }
+          }
+          cur_masked_top &= cur_masked_top_and_arg;
+        }
+      }
+      mid_write_word |= tmp_mid_write_word << write_idx_lowbits;
+      compact_write_word |= tmp_compact_write_word << write_idx_lowbits;
+    }
+    const uint32_t write_idx_lowbits_end = write_idx_lowbits + PopcountWord(subset_word);
+    if (write_idx_lowbits_end >= kBitsPerWord) {
+      mid_target[write_widx] = mid_write_word;
+      compact_target[write_widx] = compact_write_word;
+      ++write_widx;
+      if (write_idx_lowbits) {
+        const uint32_t rshift = kBitsPerWord - write_idx_lowbits;
+        mid_write_word = tmp_mid_write_word >> rshift;
+        compact_write_word = tmp_compact_write_word >> rshift;
+      } else {
+        mid_write_word = 0;
+        compact_write_word = 0;
+      }
+    }
+    write_idx_lowbits = write_idx_lowbits_end % kBitsPerWord;
+  }
+  if (write_idx_lowbits) {
+    mid_target[write_widx] = mid_write_word;
+    compact_target[write_widx] = compact_write_word;
+  }
+}
+#endif
+uintptr_t PopcountBytes(const void* bitarr, uintptr_t byte_ct) {
+  const unsigned char* bitarr_uc = S_CAST(const unsigned char*, bitarr);
+  const uintptr_t* bitvec;
+  const uint32_t lead_byte_ct = AlignKToAW(bitarr_uc, &bitvec);
+  uintptr_t tot = 0;
+  uint32_t trail_byte_ct;
+  // bugfix: had wrong condition here
+  if (byte_ct >= lead_byte_ct) {
+#ifdef USE_SSE2
+    const uint32_t word_rem = lead_byte_ct % kBytesPerWord;
+    if (word_rem) {
+      tot = PopcountWord(ProperSubwordLoad(bitarr_uc, word_rem));
+    }
+    if (lead_byte_ct >= kBytesPerWord) {
+      tot += PopcountWord(bitvec[-1]);
+#  ifdef USE_AVX2
+      if (lead_byte_ct >= 2 * kBytesPerWord) {
+        tot += PopcountWord(bitvec[-2]);
+        if (lead_byte_ct >= 3 * kBytesPerWord) {
+          tot += PopcountWord(bitvec[-3]);
+        }
+      }
+#  endif
+    }
+#else
+    if (lead_byte_ct) {
+      tot = PopcountWord(ProperSubwordLoad(bitarr_uc, lead_byte_ct));
+    }
+#endif
+    byte_ct -= lead_byte_ct;
+    const uintptr_t word_ct = byte_ct / kBytesPerWord;
+    // vec-alignment required here
+    tot += PopcountWords(bitvec, word_ct);
+    bitarr_uc = DowncastKToUc(&(bitvec[word_ct]));
+    trail_byte_ct = byte_ct % kBytesPerWord;
+  } else {
+    // this may still be >= kBytesPerWord in USE_SSE2 case, so can't remove
+    // loop
+    trail_byte_ct = byte_ct;
+  }
+  for (uint32_t bytes_remaining = trail_byte_ct; ; ) {
+    uintptr_t cur_word;
+    if (bytes_remaining < kBytesPerWord) {
+      if (!bytes_remaining) {
+        return tot;
+      }
+      cur_word = ProperSubwordLoad(bitarr_uc, bytes_remaining);
+      bytes_remaining = 0;
+    } else {
+      CopyFromUnalignedIncrW(&cur_word, &bitarr_uc);
+      bytes_remaining -= kBytesPerWord;
+    }
+    tot += PopcountWord(cur_word);
+  }
+}
+
+uintptr_t PopcountBytesMasked(const void* bitarr, const uintptr_t* mask_arr, uintptr_t byte_ct) {
+  // todo: try modifying PopcountWordsIntersect() to use unaligned load
+  // instructions; then, if there is no performance penalty, try modifying this
+  // main loop to call it.
+  const uintptr_t word_ct = byte_ct / kBytesPerWord;
+#ifdef USE_SSE42
+  const unsigned char* bitarr_uc = S_CAST(const unsigned char*, bitarr);
+  uintptr_t tot = 0;
+  for (uintptr_t widx = 0; widx != word_ct; ++widx) {
+    uintptr_t cur_word;
+    CopyFromUnalignedOffsetW(&cur_word, bitarr_uc, widx);
+    tot += PopcountWord(cur_word & mask_arr[widx]);
+  }
+  const uint32_t trail_byte_ct = byte_ct % kBytesPerWord;
+  if (trail_byte_ct) {
+    const uintptr_t cur_word = ProperSubwordLoad(&(bitarr_uc[word_ct * kBytesPerWord]), trail_byte_ct);
+    tot += PopcountWord(cur_word & mask_arr[word_ct]);
+  }
+  return tot;
+#else
+  const unsigned char* bitarr_biter = S_CAST(const unsigned char*, bitarr);
+  const uintptr_t mainblock_word_ct = word_ct - (word_ct % (24 / kBytesPerWord));
+  const unsigned char* bitarr_24b_end = &(bitarr_biter[mainblock_word_ct * kBytesPerWord]);
+  const uintptr_t* mask_arr_iter = mask_arr;
+  uintptr_t tot = 0;
+  while (bitarr_biter < bitarr_24b_end) {
+    uintptr_t loader;
+    CopyFromUnalignedIncrW(&loader, &bitarr_biter);
+    loader &= (*mask_arr_iter++);
+    uintptr_t ulii = loader - ((loader >> 1) & kMask5555);
+    CopyFromUnalignedIncrW(&loader, &bitarr_biter);
+    loader &= (*mask_arr_iter++);
+    uintptr_t uljj = loader - ((loader >> 1) & kMask5555);
+    CopyFromUnalignedIncrW(&loader, &bitarr_biter);
+    loader &= (*mask_arr_iter++);
+    ulii += (loader >> 1) & kMask5555;
+    uljj += loader & kMask5555;
+    ulii = (ulii & kMask3333) + ((ulii >> 2) & kMask3333);
+    ulii += (uljj & kMask3333) + ((uljj >> 2) & kMask3333);
+    uintptr_t tmp_stor = (ulii & kMask0F0F) + ((ulii >> 4) & kMask0F0F);
+
+#  ifndef __LP64__
+    CopyFromUnalignedIncrW(&loader, &bitarr_biter);
+    loader &= (*mask_arr_iter++);
+    ulii = loader - ((loader >> 1) & kMask5555);
+    CopyFromUnalignedIncrW(&loader, &bitarr_biter);
+    loader &= (*mask_arr_iter++);
+    uljj = loader - ((loader >> 1) & kMask5555);
+    CopyFromUnalignedIncrW(&loader, &bitarr_biter);
+    loader &= (*mask_arr_iter++);
+    ulii += (loader >> 1) & kMask5555;
+    uljj += loader & kMask5555;
+    ulii = (ulii & kMask3333) + ((ulii >> 2) & kMask3333);
+    ulii += (uljj & kMask3333) + ((uljj >> 2) & kMask3333);
+    tmp_stor += (ulii & kMask0F0F) + ((ulii >> 4) & kMask0F0F);
+#  endif
+
+    // 32-bit case: each 8-bit slot stores a number in 0..48.  Multiplying by
+    // 0x01010101 is equivalent to the left-shifts and adds we need to sum
+    // those four 8-bit numbers in the high-order slot.
+    // 64-bit case: each 8-bit slot stores a number in 0..24.
+    tot += (tmp_stor * kMask0101) >> (kBitsPerWord - 8);
+  }
+  for (uint32_t trail_byte_ct = byte_ct - (mainblock_word_ct * kBytesPerWord); ; ) {
+    uintptr_t cur_word;
+    if (trail_byte_ct < kBytesPerWord) {
+      if (!trail_byte_ct) {
+        return tot;
+      }
+      cur_word = ProperSubwordLoad(bitarr_biter, trail_byte_ct);
+      trail_byte_ct = 0;
+    } else {
+      CopyFromUnalignedIncrW(&cur_word, &bitarr_biter);
+      trail_byte_ct -= kBytesPerWord;
+    }
+    tot += PopcountWord(cur_word & (*mask_arr_iter++));
+  }
+#endif
+}
+
+void FillCumulativePopcounts(const uintptr_t* subset_mask, uint32_t word_ct, uint32_t* cumulative_popcounts) {
+  assert(word_ct);
+  const uint32_t word_ct_m1 = word_ct - 1;
+  uint32_t cur_sum = 0;
+  for (uint32_t widx = 0; widx != word_ct_m1; ++widx) {
+    cumulative_popcounts[widx] = cur_sum;
+    cur_sum += PopcountWord(subset_mask[widx]);
+  }
+  cumulative_popcounts[word_ct_m1] = cur_sum;
+}
+
+void FillCumulativePopcountsW(const uintptr_t* subset_mask, uintptr_t word_ct, uintptr_t* cumulative_popcounts_w) {
+  assert(word_ct);
+  const uintptr_t word_ct_m1 = word_ct - 1;
+  uintptr_t cur_sum = 0;
+  for (uintptr_t widx = 0; widx != word_ct_m1; ++widx) {
+    cumulative_popcounts_w[widx] = cur_sum;
+    cur_sum += PopcountWord(subset_mask[widx]);
+  }
+  cumulative_popcounts_w[word_ct_m1] = cur_sum;
+}
+
+void UidxsToIdxs(const uintptr_t* subset_mask, const uint32_t* subset_cumulative_popcounts, const uintptr_t idx_list_len, uint32_t* idx_list) {
+  uint32_t* idx_list_end = &(idx_list[idx_list_len]);
+  for (uint32_t* idx_list_iter = idx_list; idx_list_iter != idx_list_end; ++idx_list_iter) {
+    *idx_list_iter = RawToSubsettedPos(subset_mask, subset_cumulative_popcounts, *idx_list_iter);
+  }
+}
+
+void Expand1bitTo8(const void* __restrict bytearr, uint32_t input_bit_ct, uint32_t incr, void* __restrict dst) {
+  const unsigned char* bytearr_uc = S_CAST(const unsigned char*, bytearr);
+  const uint32_t input_bit_ct_plus = input_bit_ct + kBytesPerWord - 1;
+#if defined(USE_SHUFFLE8) && !defined(NO_UNALIGNED)
+  const uint32_t input_byte_ct = input_bit_ct_plus / 8;
+  const uint32_t fullvec_ct = input_byte_ct / (kBytesPerVec / 8);
+  uint32_t byte_idx = 0;
+  if (fullvec_ct) {
+    const Vec8thUint* bytearr_alias = R_CAST(const Vec8thUint*, bytearr_uc);
+#  ifdef USE_AVX2
+    const VecUc byte_gather = VecToUc(_mm256_setr_epi64x(0, kMask0101, 2 * kMask0101, 3 * kMask0101));
+    const VecUc bit_mask = VecToUc(_mm256_set1_epi64x(0x7fbfdfeff7fbfdfeLL));
+#  else
+    const VecUc byte_gather = VecToUc(_mm_setr_epi32(0, 0, 0x01010101, 0x01010101));
+    const VecUc bit_mask = VecToUc(_mm_set1_epi64x(0x7fbfdfeff7fbfdfeLL));
+#  endif
+    const VecUc all1 = vecuc_set1(255);
+    const VecUc subfrom = vecuc_set1(incr);
+    VecUc* dst_alias = S_CAST(VecUc*, dst);
+    for (uint32_t vec_idx = 0; vec_idx != fullvec_ct; ++vec_idx) {
+#  ifdef USE_AVX2
+      VecUc vmask = VecToUc(_mm256_set1_epi32(bytearr_alias[vec_idx]));
+#  else
+      VecUc vmask = VecToUc(_mm_set1_epi16(bytearr_alias[vec_idx]));
+#  endif
+      vmask = vecuc_shuffle8(vmask, byte_gather);
+      vmask = vmask | bit_mask;
+      vmask = (vmask == all1);
+      const VecUc result = subfrom - vmask;
+      vecuc_storeu(&(dst_alias[vec_idx]), result);
+    }
+    byte_idx = fullvec_ct * (kBytesPerVec / 8);
+  }
+  const uintptr_t incr_word = incr * kMask0101;
+  uintptr_t* dst_w = S_CAST(uintptr_t*, dst);
+  for (; byte_idx != input_byte_ct; ++byte_idx) {
+    const uintptr_t input_byte = bytearr_uc[byte_idx];
+#  ifdef USE_AVX2
+    const uintptr_t input_byte_scatter = _pdep_u64(input_byte, kMask0101);
+#  else
+    const uintptr_t input_byte_scatter = (((input_byte & 0xfe) * 0x2040810204080LLU) & kMask0101) | (input_byte & 1);
+#  endif
+    dst_w[byte_idx] = incr_word + input_byte_scatter;
+  }
+#else // NO_UNALIGNED || (!USE_SSE42)
+  const uintptr_t incr_word = incr * kMask0101;
+  uintptr_t* dst_w = S_CAST(uintptr_t*, dst);
+#  ifdef __LP64__
+  const uint32_t input_byte_ct = input_bit_ct_plus / 8;
+  for (uint32_t uii = 0; uii != input_byte_ct; ++uii) {
+    // this operation maps binary hgfedcba to h0000000g0000000f...
+    //                                        ^       ^       ^
+    //                                        |       |       |
+    //                                       56      48      40
+    // 1. (cur_variant_include_word & 0xfe) gives us hgfedcb0; necessary to
+    //    avoid carryover.
+    // 2. multiply by the number with bits 7, 14, 21, ..., 49 set, to get
+    //    hgfedcbhgfedcbhgf...
+    //    ^       ^       ^
+    //    |       |       |
+    //   56      48      40
+    // 3. mask out all but bits 8, 16, 24, ..., 56
+    // todo: test if this actually beats the per-character loop...
+    const uintptr_t input_byte = bytearr_uc[uii];
+    const uintptr_t input_byte_scatter = (((input_byte & 0xfe) * 0x2040810204080LLU) & kMask0101) | (input_byte & 1);
+    dst_w[uii] = incr_word + input_byte_scatter;
+  }
+#  else
+  const uint32_t fullbyte_ct = input_bit_ct_plus / 8;
+  for (uint32_t uii = 0; uii != fullbyte_ct; ++uii) {
+    // dcba -> d0000000c0000000b0000000a
+    const uintptr_t input_byte = bytearr_uc[uii];
+    uintptr_t input_byte_scatter = ((input_byte & 0xf) * 0x204081) & kMask0101;
+    dst_w[2 * uii] = incr_word + input_byte_scatter;
+    input_byte_scatter = ((input_byte >> 4) * 0x204081) & kMask0101;
+    dst_w[2 * uii + 1] = incr_word + input_byte_scatter;
+  }
+  if (input_bit_ct_plus & 4) {
+    uintptr_t input_byte = bytearr_uc[fullbyte_ct];
+    // input_bit_ct mod 8 in 1..4, so high bits zeroed out
+    uintptr_t input_byte_scatter = (input_byte * 0x204081) & kMask0101;
+    dst_w[2 * fullbyte_ct] = incr_word + input_byte_scatter;
+  }
+#  endif
+#endif
+}
+
+void Expand1bitTo16(const void* __restrict bytearr, uint32_t input_bit_ct, uint32_t incr, void* __restrict dst) {
+  const unsigned char* bytearr_uc = S_CAST(const unsigned char*, bytearr);
+#if defined(USE_SHUFFLE8) && (!(defined(USE_AVX2) && defined(NO_UNALIGNED)))
+  const uint32_t input_nybble_ct = DivUp(input_bit_ct, 4);
+  const uint32_t fullvec_ct = input_nybble_ct / (kBytesPerVec / 8);
+  uint32_t byte_idx = 0;
+  if (fullvec_ct) {
+    const Vec16thUint* bytearr_alias = R_CAST(const Vec16thUint*, bytearr_uc);
+#  ifdef USE_AVX2
+    const VecU16 byte_gather = VecToU16(_mm256_setr_epi64x(0, 0, kMask0101, kMask0101));
+    const VecU16 bit_mask = VecToU16(_mm256_set_epi32(0xff7fffbfU, 0xffdfffefU, 0xfff7fffbU, 0xfffdfffeU, 0xff7fffbfU, 0xffdfffefU, 0xfff7fffbU, 0xfffdfffeU));
+#  else
+    const VecU16 bit_mask = VecToU16(_mm_set_epi32(0xff7fffbfU, 0xffdfffefU, 0xfff7fffbU, 0xfffdfffeU));
+#  endif
+    const VecU16 all1 = VCONST_S(0xffff);
+    const VecU16 subfrom = vecu16_set1(incr);
+    VecU16* dst_alias = S_CAST(VecU16*, dst);
+    // todo: check whether this is actually any better than the non-vectorized
+    // loop
+    for (uint32_t vec_idx = 0; vec_idx != fullvec_ct; ++vec_idx) {
+#  ifdef USE_AVX2
+      VecU16 vmask = VecToU16(_mm256_set1_epi16(bytearr_alias[vec_idx]));
+      vmask = vecu16_shuffle8(vmask, byte_gather);
+#  else
+      VecU16 vmask = VecToU16(_mm_set1_epi8(bytearr_alias[vec_idx]));
+#  endif
+      vmask = vmask | bit_mask;
+      vmask = (vmask == all1);
+      const VecU16 result = subfrom - vmask;
+      vecu16_storeu(&(dst_alias[vec_idx]), result);
+    }
+    byte_idx = fullvec_ct * (kBytesPerVec / 16);
+  }
+  const uintptr_t incr_word = incr * kMask0001;
+  const uint32_t fullbyte_ct = input_nybble_ct / 2;
+  uintptr_t* dst_w = S_CAST(uintptr_t*, dst);
+  for (; byte_idx != fullbyte_ct; ++byte_idx) {
+    const uintptr_t input_byte = bytearr_uc[byte_idx];
+    const uintptr_t input_byte_scatter = input_byte * 0x200040008001LLU;
+    const uintptr_t write0 = input_byte_scatter & kMask0001;
+    const uintptr_t write1 = (input_byte_scatter >> 4) & kMask0001;
+    dst_w[2 * byte_idx] = incr_word + write0;
+    dst_w[2 * byte_idx + 1] = incr_word + write1;
+  }
+  if (input_nybble_ct % 2) {
+    const uintptr_t input_byte = bytearr_uc[byte_idx];
+    const uintptr_t write0 = (input_byte * 0x200040008001LLU) & kMask0001;
+    dst_w[input_nybble_ct - 1] = incr_word + write0;
+  }
+#else // (!USE_SHUFFLE8) || (NO_UNALIGNED && USE_AVX2)
+  const uintptr_t incr_word = incr * kMask0001;
+  uintptr_t* dst_w = S_CAST(uintptr_t*, dst);
+#  ifdef __LP64__
+  const uint32_t input_nybble_ct = DivUp(input_bit_ct, 4);
+  const uint32_t fullbyte_ct = input_nybble_ct / 2;
+  for (uint32_t uii = 0; uii != fullbyte_ct; ++uii) {
+    const uintptr_t input_byte = bytearr_uc[uii];
+    const uintptr_t input_byte_scatter = input_byte * 0x200040008001LLU;
+    const uintptr_t write0 = input_byte_scatter & kMask0001;
+    const uintptr_t write1 = (input_byte_scatter >> 4) & kMask0001;
+    dst_w[2 * uii] = incr_word + write0;
+    dst_w[2 * uii + 1] = incr_word + write1;
+  }
+  if (input_nybble_ct % 2) {
+    const uintptr_t input_byte = bytearr_uc[fullbyte_ct];
+    const uintptr_t write0 = (input_byte * 0x200040008001LLU) & kMask0001;
+    dst_w[input_nybble_ct - 1] = incr_word + write0;
+  }
+#  else // !__LP64__
+  const uint32_t fullbyte_ct = input_bit_ct / 8;
+  for (uint32_t uii = 0; uii != fullbyte_ct; ++uii) {
+    uintptr_t input_byte = bytearr_uc[uii];
+    const uintptr_t input_byte_scatter = input_byte * 0x8001;
+    dst_w[4 * uii] = (input_byte_scatter & kMask0001) + incr_word;
+    dst_w[4 * uii + 1] = ((input_byte_scatter >> 2) & kMask0001) + incr_word;
+    dst_w[4 * uii + 2] = ((input_byte_scatter >> 4) & kMask0001) + incr_word;
+    dst_w[4 * uii + 3] = ((input_byte_scatter >> 6) & kMask0001) + incr_word;
+  }
+  const uint32_t remainder = input_bit_ct % 8;
+  if (remainder) {
+    uintptr_t input_byte = bytearr_uc[fullbyte_ct];
+    uint16_t* dst_u16 = S_CAST(uint16_t*, dst);
+    uint16_t* dst_u16_last = &(dst_u16[8 * fullbyte_ct]);
+    for (uint32_t uii = 0; uii < remainder; ++uii) {
+      dst_u16_last[uii] = (input_byte & 1) + incr;
+      input_byte = input_byte >> 1;
+    }
+  }
+#  endif
+#endif
+}
+
+#ifdef USE_SSE2
+static_assert(kPglBitTransposeBatch == S_CAST(uint32_t, kBitsPerCacheline), "TransposeBitblock64() needs to be updated.");
+void TransposeBitblock64(const uintptr_t* read_iter, uintptr_t read_ul_stride, uintptr_t write_ul_stride, uint32_t read_row_ct, uint32_t write_row_ct, uintptr_t* write_iter, VecW* __restrict buf0, VecW* __restrict buf1) {
+  // We need to perform the equivalent of 9-10 shuffles (assuming a full-size
+  // 512x512 or 1024x1024 bitblock).
+  // The first shuffles are performed by the ingestion loop: we write the first
+  // word from every row to buf0, then the second word from every row, etc.,
+  // yielding
+  //   (0,0) ...   (0,63)  (1,0) ...   (1,63)  (2,0) ...   (511,63)
+  //   (0,64) ...  (0,127) (1,64) ...  (1,127) (2,64) ...  (511,127)
+  //   ...
+  //   (0,448) ... (0,511) (1,448) ... (1,511) (2,448) ... (511,511)
+  // in terms of the original bit positions when kCacheline==64.
+  // Since each input row has 8-16 words, this amounts to 3-4 shuffles.
+  //
+  // The second step writes
+  //   (0,0) (0,1) ... (0,7)   (1,0) (1,1) ... (1,7) ...   (511,7)
+  //   (0,8) (0,9) ... (0,15)  (1,8) (1,9) ... (1,15) ...  (511,15)
+  //   ...
+  //   (0,504) ...     (0,511) (1,504) ...     (1,511) ... (511,511)
+  // to buf1, performing the equivalent of 3 shuffles, and the third step
+  // finishes the transpose using movemask.
+  //
+  // buf0 and buf1 must both be 32KiB vector-aligned buffers when
+  // kCacheline==64, and 128KiB when kCacheline==128.
+
+  const uint32_t buf0_row_ct = DivUp(write_row_ct, 64);
+  {
+    uintptr_t* buf0_ul = DowncastVecWToW(buf0);
+    const uint32_t zfill_ct = (-read_row_ct) & (kBitsPerWord - 1);
+    for (uint32_t ridx = 0; ridx != buf0_row_ct; ++ridx) {
+      const uintptr_t* read_iter_tmp = &(read_iter[ridx]);
+      uintptr_t* buf0_row_start = &(buf0_ul[kPglBitTransposeBatch * ridx]);
+      for (uint32_t uii = 0; uii != read_row_ct; ++uii) {
+        buf0_row_start[uii] = *read_iter_tmp;
+        read_iter_tmp = &(read_iter_tmp[read_ul_stride]);
+      }
+      // This is a simple way of fulfilling the trailing-zero part of the
+      // function contract.
+      // (   buf0 rows zeroed out to 512 bytes
+      //  -> buf1 rows zeroed out to 64 bytes
+      //  -> output rows zeroed out to 8 bytes)
+      ZeroWArr(zfill_ct, &(buf0_row_start[read_row_ct]));
+    }
+  }
+  const uint32_t write_word_width = DivUp(read_row_ct, 64);
+  {
+    const VecW* buf0_read_iter = buf0;
+    uintptr_t* write_iter0 = DowncastVecWToW(buf1);
+#  ifdef USE_SHUFFLE8
+    const VecW gather_u16s = vecw_setr8(0, 8, 1, 9, 2, 10, 3, 11,
+                                        4, 12, 5, 13, 6, 14, 7, 15);
+#    ifdef USE_AVX2
+    const VecW gather_u32s = vecw_setr8(0, 1, 8, 9, 2, 3, 10, 11,
+                                        4, 5, 12, 13, 6, 7, 14, 15);
+#    endif
+#  else
+    const VecW m8 = VCONST_W(kMask00FF);
+#  endif
+    const uint32_t buf0_row_b64width = write_word_width * 8;
+    for (uint32_t ridx = 0; ridx != buf0_row_ct; ++ridx) {
+      uintptr_t* write_iter1 = &(write_iter0[kCacheline]);
+      uintptr_t* write_iter2 = &(write_iter1[kCacheline]);
+      uintptr_t* write_iter3 = &(write_iter2[kCacheline]);
+      uintptr_t* write_iter4 = &(write_iter3[kCacheline]);
+      uintptr_t* write_iter5 = &(write_iter4[kCacheline]);
+      uintptr_t* write_iter6 = &(write_iter5[kCacheline]);
+      uintptr_t* write_iter7 = &(write_iter6[kCacheline]);
+      for (uint32_t b64idx = 0; b64idx != buf0_row_b64width; ++b64idx) {
+#  ifdef USE_AVX2
+        VecW loader0 = buf0_read_iter[b64idx * 2];
+        VecW loader1 = buf0_read_iter[b64idx * 2 + 1];
+        //    (0,0) (0,1) ... (0,7) (1,0) (1,1) ... (1,7) (2,0) ... (3,7)
+        // -> (0,0) (1,0) (0,1) (1,1) (0,2) .... (1,7) (2,0) (3,0) (2,1) ...
+        loader0 = vecw_shuffle8(loader0, gather_u16s);
+        loader1 = vecw_shuffle8(loader1, gather_u16s);
+        // -> (0,0) (1,0) (0,1) (1,1) (0,2) (1,2) (0,3) (1,3) (2,0) (3,0) ...
+        VecW vec_lo = vecw_permute0xd8_if_avx2(loader0);
+        VecW vec_hi = vecw_permute0xd8_if_avx2(loader1);
+        // -> (0,0) (1,0) (2,0) (3,0) (0,1) (1,1) (2,1) (3,1) (0,2) ...
+        vec_lo = vecw_shuffle8(vec_lo, gather_u32s);
+        // -> (4,0) (5,0) (6,0) (7,0) (4,1) (5,1) (6,1) (7,1) (4,2) ...
+        vec_hi = vecw_shuffle8(vec_hi, gather_u32s);
+        const VecW final0145 = vecw_unpacklo32(vec_lo, vec_hi);
+        const VecW final2367 = vecw_unpackhi32(vec_lo, vec_hi);
+        write_iter0[b64idx] = vecw_extract64_0(final0145);
+        write_iter1[b64idx] = vecw_extract64_1(final0145);
+        write_iter2[b64idx] = vecw_extract64_0(final2367);
+        write_iter3[b64idx] = vecw_extract64_1(final2367);
+        write_iter4[b64idx] = vecw_extract64_2(final0145);
+        write_iter5[b64idx] = vecw_extract64_3(final0145);
+        write_iter6[b64idx] = vecw_extract64_2(final2367);
+        write_iter7[b64idx] = vecw_extract64_3(final2367);
+#  else  // !USE_AVX2
+        VecW loader0 = buf0_read_iter[b64idx * 4];
+        VecW loader1 = buf0_read_iter[b64idx * 4 + 1];
+        VecW loader2 = buf0_read_iter[b64idx * 4 + 2];
+        VecW loader3 = buf0_read_iter[b64idx * 4 + 3];
+        //    (0,0) (0,1) ... (0,7) (1,0) (1,1) ... (1,7)
+        // -> (0,0) (1,0) (0,1) (1,1) (0,2) ... (1,7)
+#    ifdef USE_SHUFFLE8
+        loader0 = vecw_shuffle8(loader0, gather_u16s);
+        loader1 = vecw_shuffle8(loader1, gather_u16s);
+        loader2 = vecw_shuffle8(loader2, gather_u16s);
+        loader3 = vecw_shuffle8(loader3, gather_u16s);
+#    else
+        VecW tmp_lo = vecw_unpacklo8(loader0, loader1);
+        VecW tmp_hi = vecw_unpackhi8(loader0, loader1);
+        loader0 = vecw_blendv(vecw_slli(tmp_hi, 8), tmp_lo, m8);
+        loader1 = vecw_blendv(tmp_hi, vecw_srli(tmp_lo, 8), m8);
+        tmp_lo = vecw_unpacklo8(loader2, loader3);
+        tmp_hi = vecw_unpackhi8(loader2, loader3);
+        loader2 = vecw_blendv(vecw_slli(tmp_hi, 8), tmp_lo, m8);
+        loader3 = vecw_blendv(tmp_hi, vecw_srli(tmp_lo, 8), m8);
+#    endif
+        // -> (0,0) (1,0) (2,0) (3,0) (0,1) (1,1) (2,1) (3,1) (0,2) ...
+        const VecW lo_0123 = vecw_unpacklo16(loader0, loader1);
+        // -> (0,4) (1,4) (2,4) (3,4) (0,5) (1,5) (2,5) (3,5) (0,6) ...
+        const VecW lo_4567 = vecw_unpackhi16(loader0, loader1);
+        const VecW hi_0123 = vecw_unpacklo16(loader2, loader3);
+        const VecW hi_4567 = vecw_unpackhi16(loader2, loader3);
+
+        VecW final01 = vecw_unpacklo32(lo_0123, hi_0123);
+        VecW final23 = vecw_unpackhi32(lo_0123, hi_0123);
+        VecW final45 = vecw_unpacklo32(lo_4567, hi_4567);
+        VecW final67 = vecw_unpackhi32(lo_4567, hi_4567);
+        write_iter0[b64idx] = vecw_extract64_0(final01);
+        write_iter1[b64idx] = vecw_extract64_1(final01);
+        write_iter2[b64idx] = vecw_extract64_0(final23);
+        write_iter3[b64idx] = vecw_extract64_1(final23);
+        write_iter4[b64idx] = vecw_extract64_0(final45);
+        write_iter5[b64idx] = vecw_extract64_1(final45);
+        write_iter6[b64idx] = vecw_extract64_0(final67);
+        write_iter7[b64idx] = vecw_extract64_1(final67);
+#  endif  // !USE_AVX2
+      }
+      buf0_read_iter = &(buf0_read_iter[kPglBitTransposeBatch / kWordsPerVec]);
+      write_iter0 = &(write_iter7[kCacheline]);
+    }
+  }
+  const VecW* buf1_read_iter = buf1;
+  const uint32_t write_v8ui_stride = kVec8thUintPerWord * write_ul_stride;
+  const uint32_t buf1_fullrow_ct = write_row_ct / 8;
+  const uint32_t buf1_row_vecwidth = write_word_width * (8 / kWordsPerVec);
+  Vec8thUint* write_iter0 = DowncastWToV8(write_iter);
+  for (uint32_t ridx = 0; ridx != buf1_fullrow_ct; ++ridx) {
+    Vec8thUint* write_iter1 = &(write_iter0[write_v8ui_stride]);
+    Vec8thUint* write_iter2 = &(write_iter1[write_v8ui_stride]);
+    Vec8thUint* write_iter3 = &(write_iter2[write_v8ui_stride]);
+    Vec8thUint* write_iter4 = &(write_iter3[write_v8ui_stride]);
+    Vec8thUint* write_iter5 = &(write_iter4[write_v8ui_stride]);
+    Vec8thUint* write_iter6 = &(write_iter5[write_v8ui_stride]);
+    Vec8thUint* write_iter7 = &(write_iter6[write_v8ui_stride]);
+    for (uint32_t vidx = 0; vidx != buf1_row_vecwidth; ++vidx) {
+      VecW loader = buf1_read_iter[vidx];
+      write_iter7[vidx] = vecw_movemask(loader);
+      loader = vecw_slli(loader, 1);
+      write_iter6[vidx] = vecw_movemask(loader);
+      loader = vecw_slli(loader, 1);
+      write_iter5[vidx] = vecw_movemask(loader);
+      loader = vecw_slli(loader, 1);
+      write_iter4[vidx] = vecw_movemask(loader);
+      loader = vecw_slli(loader, 1);
+      write_iter3[vidx] = vecw_movemask(loader);
+      loader = vecw_slli(loader, 1);
+      write_iter2[vidx] = vecw_movemask(loader);
+      loader = vecw_slli(loader, 1);
+      write_iter1[vidx] = vecw_movemask(loader);
+      loader = vecw_slli(loader, 1);
+      write_iter0[vidx] = vecw_movemask(loader);
+    }
+    buf1_read_iter = &(buf1_read_iter[kCacheline / kWordsPerVec]);
+    write_iter0 = &(write_iter7[write_v8ui_stride]);
+  }
+  const uint32_t row_ct_rem = write_row_ct % 8;
+  if (!row_ct_rem) {
+    return;
+  }
+  const uint32_t lshift = 8 - row_ct_rem;
+  Vec8thUint* write_iter_last = &(write_iter0[write_v8ui_stride * (row_ct_rem - 1)]);
+  for (uint32_t vidx = 0; vidx != buf1_row_vecwidth; ++vidx) {
+    VecW loader = buf1_read_iter[vidx];
+    loader = vecw_slli_variable_ct(loader, lshift);
+    Vec8thUint* inner_write_iter = &(write_iter_last[vidx]);
+    for (uint32_t uii = 0; uii != row_ct_rem; ++uii) {
+      *inner_write_iter = vecw_movemask(loader);
+      loader = vecw_slli(loader, 1);
+      inner_write_iter -= write_v8ui_stride;
+    }
+  }
+}
+#else  // !USE_SSE2
+#  ifdef __LP64__
+static_assert(kWordsPerVec == 1, "TransposeBitblock64() needs to be updated.");
+void TransposeBitblock64(const uintptr_t* read_iter, uintptr_t read_ul_stride, uintptr_t write_ul_stride, uint32_t read_row_ct, uint32_t write_row_ct, uintptr_t* write_iter, VecW* __restrict buf0, VecW* __restrict buf1) {
+  // buf must be vector-aligned and have size 64k
+  const uint32_t initial_read_byte_ct = DivUp(write_row_ct, CHAR_BIT);
+  // fold the first 6 shuffles into the initial ingestion loop
+  const unsigned char* initial_read_iter = DowncastKToUc(read_iter);
+  const unsigned char* initial_read_end = &(initial_read_iter[initial_read_byte_ct]);
+  unsigned char* initial_target_iter = DowncastToUc(buf0);
+  const uint32_t read_byte_stride = read_ul_stride * kBytesPerWord;
+  const uint32_t read_batch_rem = kBitsPerCacheline - read_row_ct;
+  for (; initial_read_iter != initial_read_end; ++initial_read_iter) {
+    const unsigned char* read_iter_tmp = initial_read_iter;
+    for (uint32_t ujj = 0; ujj != read_row_ct; ++ujj) {
+      *initial_target_iter++ = *read_iter_tmp;
+      read_iter_tmp = &(read_iter_tmp[read_byte_stride]);
+    }
+    initial_target_iter = memsetua(initial_target_iter, 0, read_batch_rem);
+  }
+
+  // third-to-last shuffle, 8 bit spacing -> 4
+  const VecW* source_iter = buf0;
+  uintptr_t* target_iter0 = buf1;
+  const uint32_t write_word_ct = BitCtToWordCt(read_row_ct);
+  const uint32_t first_inner_loop_iter_ct = 4 * write_word_ct;
+  uint32_t cur_write_skip = 4 * kWordsPerCacheline - first_inner_loop_iter_ct;
+  // coincidentally, this also needs to run DivUp(write_row_ct, CHAR_BIT)
+  // times
+  for (uint32_t uii = 0; uii != initial_read_byte_ct; ++uii) {
+    uintptr_t* target_iter1 = &(target_iter0[kWordsPerCacheline * 4]);
+    for (uint32_t ujj = 0; ujj != first_inner_loop_iter_ct; ++ujj) {
+      const uintptr_t source_word_lo = *source_iter++;
+      const uintptr_t source_word_hi = *source_iter++;
+      *target_iter0++ = PackTwo0F0FMask(source_word_lo, source_word_hi);
+      *target_iter1++ = PackTwo0F0FMask(source_word_lo >> 4, source_word_hi >> 4);
+    }
+    source_iter = &(source_iter[2 * cur_write_skip]);
+    target_iter0 = &(target_iter1[cur_write_skip]);
+  }
+
+  // second-to-last shuffle, 4 bit spacing -> 2
+  source_iter = buf1;
+  target_iter0 = buf0;
+  const uint32_t second_outer_loop_iter_ct = DivUp(write_row_ct, 4);
+  const uint32_t second_inner_loop_iter_ct = 2 * write_word_ct;
+  cur_write_skip = 2 * kWordsPerCacheline - second_inner_loop_iter_ct;
+  for (uint32_t uii = 0; uii != second_outer_loop_iter_ct; ++uii) {
+    uintptr_t* target_iter1 = &(target_iter0[kWordsPerCacheline * 2]);
+    for (uint32_t ujj = 0; ujj != second_inner_loop_iter_ct; ++ujj) {
+      const uintptr_t source_word_lo = *source_iter++;
+      const uintptr_t source_word_hi = *source_iter++;
+      *target_iter0++ = PackTwo3333Mask(source_word_lo, source_word_hi);
+      *target_iter1++ = PackTwo3333Mask(source_word_lo >> 2, source_word_hi >> 2);
+    }
+    source_iter = &(source_iter[2 * cur_write_skip]);
+    target_iter0 = &(target_iter1[cur_write_skip]);
+  }
+  // last shuffle, 2 bit spacing -> 1
+  source_iter = buf0;
+  target_iter0 = write_iter;
+  const uint32_t last_loop_iter_ct = DivUp(write_row_ct, 2);
+  for (uint32_t uii = 0; uii != last_loop_iter_ct; ++uii) {
+    uintptr_t* target_iter1 = &(target_iter0[write_ul_stride]);
+    for (uint32_t ujj = 0; ujj != write_word_ct; ++ujj) {
+      const uintptr_t source_word_lo = S_CAST(uintptr_t, *source_iter++);
+      const uintptr_t source_word_hi = S_CAST(uintptr_t, *source_iter++);
+      target_iter0[ujj] = PackTwo5555Mask(source_word_lo, source_word_hi);
+      target_iter1[ujj] = PackTwo5555Mask(source_word_lo >> 1, source_word_hi >> 1);
+    }
+    source_iter = &(source_iter[2 * (kWordsPerCacheline - write_word_ct)]);
+    target_iter0 = &(target_iter1[write_ul_stride]);
+  }
+}
+#  else
+static_assert(kWordsPerVec == 1, "TransposeBitblock32() needs to be updated.");
+void TransposeBitblock32(const uintptr_t* read_iter, uintptr_t read_ul_stride, uintptr_t write_ul_stride, uint32_t read_batch_size, uint32_t write_batch_size, uintptr_t* write_iter, VecW* __restrict buf0, VecW* __restrict buf1) {
+  // buf must be vector-aligned and have size 64k
+  const uint32_t initial_read_byte_ct = DivUp(write_batch_size, CHAR_BIT);
+  // fold the first 6 shuffles into the initial ingestion loop
+  const unsigned char* initial_read_iter = DowncastKToUc(read_iter);
+  const unsigned char* initial_read_end = &(initial_read_iter[initial_read_byte_ct]);
+  unsigned char* initial_target_iter = DowncastToUc(buf0);
+  const uint32_t read_byte_stride = read_ul_stride * kBytesPerWord;
+  const uint32_t read_batch_rem = kBitsPerCacheline - read_batch_size;
+  for (; initial_read_iter != initial_read_end; ++initial_read_iter) {
+    const unsigned char* read_iter_tmp = initial_read_iter;
+    for (uint32_t ujj = 0; ujj != read_batch_size; ++ujj) {
+      *initial_target_iter++ = *read_iter_tmp;
+      read_iter_tmp = &(read_iter_tmp[read_byte_stride]);
+    }
+    initial_target_iter = memsetua(initial_target_iter, 0, read_batch_rem);
+  }
+
+  // third-to-last shuffle, 8 bit spacing -> 4
+  const VecW* source_iter = buf0;
+  uintptr_t* target_iter0 = buf1;
+  const uint32_t write_word_ct = BitCtToWordCt(read_batch_size);
+  const uint32_t first_inner_loop_iter_ct = 4 * write_word_ct;
+  uint32_t cur_write_skip = 4 * kWordsPerCacheline - first_inner_loop_iter_ct;
+  // coincidentally, this also needs to run DivUp(write_batch_size, CHAR_BIT)
+  // times
+  for (uint32_t uii = 0; uii != initial_read_byte_ct; ++uii) {
+    uintptr_t* target_iter1 = &(target_iter0[kWordsPerCacheline * 4]);
+    for (uint32_t ujj = 0; ujj != first_inner_loop_iter_ct; ++ujj) {
+      const uintptr_t source_word_lo = *source_iter++;
+      const uintptr_t source_word_hi = *source_iter++;
+      *target_iter0++ = PackTwo0F0FMask(source_word_lo, source_word_hi);
+      *target_iter1++ = PackTwo0F0FMask(source_word_lo >> 4, source_word_hi >> 4);
+    }
+    source_iter = &(source_iter[2 * cur_write_skip]);
+    target_iter0 = &(target_iter1[cur_write_skip]);
+  }
+
+  // second-to-last shuffle, 4 bit spacing -> 2
+  source_iter = buf1;
+  target_iter0 = buf0;
+  const uint32_t second_outer_loop_iter_ct = DivUp(write_batch_size, 4);
+  const uint32_t second_inner_loop_iter_ct = 2 * write_word_ct;
+  cur_write_skip = 2 * kWordsPerCacheline - second_inner_loop_iter_ct;
+  for (uint32_t uii = 0; uii != second_outer_loop_iter_ct; ++uii) {
+    uintptr_t* target_iter1 = &(target_iter0[kWordsPerCacheline * 2]);
+    for (uint32_t ujj = 0; ujj != second_inner_loop_iter_ct; ++ujj) {
+      const uintptr_t source_word_lo = *source_iter++;
+      const uintptr_t source_word_hi = *source_iter++;
+      *target_iter0++ = PackTwo3333Mask(source_word_lo, source_word_hi);
+      *target_iter1++ = PackTwo3333Mask(source_word_lo >> 2, source_word_hi >> 2);
+    }
+    source_iter = &(source_iter[2 * cur_write_skip]);
+    target_iter0 = &(target_iter1[cur_write_skip]);
+  }
+  // last shuffle, 2 bit spacing -> 1
+  source_iter = buf0;
+  target_iter0 = write_iter;
+  const uint32_t last_loop_iter_ct = DivUp(write_batch_size, 2);
+  for (uint32_t uii = 0; uii != last_loop_iter_ct; ++uii) {
+    uintptr_t* target_iter1 = &(target_iter0[write_ul_stride]);
+    for (uint32_t ujj = 0; ujj != write_word_ct; ++ujj) {
+      const uintptr_t source_word_lo = S_CAST(uintptr_t, *source_iter++);
+      const uintptr_t source_word_hi = S_CAST(uintptr_t, *source_iter++);
+      target_iter0[ujj] = PackTwo5555Mask(source_word_lo, source_word_hi);
+      target_iter1[ujj] = PackTwo5555Mask(source_word_lo >> 1, source_word_hi >> 1);
+    }
+    source_iter = &(source_iter[2 * (kWordsPerCacheline - write_word_ct)]);
+    target_iter0 = &(target_iter1[write_ul_stride]);
+  }
+}
+#  endif
+#endif  // !USE_SSE2
+
+#ifdef USE_SSE2
+void TransposeNybbleblock(const uintptr_t* read_iter, uint32_t read_ul_stride, uint32_t write_ul_stride, uint32_t read_batch_size, uint32_t write_batch_size, uintptr_t* __restrict write_iter, VecW* vecaligned_buf) {
+  // Very similar to TransposeNypblock64() in pgenlib_internal.
+  // vecaligned_buf must be vector-aligned and have size 8k if kCacheline==64,
+  // 32k if kCacheline==128
+  const uint32_t buf_row_ct = DivUp(write_batch_size, 8);
+  // fold the first 4-5 shuffles into the initial ingestion loop
+  const uint32_t* initial_read_iter = DowncastKWToU32(read_iter);
+  const uint32_t* initial_read_end = &(initial_read_iter[buf_row_ct]);
+  uint32_t* initial_target_iter = DowncastVecWToU32(vecaligned_buf);
+  const uint32_t read_u32_stride = read_ul_stride * (kBytesPerWord / 4);
+  const uint32_t read_batch_rem = kNybblesPerCacheline - read_batch_size;
+  for (; initial_read_iter != initial_read_end; ++initial_read_iter) {
+    const uint32_t* read_iter_tmp = initial_read_iter;
+    for (uint32_t ujj = 0; ujj != read_batch_size; ++ujj) {
+      *initial_target_iter++ = *read_iter_tmp;
+      read_iter_tmp = &(read_iter_tmp[read_u32_stride]);
+    }
+    if (!read_batch_rem) {
+      continue;
+    }
+    memset(initial_target_iter, 0, read_batch_rem * 4);
+    initial_target_iter = &(initial_target_iter[read_batch_rem]);
+  }
+
+  // 32 bit spacing -> 4
+  const VecW* source_iter = vecaligned_buf;
+  const VecW m4 = VCONST_W(kMask0F0F);
+  const uint32_t buf_fullrow_ct = write_batch_size / 8;
+  const uint32_t b64width = DivUp(read_batch_size, 16);
+  uintptr_t* target_iter0 = write_iter;
+  uint32_t cur_dst_row_ct = 8;
+#  ifdef USE_SHUFFLE8
+  const VecW gather_u16s = vecw_setr8(0, 8, 1, 9, 2, 10, 3, 11,
+                                      4, 12, 5, 13, 6, 14, 7, 15);
+#  else
+  const VecW m8 = VCONST_W(kMask00FF);
+#  endif
+#  ifdef USE_AVX2
+  // movemask is slower even in AVX2 case
+  const VecW gather_u32s = vecw_setr8(0, 1, 8, 9, 2, 3, 10, 11,
+                                      4, 5, 12, 13, 6, 7, 14, 15);
+  for (uint32_t buf_row_idx = 0; ; ++buf_row_idx) {
+    if (buf_row_idx >= buf_fullrow_ct) {
+      if (buf_row_idx == buf_row_ct) {
+        return;
+      }
+      cur_dst_row_ct = write_batch_size % 8;
+    }
+    uintptr_t* target_iter1 = &(target_iter0[write_ul_stride]);
+    uintptr_t* target_iter2 = &(target_iter1[write_ul_stride]);
+    uintptr_t* target_iter3 = &(target_iter2[write_ul_stride]);
+    uintptr_t* target_iter4 = &(target_iter3[write_ul_stride]);
+    uintptr_t* target_iter5 = &(target_iter4[write_ul_stride]);
+    uintptr_t* target_iter6 = &(target_iter5[write_ul_stride]);
+    uintptr_t* target_iter7 = &(target_iter6[write_ul_stride]);
+    for (uint32_t b64idx = 0; b64idx != b64width; ++b64idx) {
+      const VecW loader0 = source_iter[b64idx * 2];
+      const VecW loader1 = source_iter[b64idx * 2 + 1];
+      VecW even_nybbles0 = loader0 & m4;
+      VecW odd_nybbles0 = vecw_and_notfirst(m4, loader0);
+      VecW even_nybbles1 = loader1 & m4;
+      VecW odd_nybbles1 = vecw_and_notfirst(m4, loader1);
+      even_nybbles0 = even_nybbles0 | vecw_srli(even_nybbles0, 28);
+      odd_nybbles0 = vecw_slli(odd_nybbles0, 28) | odd_nybbles0;
+      even_nybbles1 = even_nybbles1 | vecw_srli(even_nybbles1, 28);
+      odd_nybbles1 = vecw_slli(odd_nybbles1, 28) | odd_nybbles1;
+      // Label the bytes in even_nybbles0 (0, 1, 2, ..., 31), and the bytes in
+      // even_nybbles1 (32, 33, ..., 63).  We wish to generate the following
+      // lane-and-vector-crossing permutation:
+      //   (0, 8, 16, 24, 32, 40, 48, 56, 1, 9, 17, 25, 33, 41, 49, 57)
+      //   (2, 10, 18, 26, 34, 42, 50, 58, 3, 11, 19, 27, 35, 43, 51, 59)
+
+      // first shuffle:
+      //   (0, 8, 1, 9, 2, 10, 3, 11, _, _, _, _, _, _, _, _,
+      //    16, 24, 17, 25, 18, 26, 19, 27, _, _, _, _, _, _, _, _)
+      //
+      //   (32, 40, 33, 41, 34, 42, 35, 43, _, _, _, _, _, _, _, _,
+      //    48, 56, 49, 57, 50, 58, 51, 59, _, _, _, _, _, _, _, _)
+      //
+      // _mm256_unpacklo_epi16:
+      //   (0, 8, 32, 40, 1, 9, 33, 41, 2, 10, 34, 42, 3, 11, 35, 43,
+      //    16, 24, 48, 56, 17, 25, 49, 57, 18, 26, 50, 58, 19, 27, 51, 59)
+      //
+      // {0, 2, 1, 3} permute:
+      //   (0, 8, 32, 40, 1, 9, 33, 41, 16, 24, 48, 56, 17, 25, 49, 57,
+      //    2, 10, 34, 42, 3, 11, 35, 43, 18, 26, 50, 58, 19, 27, 51, 59)
+      //
+      // final shuffle gives us what we want.
+      even_nybbles0 = vecw_shuffle8(even_nybbles0, gather_u16s);
+      odd_nybbles0 = vecw_shuffle8(odd_nybbles0, gather_u16s);
+      even_nybbles1 = vecw_shuffle8(even_nybbles1, gather_u16s);
+      odd_nybbles1 = vecw_shuffle8(odd_nybbles1, gather_u16s);
+
+      VecW target_even = vecw_unpacklo16(even_nybbles0, even_nybbles1);
+      VecW target_odd = vecw_unpackhi16(odd_nybbles0, odd_nybbles1);
+
+      target_even = vecw_permute0xd8_if_avx2(target_even);
+      target_odd = vecw_permute0xd8_if_avx2(target_odd);
+
+      target_even = vecw_shuffle8(target_even, gather_u32s);
+      target_odd = vecw_shuffle8(target_odd, gather_u32s);
+
+      // tried using _mm_stream_si64 here, that totally sucked
+      switch (cur_dst_row_ct) {
+        case 8:
+          target_iter7[b64idx] = vecw_extract64_3(target_odd);
+          // fall through
+        case 7:
+          target_iter6[b64idx] = vecw_extract64_3(target_even);
+          // fall through
+        case 6:
+          target_iter5[b64idx] = vecw_extract64_2(target_odd);
+          // fall through
+        case 5:
+          target_iter4[b64idx] = vecw_extract64_2(target_even);
+          // fall through
+        case 4:
+          target_iter3[b64idx] = vecw_extract64_1(target_odd);
+          // fall through
+        case 3:
+          target_iter2[b64idx] = vecw_extract64_1(target_even);
+          // fall through
+        case 2:
+          target_iter1[b64idx] = vecw_extract64_0(target_odd);
+          // fall through
+        default:
+          target_iter0[b64idx] = vecw_extract64_0(target_even);
+      }
+    }
+    source_iter = &(source_iter[(4 * kPglNybbleTransposeBatch) / kBytesPerVec]);
+    target_iter0 = &(target_iter7[write_ul_stride]);
+  }
+#  else  // !USE_AVX2
+  for (uint32_t buf_row_idx = 0; ; ++buf_row_idx) {
+    if (buf_row_idx >= buf_fullrow_ct) {
+      if (buf_row_idx == buf_row_ct) {
+        return;
+      }
+      cur_dst_row_ct = write_batch_size % 8;
+    }
+    uintptr_t* target_iter1 = &(target_iter0[write_ul_stride]);
+    uintptr_t* target_iter2 = &(target_iter1[write_ul_stride]);
+    uintptr_t* target_iter3 = &(target_iter2[write_ul_stride]);
+    uintptr_t* target_iter4 = &(target_iter3[write_ul_stride]);
+    uintptr_t* target_iter5 = &(target_iter4[write_ul_stride]);
+    uintptr_t* target_iter6 = &(target_iter5[write_ul_stride]);
+    uintptr_t* target_iter7 = &(target_iter6[write_ul_stride]);
+    for (uint32_t b64idx = 0; b64idx != b64width; ++b64idx) {
+      const VecW loader0 = source_iter[b64idx * 4];
+      const VecW loader1 = source_iter[b64idx * 4 + 1];
+      const VecW loader2 = source_iter[b64idx * 4 + 2];
+      const VecW loader3 = source_iter[b64idx * 4 + 3];
+      VecW even_nybbles0 = loader0 & m4;
+      VecW odd_nybbles0 = vecw_and_notfirst(m4, loader0);
+      VecW even_nybbles1 = loader1 & m4;
+      VecW odd_nybbles1 = vecw_and_notfirst(m4, loader1);
+      VecW even_nybbles2 = loader2 & m4;
+      VecW odd_nybbles2 = vecw_and_notfirst(m4, loader2);
+      VecW even_nybbles3 = loader3 & m4;
+      VecW odd_nybbles3 = vecw_and_notfirst(m4, loader3);
+      even_nybbles0 = even_nybbles0 | vecw_srli(even_nybbles0, 28);
+      odd_nybbles0 = vecw_slli(odd_nybbles0, 28) | odd_nybbles0;
+      even_nybbles1 = even_nybbles1 | vecw_srli(even_nybbles1, 28);
+      odd_nybbles1 = vecw_slli(odd_nybbles1, 28) | odd_nybbles1;
+      even_nybbles2 = even_nybbles2 | vecw_srli(even_nybbles2, 28);
+      odd_nybbles2 = vecw_slli(odd_nybbles2, 28) | odd_nybbles2;
+      even_nybbles3 = even_nybbles3 | vecw_srli(even_nybbles3, 28);
+      odd_nybbles3 = vecw_slli(odd_nybbles3, 28) | odd_nybbles3;
+      // Label the bytes in even_nybbles0 (0, 1, 2, ..., 15), the bytes in
+      // even_nybbles1 (16, 17, ..., 31), ..., up to even_nybbles3 being (48,
+      // 49, ..., 63).  We wish to generate the following vector-crossing
+      // permutation:
+      //   (0, 8, 16, 24, 32, 40, 48, 56, 1, 9, 17, 25, 33, 41, 49, 57)
+      //   (2, 10, 18, 26, 34, 42, 50, 58, 3, 11, 19, 27, 35, 43, 51, 59)
+
+      // first shuffle:
+      //   (0, 8, 1, 9, 2, 10, 3, 11, _, _, _, _, _, _, _, _)
+      //   (16, 24, 17, 25, 18, 26, 19, 27, _, _, _, _, _, _, _, _)
+      //   (32, 40, 33, 41, 34, 42, 35, 43, _, _, _, _, _, _, _, _)
+      //   (48, 56, 49, 57, 50, 58, 51, 59, _, _, _, _, _, _, _, _)
+
+      // _mm_unpacklo_epi16:
+      //   (0, 8, 16, 24, 1, 9, 17, 25, 2, 10, 18, 26, 3, 11, 19, 27)
+      //   (32, 40, 48, 56, 33, 41, 49, 57, 34, 42, 50, 58, 35, 43, 51, 59)
+      //
+      // finish with _mm_unpack{lo,hi}_epi32
+#    ifdef USE_SHUFFLE8
+      even_nybbles0 = vecw_shuffle8(even_nybbles0, gather_u16s);
+      odd_nybbles0 = vecw_shuffle8(odd_nybbles0, gather_u16s);
+      even_nybbles1 = vecw_shuffle8(even_nybbles1, gather_u16s);
+      odd_nybbles1 = vecw_shuffle8(odd_nybbles1, gather_u16s);
+      even_nybbles2 = vecw_shuffle8(even_nybbles2, gather_u16s);
+      odd_nybbles2 = vecw_shuffle8(odd_nybbles2, gather_u16s);
+      even_nybbles3 = vecw_shuffle8(even_nybbles3, gather_u16s);
+      odd_nybbles3 = vecw_shuffle8(odd_nybbles3, gather_u16s);
+#    else
+      VecW tmp_lo = vecw_unpacklo8(even_nybbles0, odd_nybbles0);
+      VecW tmp_hi = vecw_unpackhi8(even_nybbles0, odd_nybbles0);
+      even_nybbles0 = vecw_blendv(vecw_slli(tmp_hi, 8), tmp_lo, m8);
+      odd_nybbles0 = vecw_blendv(tmp_hi, vecw_srli(tmp_lo, 8), m8);
+      tmp_lo = vecw_unpacklo8(even_nybbles1, odd_nybbles1);
+      tmp_hi = vecw_unpackhi8(even_nybbles1, odd_nybbles1);
+      even_nybbles1 = vecw_blendv(vecw_slli(tmp_hi, 8), tmp_lo, m8);
+      odd_nybbles1 = vecw_blendv(tmp_hi, vecw_srli(tmp_lo, 8), m8);
+      tmp_lo = vecw_unpacklo8(even_nybbles2, odd_nybbles2);
+      tmp_hi = vecw_unpackhi8(even_nybbles2, odd_nybbles2);
+      even_nybbles2 = vecw_blendv(vecw_slli(tmp_hi, 8), tmp_lo, m8);
+      odd_nybbles2 = vecw_blendv(tmp_hi, vecw_srli(tmp_lo, 8), m8);
+      tmp_lo = vecw_unpacklo8(even_nybbles3, odd_nybbles3);
+      tmp_hi = vecw_unpackhi8(even_nybbles3, odd_nybbles3);
+      even_nybbles3 = vecw_blendv(vecw_slli(tmp_hi, 8), tmp_lo, m8);
+      odd_nybbles3 = vecw_blendv(tmp_hi, vecw_srli(tmp_lo, 8), m8);
+#    endif
+
+      const VecW even_lo = vecw_unpacklo16(even_nybbles0, even_nybbles1);
+      const VecW odd_lo = vecw_unpackhi16(odd_nybbles0, odd_nybbles1);
+      const VecW even_hi = vecw_unpacklo16(even_nybbles2, even_nybbles3);
+      const VecW odd_hi = vecw_unpackhi16(odd_nybbles2, odd_nybbles3);
+
+      const VecW final02 = vecw_unpacklo32(even_lo, even_hi);
+      const VecW final13 = vecw_unpacklo32(odd_lo, odd_hi);
+      const VecW final46 = vecw_unpackhi32(even_lo, even_hi);
+      const VecW final57 = vecw_unpackhi32(odd_lo, odd_hi);
+      switch (cur_dst_row_ct) {
+        case 8:
+          target_iter7[b64idx] = vecw_extract64_1(final57);
+          // fall through
+        case 7:
+          target_iter6[b64idx] = vecw_extract64_1(final46);
+          // fall through
+        case 6:
+          target_iter5[b64idx] = vecw_extract64_0(final57);
+          // fall through
+        case 5:
+          target_iter4[b64idx] = vecw_extract64_0(final46);
+          // fall through
+        case 4:
+          target_iter3[b64idx] = vecw_extract64_1(final13);
+          // fall through
+        case 3:
+          target_iter2[b64idx] = vecw_extract64_1(final02);
+          // fall through
+        case 2:
+          target_iter1[b64idx] = vecw_extract64_0(final13);
+          // fall through
+        default:
+          target_iter0[b64idx] = vecw_extract64_0(final02);
+      }
+    }
+    source_iter = &(source_iter[(4 * kPglNybbleTransposeBatch) / kBytesPerVec]);
+    target_iter0 = &(target_iter7[write_ul_stride]);
+  }
+#  endif  // !USE_AVX2
+}
+#else  // !USE_SSE2
+static_assert(kWordsPerVec == 1, "TransposeNybbleblock() needs to be updated.");
+void TransposeNybbleblock(const uintptr_t* read_iter, uint32_t read_ul_stride, uint32_t write_ul_stride, uint32_t read_batch_size, uint32_t write_batch_size, uintptr_t* __restrict write_iter, VecW* vecaligned_buf) {
+  // Very similar to unvectorized TransposeNypblock{32,64}() in pgenlib_misc.
+  // vecaligned_buf must have size 8k
+  const uint32_t buf_row_ct = NybbleCtToByteCt(write_batch_size);
+  // fold the first 6 shuffles into the initial ingestion loop
+  const unsigned char* initial_read_iter = DowncastKToUc(read_iter);
+  const unsigned char* initial_read_end = &(initial_read_iter[buf_row_ct]);
+  unsigned char* initial_target_iter = DowncastToUc(vecaligned_buf);
+  const uint32_t read_byte_stride = read_ul_stride * kBytesPerWord;
+  const uint32_t read_batch_rem = kNybblesPerCacheline - read_batch_size;
+  for (; initial_read_iter != initial_read_end; ++initial_read_iter) {
+    const unsigned char* read_iter_tmp = initial_read_iter;
+    for (uint32_t ujj = 0; ujj != read_batch_size; ++ujj) {
+      *initial_target_iter++ = *read_iter_tmp;
+      read_iter_tmp = &(read_iter_tmp[read_byte_stride]);
+    }
+    initial_target_iter = memsetua(initial_target_iter, 0, read_batch_rem);
+  }
+
+  // 8 bit spacing -> 4
+  const VecW* source_iter = vecaligned_buf;
+  uintptr_t* target_iter0 = write_iter;
+  const uint32_t buf_fullrow_ct = write_batch_size / 2;
+  const uint32_t write_word_ct = NybbleCtToWordCt(read_batch_size);
+  for (uint32_t uii = 0; uii != buf_fullrow_ct; ++uii) {
+    uintptr_t* target_iter1 = &(target_iter0[write_ul_stride]);
+    for (uint32_t ujj = 0; ujj != write_word_ct; ++ujj) {
+      const uintptr_t source_word_lo = *source_iter++;
+      const uintptr_t source_word_hi = *source_iter++;
+      target_iter0[ujj] = PackTwo0F0FMask(source_word_lo, source_word_hi);
+      target_iter1[ujj] = PackTwo0F0FMask(source_word_lo >> 4, source_word_hi >> 4);
+    }
+    source_iter = &(source_iter[2 * (kWordsPerCacheline - write_word_ct)]);
+    target_iter0 = &(target_iter1[write_ul_stride]);
+  }
+  const uint32_t remainder = write_batch_size % 2;
+  if (!remainder) {
+    return;
+  }
+  for (uint32_t ujj = 0; ujj != write_word_ct; ++ujj) {
+    const uintptr_t source_word_lo = *source_iter++;
+    const uintptr_t source_word_hi = *source_iter++;
+    target_iter0[ujj] = PackTwo0F0FMask(source_word_lo, source_word_hi);
+  }
+}
+#endif  // !USE_SSE2
+
+#ifdef USE_SSE2
+#  ifdef USE_AVX2
+const unsigned char kLeadMask[2 * kBytesPerVec] __attribute__ ((aligned (64))) =
+  {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+   0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+   255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255,
+   255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255};
+#  else
+const unsigned char kLeadMask[2 * kBytesPerVec] __attribute__ ((aligned (32))) =
+  {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+   255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255};
+#  endif
+
+uintptr_t BytesumArr(const void* bytearr, uintptr_t byte_ct) {
+  uintptr_t tot = 0;
+  if (byte_ct < kBytesPerVec) {
+    const unsigned char* bytearr_uc = S_CAST(const unsigned char*, bytearr);
+    for (uintptr_t ulii = 0; ulii != byte_ct; ++ulii) {
+      tot += bytearr_uc[ulii];
+    }
+    return tot;
+  }
+  const unsigned char* bytearr_uc_iter = S_CAST(const unsigned char*, bytearr);
+  const unsigned char* bytearr_uc_final = &(bytearr_uc_iter[byte_ct - kBytesPerVec]);
+  const VecW m0 = vecw_setzero();
+  VecW acc = vecw_setzero();
+  while (bytearr_uc_iter < bytearr_uc_final) {
+    const VecW cur_vec = vecw_loadu(bytearr_uc_iter);
+    acc = acc + vecw_sad(cur_vec, m0);
+    bytearr_uc_iter = &(bytearr_uc_iter[kBytesPerVec]);
+  }
+  VecW cur_vec = vecw_loadu(bytearr_uc_final);
+  const uintptr_t overlap_byte_ct = bytearr_uc_iter - bytearr_uc_final;
+  const VecW mask_vec = vecw_loadu(&(kLeadMask[kBytesPerVec - overlap_byte_ct]));
+  cur_vec = cur_vec & mask_vec;
+  acc = acc + vecw_sad(cur_vec, m0);
+  return HsumW(acc);
+}
+
+#else // !USE_SSE2
+uintptr_t BytesumArr(const void* bytearr, uintptr_t byte_ct) {
+  // Assumes sum is representable by uintptr_t.
+  const unsigned char* bytearr_uc = S_CAST(const unsigned char*, bytearr);
+  const uintptr_t* bytearr_alias_iter;
+  uint32_t lead_byte_ct = AlignKToAW(bytearr_uc, &bytearr_alias_iter);
+  uintptr_t tot = 0;
+  if (lead_byte_ct) {
+    if (lead_byte_ct > byte_ct) {
+      lead_byte_ct = byte_ct;
+    }
+    for (uint32_t uii = 0; uii != lead_byte_ct; ++uii) {
+      tot += bytearr_uc[uii];
+    }
+    byte_ct -= lead_byte_ct;
+    if (!byte_ct) {
+      return tot;
+    }
+  }
+  const uint32_t fullword_ct = byte_ct / kBytesPerWord;
+  const uint32_t wordblock_idx_trail = fullword_ct / 256;
+  const uint32_t wordblock_idx_end = DivUp(fullword_ct, 256);
+  uint32_t wordblock_len = 256;
+  for (uint32_t wordblock_idx = 0; ; ++wordblock_idx) {
+    if (wordblock_idx >= wordblock_idx_trail) {
+      if (wordblock_idx == wordblock_idx_end) {
+        byte_ct = byte_ct % kBytesPerWord;
+        const unsigned char* last_word_start = DowncastKToUc(bytearr_alias_iter);
+        for (uint32_t uii = 0; uii != byte_ct; ++uii) {
+          tot += last_word_start[uii];
+        }
+        return tot;
+      }
+      wordblock_len = fullword_ct % 256;
+    }
+    const uintptr_t* bytearr_alias_stop = &(bytearr_alias_iter[wordblock_len]);
+    uintptr_t acc_even = 0;
+    uintptr_t acc_odd = 0;
+    do {
+      uintptr_t cur_word = *bytearr_alias_iter++;
+      acc_even += cur_word & kMask00FF;
+      acc_odd += (cur_word >> 8) & kMask00FF;
+    } while (bytearr_alias_iter < bytearr_alias_stop);
+    acc_even = S_CAST(Halfword, acc_even) + (acc_even >> kBitsPerWordD2);
+    acc_odd = S_CAST(Halfword, acc_odd) + (acc_odd >> kBitsPerWordD2);
+    tot += acc_even + acc_odd;
+  }
+}
+#endif  // !USE_SSE2
+
+uintptr_t CountByte(const void* bytearr, unsigned char ucc, uintptr_t byte_ct) {
+  const unsigned char* bytearr_uc_iter = S_CAST(const unsigned char*, bytearr);
+#ifdef USE_SSE2
+  if (byte_ct < kBytesPerVec) {
+#endif
+    uintptr_t tot = 0;
+    for (uintptr_t ulii = 0; ulii != byte_ct; ++ulii) {
+      tot += (bytearr_uc_iter[ulii] == ucc);
+    }
+    return tot;
+#ifdef USE_SSE2
+  }
+  const VecW m0 = vecw_setzero();
+  const VecUc match_vvec = vecuc_set1(ucc);
+  VecW acc = vecw_setzero();
+  while (byte_ct > 255 * kBytesPerVec) {
+    VecUc inner_acc = vecuc_setzero();
+    for (uint32_t uii = 0; uii != 255; ++uii) {
+      const VecUc cur_vvec = vecuc_loadu(bytearr_uc_iter);
+      bytearr_uc_iter = &(bytearr_uc_iter[kBytesPerVec]);
+      inner_acc = inner_acc - (cur_vvec == match_vvec);
+    }
+    acc = acc + vecw_sad(VecUcToW(inner_acc), m0);
+    byte_ct -= 255 * kBytesPerVec;
+  }
+  const unsigned char* bytearr_uc_final = &(bytearr_uc_iter[byte_ct - kBytesPerVec]);
+  VecUc inner_acc = vecuc_setzero();
+  while (bytearr_uc_iter < bytearr_uc_final) {
+    const VecUc cur_vvec = vecuc_loadu(bytearr_uc_iter);
+    bytearr_uc_iter = &(bytearr_uc_iter[kBytesPerVec]);
+    inner_acc = inner_acc - (cur_vvec == match_vvec);
+  }
+  VecUc cur_vvec = vecuc_loadu(bytearr_uc_final);
+  const uintptr_t overlap_byte_ct = bytearr_uc_iter - bytearr_uc_final;
+  const VecUc mask_vvec = vecuc_loadu(&(kLeadMask[kBytesPerVec - overlap_byte_ct]));
+  cur_vvec = (cur_vvec == match_vvec) & mask_vvec;
+  inner_acc = inner_acc - cur_vvec;
+  acc = acc + vecw_sad(VecUcToW(inner_acc), m0);
+  return HsumW(acc);
+#endif  // USE_SSE2
+}
+
+uintptr_t CountU16(const void* u16arr, uint16_t usii, uintptr_t u16_ct) {
+  const unsigned char* u16arr_biter = S_CAST(const unsigned char*, u16arr);
+#ifdef USE_SSE2
+  if (u16_ct < (kBytesPerVec / 2)) {
+#endif
+    // todo: benchmark this vs. zero-extend in a non-SSE2 setting
+    uintptr_t tot = 0;
+    for (uintptr_t ulii = 0; ulii != u16_ct; ++ulii) {
+      uint16_t cur_u16;
+      CopyFromUnalignedOffsetU16(&cur_u16, u16arr_biter, ulii);
+      tot += (cur_u16 == usii);
+    }
+    return tot;
+#ifdef USE_SSE2
+  }
+  const VecW m0 = vecw_setzero();
+  const VecU16 match_vvec = vecu16_set1(usii);
+  VecW acc = vecw_setzero();
+  // can also use larger loop and a slightly different accumulation algorithm,
+  // but it should make practically no difference; lets keep these loops as
+  // similar as possible for now.
+  while (u16_ct > 255 * (kBytesPerVec / 2)) {
+    VecU16 inner_acc = vecu16_setzero();
+    for (uint32_t uii = 0; uii != 255; ++uii) {
+      const VecU16 cur_vvec = vecu16_loadu(u16arr_biter);
+      u16arr_biter = &(u16arr_biter[kBytesPerVec]);
+      inner_acc = inner_acc - (cur_vvec == match_vvec);
+    }
+    acc = acc + vecw_sad(VecU16ToW(inner_acc), m0);
+    u16_ct -= 255 * (kBytesPerVec / 2);
+  }
+  const unsigned char* u16arr_final = &(u16arr_biter[u16_ct * sizeof(int16_t) - kBytesPerVec]);
+  VecU16 inner_acc = vecu16_setzero();
+  while (u16arr_biter < u16arr_final) {
+    const VecU16 cur_vvec = vecu16_loadu(u16arr_biter);
+    u16arr_biter = &(u16arr_biter[kBytesPerVec]);
+    inner_acc = inner_acc - (cur_vvec == match_vvec);
+  }
+  VecU16 cur_vvec = vecu16_loadu(u16arr_final);
+  const uintptr_t overlap_byte_ct = u16arr_biter - u16arr_final;
+  const VecU16 mask_vvec = vecu16_loadu(&(kLeadMask[kBytesPerVec - overlap_byte_ct]));
+  cur_vvec = (cur_vvec == match_vvec) & mask_vvec;
+  inner_acc = inner_acc - cur_vvec;
+  acc = acc + vecw_sad(VecU16ToW(inner_acc), m0);
+  return HsumW(acc);
+#endif  // USE_SSE2
+}
+
+uint32_t Copy1bit8Subset(const uintptr_t* __restrict src_subset, const void* __restrict src_vals, const uintptr_t* __restrict sample_include, uint32_t src_subset_size, uint32_t sample_ct, uintptr_t* __restrict dst_subset, void* __restrict dst_vals) {
+  if (!src_subset_size) {
+    return 0;
+  }
+  CopyBitarrSubset(src_subset, sample_include, sample_ct, dst_subset);
+  const unsigned char* src_vals_uc = S_CAST(const unsigned char*, src_vals);
+  unsigned char* dst_vals_uc = S_CAST(unsigned char*, dst_vals);
+  unsigned char* dst_vals_iter = dst_vals_uc;
+  uintptr_t sample_widx = 0;
+  uintptr_t src_subset_bits = src_subset[0];
+  for (uint32_t src_idx = 0; src_idx != src_subset_size; ++src_idx) {
+    const uintptr_t lowbit = BitIter1y(src_subset, &sample_widx, &src_subset_bits);
+    if (sample_include[sample_widx] & lowbit) {
+      *dst_vals_iter++ = src_vals_uc[src_idx];
+    }
+  }
+  return dst_vals_iter - dst_vals_uc;
+}
+
+uint32_t Copy1bit16Subset(const uintptr_t* __restrict src_subset, const void* __restrict src_vals, const uintptr_t* __restrict sample_include, uint32_t src_subset_size, uint32_t sample_ct, uintptr_t* __restrict dst_subset, void* __restrict dst_vals) {
+  if (!src_subset_size) {
+    return 0;
+  }
+  CopyBitarrSubset(src_subset, sample_include, sample_ct, dst_subset);
+  const uint16_t* src_vals_u16 = S_CAST(const uint16_t*, src_vals);
+  uint16_t* dst_vals_u16 = S_CAST(uint16_t*, dst_vals);
+  uint16_t* dst_vals_iter = dst_vals_u16;
+  uintptr_t sample_widx = 0;
+  uintptr_t src_subset_bits = src_subset[0];
+  for (uint32_t src_idx = 0; src_idx != src_subset_size; ++src_idx) {
+    const uintptr_t lowbit = BitIter1y(src_subset, &sample_widx, &src_subset_bits);
+    if (sample_include[sample_widx] & lowbit) {
+      *dst_vals_iter++ = src_vals_u16[src_idx];
+    }
+  }
+  return dst_vals_iter - dst_vals_u16;
+}
+
+// 'Unsafe' because it assumes high bits of every byte are 0.
+void Reduce8to4bitInplaceUnsafe(uintptr_t entry_ct, uintptr_t* mainvec) {
+#ifdef USE_SSE2
+  const uintptr_t fullvec_ct = entry_ct / (kBytesPerVec * 2);
+  const VecW m8 = VCONST_W(kMask00FF);
+  VecW* vmainvec = R_CAST(VecW*, mainvec);
+  for (uintptr_t write_vidx = 0; write_vidx != fullvec_ct; ++write_vidx) {
+    VecW v0 = vmainvec[write_vidx * 2];
+    VecW v1 = vmainvec[write_vidx * 2 + 1];
+    v0 = v0 | vecw_srli(v0, 4);
+    v1 = v1 | vecw_srli(v1, 4);
+    vmainvec[write_vidx] = vecw_gather_even(v0, v1, m8);
+  }
+  uintptr_t write_idx = fullvec_ct * kWordsPerVec;
+  if (write_idx == entry_ct * 2) {
+    return;
+  }
+#else
+  uintptr_t write_idx = 0;
+#endif
+  // Read two words at a time and write one.
+  // We could instead read one word and write a Halfword at a time, but I'd
+  // rather not worry about the strict-aliasing issues involved there.
+  const uintptr_t write_idx_last = (entry_ct - 1) / (kBytesPerWord * 2);
+  uintptr_t write_word;
+  for (; ; ++write_idx) {
+    const uintptr_t inword0 = mainvec[2 * write_idx];
+    const uintptr_t inword1 = mainvec[2 * write_idx + 1];
+    write_word = PackTwo0F0F(inword0, inword1);
+    if (write_idx == write_idx_last) {
+      break;
+    }
+    mainvec[write_idx] = write_word;
+  }
+  const uint32_t remaining_entry_ct = ModNz(entry_ct, kBytesPerWord * 2);
+  mainvec[write_idx] = bzhi_max(write_word, remaining_entry_ct * 4);
+}
+
+#ifdef __cplusplus
+}  // namespace plink2
+#endif
diff --git a/external_libs/pgenlib/include/plink2_bits.h b/external_libs/pgenlib/include/plink2_bits.h
new file mode 100644
index 0000000..c86d2ee
--- /dev/null
+++ b/external_libs/pgenlib/include/plink2_bits.h
@@ -0,0 +1,643 @@
+#ifndef __PLINK2_BITS_H__
+#define __PLINK2_BITS_H__
+
+// This library is part of PLINK 2.0, copyright (C) 2005-2024 Shaun Purcell,
+// Christopher Chang.
+//
+// This library is free software: you can redistribute it and/or modify it
+// under the terms of the GNU Lesser General Public License as published by the
+// Free Software Foundation; either version 3 of the License, or (at your
+// option) any later version.
+//
+// This library is distributed in the hope that it will be useful, but WITHOUT
+// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public License
+// for more details.
+//
+// You should have received a copy of the GNU Lesser General Public License
+// along with this library.  If not, see <http://www.gnu.org/licenses/>.
+
+
+// Bitarray support.  (Inline single-word operations are in plink2_base.h.)
+
+#include "plink2_base.h"
+
+#ifdef __cplusplus
+namespace plink2 {
+#endif
+
+#if defined(USE_SSE2) && !defined(USE_AVX2)
+// may also want a version which doesn't always apply kMask5555
+void Pack32bTo16bMask(const void* words_vec, uintptr_t ct_32b, void* dest);
+
+HEADER_INLINE void PackWordsToHalfwordsMask(const uintptr_t* words_vec, uintptr_t word_ct, void* dest) {
+  uintptr_t widx = 0;
+  if (word_ct >= (32 / kBytesPerWord)) {
+    const uintptr_t ct_32b = word_ct / (32 / kBytesPerWord);
+    Pack32bTo16bMask(words_vec, ct_32b, dest);
+    widx = ct_32b * (32 / kBytesPerWord);
+  }
+  unsigned char* dest_uc = S_CAST(unsigned char*, dest);
+  for (; widx != word_ct; ++widx) {
+    const Halfword hw = PackWordToHalfwordMask5555(words_vec[widx]);
+    CopyToUnalignedOffsetHW(dest_uc, &hw, widx);
+  }
+}
+#else
+HEADER_INLINE void PackWordsToHalfwordsMask(const uintptr_t* words_vec, uintptr_t word_ct, void* dest) {
+  unsigned char* dest_uc = S_CAST(unsigned char*, dest);
+  for (uintptr_t widx = 0; widx != word_ct; ++widx) {
+    const Halfword hw = PackWordToHalfwordMask5555(words_vec[widx]);
+    CopyToUnalignedOffsetHW(dest_uc, &hw, widx);
+  }
+}
+
+#endif
+
+// ok for ct == 0
+void SetAllBits(uintptr_t ct, uintptr_t* bitarr);
+
+// "Nz" added to names to make it obvious these require positive len
+void FillBitsNz(uintptr_t start_idx, uintptr_t end_idx, uintptr_t* bitarr);
+void ClearBitsNz(uintptr_t start_idx, uintptr_t end_idx, uintptr_t* bitarr);
+
+void BitvecAnd(const uintptr_t* __restrict arg_bitvec, uintptr_t word_ct, uintptr_t* __restrict main_bitvec);
+
+void BitvecInvmask(const uintptr_t* __restrict exclude_bitvec, uintptr_t word_ct, uintptr_t* __restrict main_bitvec);
+
+void BitvecOr(const uintptr_t* __restrict arg_bitvec, uintptr_t word_ct, uintptr_t* main_bitvec);
+
+void BitvecInvert(uintptr_t word_ct, uintptr_t* main_bitvec);
+
+void BitvecXorCopy(const uintptr_t* __restrict source1_bitvec, const uintptr_t* __restrict source2_bitvec, uintptr_t word_ct, uintptr_t* target_bitvec);
+
+void BitvecInvertCopy(const uintptr_t* __restrict source_bitvec, uintptr_t word_ct, uintptr_t* __restrict target_bitvec);
+
+// These ensure the trailing bits are zeroed out.
+// 'AlignedBitarr' instead of Bitvec since this takes bit_ct instead of word_ct
+// as the size argument, and zeroes trailing bits.
+HEADER_INLINE void AlignedBitarrInvert(uintptr_t bit_ct, uintptr_t* main_bitvec) {
+  const uintptr_t fullword_ct = bit_ct / kBitsPerWord;
+  BitvecInvert(fullword_ct, main_bitvec);
+  const uint32_t trail_ct = bit_ct % kBitsPerWord;
+  if (trail_ct) {
+    main_bitvec[fullword_ct] = bzhi(~main_bitvec[fullword_ct], trail_ct);
+  }
+}
+
+HEADER_INLINE void AlignedBitarrInvertCopy(const uintptr_t* __restrict source_bitvec, uintptr_t bit_ct, uintptr_t* __restrict target_bitvec) {
+  const uintptr_t fullword_ct = bit_ct / kBitsPerWord;
+  BitvecInvertCopy(source_bitvec, fullword_ct, target_bitvec);
+  const uint32_t trail_ct = bit_ct % kBitsPerWord;
+  if (trail_ct) {
+    target_bitvec[fullword_ct] = bzhi(~source_bitvec[fullword_ct], trail_ct);
+  }
+}
+
+// Functions with "adv" in the name generally take an index or char-pointer as
+// an argument and return its new value, while "mov" functions take a
+// pointer-to-index or pointer-to-char-pointer and move it.
+
+// These return the current index if the corresponding bit satisfies the
+// condition.
+uintptr_t AdvTo1Bit(const uintptr_t* bitarr, uintptr_t loc);
+
+uintptr_t AdvTo0Bit(const uintptr_t* bitarr, uintptr_t loc);
+
+// uintptr_t NextNonmissingUnsafe(const uintptr_t* genoarr, uintptr_t loc);
+
+uint32_t AdvBoundedTo1Bit(const uintptr_t* bitarr, uint32_t loc, uint32_t ceil);
+
+uintptr_t AdvBoundedTo0Bit(const uintptr_t* bitarr, uintptr_t loc, uintptr_t ceil);
+
+uintptr_t FindLast1BitBefore(const uintptr_t* bitarr, uintptr_t loc);
+
+// possible todo: check if movemask-based solution is better in AVX2 case
+HEADER_INLINE uint32_t AllWordsAreZero(const uintptr_t* word_arr, uintptr_t word_ct) {
+  while (word_ct--) {
+    if (*word_arr++) {
+      return 0;
+    }
+  }
+  return 1;
+}
+
+HEADER_INLINE uint32_t AllBitsAreOne(const uintptr_t* bitarr, uintptr_t bit_ct) {
+  const uintptr_t fullword_ct = bit_ct / kBitsPerWord;
+  for (uintptr_t widx = 0; widx != fullword_ct; ++widx) {
+    if (~(bitarr[widx])) {
+      return 0;
+    }
+  }
+  const uint32_t trailing_bit_ct = bit_ct % kBitsPerWord;
+  return (!trailing_bit_ct) || ((~(bitarr[fullword_ct])) << (kBitsPerWord - trailing_bit_ct));
+}
+
+uint32_t AllBytesAreX(const unsigned char* bytes, unsigned char match, uintptr_t byte_ct);
+
+// Updated PopcountWords() code is based on
+// https://github.com/kimwalisch/libpopcnt .  libpopcnt license text follows.
+
+/*
+ * libpopcnt.h - C/C++ library for counting the number of 1 bits (bit
+ * population count) in an array as quickly as possible using
+ * specialized CPU instructions i.e. POPCNT, AVX2, AVX512, NEON.
+ *
+ * Copyright (c) 2016 - 2017, Kim Walisch
+ * Copyright (c) 2016 - 2017, Wojciech Mula
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifdef USE_AVX2
+// 'Csa' = carry, save, add
+// If bb, cc, and *lp are bitvectors, this returns the carry bitvector and sets
+// *lp to contain the low-order bits of the sums.  I.e. for each position:
+//   if none of bb, cc, and *lp are set, *lp bit is zero and carry bit is zero
+//   if exactly 1 is set, *lp bit becomes one and carry bit is zero
+//   if exactly 2 are set, *lp bit becomes zero and carry bit is one
+//   if all 3 are set, *lp bit becomes one and carry bit is one
+HEADER_INLINE VecW Csa256(VecW bb, VecW cc, VecW* lp) {
+  const VecW aa = *lp;
+  const VecW uu = aa ^ bb;
+  *lp = uu ^ cc;
+  return (aa & bb) | (uu & cc);
+}
+
+HEADER_INLINE VecW CsaOne256(VecW bb, VecW* lp) {
+  const VecW aa = *lp;
+  *lp = aa ^ bb;
+  return aa & bb;
+}
+
+HEADER_INLINE VecW PopcountVecAvx2(VecW vv) {
+  const VecW lookup1 = vecw_setr8(4, 5, 5, 6, 5, 6, 6, 7,
+                                  5, 6, 6, 7, 6, 7, 7, 8);
+  const VecW lookup2 = vecw_setr8(4, 3, 3, 2, 3, 2, 2, 1,
+                                  3, 2, 2, 1, 2, 1, 1, 0);
+
+  const VecW m4 = VCONST_W(kMask0F0F);
+  const VecW lo = vv & m4;
+  const VecW hi = vecw_srli(vv, 4) & m4;
+  const VecW popcnt1 = vecw_shuffle8(lookup1, lo);
+  const VecW popcnt2 = vecw_shuffle8(lookup2, hi);
+  return vecw_sad(popcnt1, popcnt2);
+}
+
+HEADER_INLINE uintptr_t HsumW(VecW vv) {
+  UniVec vu;
+  vu.vw = vv;
+  return vu.w[0] + vu.w[1] + vu.w[2] + vu.w[3];
+  // _mm256_extract_epi64() only worth it if we don't need to extract all the
+  // values.
+  // (also, I wouldn't be surprised if the compiler recognized the pattern
+  // above)
+}
+
+// This no longer has any restrictions on vec_ct, though it isn't worth the
+// overhead for vec_ct < 16.
+uintptr_t PopcountVecsAvx2(const VecW* bit_vvec, uintptr_t vec_ct);
+
+HEADER_INLINE uintptr_t PopcountWords(const uintptr_t* bitvec, uintptr_t word_ct) {
+  // Efficiently popcounts bitvec[0..(word_ct - 1)].  In the 64-bit case,
+  // bitvec[] must be 16-byte aligned.
+  // The PopcountWordsNzbase() wrapper takes care of starting from a later
+  // index.
+  uintptr_t tot = 0;
+  if (word_ct >= 76) {
+    assert(IsVecAligned(bitvec));
+    const uintptr_t remainder = word_ct % kWordsPerVec;
+    const uintptr_t main_block_word_ct = word_ct - remainder;
+    tot = PopcountVecsAvx2(R_CAST(const VecW*, bitvec), main_block_word_ct / kWordsPerVec);
+    bitvec = &(bitvec[main_block_word_ct]);
+    word_ct = remainder;
+  }
+  // note that recent clang versions automatically expand this to a
+  // full-service routine; takes ~50% longer than PopcountVecsAvx2 on >1kb
+  // arrays, but way better than the naive loop
+  for (uintptr_t widx = 0; widx != word_ct; ++widx) {
+    tot += PopcountWord(bitvec[widx]);
+  }
+  return tot;
+}
+#else  // !USE_AVX2
+#  ifdef USE_SSE2
+HEADER_INLINE uintptr_t HsumW(VecW vv) {
+  UniVec vu;
+  vu.vw = vv;
+  return vu.w[0] + vu.w[1];
+}
+#  else
+HEADER_INLINE uintptr_t HsumW(VecW vv) {
+  return vv;
+}
+#  endif
+
+// assumes vec_ct is a multiple of 3
+uintptr_t PopcountVecsNoAvx2(const VecW* bit_vvec, uintptr_t vec_ct);
+
+HEADER_INLINE uintptr_t PopcountWords(const uintptr_t* bitvec, uintptr_t word_ct) {
+  uintptr_t tot = 0;
+#ifndef USE_SSE42
+  if (word_ct >= (3 * kWordsPerVec)) {
+    // This has an asymptotic ~10% advantage in the SSE4.2 case, but word_ct
+    // needs to be in the hundreds before the initial comparison even starts to
+    // pay for itself.
+    assert(IsVecAligned(bitvec));
+    const uintptr_t remainder = word_ct % (3 * kWordsPerVec);
+    const uintptr_t main_block_word_ct = word_ct - remainder;
+    tot = PopcountVecsNoAvx2(R_CAST(const VecW*, bitvec), main_block_word_ct / kWordsPerVec);
+    word_ct = remainder;
+    bitvec = &(bitvec[main_block_word_ct]);
+  }
+#endif
+  for (uintptr_t trailing_word_idx = 0; trailing_word_idx != word_ct; ++trailing_word_idx) {
+    tot += PopcountWord(bitvec[trailing_word_idx]);
+  }
+  return tot;
+}
+#endif  // !USE_AVX2
+
+uintptr_t PopcountWordsIntersect(const uintptr_t* __restrict bitvec1_iter, const uintptr_t* __restrict bitvec2_iter, uintptr_t word_ct);
+
+uintptr_t PopcountWordsXor(const uintptr_t* __restrict bitvec1_iter, const uintptr_t* __restrict bitvec2_iter, uintptr_t word_ct);
+
+// uintptr_t PopcountWordsIntersect3(const uintptr_t* __restrict bitvec1_iter, const uintptr_t* __restrict bitvec2_iter, const uintptr_t* __restrict bitvec3_iter, uintptr_t word_ct);
+
+// requires positive word_ct
+// stay agnostic a bit longer re: word_ct := DIV_UP(entry_ct, kBitsPerWord)
+// vs. word_ct := 1 + (entry_ct / kBitsPerWord)
+// (this is a source of bugs, though; interface should probably be changed to
+// use entry_ct once multiallelic/dosage implementation is done)
+void FillCumulativePopcounts(const uintptr_t* subset_mask, uint32_t word_ct, uint32_t* cumulative_popcounts);
+
+void FillCumulativePopcountsW(const uintptr_t* subset_mask, uintptr_t word_ct, uintptr_t* cumulative_popcounts_w);
+
+// If idx_list is a list of valid unfiltered indexes, this converts them
+// in-place to corresponding filtered indexes.
+void UidxsToIdxs(const uintptr_t* subset_mask, const uint32_t* subset_cumulative_popcounts, const uintptr_t idx_list_len, uint32_t* idx_list);
+
+// These functions do not overread, but may write extra bytes up to the word
+// boundary.
+void Expand1bitTo8(const void* __restrict bytearr, uint32_t input_bit_ct, uint32_t incr, void* __restrict dst);
+
+void Expand1bitTo16(const void* __restrict bytearr, uint32_t input_bit_ct, uint32_t incr, void* __restrict dst);
+
+
+// might rename this to IsSet01 (guaranteeing 0/1 return value), and change
+// IsSet() to bitarr[idx / kBitsPerWord] & (k1LU << (idx % kBitsPerWord)) since
+// I'd expect that to play better with out-of-order execution.  but need to
+// benchmark first.
+HEADER_INLINE uintptr_t IsSet(const uintptr_t* bitarr, uintptr_t idx) {
+  return (bitarr[idx / kBitsPerWord] >> (idx % kBitsPerWord)) & 1;
+}
+
+HEADER_INLINE uintptr_t IsSetUnaligned(const void* bitarr, uintptr_t idx) {
+  const unsigned char* bitarr_uc = S_CAST(const unsigned char*, bitarr);
+  return (bitarr_uc[idx / CHAR_BIT] >> (idx % CHAR_BIT)) & 1;
+}
+
+HEADER_INLINE void SetBit(uintptr_t idx, uintptr_t* bitarr) {
+  bitarr[idx / kBitsPerWord] |= k1LU << (idx % kBitsPerWord);
+}
+
+HEADER_INLINE void ClearBit(uintptr_t idx, uintptr_t* bitarr) {
+  bitarr[idx / kBitsPerWord] &= ~(k1LU << (idx % kBitsPerWord));
+}
+
+HEADER_INLINE void AssignBit(uintptr_t idx, uintptr_t newbit, uintptr_t* bitarr) {
+  const uintptr_t inv_mask = k1LU << (idx % kBitsPerWord);
+  uintptr_t* cur_word_ptr = &(bitarr[idx / kBitsPerWord]);
+  *cur_word_ptr = ((*cur_word_ptr) & (~inv_mask)) | (inv_mask * newbit);
+}
+
+/*
+HEADER_INLINE uintptr_t BitInnerIter1(uintptr_t uidx_base, uintptr_t* cur_bitsp, uintptr_t* cur_uidx_stopp) {
+  const uintptr_t cur_bits = *cur_bitsp;
+  const uint32_t uidx_start_lowbits = ctzw(*cur_bitsp);
+  // Key idea is to iterate over sub-blocks of set bits in a single word, in
+  // essentially the same manner as non-AVX2 CopyBitarrSubset() was doing.
+  // This particular expression 'finds' the end of the current sub-block.
+  const uintptr_t cur_bits_lfill_p1 = (cur_bits | (cur_bits - 1)) + 1;
+  *cur_bitsp = cur_bits & cur_bits_lfill_p1;
+  uint32_t uidx_stop_lowbits = kBitsPerWord;
+  if (cur_bits_lfill_p1) {
+    uidx_stop_lowbits = ctzw(cur_bits_lfill_p1);
+  }
+  *cur_uidx_stopp = uidx_base + uidx_stop_lowbits;
+  return uidx_base + uidx_start_lowbits;
+}
+*/
+
+HEADER_INLINE uintptr_t BitIter1(const uintptr_t* __restrict bitarr, uintptr_t* __restrict uidx_basep, uintptr_t* __restrict cur_bitsp) {
+  uintptr_t cur_bits = *cur_bitsp;
+  if (!cur_bits) {
+    uintptr_t widx = (*uidx_basep) / kBitsPerWord;
+    do {
+      cur_bits = bitarr[++widx];
+    } while (!cur_bits);
+    *uidx_basep = widx * kBitsPerWord;
+  }
+  *cur_bitsp = cur_bits & (cur_bits - 1);
+  return (*uidx_basep) + ctzw(cur_bits);
+}
+
+// Returns lowbit index instead of the full index.
+HEADER_INLINE uint32_t BitIter1x(const uintptr_t* __restrict bitarr, uintptr_t* __restrict widxp, uintptr_t* __restrict cur_bitsp) {
+  uintptr_t cur_bits = *cur_bitsp;
+  while (!cur_bits) {
+    cur_bits = bitarr[++(*widxp)];
+  }
+  *cur_bitsp = cur_bits & (cur_bits - 1);
+  return ctzw(cur_bits);
+}
+
+// Returns isolated lowbit.
+HEADER_INLINE uintptr_t BitIter1y(const uintptr_t* __restrict bitarr, uintptr_t* __restrict widxp, uintptr_t* __restrict cur_bitsp) {
+  uintptr_t cur_bits = *cur_bitsp;
+  while (!cur_bits) {
+    cur_bits = bitarr[++(*widxp)];
+  }
+  const uintptr_t shifted_bit = cur_bits & (-cur_bits);
+  *cur_bitsp = cur_bits ^ shifted_bit;
+  return shifted_bit;
+}
+
+HEADER_INLINE void BitIter1Start(const uintptr_t* __restrict bitarr, uintptr_t restart_uidx, uintptr_t* __restrict uidx_basep, uintptr_t* __restrict cur_bitsp) {
+  const uintptr_t widx = restart_uidx / kBitsPerWord;
+  *cur_bitsp = bitarr[widx] & ((~k0LU) << (restart_uidx % kBitsPerWord));
+  *uidx_basep = widx * kBitsPerWord;
+}
+
+HEADER_INLINE uintptr_t BitIter1NoAdv(const uintptr_t* __restrict bitarr, uintptr_t* __restrict uidx_basep, uintptr_t* __restrict cur_bitsp) {
+  uintptr_t cur_bits = *cur_bitsp;
+  if (!cur_bits) {
+    uintptr_t widx = (*uidx_basep) / kBitsPerWord;
+    do {
+      cur_bits = bitarr[++widx];
+    } while (!cur_bits);
+    *uidx_basep = widx * kBitsPerWord;
+    *cur_bitsp = cur_bits;
+  }
+  return (*uidx_basep) + ctzw(cur_bits);
+}
+
+HEADER_INLINE uintptr_t BitIter0(const uintptr_t* __restrict bitarr, uintptr_t* __restrict uidx_basep, uintptr_t* __restrict cur_inv_bitsp) {
+  uintptr_t cur_inv_bits = *cur_inv_bitsp;
+  if (!cur_inv_bits) {
+    uintptr_t widx = (*uidx_basep) / kBitsPerWord;
+    do {
+      cur_inv_bits = ~bitarr[++widx];
+    } while (!cur_inv_bits);
+    *uidx_basep = widx * kBitsPerWord;
+  }
+  *cur_inv_bitsp = cur_inv_bits & (cur_inv_bits - 1);
+  return (*uidx_basep) + ctzw(cur_inv_bits);
+}
+
+HEADER_INLINE void BitIter0Start(const uintptr_t* __restrict bitarr, uintptr_t restart_uidx, uintptr_t* __restrict uidx_basep, uintptr_t* __restrict cur_inv_bitsp) {
+  const uintptr_t widx = restart_uidx / kBitsPerWord;
+  *cur_inv_bitsp = (~bitarr[widx]) & ((~k0LU) << (restart_uidx % kBitsPerWord));
+  *uidx_basep = widx * kBitsPerWord;
+}
+
+HEADER_INLINE uintptr_t BitIter0NoAdv(const uintptr_t* __restrict bitarr, uintptr_t* __restrict uidx_basep, uintptr_t* __restrict cur_inv_bitsp) {
+  uintptr_t cur_inv_bits = *cur_inv_bitsp;
+  if (!cur_inv_bits) {
+    uintptr_t widx = (*uidx_basep) / kBitsPerWord;
+    do {
+      cur_inv_bits = ~bitarr[++widx];
+    } while (!cur_inv_bits);
+    *uidx_basep = widx * kBitsPerWord;
+    *cur_inv_bitsp = cur_inv_bits;
+  }
+  return (*uidx_basep) + ctzw(cur_inv_bits);
+}
+
+// todo: test this against extracting a nonmissing bitarr first
+/*
+HEADER_INLINE void NextNonmissingUnsafeCk32(const uintptr_t* __restrict genoarr, uint32_t* __restrict loc_ptr) {
+  if (GetNyparrEntry(genoarr, *loc_ptr) == 3) {
+    *loc_ptr = NextNonmissingUnsafe(genoarr, *loc_ptr);
+  }
+}
+*/
+
+// Equivalent to PopcountBitRange(subset_mask, 0, raw_idx).
+HEADER_INLINE uint32_t RawToSubsettedPos(const uintptr_t* subset_mask, const uint32_t* subset_cumulative_popcounts, uintptr_t raw_idx) {
+  // this should be much better than keeping a uidx_to_idx array!
+  // (update: there are more compact indexes, but postpone for now, this is
+  // is nice and simple and gets us most of what we need.)
+  const uintptr_t raw_widx = raw_idx / kBitsPerWord;
+  return subset_cumulative_popcounts[raw_widx] + PopcountWord(bzhi(subset_mask[raw_widx], raw_idx % kBitsPerWord));
+}
+
+HEADER_INLINE uintptr_t RawToSubsettedPosW(const uintptr_t* subset_mask, const uintptr_t* subset_cumulative_popcounts, uintptr_t raw_idx) {
+  const uintptr_t raw_widx = raw_idx / kBitsPerWord;
+  return subset_cumulative_popcounts[raw_widx] + PopcountWord(bzhi(subset_mask[raw_widx], raw_idx % kBitsPerWord));
+}
+
+HEADER_INLINE void ZeroTrailingBits(uintptr_t bit_ct, uintptr_t* bitarr) {
+  const uint32_t trail_ct = bit_ct % kBitsPerWord;
+  if (trail_ct) {
+    bitarr[bit_ct / kBitsPerWord] = bzhi(bitarr[bit_ct / kBitsPerWord], trail_ct);
+  }
+}
+
+#ifdef USE_SSE2
+HEADER_INLINE void ZeroTrailingWords(uint32_t word_ct, uintptr_t* bitvec) {
+  const uint32_t remainder = word_ct % kWordsPerVec;
+  if (remainder) {
+    ZeroWArr(kWordsPerVec - remainder, &(bitvec[word_ct]));
+  }
+}
+#else
+HEADER_INLINE void ZeroTrailingWords(__maybe_unused uint32_t word_ct, __maybe_unused uintptr_t* bitvec) {
+}
+#endif
+
+HEADER_INLINE void CopyBitarr(const uintptr_t* __restrict src, uintptr_t bit_ct, uintptr_t* __restrict dst) {
+  memcpy(dst, src, BitCtToWordCt(bit_ct) * kBytesPerWord);
+}
+
+// output_bit_idx_end is practically always subset_size
+// if not, it currently must correspond to PopcountWords(subset_mask, word_ct)
+// for some word_ct
+void CopyBitarrSubset(const uintptr_t* __restrict raw_bitarr, const uintptr_t* __restrict subset_mask, uint32_t output_bit_idx_end, uintptr_t* __restrict output_bitarr);
+
+#ifndef NO_UNALIGNED
+HEADER_INLINE void CopyBitarrSubsetToUnaligned(const uintptr_t* __restrict raw_bitarr, const uintptr_t* __restrict subset_mask, uint32_t output_bit_idx_end, void* __restrict output_bitarr) {
+  CopyBitarrSubset(raw_bitarr, subset_mask, output_bit_idx_end, S_CAST(uintptr_t*, output_bitarr));
+}
+#else
+void CopyBitarrSubsetToUnaligned(const uintptr_t* __restrict raw_bitarr, const uintptr_t* __restrict subset_mask, uint32_t output_bit_idx_end, void* __restrict output_bitarr);
+#endif
+
+// expand_size + read_start_bit must be positive.
+void ExpandBytearr(const void* __restrict compact_bitarr, const uintptr_t* __restrict expand_mask, uint32_t word_ct, uint32_t expand_size, uint32_t read_start_bit, uintptr_t* __restrict target);
+
+// equivalent to calling ExpandBytearr() followed by CopyBitarrSubset()
+void ExpandThenSubsetBytearr(const void* __restrict compact_bitarr, const uintptr_t* __restrict expand_mask, const uintptr_t* __restrict subset_mask, uint32_t expand_size, uint32_t subset_size, uint32_t read_start_bit, uintptr_t* __restrict target);
+
+// mid_popcount must be positive
+void ExpandBytearrNested(const void* __restrict compact_bitarr, const uintptr_t* __restrict mid_bitarr, const uintptr_t* __restrict top_expand_mask, uint32_t word_ct, uint32_t mid_popcount, uint32_t mid_start_bit, uintptr_t* __restrict mid_target, uintptr_t* __restrict compact_target);
+
+// mid_popcount must be positive
+// if mid_start_bit == 1, mid_popcount should not include that bit
+void ExpandThenSubsetBytearrNested(const void* __restrict compact_bitarr, const uintptr_t* __restrict mid_bitarr, const uintptr_t* __restrict top_expand_mask, const uintptr_t* __restrict subset_mask, uint32_t subset_size, uint32_t mid_popcount, uint32_t mid_start_bit, uintptr_t* __restrict mid_target, uintptr_t* __restrict compact_target);
+
+// these don't read past the end of bitarr
+uintptr_t PopcountBytes(const void* bitarr, uintptr_t byte_ct);
+uintptr_t PopcountBytesMasked(const void* bitarr, const uintptr_t* mask_arr, uintptr_t byte_ct);
+
+
+// TransposeNypblock(), which is more plink-specific, is in pgenlib_misc
+CONSTI32(kPglBitTransposeBatch, kBitsPerCacheline);
+CONSTI32(kPglBitTransposeWords, kWordsPerCacheline);
+// * Up to 512x512 (CACHELINE64) or 1024x1024 (CACHELINE128)
+// * vecaligned_buf must have size 64k (CACHELINE64) or 256k (CACHELINE128)
+// * write_iter must be allocated up to at least
+//   RoundUpPow2(write_batch_size, 2) rows
+// * We use pointers with different types to read from and write to buf0/buf1,
+//   so defining the base type as unsigned char* is theoretically necessary to
+//   avoid breaking strict-aliasing rules, while the restrict qualifiers should
+//   tell the compiler it doesn't need to be paranoid about writes to one of
+//   the buffers screwing with reads from the other.
+CONSTI32(kPglBitTransposeBufbytes, (kPglBitTransposeBatch * kPglBitTransposeBatch) / (CHAR_BIT / 2));
+#ifdef __LP64__
+void TransposeBitblock64(const uintptr_t* read_iter, uintptr_t read_ul_stride, uintptr_t write_ul_stride, uint32_t read_row_ct, uint32_t write_row_ct, uintptr_t* write_iter, VecW* __restrict buf0, VecW* __restrict buf1);
+
+HEADER_INLINE void TransposeBitblock(const uintptr_t* read_iter, uintptr_t read_ul_stride, uintptr_t write_ul_stride, uint32_t read_batch_size, uint32_t write_batch_size, uintptr_t* write_iter, VecW* vecaligned_buf) {
+  TransposeBitblock64(read_iter, read_ul_stride, write_ul_stride, read_batch_size, write_batch_size, write_iter, vecaligned_buf, &(vecaligned_buf[kPglBitTransposeBufbytes / (2 * kBytesPerVec)]));
+}
+
+#else  // !__LP64__
+void TransposeBitblock32(const uintptr_t* read_iter, uintptr_t read_ul_stride, uintptr_t write_ul_stride, uint32_t read_batch_size, uint32_t write_batch_size, uintptr_t* write_iter, VecW* __restrict buf0, VecW* __restrict buf1);
+
+// If this ever needs to be called on an input byte array, read_iter could be
+// changed to const void*; in that case, read_ul_stride should be changed to a
+// byte count.
+HEADER_INLINE void TransposeBitblock(const uintptr_t* read_iter, uintptr_t read_ul_stride, uintptr_t write_ul_stride, uint32_t read_batch_size, uint32_t write_batch_size, uintptr_t* write_iter, VecW* vecaligned_buf) {
+  TransposeBitblock32(read_iter, read_ul_stride, write_ul_stride, read_batch_size, write_batch_size, write_iter, vecaligned_buf, &(vecaligned_buf[kPglBitTransposeBufbytes / (2 * kBytesPerVec)]));
+}
+#endif
+
+CONSTI32(kPglBitTransposeBufwords, kPglBitTransposeBufbytes / kBytesPerWord);
+CONSTI32(kPglBitTransposeBufvecs, kPglBitTransposeBufbytes / kBytesPerVec);
+
+CONSTI32(kPglNybbleTransposeBatch, kNybblesPerCacheline);
+CONSTI32(kPglNybbleTransposeWords, kWordsPerCacheline);
+
+CONSTI32(kPglNybbleTransposeBufbytes, (kPglNybbleTransposeBatch * kPglNybbleTransposeBatch) / 2);
+
+// * Up to 128x128 (CACHELINE64) or 256x256 (CACHELINE128)
+// * vecaligned_buf must have size 8k (CACHELINE64) or 32k (CACHELINE128)
+// * Now ok for write_iter to not be padded when write_batch_size odd
+void TransposeNybbleblock(const uintptr_t* read_iter, uint32_t read_ul_stride, uint32_t write_ul_stride, uint32_t read_batch_size, uint32_t write_batch_size, uintptr_t* __restrict write_iter, VecW* vecaligned_buf);
+
+#ifdef USE_SSE2
+#  ifdef USE_AVX2
+extern const unsigned char kLeadMask[2 * kBytesPerVec] __attribute__ ((aligned (64)));
+#  else
+extern const unsigned char kLeadMask[2 * kBytesPerVec] __attribute__ ((aligned (32)));
+#  endif
+#endif
+
+uintptr_t BytesumArr(const void* bytearr, uintptr_t byte_ct);
+
+uintptr_t CountByte(const void* bytearr, unsigned char ucc, uintptr_t byte_ct);
+
+uintptr_t CountU16(const void* u16arr, uint16_t usii, uintptr_t u16_ct);
+
+
+// Applies sample_include to {src_subset, src_vals}.
+uint32_t Copy1bit8Subset(const uintptr_t* __restrict src_subset, const void* __restrict src_vals, const uintptr_t* __restrict sample_include, uint32_t src_subset_size, uint32_t sample_ct, uintptr_t* __restrict dst_subset, void* __restrict dst_vals);
+
+uint32_t Copy1bit16Subset(const uintptr_t* __restrict src_subset, const void* __restrict src_vals, const uintptr_t* __restrict sample_include, uint32_t src_subset_size, uint32_t sample_ct, uintptr_t* __restrict dst_subset, void* __restrict dst_vals);
+
+// more verbose than (val + 3) / 4, but may as well make semantic meaning
+// obvious; any explicit DivUp(val, 4) expressions should have a different
+// meaning
+// (not needed for bitct -> bytect, DivUp(val, CHAR_BIT) is clear enough)
+HEADER_CINLINE uintptr_t NypCtToByteCt(uintptr_t val) {
+  return DivUp(val, 4);
+}
+
+HEADER_CINLINE uintptr_t NypCtToVecCt(uintptr_t val) {
+  return DivUp(val, kNypsPerVec);
+}
+
+HEADER_CINLINE uintptr_t NypCtToWordCt(uintptr_t val) {
+  return DivUp(val, kBitsPerWordD2);
+}
+
+HEADER_CINLINE uintptr_t NypCtToAlignedWordCt(uintptr_t val) {
+  return kWordsPerVec * NypCtToVecCt(val);
+}
+
+HEADER_CINLINE uintptr_t NypCtToCachelineCt(uintptr_t val) {
+  return DivUp(val, kNypsPerCacheline);
+}
+
+HEADER_INLINE uintptr_t GetNyparrEntry(const uintptr_t* nyparr, uint32_t idx) {
+  return (nyparr[idx / kBitsPerWordD2] >> (2 * (idx % kBitsPerWordD2))) & 3;
+}
+
+// todo: check if this optimizes newval=0 out
+HEADER_INLINE void AssignNyparrEntry(uint32_t idx, uintptr_t newval, uintptr_t* nyparr) {
+  const uint32_t bit_shift_ct = 2 * (idx % kBitsPerWordD2);
+  uintptr_t* wordp = &(nyparr[idx / kBitsPerWordD2]);
+  *wordp = ((*wordp) & (~((3 * k1LU) << bit_shift_ct))) | (newval << bit_shift_ct);
+}
+
+HEADER_INLINE void ClearNyparrEntry(uint32_t idx, uintptr_t* nyparr) {
+  nyparr[idx / kBitsPerWordD2] &= ~((3 * k1LU) << (idx % kBitsPerWordD2));
+}
+
+HEADER_CINLINE uintptr_t NybbleCtToVecCt(uintptr_t val) {
+  return DivUp(val, kNybblesPerVec);
+}
+
+HEADER_CINLINE uintptr_t NybbleCtToAlignedWordCt(uintptr_t val) {
+  return kWordsPerVec * NybbleCtToVecCt(val);
+}
+
+HEADER_CINLINE uintptr_t NybbleCtToCachelineCt(uintptr_t val) {
+  return DivUp(val, kNybblesPerCacheline);
+}
+
+HEADER_INLINE void AssignNybblearrEntry(uint32_t idx, uintptr_t newval, uintptr_t* nybblearr) {
+  const uint32_t bit_shift_ct = 4 * (idx % kBitsPerWordD4);
+  uintptr_t* wordp = &(nybblearr[idx / kBitsPerWordD4]);
+  *wordp = ((*wordp) & (~((15 * k1LU) << bit_shift_ct))) | (newval << bit_shift_ct);
+}
+
+// 'Unsafe' because it assumes high bits of every byte are 0 and entry_ct is
+// positive.
+void Reduce8to4bitInplaceUnsafe(uintptr_t entry_ct, uintptr_t* mainvec);
+
+#ifdef __cplusplus
+}  // namespace plink2
+#endif
+
+#endif  // __PLINK2_BITS_H__
diff --git a/external_libs/pgenlib/include/plink2_bits.o b/external_libs/pgenlib/include/plink2_bits.o
new file mode 100644
index 0000000..b9a7695
Binary files /dev/null and b/external_libs/pgenlib/include/plink2_bits.o differ
diff --git a/external_libs/pgenlib/pgenlib.a b/external_libs/pgenlib/pgenlib.a
new file mode 100644
index 0000000..6538704
Binary files /dev/null and b/external_libs/pgenlib/pgenlib.a differ
diff --git a/external_libs/pgenlib/pgenlib_ffi_support.cpp b/external_libs/pgenlib/pgenlib_ffi_support.cpp
new file mode 100644
index 0000000..82cea65
--- /dev/null
+++ b/external_libs/pgenlib/pgenlib_ffi_support.cpp
@@ -0,0 +1,790 @@
+// This library is part of PLINK 2.0, copyright (C) 2005-2022 Shaun Purcell,
+// Christopher Chang.
+//
+// This library is free software: you can redistribute it and/or modify it
+// under the terms of the GNU Lesser General Public License as published by the
+// Free Software Foundation; either version 3 of the License, or (at your
+// option) any later version.
+//
+// This library is distributed in the hope that it will be useful, but WITHOUT
+// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public License
+// for more details.
+//
+// You should have received a copy of the GNU Lesser General Public License
+// along with this library.  If not, see <http://www.gnu.org/licenses/>.
+
+#include "pgenlib_ffi_support.h"
+
+#ifdef __cplusplus
+namespace plink2 {
+#endif
+
+void GenoarrToBytesMinus9(const uintptr_t* genoarr, uint32_t sample_ct, int8_t* genobytes) {
+  const uint32_t word_ct_m1 = (sample_ct - 1) / kBytesPerWord;
+  const Quarterword* read_alias = R_CAST(const Quarterword*, genoarr);
+  unsigned char* genobytes_uc = DowncastToUc(genobytes);
+  for (uint32_t widx = 0; ; ++widx) {
+    uintptr_t qw = Unpack0303(read_alias[widx]);
+    // now each byte is in {0, 1, 2, 3}.  Convert the 3s to -9s in a branchless
+    // manner.
+    // (-9) - 3 = -12, which is represented as 244 in a uint8_t
+    const uintptr_t geno_missing = qw & (qw >> 1) & kMask0101;
+    qw += geno_missing * 244;
+    if (widx == word_ct_m1) {
+      SubwordStore(qw, ModNz(sample_ct, kBytesPerWord), &(genobytes_uc[widx * kBytesPerWord]));
+      return;
+    }
+    CopyToUnalignedOffsetW(genobytes_uc, &qw, widx);
+  }
+}
+
+static const int32_t kGenoInt32Quads[1024] ALIGNV16 = QUAD_TABLE256(0, 1, 2, -9);
+
+void GenoarrToInt32sMinus9(const uintptr_t* genoarr, uint32_t sample_ct, int32_t* geno_int32) {
+  GenoarrLookup256x4bx4(genoarr, kGenoInt32Quads, sample_ct, geno_int32);
+}
+
+// todo: use GenoarrLookup16x8bx2()
+static const int64_t kGenoToInt64[4] = {0, 1, 2, -9};
+
+void GenoarrToInt64sMinus9(const uintptr_t* genoarr, uint32_t sample_ct, int64_t* geno_int64) {
+  const uint32_t word_ct_m1 = (sample_ct - 1) / kBitsPerWordD2;
+  int64_t* write_iter = geno_int64;
+  uint32_t subgroup_len = kBitsPerWordD2;
+  for (uint32_t widx = 0; ; ++widx) {
+    if (widx >= word_ct_m1) {
+      if (widx > word_ct_m1) {
+        return;
+      }
+      subgroup_len = ModNz(sample_ct, kBitsPerWordD2);
+    }
+    uintptr_t geno_word = genoarr[widx];
+    for (uint32_t uii = 0; uii != subgroup_len; ++uii) {
+      *write_iter++ = kGenoToInt64[geno_word & 3];
+      geno_word >>= 2;
+    }
+  }
+}
+
+// missing = -9
+const double kGenoDoublePairs[32] ALIGNV16 = PAIR_TABLE16(0.0, 1.0, 2.0, -9.0);
+
+const uint64_t kGenoToIntcodeDPairs[32] ALIGNV16 = PAIR_TABLE16(0, 0x100000000LLU, 0x100000001LLU, 0xfffffff7fffffff7LLU);
+
+void GenoarrPhasedToAlleleCodes(const uint64_t* genoarr_to_intcode_dpair_table, const uintptr_t* genoarr, const uintptr_t* phasepresent, const uintptr_t* phaseinfo, uint32_t sample_ct, uint32_t phasepresent_ct, unsigned char* phasebytes, int32_t* allele_codes) {
+  // phasebytes can be nullptr, phasepresent cannot
+  GenoarrToAlleleCodes(genoarr_to_intcode_dpair_table, genoarr, sample_ct, allele_codes);
+  // should be safe to assume allele_codes are 8-byte aligned?
+  uint64_t* allele_codes_alias64 = R_CAST(uint64_t*, allele_codes);
+  uintptr_t sample_uidx_base = 0;
+  uintptr_t cur_bits = phasepresent[0];
+  if (!phasebytes) {
+    for (uint32_t phased_idx = 0; phased_idx != phasepresent_ct; ++phased_idx) {
+      const uintptr_t sample_uidx = BitIter1(phasepresent, &sample_uidx_base, &cur_bits);
+      if (IsSet(phaseinfo, sample_uidx)) {
+        // 1|0
+        allele_codes_alias64[sample_uidx] = 1;
+      }
+    }
+    return;
+  }
+  // 0 and 2 = homozygous, automatically phased; otherwise patch in from
+  // phaseinfo if phasepresent_ct is nonzero
+  // so, start off by extracting low bit from each pair and flipping it
+  const uint32_t word_ct_m1 = (sample_ct - 1) / kBytesPerWord;
+  const Quarterword* read_alias = R_CAST(const Quarterword*, genoarr);
+  uintptr_t* write_walias = R_CAST(uintptr_t*, phasebytes);
+  for (uint32_t widx = 0; ; ++widx) {
+    uintptr_t qw = Unpack0303(read_alias[widx]);
+    qw = (~qw) & kMask0101;
+    if (widx == word_ct_m1) {
+      SubwordStore(qw, ModNz(sample_ct, kBytesPerWord), &(write_walias[widx]));
+      break;
+    }
+    write_walias[widx] = qw;
+  }
+  for (uint32_t phased_idx = 0; phased_idx != phasepresent_ct; ++phased_idx) {
+    const uintptr_t sample_uidx = BitIter1(phasepresent, &sample_uidx_base, &cur_bits);
+    phasebytes[sample_uidx] = 1;
+    if (IsSet(phaseinfo, sample_uidx)) {
+      allele_codes_alias64[sample_uidx] = 1;
+    }
+  }
+}
+
+void GenoarrMPToAlleleCodes(const uint64_t* geno_to_intcode_dpair_table, const PgenVariant* pgv, uint32_t sample_ct, unsigned char* phasebytes, int32_t* allele_codes) {
+  // phasebytes can be nullptr, phasepresent cannot
+  const uintptr_t* genoarr = pgv->genovec;
+  const uintptr_t* phasepresent = pgv->phasepresent;
+  const uintptr_t* phaseinfo = pgv->phaseinfo;
+  const uint32_t phasepresent_ct = pgv->phasepresent_ct;
+  const uint32_t patch_01_ct = pgv->patch_01_ct;
+  const uint32_t patch_10_ct = pgv->patch_10_ct;
+  if ((!patch_01_ct) && (!patch_10_ct)) {
+    GenoarrPhasedToAlleleCodes(geno_to_intcode_dpair_table, genoarr, phasepresent, phaseinfo, sample_ct, phasepresent_ct, phasebytes, allele_codes);
+    return;
+  }
+  GenoarrToAlleleCodes(geno_to_intcode_dpair_table, genoarr, sample_ct, allele_codes);
+  // See e.g. PglMultiallelicSparseToDense().
+  if (patch_01_ct) {
+    const uintptr_t* patch_01_set = pgv->patch_01_set;
+    const AlleleCode* patch_01_vals = pgv->patch_01_vals;
+    uintptr_t sample_idx_base = 0;
+    uintptr_t cur_bits = patch_01_set[0];
+    int32_t* allele_codes1 = &(allele_codes[1]);
+    for (uint32_t uii = 0; uii != patch_01_ct; ++uii) {
+      const uintptr_t sample_idx = BitIter1(patch_01_set, &sample_idx_base, &cur_bits);
+      allele_codes1[2 * sample_idx] = patch_01_vals[uii];
+    }
+  }
+  if (phasebytes) {
+    // Initialize 0/2 phasebytes before processing patch_10.
+    const uint32_t word_ct_m1 = (sample_ct - 1) / kBytesPerWord;
+    const Quarterword* read_alias = R_CAST(const Quarterword*, genoarr);
+    for (uint32_t widx = 0; ; ++widx) {
+      uintptr_t qw = Unpack0303(read_alias[widx]);
+      qw = (~qw) & kMask0101;
+      if (widx == word_ct_m1) {
+        SubwordStore(qw, ModNz(sample_ct, kBytesPerWord), &(phasebytes[widx * kBytesPerWord]));
+        break;
+      }
+      CopyToUnalignedOffsetW(phasebytes, &qw, widx);
+    }
+  }
+  if (patch_10_ct) {
+    const uintptr_t* patch_10_set = pgv->patch_10_set;
+    const AlleleCode* patch_10_vals = pgv->patch_10_vals;
+    uintptr_t sample_idx_base = 0;
+    uintptr_t cur_bits = patch_10_set[0];
+    if (!phasebytes) {
+      for (uint32_t uii = 0; uii != patch_10_ct; ++uii) {
+        const uintptr_t sample_idx = BitIter1(patch_10_set, &sample_idx_base, &cur_bits);
+        allele_codes[2 * sample_idx] = patch_10_vals[2 * uii];
+        allele_codes[2 * sample_idx + 1] = patch_10_vals[2 * uii + 1];
+      }
+    } else {
+      for (uint32_t uii = 0; uii != patch_10_ct; ++uii) {
+        const uintptr_t sample_idx = BitIter1(patch_10_set, &sample_idx_base, &cur_bits);
+        const AlleleCode ac0 = patch_10_vals[2 * uii];
+        const AlleleCode ac1 = patch_10_vals[2 * uii + 1];
+        allele_codes[2 * sample_idx] = ac0;
+        allele_codes[2 * sample_idx + 1] = ac1;
+        if (ac0 != ac1) {
+          phasebytes[sample_idx] = 0;
+          // When phasepresent bit is set, we'll fix this up later.
+        }
+      }
+    }
+  }
+  uintptr_t sample_uidx_base = 0;
+  uintptr_t cur_bits = phasepresent[0];
+  if (!phasebytes) {
+    for (uint32_t phased_idx = 0; phased_idx != phasepresent_ct; ++phased_idx) {
+      const uintptr_t sample_uidx = BitIter1(phasepresent, &sample_uidx_base, &cur_bits);
+      if (IsSet(phaseinfo, sample_uidx)) {
+        const int32_t tmp_code = allele_codes[2 * sample_uidx];
+        allele_codes[2 * sample_uidx] = allele_codes[2 * sample_uidx + 1];
+        allele_codes[2 * sample_uidx + 1] = tmp_code;
+      }
+    }
+    return;
+  }
+  for (uint32_t phased_idx = 0; phased_idx != phasepresent_ct; ++phased_idx) {
+    const uintptr_t sample_uidx = BitIter1(phasepresent, &sample_uidx_base, &cur_bits);
+    phasebytes[sample_uidx] = 1;
+    if (IsSet(phaseinfo, sample_uidx)) {
+      const int32_t tmp_code = allele_codes[2 * sample_uidx];
+      allele_codes[2 * sample_uidx] = allele_codes[2 * sample_uidx + 1];
+      allele_codes[2 * sample_uidx + 1] = tmp_code;
+    }
+  }
+}
+
+// missing = -9
+// may want a double-lookup function for this
+static const int32_t kGenoToHap0Code[6] = {0, 0, 1, -9, 0, 1};
+static const int32_t kGenoToHap1Code[6] = {0, 1, 1, -9, 0, 0};
+
+// todo: write version of this which fills phasebytes
+void GenoarrPhasedToHapCodes(const uintptr_t* genoarr, const uintptr_t* phaseinfo, uint32_t variant_batch_size, int32_t* hap0_codes_iter, int32_t* hap1_codes_iter) {
+  // assumes genoarr and phaseinfo have already been transposed
+  const uint32_t word_ct_m1 = (variant_batch_size - 1) / kBitsPerWordD2;
+  const Halfword* phaseinfo_alias = R_CAST(const Halfword*, phaseinfo);
+  uint32_t subgroup_len = kBitsPerWordD2;
+  for (uint32_t widx = 0; ; ++widx) {
+    if (widx >= word_ct_m1) {
+      if (widx > word_ct_m1) {
+        return;
+      }
+      subgroup_len = ModNz(variant_batch_size, kBitsPerWordD2);
+    }
+    uintptr_t geno_word = genoarr[widx];
+    uintptr_t phaseinfo_hw = phaseinfo_alias[widx];
+    for (uint32_t uii = 0; uii != subgroup_len; ++uii) {
+      const uintptr_t cur_pgeno_code = (geno_word & 3) + 4 * (phaseinfo_hw & 1);
+      *hap0_codes_iter++ = kGenoToHap0Code[cur_pgeno_code];
+      *hap1_codes_iter++ = kGenoToHap1Code[cur_pgeno_code];
+      geno_word >>= 2;
+      phaseinfo_hw >>= 1;
+    }
+  }
+}
+
+// todo: use GenoarrLookup256x4bx4()
+static const float kGenoToFloat[4] = {0.0, 1.0, 2.0, -9.0};
+
+void Dosage16ToFloatsMinus9(const uintptr_t* genoarr, const uintptr_t* dosage_present, const uint16_t* dosage_main, uint32_t sample_ct, uint32_t dosage_ct, float* geno_float) {
+  const uint32_t word_ct_m1 = (sample_ct - 1) / kBitsPerWordD2;
+  float* write_iter = geno_float;
+  uint32_t subgroup_len = kBitsPerWordD2;
+  for (uint32_t widx = 0; ; ++widx) {
+    if (widx >= word_ct_m1) {
+      if (widx > word_ct_m1) {
+        break;
+      }
+      subgroup_len = ModNz(sample_ct, kBitsPerWordD2);
+    }
+    uintptr_t geno_word = genoarr[widx];
+    for (uint32_t uii = 0; uii != subgroup_len; ++uii) {
+      *write_iter++ = kGenoToFloat[geno_word & 3];
+      geno_word >>= 2;
+    }
+  }
+  if (dosage_ct) {
+    const uint16_t* dosage_main_iter = dosage_main;
+    uintptr_t sample_uidx_base = 0;
+    uintptr_t cur_bits = dosage_present[0];
+    for (uint32_t dosage_idx = 0; dosage_idx != dosage_ct; ++dosage_idx) {
+      const uintptr_t sample_uidx = BitIter1(dosage_present, &sample_uidx_base, &cur_bits);
+      // multiply by 2^{-14}
+      geno_float[sample_uidx] = S_CAST(float, *dosage_main_iter++) * S_CAST(float, 0.00006103515625);
+    }
+  }
+}
+
+void Dosage16ToDoubles(const double* geno_double_pair_table, const uintptr_t* genoarr, const uintptr_t* dosage_present, const uint16_t* dosage_main, uint32_t sample_ct, uint32_t dosage_ct, double* geno_double) {
+  GenoarrLookup16x8bx2(genoarr, geno_double_pair_table, sample_ct, geno_double);
+  if (dosage_ct) {
+    const uint16_t* dosage_main_iter = dosage_main;
+    uintptr_t sample_uidx_base = 0;
+    uintptr_t cur_bits = dosage_present[0];
+    for (uint32_t dosage_idx = 0; dosage_idx != dosage_ct; ++dosage_idx) {
+      const uintptr_t sample_uidx = BitIter1(dosage_present, &sample_uidx_base, &cur_bits);
+      geno_double[sample_uidx] = S_CAST(double, *dosage_main_iter++) * 0.00006103515625;
+    }
+  }
+}
+
+BoolErr Dosage16ToDoublesMeanimpute(const uintptr_t* genoarr, const uintptr_t* dosage_present, const uint16_t* dosage_main, uint32_t sample_ct, uint32_t dosage_ct, double* geno_double) {
+  STD_ARRAY_DECL(uint32_t, 4, genocounts);
+  double geno_double_pair_buf[32];
+  if (!dosage_ct) {
+    GenoarrCountFreqsUnsafe(genoarr, sample_ct, genocounts);
+    const double* geno_double_pair_table = kGenoDoublePairs;
+    if (genocounts[3]) {
+      const uint32_t denom = sample_ct - genocounts[3];
+      if (!denom) {
+        return 1;
+      }
+      const uint32_t numer = genocounts[1] + 2 * genocounts[2];
+      const double missing_val = u63tod(numer) / u31tod(denom);
+      geno_double_pair_buf[0] = 0.0;
+      geno_double_pair_buf[2] = 1.0;
+      geno_double_pair_buf[4] = 2.0;
+      geno_double_pair_buf[6] = missing_val;
+      InitLookup16x8bx2(geno_double_pair_buf);
+      geno_double_pair_table = geno_double_pair_buf;
+    }
+    GenoarrLookup16x8bx2(genoarr, geno_double_pair_table, sample_ct, geno_double);
+    return 0;
+  }
+  // In the generic case, it may be faster to check for the existence of a
+  // missing value before calling GenoarrCountInvsubsetFreqs2() (since if there
+  // are no missing values, we don't need to count at all).  However, we assume
+  // the caller is using this function over Dosage16ToDoubles() for a reason.
+  GenoarrCountInvsubsetFreqs2(genoarr, dosage_present, sample_ct, sample_ct - dosage_ct, genocounts);
+  const double* geno_double_pair_table = kGenoDoublePairs;
+  if (genocounts[3]) {
+    uint64_t denom = sample_ct - genocounts[3];
+    if (!denom) {
+      return 1;
+    }
+    denom *= 16384LLU;
+    uint64_t numer = 0;
+    for (uint32_t dosage_idx = 0; dosage_idx != dosage_ct; ++dosage_idx) {
+      numer += dosage_main[dosage_idx];
+    }
+    numer += 16384LLU * (genocounts[1] + 2 * genocounts[2]);
+    const double missing_val = u63tod(numer) / u63tod(denom);
+    geno_double_pair_buf[0] = 0.0;
+    geno_double_pair_buf[2] = 1.0;
+    geno_double_pair_buf[4] = 2.0;
+    geno_double_pair_buf[6] = missing_val;
+    InitLookup16x8bx2(geno_double_pair_buf);
+    geno_double_pair_table = geno_double_pair_buf;
+  }
+  GenoarrLookup16x8bx2(genoarr, geno_double_pair_table, sample_ct, geno_double);
+  uintptr_t sample_uidx_base = 0;
+  uintptr_t cur_bits = dosage_present[0];
+  for (uint32_t dosage_idx = 0; dosage_idx != dosage_ct; ++dosage_idx) {
+    const uintptr_t sample_uidx = BitIter1(dosage_present, &sample_uidx_base, &cur_bits);
+    geno_double[sample_uidx] = S_CAST(double, dosage_main[dosage_idx]) * 0.00006103515625;
+  }
+  return 0;
+}
+
+double LinearCombinationMeanimpute(const double* weights, const uintptr_t* genoarr, const uintptr_t* dosage_present, const uint16_t* dosage_main, uint32_t sample_ct, uint32_t dosage_ct) {
+  const uint32_t word_ct = DivUp(sample_ct, kBitsPerWordD2);
+  double result = 0.0;
+  double result2 = 0.0;
+  double miss_weight = 0.0;
+  if (!dosage_ct) {
+    for (uint32_t widx = 0; widx != word_ct; ++widx) {
+      const uintptr_t geno_word = genoarr[widx];
+      if (!geno_word) {
+        continue;
+      }
+      const double* cur_weights = &(weights[widx * kBitsPerWordD2]);
+      uintptr_t geno_word1 = geno_word & kMask5555;
+      uintptr_t geno_word2 = (geno_word >> 1) & kMask5555;
+      uintptr_t geno_missing_word = geno_word1 & geno_word2;
+      geno_word1 ^= geno_missing_word;
+      while (geno_word1) {
+        const uint32_t sample_idx_lowbits = ctzw(geno_word1) / 2;
+        result += cur_weights[sample_idx_lowbits];
+        geno_word1 &= geno_word1 - 1;
+      }
+      geno_word2 ^= geno_missing_word;
+      while (geno_word2) {
+        const uint32_t sample_idx_lowbits = ctzw(geno_word2) / 2;
+        result2 += cur_weights[sample_idx_lowbits];
+        geno_word2 &= geno_word2 - 1;
+      }
+      while (geno_missing_word) {
+        const uint32_t sample_idx_lowbits = ctzw(geno_missing_word) / 2;
+        miss_weight += cur_weights[sample_idx_lowbits];
+        geno_missing_word &= geno_missing_word - 1;
+      }
+    }
+    result += 2 * result2;
+    if (miss_weight != 0.0) {
+      // bugfix (29 Oct 2019): previous mean-imputation formula was based on
+      // *weighted* MAF, which was obviously nonsense when negative weights
+      // were present.
+      STD_ARRAY_DECL(uint32_t, 4, genocounts);
+      GenoarrCountFreqsUnsafe(genoarr, sample_ct, genocounts);
+      const double numer = u63tod(genocounts[1] + 2 * genocounts[2]);
+      const double denom = u31tod(sample_ct - genocounts[3]);
+      result += miss_weight * (numer / denom);
+    }
+    return result;
+  }
+  const Halfword* dosage_present_hws = R_CAST(const Halfword*, dosage_present);
+  uint32_t onealt_ct = 0;
+  uint32_t twoalt_ct = 0;
+  uint32_t missing_ct = 0;
+  for (uint32_t widx = 0; widx != word_ct; ++widx) {
+    const uintptr_t geno_word = genoarr[widx];
+    if (geno_word) {
+      const double* cur_weights = &(weights[widx * kBitsPerWordD2]);
+      uintptr_t geno_word1 = geno_word & kMask5555;
+      uintptr_t geno_word2 = (geno_word >> 1) & kMask5555;
+      uintptr_t geno_missing_word = geno_word1 & geno_word2;
+      const uintptr_t mask_word = ~(geno_missing_word | UnpackHalfwordToWord(dosage_present_hws[widx]));
+      geno_word1 &= mask_word;
+      while (geno_word1) {
+        const uint32_t sample_idx_lowbits = ctzw(geno_word1) / 2;
+        result += cur_weights[sample_idx_lowbits];
+        // probably sparse enough that this is faster than popcount?
+        ++onealt_ct;
+        geno_word1 &= geno_word1 - 1;
+      }
+      geno_word2 &= mask_word;
+      while (geno_word2) {
+        const uint32_t sample_idx_lowbits = ctzw(geno_word2) / 2;
+        result2 += cur_weights[sample_idx_lowbits];
+        ++twoalt_ct;
+        geno_word2 &= geno_word2 - 1;
+      }
+      while (geno_missing_word) {
+        const uint32_t sample_idx_lowbits = ctzw(geno_missing_word) / 2;
+        miss_weight += cur_weights[sample_idx_lowbits];
+        ++missing_ct;
+        geno_missing_word &= geno_missing_word - 1;
+      }
+    }
+  }
+  result += result2 * 2;
+  const uint16_t* dosage_main_iter = dosage_main;
+  double resultx = 0.0;
+  uintptr_t sample_uidx_base = 0;
+  uintptr_t cur_bits = dosage_present[0];
+  if (miss_weight == 0.0) {
+    for (uint32_t dosage_idx = 0; dosage_idx != dosage_ct; ++dosage_idx) {
+      const uintptr_t sample_uidx = BitIter1(dosage_present, &sample_uidx_base, &cur_bits);
+      resultx += S_CAST(double, *dosage_main_iter++) * weights[sample_uidx];
+    }
+    result += 0.00006103515625 * resultx;
+    return result;
+  }
+  // Also need to track dosage-sum for mean-imputation.
+  uint64_t dosage_sum = 0;
+  for (uint32_t dosage_idx = 0; dosage_idx != dosage_ct; ++dosage_idx) {
+    const uintptr_t sample_uidx = BitIter1(dosage_present, &sample_uidx_base, &cur_bits);
+    const uint32_t cur_dosage = *dosage_main_iter++;
+    dosage_sum += cur_dosage;
+    resultx += u31tod(cur_dosage) * weights[sample_uidx];
+  }
+  result += 0.00006103515625 * resultx;
+  const double numer = u63tod(16384 * S_CAST(uint64_t, onealt_ct + 2 * twoalt_ct) + dosage_sum);
+  const double denom = 16384 * u31tod(sample_ct - missing_ct);
+  result += miss_weight * (numer / denom);
+  return result;
+}
+
+void BytesToBitsUnsafe(const uint8_t* boolbytes, uint32_t sample_ct, uintptr_t* bitarr) {
+  const uint32_t ull_ct_m1 = (sample_ct - 1) / 8;
+  const unsigned char* boolbytes_uc = DowncastKToUc(boolbytes);
+  unsigned char* write_alias = DowncastToUc(bitarr);
+  for (uint32_t ullidx = 0; ; ++ullidx) {
+    uint64_t cur_ull;
+    if (ullidx >= ull_ct_m1) {
+      if (ullidx > ull_ct_m1) {
+        return;
+      }
+      cur_ull = SubU64Load(&(boolbytes_uc[ullidx * sizeof(int64_t)]), ModNz(sample_ct, 8));
+    } else {
+      CopyFromUnalignedOffsetU64(&cur_ull, boolbytes_uc, ullidx);
+    }
+    // assuming boolbytes is 0/1-valued, this multiply-and-shift maps binary
+    //  h0000000g0000000f... to binary hgfedcba.
+    //  ^       ^       ^
+    //  |       |       |
+    // 56      48      40
+    // (the constant has bits 0, 7, 14, 21, 28, 35, 42, and 49 set)
+    // (can also use _pext_u64() in AVX2 case)
+    write_alias[ullidx] = S_CAST(unsigned char, (cur_ull * 0x2040810204081LLU) >> 49);
+  }
+}
+
+void BytesToGenoarrUnsafe(const int8_t* genobytes, uint32_t sample_ct, uintptr_t* genoarr) {
+  const uint32_t word_ct_m1 = (sample_ct - 1) / kBytesPerWord;
+  const unsigned char* genobytes_uc = DowncastKToUc(genobytes);
+  Quarterword* write_alias = R_CAST(Quarterword*, genoarr);
+  for (uint32_t widx = 0; ; ++widx) {
+    uintptr_t ww;
+    if (widx >= word_ct_m1) {
+      if (widx > word_ct_m1) {
+        return;
+      }
+      ww = SubwordLoad(&(genobytes_uc[widx * kBytesPerWord]), ModNz(sample_ct, kBytesPerWord));
+    } else {
+      CopyFromUnalignedOffsetW(&ww, genobytes_uc, widx);
+    }
+    write_alias[widx] = Pack0303Mask(ww);
+  }
+}
+
+void AlleleCodesToGenoarrUnsafe(const int32_t* allele_codes, const unsigned char* phasepresent_bytes, uint32_t sample_ct, uintptr_t* genoarr, uintptr_t* phasepresent, uintptr_t* phaseinfo) {
+  // - If phasepresent_bytes is nullptr, phasepresent is not updated.  In this
+  //   case, phaseinfo is updated iff it's not nullptr.  It's okay for both
+  //   phasepresent and phaseinfo to be nullptr here.
+  // - Otherwise, phasepresent and phaseinfo are always updated; neither can be
+  //   nullptr.
+  // - Trailing bits of phasepresent/phaseinfo may not be zeroed out.
+  const uint32_t word_ct_m1 = (sample_ct - 1) / kBitsPerWordD2;
+  uint32_t subgroup_len = kBitsPerWordD2;
+  const uint32_t* read_alias = R_CAST(const uint32_t*, allele_codes);
+  Halfword* phaseinfo_alias = R_CAST(Halfword*, phaseinfo);
+  if (!phasepresent_bytes) {
+    for (uint32_t widx = 0; ; ++widx) {
+      if (widx >= word_ct_m1) {
+        if (widx > word_ct_m1) {
+          return;
+        }
+        subgroup_len = ModNz(sample_ct, kBitsPerWordD2);
+      }
+      uintptr_t geno_write_word = 0;
+      if (!phaseinfo) {
+        for (uint32_t uii = 0; uii != subgroup_len; ++uii) {
+          // 0,0 -> 0
+          // 0,1 or 1,0 -> 1
+          // 1,1 -> 2
+          // -9,-9 -> 3
+          // undefined behavior on e.g. 0,2
+          const uint32_t first_code = *read_alias++;
+          const uint32_t second_code = *read_alias++;
+          uintptr_t cur_geno;
+          if (first_code <= 1) {
+            cur_geno = first_code + second_code;
+          } else {
+            // todo: test whether branchless is better
+            // (in practice, this will usually be predictable?)
+            cur_geno = 3;
+          }
+          geno_write_word |= (cur_geno << (uii * 2));
+        }
+      } else {
+        Halfword phaseinfo_write_hw = 0;
+        for (uint32_t uii = 0; uii != subgroup_len; ++uii) {
+          // set phaseinfo_write_hw bit iff 1,0
+          const uint32_t first_code = *read_alias++;
+          const uint32_t second_code = *read_alias++;
+          uintptr_t cur_geno;
+          if (first_code <= 1) {
+            cur_geno = first_code + second_code;
+            phaseinfo_write_hw |= (cur_geno & first_code) << uii;
+          } else {
+            // todo: test whether branchless is better
+            // (in practice, this will usually be predictable?)
+            cur_geno = 3;
+          }
+          geno_write_word |= (cur_geno << (uii * 2));
+        }
+        phaseinfo_alias[widx] = phaseinfo_write_hw;
+      }
+      genoarr[widx] = geno_write_word;
+    }
+  }
+  const unsigned char* phasepresent_bytes_iter = phasepresent_bytes;
+  Halfword* phasepresent_alias = R_CAST(Halfword*, phasepresent);
+  for (uint32_t widx = 0; ; ++widx) {
+    if (widx >= word_ct_m1) {
+      if (widx > word_ct_m1) {
+        return;
+      }
+      subgroup_len = ModNz(sample_ct, kBitsPerWordD2);
+    }
+    uintptr_t geno_write_word = 0;
+    Halfword phasepresent_write_hw = 0;
+    Halfword phaseinfo_write_hw = 0;
+    for (uint32_t uii = 0; uii != subgroup_len; ++uii) {
+      const uint32_t first_code = *read_alias++;
+      const uint32_t second_code = *read_alias++;
+      uintptr_t cur_geno;
+      if (first_code <= 1) {
+        cur_geno = first_code + second_code;
+        const uint32_t cur_phasepresent = cur_geno & phasepresent_bytes_iter[uii];
+        phasepresent_write_hw |= cur_phasepresent << uii;
+        phaseinfo_write_hw |= (cur_phasepresent & first_code) << uii;
+      } else {
+        cur_geno = 3;
+      }
+      geno_write_word |= (cur_geno << (uii * 2));
+    }
+    phasepresent_bytes_iter = &(phasepresent_bytes_iter[subgroup_len]);
+    phasepresent_alias[widx] = phasepresent_write_hw;
+    phaseinfo_alias[widx] = phaseinfo_write_hw;
+    genoarr[widx] = geno_write_word;
+  }
+}
+
+// Does not clear trailing bits of genovec, phasepresent, or phaseinfo.
+// Returns max(2, 1 + max allele code) if allele_codes is valid, -1 if invalid.
+int32_t ConvertMultiAlleleCodesUnsafe(const int32_t* allele_codes, const unsigned char* phasepresent_bytes, uint32_t sample_ct, uintptr_t* genoarr, uintptr_t* patch_01_set, AlleleCode* patch_01_vals, uintptr_t* patch_10_set, AlleleCode* patch_10_vals, uint32_t* patch_01_ctp, uint32_t* patch_10_ctp, uintptr_t* phasepresent, uintptr_t* phaseinfo) {
+  const uint32_t sample_ctl = DivUp(sample_ct, kBitsPerWord);
+  const uint32_t word_ct_m1 = (sample_ct - 1) / kBitsPerWordD2;
+  uint32_t subgroup_len = kBitsPerWordD2;
+  const uint32_t* read_alias = R_CAST(const uint32_t*, allele_codes);
+  if (phasepresent_bytes) {
+    BytesToBitsUnsafe(phasepresent_bytes, sample_ct, phasepresent);
+  }
+  Halfword* phasepresent_alias = R_CAST(Halfword*, phasepresent);
+  Halfword* phaseinfo_alias = R_CAST(Halfword*, phaseinfo);
+  // todo: try scanning allele_codes for its maximum value upfront, instead of
+  // checking in inner loops; then mirror PglMultiallelicDenseToSparse() in
+  // valid multiallelic case, and call AlleleCodesToGenoarrUnsafe() otherwise.
+  ZeroWArr(sample_ctl, patch_01_set);
+  ZeroWArr(sample_ctl, patch_10_set);
+  uint32_t max_allele_code = 1;
+  Halfword* patch_01_set_alias = R_CAST(Halfword*, patch_01_set);
+  Halfword* patch_10_set_alias = R_CAST(Halfword*, patch_10_set);
+  AlleleCode* patch_01_iter = patch_01_vals;
+  AlleleCode* patch_10_iter = patch_10_vals;
+  for (uint32_t widx = 0; ; ++widx) {
+    if (widx >= word_ct_m1) {
+      if (widx > word_ct_m1) {
+        if (max_allele_code >= kPglMaxAlleleCt) {
+          return -1;
+        }
+        *patch_01_ctp = patch_01_iter - patch_01_vals;
+        *patch_10_ctp = (patch_10_iter - patch_10_vals) >> 1;
+        return S_CAST(int32_t, max_allele_code + 1);
+      }
+      subgroup_len = ModNz(sample_ct, kBitsPerWordD2);
+    }
+    uintptr_t geno_write_word = 0;
+    Halfword phaseinfo_write_hw = 0;
+    Halfword het_2_hw = 0;
+    for (uint32_t uii = 0; uii != subgroup_len; ++uii) {
+      // 0,0 -> 0
+      // 0,x or x,0 -> 1
+      // x,y -> 2
+      // -9,-9 -> 3
+      const uint32_t first_code = *read_alias++;
+      const uint32_t second_code = *read_alias++;
+      uintptr_t cur_geno = 0;
+      if (first_code == 0) {
+        if (second_code != 0) {
+          cur_geno = 1;
+          if (second_code > 1) {
+            if (second_code > max_allele_code) {
+              max_allele_code = second_code;
+            }
+            patch_01_set_alias[widx] |= 1U << uii;
+            // If second_code is actually out-of-range, harmlessly truncate
+            // here, and error out before function return.
+            // (this code is correct without the static-cast, but may as well
+            // be explicit about where truncation could happen.)
+            *patch_01_iter++ = S_CAST(AlleleCode, second_code);
+          }
+        }
+      } else if (first_code == 0xfffffff7U) {
+        if (second_code != 0xfffffff7U) {
+          return -1;
+        }
+        cur_geno = 3;
+      } else {
+        // first_code >= 1
+        if (second_code == 0) {
+          cur_geno = 1;
+          phaseinfo_write_hw |= 1U << uii;
+          if (first_code > 1) {
+            if (first_code > max_allele_code) {
+              max_allele_code = first_code;
+            }
+            patch_01_set_alias[widx] |= 1U << uii;
+            *patch_01_iter++ = S_CAST(AlleleCode, first_code);
+          }
+        } else {
+          cur_geno = 2;
+          if (first_code <= second_code) {
+            if (second_code > 1) {
+              if (second_code > max_allele_code) {
+                max_allele_code = second_code;
+              }
+              patch_10_set_alias[widx] |= 1U << uii;
+              *patch_10_iter++ = S_CAST(AlleleCode, first_code);
+              *patch_10_iter++ = S_CAST(AlleleCode, second_code);
+              if (first_code != second_code) {
+                het_2_hw |= 1U << uii;
+              }
+            }
+          } else {
+            // first_code > second_code
+            if (first_code > max_allele_code) {
+              max_allele_code = first_code;
+            }
+            phaseinfo_write_hw |= 1U << uii;
+            patch_10_set_alias[widx] |= 1U << uii;
+            het_2_hw |= 1U << uii;
+            *patch_10_iter++ = S_CAST(AlleleCode, second_code);
+            *patch_10_iter++ = S_CAST(AlleleCode, first_code);
+          }
+        }
+      }
+      geno_write_word |= (cur_geno << (uii * 2));
+    }
+    genoarr[widx] = geno_write_word;
+    if (phasepresent_bytes) {
+      const uintptr_t het_1_word = geno_write_word & (~(geno_write_word >> 1)) & kMask5555;
+      Halfword het_hw = het_2_hw | PackWordToHalfword(het_1_word);
+      phasepresent_alias[widx] &= het_hw;
+    }
+    if (phaseinfo_alias) {
+      phaseinfo_alias[widx] = phaseinfo_write_hw;
+    }
+  }
+}
+
+static inline uint32_t BiallelicDosage16Halfdist(uint32_t dosage_int) {
+  const uint32_t dosage_int_rem = dosage_int & 16383;
+  return abs_i32(S_CAST(int32_t, dosage_int_rem) - 8192);
+}
+
+void FloatsToDosage16(const float* floatarr, uint32_t sample_ct, uint32_t hard_call_halfdist, uintptr_t* genoarr, uintptr_t* dosage_present, uint16_t* dosage_main, uint32_t* dosage_ct_ptr) {
+  const uint32_t word_ct_m1 = (sample_ct - 1) / kBitsPerWordD2;
+  const float* read_iter = floatarr;
+  Halfword* dosage_present_alias = R_CAST(Halfword*, dosage_present);
+  uint16_t* dosage_main_iter = dosage_main;
+  uint32_t subgroup_len = kBitsPerWordD2;
+  for (uint32_t widx = 0; ; ++widx) {
+    if (widx >= word_ct_m1) {
+      if (widx > word_ct_m1) {
+        if (widx % 2) {
+          dosage_present_alias[widx] = 0;
+        }
+        break;
+      }
+      subgroup_len = ModNz(sample_ct, kBitsPerWordD2);
+    }
+    uintptr_t geno_word = 0;
+    uint32_t dosage_present_hw = 0;
+    for (uint32_t sample_idx_lowbits = 0; sample_idx_lowbits != subgroup_len; ++sample_idx_lowbits) {
+      // 0..2 -> 0..32768
+      const float fxx = (*read_iter++) * 16384 + 0.5;
+      uintptr_t cur_geno = 3;
+      if ((fxx >= 0.0) && (fxx < 32769)) {
+        uint32_t dosage_int = S_CAST(int32_t, fxx);
+        const uint32_t cur_halfdist = BiallelicDosage16Halfdist(dosage_int);
+        if (cur_halfdist >= hard_call_halfdist) {
+          cur_geno = (dosage_int + (8192 * k1LU)) / 16384;
+        }
+        if (cur_halfdist != 8192) {
+          dosage_present_hw |= 1U << sample_idx_lowbits;
+          *dosage_main_iter++ = dosage_int;
+        }
+      }
+      geno_word |= cur_geno << (2 * sample_idx_lowbits);
+    }
+    genoarr[widx] = geno_word;
+    dosage_present_alias[widx] = dosage_present_hw;
+  }
+  *dosage_ct_ptr = dosage_main_iter - dosage_main;
+}
+
+void DoublesToDosage16(const double* doublearr, uint32_t sample_ct, uint32_t hard_call_halfdist, uintptr_t* genoarr, uintptr_t* dosage_present, uint16_t* dosage_main, uint32_t* dosage_ct_ptr) {
+  const uint32_t word_ct_m1 = (sample_ct - 1) / kBitsPerWordD2;
+  const double* read_iter = doublearr;
+  Halfword* dosage_present_alias = R_CAST(Halfword*, dosage_present);
+  uint16_t* dosage_main_iter = dosage_main;
+  uint32_t subgroup_len = kBitsPerWordD2;
+  for (uint32_t widx = 0; ; ++widx) {
+    if (widx >= word_ct_m1) {
+      if (widx > word_ct_m1) {
+        if (widx % 2) {
+          dosage_present_alias[widx] = 0;
+        }
+        break;
+      }
+      subgroup_len = ModNz(sample_ct, kBitsPerWordD2);
+    }
+    uintptr_t geno_word = 0;
+    uint32_t dosage_present_hw = 0;
+    for (uint32_t sample_idx_lowbits = 0; sample_idx_lowbits != subgroup_len; ++sample_idx_lowbits) {
+      // 0..2 -> 0..32768
+      const double dxx = (*read_iter++) * 16384 + 0.5;
+      uintptr_t cur_geno = 3;
+      if ((dxx >= 0.0) && (dxx < 32769)) {
+        uint32_t dosage_int = S_CAST(int32_t, dxx);
+        const uint32_t cur_halfdist = BiallelicDosage16Halfdist(dosage_int);
+        if (cur_halfdist >= hard_call_halfdist) {
+          cur_geno = (dosage_int + (8192 * k1LU)) / 16384;
+        }
+        if (cur_halfdist != 8192) {
+          dosage_present_hw |= 1U << sample_idx_lowbits;
+          *dosage_main_iter++ = dosage_int;
+        }
+      }
+      geno_word |= cur_geno << (2 * sample_idx_lowbits);
+    }
+    genoarr[widx] = geno_word;
+    dosage_present_alias[widx] = dosage_present_hw;
+  }
+  *dosage_ct_ptr = dosage_main_iter - dosage_main;
+}
+
+#ifdef __cplusplus
+}  // namespace plink2
+#endif
diff --git a/external_libs/pgenlib/pgenlib_ffi_support.h b/external_libs/pgenlib/pgenlib_ffi_support.h
new file mode 100644
index 0000000..629936f
--- /dev/null
+++ b/external_libs/pgenlib/pgenlib_ffi_support.h
@@ -0,0 +1,115 @@
+#ifndef __PGENLIB_FFI_SUPPORT_H__
+#define __PGENLIB_FFI_SUPPORT_H__
+
+// This library is part of PLINK 2.0, copyright (C) 2005-2024 Shaun Purcell,
+// Christopher Chang.
+//
+// This library is free software: you can redistribute it and/or modify it
+// under the terms of the GNU Lesser General Public License as published by the
+// Free Software Foundation; either version 3 of the License, or (at your
+// option) any later version.
+//
+// This library is distributed in the hope that it will be useful, but WITHOUT
+// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public License
+// for more details.
+//
+// You should have received a copy of the GNU Lesser General Public License
+// along with this library.  If not, see <http://www.gnu.org/licenses/>.
+
+#include "include/pgenlib_misc.h"
+
+#ifdef __cplusplus
+namespace plink2 {
+#endif
+
+// Could define a slightly-more-efficient version of this function which uses a
+// missing code of 3 instead of -9.  But let's play well with existing scripts
+// first.
+void GenoarrToBytesMinus9(const uintptr_t* genoarr, uint32_t sample_ct, int8_t* genobytes);
+
+void GenoarrToInt32sMinus9(const uintptr_t* genoarr, uint32_t sample_ct, int32_t* geno_int32);
+
+void GenoarrToInt64sMinus9(const uintptr_t* genoarr, uint32_t sample_ct, int64_t* geno_int64);
+
+// May want to use STD_ARRAY_INIT_{START,END}... though it may not be worth the
+// additional compilation headaches here.
+extern const double kGenoDoublePairs[32];
+
+HEADER_INLINE void GenoarrToDoublesMinus9(const uintptr_t* genoarr, uint32_t sample_ct, double* geno_double) {
+  GenoarrLookup16x8bx2(genoarr, kGenoDoublePairs, sample_ct, geno_double);
+}
+
+HEADER_INLINE void GenoarrToAlleleCodes(const uint64_t* geno_to_intcode_pair_table, const uintptr_t* genoarr, uint32_t sample_ct, int32_t* allele_codes) {
+  GenoarrLookup16x8bx2(genoarr, geno_to_intcode_pair_table, sample_ct, allele_codes);
+}
+
+extern const uint64_t kGenoToIntcodeDPairs[32];
+
+// For FFI, allele_codes is always int32_t.  Python/R programmers should not
+// need to worry about whether pgenlib was compiled with 1-, 2-, or 4-byte
+// AlleleCode.
+//
+// phasebytes can be nullptr; if it isn't, entry is 1 iff genotype is an
+// explicitly phased het, OR genotype is homozygous
+// phasepresent cannot be nullptr
+void GenoarrPhasedToAlleleCodes(const uint64_t* geno_to_intcode_dpair_table, const uintptr_t* genoarr, const uintptr_t* phasepresent, const uintptr_t* phaseinfo, uint32_t sample_ct, uint32_t phasepresent_ct, unsigned char* phasebytes, int32_t* allele_codes);
+
+HEADER_INLINE void GenoarrPhasedToAlleleCodesMinus9(const uintptr_t* genoarr, const uintptr_t* phasepresent, const uintptr_t* phaseinfo, uint32_t sample_ct, uint32_t phasepresent_ct, unsigned char* phasebytes, int32_t* allele_codes) {
+  GenoarrPhasedToAlleleCodes(kGenoToIntcodeDPairs, genoarr, phasepresent, phaseinfo, sample_ct, phasepresent_ct, phasebytes, allele_codes);
+}
+
+void GenoarrMPToAlleleCodes(const uint64_t* geno_to_intcode_dpair_table, const PgenVariant* pgv, uint32_t sample_ct, unsigned char* phasebytes, int32_t* allele_codes);
+
+HEADER_INLINE void GenoarrMPToAlleleCodesMinus9(const PgenVariant* pgv, uint32_t sample_ct, unsigned char* phasebytes, int32_t* allele_codes) {
+  GenoarrMPToAlleleCodes(kGenoToIntcodeDPairs, pgv, sample_ct, phasebytes, allele_codes);
+}
+
+// assumes transposed genoarr, phaseinfo
+void GenoarrPhasedToHapCodes(const uintptr_t* genoarr, const uintptr_t* phaseinfo, uint32_t variant_batch_size, int32_t* hap0_codes_iter, int32_t* hap1_codes_iter);
+
+void Dosage16ToFloatsMinus9(const uintptr_t* genoarr, const uintptr_t* dosage_present, const uint16_t* dosage_main, uint32_t sample_ct, uint32_t dosage_ct, float* geno_float);
+
+void Dosage16ToDoubles(const double* geno_double_pair_table, const uintptr_t* genoarr, const uintptr_t* dosage_present, const uint16_t* dosage_main, uint32_t sample_ct, uint32_t dosage_ct, double* geno_double);
+
+// If all samples are missing, this errors out.
+BoolErr Dosage16ToDoublesMeanimpute(const uintptr_t* genoarr, const uintptr_t* dosage_present, const uint16_t* dosage_main, uint32_t sample_ct, uint32_t dosage_ct, double* geno_double);
+
+// Currently requires trailing bits of genoarr to be zeroed out.
+double LinearCombinationMeanimpute(const double* weights, const uintptr_t* genoarr, const uintptr_t* dosage_present, const uint16_t* dosage_main, uint32_t sample_ct, uint32_t dosage_ct);
+
+HEADER_INLINE void Dosage16ToDoublesMinus9(const uintptr_t* genoarr, const uintptr_t* dosage_present, const uint16_t* dosage_main, uint32_t sample_ct, uint32_t dosage_ct, double* geno_double) {
+  Dosage16ToDoubles(kGenoDoublePairs, genoarr, dosage_present, dosage_main, sample_ct, dosage_ct, geno_double);
+}
+
+// Does not zero out trailing bits of bitarr.
+void BytesToBitsUnsafe(const uint8_t* boolbytes, uint32_t sample_ct, uintptr_t* bitarr);
+
+// Bottom 2 bits are extracted from every byte.  Conveniently, -9 and 3 are
+// treated identically.
+// Does not zero out trailing bits of genoarr.
+void BytesToGenoarrUnsafe(const int8_t* genobytes, uint32_t sample_ct, uintptr_t* genoarr);
+
+// - Assumes biallelic variant, does not validate that.
+// - Low bit of each element of phasepresent_bytes is significant.
+// - If phasepresent_bytes is nullptr, phasepresent is not updated.  In this
+//   case, phaseinfo is updated iff it's not nullptr.  It's okay for both
+//   phasepresent and phaseinfo to be nullptr here.
+// - Otherwise, phasepresent and phaseinfo are always updated; neither can be
+//   nullptr.
+// - Trailing bits of phasepresent/phaseinfo may not be zeroed out.
+void AlleleCodesToGenoarrUnsafe(const int32_t* allele_codes, const unsigned char* phasepresent_bytes, uint32_t sample_ct, uintptr_t* genoarr, uintptr_t* phasepresent, uintptr_t* phaseinfo);
+
+// Does not clear trailing bits of genovec, phasepresent, or phaseinfo.
+// Returns min(2, 1 + max allele code) if allele_codes is valid, -1 if invalid.
+int32_t ConvertMultiAlleleCodesUnsafe(const int32_t* allele_codes, const unsigned char* phasepresent_bytes, uint32_t sample_ct, uintptr_t* genoarr, uintptr_t* patch_01_set, AlleleCode* patch_01_vals, uintptr_t* patch_10_set, AlleleCode* patch_10_vals, uint32_t* patch_01_ctp, uint32_t* patch_10_ctp, uintptr_t* phasepresent, uintptr_t* phaseinfo);
+
+void FloatsToDosage16(const float* floatarr, uint32_t sample_ct, uint32_t hard_call_halfdist, uintptr_t* genoarr, uintptr_t* dosage_present, uint16_t* dosage_main, uint32_t* dosage_ct_ptr);
+
+void DoublesToDosage16(const double* doublearr, uint32_t sample_ct, uint32_t hard_call_halfdist, uintptr_t* genoarr, uintptr_t* dosage_present, uint16_t* dosage_main, uint32_t* dosage_ct_ptr);
+
+#ifdef __cplusplus
+}  // namespace plink2
+#endif
+
+#endif  // __PGENLIB_FFI_SUPPORT_H__
diff --git a/external_libs/pgenlib/pgenlib_ffi_support.o b/external_libs/pgenlib/pgenlib_ffi_support.o
new file mode 100644
index 0000000..e74cdad
Binary files /dev/null and b/external_libs/pgenlib/pgenlib_ffi_support.o differ
diff --git a/external_libs/pgenlib/pgenlibr.cpp b/external_libs/pgenlib/pgenlibr.cpp
new file mode 100644
index 0000000..8390e13
--- /dev/null
+++ b/external_libs/pgenlib/pgenlibr.cpp
@@ -0,0 +1,421 @@
+/*
+ *
+ * File obtained from pgenlibr R library:
+ * https://github.com/chrchang/plink-ng/tree/master/2.0/pgenlibr
+ *
+ * License info obtained from DESCRIPTION file:
+ * https://github.com/chrchang/plink-ng/blob/master/2.0/pgenlibr/DESCRIPTION
+ * -----------------------------------------------------
+    Package: pgenlibr
+    Type: Package
+    Title: PLINK 2 Binary (.pgen) Reader
+    Version: 0.2
+    Date: 2019-07-10
+    Author: Christopher Chang
+    Maintainer: Christopher Chang <chrchang@alumni.caltech.edu>
+    Description: A thin wrapper over PLINK 2's core libraries which provides an R
+    interface for reading .pgen files.  A minimal .pvar loader is also included.
+    License: LGPL (>= 3)
+    Imports: Rcpp (>= 1.0.1)
+    LinkingTo: Rcpp
+ * -----------------------------------------------------
+
+ *  Modified by Joelle Mbatchou - June 29 2020
+ *  - removed functions that were for R
+ *  - split file to header (added link to several standard C++ libraries)
+ *  - modified remaining functions to be fully C/C++ compatible 
+ *  - multithreaded reading of pgen file (04/13/2021)
+ *
+ * This file remains under LGPL v3 license (license is in same directory as this file)
+ */
+
+#include "pgenlibr.h"
+
+PgenReader::PgenReader() : _info_ptr(nullptr),
+                             //_allele_idx_offsetsp(nullptr),
+                             _nonref_flagsp(nullptr)
+                             //_state_ptr(nullptr) 
+                             {
+}
+
+PgenReader::~PgenReader() {
+  Close();
+}
+
+void PgenReader::Load(std::string filename, uint32_t cur_sample_ct, std::vector<int> sample_subset_1based, int nthr) {
+  if (_info_ptr) {
+    Close();
+  }
+  _info_ptr = static_cast<plink2::PgenFileInfo*>(malloc(sizeof(plink2::PgenFileInfo)));
+  if (!_info_ptr) {
+    fprintf(stderr,"Out of memory");
+    exit(-1);
+  }
+  plink2::PreinitPgfi(_info_ptr);
+  uint32_t cur_variant_ct = UINT32_MAX;
+  const char* fname = filename.c_str();
+  plink2::PgenHeaderCtrl header_ctrl;
+  uintptr_t pgfi_alloc_cacheline_ct;
+  char errstr_buf[plink2::kPglErrstrBufBlen];
+  if (PgfiInitPhase1(fname, nullptr, cur_variant_ct, cur_sample_ct, &header_ctrl, _info_ptr, &pgfi_alloc_cacheline_ct, errstr_buf) != plink2::kPglRetSuccess) {
+    fprintf(stderr, "%s\n", &(errstr_buf[7]));
+    exit(-1);
+  }
+  const uint32_t raw_variant_ct = _info_ptr->raw_variant_ct;
+  if (header_ctrl & 0x30) {
+    fprintf(stderr,"Storing of allele count information is not supported (only bi-allelic variants should be present).");
+    exit(-1);
+    // no need to zero-initialize this
+    //_allele_idx_offsetsp = plink2::CreateRefcountedWptr(raw_variant_ct + 1);
+    //_info_ptr->allele_idx_offsets = _allele_idx_offsetsp->p;
+    // _info_ptr->max_allele_ct updated by PgfiInitPhase2() in this case
+  }
+  _info_ptr->max_allele_ct = 2;
+  if ((header_ctrl & 0xc0) == 0xc0) {
+    // todo: load this in pvar, to enable consistency check.  we use a
+    // (manually implemented) shared_ptr in preparation for this.
+    const uintptr_t raw_variant_ctl = plink2::DivUp(raw_variant_ct, plink2::kBitsPerWord);
+    // no need to zero-initialize this
+    _nonref_flagsp = plink2::CreateRefcountedWptr(raw_variant_ctl + 1);
+    _info_ptr->nonref_flags = _nonref_flagsp->p;
+  }
+  const uint32_t file_sample_ct = _info_ptr->raw_sample_ct;
+  unsigned char* pgfi_alloc = nullptr;
+  if (plink2::cachealigned_malloc(pgfi_alloc_cacheline_ct * plink2::kCacheline, &pgfi_alloc)) {
+    fprintf(stderr,"Out of memory");
+    exit(-1);
+  }
+  uint32_t max_vrec_width;
+  uintptr_t pgr_alloc_cacheline_ct;
+  if (PgfiInitPhase2(header_ctrl, 1, 0, 0, 0, raw_variant_ct, &max_vrec_width, _info_ptr, pgfi_alloc, &pgr_alloc_cacheline_ct, errstr_buf)) {
+    if (pgfi_alloc && (!_info_ptr->vrtypes)) {
+      plink2::aligned_free(pgfi_alloc);
+    }
+    fprintf(stderr,"%s\n", &(errstr_buf[7]));
+    exit(-1);
+  }
+  if ((!_allele_idx_offsetsp) && (_info_ptr->gflags & 4)) {
+    // Note that it's safe to be ignorant of multiallelic variants when
+    // phase and dosage info aren't present; GetAlleleCt() then always returns
+    // 2 when that isn't actually true, and all ALTs are treated as if they
+    // were ALT1, but otherwise everything works properly.
+    fprintf(stderr,"Multiallelic variants and phase/dosage info simultaneously present; pvar required in this case");
+    exit(-1);
+  }
+
+  _state_ptr.resize(nthr);
+  _subset_index.resize(nthr);
+  _pgv.resize(nthr);
+  _subset_include_interleaved_vec.resize(nthr);
+  _subset_cumulative_popcounts.resize(nthr);
+  _subset_size.resize(nthr);
+  _subset_include_vec.resize(nthr);
+
+  for(int i = 0; i < nthr; i++) {
+    _state_ptr[i] = static_cast<plink2::PgenReader*>(malloc(sizeof(plink2::PgenReader)));
+    if (!_state_ptr[i]) {
+      fprintf(stderr,"Out of memory");
+      exit(-1);
+    }
+    plink2::PreinitPgr(_state_ptr[i]);
+    plink2::PgrSetFreadBuf(nullptr, _state_ptr[i]);
+  }
+
+  const uintptr_t pgr_alloc_main_byte_ct = pgr_alloc_cacheline_ct * plink2::kCacheline;
+  const uintptr_t sample_subset_byte_ct = plink2::DivUp(file_sample_ct, plink2::kBitsPerVec) * plink2::kBytesPerVec;
+  const uintptr_t cumulative_popcounts_byte_ct = plink2::DivUp(file_sample_ct, plink2::kBitsPerWord * plink2::kInt32PerVec) * plink2::kBytesPerVec;
+  const uintptr_t genovec_byte_ct = plink2::DivUp(file_sample_ct, plink2::kNypsPerVec) * plink2::kBytesPerVec;
+  //const uintptr_t ac_byte_ct = plink2::RoundUpPow2(file_sample_ct * sizeof(plink2::AlleleCode), plink2::kBytesPerVec);
+  //const uintptr_t ac2_byte_ct = plink2::RoundUpPow2(file_sample_ct * 2 * sizeof(plink2::AlleleCode), plink2::kBytesPerVec);
+  uintptr_t multiallelic_hc_byte_ct = 0;
+  if (_info_ptr->max_allele_ct != 2) {
+    fprintf(stderr,"no multiallelic vaariants allowed");
+    exit(-1);
+    //multiallelic_hc_byte_ct = 2 * sample_subset_byte_ct + ac_byte_ct + ac2_byte_ct;
+  }
+  const uintptr_t dosage_main_byte_ct = plink2::DivUp(file_sample_ct, (2 * plink2::kInt32PerVec)) * plink2::kBytesPerVec;
+
+
+  for(int i = 0; i < nthr; i++) {
+    unsigned char* pgr_alloc;
+    if (plink2::cachealigned_malloc(pgr_alloc_main_byte_ct + (2 * plink2::kPglNypTransposeBatch + 5) * sample_subset_byte_ct + cumulative_popcounts_byte_ct + (1 + plink2::kPglNypTransposeBatch) * genovec_byte_ct + multiallelic_hc_byte_ct + dosage_main_byte_ct + plink2::kPglBitTransposeBufbytes + 4 * (plink2::kPglNypTransposeBatch * plink2::kPglNypTransposeBatch / 8), &pgr_alloc)) {
+      fprintf(stderr,"Out of memory");
+      exit(-1);
+    }
+    plink2::PglErr reterr = PgrInit(fname, max_vrec_width, _info_ptr, _state_ptr[i], pgr_alloc);
+    if (reterr != plink2::kPglRetSuccess) {
+      if (!plink2::PgrGetFreadBuf(_state_ptr[i])) {
+        plink2::aligned_free(pgr_alloc);
+      }
+      sprintf(errstr_buf, "PgrInit() error %d", static_cast<int>(reterr));
+      fprintf(stderr,"%s\n", errstr_buf);
+      exit(-1);
+    }
+    unsigned char* pgr_alloc_iter = &(pgr_alloc[pgr_alloc_main_byte_ct]);
+    _subset_include_vec[i] = reinterpret_cast<uintptr_t*>(pgr_alloc_iter);
+    pgr_alloc_iter = &(pgr_alloc_iter[sample_subset_byte_ct]);
+    _subset_include_interleaved_vec[i] = reinterpret_cast<uintptr_t*>(pgr_alloc_iter);
+    pgr_alloc_iter = &(pgr_alloc_iter[sample_subset_byte_ct]);
+
+#ifdef USE_AVX2
+    _subset_include_interleaved_vec[i][-3] = 0;
+    _subset_include_interleaved_vec[i][-2] = 0;
+#endif
+    _subset_include_interleaved_vec[i][-1] = 0;
+
+    _subset_cumulative_popcounts[i] = reinterpret_cast<uint32_t*>(pgr_alloc_iter);
+
+    pgr_alloc_iter = &(pgr_alloc_iter[cumulative_popcounts_byte_ct]);
+
+    _pgv[i] = std::make_shared<plink2::PgenVariant>();
+    _pgv[i]->genovec = reinterpret_cast<uintptr_t*>(pgr_alloc_iter);
+    pgr_alloc_iter = &(pgr_alloc_iter[genovec_byte_ct]);
+    /*
+       if (multiallelic_hc_byte_ct) {
+       _pgv.patch_01_set = reinterpret_cast<uintptr_t*>(pgr_alloc_iter);
+       pgr_alloc_iter = &(pgr_alloc_iter[sample_subset_byte_ct]);
+       _pgv.patch_01_vals = reinterpret_cast<plink2::AlleleCode*>(pgr_alloc_iter);
+       pgr_alloc_iter = &(pgr_alloc_iter[ac_byte_ct]);
+       _pgv.patch_10_set = reinterpret_cast<uintptr_t*>(pgr_alloc_iter);
+       pgr_alloc_iter = &(pgr_alloc_iter[sample_subset_byte_ct]);
+       _pgv.patch_10_vals = reinterpret_cast<plink2::AlleleCode*>(pgr_alloc_iter);
+       pgr_alloc_iter = &(pgr_alloc_iter[ac2_byte_ct]);
+       } else {
+       */
+    _pgv[i]->patch_01_set = nullptr;
+    _pgv[i]->patch_01_vals = nullptr;
+    _pgv[i]->patch_10_set = nullptr;
+    _pgv[i]->patch_10_vals = nullptr;
+
+    _pgv[i]->phasepresent = reinterpret_cast<uintptr_t*>(pgr_alloc_iter);
+
+    // }
+    pgr_alloc_iter = &(pgr_alloc_iter[sample_subset_byte_ct]);
+    _pgv[i]->phaseinfo = reinterpret_cast<uintptr_t*>(pgr_alloc_iter);
+    pgr_alloc_iter = &(pgr_alloc_iter[sample_subset_byte_ct]);
+    _pgv[i]->dosage_present = reinterpret_cast<uintptr_t*>(pgr_alloc_iter);
+    pgr_alloc_iter = &(pgr_alloc_iter[sample_subset_byte_ct]);
+    _pgv[i]->dosage_main = reinterpret_cast<uint16_t*>(pgr_alloc_iter);
+    pgr_alloc_iter = &(pgr_alloc_iter[dosage_main_byte_ct]);
+
+
+    if (sample_subset_1based.size() > 0) {
+      SetSampleSubsetInternal(sample_subset_1based, i);
+    } else {
+      _subset_size[i] = file_sample_ct;
+    }
+  }
+
+  /*
+  pgr_alloc_iter = &(pgr_alloc_iter[plink2::kPglBitTransposeBufbytes]);
+  _multivar_vmaj_geno_buf = reinterpret_cast<uintptr_t*>(pgr_alloc_iter);
+  pgr_alloc_iter = &(pgr_alloc_iter[plink2::kPglNypTransposeBatch * genovec_byte_ct]);
+  _multivar_vmaj_phasepresent_buf = reinterpret_cast<uintptr_t*>(pgr_alloc_iter);
+  pgr_alloc_iter = &(pgr_alloc_iter[plink2::kPglNypTransposeBatch * sample_subset_byte_ct]);
+  _multivar_vmaj_phaseinfo_buf = reinterpret_cast<uintptr_t*>(pgr_alloc_iter);
+  pgr_alloc_iter = &(pgr_alloc_iter[plink2::kPglNypTransposeBatch * sample_subset_byte_ct]);
+  _multivar_smaj_geno_batch_buf = reinterpret_cast<uintptr_t*>(pgr_alloc_iter);
+  pgr_alloc_iter = &(pgr_alloc_iter[plink2::kPglNypTransposeBatch * plink2::kPglNypTransposeBatch / 4]);
+  _multivar_smaj_phaseinfo_batch_buf = reinterpret_cast<uintptr_t*>(pgr_alloc_iter);
+  pgr_alloc_iter = &(pgr_alloc_iter[plink2::kPglNypTransposeBatch * plink2::kPglNypTransposeBatch / 8]);
+  _multivar_smaj_phasepresent_batch_buf = reinterpret_cast<uintptr_t*>(pgr_alloc_iter);
+   pgr_alloc_iter = &(pgr_alloc_iter[plink2::kPglNypTransposeBatch * plink2::kPglNypTransposeBatch / 8]);
+   */
+
+}
+
+uint32_t PgenReader::GetRawSampleCt() const {
+  if (!_info_ptr) {
+    fprintf(stderr,"pgen is closed");
+    exit(-1);
+  }
+  return _info_ptr->raw_sample_ct;
+}
+
+uint32_t PgenReader::GetSubsetSize() const {
+  return _subset_size[0];
+}
+
+uint32_t PgenReader::GetVariantCt() const {
+  if (!_info_ptr) {
+    fprintf(stderr,"pgen is closed");
+    exit(-1);
+  }
+  return _info_ptr->raw_variant_ct;
+}
+
+uint32_t PgenReader::GetAlleleCt(uint32_t variant_idx) const {
+  if (!_info_ptr) {
+    fprintf(stderr,"pgen is closed");
+    exit(-1);
+  }
+  if (variant_idx >= _info_ptr->raw_variant_ct) {
+    char errstr_buf[256];
+    sprintf(errstr_buf, "variant_num out of range (%d; must be 1..%u)", variant_idx + 1, _info_ptr->raw_variant_ct);
+    fprintf(stderr,"%s\n", errstr_buf);
+    exit(-1);
+  }
+  if (!_allele_idx_offsetsp) {
+    return 2;
+  }
+  fprintf(stderr,"Error: only bi-allelic variants are supported");
+    exit(-1);
+  //const uintptr_t* allele_idx_offsets = _allele_idx_offsetsp->p;
+  //return allele_idx_offsets[variant_idx + 1] - allele_idx_offsets[variant_idx];
+}
+
+uint32_t PgenReader::GetMaxAlleleCt() const {
+  if (!_info_ptr) {
+    fprintf(stderr,"pgen is closed");
+    exit(-1);
+  }
+  return _info_ptr->max_allele_ct;
+}
+
+bool PgenReader::HardcallPhasePresent() const {
+  if (!_info_ptr) {
+    fprintf(stderr,"pgen is closed");
+    exit(-1);
+  }
+  return ((_info_ptr->gflags & plink2::kfPgenGlobalHardcallPhasePresent) != 0);
+}
+
+// added by J.Mbatchou (09/22/20) to check if dosages are present in PGEN file
+bool PgenReader::DosagePresent() const {
+  if (!_info_ptr) {
+    fprintf(stderr,"pgen is closed");
+    exit(-1);
+  }
+  return ((_info_ptr->gflags & plink2::kfPgenGlobalDosagePresent) != 0);
+}
+
+//static const int32_t kGenoRInt32Quads[1024] ALIGNV16 = QUAD_TABLE256(0, 1, 2, -3);
+
+static const double kGenoRDoublePairs[32] ALIGNV16 = PAIR_TABLE16(0.0, 1.0, 2.0, -3.0);
+
+void PgenReader::ReadHardcalls(double* buf, size_t const& n, int const& thr, int variant_idx, int allele_idx) {
+  if (!_info_ptr) {
+    fprintf(stderr,"pgen is closed");
+    exit(-1);
+  }
+  if (static_cast<uint32_t>(variant_idx) >= _info_ptr->raw_variant_ct) {
+    char errstr_buf[256];
+    sprintf(errstr_buf, "variant_num out of range (%d; must be 1..%u)", variant_idx + 1, _info_ptr->raw_variant_ct);
+    fprintf(stderr,"%s\n", errstr_buf);
+    exit(-1);
+  }
+  if (n != _subset_size[thr]) {
+    char errstr_buf[256];
+    sprintf(errstr_buf, "buf has wrong length (%" PRIdPTR "; %u expected)", n, _subset_size[thr]);
+    fprintf(stderr,"%s\n", errstr_buf);
+    exit(-1);
+  }
+  plink2::PglErr reterr = PgrGet1(_subset_include_vec[thr], _subset_index[thr], _subset_size[thr], variant_idx, allele_idx, _state_ptr[thr], _pgv[thr]->genovec);
+  if (reterr != plink2::kPglRetSuccess) {
+    char errstr_buf[256];
+    sprintf(errstr_buf, "PgrGet1() error %d", static_cast<int>(reterr));
+    fprintf(stderr,"%s\n", errstr_buf);
+    exit(-1);
+  }
+  plink2::GenoarrLookup16x8bx2(_pgv[thr]->genovec, kGenoRDoublePairs, _subset_size[thr], buf);
+}
+
+void PgenReader::Read(double* buf, size_t const& n, int const& thr, int variant_idx, int allele_idx) {
+  if (!_info_ptr) {
+    fprintf(stderr,"pgen is closed");
+    exit(-1);
+  }
+  if (static_cast<uint32_t>(variant_idx) >= _info_ptr->raw_variant_ct) {
+    char errstr_buf[256];
+    sprintf(errstr_buf, "variant_num out of range (%d; must be 1..%u)", variant_idx + 1, _info_ptr->raw_variant_ct);
+    fprintf(stderr,"%s\n", errstr_buf);
+    exit(-1);
+  }
+  if (n != _subset_size[thr]) {
+    char errstr_buf[256];
+    sprintf(errstr_buf, "buf has wrong length (%" PRIdPTR "; %u expected)", n, _subset_size[thr]);
+    fprintf(stderr,"%s\n", errstr_buf);
+    exit(-1);
+  }
+  uint32_t dosage_ct;
+  plink2::PglErr reterr = PgrGet1D(_subset_include_vec[thr], _subset_index[thr], _subset_size[thr], variant_idx, allele_idx, _state_ptr[thr], _pgv[thr]->genovec, _pgv[thr]->dosage_present, _pgv[thr]->dosage_main, &dosage_ct);
+  if (reterr != plink2::kPglRetSuccess) {
+    char errstr_buf[256];
+    sprintf(errstr_buf, "PgrGet1D() error %d", static_cast<int>(reterr));
+    fprintf(stderr,"%s\n", errstr_buf);
+    exit(-1);
+  }
+  plink2::Dosage16ToDoubles(kGenoRDoublePairs, _pgv[thr]->genovec, _pgv[thr]->dosage_present, _pgv[thr]->dosage_main, _subset_size[thr], dosage_ct, buf);
+}
+
+void PgenReader::Close() {
+  // don't bother propagating file close errors for now
+  if (_info_ptr) {
+    //CondReleaseRefcountedWptr(&_allele_idx_offsetsp);
+    CondReleaseRefcountedWptr(&_nonref_flagsp);
+    if (_info_ptr->vrtypes) {
+      plink2::aligned_free(_info_ptr->vrtypes);
+    }
+    plink2::PglErr reterr = plink2::kPglRetSuccess;
+    plink2::CleanupPgfi(_info_ptr, &reterr);
+    free(_info_ptr);
+    _info_ptr = nullptr;
+  }
+
+  for(size_t i = 0; i < _state_ptr.size(); i++) {
+    if (_state_ptr[i]) {
+      plink2::PglErr reterr = plink2::kPglRetSuccess;
+      plink2::CleanupPgr(_state_ptr[i], &reterr);
+      if (PgrGetFreadBuf(_state_ptr[i])) {
+        plink2::aligned_free(PgrGetFreadBuf(_state_ptr[i]));
+      }
+      free(_state_ptr[i]);
+      _state_ptr[i] = nullptr;
+    }
+    _subset_size[i] = 0;
+  }
+}
+
+void PgenReader::SetSampleSubsetInternal(std::vector<int>& sample_subset_1based, int const& thr) {
+  const uint32_t raw_sample_ct = _info_ptr->raw_sample_ct;
+  const uint32_t raw_sample_ctv = plink2::DivUp(raw_sample_ct, plink2::kBitsPerVec);
+  const uint32_t raw_sample_ctaw = raw_sample_ctv * plink2::kWordsPerVec;
+  uintptr_t* sample_include = _subset_include_vec[thr];
+  plink2::ZeroWArr(raw_sample_ctaw, sample_include);
+  const uint32_t subset_size = sample_subset_1based.size();
+  if (subset_size == 0) {
+    fprintf(stderr,"Empty sample_subset is not currently permitted");
+    exit(-1);
+  }
+  uint32_t sample_uidx = sample_subset_1based[0] - 1;
+  uint32_t idx = 0;
+  uint32_t next_uidx;
+  while (1) {
+    if (sample_uidx >= raw_sample_ct) {
+      char errstr_buf[256];
+      sprintf(errstr_buf, "sample number out of range (%d; must be 1..%u)", static_cast<int>(sample_uidx + 1), raw_sample_ct);
+      fprintf(stderr,"%s\n", errstr_buf);
+      exit(-1);
+    }
+    plink2::SetBit(sample_uidx, sample_include);
+    if (++idx == subset_size) {
+      break;
+    }
+    next_uidx = sample_subset_1based[idx] - 1;
+
+    // prohibit this since it implies that the caller expects genotypes to be
+    // returned in a different order
+    if (next_uidx <= sample_uidx) {
+      fprintf(stderr,"sample_subset is not in strictly increasing order");
+    exit(-1);
+    }
+    sample_uidx = next_uidx;
+  }
+
+  plink2::FillInterleavedMaskVec(sample_include, raw_sample_ctv, _subset_include_interleaved_vec[thr]);
+  const uint32_t raw_sample_ctl = plink2::DivUp(raw_sample_ct, plink2::kBitsPerWord);
+  plink2::FillCumulativePopcounts(sample_include, raw_sample_ctl, _subset_cumulative_popcounts[thr]);
+  plink2::PgrSetSampleSubsetIndex(_subset_cumulative_popcounts[thr], _state_ptr[thr], &_subset_index[thr]);
+  _subset_size[thr] = subset_size;
+}
+
diff --git a/external_libs/pgenlib/pgenlibr.h b/external_libs/pgenlib/pgenlibr.h
new file mode 100644
index 0000000..fe85d06
--- /dev/null
+++ b/external_libs/pgenlib/pgenlibr.h
@@ -0,0 +1,100 @@
+/*
+ *
+ * File derived from pgenlibr R library:
+ * https://github.com/chrchang/plink-ng/tree/master/2.0/pgenlibr
+ *
+ * License info obtained from DESCRIPTION file:
+ * https://github.com/chrchang/plink-ng/blob/master/2.0/pgenlibr/DESCRIPTION
+ * -----------------------------------------------------
+    Package: pgenlibr
+    Type: Package
+    Title: PLINK 2 Binary (.pgen) Reader
+    Version: 0.2
+    Date: 2019-07-10
+    Author: Christopher Chang
+    Maintainer: Christopher Chang <chrchang@alumni.caltech.edu>
+    Description: A thin wrapper over PLINK 2's core libraries which provides an R
+    interface for reading .pgen files.  A minimal .pvar loader is also included.
+    License: LGPL (>= 3)
+    Imports: Rcpp (>= 1.0.1)
+    LinkingTo: Rcpp
+ * -----------------------------------------------------
+
+ *  Modified by Joelle Mbatchou - June 29 2020
+ *  - removed functions that were for R
+ *  - split file to header (added link to several standard C++ libraries)
+ *  - modified remaining functions to be fully C/C++ compatible 
+ *
+ * This file remains under LGPL v3 license (license is in same directory as this file)
+ */
+
+
+#include <vector>
+#include <string>
+#include <stdio.h>
+#include <stdlib.h>
+#include <memory>
+#include "pvar_ffi_support.h"
+#include "pgenlib_ffi_support.h"
+#include "include/pgenlib_read.h"
+
+
+class PgenReader {
+public:
+  PgenReader();
+
+  void Load(std::string filename, uint32_t cur_sample_ct, std::vector<int> sample_subset_1based, int nthr);
+
+  uint32_t GetRawSampleCt() const;
+
+  uint32_t GetSubsetSize() const;
+
+  uint32_t GetVariantCt() const;
+
+  uint32_t GetAlleleCt(uint32_t variant_idx) const;
+
+  uint32_t GetMaxAlleleCt() const;
+
+  bool HardcallPhasePresent() const;
+  
+  bool DosagePresent() const;
+
+  void ReadIntHardcalls(std::vector<int>& buf, int variant_idx, int allele_idx);
+
+  void ReadHardcalls(double* buf, size_t const& n, int const& thr, int variant_idx, int allele_idx);
+
+  void Read(double* buf, size_t const& n, int const& thr, int variant_idx, int allele_idx);
+
+  void Close();
+
+  ~PgenReader();
+
+private:
+  plink2::PgenFileInfo* _info_ptr;
+  uintptr_t* _allele_idx_offsetsp = nullptr;
+  //plink2::RefcountedWptr* _allele_idx_offsetsp;
+  plink2::RefcountedWptr* _nonref_flagsp;
+
+  // have all below be threads specific
+  std::vector<plink2::PgenReader*> _state_ptr;
+  std::vector<plink2::PgrSampleSubsetIndex> _subset_index;
+  std::vector<std::shared_ptr<plink2::PgenVariant>> _pgv;
+  std::vector<uintptr_t*> _subset_include_interleaved_vec;
+  std::vector<uint32_t*> _subset_cumulative_popcounts;
+  std::vector<uint32_t> _subset_size;
+  std::vector<uintptr_t*> _subset_include_vec;
+
+  /*
+  // kPglNypTransposeBatch (= 256) variants at a time, and then transpose
+  uintptr_t* _multivar_vmaj_geno_buf;
+  uintptr_t* _multivar_vmaj_phasepresent_buf;
+  uintptr_t* _multivar_vmaj_phaseinfo_buf;
+  uintptr_t* _multivar_smaj_geno_batch_buf;
+  uintptr_t* _multivar_smaj_phaseinfo_batch_buf;
+  uintptr_t* _multivar_smaj_phasepresent_batch_buf;
+*/
+
+  void SetSampleSubsetInternal(std::vector<int>& sample_subset_1based, int const& thr);
+  void ReadAllelesPhasedInternal(int variant_idx);
+};
+
diff --git a/external_libs/pgenlib/pgenlibr.o b/external_libs/pgenlib/pgenlibr.o
new file mode 100644
index 0000000..5a8cd26
Binary files /dev/null and b/external_libs/pgenlib/pgenlibr.o differ
diff --git a/external_libs/pgenlib/pvar_ffi_support.cc b/external_libs/pgenlib/pvar_ffi_support.cc
new file mode 100644
index 0000000..f6d1ce2
--- /dev/null
+++ b/external_libs/pgenlib/pvar_ffi_support.cc
@@ -0,0 +1,49 @@
+// This library is part of PLINK 2.00, copyright (C) 2005-2020 Shaun Purcell,
+// Christopher Chang.
+//
+// This library is free software: you can redistribute it and/or modify it
+// under the terms of the GNU Lesser General Public License as published by the
+// Free Software Foundation; either version 3 of the License, or (at your
+// option) any later version.
+//
+// This library is distributed in the hope that it will be useful, but WITHOUT
+// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public License
+// for more details.
+//
+// You should have received a copy of the GNU Lesser General Public License
+// along with this library.  If not, see <http://www.gnu.org/licenses/>.
+//
+//
+// *  Modified by Joelle Mbatchou - Apr 27 2021
+// *  - kept only needed functions and modify to recude needed headers
+
+#include "pvar_ffi_support.h"
+
+namespace plink2 {
+
+RefcountedWptr* CreateRefcountedWptr(uintptr_t size) {
+  RefcountedWptr* rwp = static_cast<RefcountedWptr*>(malloc(sizeof(RefcountedWptr)));
+  if (!rwp) {
+    return nullptr;
+  }
+  rwp->ref_ct = 1;
+  rwp->p = static_cast<uintptr_t*>(malloc(sizeof(uintptr_t) * size));
+
+  return rwp;
+}
+
+void CondReleaseRefcountedWptr(RefcountedWptr** rwpp) {
+  RefcountedWptr* rwp = *rwpp;
+  if (!rwp) {
+    return;
+  }
+  --rwp->ref_ct;
+  if (!rwp->ref_ct) {
+    free(rwp->p);
+    free(rwp);
+  }
+  *rwpp = nullptr;
+}
+
+}  // namespace plink2
diff --git a/external_libs/pgenlib/pvar_ffi_support.h b/external_libs/pgenlib/pvar_ffi_support.h
new file mode 100644
index 0000000..132ad26
--- /dev/null
+++ b/external_libs/pgenlib/pvar_ffi_support.h
@@ -0,0 +1,47 @@
+#ifndef __PVAR_FFI_SUPPORT_H__
+#define __PVAR_FFI_SUPPORT_H__
+
+// This library is part of PLINK 2.00, copyright (C) 2005-2020 Shaun Purcell,
+// Christopher Chang.
+//
+// This library is free software: you can redistribute it and/or modify it
+// under the terms of the GNU Lesser General Public License as published by the
+// Free Software Foundation; either version 3 of the License, or (at your
+// option) any later version.
+//
+// This library is distributed in the hope that it will be useful, but WITHOUT
+// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public License
+// for more details.
+//
+// You should have received a copy of the GNU Lesser General Public License
+// along with this library.  If not, see <http://www.gnu.org/licenses/>.
+//
+// *  Modified by Joelle Mbatchou - Apr 27 2021
+// *  - kept only needed functions
+
+#include "include/pgenlib_misc.h"
+
+#ifdef __cplusplus
+namespace plink2 {
+#endif
+
+struct RefcountedWptrStruct {
+  uintptr_t ref_ct;
+  // flexible member array is not C++ compatible
+  //uintptr_t p[];
+  uintptr_t* p;
+};
+
+typedef struct RefcountedWptrStruct RefcountedWptr;
+
+RefcountedWptr* CreateRefcountedWptr(uintptr_t size);
+
+void CondReleaseRefcountedWptr(RefcountedWptr** rwpp);
+
+
+#ifdef __cplusplus
+}  // namespace plink2
+#endif
+
+#endif  // __PVAR_FFI_SUPPORT_H__
diff --git a/external_libs/pgenlib/pvar_ffi_support.o b/external_libs/pgenlib/pvar_ffi_support.o
new file mode 100644
index 0000000..b980656
Binary files /dev/null and b/external_libs/pgenlib/pvar_ffi_support.o differ
diff --git a/external_libs/pgenlib/simde/check.h b/external_libs/pgenlib/simde/check.h
new file mode 100644
index 0000000..7d17d29
--- /dev/null
+++ b/external_libs/pgenlib/simde/check.h
@@ -0,0 +1,276 @@
+/* Check (assertions)
+ * Portable Snippets - https://github.com/nemequ/portable-snippets
+ * Created by Evan Nemerson <evan@nemerson.com>
+ *
+ *   To the extent possible under law, the authors have waived all
+ *   copyright and related or neighboring rights to this code.  For
+ *   details, see the Creative Commons Zero 1.0 Universal license at
+ *   https://creativecommons.org/publicdomain/zero/1.0/
+ *
+ * SPDX-License-Identifier: CC0-1.0
+ */
+
+#if !defined(SIMDE_CHECK_H)
+#define SIMDE_CHECK_H
+
+#if !defined(SIMDE_NDEBUG) && !defined(SIMDE_DEBUG)
+#  define SIMDE_NDEBUG 1
+#endif
+
+#include "hedley.h"
+#include "simde-diagnostic.h"
+#include <stdint.h>
+
+#if !defined(_WIN32)
+#  define SIMDE_SIZE_MODIFIER "z"
+#  define SIMDE_CHAR_MODIFIER "hh"
+#  define SIMDE_SHORT_MODIFIER "h"
+#else
+#  if defined(_M_X64) || defined(__amd64__)
+#    define SIMDE_SIZE_MODIFIER "I64"
+#  else
+#    define SIMDE_SIZE_MODIFIER ""
+#  endif
+#  define SIMDE_CHAR_MODIFIER ""
+#  define SIMDE_SHORT_MODIFIER ""
+#endif
+
+#if defined(_MSC_VER) &&  (_MSC_VER >= 1500)
+#  define SIMDE_PUSH_DISABLE_MSVC_C4127_ __pragma(warning(push)) __pragma(warning(disable:4127))
+#  define SIMDE_POP_DISABLE_MSVC_C4127_ __pragma(warning(pop))
+#else
+#  define SIMDE_PUSH_DISABLE_MSVC_C4127_
+#  define SIMDE_POP_DISABLE_MSVC_C4127_
+#endif
+
+#if !defined(simde_errorf)
+#  if defined(__has_include)
+#    if __has_include(<stdio.h>)
+#      include <stdio.h>
+#    endif
+#  elif defined(SIMDE_STDC_HOSTED)
+#    if SIMDE_STDC_HOSTED == 1
+#      include <stdio.h>
+#    endif
+#  elif defined(__STDC_HOSTED__)
+#    if __STDC_HOSTETD__ == 1
+#      include <stdio.h>
+#    endif
+#  endif
+
+#  include "debug-trap.h"
+
+   HEDLEY_DIAGNOSTIC_PUSH
+   SIMDE_DIAGNOSTIC_DISABLE_VARIADIC_MACROS_
+#  if defined(EOF)
+#    define simde_errorf(format, ...) (fprintf(stderr, format, __VA_ARGS__), abort())
+#  else
+#    define simde_errorf(format, ...) (simde_trap())
+#  endif
+   HEDLEY_DIAGNOSTIC_POP
+#endif
+
+#define simde_error(msg) simde_errorf("%s", msg)
+
+#if defined(SIMDE_NDEBUG) || \
+    (defined(__cplusplus) && (__cplusplus < 201103L)) || \
+    (defined(__STDC__) && (__STDC__ < 199901L))
+#  if defined(SIMDE_CHECK_FAIL_DEFINED)
+#    define simde_assert(expr)
+#  else
+#    if defined(HEDLEY_ASSUME)
+#      define simde_assert(expr) HEDLEY_ASSUME(expr)
+#    elif HEDLEY_GCC_VERSION_CHECK(4,5,0)
+#      define simde_assert(expr) ((void) (!!(expr) ? 1 : (__builtin_unreachable(), 1)))
+#    elif HEDLEY_MSVC_VERSION_CHECK(13,10,0)
+#      define simde_assert(expr) __assume(expr)
+#    else
+#      define simde_assert(expr)
+#    endif
+#  endif
+#  define simde_assert_true(expr) simde_assert(expr)
+#  define simde_assert_false(expr) simde_assert(!(expr))
+#  define simde_assert_type_full(prefix, suffix, T, fmt, a, op, b) simde_assert(((a) op (b)))
+#  define simde_assert_double_equal(a, b, precision)
+#  define simde_assert_string_equal(a, b)
+#  define simde_assert_string_not_equal(a, b)
+#  define simde_assert_memory_equal(size, a, b)
+#  define simde_assert_memory_not_equal(size, a, b)
+#else
+#  define simde_assert(expr) \
+    do { \
+      if (!HEDLEY_LIKELY(expr)) { \
+        simde_error("assertion failed: " #expr "\n"); \
+      } \
+      SIMDE_PUSH_DISABLE_MSVC_C4127_ \
+    } while (0) \
+    SIMDE_POP_DISABLE_MSVC_C4127_
+
+#  define simde_assert_true(expr) \
+    do { \
+      if (!HEDLEY_LIKELY(expr)) { \
+        simde_error("assertion failed: " #expr " is not true\n"); \
+      } \
+      SIMDE_PUSH_DISABLE_MSVC_C4127_ \
+    } while (0) \
+    SIMDE_POP_DISABLE_MSVC_C4127_
+
+#  define simde_assert_false(expr) \
+    do { \
+      if (!HEDLEY_LIKELY(!(expr))) { \
+        simde_error("assertion failed: " #expr " is not false\n"); \
+      } \
+      SIMDE_PUSH_DISABLE_MSVC_C4127_ \
+    } while (0) \
+    SIMDE_POP_DISABLE_MSVC_C4127_
+
+#  define simde_assert_type_full(prefix, suffix, T, fmt, a, op, b)   \
+    do { \
+      T simde_tmp_a_ = (a); \
+      T simde_tmp_b_ = (b); \
+      if (!(simde_tmp_a_ op simde_tmp_b_)) { \
+        simde_errorf("assertion failed: %s %s %s (" prefix "%" fmt suffix " %s " prefix "%" fmt suffix ")\n", \
+                     #a, #op, #b, simde_tmp_a_, #op, simde_tmp_b_); \
+      } \
+      SIMDE_PUSH_DISABLE_MSVC_C4127_ \
+    } while (0) \
+    SIMDE_POP_DISABLE_MSVC_C4127_
+
+#  define simde_assert_double_equal(a, b, precision) \
+    do { \
+      const double simde_tmp_a_ = (a); \
+      const double simde_tmp_b_ = (b); \
+      const double simde_tmp_diff_ = ((simde_tmp_a_ - simde_tmp_b_) < 0) ? \
+        -(simde_tmp_a_ - simde_tmp_b_) : \
+        (simde_tmp_a_ - simde_tmp_b_); \
+      if (HEDLEY_UNLIKELY(simde_tmp_diff_ > 1e-##precision)) { \
+        simde_errorf("assertion failed: %s == %s (%0." #precision "g == %0." #precision "g)\n", \
+                     #a, #b, simde_tmp_a_, simde_tmp_b_); \
+      } \
+      SIMDE_PUSH_DISABLE_MSVC_C4127_ \
+    } while (0) \
+    SIMDE_POP_DISABLE_MSVC_C4127_
+
+#  include <string.h>
+#  define simde_assert_string_equal(a, b) \
+    do { \
+      const char* simde_tmp_a_ = a; \
+      const char* simde_tmp_b_ = b; \
+      if (HEDLEY_UNLIKELY(strcmp(simde_tmp_a_, simde_tmp_b_) != 0)) { \
+        simde_errorf("assertion failed: string %s == %s (\"%s\" == \"%s\")\n", \
+                     #a, #b, simde_tmp_a_, simde_tmp_b_); \
+      } \
+      SIMDE_PUSH_DISABLE_MSVC_C4127_ \
+    } while (0) \
+    SIMDE_POP_DISABLE_MSVC_C4127_
+
+#  define simde_assert_string_not_equal(a, b) \
+    do { \
+      const char* simde_tmp_a_ = a; \
+      const char* simde_tmp_b_ = b; \
+      if (HEDLEY_UNLIKELY(strcmp(simde_tmp_a_, simde_tmp_b_) == 0)) { \
+        simde_errorf("assertion failed: string %s != %s (\"%s\" == \"%s\")\n", \
+                     #a, #b, simde_tmp_a_, simde_tmp_b_); \
+      } \
+      SIMDE_PUSH_DISABLE_MSVC_C4127_ \
+    } while (0) \
+    SIMDE_POP_DISABLE_MSVC_C4127_
+
+#  define simde_assert_memory_equal(size, a, b) \
+    do { \
+      const unsigned char* simde_tmp_a_ = (const unsigned char*) (a); \
+      const unsigned char* simde_tmp_b_ = (const unsigned char*) (b); \
+      const size_t simde_tmp_size_ = (size); \
+      if (HEDLEY_UNLIKELY(memcmp(simde_tmp_a_, simde_tmp_b_, simde_tmp_size_)) != 0) { \
+        size_t simde_tmp_pos_; \
+        for (simde_tmp_pos_ = 0 ; simde_tmp_pos_ < simde_tmp_size_ ; simde_tmp_pos_++) { \
+          if (simde_tmp_a_[simde_tmp_pos_] != simde_tmp_b_[simde_tmp_pos_]) { \
+            simde_errorf("assertion failed: memory %s == %s, at offset %" SIMDE_SIZE_MODIFIER "u\n", \
+                         #a, #b, simde_tmp_pos_); \
+            break; \
+          } \
+        } \
+      } \
+      SIMDE_PUSH_DISABLE_MSVC_C4127_ \
+    } while (0) \
+    SIMDE_POP_DISABLE_MSVC_C4127_
+
+#  define simde_assert_memory_not_equal(size, a, b) \
+    do { \
+      const unsigned char* simde_tmp_a_ = (const unsigned char*) (a); \
+      const unsigned char* simde_tmp_b_ = (const unsigned char*) (b); \
+      const size_t simde_tmp_size_ = (size); \
+      if (HEDLEY_UNLIKELY(memcmp(simde_tmp_a_, simde_tmp_b_, simde_tmp_size_)) == 0) { \
+        simde_errorf("assertion failed: memory %s != %s (%" SIMDE_SIZE_MODIFIER "u bytes)\n", \
+                     #a, #b, simde_tmp_size_); \
+      } \
+      SIMDE_PUSH_DISABLE_MSVC_C4127_ \
+    } while (0) \
+    SIMDE_POP_DISABLE_MSVC_C4127_
+#endif
+
+#define simde_assert_type(T, fmt, a, op, b) \
+  simde_assert_type_full("", "", T, fmt, a, op, b)
+
+#define simde_assert_char(a, op, b) \
+  simde_assert_type_full("'\\x", "'", char, "02" SIMDE_CHAR_MODIFIER "x", a, op, b)
+#define simde_assert_uchar(a, op, b) \
+  simde_assert_type_full("'\\x", "'", unsigned char, "02" SIMDE_CHAR_MODIFIER "x", a, op, b)
+#define simde_assert_short(a, op, b) \
+  simde_assert_type(short, SIMDE_SHORT_MODIFIER "d", a, op, b)
+#define simde_assert_ushort(a, op, b) \
+  simde_assert_type(unsigned short, SIMDE_SHORT_MODIFIER "u", a, op, b)
+#define simde_assert_int(a, op, b) \
+  simde_assert_type(int, "d", a, op, b)
+#define simde_assert_uint(a, op, b) \
+  simde_assert_type(unsigned int, "u", a, op, b)
+#define simde_assert_long(a, op, b) \
+  simde_assert_type(long int, "ld", a, op, b)
+#define simde_assert_ulong(a, op, b) \
+  simde_assert_type(unsigned long int, "lu", a, op, b)
+#define simde_assert_llong(a, op, b) \
+  simde_assert_type(long long int, "lld", a, op, b)
+#define simde_assert_ullong(a, op, b) \
+  simde_assert_type(unsigned long long int, "llu", a, op, b)
+
+#define simde_assert_size(a, op, b) \
+  simde_assert_type(size_t, SIMDE_SIZE_MODIFIER "u", a, op, b)
+
+#define simde_assert_float(a, op, b) \
+  simde_assert_type(float, "f", a, op, b)
+#define simde_assert_double(a, op, b) \
+  simde_assert_type(double, "g", a, op, b)
+#define simde_assert_ptr(a, op, b) \
+  simde_assert_type(const void*, "p", a, op, b)
+
+#define simde_assert_int8(a, op, b) \
+  simde_assert_type(int8_t, PRIi8, a, op, b)
+#define simde_assert_uint8(a, op, b) \
+  simde_assert_type(uint8_t, PRIu8, a, op, b)
+#define simde_assert_int16(a, op, b) \
+  simde_assert_type(int16_t, PRIi16, a, op, b)
+#define simde_assert_uint16(a, op, b) \
+  simde_assert_type(uint16_t, PRIu16, a, op, b)
+#define simde_assert_int32(a, op, b) \
+  simde_assert_type(int32_t, PRIi32, a, op, b)
+#define simde_assert_uint32(a, op, b) \
+  simde_assert_type(uint32_t, PRIu32, a, op, b)
+#define simde_assert_int64(a, op, b) \
+  simde_assert_type(int64_t, PRIi64, a, op, b)
+#define simde_assert_uint64(a, op, b) \
+  simde_assert_type(uint64_t, PRIu64, a, op, b)
+
+#define simde_assert_ptr_equal(a, b) \
+  simde_assert_ptr(a, ==, b)
+#define simde_assert_ptr_not_equal(a, b) \
+  simde_assert_ptr(a, !=, b)
+#define simde_assert_null(ptr) \
+  simde_assert_ptr(ptr, ==, NULL)
+#define simde_assert_not_null(ptr) \
+  simde_assert_ptr(ptr, !=, NULL)
+#define simde_assert_ptr_null(ptr) \
+  simde_assert_ptr(ptr, ==, NULL)
+#define simde_assert_ptr_not_null(ptr) \
+  simde_assert_ptr(ptr, !=, NULL)
+
+#endif /* !defined(SIMDE_CHECK_H) */
diff --git a/external_libs/pgenlib/simde/debug-trap.h b/external_libs/pgenlib/simde/debug-trap.h
new file mode 100644
index 0000000..2d3c60f
--- /dev/null
+++ b/external_libs/pgenlib/simde/debug-trap.h
@@ -0,0 +1,85 @@
+/* Debugging assertions and traps
+ * Portable Snippets - https://github.com/nemequ/portable-snippets
+ * Created by Evan Nemerson <evan@nemerson.com>
+ *
+ *   To the extent possible under law, the authors have waived all
+ *   copyright and related or neighboring rights to this code.  For
+ *   details, see the Creative Commons Zero 1.0 Universal license at
+ *   https://creativecommons.org/publicdomain/zero/1.0/
+ *
+ * SPDX-License-Identifier: CC0-1.0
+ */
+
+#if !defined(SIMDE_DEBUG_TRAP_H)
+#define SIMDE_DEBUG_TRAP_H
+
+#if !defined(SIMDE_NDEBUG) && defined(NDEBUG) && !defined(SIMDE_DEBUG)
+#  define SIMDE_NDEBUG 1
+#endif
+
+#if defined(__has_builtin) && !defined(__ibmxl__)
+#  if __has_builtin(__builtin_debugtrap)
+#    define simde_trap() __builtin_debugtrap()
+#  elif __has_builtin(__debugbreak)
+#    define simde_trap() __debugbreak()
+#  endif
+#endif
+#if !defined(simde_trap)
+#  if defined(_MSC_VER) || defined(__INTEL_COMPILER)
+#    define simde_trap() __debugbreak()
+#  elif defined(__ARMCC_VERSION)
+#    define simde_trap() __breakpoint(42)
+#  elif defined(__ibmxl__) || defined(__xlC__)
+#    include <builtins.h>
+#    define simde_trap() __trap(42)
+#  elif defined(__DMC__) && defined(_M_IX86)
+     static inline void simde_trap(void) { __asm int 3h; }
+#  elif defined(__i386__) || defined(__x86_64__)
+     static inline void simde_trap(void) { __asm__ __volatile__("int $03"); }
+#  elif defined(__thumb__)
+     static inline void simde_trap(void) { __asm__ __volatile__(".inst 0xde01"); }
+#  elif defined(__aarch64__)
+     static inline void simde_trap(void) { __asm__ __volatile__(".inst 0xd4200000"); }
+#  elif defined(__arm__)
+     static inline void simde_trap(void) { __asm__ __volatile__(".inst 0xe7f001f0"); }
+#  elif defined (__alpha__) && !defined(__osf__)
+     static inline void simde_trap(void) { __asm__ __volatile__("bpt"); }
+#  elif defined(_54_)
+     static inline void simde_trap(void) { __asm__ __volatile__("ESTOP"); }
+#  elif defined(_55_)
+     static inline void simde_trap(void) { __asm__ __volatile__(";\n .if (.MNEMONIC)\n ESTOP_1\n .else\n ESTOP_1()\n .endif\n NOP"); }
+#  elif defined(_64P_)
+     static inline void simde_trap(void) { __asm__ __volatile__("SWBP 0"); }
+#  elif defined(_6x_)
+     static inline void simde_trap(void) { __asm__ __volatile__("NOP\n .word 0x10000000"); }
+#  elif defined(__STDC_HOSTED__) && (__STDC_HOSTED__ == 0) && defined(__GNUC__)
+#    define simde_trap() __builtin_trap()
+#  else
+#    include <signal.h>
+#    if defined(SIGTRAP)
+#      define simde_trap() raise(SIGTRAP)
+#    else
+#      define simde_trap() raise(SIGABRT)
+#    endif
+#  endif
+#endif
+
+#if defined(HEDLEY_LIKELY)
+#  define SIMDE_DBG_LIKELY(expr) HEDLEY_LIKELY(expr)
+#elif defined(__GNUC__) && (__GNUC__ >= 3)
+#  define SIMDE_DBG_LIKELY(expr) __builtin_expect(!!(expr), 1)
+#else
+#  define SIMDE_DBG_LIKELY(expr) (!!(expr))
+#endif
+
+#if !defined(SIMDE_NDEBUG) || (SIMDE_NDEBUG == 0)
+#  define simde_dbg_assert(expr) do { \
+    if (!SIMDE_DBG_LIKELY(expr)) { \
+      simde_trap(); \
+    } \
+  } while (0)
+#else
+#  define simde_dbg_assert(expr)
+#endif
+
+#endif /* !defined(SIMDE_DEBUG_TRAP_H) */
diff --git a/external_libs/pgenlib/simde/hedley.h b/external_libs/pgenlib/simde/hedley.h
new file mode 100644
index 0000000..f064f3f
--- /dev/null
+++ b/external_libs/pgenlib/simde/hedley.h
@@ -0,0 +1,2045 @@
+/* Hedley - https://nemequ.github.io/hedley
+ * Created by Evan Nemerson <evan@nemerson.com>
+ *
+ * To the extent possible under law, the author(s) have dedicated all
+ * copyright and related and neighboring rights to this software to
+ * the public domain worldwide. This software is distributed without
+ * any warranty.
+ *
+ * For details, see <http://creativecommons.org/publicdomain/zero/1.0/>.
+ * SPDX-License-Identifier: CC0-1.0
+ */
+
+#if !defined(HEDLEY_VERSION) || (HEDLEY_VERSION < 16)
+#if defined(HEDLEY_VERSION)
+#  undef HEDLEY_VERSION
+#endif
+#define HEDLEY_VERSION 16
+
+#if defined(HEDLEY_STRINGIFY_EX)
+#  undef HEDLEY_STRINGIFY_EX
+#endif
+#define HEDLEY_STRINGIFY_EX(x) #x
+
+#if defined(HEDLEY_STRINGIFY)
+#  undef HEDLEY_STRINGIFY
+#endif
+#define HEDLEY_STRINGIFY(x) HEDLEY_STRINGIFY_EX(x)
+
+#if defined(HEDLEY_CONCAT_EX)
+#  undef HEDLEY_CONCAT_EX
+#endif
+#define HEDLEY_CONCAT_EX(a,b) a##b
+
+#if defined(HEDLEY_CONCAT)
+#  undef HEDLEY_CONCAT
+#endif
+#define HEDLEY_CONCAT(a,b) HEDLEY_CONCAT_EX(a,b)
+
+#if defined(HEDLEY_CONCAT3_EX)
+#  undef HEDLEY_CONCAT3_EX
+#endif
+#define HEDLEY_CONCAT3_EX(a,b,c) a##b##c
+
+#if defined(HEDLEY_CONCAT3)
+#  undef HEDLEY_CONCAT3
+#endif
+#define HEDLEY_CONCAT3(a,b,c) HEDLEY_CONCAT3_EX(a,b,c)
+
+#if defined(HEDLEY_VERSION_ENCODE)
+#  undef HEDLEY_VERSION_ENCODE
+#endif
+#define HEDLEY_VERSION_ENCODE(major,minor,revision) (((major) * 1000000) + ((minor) * 1000) + (revision))
+
+#if defined(HEDLEY_VERSION_DECODE_MAJOR)
+#  undef HEDLEY_VERSION_DECODE_MAJOR
+#endif
+#define HEDLEY_VERSION_DECODE_MAJOR(version) ((version) / 1000000)
+
+#if defined(HEDLEY_VERSION_DECODE_MINOR)
+#  undef HEDLEY_VERSION_DECODE_MINOR
+#endif
+#define HEDLEY_VERSION_DECODE_MINOR(version) (((version) % 1000000) / 1000)
+
+#if defined(HEDLEY_VERSION_DECODE_REVISION)
+#  undef HEDLEY_VERSION_DECODE_REVISION
+#endif
+#define HEDLEY_VERSION_DECODE_REVISION(version) ((version) % 1000)
+
+#if defined(HEDLEY_GNUC_VERSION)
+#  undef HEDLEY_GNUC_VERSION
+#endif
+#if defined(__GNUC__) && defined(__GNUC_PATCHLEVEL__)
+#  define HEDLEY_GNUC_VERSION HEDLEY_VERSION_ENCODE(__GNUC__, __GNUC_MINOR__, __GNUC_PATCHLEVEL__)
+#elif defined(__GNUC__)
+#  define HEDLEY_GNUC_VERSION HEDLEY_VERSION_ENCODE(__GNUC__, __GNUC_MINOR__, 0)
+#endif
+
+#if defined(HEDLEY_GNUC_VERSION_CHECK)
+#  undef HEDLEY_GNUC_VERSION_CHECK
+#endif
+#if defined(HEDLEY_GNUC_VERSION)
+#  define HEDLEY_GNUC_VERSION_CHECK(major,minor,patch) (HEDLEY_GNUC_VERSION >= HEDLEY_VERSION_ENCODE(major, minor, patch))
+#else
+#  define HEDLEY_GNUC_VERSION_CHECK(major,minor,patch) (0)
+#endif
+
+#if defined(HEDLEY_MSVC_VERSION)
+#  undef HEDLEY_MSVC_VERSION
+#endif
+#if defined(_MSC_FULL_VER) && (_MSC_FULL_VER >= 140000000) && !defined(__ICL)
+#  define HEDLEY_MSVC_VERSION HEDLEY_VERSION_ENCODE(_MSC_FULL_VER / 10000000, (_MSC_FULL_VER % 10000000) / 100000, (_MSC_FULL_VER % 100000) / 100)
+#elif defined(_MSC_FULL_VER) && !defined(__ICL)
+#  define HEDLEY_MSVC_VERSION HEDLEY_VERSION_ENCODE(_MSC_FULL_VER / 1000000, (_MSC_FULL_VER % 1000000) / 10000, (_MSC_FULL_VER % 10000) / 10)
+#elif defined(_MSC_VER) && !defined(__ICL)
+#  define HEDLEY_MSVC_VERSION HEDLEY_VERSION_ENCODE(_MSC_VER / 100, _MSC_VER % 100, 0)
+#endif
+
+#if defined(HEDLEY_MSVC_VERSION_CHECK)
+#  undef HEDLEY_MSVC_VERSION_CHECK
+#endif
+#if !defined(HEDLEY_MSVC_VERSION)
+#  define HEDLEY_MSVC_VERSION_CHECK(major,minor,patch) (0)
+#elif defined(_MSC_VER) && (_MSC_VER >= 1400)
+#  define HEDLEY_MSVC_VERSION_CHECK(major,minor,patch) (_MSC_FULL_VER >= ((major * 10000000) + (minor * 100000) + (patch)))
+#elif defined(_MSC_VER) && (_MSC_VER >= 1200)
+#  define HEDLEY_MSVC_VERSION_CHECK(major,minor,patch) (_MSC_FULL_VER >= ((major * 1000000) + (minor * 10000) + (patch)))
+#else
+#  define HEDLEY_MSVC_VERSION_CHECK(major,minor,patch) (_MSC_VER >= ((major * 100) + (minor)))
+#endif
+
+#if defined(HEDLEY_INTEL_VERSION)
+#  undef HEDLEY_INTEL_VERSION
+#endif
+#if defined(__INTEL_COMPILER) && defined(__INTEL_COMPILER_UPDATE) && !defined(__ICL)
+#  define HEDLEY_INTEL_VERSION HEDLEY_VERSION_ENCODE(__INTEL_COMPILER / 100, __INTEL_COMPILER % 100, __INTEL_COMPILER_UPDATE)
+#elif defined(__INTEL_COMPILER) && !defined(__ICL)
+#  define HEDLEY_INTEL_VERSION HEDLEY_VERSION_ENCODE(__INTEL_COMPILER / 100, __INTEL_COMPILER % 100, 0)
+#endif
+
+#if defined(HEDLEY_INTEL_VERSION_CHECK)
+#  undef HEDLEY_INTEL_VERSION_CHECK
+#endif
+#if defined(HEDLEY_INTEL_VERSION)
+#  define HEDLEY_INTEL_VERSION_CHECK(major,minor,patch) (HEDLEY_INTEL_VERSION >= HEDLEY_VERSION_ENCODE(major, minor, patch))
+#else
+#  define HEDLEY_INTEL_VERSION_CHECK(major,minor,patch) (0)
+#endif
+
+#if defined(HEDLEY_INTEL_CL_VERSION)
+#  undef HEDLEY_INTEL_CL_VERSION
+#endif
+#if defined(__INTEL_COMPILER) && defined(__INTEL_COMPILER_UPDATE) && defined(__ICL)
+#  define HEDLEY_INTEL_CL_VERSION HEDLEY_VERSION_ENCODE(__INTEL_COMPILER, __INTEL_COMPILER_UPDATE, 0)
+#endif
+
+#if defined(HEDLEY_INTEL_CL_VERSION_CHECK)
+#  undef HEDLEY_INTEL_CL_VERSION_CHECK
+#endif
+#if defined(HEDLEY_INTEL_CL_VERSION)
+#  define HEDLEY_INTEL_CL_VERSION_CHECK(major,minor,patch) (HEDLEY_INTEL_CL_VERSION >= HEDLEY_VERSION_ENCODE(major, minor, patch))
+#else
+#  define HEDLEY_INTEL_CL_VERSION_CHECK(major,minor,patch) (0)
+#endif
+
+#if defined(HEDLEY_PGI_VERSION)
+#  undef HEDLEY_PGI_VERSION
+#endif
+#if defined(__PGI) && defined(__PGIC__) && defined(__PGIC_MINOR__) && defined(__PGIC_PATCHLEVEL__)
+#  define HEDLEY_PGI_VERSION HEDLEY_VERSION_ENCODE(__PGIC__, __PGIC_MINOR__, __PGIC_PATCHLEVEL__)
+#endif
+
+#if defined(HEDLEY_PGI_VERSION_CHECK)
+#  undef HEDLEY_PGI_VERSION_CHECK
+#endif
+#if defined(HEDLEY_PGI_VERSION)
+#  define HEDLEY_PGI_VERSION_CHECK(major,minor,patch) (HEDLEY_PGI_VERSION >= HEDLEY_VERSION_ENCODE(major, minor, patch))
+#else
+#  define HEDLEY_PGI_VERSION_CHECK(major,minor,patch) (0)
+#endif
+
+#if defined(HEDLEY_SUNPRO_VERSION)
+#  undef HEDLEY_SUNPRO_VERSION
+#endif
+#if defined(__SUNPRO_C) && (__SUNPRO_C > 0x1000)
+#  define HEDLEY_SUNPRO_VERSION HEDLEY_VERSION_ENCODE((((__SUNPRO_C >> 16) & 0xf) * 10) + ((__SUNPRO_C >> 12) & 0xf), (((__SUNPRO_C >> 8) & 0xf) * 10) + ((__SUNPRO_C >> 4) & 0xf), (__SUNPRO_C & 0xf) * 10)
+#elif defined(__SUNPRO_C)
+#  define HEDLEY_SUNPRO_VERSION HEDLEY_VERSION_ENCODE((__SUNPRO_C >> 8) & 0xf, (__SUNPRO_C >> 4) & 0xf, (__SUNPRO_C) & 0xf)
+#elif defined(__SUNPRO_CC) && (__SUNPRO_CC > 0x1000)
+#  define HEDLEY_SUNPRO_VERSION HEDLEY_VERSION_ENCODE((((__SUNPRO_CC >> 16) & 0xf) * 10) + ((__SUNPRO_CC >> 12) & 0xf), (((__SUNPRO_CC >> 8) & 0xf) * 10) + ((__SUNPRO_CC >> 4) & 0xf), (__SUNPRO_CC & 0xf) * 10)
+#elif defined(__SUNPRO_CC)
+#  define HEDLEY_SUNPRO_VERSION HEDLEY_VERSION_ENCODE((__SUNPRO_CC >> 8) & 0xf, (__SUNPRO_CC >> 4) & 0xf, (__SUNPRO_CC) & 0xf)
+#endif
+
+#if defined(HEDLEY_SUNPRO_VERSION_CHECK)
+#  undef HEDLEY_SUNPRO_VERSION_CHECK
+#endif
+#if defined(HEDLEY_SUNPRO_VERSION)
+#  define HEDLEY_SUNPRO_VERSION_CHECK(major,minor,patch) (HEDLEY_SUNPRO_VERSION >= HEDLEY_VERSION_ENCODE(major, minor, patch))
+#else
+#  define HEDLEY_SUNPRO_VERSION_CHECK(major,minor,patch) (0)
+#endif
+
+#if defined(HEDLEY_EMSCRIPTEN_VERSION)
+#  undef HEDLEY_EMSCRIPTEN_VERSION
+#endif
+#if defined(__EMSCRIPTEN__)
+#  include <emscripten.h>
+#  define HEDLEY_EMSCRIPTEN_VERSION HEDLEY_VERSION_ENCODE(__EMSCRIPTEN_major__, __EMSCRIPTEN_minor__, __EMSCRIPTEN_tiny__)
+#endif
+
+#if defined(HEDLEY_EMSCRIPTEN_VERSION_CHECK)
+#  undef HEDLEY_EMSCRIPTEN_VERSION_CHECK
+#endif
+#if defined(HEDLEY_EMSCRIPTEN_VERSION)
+#  define HEDLEY_EMSCRIPTEN_VERSION_CHECK(major,minor,patch) (HEDLEY_EMSCRIPTEN_VERSION >= HEDLEY_VERSION_ENCODE(major, minor, patch))
+#else
+#  define HEDLEY_EMSCRIPTEN_VERSION_CHECK(major,minor,patch) (0)
+#endif
+
+#if defined(HEDLEY_ARM_VERSION)
+#  undef HEDLEY_ARM_VERSION
+#endif
+#if defined(__CC_ARM) && defined(__ARMCOMPILER_VERSION)
+#  define HEDLEY_ARM_VERSION HEDLEY_VERSION_ENCODE(__ARMCOMPILER_VERSION / 1000000, (__ARMCOMPILER_VERSION % 1000000) / 10000, (__ARMCOMPILER_VERSION % 10000) / 100)
+#elif defined(__CC_ARM) && defined(__ARMCC_VERSION)
+#  define HEDLEY_ARM_VERSION HEDLEY_VERSION_ENCODE(__ARMCC_VERSION / 1000000, (__ARMCC_VERSION % 1000000) / 10000, (__ARMCC_VERSION % 10000) / 100)
+#endif
+
+#if defined(HEDLEY_ARM_VERSION_CHECK)
+#  undef HEDLEY_ARM_VERSION_CHECK
+#endif
+#if defined(HEDLEY_ARM_VERSION)
+#  define HEDLEY_ARM_VERSION_CHECK(major,minor,patch) (HEDLEY_ARM_VERSION >= HEDLEY_VERSION_ENCODE(major, minor, patch))
+#else
+#  define HEDLEY_ARM_VERSION_CHECK(major,minor,patch) (0)
+#endif
+
+#if defined(HEDLEY_IBM_VERSION)
+#  undef HEDLEY_IBM_VERSION
+#endif
+#if defined(__ibmxl__)
+#  define HEDLEY_IBM_VERSION HEDLEY_VERSION_ENCODE(__ibmxl_version__, __ibmxl_release__, __ibmxl_modification__)
+#elif defined(__xlC__) && defined(__xlC_ver__)
+#  define HEDLEY_IBM_VERSION HEDLEY_VERSION_ENCODE(__xlC__ >> 8, __xlC__ & 0xff, (__xlC_ver__ >> 8) & 0xff)
+#elif defined(__xlC__)
+#  define HEDLEY_IBM_VERSION HEDLEY_VERSION_ENCODE(__xlC__ >> 8, __xlC__ & 0xff, 0)
+#endif
+
+#if defined(HEDLEY_IBM_VERSION_CHECK)
+#  undef HEDLEY_IBM_VERSION_CHECK
+#endif
+#if defined(HEDLEY_IBM_VERSION)
+#  define HEDLEY_IBM_VERSION_CHECK(major,minor,patch) (HEDLEY_IBM_VERSION >= HEDLEY_VERSION_ENCODE(major, minor, patch))
+#else
+#  define HEDLEY_IBM_VERSION_CHECK(major,minor,patch) (0)
+#endif
+
+#if defined(HEDLEY_TI_VERSION)
+#  undef HEDLEY_TI_VERSION
+#endif
+#if \
+    defined(__TI_COMPILER_VERSION__) && \
+    ( \
+      defined(__TMS470__) || defined(__TI_ARM__) || \
+      defined(__MSP430__) || \
+      defined(__TMS320C2000__) \
+    )
+#  if (__TI_COMPILER_VERSION__ >= 16000000)
+#    define HEDLEY_TI_VERSION HEDLEY_VERSION_ENCODE(__TI_COMPILER_VERSION__ / 1000000, (__TI_COMPILER_VERSION__ % 1000000) / 1000, (__TI_COMPILER_VERSION__ % 1000))
+#  endif
+#endif
+
+#if defined(HEDLEY_TI_VERSION_CHECK)
+#  undef HEDLEY_TI_VERSION_CHECK
+#endif
+#if defined(HEDLEY_TI_VERSION)
+#  define HEDLEY_TI_VERSION_CHECK(major,minor,patch) (HEDLEY_TI_VERSION >= HEDLEY_VERSION_ENCODE(major, minor, patch))
+#else
+#  define HEDLEY_TI_VERSION_CHECK(major,minor,patch) (0)
+#endif
+
+#if defined(HEDLEY_TI_CL2000_VERSION)
+#  undef HEDLEY_TI_CL2000_VERSION
+#endif
+#if defined(__TI_COMPILER_VERSION__) && defined(__TMS320C2000__)
+#  define HEDLEY_TI_CL2000_VERSION HEDLEY_VERSION_ENCODE(__TI_COMPILER_VERSION__ / 1000000, (__TI_COMPILER_VERSION__ % 1000000) / 1000, (__TI_COMPILER_VERSION__ % 1000))
+#endif
+
+#if defined(HEDLEY_TI_CL2000_VERSION_CHECK)
+#  undef HEDLEY_TI_CL2000_VERSION_CHECK
+#endif
+#if defined(HEDLEY_TI_CL2000_VERSION)
+#  define HEDLEY_TI_CL2000_VERSION_CHECK(major,minor,patch) (HEDLEY_TI_CL2000_VERSION >= HEDLEY_VERSION_ENCODE(major, minor, patch))
+#else
+#  define HEDLEY_TI_CL2000_VERSION_CHECK(major,minor,patch) (0)
+#endif
+
+#if defined(HEDLEY_TI_CL430_VERSION)
+#  undef HEDLEY_TI_CL430_VERSION
+#endif
+#if defined(__TI_COMPILER_VERSION__) && defined(__MSP430__)
+#  define HEDLEY_TI_CL430_VERSION HEDLEY_VERSION_ENCODE(__TI_COMPILER_VERSION__ / 1000000, (__TI_COMPILER_VERSION__ % 1000000) / 1000, (__TI_COMPILER_VERSION__ % 1000))
+#endif
+
+#if defined(HEDLEY_TI_CL430_VERSION_CHECK)
+#  undef HEDLEY_TI_CL430_VERSION_CHECK
+#endif
+#if defined(HEDLEY_TI_CL430_VERSION)
+#  define HEDLEY_TI_CL430_VERSION_CHECK(major,minor,patch) (HEDLEY_TI_CL430_VERSION >= HEDLEY_VERSION_ENCODE(major, minor, patch))
+#else
+#  define HEDLEY_TI_CL430_VERSION_CHECK(major,minor,patch) (0)
+#endif
+
+#if defined(HEDLEY_TI_ARMCL_VERSION)
+#  undef HEDLEY_TI_ARMCL_VERSION
+#endif
+#if defined(__TI_COMPILER_VERSION__) && (defined(__TMS470__) || defined(__TI_ARM__))
+#  define HEDLEY_TI_ARMCL_VERSION HEDLEY_VERSION_ENCODE(__TI_COMPILER_VERSION__ / 1000000, (__TI_COMPILER_VERSION__ % 1000000) / 1000, (__TI_COMPILER_VERSION__ % 1000))
+#endif
+
+#if defined(HEDLEY_TI_ARMCL_VERSION_CHECK)
+#  undef HEDLEY_TI_ARMCL_VERSION_CHECK
+#endif
+#if defined(HEDLEY_TI_ARMCL_VERSION)
+#  define HEDLEY_TI_ARMCL_VERSION_CHECK(major,minor,patch) (HEDLEY_TI_ARMCL_VERSION >= HEDLEY_VERSION_ENCODE(major, minor, patch))
+#else
+#  define HEDLEY_TI_ARMCL_VERSION_CHECK(major,minor,patch) (0)
+#endif
+
+#if defined(HEDLEY_TI_CL6X_VERSION)
+#  undef HEDLEY_TI_CL6X_VERSION
+#endif
+#if defined(__TI_COMPILER_VERSION__) && defined(__TMS320C6X__)
+#  define HEDLEY_TI_CL6X_VERSION HEDLEY_VERSION_ENCODE(__TI_COMPILER_VERSION__ / 1000000, (__TI_COMPILER_VERSION__ % 1000000) / 1000, (__TI_COMPILER_VERSION__ % 1000))
+#endif
+
+#if defined(HEDLEY_TI_CL6X_VERSION_CHECK)
+#  undef HEDLEY_TI_CL6X_VERSION_CHECK
+#endif
+#if defined(HEDLEY_TI_CL6X_VERSION)
+#  define HEDLEY_TI_CL6X_VERSION_CHECK(major,minor,patch) (HEDLEY_TI_CL6X_VERSION >= HEDLEY_VERSION_ENCODE(major, minor, patch))
+#else
+#  define HEDLEY_TI_CL6X_VERSION_CHECK(major,minor,patch) (0)
+#endif
+
+#if defined(HEDLEY_TI_CL7X_VERSION)
+#  undef HEDLEY_TI_CL7X_VERSION
+#endif
+#if defined(__TI_COMPILER_VERSION__) && defined(__C7000__)
+#  define HEDLEY_TI_CL7X_VERSION HEDLEY_VERSION_ENCODE(__TI_COMPILER_VERSION__ / 1000000, (__TI_COMPILER_VERSION__ % 1000000) / 1000, (__TI_COMPILER_VERSION__ % 1000))
+#endif
+
+#if defined(HEDLEY_TI_CL7X_VERSION_CHECK)
+#  undef HEDLEY_TI_CL7X_VERSION_CHECK
+#endif
+#if defined(HEDLEY_TI_CL7X_VERSION)
+#  define HEDLEY_TI_CL7X_VERSION_CHECK(major,minor,patch) (HEDLEY_TI_CL7X_VERSION >= HEDLEY_VERSION_ENCODE(major, minor, patch))
+#else
+#  define HEDLEY_TI_CL7X_VERSION_CHECK(major,minor,patch) (0)
+#endif
+
+#if defined(HEDLEY_TI_CLPRU_VERSION)
+#  undef HEDLEY_TI_CLPRU_VERSION
+#endif
+#if defined(__TI_COMPILER_VERSION__) && defined(__PRU__)
+#  define HEDLEY_TI_CLPRU_VERSION HEDLEY_VERSION_ENCODE(__TI_COMPILER_VERSION__ / 1000000, (__TI_COMPILER_VERSION__ % 1000000) / 1000, (__TI_COMPILER_VERSION__ % 1000))
+#endif
+
+#if defined(HEDLEY_TI_CLPRU_VERSION_CHECK)
+#  undef HEDLEY_TI_CLPRU_VERSION_CHECK
+#endif
+#if defined(HEDLEY_TI_CLPRU_VERSION)
+#  define HEDLEY_TI_CLPRU_VERSION_CHECK(major,minor,patch) (HEDLEY_TI_CLPRU_VERSION >= HEDLEY_VERSION_ENCODE(major, minor, patch))
+#else
+#  define HEDLEY_TI_CLPRU_VERSION_CHECK(major,minor,patch) (0)
+#endif
+
+#if defined(HEDLEY_CRAY_VERSION)
+#  undef HEDLEY_CRAY_VERSION
+#endif
+#if defined(_CRAYC)
+#  if defined(_RELEASE_PATCHLEVEL)
+#    define HEDLEY_CRAY_VERSION HEDLEY_VERSION_ENCODE(_RELEASE_MAJOR, _RELEASE_MINOR, _RELEASE_PATCHLEVEL)
+#  else
+#    define HEDLEY_CRAY_VERSION HEDLEY_VERSION_ENCODE(_RELEASE_MAJOR, _RELEASE_MINOR, 0)
+#  endif
+#endif
+
+#if defined(HEDLEY_CRAY_VERSION_CHECK)
+#  undef HEDLEY_CRAY_VERSION_CHECK
+#endif
+#if defined(HEDLEY_CRAY_VERSION)
+#  define HEDLEY_CRAY_VERSION_CHECK(major,minor,patch) (HEDLEY_CRAY_VERSION >= HEDLEY_VERSION_ENCODE(major, minor, patch))
+#else
+#  define HEDLEY_CRAY_VERSION_CHECK(major,minor,patch) (0)
+#endif
+
+#if defined(HEDLEY_IAR_VERSION)
+#  undef HEDLEY_IAR_VERSION
+#endif
+#if defined(__IAR_SYSTEMS_ICC__)
+#  if __VER__ > 1000
+#    define HEDLEY_IAR_VERSION HEDLEY_VERSION_ENCODE((__VER__ / 1000000), ((__VER__ / 1000) % 1000), (__VER__ % 1000))
+#  else
+#    define HEDLEY_IAR_VERSION HEDLEY_VERSION_ENCODE(__VER__ / 100, __VER__ % 100, 0)
+#  endif
+#endif
+
+#if defined(HEDLEY_IAR_VERSION_CHECK)
+#  undef HEDLEY_IAR_VERSION_CHECK
+#endif
+#if defined(HEDLEY_IAR_VERSION)
+#  define HEDLEY_IAR_VERSION_CHECK(major,minor,patch) (HEDLEY_IAR_VERSION >= HEDLEY_VERSION_ENCODE(major, minor, patch))
+#else
+#  define HEDLEY_IAR_VERSION_CHECK(major,minor,patch) (0)
+#endif
+
+#if defined(HEDLEY_TINYC_VERSION)
+#  undef HEDLEY_TINYC_VERSION
+#endif
+#if defined(__TINYC__)
+#  define HEDLEY_TINYC_VERSION HEDLEY_VERSION_ENCODE(__TINYC__ / 1000, (__TINYC__ / 100) % 10, __TINYC__ % 100)
+#endif
+
+#if defined(HEDLEY_TINYC_VERSION_CHECK)
+#  undef HEDLEY_TINYC_VERSION_CHECK
+#endif
+#if defined(HEDLEY_TINYC_VERSION)
+#  define HEDLEY_TINYC_VERSION_CHECK(major,minor,patch) (HEDLEY_TINYC_VERSION >= HEDLEY_VERSION_ENCODE(major, minor, patch))
+#else
+#  define HEDLEY_TINYC_VERSION_CHECK(major,minor,patch) (0)
+#endif
+
+#if defined(HEDLEY_DMC_VERSION)
+#  undef HEDLEY_DMC_VERSION
+#endif
+#if defined(__DMC__)
+#  define HEDLEY_DMC_VERSION HEDLEY_VERSION_ENCODE(__DMC__ >> 8, (__DMC__ >> 4) & 0xf, __DMC__ & 0xf)
+#endif
+
+#if defined(HEDLEY_DMC_VERSION_CHECK)
+#  undef HEDLEY_DMC_VERSION_CHECK
+#endif
+#if defined(HEDLEY_DMC_VERSION)
+#  define HEDLEY_DMC_VERSION_CHECK(major,minor,patch) (HEDLEY_DMC_VERSION >= HEDLEY_VERSION_ENCODE(major, minor, patch))
+#else
+#  define HEDLEY_DMC_VERSION_CHECK(major,minor,patch) (0)
+#endif
+
+#if defined(HEDLEY_COMPCERT_VERSION)
+#  undef HEDLEY_COMPCERT_VERSION
+#endif
+#if defined(__COMPCERT_VERSION__)
+#  define HEDLEY_COMPCERT_VERSION HEDLEY_VERSION_ENCODE(__COMPCERT_VERSION__ / 10000, (__COMPCERT_VERSION__ / 100) % 100, __COMPCERT_VERSION__ % 100)
+#endif
+
+#if defined(HEDLEY_COMPCERT_VERSION_CHECK)
+#  undef HEDLEY_COMPCERT_VERSION_CHECK
+#endif
+#if defined(HEDLEY_COMPCERT_VERSION)
+#  define HEDLEY_COMPCERT_VERSION_CHECK(major,minor,patch) (HEDLEY_COMPCERT_VERSION >= HEDLEY_VERSION_ENCODE(major, minor, patch))
+#else
+#  define HEDLEY_COMPCERT_VERSION_CHECK(major,minor,patch) (0)
+#endif
+
+#if defined(HEDLEY_PELLES_VERSION)
+#  undef HEDLEY_PELLES_VERSION
+#endif
+#if defined(__POCC__)
+#  define HEDLEY_PELLES_VERSION HEDLEY_VERSION_ENCODE(__POCC__ / 100, __POCC__ % 100, 0)
+#endif
+
+#if defined(HEDLEY_PELLES_VERSION_CHECK)
+#  undef HEDLEY_PELLES_VERSION_CHECK
+#endif
+#if defined(HEDLEY_PELLES_VERSION)
+#  define HEDLEY_PELLES_VERSION_CHECK(major,minor,patch) (HEDLEY_PELLES_VERSION >= HEDLEY_VERSION_ENCODE(major, minor, patch))
+#else
+#  define HEDLEY_PELLES_VERSION_CHECK(major,minor,patch) (0)
+#endif
+
+#if defined(HEDLEY_MCST_LCC_VERSION)
+#  undef HEDLEY_MCST_LCC_VERSION
+#endif
+#if defined(__LCC__) && defined(__LCC_MINOR__)
+#  define HEDLEY_MCST_LCC_VERSION HEDLEY_VERSION_ENCODE(__LCC__ / 100, __LCC__ % 100, __LCC_MINOR__)
+#endif
+
+#if defined(HEDLEY_MCST_LCC_VERSION_CHECK)
+#  undef HEDLEY_MCST_LCC_VERSION_CHECK
+#endif
+#if defined(HEDLEY_MCST_LCC_VERSION)
+#  define HEDLEY_MCST_LCC_VERSION_CHECK(major,minor,patch) (HEDLEY_MCST_LCC_VERSION >= HEDLEY_VERSION_ENCODE(major, minor, patch))
+#else
+#  define HEDLEY_MCST_LCC_VERSION_CHECK(major,minor,patch) (0)
+#endif
+
+#if defined(HEDLEY_GCC_VERSION)
+#  undef HEDLEY_GCC_VERSION
+#endif
+#if \
+  defined(HEDLEY_GNUC_VERSION) && \
+  !defined(__clang__) && \
+  !defined(HEDLEY_INTEL_VERSION) && \
+  !defined(HEDLEY_PGI_VERSION) && \
+  !defined(HEDLEY_ARM_VERSION) && \
+  !defined(HEDLEY_CRAY_VERSION) && \
+  !defined(HEDLEY_TI_VERSION) && \
+  !defined(HEDLEY_TI_ARMCL_VERSION) && \
+  !defined(HEDLEY_TI_CL430_VERSION) && \
+  !defined(HEDLEY_TI_CL2000_VERSION) && \
+  !defined(HEDLEY_TI_CL6X_VERSION) && \
+  !defined(HEDLEY_TI_CL7X_VERSION) && \
+  !defined(HEDLEY_TI_CLPRU_VERSION) && \
+  !defined(__COMPCERT__) && \
+  !defined(HEDLEY_MCST_LCC_VERSION)
+#  define HEDLEY_GCC_VERSION HEDLEY_GNUC_VERSION
+#endif
+
+#if defined(HEDLEY_GCC_VERSION_CHECK)
+#  undef HEDLEY_GCC_VERSION_CHECK
+#endif
+#if defined(HEDLEY_GCC_VERSION)
+#  define HEDLEY_GCC_VERSION_CHECK(major,minor,patch) (HEDLEY_GCC_VERSION >= HEDLEY_VERSION_ENCODE(major, minor, patch))
+#else
+#  define HEDLEY_GCC_VERSION_CHECK(major,minor,patch) (0)
+#endif
+
+#if defined(HEDLEY_HAS_ATTRIBUTE)
+#  undef HEDLEY_HAS_ATTRIBUTE
+#endif
+#if \
+  defined(__has_attribute) && \
+  ( \
+    (!defined(HEDLEY_IAR_VERSION) || HEDLEY_IAR_VERSION_CHECK(8,5,9)) \
+  )
+#  define HEDLEY_HAS_ATTRIBUTE(attribute) __has_attribute(attribute)
+#else
+#  define HEDLEY_HAS_ATTRIBUTE(attribute) (0)
+#endif
+
+#if defined(HEDLEY_GNUC_HAS_ATTRIBUTE)
+#  undef HEDLEY_GNUC_HAS_ATTRIBUTE
+#endif
+#if defined(__has_attribute)
+#  define HEDLEY_GNUC_HAS_ATTRIBUTE(attribute,major,minor,patch) HEDLEY_HAS_ATTRIBUTE(attribute)
+#else
+#  define HEDLEY_GNUC_HAS_ATTRIBUTE(attribute,major,minor,patch) HEDLEY_GNUC_VERSION_CHECK(major,minor,patch)
+#endif
+
+#if defined(HEDLEY_GCC_HAS_ATTRIBUTE)
+#  undef HEDLEY_GCC_HAS_ATTRIBUTE
+#endif
+#if defined(__has_attribute)
+#  define HEDLEY_GCC_HAS_ATTRIBUTE(attribute,major,minor,patch) HEDLEY_HAS_ATTRIBUTE(attribute)
+#else
+#  define HEDLEY_GCC_HAS_ATTRIBUTE(attribute,major,minor,patch) HEDLEY_GCC_VERSION_CHECK(major,minor,patch)
+#endif
+
+#if defined(HEDLEY_HAS_CPP_ATTRIBUTE)
+#  undef HEDLEY_HAS_CPP_ATTRIBUTE
+#endif
+#if \
+  defined(__has_cpp_attribute) && \
+  defined(__cplusplus) && \
+  (!defined(HEDLEY_SUNPRO_VERSION) || HEDLEY_SUNPRO_VERSION_CHECK(5,15,0))
+#  define HEDLEY_HAS_CPP_ATTRIBUTE(attribute) __has_cpp_attribute(attribute)
+#else
+#  define HEDLEY_HAS_CPP_ATTRIBUTE(attribute) (0)
+#endif
+
+#if defined(HEDLEY_HAS_CPP_ATTRIBUTE_NS)
+#  undef HEDLEY_HAS_CPP_ATTRIBUTE_NS
+#endif
+#if !defined(__cplusplus) || !defined(__has_cpp_attribute)
+#  define HEDLEY_HAS_CPP_ATTRIBUTE_NS(ns,attribute) (0)
+#elif \
+  !defined(HEDLEY_PGI_VERSION) && \
+  !defined(HEDLEY_IAR_VERSION) && \
+  (!defined(HEDLEY_SUNPRO_VERSION) || HEDLEY_SUNPRO_VERSION_CHECK(5,15,0)) && \
+  (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,20,0))
+#  define HEDLEY_HAS_CPP_ATTRIBUTE_NS(ns,attribute) HEDLEY_HAS_CPP_ATTRIBUTE(ns::attribute)
+#else
+#  define HEDLEY_HAS_CPP_ATTRIBUTE_NS(ns,attribute) (0)
+#endif
+
+#if defined(HEDLEY_GNUC_HAS_CPP_ATTRIBUTE)
+#  undef HEDLEY_GNUC_HAS_CPP_ATTRIBUTE
+#endif
+#if defined(__has_cpp_attribute) && defined(__cplusplus)
+#  define HEDLEY_GNUC_HAS_CPP_ATTRIBUTE(attribute,major,minor,patch) __has_cpp_attribute(attribute)
+#else
+#  define HEDLEY_GNUC_HAS_CPP_ATTRIBUTE(attribute,major,minor,patch) HEDLEY_GNUC_VERSION_CHECK(major,minor,patch)
+#endif
+
+#if defined(HEDLEY_GCC_HAS_CPP_ATTRIBUTE)
+#  undef HEDLEY_GCC_HAS_CPP_ATTRIBUTE
+#endif
+#if defined(__has_cpp_attribute) && defined(__cplusplus)
+#  define HEDLEY_GCC_HAS_CPP_ATTRIBUTE(attribute,major,minor,patch) __has_cpp_attribute(attribute)
+#else
+#  define HEDLEY_GCC_HAS_CPP_ATTRIBUTE(attribute,major,minor,patch) HEDLEY_GCC_VERSION_CHECK(major,minor,patch)
+#endif
+
+#if defined(HEDLEY_HAS_BUILTIN)
+#  undef HEDLEY_HAS_BUILTIN
+#endif
+#if defined(__has_builtin)
+#  define HEDLEY_HAS_BUILTIN(builtin) __has_builtin(builtin)
+#else
+#  define HEDLEY_HAS_BUILTIN(builtin) (0)
+#endif
+
+#if defined(HEDLEY_GNUC_HAS_BUILTIN)
+#  undef HEDLEY_GNUC_HAS_BUILTIN
+#endif
+#if defined(__has_builtin)
+#  define HEDLEY_GNUC_HAS_BUILTIN(builtin,major,minor,patch) __has_builtin(builtin)
+#else
+#  define HEDLEY_GNUC_HAS_BUILTIN(builtin,major,minor,patch) HEDLEY_GNUC_VERSION_CHECK(major,minor,patch)
+#endif
+
+#if defined(HEDLEY_GCC_HAS_BUILTIN)
+#  undef HEDLEY_GCC_HAS_BUILTIN
+#endif
+#if defined(__has_builtin)
+#  define HEDLEY_GCC_HAS_BUILTIN(builtin,major,minor,patch) __has_builtin(builtin)
+#else
+#  define HEDLEY_GCC_HAS_BUILTIN(builtin,major,minor,patch) HEDLEY_GCC_VERSION_CHECK(major,minor,patch)
+#endif
+
+#if defined(HEDLEY_HAS_FEATURE)
+#  undef HEDLEY_HAS_FEATURE
+#endif
+#if defined(__has_feature)
+#  define HEDLEY_HAS_FEATURE(feature) __has_feature(feature)
+#else
+#  define HEDLEY_HAS_FEATURE(feature) (0)
+#endif
+
+#if defined(HEDLEY_GNUC_HAS_FEATURE)
+#  undef HEDLEY_GNUC_HAS_FEATURE
+#endif
+#if defined(__has_feature)
+#  define HEDLEY_GNUC_HAS_FEATURE(feature,major,minor,patch) __has_feature(feature)
+#else
+#  define HEDLEY_GNUC_HAS_FEATURE(feature,major,minor,patch) HEDLEY_GNUC_VERSION_CHECK(major,minor,patch)
+#endif
+
+#if defined(HEDLEY_GCC_HAS_FEATURE)
+#  undef HEDLEY_GCC_HAS_FEATURE
+#endif
+#if defined(__has_feature)
+#  define HEDLEY_GCC_HAS_FEATURE(feature,major,minor,patch) __has_feature(feature)
+#else
+#  define HEDLEY_GCC_HAS_FEATURE(feature,major,minor,patch) HEDLEY_GCC_VERSION_CHECK(major,minor,patch)
+#endif
+
+#if defined(HEDLEY_HAS_EXTENSION)
+#  undef HEDLEY_HAS_EXTENSION
+#endif
+#if defined(__has_extension)
+#  define HEDLEY_HAS_EXTENSION(extension) __has_extension(extension)
+#else
+#  define HEDLEY_HAS_EXTENSION(extension) (0)
+#endif
+
+#if defined(HEDLEY_GNUC_HAS_EXTENSION)
+#  undef HEDLEY_GNUC_HAS_EXTENSION
+#endif
+#if defined(__has_extension)
+#  define HEDLEY_GNUC_HAS_EXTENSION(extension,major,minor,patch) __has_extension(extension)
+#else
+#  define HEDLEY_GNUC_HAS_EXTENSION(extension,major,minor,patch) HEDLEY_GNUC_VERSION_CHECK(major,minor,patch)
+#endif
+
+#if defined(HEDLEY_GCC_HAS_EXTENSION)
+#  undef HEDLEY_GCC_HAS_EXTENSION
+#endif
+#if defined(__has_extension)
+#  define HEDLEY_GCC_HAS_EXTENSION(extension,major,minor,patch) __has_extension(extension)
+#else
+#  define HEDLEY_GCC_HAS_EXTENSION(extension,major,minor,patch) HEDLEY_GCC_VERSION_CHECK(major,minor,patch)
+#endif
+
+#if defined(HEDLEY_HAS_DECLSPEC_ATTRIBUTE)
+#  undef HEDLEY_HAS_DECLSPEC_ATTRIBUTE
+#endif
+#if defined(__has_declspec_attribute)
+#  define HEDLEY_HAS_DECLSPEC_ATTRIBUTE(attribute) __has_declspec_attribute(attribute)
+#else
+#  define HEDLEY_HAS_DECLSPEC_ATTRIBUTE(attribute) (0)
+#endif
+
+#if defined(HEDLEY_GNUC_HAS_DECLSPEC_ATTRIBUTE)
+#  undef HEDLEY_GNUC_HAS_DECLSPEC_ATTRIBUTE
+#endif
+#if defined(__has_declspec_attribute)
+#  define HEDLEY_GNUC_HAS_DECLSPEC_ATTRIBUTE(attribute,major,minor,patch) __has_declspec_attribute(attribute)
+#else
+#  define HEDLEY_GNUC_HAS_DECLSPEC_ATTRIBUTE(attribute,major,minor,patch) HEDLEY_GNUC_VERSION_CHECK(major,minor,patch)
+#endif
+
+#if defined(HEDLEY_GCC_HAS_DECLSPEC_ATTRIBUTE)
+#  undef HEDLEY_GCC_HAS_DECLSPEC_ATTRIBUTE
+#endif
+#if defined(__has_declspec_attribute)
+#  define HEDLEY_GCC_HAS_DECLSPEC_ATTRIBUTE(attribute,major,minor,patch) __has_declspec_attribute(attribute)
+#else
+#  define HEDLEY_GCC_HAS_DECLSPEC_ATTRIBUTE(attribute,major,minor,patch) HEDLEY_GCC_VERSION_CHECK(major,minor,patch)
+#endif
+
+#if defined(HEDLEY_HAS_WARNING)
+#  undef HEDLEY_HAS_WARNING
+#endif
+#if defined(__has_warning)
+#  define HEDLEY_HAS_WARNING(warning) __has_warning(warning)
+#else
+#  define HEDLEY_HAS_WARNING(warning) (0)
+#endif
+
+#if defined(HEDLEY_GNUC_HAS_WARNING)
+#  undef HEDLEY_GNUC_HAS_WARNING
+#endif
+#if defined(__has_warning)
+#  define HEDLEY_GNUC_HAS_WARNING(warning,major,minor,patch) __has_warning(warning)
+#else
+#  define HEDLEY_GNUC_HAS_WARNING(warning,major,minor,patch) HEDLEY_GNUC_VERSION_CHECK(major,minor,patch)
+#endif
+
+#if defined(HEDLEY_GCC_HAS_WARNING)
+#  undef HEDLEY_GCC_HAS_WARNING
+#endif
+#if defined(__has_warning)
+#  define HEDLEY_GCC_HAS_WARNING(warning,major,minor,patch) __has_warning(warning)
+#else
+#  define HEDLEY_GCC_HAS_WARNING(warning,major,minor,patch) HEDLEY_GCC_VERSION_CHECK(major,minor,patch)
+#endif
+
+#if \
+  (defined(__STDC_VERSION__) && (__STDC_VERSION__ >= 199901L)) || \
+  defined(__clang__) || \
+  HEDLEY_GCC_VERSION_CHECK(3,0,0) || \
+  HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+  HEDLEY_IAR_VERSION_CHECK(8,0,0) || \
+  HEDLEY_PGI_VERSION_CHECK(18,4,0) || \
+  HEDLEY_ARM_VERSION_CHECK(4,1,0) || \
+  HEDLEY_TI_VERSION_CHECK(15,12,0) || \
+  HEDLEY_TI_ARMCL_VERSION_CHECK(4,7,0) || \
+  HEDLEY_TI_CL430_VERSION_CHECK(2,0,1) || \
+  HEDLEY_TI_CL2000_VERSION_CHECK(6,1,0) || \
+  HEDLEY_TI_CL6X_VERSION_CHECK(7,0,0) || \
+  HEDLEY_TI_CL7X_VERSION_CHECK(1,2,0) || \
+  HEDLEY_TI_CLPRU_VERSION_CHECK(2,1,0) || \
+  HEDLEY_CRAY_VERSION_CHECK(5,0,0) || \
+  HEDLEY_TINYC_VERSION_CHECK(0,9,17) || \
+  HEDLEY_SUNPRO_VERSION_CHECK(8,0,0) || \
+  (HEDLEY_IBM_VERSION_CHECK(10,1,0) && defined(__C99_PRAGMA_OPERATOR))
+#  define HEDLEY_PRAGMA(value) _Pragma(#value)
+#elif HEDLEY_MSVC_VERSION_CHECK(15,0,0)
+#  define HEDLEY_PRAGMA(value) __pragma(value)
+#else
+#  define HEDLEY_PRAGMA(value)
+#endif
+
+#if defined(HEDLEY_DIAGNOSTIC_PUSH)
+#  undef HEDLEY_DIAGNOSTIC_PUSH
+#endif
+#if defined(HEDLEY_DIAGNOSTIC_POP)
+#  undef HEDLEY_DIAGNOSTIC_POP
+#endif
+#if defined(__clang__)
+#  define HEDLEY_DIAGNOSTIC_PUSH _Pragma("clang diagnostic push")
+#  define HEDLEY_DIAGNOSTIC_POP _Pragma("clang diagnostic pop")
+#elif HEDLEY_INTEL_VERSION_CHECK(13,0,0)
+#  define HEDLEY_DIAGNOSTIC_PUSH _Pragma("warning(push)")
+#  define HEDLEY_DIAGNOSTIC_POP _Pragma("warning(pop)")
+#elif HEDLEY_GCC_VERSION_CHECK(4,6,0)
+#  define HEDLEY_DIAGNOSTIC_PUSH _Pragma("GCC diagnostic push")
+#  define HEDLEY_DIAGNOSTIC_POP _Pragma("GCC diagnostic pop")
+#elif \
+  HEDLEY_MSVC_VERSION_CHECK(15,0,0) || \
+  HEDLEY_INTEL_CL_VERSION_CHECK(2021,1,0)
+#  define HEDLEY_DIAGNOSTIC_PUSH __pragma(warning(push))
+#  define HEDLEY_DIAGNOSTIC_POP __pragma(warning(pop))
+#elif HEDLEY_ARM_VERSION_CHECK(5,6,0)
+#  define HEDLEY_DIAGNOSTIC_PUSH _Pragma("push")
+#  define HEDLEY_DIAGNOSTIC_POP _Pragma("pop")
+#elif \
+    HEDLEY_TI_VERSION_CHECK(15,12,0) || \
+    HEDLEY_TI_ARMCL_VERSION_CHECK(5,2,0) || \
+    HEDLEY_TI_CL430_VERSION_CHECK(4,4,0) || \
+    HEDLEY_TI_CL6X_VERSION_CHECK(8,1,0) || \
+    HEDLEY_TI_CL7X_VERSION_CHECK(1,2,0) || \
+    HEDLEY_TI_CLPRU_VERSION_CHECK(2,1,0)
+#  define HEDLEY_DIAGNOSTIC_PUSH _Pragma("diag_push")
+#  define HEDLEY_DIAGNOSTIC_POP _Pragma("diag_pop")
+#elif HEDLEY_PELLES_VERSION_CHECK(2,90,0)
+#  define HEDLEY_DIAGNOSTIC_PUSH _Pragma("warning(push)")
+#  define HEDLEY_DIAGNOSTIC_POP _Pragma("warning(pop)")
+#else
+#  define HEDLEY_DIAGNOSTIC_PUSH
+#  define HEDLEY_DIAGNOSTIC_POP
+#endif
+
+/* HEDLEY_DIAGNOSTIC_DISABLE_CPP98_COMPAT_WRAP_ is for
+   HEDLEY INTERNAL USE ONLY.  API subject to change without notice. */
+#if defined(HEDLEY_DIAGNOSTIC_DISABLE_CPP98_COMPAT_WRAP_)
+#  undef HEDLEY_DIAGNOSTIC_DISABLE_CPP98_COMPAT_WRAP_
+#endif
+#if defined(__cplusplus)
+#  if HEDLEY_HAS_WARNING("-Wc++98-compat")
+#    if HEDLEY_HAS_WARNING("-Wc++17-extensions")
+#      if HEDLEY_HAS_WARNING("-Wc++1z-extensions")
+#        define HEDLEY_DIAGNOSTIC_DISABLE_CPP98_COMPAT_WRAP_(xpr) \
+           HEDLEY_DIAGNOSTIC_PUSH \
+           _Pragma("clang diagnostic ignored \"-Wc++98-compat\"") \
+           _Pragma("clang diagnostic ignored \"-Wc++17-extensions\"") \
+           _Pragma("clang diagnostic ignored \"-Wc++1z-extensions\"") \
+           xpr \
+           HEDLEY_DIAGNOSTIC_POP
+#      else
+#        define HEDLEY_DIAGNOSTIC_DISABLE_CPP98_COMPAT_WRAP_(xpr) \
+           HEDLEY_DIAGNOSTIC_PUSH \
+           _Pragma("clang diagnostic ignored \"-Wc++98-compat\"") \
+           _Pragma("clang diagnostic ignored \"-Wc++17-extensions\"") \
+           xpr \
+           HEDLEY_DIAGNOSTIC_POP
+#      endif
+#    else
+#      define HEDLEY_DIAGNOSTIC_DISABLE_CPP98_COMPAT_WRAP_(xpr) \
+         HEDLEY_DIAGNOSTIC_PUSH \
+         _Pragma("clang diagnostic ignored \"-Wc++98-compat\"") \
+         xpr \
+         HEDLEY_DIAGNOSTIC_POP
+#    endif
+#  endif
+#endif
+#if !defined(HEDLEY_DIAGNOSTIC_DISABLE_CPP98_COMPAT_WRAP_)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_CPP98_COMPAT_WRAP_(x) x
+#endif
+
+#if defined(HEDLEY_CONST_CAST)
+#  undef HEDLEY_CONST_CAST
+#endif
+#if defined(__cplusplus)
+#  define HEDLEY_CONST_CAST(T, expr) (const_cast<T>(expr))
+#elif \
+  HEDLEY_HAS_WARNING("-Wcast-qual") || \
+  HEDLEY_GCC_VERSION_CHECK(4,6,0) || \
+  HEDLEY_INTEL_VERSION_CHECK(13,0,0)
+#  define HEDLEY_CONST_CAST(T, expr) (__extension__ ({ \
+      HEDLEY_DIAGNOSTIC_PUSH \
+      HEDLEY_DIAGNOSTIC_DISABLE_CAST_QUAL \
+      ((T) (expr)); \
+      HEDLEY_DIAGNOSTIC_POP \
+    }))
+#else
+#  define HEDLEY_CONST_CAST(T, expr) ((T) (expr))
+#endif
+
+#if defined(HEDLEY_REINTERPRET_CAST)
+#  undef HEDLEY_REINTERPRET_CAST
+#endif
+#if defined(__cplusplus)
+#  define HEDLEY_REINTERPRET_CAST(T, expr) (reinterpret_cast<T>(expr))
+#else
+#  define HEDLEY_REINTERPRET_CAST(T, expr) ((T) (expr))
+#endif
+
+#if defined(HEDLEY_STATIC_CAST)
+#  undef HEDLEY_STATIC_CAST
+#endif
+#if defined(__cplusplus)
+#  define HEDLEY_STATIC_CAST(T, expr) (static_cast<T>(expr))
+#else
+#  define HEDLEY_STATIC_CAST(T, expr) ((T) (expr))
+#endif
+
+#if defined(HEDLEY_CPP_CAST)
+#  undef HEDLEY_CPP_CAST
+#endif
+#if defined(__cplusplus)
+#  if HEDLEY_HAS_WARNING("-Wold-style-cast")
+#    define HEDLEY_CPP_CAST(T, expr) \
+       HEDLEY_DIAGNOSTIC_PUSH \
+       _Pragma("clang diagnostic ignored \"-Wold-style-cast\"") \
+       ((T) (expr)) \
+       HEDLEY_DIAGNOSTIC_POP
+#  elif HEDLEY_IAR_VERSION_CHECK(8,3,0)
+#    define HEDLEY_CPP_CAST(T, expr) \
+       HEDLEY_DIAGNOSTIC_PUSH \
+       _Pragma("diag_suppress=Pe137") \
+       HEDLEY_DIAGNOSTIC_POP
+#  else
+#    define HEDLEY_CPP_CAST(T, expr) ((T) (expr))
+#  endif
+#else
+#  define HEDLEY_CPP_CAST(T, expr) (expr)
+#endif
+
+#if defined(HEDLEY_DIAGNOSTIC_DISABLE_DEPRECATED)
+#  undef HEDLEY_DIAGNOSTIC_DISABLE_DEPRECATED
+#endif
+#if HEDLEY_HAS_WARNING("-Wdeprecated-declarations")
+#  define HEDLEY_DIAGNOSTIC_DISABLE_DEPRECATED _Pragma("clang diagnostic ignored \"-Wdeprecated-declarations\"")
+#elif HEDLEY_INTEL_VERSION_CHECK(13,0,0)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_DEPRECATED _Pragma("warning(disable:1478 1786)")
+#elif HEDLEY_INTEL_CL_VERSION_CHECK(2021,1,0)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_DEPRECATED __pragma(warning(disable:1478 1786))
+#elif HEDLEY_PGI_VERSION_CHECK(20,7,0)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_DEPRECATED _Pragma("diag_suppress 1215,1216,1444,1445")
+#elif HEDLEY_PGI_VERSION_CHECK(17,10,0)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_DEPRECATED _Pragma("diag_suppress 1215,1444")
+#elif HEDLEY_GCC_VERSION_CHECK(4,3,0)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_DEPRECATED _Pragma("GCC diagnostic ignored \"-Wdeprecated-declarations\"")
+#elif HEDLEY_MSVC_VERSION_CHECK(15,0,0)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_DEPRECATED __pragma(warning(disable:4996))
+#elif HEDLEY_MCST_LCC_VERSION_CHECK(1,25,10)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_DEPRECATED _Pragma("diag_suppress 1215,1444")
+#elif \
+    HEDLEY_TI_VERSION_CHECK(15,12,0) || \
+    (HEDLEY_TI_ARMCL_VERSION_CHECK(4,8,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+    HEDLEY_TI_ARMCL_VERSION_CHECK(5,2,0) || \
+    (HEDLEY_TI_CL2000_VERSION_CHECK(6,0,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+    HEDLEY_TI_CL2000_VERSION_CHECK(6,4,0) || \
+    (HEDLEY_TI_CL430_VERSION_CHECK(4,0,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+    HEDLEY_TI_CL430_VERSION_CHECK(4,3,0) || \
+    (HEDLEY_TI_CL6X_VERSION_CHECK(7,2,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+    HEDLEY_TI_CL6X_VERSION_CHECK(7,5,0) || \
+    HEDLEY_TI_CL7X_VERSION_CHECK(1,2,0) || \
+    HEDLEY_TI_CLPRU_VERSION_CHECK(2,1,0)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_DEPRECATED _Pragma("diag_suppress 1291,1718")
+#elif HEDLEY_SUNPRO_VERSION_CHECK(5,13,0) && !defined(__cplusplus)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_DEPRECATED _Pragma("error_messages(off,E_DEPRECATED_ATT,E_DEPRECATED_ATT_MESS)")
+#elif HEDLEY_SUNPRO_VERSION_CHECK(5,13,0) && defined(__cplusplus)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_DEPRECATED _Pragma("error_messages(off,symdeprecated,symdeprecated2)")
+#elif HEDLEY_IAR_VERSION_CHECK(8,0,0)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_DEPRECATED _Pragma("diag_suppress=Pe1444,Pe1215")
+#elif HEDLEY_PELLES_VERSION_CHECK(2,90,0)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_DEPRECATED _Pragma("warn(disable:2241)")
+#else
+#  define HEDLEY_DIAGNOSTIC_DISABLE_DEPRECATED
+#endif
+
+#if defined(HEDLEY_DIAGNOSTIC_DISABLE_UNKNOWN_PRAGMAS)
+#  undef HEDLEY_DIAGNOSTIC_DISABLE_UNKNOWN_PRAGMAS
+#endif
+#if HEDLEY_HAS_WARNING("-Wunknown-pragmas")
+#  define HEDLEY_DIAGNOSTIC_DISABLE_UNKNOWN_PRAGMAS _Pragma("clang diagnostic ignored \"-Wunknown-pragmas\"")
+#elif HEDLEY_INTEL_VERSION_CHECK(13,0,0)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_UNKNOWN_PRAGMAS _Pragma("warning(disable:161)")
+#elif HEDLEY_INTEL_CL_VERSION_CHECK(2021,1,0)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_UNKNOWN_PRAGMAS __pragma(warning(disable:161))
+#elif HEDLEY_PGI_VERSION_CHECK(17,10,0)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_UNKNOWN_PRAGMAS _Pragma("diag_suppress 1675")
+#elif HEDLEY_GCC_VERSION_CHECK(4,3,0)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_UNKNOWN_PRAGMAS _Pragma("GCC diagnostic ignored \"-Wunknown-pragmas\"")
+#elif HEDLEY_MSVC_VERSION_CHECK(15,0,0)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_UNKNOWN_PRAGMAS __pragma(warning(disable:4068))
+#elif \
+    HEDLEY_TI_VERSION_CHECK(16,9,0) || \
+    HEDLEY_TI_CL6X_VERSION_CHECK(8,0,0) || \
+    HEDLEY_TI_CL7X_VERSION_CHECK(1,2,0) || \
+    HEDLEY_TI_CLPRU_VERSION_CHECK(2,3,0)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_UNKNOWN_PRAGMAS _Pragma("diag_suppress 163")
+#elif HEDLEY_TI_CL6X_VERSION_CHECK(8,0,0)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_UNKNOWN_PRAGMAS _Pragma("diag_suppress 163")
+#elif HEDLEY_IAR_VERSION_CHECK(8,0,0)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_UNKNOWN_PRAGMAS _Pragma("diag_suppress=Pe161")
+#elif HEDLEY_MCST_LCC_VERSION_CHECK(1,25,10)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_UNKNOWN_PRAGMAS _Pragma("diag_suppress 161")
+#else
+#  define HEDLEY_DIAGNOSTIC_DISABLE_UNKNOWN_PRAGMAS
+#endif
+
+#if defined(HEDLEY_DIAGNOSTIC_DISABLE_UNKNOWN_CPP_ATTRIBUTES)
+#  undef HEDLEY_DIAGNOSTIC_DISABLE_UNKNOWN_CPP_ATTRIBUTES
+#endif
+#if HEDLEY_HAS_WARNING("-Wunknown-attributes")
+#  define HEDLEY_DIAGNOSTIC_DISABLE_UNKNOWN_CPP_ATTRIBUTES _Pragma("clang diagnostic ignored \"-Wunknown-attributes\"")
+#elif HEDLEY_GCC_VERSION_CHECK(4,6,0)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_UNKNOWN_CPP_ATTRIBUTES _Pragma("GCC diagnostic ignored \"-Wdeprecated-declarations\"")
+#elif HEDLEY_INTEL_VERSION_CHECK(17,0,0)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_UNKNOWN_CPP_ATTRIBUTES _Pragma("warning(disable:1292)")
+#elif HEDLEY_INTEL_CL_VERSION_CHECK(2021,1,0)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_UNKNOWN_CPP_ATTRIBUTES __pragma(warning(disable:1292))
+#elif HEDLEY_MSVC_VERSION_CHECK(19,0,0)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_UNKNOWN_CPP_ATTRIBUTES __pragma(warning(disable:5030))
+#elif HEDLEY_PGI_VERSION_CHECK(20,7,0)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_UNKNOWN_CPP_ATTRIBUTES _Pragma("diag_suppress 1097,1098")
+#elif HEDLEY_PGI_VERSION_CHECK(17,10,0)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_UNKNOWN_CPP_ATTRIBUTES _Pragma("diag_suppress 1097")
+#elif HEDLEY_SUNPRO_VERSION_CHECK(5,14,0) && defined(__cplusplus)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_UNKNOWN_CPP_ATTRIBUTES _Pragma("error_messages(off,attrskipunsup)")
+#elif \
+    HEDLEY_TI_VERSION_CHECK(18,1,0) || \
+    HEDLEY_TI_CL6X_VERSION_CHECK(8,3,0) || \
+    HEDLEY_TI_CL7X_VERSION_CHECK(1,2,0)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_UNKNOWN_CPP_ATTRIBUTES _Pragma("diag_suppress 1173")
+#elif HEDLEY_IAR_VERSION_CHECK(8,0,0)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_UNKNOWN_CPP_ATTRIBUTES _Pragma("diag_suppress=Pe1097")
+#elif HEDLEY_MCST_LCC_VERSION_CHECK(1,25,10)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_UNKNOWN_CPP_ATTRIBUTES _Pragma("diag_suppress 1097")
+#else
+#  define HEDLEY_DIAGNOSTIC_DISABLE_UNKNOWN_CPP_ATTRIBUTES
+#endif
+
+#if defined(HEDLEY_DIAGNOSTIC_DISABLE_CAST_QUAL)
+#  undef HEDLEY_DIAGNOSTIC_DISABLE_CAST_QUAL
+#endif
+#if HEDLEY_HAS_WARNING("-Wcast-qual")
+#  define HEDLEY_DIAGNOSTIC_DISABLE_CAST_QUAL _Pragma("clang diagnostic ignored \"-Wcast-qual\"")
+#elif HEDLEY_INTEL_VERSION_CHECK(13,0,0)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_CAST_QUAL _Pragma("warning(disable:2203 2331)")
+#elif HEDLEY_GCC_VERSION_CHECK(3,0,0)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_CAST_QUAL _Pragma("GCC diagnostic ignored \"-Wcast-qual\"")
+#else
+#  define HEDLEY_DIAGNOSTIC_DISABLE_CAST_QUAL
+#endif
+
+#if defined(HEDLEY_DIAGNOSTIC_DISABLE_UNUSED_FUNCTION)
+#  undef HEDLEY_DIAGNOSTIC_DISABLE_UNUSED_FUNCTION
+#endif
+#if HEDLEY_HAS_WARNING("-Wunused-function")
+#  define HEDLEY_DIAGNOSTIC_DISABLE_UNUSED_FUNCTION _Pragma("clang diagnostic ignored \"-Wunused-function\"")
+#elif HEDLEY_GCC_VERSION_CHECK(3,4,0)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_UNUSED_FUNCTION _Pragma("GCC diagnostic ignored \"-Wunused-function\"")
+#elif HEDLEY_MSVC_VERSION_CHECK(1,0,0)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_UNUSED_FUNCTION __pragma(warning(disable:4505))
+#elif HEDLEY_MCST_LCC_VERSION_CHECK(1,25,10)
+#  define HEDLEY_DIAGNOSTIC_DISABLE_UNUSED_FUNCTION _Pragma("diag_suppress 3142")
+#else
+#  define HEDLEY_DIAGNOSTIC_DISABLE_UNUSED_FUNCTION
+#endif
+
+#if defined(HEDLEY_DEPRECATED)
+#  undef HEDLEY_DEPRECATED
+#endif
+#if defined(HEDLEY_DEPRECATED_FOR)
+#  undef HEDLEY_DEPRECATED_FOR
+#endif
+#if \
+  HEDLEY_MSVC_VERSION_CHECK(14,0,0) || \
+  HEDLEY_INTEL_CL_VERSION_CHECK(2021,1,0)
+#  define HEDLEY_DEPRECATED(since) __declspec(deprecated("Since " # since))
+#  define HEDLEY_DEPRECATED_FOR(since, replacement) __declspec(deprecated("Since " #since "; use " #replacement))
+#elif \
+  (HEDLEY_HAS_EXTENSION(attribute_deprecated_with_message) && !defined(HEDLEY_IAR_VERSION)) || \
+  HEDLEY_GCC_VERSION_CHECK(4,5,0) || \
+  HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+  HEDLEY_ARM_VERSION_CHECK(5,6,0) || \
+  HEDLEY_SUNPRO_VERSION_CHECK(5,13,0) || \
+  HEDLEY_PGI_VERSION_CHECK(17,10,0) || \
+  HEDLEY_TI_VERSION_CHECK(18,1,0) || \
+  HEDLEY_TI_ARMCL_VERSION_CHECK(18,1,0) || \
+  HEDLEY_TI_CL6X_VERSION_CHECK(8,3,0) || \
+  HEDLEY_TI_CL7X_VERSION_CHECK(1,2,0) || \
+  HEDLEY_TI_CLPRU_VERSION_CHECK(2,3,0) || \
+  HEDLEY_MCST_LCC_VERSION_CHECK(1,25,10)
+#  define HEDLEY_DEPRECATED(since) __attribute__((__deprecated__("Since " #since)))
+#  define HEDLEY_DEPRECATED_FOR(since, replacement) __attribute__((__deprecated__("Since " #since "; use " #replacement)))
+#elif defined(__cplusplus) && (__cplusplus >= 201402L)
+#  define HEDLEY_DEPRECATED(since) HEDLEY_DIAGNOSTIC_DISABLE_CPP98_COMPAT_WRAP_([[deprecated("Since " #since)]])
+#  define HEDLEY_DEPRECATED_FOR(since, replacement) HEDLEY_DIAGNOSTIC_DISABLE_CPP98_COMPAT_WRAP_([[deprecated("Since " #since "; use " #replacement)]])
+#elif \
+  HEDLEY_HAS_ATTRIBUTE(deprecated) || \
+  HEDLEY_GCC_VERSION_CHECK(3,1,0) || \
+  HEDLEY_ARM_VERSION_CHECK(4,1,0) || \
+  HEDLEY_TI_VERSION_CHECK(15,12,0) || \
+  (HEDLEY_TI_ARMCL_VERSION_CHECK(4,8,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_ARMCL_VERSION_CHECK(5,2,0) || \
+  (HEDLEY_TI_CL2000_VERSION_CHECK(6,0,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_CL2000_VERSION_CHECK(6,4,0) || \
+  (HEDLEY_TI_CL430_VERSION_CHECK(4,0,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_CL430_VERSION_CHECK(4,3,0) || \
+  (HEDLEY_TI_CL6X_VERSION_CHECK(7,2,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_CL6X_VERSION_CHECK(7,5,0) || \
+  HEDLEY_TI_CL7X_VERSION_CHECK(1,2,0) || \
+  HEDLEY_TI_CLPRU_VERSION_CHECK(2,1,0) || \
+  HEDLEY_MCST_LCC_VERSION_CHECK(1,25,10) || \
+  HEDLEY_IAR_VERSION_CHECK(8,10,0)
+#  define HEDLEY_DEPRECATED(since) __attribute__((__deprecated__))
+#  define HEDLEY_DEPRECATED_FOR(since, replacement) __attribute__((__deprecated__))
+#elif \
+  HEDLEY_MSVC_VERSION_CHECK(13,10,0) || \
+  HEDLEY_PELLES_VERSION_CHECK(6,50,0) || \
+  HEDLEY_INTEL_CL_VERSION_CHECK(2021,1,0)
+#  define HEDLEY_DEPRECATED(since) __declspec(deprecated)
+#  define HEDLEY_DEPRECATED_FOR(since, replacement) __declspec(deprecated)
+#elif HEDLEY_IAR_VERSION_CHECK(8,0,0)
+#  define HEDLEY_DEPRECATED(since) _Pragma("deprecated")
+#  define HEDLEY_DEPRECATED_FOR(since, replacement) _Pragma("deprecated")
+#else
+#  define HEDLEY_DEPRECATED(since)
+#  define HEDLEY_DEPRECATED_FOR(since, replacement)
+#endif
+
+#if defined(HEDLEY_UNAVAILABLE)
+#  undef HEDLEY_UNAVAILABLE
+#endif
+#if \
+  HEDLEY_HAS_ATTRIBUTE(warning) || \
+  HEDLEY_GCC_VERSION_CHECK(4,3,0) || \
+  HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+  HEDLEY_MCST_LCC_VERSION_CHECK(1,25,10)
+#  define HEDLEY_UNAVAILABLE(available_since) __attribute__((__warning__("Not available until " #available_since)))
+#else
+#  define HEDLEY_UNAVAILABLE(available_since)
+#endif
+
+#if defined(HEDLEY_WARN_UNUSED_RESULT)
+#  undef HEDLEY_WARN_UNUSED_RESULT
+#endif
+#if defined(HEDLEY_WARN_UNUSED_RESULT_MSG)
+#  undef HEDLEY_WARN_UNUSED_RESULT_MSG
+#endif
+#if \
+  HEDLEY_HAS_ATTRIBUTE(warn_unused_result) || \
+  HEDLEY_GCC_VERSION_CHECK(3,4,0) || \
+  HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+  HEDLEY_TI_VERSION_CHECK(15,12,0) || \
+  (HEDLEY_TI_ARMCL_VERSION_CHECK(4,8,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_ARMCL_VERSION_CHECK(5,2,0) || \
+  (HEDLEY_TI_CL2000_VERSION_CHECK(6,0,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_CL2000_VERSION_CHECK(6,4,0) || \
+  (HEDLEY_TI_CL430_VERSION_CHECK(4,0,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_CL430_VERSION_CHECK(4,3,0) || \
+  (HEDLEY_TI_CL6X_VERSION_CHECK(7,2,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_CL6X_VERSION_CHECK(7,5,0) || \
+  HEDLEY_TI_CL7X_VERSION_CHECK(1,2,0) || \
+  HEDLEY_TI_CLPRU_VERSION_CHECK(2,1,0) || \
+  (HEDLEY_SUNPRO_VERSION_CHECK(5,15,0) && defined(__cplusplus)) || \
+  HEDLEY_PGI_VERSION_CHECK(17,10,0) || \
+  HEDLEY_MCST_LCC_VERSION_CHECK(1,25,10)
+#  define HEDLEY_WARN_UNUSED_RESULT __attribute__((__warn_unused_result__))
+#  define HEDLEY_WARN_UNUSED_RESULT_MSG(msg) __attribute__((__warn_unused_result__))
+#elif (HEDLEY_HAS_CPP_ATTRIBUTE(nodiscard) >= 201907L)
+#  define HEDLEY_WARN_UNUSED_RESULT HEDLEY_DIAGNOSTIC_DISABLE_CPP98_COMPAT_WRAP_([[nodiscard]])
+#  define HEDLEY_WARN_UNUSED_RESULT_MSG(msg) HEDLEY_DIAGNOSTIC_DISABLE_CPP98_COMPAT_WRAP_([[nodiscard(msg)]])
+#elif HEDLEY_HAS_CPP_ATTRIBUTE(nodiscard)
+#  define HEDLEY_WARN_UNUSED_RESULT HEDLEY_DIAGNOSTIC_DISABLE_CPP98_COMPAT_WRAP_([[nodiscard]])
+#  define HEDLEY_WARN_UNUSED_RESULT_MSG(msg) HEDLEY_DIAGNOSTIC_DISABLE_CPP98_COMPAT_WRAP_([[nodiscard]])
+#elif defined(_Check_return_) /* SAL */
+#  define HEDLEY_WARN_UNUSED_RESULT _Check_return_
+#  define HEDLEY_WARN_UNUSED_RESULT_MSG(msg) _Check_return_
+#else
+#  define HEDLEY_WARN_UNUSED_RESULT
+#  define HEDLEY_WARN_UNUSED_RESULT_MSG(msg)
+#endif
+
+#if defined(HEDLEY_SENTINEL)
+#  undef HEDLEY_SENTINEL
+#endif
+#if \
+  HEDLEY_HAS_ATTRIBUTE(sentinel) || \
+  HEDLEY_GCC_VERSION_CHECK(4,0,0) || \
+  HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+  HEDLEY_ARM_VERSION_CHECK(5,4,0) || \
+  HEDLEY_MCST_LCC_VERSION_CHECK(1,25,10)
+#  define HEDLEY_SENTINEL(position) __attribute__((__sentinel__(position)))
+#else
+#  define HEDLEY_SENTINEL(position)
+#endif
+
+#if defined(HEDLEY_NO_RETURN)
+#  undef HEDLEY_NO_RETURN
+#endif
+#if HEDLEY_IAR_VERSION_CHECK(8,0,0)
+#  define HEDLEY_NO_RETURN __noreturn
+#elif \
+  HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+  HEDLEY_MCST_LCC_VERSION_CHECK(1,25,10)
+#  define HEDLEY_NO_RETURN __attribute__((__noreturn__))
+#elif defined(__STDC_VERSION__) && __STDC_VERSION__ >= 201112L
+#  define HEDLEY_NO_RETURN _Noreturn
+#elif defined(__cplusplus) && (__cplusplus >= 201103L)
+#  define HEDLEY_NO_RETURN HEDLEY_DIAGNOSTIC_DISABLE_CPP98_COMPAT_WRAP_([[noreturn]])
+#elif \
+  HEDLEY_HAS_ATTRIBUTE(noreturn) || \
+  HEDLEY_GCC_VERSION_CHECK(3,2,0) || \
+  HEDLEY_SUNPRO_VERSION_CHECK(5,11,0) || \
+  HEDLEY_ARM_VERSION_CHECK(4,1,0) || \
+  HEDLEY_IBM_VERSION_CHECK(10,1,0) || \
+  HEDLEY_TI_VERSION_CHECK(15,12,0) || \
+  (HEDLEY_TI_ARMCL_VERSION_CHECK(4,8,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_ARMCL_VERSION_CHECK(5,2,0) || \
+  (HEDLEY_TI_CL2000_VERSION_CHECK(6,0,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_CL2000_VERSION_CHECK(6,4,0) || \
+  (HEDLEY_TI_CL430_VERSION_CHECK(4,0,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_CL430_VERSION_CHECK(4,3,0) || \
+  (HEDLEY_TI_CL6X_VERSION_CHECK(7,2,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_CL6X_VERSION_CHECK(7,5,0) || \
+  HEDLEY_TI_CL7X_VERSION_CHECK(1,2,0) || \
+  HEDLEY_TI_CLPRU_VERSION_CHECK(2,1,0) || \
+  HEDLEY_IAR_VERSION_CHECK(8,10,0)
+#  define HEDLEY_NO_RETURN __attribute__((__noreturn__))
+#elif HEDLEY_SUNPRO_VERSION_CHECK(5,10,0)
+#  define HEDLEY_NO_RETURN _Pragma("does_not_return")
+#elif \
+  HEDLEY_MSVC_VERSION_CHECK(13,10,0) || \
+  HEDLEY_INTEL_CL_VERSION_CHECK(2021,1,0)
+#  define HEDLEY_NO_RETURN __declspec(noreturn)
+#elif HEDLEY_TI_CL6X_VERSION_CHECK(6,0,0) && defined(__cplusplus)
+#  define HEDLEY_NO_RETURN _Pragma("FUNC_NEVER_RETURNS;")
+#elif HEDLEY_COMPCERT_VERSION_CHECK(3,2,0)
+#  define HEDLEY_NO_RETURN __attribute((noreturn))
+#elif HEDLEY_PELLES_VERSION_CHECK(9,0,0)
+#  define HEDLEY_NO_RETURN __declspec(noreturn)
+#else
+#  define HEDLEY_NO_RETURN
+#endif
+
+#if defined(HEDLEY_NO_ESCAPE)
+#  undef HEDLEY_NO_ESCAPE
+#endif
+#if HEDLEY_HAS_ATTRIBUTE(noescape)
+#  define HEDLEY_NO_ESCAPE __attribute__((__noescape__))
+#else
+#  define HEDLEY_NO_ESCAPE
+#endif
+
+#if defined(HEDLEY_UNREACHABLE)
+#  undef HEDLEY_UNREACHABLE
+#endif
+#if defined(HEDLEY_UNREACHABLE_RETURN)
+#  undef HEDLEY_UNREACHABLE_RETURN
+#endif
+#if defined(HEDLEY_ASSUME)
+#  undef HEDLEY_ASSUME
+#endif
+#if \
+  HEDLEY_MSVC_VERSION_CHECK(13,10,0) || \
+  HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+  HEDLEY_INTEL_CL_VERSION_CHECK(2021,1,0)
+#  define HEDLEY_ASSUME(expr) __assume(expr)
+#elif HEDLEY_HAS_BUILTIN(__builtin_assume)
+#  define HEDLEY_ASSUME(expr) __builtin_assume(expr)
+#elif \
+    HEDLEY_TI_CL2000_VERSION_CHECK(6,2,0) || \
+    HEDLEY_TI_CL6X_VERSION_CHECK(4,0,0)
+#  if defined(__cplusplus)
+#    define HEDLEY_ASSUME(expr) std::_nassert(expr)
+#  else
+#    define HEDLEY_ASSUME(expr) _nassert(expr)
+#  endif
+#endif
+#if \
+  (HEDLEY_HAS_BUILTIN(__builtin_unreachable) && (!defined(HEDLEY_ARM_VERSION))) || \
+  HEDLEY_GCC_VERSION_CHECK(4,5,0) || \
+  HEDLEY_PGI_VERSION_CHECK(18,10,0) || \
+  HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+  HEDLEY_IBM_VERSION_CHECK(13,1,5) || \
+  HEDLEY_CRAY_VERSION_CHECK(10,0,0) || \
+  HEDLEY_MCST_LCC_VERSION_CHECK(1,25,10)
+#  define HEDLEY_UNREACHABLE() __builtin_unreachable()
+#elif defined(HEDLEY_ASSUME)
+#  define HEDLEY_UNREACHABLE() HEDLEY_ASSUME(0)
+#endif
+#if !defined(HEDLEY_ASSUME)
+#  if defined(HEDLEY_UNREACHABLE)
+#    define HEDLEY_ASSUME(expr) HEDLEY_STATIC_CAST(void, ((expr) ? 1 : (HEDLEY_UNREACHABLE(), 1)))
+#  else
+#    define HEDLEY_ASSUME(expr) HEDLEY_STATIC_CAST(void, expr)
+#  endif
+#endif
+#if defined(HEDLEY_UNREACHABLE)
+#  if  \
+      HEDLEY_TI_CL2000_VERSION_CHECK(6,2,0) || \
+      HEDLEY_TI_CL6X_VERSION_CHECK(4,0,0)
+#    define HEDLEY_UNREACHABLE_RETURN(value) return (HEDLEY_STATIC_CAST(void, HEDLEY_ASSUME(0)), (value))
+#  else
+#    define HEDLEY_UNREACHABLE_RETURN(value) HEDLEY_UNREACHABLE()
+#  endif
+#else
+#  define HEDLEY_UNREACHABLE_RETURN(value) return (value)
+#endif
+#if !defined(HEDLEY_UNREACHABLE)
+#  define HEDLEY_UNREACHABLE() HEDLEY_ASSUME(0)
+#endif
+
+HEDLEY_DIAGNOSTIC_PUSH
+#if HEDLEY_HAS_WARNING("-Wpedantic")
+#  pragma clang diagnostic ignored "-Wpedantic"
+#endif
+#if HEDLEY_HAS_WARNING("-Wc++98-compat-pedantic") && defined(__cplusplus)
+#  pragma clang diagnostic ignored "-Wc++98-compat-pedantic"
+#endif
+#if HEDLEY_GCC_HAS_WARNING("-Wvariadic-macros",4,0,0)
+#  if defined(__clang__)
+#    pragma clang diagnostic ignored "-Wvariadic-macros"
+#  elif defined(HEDLEY_GCC_VERSION)
+#    pragma GCC diagnostic ignored "-Wvariadic-macros"
+#  endif
+#endif
+#if defined(HEDLEY_NON_NULL)
+#  undef HEDLEY_NON_NULL
+#endif
+#if \
+  HEDLEY_HAS_ATTRIBUTE(nonnull) || \
+  HEDLEY_GCC_VERSION_CHECK(3,3,0) || \
+  HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+  HEDLEY_ARM_VERSION_CHECK(4,1,0)
+#  define HEDLEY_NON_NULL(...) __attribute__((__nonnull__(__VA_ARGS__)))
+#else
+#  define HEDLEY_NON_NULL(...)
+#endif
+HEDLEY_DIAGNOSTIC_POP
+
+#if defined(HEDLEY_PRINTF_FORMAT)
+#  undef HEDLEY_PRINTF_FORMAT
+#endif
+#if defined(__MINGW32__) && HEDLEY_GCC_HAS_ATTRIBUTE(format,4,4,0) && !defined(__USE_MINGW_ANSI_STDIO)
+#  define HEDLEY_PRINTF_FORMAT(string_idx,first_to_check) __attribute__((__format__(ms_printf, string_idx, first_to_check)))
+#elif defined(__MINGW32__) && HEDLEY_GCC_HAS_ATTRIBUTE(format,4,4,0) && defined(__USE_MINGW_ANSI_STDIO)
+#  define HEDLEY_PRINTF_FORMAT(string_idx,first_to_check) __attribute__((__format__(gnu_printf, string_idx, first_to_check)))
+#elif \
+  HEDLEY_HAS_ATTRIBUTE(format) || \
+  HEDLEY_GCC_VERSION_CHECK(3,1,0) || \
+  HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+  HEDLEY_ARM_VERSION_CHECK(5,6,0) || \
+  HEDLEY_IBM_VERSION_CHECK(10,1,0) || \
+  HEDLEY_TI_VERSION_CHECK(15,12,0) || \
+  (HEDLEY_TI_ARMCL_VERSION_CHECK(4,8,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_ARMCL_VERSION_CHECK(5,2,0) || \
+  (HEDLEY_TI_CL2000_VERSION_CHECK(6,0,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_CL2000_VERSION_CHECK(6,4,0) || \
+  (HEDLEY_TI_CL430_VERSION_CHECK(4,0,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_CL430_VERSION_CHECK(4,3,0) || \
+  (HEDLEY_TI_CL6X_VERSION_CHECK(7,2,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_CL6X_VERSION_CHECK(7,5,0) || \
+  HEDLEY_TI_CL7X_VERSION_CHECK(1,2,0) || \
+  HEDLEY_TI_CLPRU_VERSION_CHECK(2,1,0) || \
+  HEDLEY_MCST_LCC_VERSION_CHECK(1,25,10)
+#  define HEDLEY_PRINTF_FORMAT(string_idx,first_to_check) __attribute__((__format__(__printf__, string_idx, first_to_check)))
+#elif HEDLEY_PELLES_VERSION_CHECK(6,0,0)
+#  define HEDLEY_PRINTF_FORMAT(string_idx,first_to_check) __declspec(vaformat(printf,string_idx,first_to_check))
+#else
+#  define HEDLEY_PRINTF_FORMAT(string_idx,first_to_check)
+#endif
+
+#if defined(HEDLEY_CONSTEXPR)
+#  undef HEDLEY_CONSTEXPR
+#endif
+#if defined(__cplusplus)
+#  if __cplusplus >= 201103L
+#    define HEDLEY_CONSTEXPR HEDLEY_DIAGNOSTIC_DISABLE_CPP98_COMPAT_WRAP_(constexpr)
+#  endif
+#endif
+#if !defined(HEDLEY_CONSTEXPR)
+#  define HEDLEY_CONSTEXPR
+#endif
+
+#if defined(HEDLEY_PREDICT)
+#  undef HEDLEY_PREDICT
+#endif
+#if defined(HEDLEY_LIKELY)
+#  undef HEDLEY_LIKELY
+#endif
+#if defined(HEDLEY_UNLIKELY)
+#  undef HEDLEY_UNLIKELY
+#endif
+#if defined(HEDLEY_UNPREDICTABLE)
+#  undef HEDLEY_UNPREDICTABLE
+#endif
+#if HEDLEY_HAS_BUILTIN(__builtin_unpredictable)
+#  define HEDLEY_UNPREDICTABLE(expr) __builtin_unpredictable((expr))
+#endif
+#if \
+  (HEDLEY_HAS_BUILTIN(__builtin_expect_with_probability) && !defined(HEDLEY_PGI_VERSION) && !defined(HEDLEY_INTEL_VERSION)) || \
+  HEDLEY_GCC_VERSION_CHECK(9,0,0) || \
+  HEDLEY_MCST_LCC_VERSION_CHECK(1,25,10)
+#  define HEDLEY_PREDICT(expr, value, probability) __builtin_expect_with_probability(  (expr), (value), (probability))
+#  define HEDLEY_PREDICT_TRUE(expr, probability)   __builtin_expect_with_probability(!!(expr),    1   , (probability))
+#  define HEDLEY_PREDICT_FALSE(expr, probability)  __builtin_expect_with_probability(!!(expr),    0   , (probability))
+#  define HEDLEY_LIKELY(expr)                      __builtin_expect                 (!!(expr),    1                  )
+#  define HEDLEY_UNLIKELY(expr)                    __builtin_expect                 (!!(expr),    0                  )
+#elif \
+  (HEDLEY_HAS_BUILTIN(__builtin_expect) && !defined(HEDLEY_INTEL_CL_VERSION)) || \
+  HEDLEY_GCC_VERSION_CHECK(3,0,0) || \
+  HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+  (HEDLEY_SUNPRO_VERSION_CHECK(5,15,0) && defined(__cplusplus)) || \
+  HEDLEY_ARM_VERSION_CHECK(4,1,0) || \
+  HEDLEY_IBM_VERSION_CHECK(10,1,0) || \
+  HEDLEY_TI_VERSION_CHECK(15,12,0) || \
+  HEDLEY_TI_ARMCL_VERSION_CHECK(4,7,0) || \
+  HEDLEY_TI_CL430_VERSION_CHECK(3,1,0) || \
+  HEDLEY_TI_CL2000_VERSION_CHECK(6,1,0) || \
+  HEDLEY_TI_CL6X_VERSION_CHECK(6,1,0) || \
+  HEDLEY_TI_CL7X_VERSION_CHECK(1,2,0) || \
+  HEDLEY_TI_CLPRU_VERSION_CHECK(2,1,0) || \
+  HEDLEY_TINYC_VERSION_CHECK(0,9,27) || \
+  HEDLEY_CRAY_VERSION_CHECK(8,1,0) || \
+  HEDLEY_MCST_LCC_VERSION_CHECK(1,25,10)
+#  define HEDLEY_PREDICT(expr, expected, probability) \
+     (((probability) >= 0.9) ? __builtin_expect((expr), (expected)) : (HEDLEY_STATIC_CAST(void, expected), (expr)))
+#  define HEDLEY_PREDICT_TRUE(expr, probability) \
+     (__extension__ ({ \
+       double hedley_probability_ = (probability); \
+       ((hedley_probability_ >= 0.9) ? __builtin_expect(!!(expr), 1) : ((hedley_probability_ <= 0.1) ? __builtin_expect(!!(expr), 0) : !!(expr))); \
+     }))
+#  define HEDLEY_PREDICT_FALSE(expr, probability) \
+     (__extension__ ({ \
+       double hedley_probability_ = (probability); \
+       ((hedley_probability_ >= 0.9) ? __builtin_expect(!!(expr), 0) : ((hedley_probability_ <= 0.1) ? __builtin_expect(!!(expr), 1) : !!(expr))); \
+     }))
+#  define HEDLEY_LIKELY(expr)   __builtin_expect(!!(expr), 1)
+#  define HEDLEY_UNLIKELY(expr) __builtin_expect(!!(expr), 0)
+#else
+#  define HEDLEY_PREDICT(expr, expected, probability) (HEDLEY_STATIC_CAST(void, expected), (expr))
+#  define HEDLEY_PREDICT_TRUE(expr, probability) (!!(expr))
+#  define HEDLEY_PREDICT_FALSE(expr, probability) (!!(expr))
+#  define HEDLEY_LIKELY(expr) (!!(expr))
+#  define HEDLEY_UNLIKELY(expr) (!!(expr))
+#endif
+#if !defined(HEDLEY_UNPREDICTABLE)
+#  define HEDLEY_UNPREDICTABLE(expr) HEDLEY_PREDICT(expr, 1, 0.5)
+#endif
+
+#if defined(HEDLEY_MALLOC)
+#  undef HEDLEY_MALLOC
+#endif
+#if \
+  HEDLEY_HAS_ATTRIBUTE(malloc) || \
+  HEDLEY_GCC_VERSION_CHECK(3,1,0) || \
+  HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+  HEDLEY_SUNPRO_VERSION_CHECK(5,11,0) || \
+  HEDLEY_ARM_VERSION_CHECK(4,1,0) || \
+  HEDLEY_IBM_VERSION_CHECK(12,1,0) || \
+  HEDLEY_TI_VERSION_CHECK(15,12,0) || \
+  (HEDLEY_TI_ARMCL_VERSION_CHECK(4,8,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_ARMCL_VERSION_CHECK(5,2,0) || \
+  (HEDLEY_TI_CL2000_VERSION_CHECK(6,0,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_CL2000_VERSION_CHECK(6,4,0) || \
+  (HEDLEY_TI_CL430_VERSION_CHECK(4,0,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_CL430_VERSION_CHECK(4,3,0) || \
+  (HEDLEY_TI_CL6X_VERSION_CHECK(7,2,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_CL6X_VERSION_CHECK(7,5,0) || \
+  HEDLEY_TI_CL7X_VERSION_CHECK(1,2,0) || \
+  HEDLEY_TI_CLPRU_VERSION_CHECK(2,1,0) || \
+  HEDLEY_MCST_LCC_VERSION_CHECK(1,25,10)
+#  define HEDLEY_MALLOC __attribute__((__malloc__))
+#elif HEDLEY_SUNPRO_VERSION_CHECK(5,10,0)
+#  define HEDLEY_MALLOC _Pragma("returns_new_memory")
+#elif \
+  HEDLEY_MSVC_VERSION_CHECK(14,0,0) || \
+  HEDLEY_INTEL_CL_VERSION_CHECK(2021,1,0)
+#  define HEDLEY_MALLOC __declspec(restrict)
+#else
+#  define HEDLEY_MALLOC
+#endif
+
+#if defined(HEDLEY_PURE)
+#  undef HEDLEY_PURE
+#endif
+#if \
+  HEDLEY_HAS_ATTRIBUTE(pure) || \
+  HEDLEY_GCC_VERSION_CHECK(2,96,0) || \
+  HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+  HEDLEY_SUNPRO_VERSION_CHECK(5,11,0) || \
+  HEDLEY_ARM_VERSION_CHECK(4,1,0) || \
+  HEDLEY_IBM_VERSION_CHECK(10,1,0) || \
+  HEDLEY_TI_VERSION_CHECK(15,12,0) || \
+  (HEDLEY_TI_ARMCL_VERSION_CHECK(4,8,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_ARMCL_VERSION_CHECK(5,2,0) || \
+  (HEDLEY_TI_CL2000_VERSION_CHECK(6,0,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_CL2000_VERSION_CHECK(6,4,0) || \
+  (HEDLEY_TI_CL430_VERSION_CHECK(4,0,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_CL430_VERSION_CHECK(4,3,0) || \
+  (HEDLEY_TI_CL6X_VERSION_CHECK(7,2,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_CL6X_VERSION_CHECK(7,5,0) || \
+  HEDLEY_TI_CL7X_VERSION_CHECK(1,2,0) || \
+  HEDLEY_TI_CLPRU_VERSION_CHECK(2,1,0) || \
+  HEDLEY_PGI_VERSION_CHECK(17,10,0) || \
+  HEDLEY_MCST_LCC_VERSION_CHECK(1,25,10)
+#  define HEDLEY_PURE __attribute__((__pure__))
+#elif HEDLEY_SUNPRO_VERSION_CHECK(5,10,0)
+#  define HEDLEY_PURE _Pragma("does_not_write_global_data")
+#elif defined(__cplusplus) && \
+    ( \
+      HEDLEY_TI_CL430_VERSION_CHECK(2,0,1) || \
+      HEDLEY_TI_CL6X_VERSION_CHECK(4,0,0) || \
+      HEDLEY_TI_CL7X_VERSION_CHECK(1,2,0) \
+    )
+#  define HEDLEY_PURE _Pragma("FUNC_IS_PURE;")
+#else
+#  define HEDLEY_PURE
+#endif
+
+#if defined(HEDLEY_CONST)
+#  undef HEDLEY_CONST
+#endif
+#if \
+  HEDLEY_HAS_ATTRIBUTE(const) || \
+  HEDLEY_GCC_VERSION_CHECK(2,5,0) || \
+  HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+  HEDLEY_SUNPRO_VERSION_CHECK(5,11,0) || \
+  HEDLEY_ARM_VERSION_CHECK(4,1,0) || \
+  HEDLEY_IBM_VERSION_CHECK(10,1,0) || \
+  HEDLEY_TI_VERSION_CHECK(15,12,0) || \
+  (HEDLEY_TI_ARMCL_VERSION_CHECK(4,8,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_ARMCL_VERSION_CHECK(5,2,0) || \
+  (HEDLEY_TI_CL2000_VERSION_CHECK(6,0,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_CL2000_VERSION_CHECK(6,4,0) || \
+  (HEDLEY_TI_CL430_VERSION_CHECK(4,0,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_CL430_VERSION_CHECK(4,3,0) || \
+  (HEDLEY_TI_CL6X_VERSION_CHECK(7,2,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_CL6X_VERSION_CHECK(7,5,0) || \
+  HEDLEY_TI_CL7X_VERSION_CHECK(1,2,0) || \
+  HEDLEY_TI_CLPRU_VERSION_CHECK(2,1,0) || \
+  HEDLEY_PGI_VERSION_CHECK(17,10,0) || \
+  HEDLEY_MCST_LCC_VERSION_CHECK(1,25,10)
+#  define HEDLEY_CONST __attribute__((__const__))
+#elif \
+  HEDLEY_SUNPRO_VERSION_CHECK(5,10,0)
+#  define HEDLEY_CONST _Pragma("no_side_effect")
+#else
+#  define HEDLEY_CONST HEDLEY_PURE
+#endif
+
+#if defined(HEDLEY_RESTRICT)
+#  undef HEDLEY_RESTRICT
+#endif
+#if defined(__STDC_VERSION__) && (__STDC_VERSION__ >= 199901L) && !defined(__cplusplus)
+#  define HEDLEY_RESTRICT restrict
+#elif \
+  HEDLEY_GCC_VERSION_CHECK(3,1,0) || \
+  HEDLEY_MSVC_VERSION_CHECK(14,0,0) || \
+  HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+  HEDLEY_INTEL_CL_VERSION_CHECK(2021,1,0) || \
+  HEDLEY_ARM_VERSION_CHECK(4,1,0) || \
+  HEDLEY_IBM_VERSION_CHECK(10,1,0) || \
+  HEDLEY_PGI_VERSION_CHECK(17,10,0) || \
+  HEDLEY_TI_CL430_VERSION_CHECK(4,3,0) || \
+  HEDLEY_TI_CL2000_VERSION_CHECK(6,2,4) || \
+  HEDLEY_TI_CL6X_VERSION_CHECK(8,1,0) || \
+  HEDLEY_TI_CL7X_VERSION_CHECK(1,2,0) || \
+  (HEDLEY_SUNPRO_VERSION_CHECK(5,14,0) && defined(__cplusplus)) || \
+  HEDLEY_IAR_VERSION_CHECK(8,0,0) || \
+  defined(__clang__) || \
+  HEDLEY_MCST_LCC_VERSION_CHECK(1,25,10)
+#  define HEDLEY_RESTRICT __restrict
+#elif HEDLEY_SUNPRO_VERSION_CHECK(5,3,0) && !defined(__cplusplus)
+#  define HEDLEY_RESTRICT _Restrict
+#else
+#  define HEDLEY_RESTRICT
+#endif
+
+#if defined(HEDLEY_INLINE)
+#  undef HEDLEY_INLINE
+#endif
+#if \
+  (defined(__STDC_VERSION__) && (__STDC_VERSION__ >= 199901L)) || \
+  (defined(__cplusplus) && (__cplusplus >= 199711L))
+#  define HEDLEY_INLINE inline
+#elif \
+  defined(HEDLEY_GCC_VERSION) || \
+  HEDLEY_ARM_VERSION_CHECK(6,2,0)
+#  define HEDLEY_INLINE __inline__
+#elif \
+  HEDLEY_MSVC_VERSION_CHECK(12,0,0) || \
+  HEDLEY_INTEL_CL_VERSION_CHECK(2021,1,0) || \
+  HEDLEY_ARM_VERSION_CHECK(4,1,0) || \
+  HEDLEY_TI_ARMCL_VERSION_CHECK(5,1,0) || \
+  HEDLEY_TI_CL430_VERSION_CHECK(3,1,0) || \
+  HEDLEY_TI_CL2000_VERSION_CHECK(6,2,0) || \
+  HEDLEY_TI_CL6X_VERSION_CHECK(8,0,0) || \
+  HEDLEY_TI_CL7X_VERSION_CHECK(1,2,0) || \
+  HEDLEY_TI_CLPRU_VERSION_CHECK(2,1,0) || \
+  HEDLEY_MCST_LCC_VERSION_CHECK(1,25,10)
+#  define HEDLEY_INLINE __inline
+#else
+#  define HEDLEY_INLINE
+#endif
+
+#if defined(HEDLEY_ALWAYS_INLINE)
+#  undef HEDLEY_ALWAYS_INLINE
+#endif
+#if \
+  HEDLEY_HAS_ATTRIBUTE(always_inline) || \
+  HEDLEY_GCC_VERSION_CHECK(4,0,0) || \
+  HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+  HEDLEY_SUNPRO_VERSION_CHECK(5,11,0) || \
+  HEDLEY_ARM_VERSION_CHECK(4,1,0) || \
+  HEDLEY_IBM_VERSION_CHECK(10,1,0) || \
+  HEDLEY_TI_VERSION_CHECK(15,12,0) || \
+  (HEDLEY_TI_ARMCL_VERSION_CHECK(4,8,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_ARMCL_VERSION_CHECK(5,2,0) || \
+  (HEDLEY_TI_CL2000_VERSION_CHECK(6,0,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_CL2000_VERSION_CHECK(6,4,0) || \
+  (HEDLEY_TI_CL430_VERSION_CHECK(4,0,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_CL430_VERSION_CHECK(4,3,0) || \
+  (HEDLEY_TI_CL6X_VERSION_CHECK(7,2,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_CL6X_VERSION_CHECK(7,5,0) || \
+  HEDLEY_TI_CL7X_VERSION_CHECK(1,2,0) || \
+  HEDLEY_TI_CLPRU_VERSION_CHECK(2,1,0) || \
+  HEDLEY_MCST_LCC_VERSION_CHECK(1,25,10) || \
+  HEDLEY_IAR_VERSION_CHECK(8,10,0)
+#  define HEDLEY_ALWAYS_INLINE __attribute__((__always_inline__)) HEDLEY_INLINE
+#elif \
+  HEDLEY_MSVC_VERSION_CHECK(12,0,0) || \
+  HEDLEY_INTEL_CL_VERSION_CHECK(2021,1,0)
+#  define HEDLEY_ALWAYS_INLINE __forceinline
+#elif defined(__cplusplus) && \
+    ( \
+      HEDLEY_TI_ARMCL_VERSION_CHECK(5,2,0) || \
+      HEDLEY_TI_CL430_VERSION_CHECK(4,3,0) || \
+      HEDLEY_TI_CL2000_VERSION_CHECK(6,4,0) || \
+      HEDLEY_TI_CL6X_VERSION_CHECK(6,1,0) || \
+      HEDLEY_TI_CL7X_VERSION_CHECK(1,2,0) || \
+      HEDLEY_TI_CLPRU_VERSION_CHECK(2,1,0) \
+    )
+#  define HEDLEY_ALWAYS_INLINE _Pragma("FUNC_ALWAYS_INLINE;")
+#elif HEDLEY_IAR_VERSION_CHECK(8,0,0)
+#  define HEDLEY_ALWAYS_INLINE _Pragma("inline=forced")
+#else
+#  define HEDLEY_ALWAYS_INLINE HEDLEY_INLINE
+#endif
+
+#if defined(HEDLEY_NEVER_INLINE)
+#  undef HEDLEY_NEVER_INLINE
+#endif
+#if \
+  HEDLEY_HAS_ATTRIBUTE(noinline) || \
+  HEDLEY_GCC_VERSION_CHECK(4,0,0) || \
+  HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+  HEDLEY_SUNPRO_VERSION_CHECK(5,11,0) || \
+  HEDLEY_ARM_VERSION_CHECK(4,1,0) || \
+  HEDLEY_IBM_VERSION_CHECK(10,1,0) || \
+  HEDLEY_TI_VERSION_CHECK(15,12,0) || \
+  (HEDLEY_TI_ARMCL_VERSION_CHECK(4,8,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_ARMCL_VERSION_CHECK(5,2,0) || \
+  (HEDLEY_TI_CL2000_VERSION_CHECK(6,0,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_CL2000_VERSION_CHECK(6,4,0) || \
+  (HEDLEY_TI_CL430_VERSION_CHECK(4,0,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_CL430_VERSION_CHECK(4,3,0) || \
+  (HEDLEY_TI_CL6X_VERSION_CHECK(7,2,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+  HEDLEY_TI_CL6X_VERSION_CHECK(7,5,0) || \
+  HEDLEY_TI_CL7X_VERSION_CHECK(1,2,0) || \
+  HEDLEY_TI_CLPRU_VERSION_CHECK(2,1,0) || \
+  HEDLEY_MCST_LCC_VERSION_CHECK(1,25,10) || \
+  HEDLEY_IAR_VERSION_CHECK(8,10,0)
+#  define HEDLEY_NEVER_INLINE __attribute__((__noinline__))
+#elif \
+  HEDLEY_MSVC_VERSION_CHECK(13,10,0) || \
+  HEDLEY_INTEL_CL_VERSION_CHECK(2021,1,0)
+#  define HEDLEY_NEVER_INLINE __declspec(noinline)
+#elif HEDLEY_PGI_VERSION_CHECK(10,2,0)
+#  define HEDLEY_NEVER_INLINE _Pragma("noinline")
+#elif HEDLEY_TI_CL6X_VERSION_CHECK(6,0,0) && defined(__cplusplus)
+#  define HEDLEY_NEVER_INLINE _Pragma("FUNC_CANNOT_INLINE;")
+#elif HEDLEY_IAR_VERSION_CHECK(8,0,0)
+#  define HEDLEY_NEVER_INLINE _Pragma("inline=never")
+#elif HEDLEY_COMPCERT_VERSION_CHECK(3,2,0)
+#  define HEDLEY_NEVER_INLINE __attribute((noinline))
+#elif HEDLEY_PELLES_VERSION_CHECK(9,0,0)
+#  define HEDLEY_NEVER_INLINE __declspec(noinline)
+#else
+#  define HEDLEY_NEVER_INLINE
+#endif
+
+#if defined(HEDLEY_PRIVATE)
+#  undef HEDLEY_PRIVATE
+#endif
+#if defined(HEDLEY_PUBLIC)
+#  undef HEDLEY_PUBLIC
+#endif
+#if defined(HEDLEY_IMPORT)
+#  undef HEDLEY_IMPORT
+#endif
+#if defined(_WIN32) || defined(__CYGWIN__)
+#  define HEDLEY_PRIVATE
+#  define HEDLEY_PUBLIC   __declspec(dllexport)
+#  define HEDLEY_IMPORT   __declspec(dllimport)
+#else
+#  if \
+    HEDLEY_HAS_ATTRIBUTE(visibility) || \
+    HEDLEY_GCC_VERSION_CHECK(3,3,0) || \
+    HEDLEY_SUNPRO_VERSION_CHECK(5,11,0) || \
+    HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+    HEDLEY_ARM_VERSION_CHECK(4,1,0) || \
+    HEDLEY_IBM_VERSION_CHECK(13,1,0) || \
+    ( \
+      defined(__TI_EABI__) && \
+      ( \
+        (HEDLEY_TI_CL6X_VERSION_CHECK(7,2,0) && defined(__TI_GNU_ATTRIBUTE_SUPPORT__)) || \
+        HEDLEY_TI_CL6X_VERSION_CHECK(7,5,0) \
+      ) \
+    ) || \
+    HEDLEY_MCST_LCC_VERSION_CHECK(1,25,10)
+#    define HEDLEY_PRIVATE __attribute__((__visibility__("hidden")))
+#    define HEDLEY_PUBLIC  __attribute__((__visibility__("default")))
+#  else
+#    define HEDLEY_PRIVATE
+#    define HEDLEY_PUBLIC
+#  endif
+#  define HEDLEY_IMPORT    extern
+#endif
+
+#if defined(HEDLEY_NO_THROW)
+#  undef HEDLEY_NO_THROW
+#endif
+#if \
+  HEDLEY_HAS_ATTRIBUTE(nothrow) || \
+  HEDLEY_GCC_VERSION_CHECK(3,3,0) || \
+  HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+  HEDLEY_MCST_LCC_VERSION_CHECK(1,25,10)
+#  define HEDLEY_NO_THROW __attribute__((__nothrow__))
+#elif \
+  HEDLEY_MSVC_VERSION_CHECK(13,1,0) || \
+  HEDLEY_INTEL_CL_VERSION_CHECK(2021,1,0) || \
+  HEDLEY_ARM_VERSION_CHECK(4,1,0)
+#  define HEDLEY_NO_THROW __declspec(nothrow)
+#else
+#  define HEDLEY_NO_THROW
+#endif
+
+#if defined(HEDLEY_FALL_THROUGH)
+# undef HEDLEY_FALL_THROUGH
+#endif
+#if defined(HEDLEY_INTEL_VERSION)
+#  define HEDLEY_FALL_THROUGH
+#elif \
+  HEDLEY_HAS_ATTRIBUTE(fallthrough) || \
+  HEDLEY_GCC_VERSION_CHECK(7,0,0) || \
+  HEDLEY_MCST_LCC_VERSION_CHECK(1,25,10)
+#  define HEDLEY_FALL_THROUGH __attribute__((__fallthrough__))
+#elif HEDLEY_HAS_CPP_ATTRIBUTE_NS(clang,fallthrough)
+#  define HEDLEY_FALL_THROUGH HEDLEY_DIAGNOSTIC_DISABLE_CPP98_COMPAT_WRAP_([[clang::fallthrough]])
+#elif HEDLEY_HAS_CPP_ATTRIBUTE(fallthrough)
+#  define HEDLEY_FALL_THROUGH HEDLEY_DIAGNOSTIC_DISABLE_CPP98_COMPAT_WRAP_([[fallthrough]])
+#elif defined(__fallthrough) /* SAL */
+#  define HEDLEY_FALL_THROUGH __fallthrough
+#else
+#  define HEDLEY_FALL_THROUGH
+#endif
+
+#if defined(HEDLEY_RETURNS_NON_NULL)
+#  undef HEDLEY_RETURNS_NON_NULL
+#endif
+#if \
+  HEDLEY_HAS_ATTRIBUTE(returns_nonnull) || \
+  HEDLEY_GCC_VERSION_CHECK(4,9,0) || \
+  HEDLEY_MCST_LCC_VERSION_CHECK(1,25,10)
+#  define HEDLEY_RETURNS_NON_NULL __attribute__((__returns_nonnull__))
+#elif defined(_Ret_notnull_) /* SAL */
+#  define HEDLEY_RETURNS_NON_NULL _Ret_notnull_
+#else
+#  define HEDLEY_RETURNS_NON_NULL
+#endif
+
+#if defined(HEDLEY_ARRAY_PARAM)
+#  undef HEDLEY_ARRAY_PARAM
+#endif
+#if \
+  defined(__STDC_VERSION__) && (__STDC_VERSION__ >= 199901L) && \
+  !defined(__STDC_NO_VLA__) && \
+  !defined(__cplusplus) && \
+  !defined(HEDLEY_PGI_VERSION) && \
+  !defined(HEDLEY_TINYC_VERSION)
+#  define HEDLEY_ARRAY_PARAM(name) (name)
+#else
+#  define HEDLEY_ARRAY_PARAM(name)
+#endif
+
+#if defined(HEDLEY_IS_CONSTANT)
+#  undef HEDLEY_IS_CONSTANT
+#endif
+#if defined(HEDLEY_REQUIRE_CONSTEXPR)
+#  undef HEDLEY_REQUIRE_CONSTEXPR
+#endif
+/* HEDLEY_IS_CONSTEXPR_ is for
+   HEDLEY INTERNAL USE ONLY.  API subject to change without notice. */
+#if defined(HEDLEY_IS_CONSTEXPR_)
+#  undef HEDLEY_IS_CONSTEXPR_
+#endif
+#if \
+  HEDLEY_HAS_BUILTIN(__builtin_constant_p) || \
+  HEDLEY_GCC_VERSION_CHECK(3,4,0) || \
+  HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+  HEDLEY_TINYC_VERSION_CHECK(0,9,19) || \
+  HEDLEY_ARM_VERSION_CHECK(4,1,0) || \
+  HEDLEY_IBM_VERSION_CHECK(13,1,0) || \
+  HEDLEY_TI_CL6X_VERSION_CHECK(6,1,0) || \
+  (HEDLEY_SUNPRO_VERSION_CHECK(5,10,0) && !defined(__cplusplus)) || \
+  HEDLEY_CRAY_VERSION_CHECK(8,1,0) || \
+  HEDLEY_MCST_LCC_VERSION_CHECK(1,25,10)
+#  define HEDLEY_IS_CONSTANT(expr) __builtin_constant_p(expr)
+#endif
+#if !defined(__cplusplus)
+#  if \
+       HEDLEY_HAS_BUILTIN(__builtin_types_compatible_p) || \
+       HEDLEY_GCC_VERSION_CHECK(3,4,0) || \
+       HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+       HEDLEY_IBM_VERSION_CHECK(13,1,0) || \
+       HEDLEY_CRAY_VERSION_CHECK(8,1,0) || \
+       HEDLEY_ARM_VERSION_CHECK(5,4,0) || \
+       HEDLEY_TINYC_VERSION_CHECK(0,9,24)
+#    if defined(__INTPTR_TYPE__)
+#      define HEDLEY_IS_CONSTEXPR_(expr) __builtin_types_compatible_p(__typeof__((1 ? (void*) ((__INTPTR_TYPE__) ((expr) * 0)) : (int*) 0)), int*)
+#    else
+#      include <stdint.h>
+#      define HEDLEY_IS_CONSTEXPR_(expr) __builtin_types_compatible_p(__typeof__((1 ? (void*) ((intptr_t) ((expr) * 0)) : (int*) 0)), int*)
+#    endif
+#  elif \
+       ( \
+          defined(__STDC_VERSION__) && (__STDC_VERSION__ >= 201112L) && \
+          !defined(HEDLEY_SUNPRO_VERSION) && \
+          !defined(HEDLEY_PGI_VERSION) && \
+          !defined(HEDLEY_IAR_VERSION)) || \
+       (HEDLEY_HAS_EXTENSION(c_generic_selections) && !defined(HEDLEY_IAR_VERSION)) || \
+       HEDLEY_GCC_VERSION_CHECK(4,9,0) || \
+       HEDLEY_INTEL_VERSION_CHECK(17,0,0) || \
+       HEDLEY_IBM_VERSION_CHECK(12,1,0) || \
+       HEDLEY_ARM_VERSION_CHECK(5,3,0)
+#    if defined(__INTPTR_TYPE__)
+#      define HEDLEY_IS_CONSTEXPR_(expr) _Generic((1 ? (void*) ((__INTPTR_TYPE__) ((expr) * 0)) : (int*) 0), int*: 1, void*: 0)
+#    else
+#      include <stdint.h>
+#      define HEDLEY_IS_CONSTEXPR_(expr) _Generic((1 ? (void*) ((intptr_t) * 0) : (int*) 0), int*: 1, void*: 0)
+#    endif
+#  elif \
+       defined(HEDLEY_GCC_VERSION) || \
+       defined(HEDLEY_INTEL_VERSION) || \
+       defined(HEDLEY_TINYC_VERSION) || \
+       defined(HEDLEY_TI_ARMCL_VERSION) || \
+       HEDLEY_TI_CL430_VERSION_CHECK(18,12,0) || \
+       defined(HEDLEY_TI_CL2000_VERSION) || \
+       defined(HEDLEY_TI_CL6X_VERSION) || \
+       defined(HEDLEY_TI_CL7X_VERSION) || \
+       defined(HEDLEY_TI_CLPRU_VERSION) || \
+       defined(__clang__)
+#    define HEDLEY_IS_CONSTEXPR_(expr) ( \
+         sizeof(void) != \
+         sizeof(*( \
+           1 ? \
+             ((void*) ((expr) * 0L) ) : \
+             ((struct { char v[sizeof(void) * 2]; } *) 1) \
+           ) \
+         ) \
+       )
+#  endif
+#endif
+#if defined(HEDLEY_IS_CONSTEXPR_)
+#  if !defined(HEDLEY_IS_CONSTANT)
+#    define HEDLEY_IS_CONSTANT(expr) HEDLEY_IS_CONSTEXPR_(expr)
+#  endif
+#  define HEDLEY_REQUIRE_CONSTEXPR(expr) (HEDLEY_IS_CONSTEXPR_(expr) ? (expr) : (-1))
+#else
+#  if !defined(HEDLEY_IS_CONSTANT)
+#    define HEDLEY_IS_CONSTANT(expr) (0)
+#  endif
+#  define HEDLEY_REQUIRE_CONSTEXPR(expr) (expr)
+#endif
+
+#if defined(HEDLEY_BEGIN_C_DECLS)
+#  undef HEDLEY_BEGIN_C_DECLS
+#endif
+#if defined(HEDLEY_END_C_DECLS)
+#  undef HEDLEY_END_C_DECLS
+#endif
+#if defined(HEDLEY_C_DECL)
+#  undef HEDLEY_C_DECL
+#endif
+#if defined(__cplusplus)
+#  define HEDLEY_BEGIN_C_DECLS extern "C" {
+#  define HEDLEY_END_C_DECLS }
+#  define HEDLEY_C_DECL extern "C"
+#else
+#  define HEDLEY_BEGIN_C_DECLS
+#  define HEDLEY_END_C_DECLS
+#  define HEDLEY_C_DECL
+#endif
+
+#if defined(HEDLEY_STATIC_ASSERT)
+#  undef HEDLEY_STATIC_ASSERT
+#endif
+#if \
+  !defined(__cplusplus) && ( \
+      (defined(__STDC_VERSION__) && (__STDC_VERSION__ >= 201112L)) || \
+      (HEDLEY_HAS_FEATURE(c_static_assert) && !defined(HEDLEY_INTEL_CL_VERSION)) || \
+      HEDLEY_GCC_VERSION_CHECK(6,0,0) || \
+      HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+      defined(_Static_assert) \
+    )
+#  define HEDLEY_STATIC_ASSERT(expr, message) _Static_assert(expr, message)
+#elif \
+  (defined(__cplusplus) && (__cplusplus >= 201103L)) || \
+  HEDLEY_MSVC_VERSION_CHECK(16,0,0) || \
+  HEDLEY_INTEL_CL_VERSION_CHECK(2021,1,0)
+#  define HEDLEY_STATIC_ASSERT(expr, message) HEDLEY_DIAGNOSTIC_DISABLE_CPP98_COMPAT_WRAP_(static_assert(expr, message))
+#else
+#  define HEDLEY_STATIC_ASSERT(expr, message)
+#endif
+
+#if defined(HEDLEY_NULL)
+#  undef HEDLEY_NULL
+#endif
+#if defined(__cplusplus)
+#  if __cplusplus >= 201103L
+#    define HEDLEY_NULL HEDLEY_DIAGNOSTIC_DISABLE_CPP98_COMPAT_WRAP_(nullptr)
+#  elif defined(NULL)
+#    define HEDLEY_NULL NULL
+#  else
+#    define HEDLEY_NULL HEDLEY_STATIC_CAST(void*, 0)
+#  endif
+#elif defined(NULL)
+#  define HEDLEY_NULL NULL
+#else
+#  define HEDLEY_NULL ((void*) 0)
+#endif
+
+#if defined(HEDLEY_MESSAGE)
+#  undef HEDLEY_MESSAGE
+#endif
+#if HEDLEY_HAS_WARNING("-Wunknown-pragmas")
+#  define HEDLEY_MESSAGE(msg) \
+  HEDLEY_DIAGNOSTIC_PUSH \
+  HEDLEY_DIAGNOSTIC_DISABLE_UNKNOWN_PRAGMAS \
+  HEDLEY_PRAGMA(message msg) \
+  HEDLEY_DIAGNOSTIC_POP
+#elif \
+  HEDLEY_GCC_VERSION_CHECK(4,4,0) || \
+  HEDLEY_INTEL_VERSION_CHECK(13,0,0)
+#  define HEDLEY_MESSAGE(msg) HEDLEY_PRAGMA(message msg)
+#elif HEDLEY_CRAY_VERSION_CHECK(5,0,0)
+#  define HEDLEY_MESSAGE(msg) HEDLEY_PRAGMA(_CRI message msg)
+#elif HEDLEY_IAR_VERSION_CHECK(8,0,0)
+#  define HEDLEY_MESSAGE(msg) HEDLEY_PRAGMA(message(msg))
+#elif HEDLEY_PELLES_VERSION_CHECK(2,0,0)
+#  define HEDLEY_MESSAGE(msg) HEDLEY_PRAGMA(message(msg))
+#else
+#  define HEDLEY_MESSAGE(msg)
+#endif
+
+#if defined(HEDLEY_WARNING)
+#  undef HEDLEY_WARNING
+#endif
+#if HEDLEY_HAS_WARNING("-Wunknown-pragmas")
+#  define HEDLEY_WARNING(msg) \
+  HEDLEY_DIAGNOSTIC_PUSH \
+  HEDLEY_DIAGNOSTIC_DISABLE_UNKNOWN_PRAGMAS \
+  HEDLEY_PRAGMA(clang warning msg) \
+  HEDLEY_DIAGNOSTIC_POP
+#elif \
+  HEDLEY_GCC_VERSION_CHECK(4,8,0) || \
+  HEDLEY_PGI_VERSION_CHECK(18,4,0) || \
+  HEDLEY_INTEL_VERSION_CHECK(13,0,0)
+#  define HEDLEY_WARNING(msg) HEDLEY_PRAGMA(GCC warning msg)
+#elif \
+  HEDLEY_MSVC_VERSION_CHECK(15,0,0) || \
+  HEDLEY_INTEL_CL_VERSION_CHECK(2021,1,0)
+#  define HEDLEY_WARNING(msg) HEDLEY_PRAGMA(message(msg))
+#else
+#  define HEDLEY_WARNING(msg) HEDLEY_MESSAGE(msg)
+#endif
+
+#if defined(HEDLEY_REQUIRE)
+#  undef HEDLEY_REQUIRE
+#endif
+#if defined(HEDLEY_REQUIRE_MSG)
+#  undef HEDLEY_REQUIRE_MSG
+#endif
+#if HEDLEY_HAS_ATTRIBUTE(diagnose_if)
+#  if HEDLEY_HAS_WARNING("-Wgcc-compat")
+#    define HEDLEY_REQUIRE(expr) \
+       HEDLEY_DIAGNOSTIC_PUSH \
+       _Pragma("clang diagnostic ignored \"-Wgcc-compat\"") \
+       __attribute__((diagnose_if(!(expr), #expr, "error"))) \
+       HEDLEY_DIAGNOSTIC_POP
+#    define HEDLEY_REQUIRE_MSG(expr,msg) \
+       HEDLEY_DIAGNOSTIC_PUSH \
+       _Pragma("clang diagnostic ignored \"-Wgcc-compat\"") \
+       __attribute__((diagnose_if(!(expr), msg, "error"))) \
+       HEDLEY_DIAGNOSTIC_POP
+#  else
+#    define HEDLEY_REQUIRE(expr) __attribute__((diagnose_if(!(expr), #expr, "error")))
+#    define HEDLEY_REQUIRE_MSG(expr,msg) __attribute__((diagnose_if(!(expr), msg, "error")))
+#  endif
+#else
+#  define HEDLEY_REQUIRE(expr)
+#  define HEDLEY_REQUIRE_MSG(expr,msg)
+#endif
+
+#if defined(HEDLEY_FLAGS)
+#  undef HEDLEY_FLAGS
+#endif
+#if HEDLEY_HAS_ATTRIBUTE(flag_enum) && (!defined(__cplusplus) || HEDLEY_HAS_WARNING("-Wbitfield-enum-conversion"))
+#  define HEDLEY_FLAGS __attribute__((__flag_enum__))
+#else
+#  define HEDLEY_FLAGS
+#endif
+
+#if defined(HEDLEY_FLAGS_CAST)
+#  undef HEDLEY_FLAGS_CAST
+#endif
+#if HEDLEY_INTEL_VERSION_CHECK(19,0,0)
+#  define HEDLEY_FLAGS_CAST(T, expr) (__extension__ ({ \
+  HEDLEY_DIAGNOSTIC_PUSH \
+      _Pragma("warning(disable:188)") \
+      ((T) (expr)); \
+      HEDLEY_DIAGNOSTIC_POP \
+    }))
+#else
+#  define HEDLEY_FLAGS_CAST(T, expr) HEDLEY_STATIC_CAST(T, expr)
+#endif
+
+#if defined(HEDLEY_EMPTY_BASES)
+#  undef HEDLEY_EMPTY_BASES
+#endif
+#if \
+  (HEDLEY_MSVC_VERSION_CHECK(19,0,23918) && !HEDLEY_MSVC_VERSION_CHECK(20,0,0)) || \
+  HEDLEY_INTEL_CL_VERSION_CHECK(2021,1,0)
+#  define HEDLEY_EMPTY_BASES __declspec(empty_bases)
+#else
+#  define HEDLEY_EMPTY_BASES
+#endif
+
+/* Remaining macros are deprecated. */
+
+#if defined(HEDLEY_GCC_NOT_CLANG_VERSION_CHECK)
+#  undef HEDLEY_GCC_NOT_CLANG_VERSION_CHECK
+#endif
+#if defined(__clang__)
+#  define HEDLEY_GCC_NOT_CLANG_VERSION_CHECK(major,minor,patch) (0)
+#else
+#  define HEDLEY_GCC_NOT_CLANG_VERSION_CHECK(major,minor,patch) HEDLEY_GCC_VERSION_CHECK(major,minor,patch)
+#endif
+
+#if defined(HEDLEY_CLANG_HAS_ATTRIBUTE)
+#  undef HEDLEY_CLANG_HAS_ATTRIBUTE
+#endif
+#define HEDLEY_CLANG_HAS_ATTRIBUTE(attribute) HEDLEY_HAS_ATTRIBUTE(attribute)
+
+#if defined(HEDLEY_CLANG_HAS_CPP_ATTRIBUTE)
+#  undef HEDLEY_CLANG_HAS_CPP_ATTRIBUTE
+#endif
+#define HEDLEY_CLANG_HAS_CPP_ATTRIBUTE(attribute) HEDLEY_HAS_CPP_ATTRIBUTE(attribute)
+
+#if defined(HEDLEY_CLANG_HAS_BUILTIN)
+#  undef HEDLEY_CLANG_HAS_BUILTIN
+#endif
+#define HEDLEY_CLANG_HAS_BUILTIN(builtin) HEDLEY_HAS_BUILTIN(builtin)
+
+#if defined(HEDLEY_CLANG_HAS_FEATURE)
+#  undef HEDLEY_CLANG_HAS_FEATURE
+#endif
+#define HEDLEY_CLANG_HAS_FEATURE(feature) HEDLEY_HAS_FEATURE(feature)
+
+#if defined(HEDLEY_CLANG_HAS_EXTENSION)
+#  undef HEDLEY_CLANG_HAS_EXTENSION
+#endif
+#define HEDLEY_CLANG_HAS_EXTENSION(extension) HEDLEY_HAS_EXTENSION(extension)
+
+#if defined(HEDLEY_CLANG_HAS_DECLSPEC_DECLSPEC_ATTRIBUTE)
+#  undef HEDLEY_CLANG_HAS_DECLSPEC_DECLSPEC_ATTRIBUTE
+#endif
+#define HEDLEY_CLANG_HAS_DECLSPEC_ATTRIBUTE(attribute) HEDLEY_HAS_DECLSPEC_ATTRIBUTE(attribute)
+
+#if defined(HEDLEY_CLANG_HAS_WARNING)
+#  undef HEDLEY_CLANG_HAS_WARNING
+#endif
+#define HEDLEY_CLANG_HAS_WARNING(warning) HEDLEY_HAS_WARNING(warning)
+
+#endif /* !defined(HEDLEY_VERSION) || (HEDLEY_VERSION < X) */
diff --git a/external_libs/pgenlib/simde/simde-aes.h b/external_libs/pgenlib/simde/simde-aes.h
new file mode 100644
index 0000000..ea3ef5a
--- /dev/null
+++ b/external_libs/pgenlib/simde/simde-aes.h
@@ -0,0 +1,266 @@
+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_AES_H)
+#define SIMDE_AES_H
+
+#include "simde-features.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+
+#if !(defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_AES) && \
+      defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO))
+
+/*
+ * Number of columns (32-bit words) comprising the State. For this
+ * standard, Nb = 4.
+ */
+#define simde_x_aes_Nb 4
+
+static uint8_t simde_x_aes_gmult_lookup_table[8][256] = {
+{ // gmult(0x02, b);
+  0x00, 0x02, 0x04, 0x06, 0x08, 0x0a, 0x0c, 0x0e, 0x10, 0x12, 0x14, 0x16, 0x18, 0x1a, 0x1c, 0x1e,
+  0x20, 0x22, 0x24, 0x26, 0x28, 0x2a, 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x3a, 0x3c, 0x3e,
+  0x40, 0x42, 0x44, 0x46, 0x48, 0x4a, 0x4c, 0x4e, 0x50, 0x52, 0x54, 0x56, 0x58, 0x5a, 0x5c, 0x5e,
+  0x60, 0x62, 0x64, 0x66, 0x68, 0x6a, 0x6c, 0x6e, 0x70, 0x72, 0x74, 0x76, 0x78, 0x7a, 0x7c, 0x7e,
+  0x80, 0x82, 0x84, 0x86, 0x88, 0x8a, 0x8c, 0x8e, 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9c, 0x9e,
+  0xa0, 0xa2, 0xa4, 0xa6, 0xa8, 0xaa, 0xac, 0xae, 0xb0, 0xb2, 0xb4, 0xb6, 0xb8, 0xba, 0xbc, 0xbe,
+  0xc0, 0xc2, 0xc4, 0xc6, 0xc8, 0xca, 0xcc, 0xce, 0xd0, 0xd2, 0xd4, 0xd6, 0xd8, 0xda, 0xdc, 0xde,
+  0xe0, 0xe2, 0xe4, 0xe6, 0xe8, 0xea, 0xec, 0xee, 0xf0, 0xf2, 0xf4, 0xf6, 0xf8, 0xfa, 0xfc, 0xfe,
+  0x1b, 0x19, 0x1f, 0x1d, 0x13, 0x11, 0x17, 0x15, 0x0b, 0x09, 0x0f, 0x0d, 0x03, 0x01, 0x07, 0x05,
+  0x3b, 0x39, 0x3f, 0x3d, 0x33, 0x31, 0x37, 0x35, 0x2b, 0x29, 0x2f, 0x2d, 0x23, 0x21, 0x27, 0x25,
+  0x5b, 0x59, 0x5f, 0x5d, 0x53, 0x51, 0x57, 0x55, 0x4b, 0x49, 0x4f, 0x4d, 0x43, 0x41, 0x47, 0x45,
+  0x7b, 0x79, 0x7f, 0x7d, 0x73, 0x71, 0x77, 0x75, 0x6b, 0x69, 0x6f, 0x6d, 0x63, 0x61, 0x67, 0x65,
+  0x9b, 0x99, 0x9f, 0x9d, 0x93, 0x91, 0x97, 0x95, 0x8b, 0x89, 0x8f, 0x8d, 0x83, 0x81, 0x87, 0x85,
+  0xbb, 0xb9, 0xbf, 0xbd, 0xb3, 0xb1, 0xb7, 0xb5, 0xab, 0xa9, 0xaf, 0xad, 0xa3, 0xa1, 0xa7, 0xa5,
+  0xdb, 0xd9, 0xdf, 0xdd, 0xd3, 0xd1, 0xd7, 0xd5, 0xcb, 0xc9, 0xcf, 0xcd, 0xc3, 0xc1, 0xc7, 0xc5,
+  0xfb, 0xf9, 0xff, 0xfd, 0xf3, 0xf1, 0xf7, 0xf5, 0xeb, 0xe9, 0xef, 0xed, 0xe3, 0xe1, 0xe7, 0xe5
+},
+{ // gmult(0x01, b);
+  0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
+  0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
+  0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
+  0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
+  0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
+  0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
+  0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,
+  0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,
+  0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+  0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,
+  0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,
+  0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,
+  0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7, 0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,
+  0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7, 0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,
+  0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,
+  0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, 0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
+},
+{ // gmult(0x01, b);
+  0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
+  0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
+  0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
+  0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
+  0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
+  0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
+  0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,
+  0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,
+  0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+  0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,
+  0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,
+  0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,
+  0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7, 0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,
+  0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7, 0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,
+  0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,
+  0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, 0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
+},
+{ // gmult(0x03, b);
+  0x00, 0x03, 0x06, 0x05, 0x0c, 0x0f, 0x0a, 0x09, 0x18, 0x1b, 0x1e, 0x1d, 0x14, 0x17, 0x12, 0x11,
+  0x30, 0x33, 0x36, 0x35, 0x3c, 0x3f, 0x3a, 0x39, 0x28, 0x2b, 0x2e, 0x2d, 0x24, 0x27, 0x22, 0x21,
+  0x60, 0x63, 0x66, 0x65, 0x6c, 0x6f, 0x6a, 0x69, 0x78, 0x7b, 0x7e, 0x7d, 0x74, 0x77, 0x72, 0x71,
+  0x50, 0x53, 0x56, 0x55, 0x5c, 0x5f, 0x5a, 0x59, 0x48, 0x4b, 0x4e, 0x4d, 0x44, 0x47, 0x42, 0x41,
+  0xc0, 0xc3, 0xc6, 0xc5, 0xcc, 0xcf, 0xca, 0xc9, 0xd8, 0xdb, 0xde, 0xdd, 0xd4, 0xd7, 0xd2, 0xd1,
+  0xf0, 0xf3, 0xf6, 0xf5, 0xfc, 0xff, 0xfa, 0xf9, 0xe8, 0xeb, 0xee, 0xed, 0xe4, 0xe7, 0xe2, 0xe1,
+  0xa0, 0xa3, 0xa6, 0xa5, 0xac, 0xaf, 0xaa, 0xa9, 0xb8, 0xbb, 0xbe, 0xbd, 0xb4, 0xb7, 0xb2, 0xb1,
+  0x90, 0x93, 0x96, 0x95, 0x9c, 0x9f, 0x9a, 0x99, 0x88, 0x8b, 0x8e, 0x8d, 0x84, 0x87, 0x82, 0x81,
+  0x9b, 0x98, 0x9d, 0x9e, 0x97, 0x94, 0x91, 0x92, 0x83, 0x80, 0x85, 0x86, 0x8f, 0x8c, 0x89, 0x8a,
+  0xab, 0xa8, 0xad, 0xae, 0xa7, 0xa4, 0xa1, 0xa2, 0xb3, 0xb0, 0xb5, 0xb6, 0xbf, 0xbc, 0xb9, 0xba,
+  0xfb, 0xf8, 0xfd, 0xfe, 0xf7, 0xf4, 0xf1, 0xf2, 0xe3, 0xe0, 0xe5, 0xe6, 0xef, 0xec, 0xe9, 0xea,
+  0xcb, 0xc8, 0xcd, 0xce, 0xc7, 0xc4, 0xc1, 0xc2, 0xd3, 0xd0, 0xd5, 0xd6, 0xdf, 0xdc, 0xd9, 0xda,
+  0x5b, 0x58, 0x5d, 0x5e, 0x57, 0x54, 0x51, 0x52, 0x43, 0x40, 0x45, 0x46, 0x4f, 0x4c, 0x49, 0x4a,
+  0x6b, 0x68, 0x6d, 0x6e, 0x67, 0x64, 0x61, 0x62, 0x73, 0x70, 0x75, 0x76, 0x7f, 0x7c, 0x79, 0x7a,
+  0x3b, 0x38, 0x3d, 0x3e, 0x37, 0x34, 0x31, 0x32, 0x23, 0x20, 0x25, 0x26, 0x2f, 0x2c, 0x29, 0x2a,
+  0x0b, 0x08, 0x0d, 0x0e, 0x07, 0x04, 0x01, 0x02, 0x13, 0x10, 0x15, 0x16, 0x1f, 0x1c, 0x19, 0x1a,
+},
+{ // gmult(0x0e, b);
+  0x00, 0x0e, 0x1c, 0x12, 0x38, 0x36, 0x24, 0x2a, 0x70, 0x7e, 0x6c, 0x62, 0x48, 0x46, 0x54, 0x5a,
+  0xe0, 0xee, 0xfc, 0xf2, 0xd8, 0xd6, 0xc4, 0xca, 0x90, 0x9e, 0x8c, 0x82, 0xa8, 0xa6, 0xb4, 0xba,
+  0xdb, 0xd5, 0xc7, 0xc9, 0xe3, 0xed, 0xff, 0xf1, 0xab, 0xa5, 0xb7, 0xb9, 0x93, 0x9d, 0x8f, 0x81,
+  0x3b, 0x35, 0x27, 0x29, 0x03, 0x0d, 0x1f, 0x11, 0x4b, 0x45, 0x57, 0x59, 0x73, 0x7d, 0x6f, 0x61,
+  0xad, 0xa3, 0xb1, 0xbf, 0x95, 0x9b, 0x89, 0x87, 0xdd, 0xd3, 0xc1, 0xcf, 0xe5, 0xeb, 0xf9, 0xf7,
+  0x4d, 0x43, 0x51, 0x5f, 0x75, 0x7b, 0x69, 0x67, 0x3d, 0x33, 0x21, 0x2f, 0x05, 0x0b, 0x19, 0x17,
+  0x76, 0x78, 0x6a, 0x64, 0x4e, 0x40, 0x52, 0x5c, 0x06, 0x08, 0x1a, 0x14, 0x3e, 0x30, 0x22, 0x2c,
+  0x96, 0x98, 0x8a, 0x84, 0xae, 0xa0, 0xb2, 0xbc, 0xe6, 0xe8, 0xfa, 0xf4, 0xde, 0xd0, 0xc2, 0xcc,
+  0x41, 0x4f, 0x5d, 0x53, 0x79, 0x77, 0x65, 0x6b, 0x31, 0x3f, 0x2d, 0x23, 0x09, 0x07, 0x15, 0x1b,
+  0xa1, 0xaf, 0xbd, 0xb3, 0x99, 0x97, 0x85, 0x8b, 0xd1, 0xdf, 0xcd, 0xc3, 0xe9, 0xe7, 0xf5, 0xfb,
+  0x9a, 0x94, 0x86, 0x88, 0xa2, 0xac, 0xbe, 0xb0, 0xea, 0xe4, 0xf6, 0xf8, 0xd2, 0xdc, 0xce, 0xc0,
+  0x7a, 0x74, 0x66, 0x68, 0x42, 0x4c, 0x5e, 0x50, 0x0a, 0x04, 0x16, 0x18, 0x32, 0x3c, 0x2e, 0x20,
+  0xec, 0xe2, 0xf0, 0xfe, 0xd4, 0xda, 0xc8, 0xc6, 0x9c, 0x92, 0x80, 0x8e, 0xa4, 0xaa, 0xb8, 0xb6,
+  0x0c, 0x02, 0x10, 0x1e, 0x34, 0x3a, 0x28, 0x26, 0x7c, 0x72, 0x60, 0x6e, 0x44, 0x4a, 0x58, 0x56,
+  0x37, 0x39, 0x2b, 0x25, 0x0f, 0x01, 0x13, 0x1d, 0x47, 0x49, 0x5b, 0x55, 0x7f, 0x71, 0x63, 0x6d,
+  0xd7, 0xd9, 0xcb, 0xc5, 0xef, 0xe1, 0xf3, 0xfd, 0xa7, 0xa9, 0xbb, 0xb5, 0x9f, 0x91, 0x83, 0x8d,
+},
+{ // gmult(0x09, b);
+  0x00, 0x09, 0x12, 0x1b, 0x24, 0x2d, 0x36, 0x3f, 0x48, 0x41, 0x5a, 0x53, 0x6c, 0x65, 0x7e, 0x77,
+  0x90, 0x99, 0x82, 0x8b, 0xb4, 0xbd, 0xa6, 0xaf, 0xd8, 0xd1, 0xca, 0xc3, 0xfc, 0xf5, 0xee, 0xe7,
+  0x3b, 0x32, 0x29, 0x20, 0x1f, 0x16, 0x0d, 0x04, 0x73, 0x7a, 0x61, 0x68, 0x57, 0x5e, 0x45, 0x4c,
+  0xab, 0xa2, 0xb9, 0xb0, 0x8f, 0x86, 0x9d, 0x94, 0xe3, 0xea, 0xf1, 0xf8, 0xc7, 0xce, 0xd5, 0xdc,
+  0x76, 0x7f, 0x64, 0x6d, 0x52, 0x5b, 0x40, 0x49, 0x3e, 0x37, 0x2c, 0x25, 0x1a, 0x13, 0x08, 0x01,
+  0xe6, 0xef, 0xf4, 0xfd, 0xc2, 0xcb, 0xd0, 0xd9, 0xae, 0xa7, 0xbc, 0xb5, 0x8a, 0x83, 0x98, 0x91,
+  0x4d, 0x44, 0x5f, 0x56, 0x69, 0x60, 0x7b, 0x72, 0x05, 0x0c, 0x17, 0x1e, 0x21, 0x28, 0x33, 0x3a,
+  0xdd, 0xd4, 0xcf, 0xc6, 0xf9, 0xf0, 0xeb, 0xe2, 0x95, 0x9c, 0x87, 0x8e, 0xb1, 0xb8, 0xa3, 0xaa,
+  0xec, 0xe5, 0xfe, 0xf7, 0xc8, 0xc1, 0xda, 0xd3, 0xa4, 0xad, 0xb6, 0xbf, 0x80, 0x89, 0x92, 0x9b,
+  0x7c, 0x75, 0x6e, 0x67, 0x58, 0x51, 0x4a, 0x43, 0x34, 0x3d, 0x26, 0x2f, 0x10, 0x19, 0x02, 0x0b,
+  0xd7, 0xde, 0xc5, 0xcc, 0xf3, 0xfa, 0xe1, 0xe8, 0x9f, 0x96, 0x8d, 0x84, 0xbb, 0xb2, 0xa9, 0xa0,
+  0x47, 0x4e, 0x55, 0x5c, 0x63, 0x6a, 0x71, 0x78, 0x0f, 0x06, 0x1d, 0x14, 0x2b, 0x22, 0x39, 0x30,
+  0x9a, 0x93, 0x88, 0x81, 0xbe, 0xb7, 0xac, 0xa5, 0xd2, 0xdb, 0xc0, 0xc9, 0xf6, 0xff, 0xe4, 0xed,
+  0x0a, 0x03, 0x18, 0x11, 0x2e, 0x27, 0x3c, 0x35, 0x42, 0x4b, 0x50, 0x59, 0x66, 0x6f, 0x74, 0x7d,
+  0xa1, 0xa8, 0xb3, 0xba, 0x85, 0x8c, 0x97, 0x9e, 0xe9, 0xe0, 0xfb, 0xf2, 0xcd, 0xc4, 0xdf, 0xd6,
+  0x31, 0x38, 0x23, 0x2a, 0x15, 0x1c, 0x07, 0x0e, 0x79, 0x70, 0x6b, 0x62, 0x5d, 0x54, 0x4f, 0x46,
+
+},
+{ // gmult(0x0d, b);
+  0x00, 0x0d, 0x1a, 0x17, 0x34, 0x39, 0x2e, 0x23, 0x68, 0x65, 0x72, 0x7f, 0x5c, 0x51, 0x46, 0x4b,
+  0xd0, 0xdd, 0xca, 0xc7, 0xe4, 0xe9, 0xfe, 0xf3, 0xb8, 0xb5, 0xa2, 0xaf, 0x8c, 0x81, 0x96, 0x9b,
+  0xbb, 0xb6, 0xa1, 0xac, 0x8f, 0x82, 0x95, 0x98, 0xd3, 0xde, 0xc9, 0xc4, 0xe7, 0xea, 0xfd, 0xf0,
+  0x6b, 0x66, 0x71, 0x7c, 0x5f, 0x52, 0x45, 0x48, 0x03, 0x0e, 0x19, 0x14, 0x37, 0x3a, 0x2d, 0x20,
+  0x6d, 0x60, 0x77, 0x7a, 0x59, 0x54, 0x43, 0x4e, 0x05, 0x08, 0x1f, 0x12, 0x31, 0x3c, 0x2b, 0x26,
+  0xbd, 0xb0, 0xa7, 0xaa, 0x89, 0x84, 0x93, 0x9e, 0xd5, 0xd8, 0xcf, 0xc2, 0xe1, 0xec, 0xfb, 0xf6,
+  0xd6, 0xdb, 0xcc, 0xc1, 0xe2, 0xef, 0xf8, 0xf5, 0xbe, 0xb3, 0xa4, 0xa9, 0x8a, 0x87, 0x90, 0x9d,
+  0x06, 0x0b, 0x1c, 0x11, 0x32, 0x3f, 0x28, 0x25, 0x6e, 0x63, 0x74, 0x79, 0x5a, 0x57, 0x40, 0x4d,
+  0xda, 0xd7, 0xc0, 0xcd, 0xee, 0xe3, 0xf4, 0xf9, 0xb2, 0xbf, 0xa8, 0xa5, 0x86, 0x8b, 0x9c, 0x91,
+  0x0a, 0x07, 0x10, 0x1d, 0x3e, 0x33, 0x24, 0x29, 0x62, 0x6f, 0x78, 0x75, 0x56, 0x5b, 0x4c, 0x41,
+  0x61, 0x6c, 0x7b, 0x76, 0x55, 0x58, 0x4f, 0x42, 0x09, 0x04, 0x13, 0x1e, 0x3d, 0x30, 0x27, 0x2a,
+  0xb1, 0xbc, 0xab, 0xa6, 0x85, 0x88, 0x9f, 0x92, 0xd9, 0xd4, 0xc3, 0xce, 0xed, 0xe0, 0xf7, 0xfa,
+  0xb7, 0xba, 0xad, 0xa0, 0x83, 0x8e, 0x99, 0x94, 0xdf, 0xd2, 0xc5, 0xc8, 0xeb, 0xe6, 0xf1, 0xfc,
+  0x67, 0x6a, 0x7d, 0x70, 0x53, 0x5e, 0x49, 0x44, 0x0f, 0x02, 0x15, 0x18, 0x3b, 0x36, 0x21, 0x2c,
+  0x0c, 0x01, 0x16, 0x1b, 0x38, 0x35, 0x22, 0x2f, 0x64, 0x69, 0x7e, 0x73, 0x50, 0x5d, 0x4a, 0x47,
+  0xdc, 0xd1, 0xc6, 0xcb, 0xe8, 0xe5, 0xf2, 0xff, 0xb4, 0xb9, 0xae, 0xa3, 0x80, 0x8d, 0x9a, 0x97,
+},
+{ // gmult(0x0b, b);
+  0x00, 0x0b, 0x16, 0x1d, 0x2c, 0x27, 0x3a, 0x31, 0x58, 0x53, 0x4e, 0x45, 0x74, 0x7f, 0x62, 0x69,
+  0xb0, 0xbb, 0xa6, 0xad, 0x9c, 0x97, 0x8a, 0x81, 0xe8, 0xe3, 0xfe, 0xf5, 0xc4, 0xcf, 0xd2, 0xd9,
+  0x7b, 0x70, 0x6d, 0x66, 0x57, 0x5c, 0x41, 0x4a, 0x23, 0x28, 0x35, 0x3e, 0x0f, 0x04, 0x19, 0x12,
+  0xcb, 0xc0, 0xdd, 0xd6, 0xe7, 0xec, 0xf1, 0xfa, 0x93, 0x98, 0x85, 0x8e, 0xbf, 0xb4, 0xa9, 0xa2,
+  0xf6, 0xfd, 0xe0, 0xeb, 0xda, 0xd1, 0xcc, 0xc7, 0xae, 0xa5, 0xb8, 0xb3, 0x82, 0x89, 0x94, 0x9f,
+  0x46, 0x4d, 0x50, 0x5b, 0x6a, 0x61, 0x7c, 0x77, 0x1e, 0x15, 0x08, 0x03, 0x32, 0x39, 0x24, 0x2f,
+  0x8d, 0x86, 0x9b, 0x90, 0xa1, 0xaa, 0xb7, 0xbc, 0xd5, 0xde, 0xc3, 0xc8, 0xf9, 0xf2, 0xef, 0xe4,
+  0x3d, 0x36, 0x2b, 0x20, 0x11, 0x1a, 0x07, 0x0c, 0x65, 0x6e, 0x73, 0x78, 0x49, 0x42, 0x5f, 0x54,
+  0xf7, 0xfc, 0xe1, 0xea, 0xdb, 0xd0, 0xcd, 0xc6, 0xaf, 0xa4, 0xb9, 0xb2, 0x83, 0x88, 0x95, 0x9e,
+  0x47, 0x4c, 0x51, 0x5a, 0x6b, 0x60, 0x7d, 0x76, 0x1f, 0x14, 0x09, 0x02, 0x33, 0x38, 0x25, 0x2e,
+  0x8c, 0x87, 0x9a, 0x91, 0xa0, 0xab, 0xb6, 0xbd, 0xd4, 0xdf, 0xc2, 0xc9, 0xf8, 0xf3, 0xee, 0xe5,
+  0x3c, 0x37, 0x2a, 0x21, 0x10, 0x1b, 0x06, 0x0d, 0x64, 0x6f, 0x72, 0x79, 0x48, 0x43, 0x5e, 0x55,
+  0x01, 0x0a, 0x17, 0x1c, 0x2d, 0x26, 0x3b, 0x30, 0x59, 0x52, 0x4f, 0x44, 0x75, 0x7e, 0x63, 0x68,
+  0xb1, 0xba, 0xa7, 0xac, 0x9d, 0x96, 0x8b, 0x80, 0xe9, 0xe2, 0xff, 0xf4, 0xc5, 0xce, 0xd3, 0xd8,
+  0x7a, 0x71, 0x6c, 0x67, 0x56, 0x5d, 0x40, 0x4b, 0x22, 0x29, 0x34, 0x3f, 0x0e, 0x05, 0x18, 0x13,
+  0xca, 0xc1, 0xdc, 0xd7, 0xe6, 0xed, 0xf0, 0xfb, 0x92, 0x99, 0x84, 0x8f, 0xbe, 0xb5, 0xa8, 0xa3,
+}
+};
+
+/*
+ * S-box transformation table
+ */
+static uint8_t simde_x_aes_s_box[256] = {
+  // 0     1     2     3     4     5     6     7     8     9     a     b     c     d     e     f
+  0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5, 0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76, // 0
+  0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0, 0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0, // 1
+  0xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc, 0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15, // 2
+  0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a, 0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27, 0xb2, 0x75, // 3
+  0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0, 0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84, // 4
+  0x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b, 0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf, // 5
+  0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85, 0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c, 0x9f, 0xa8, // 6
+  0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5, 0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2, // 7
+  0xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17, 0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73, // 8
+  0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88, 0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e, 0x0b, 0xdb, // 9
+  0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c, 0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79, // a
+  0xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9, 0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08, // b
+  0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6, 0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a, // c
+  0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e, 0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e, // d
+  0xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94, 0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf, // e
+  0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68, 0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16};// f
+
+/*
+ * Inverse S-box transformation table
+ */
+static uint8_t simde_x_aes_inv_s_box[256] = {
+  // 0     1     2     3     4     5     6     7     8     9     a     b     c     d     e     f
+  0x52, 0x09, 0x6a, 0xd5, 0x30, 0x36, 0xa5, 0x38, 0xbf, 0x40, 0xa3, 0x9e, 0x81, 0xf3, 0xd7, 0xfb, // 0
+  0x7c, 0xe3, 0x39, 0x82, 0x9b, 0x2f, 0xff, 0x87, 0x34, 0x8e, 0x43, 0x44, 0xc4, 0xde, 0xe9, 0xcb, // 1
+  0x54, 0x7b, 0x94, 0x32, 0xa6, 0xc2, 0x23, 0x3d, 0xee, 0x4c, 0x95, 0x0b, 0x42, 0xfa, 0xc3, 0x4e, // 2
+  0x08, 0x2e, 0xa1, 0x66, 0x28, 0xd9, 0x24, 0xb2, 0x76, 0x5b, 0xa2, 0x49, 0x6d, 0x8b, 0xd1, 0x25, // 3
+  0x72, 0xf8, 0xf6, 0x64, 0x86, 0x68, 0x98, 0x16, 0xd4, 0xa4, 0x5c, 0xcc, 0x5d, 0x65, 0xb6, 0x92, // 4
+  0x6c, 0x70, 0x48, 0x50, 0xfd, 0xed, 0xb9, 0xda, 0x5e, 0x15, 0x46, 0x57, 0xa7, 0x8d, 0x9d, 0x84, // 5
+  0x90, 0xd8, 0xab, 0x00, 0x8c, 0xbc, 0xd3, 0x0a, 0xf7, 0xe4, 0x58, 0x05, 0xb8, 0xb3, 0x45, 0x06, // 6
+  0xd0, 0x2c, 0x1e, 0x8f, 0xca, 0x3f, 0x0f, 0x02, 0xc1, 0xaf, 0xbd, 0x03, 0x01, 0x13, 0x8a, 0x6b, // 7
+  0x3a, 0x91, 0x11, 0x41, 0x4f, 0x67, 0xdc, 0xea, 0x97, 0xf2, 0xcf, 0xce, 0xf0, 0xb4, 0xe6, 0x73, // 8
+  0x96, 0xac, 0x74, 0x22, 0xe7, 0xad, 0x35, 0x85, 0xe2, 0xf9, 0x37, 0xe8, 0x1c, 0x75, 0xdf, 0x6e, // 9
+  0x47, 0xf1, 0x1a, 0x71, 0x1d, 0x29, 0xc5, 0x89, 0x6f, 0xb7, 0x62, 0x0e, 0xaa, 0x18, 0xbe, 0x1b, // a
+  0xfc, 0x56, 0x3e, 0x4b, 0xc6, 0xd2, 0x79, 0x20, 0x9a, 0xdb, 0xc0, 0xfe, 0x78, 0xcd, 0x5a, 0xf4, // b
+  0x1f, 0xdd, 0xa8, 0x33, 0x88, 0x07, 0xc7, 0x31, 0xb1, 0x12, 0x10, 0x59, 0x27, 0x80, 0xec, 0x5f, // c
+  0x60, 0x51, 0x7f, 0xa9, 0x19, 0xb5, 0x4a, 0x0d, 0x2d, 0xe5, 0x7a, 0x9f, 0x93, 0xc9, 0x9c, 0xef, // d
+  0xa0, 0xe0, 0x3b, 0x4d, 0xae, 0x2a, 0xf5, 0xb0, 0xc8, 0xeb, 0xbb, 0x3c, 0x83, 0x53, 0x99, 0x61, // e
+  0x17, 0x2b, 0x04, 0x7e, 0xba, 0x77, 0xd6, 0x26, 0xe1, 0x69, 0x14, 0x63, 0x55, 0x21, 0x0c, 0x7d};// f
+
+/*
+ * Multiplication of 4 byte words
+ * m(x) = x4+1
+
+SIMDE_FUNCTION_ATTRIBUTES
+void coef_mult(uint8_t *a, uint8_t *b, uint8_t *d) {
+
+  d[0] = gmult(a[0],b[0])^gmult(a[3],b[1])^gmult(a[2],b[2])^gmult(a[1],b[3]);
+  d[1] = gmult(a[1],b[0])^gmult(a[0],b[1])^gmult(a[3],b[2])^gmult(a[2],b[3]);
+  d[2] = gmult(a[2],b[0])^gmult(a[1],b[1])^gmult(a[0],b[2])^gmult(a[3],b[3]);
+  d[3] = gmult(a[3],b[0])^gmult(a[2],b[1])^gmult(a[1],b[2])^gmult(a[0],b[3]);
+}
+*/
+
+SIMDE_FUNCTION_ATTRIBUTES
+void simde_x_aes_coef_mult_lookup(int lookup_table_offset, uint8_t *b, uint8_t *d) {
+  int o = lookup_table_offset;
+
+  #define gmultl(o,b) simde_x_aes_gmult_lookup_table[o][b]
+  d[0] = gmultl(o+0,b[0])^gmultl(o+3,b[1])^gmultl(o+2,b[2])^gmultl(o+1,b[3]);
+  d[1] = gmultl(o+1,b[0])^gmultl(o+0,b[1])^gmultl(o+3,b[2])^gmultl(o+2,b[3]);
+  d[2] = gmultl(o+2,b[0])^gmultl(o+1,b[1])^gmultl(o+0,b[2])^gmultl(o+3,b[3]);
+  d[3] = gmultl(o+3,b[0])^gmultl(o+2,b[1])^gmultl(o+1,b[2])^gmultl(o+0,b[3]);
+  #undef gmultl
+}
+
+#endif
+
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_AES_H) */
diff --git a/external_libs/pgenlib/simde/simde-align.h b/external_libs/pgenlib/simde/simde-align.h
new file mode 100644
index 0000000..2cd49e7
--- /dev/null
+++ b/external_libs/pgenlib/simde/simde-align.h
@@ -0,0 +1,450 @@
+/* Alignment
+ * Created by Evan Nemerson <evan@nemerson.com>
+ *
+ *   To the extent possible under law, the authors have waived all
+ *   copyright and related or neighboring rights to this code.  For
+ *   details, see the Creative Commons Zero 1.0 Universal license at
+ *   <https://creativecommons.org/publicdomain/zero/1.0/>
+ *
+ * SPDX-License-Identifier: CC0-1.0
+ *
+ **********************************************************************
+ *
+ * This is portability layer which should help iron out some
+ * differences across various compilers, as well as various versions of
+ * C and C++.
+ *
+ * It was originally developed for SIMD Everywhere
+ * (<https://github.com/simd-everywhere/simde>), but since its only
+ * dependency is Hedley (<https://nemequ.github.io/hedley>, also CC0)
+ * it can easily be used in other projects, so please feel free to do
+ * so.
+ *
+ * If you do use this in your project, please keep a link to SIMDe in
+ * your code to remind you where to report any bugs and/or check for
+ * updated versions.
+ *
+ * # API Overview
+ *
+ * The API has several parts, and most macros have a few variations.
+ * There are APIs for declaring aligned fields/variables, optimization
+ * hints, and run-time alignment checks.
+ *
+ * Briefly, macros ending with "_TO" take numeric values and are great
+ * when you know the value you would like to use.  Macros ending with
+ * "_LIKE", on the other hand, accept a type and are used when you want
+ * to use the alignment of a type instead of hardcoding a value.
+ *
+ * Documentation for each section of the API is inline.
+ *
+ * True to form, MSVC is the main problem and imposes several
+ * limitations on the effectiveness of the APIs.  Detailed descriptions
+ * of the limitations of each macro are inline, but in general:
+ *
+ *  * On C11+ or C++11+ code written using this API will work.  The
+ *    ASSUME macros may or may not generate a hint to the compiler, but
+ *    that is only an optimization issue and will not actually cause
+ *    failures.
+ *  * If you're using pretty much any compiler other than MSVC,
+ *    everything should basically work as well as in C11/C++11.
+ */
+
+#if !defined(SIMDE_ALIGN_H)
+#define SIMDE_ALIGN_H
+
+#include "hedley.h"
+
+/* I know this seems a little silly, but some non-hosted compilers
+ * don't have stddef.h, so we try to accommodate them. */
+#if !defined(SIMDE_ALIGN_SIZE_T_)
+  #if defined(__SIZE_TYPE__)
+    #define SIMDE_ALIGN_SIZE_T_ __SIZE_TYPE__
+  #elif defined(__SIZE_T_TYPE__)
+    #define SIMDE_ALIGN_SIZE_T_ __SIZE_TYPE__
+  #elif defined(__cplusplus)
+    #include <cstddef>
+    #define SIMDE_ALIGN_SIZE_T_ size_t
+  #else
+    #include <stddef.h>
+    #define SIMDE_ALIGN_SIZE_T_ size_t
+  #endif
+#endif
+
+#if !defined(SIMDE_ALIGN_INTPTR_T_)
+  #if defined(__INTPTR_TYPE__)
+    #define SIMDE_ALIGN_INTPTR_T_ __INTPTR_TYPE__
+  #elif defined(__PTRDIFF_TYPE__)
+    #define SIMDE_ALIGN_INTPTR_T_ __PTRDIFF_TYPE__
+  #elif defined(__PTRDIFF_T_TYPE__)
+    #define SIMDE_ALIGN_INTPTR_T_ __PTRDIFF_T_TYPE__
+  #elif defined(__cplusplus)
+    #include <cstddef>
+    #define SIMDE_ALIGN_INTPTR_T_ ptrdiff_t
+  #else
+    #include <stddef.h>
+    #define SIMDE_ALIGN_INTPTR_T_ ptrdiff_t
+  #endif
+#endif
+
+#if defined(SIMDE_ALIGN_DEBUG)
+  #if defined(__cplusplus)
+    #include <cstdio>
+  #else
+    #include <stdio.h>
+  #endif
+#endif
+
+/* SIMDE_ALIGN_OF(Type)
+ *
+ * The SIMDE_ALIGN_OF macro works like alignof, or _Alignof, or
+ * __alignof, or __alignof__, or __ALIGNOF__, depending on the compiler.
+ * It isn't defined everywhere (only when the compiler has some alignof-
+ * like feature we can use to implement it), but it should work in most
+ * modern compilers, as well as C11 and C++11.
+ *
+ * If we can't find an implementation for SIMDE_ALIGN_OF then the macro
+ * will not be defined, so if you can handle that situation sensibly
+ * you may need to sprinkle some ifdefs into your code.
+ */
+#if \
+    (defined(__STDC_VERSION__) && (__STDC_VERSION__ >= 201112L)) || \
+    (0 && HEDLEY_HAS_FEATURE(c_alignof))
+  #define SIMDE_ALIGN_OF(Type) _Alignof(Type)
+#elif \
+    (defined(__cplusplus) && (__cplusplus >= 201103L)) || \
+    (0 && HEDLEY_HAS_FEATURE(cxx_alignof))
+  #define SIMDE_ALIGN_OF(Type) alignof(Type)
+#elif \
+    HEDLEY_GCC_VERSION_CHECK(2,95,0) || \
+    HEDLEY_ARM_VERSION_CHECK(4,1,0) || \
+    HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+    HEDLEY_SUNPRO_VERSION_CHECK(5,13,0) || \
+    HEDLEY_TINYC_VERSION_CHECK(0,9,24) || \
+    HEDLEY_PGI_VERSION_CHECK(19,10,0) || \
+    HEDLEY_CRAY_VERSION_CHECK(10,0,0) || \
+    HEDLEY_TI_ARMCL_VERSION_CHECK(16,9,0) || \
+    HEDLEY_TI_CL2000_VERSION_CHECK(16,9,0) || \
+    HEDLEY_TI_CL6X_VERSION_CHECK(8,0,0) || \
+    HEDLEY_TI_CL7X_VERSION_CHECK(1,2,0) || \
+    HEDLEY_TI_CL430_VERSION_CHECK(16,9,0) || \
+    HEDLEY_TI_CLPRU_VERSION_CHECK(2,3,2) || \
+    HEDLEY_MCST_LCC_VERSION_CHECK(1,25,10) || \
+    defined(__IBM__ALIGNOF__) || \
+    defined(__clang__)
+  #define SIMDE_ALIGN_OF(Type) __alignof__(Type)
+#elif \
+  HEDLEY_IAR_VERSION_CHECK(8,40,0)
+  #define SIMDE_ALIGN_OF(Type) __ALIGNOF__(Type)
+#elif \
+  HEDLEY_MSVC_VERSION_CHECK(19,0,0)
+  /* Probably goes back much further, but MS takes down their old docs.
+   * If you can verify that this works in earlier versions please let
+   * me know! */
+  #define SIMDE_ALIGN_OF(Type) __alignof(Type)
+#endif
+
+/* SIMDE_ALIGN_MAXIMUM:
+ *
+ * This is the maximum alignment that the compiler supports.  You can
+ * define the value prior to including SIMDe if necessary, but in that
+ * case *please* submit an issue so we can add the platform to the
+ * detection code.
+ *
+ * Most compilers are okay with types which are aligned beyond what
+ * they think is the maximum, as long as the alignment is a power
+ * of two.  Older versions of MSVC is the exception, so we need to cap
+ * the alignment requests at values that the implementation supports.
+ *
+ * XL C/C++ will accept values larger than 16 (which is the alignment
+ * of an AltiVec vector), but will not reliably align to the larger
+ * value, so so we cap the value at 16 there.
+ *
+ * If the compiler accepts any power-of-two value within reason then
+ * this macro should be left undefined, and the SIMDE_ALIGN_CAP
+ * macro will just return the value passed to it. */
+#if !defined(SIMDE_ALIGN_MAXIMUM)
+  #if defined(HEDLEY_MSVC_VERSION)
+    #if HEDLEY_MSVC_VERSION_CHECK(19, 16, 0)
+      // Visual studio 2017 and newer does not need a max
+    #else
+      #if defined(_M_IX86) || defined(_M_AMD64)
+        #if HEDLEY_MSVC_VERSION_CHECK(19,14,0)
+          #define SIMDE_ALIGN_PLATFORM_MAXIMUM 64
+        #elif HEDLEY_MSVC_VERSION_CHECK(16,0,0)
+          /* VS 2010 is really a guess based on Wikipedia; if anyone can
+           * test with old VS versions I'd really appreciate it. */
+          #define SIMDE_ALIGN_PLATFORM_MAXIMUM 32
+        #else
+          #define SIMDE_ALIGN_PLATFORM_MAXIMUM 16
+        #endif
+      #elif defined(_M_ARM) || defined(_M_ARM64)
+        #define SIMDE_ALIGN_PLATFORM_MAXIMUM 8
+      #endif
+    #endif
+  #elif defined(HEDLEY_IBM_VERSION)
+    #define SIMDE_ALIGN_PLATFORM_MAXIMUM 16
+  #endif
+#endif
+
+/* You can mostly ignore these; they're intended for internal use.
+ * If you do need to use them please let me know; if they fulfill
+ * a common use case I'll probably drop the trailing underscore
+ * and make them part of the public API. */
+#if defined(SIMDE_ALIGN_PLATFORM_MAXIMUM)
+  #if SIMDE_ALIGN_PLATFORM_MAXIMUM >= 64
+    #define SIMDE_ALIGN_64_ 64
+    #define SIMDE_ALIGN_32_ 32
+    #define SIMDE_ALIGN_16_ 16
+    #define SIMDE_ALIGN_8_ 8
+  #elif SIMDE_ALIGN_PLATFORM_MAXIMUM >= 32
+    #define SIMDE_ALIGN_64_ 32
+    #define SIMDE_ALIGN_32_ 32
+    #define SIMDE_ALIGN_16_ 16
+    #define SIMDE_ALIGN_8_ 8
+  #elif SIMDE_ALIGN_PLATFORM_MAXIMUM >= 16
+    #define SIMDE_ALIGN_64_ 16
+    #define SIMDE_ALIGN_32_ 16
+    #define SIMDE_ALIGN_16_ 16
+    #define SIMDE_ALIGN_8_ 8
+  #elif SIMDE_ALIGN_PLATFORM_MAXIMUM >= 8
+    #define SIMDE_ALIGN_64_ 8
+    #define SIMDE_ALIGN_32_ 8
+    #define SIMDE_ALIGN_16_ 8
+    #define SIMDE_ALIGN_8_ 8
+  #else
+    #error Max alignment expected to be >= 8
+  #endif
+#else
+  #define SIMDE_ALIGN_64_ 64
+  #define SIMDE_ALIGN_32_ 32
+  #define SIMDE_ALIGN_16_ 16
+  #define SIMDE_ALIGN_8_ 8
+#endif
+
+/**
+ * SIMDE_ALIGN_CAP(Alignment)
+ *
+ * Returns the minimum of Alignment or SIMDE_ALIGN_MAXIMUM.
+ */
+#if defined(SIMDE_ALIGN_MAXIMUM)
+  #define SIMDE_ALIGN_CAP(Alignment) (((Alignment) < (SIMDE_ALIGN_PLATFORM_MAXIMUM)) ? (Alignment) : (SIMDE_ALIGN_PLATFORM_MAXIMUM))
+#else
+  #define SIMDE_ALIGN_CAP(Alignment) (Alignment)
+#endif
+
+/* SIMDE_ALIGN_TO(Alignment)
+ *
+ * SIMDE_ALIGN_TO is used to declare types or variables.  It basically
+ * maps to the align attribute in most compilers, the align declspec
+ * in MSVC, or _Alignas/alignas in C11/C++11.
+ *
+ * Example:
+ *
+ *   struct i32x4 {
+ *     SIMDE_ALIGN_TO(16) int32_t values[4];
+ *   }
+ *
+ * Limitations:
+ *
+ * MSVC requires that the Alignment parameter be numeric; you can't do
+ * something like `SIMDE_ALIGN_TO(SIMDE_ALIGN_OF(int))`.  This is
+ * unfortunate because that's really how the LIKE macros are
+ * implemented, and I am not aware of a way to get anything like this
+ * to work without using the C11/C++11 keywords.
+ *
+ * It also means that we can't use SIMDE_ALIGN_CAP to limit the
+ * alignment to the value specified, which MSVC also requires, so on
+ * MSVC you should use the `SIMDE_ALIGN_TO_8/16/32/64` macros instead.
+ * They work like `SIMDE_ALIGN_TO(SIMDE_ALIGN_CAP(Alignment))` would,
+ * but should be safe to use on MSVC.
+ *
+ * All this is to say that, if you want your code to work on MSVC, you
+ * should use the SIMDE_ALIGN_TO_8/16/32/64 macros below instead of
+ * SIMDE_ALIGN_TO(8/16/32/64).
+ */
+#if \
+    HEDLEY_HAS_ATTRIBUTE(aligned) || \
+    HEDLEY_GCC_VERSION_CHECK(2,95,0) || \
+    HEDLEY_CRAY_VERSION_CHECK(8,4,0) || \
+    HEDLEY_IBM_VERSION_CHECK(11,1,0) || \
+    HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+    HEDLEY_PGI_VERSION_CHECK(19,4,0) || \
+    HEDLEY_ARM_VERSION_CHECK(4,1,0) || \
+    HEDLEY_TINYC_VERSION_CHECK(0,9,24) || \
+    HEDLEY_TI_ARMCL_VERSION_CHECK(16,9,0) || \
+    HEDLEY_TI_CL2000_VERSION_CHECK(16,9,0) || \
+    HEDLEY_TI_CL6X_VERSION_CHECK(8,0,0) || \
+    HEDLEY_TI_CL7X_VERSION_CHECK(1,2,0) || \
+    HEDLEY_TI_CL430_VERSION_CHECK(16,9,0) || \
+    HEDLEY_TI_CLPRU_VERSION_CHECK(2,3,2)
+  #define SIMDE_ALIGN_TO(Alignment) __attribute__((__aligned__(SIMDE_ALIGN_CAP(Alignment))))
+#elif \
+    (defined(__STDC_VERSION__) && (__STDC_VERSION__ >= 201112L))
+  #define SIMDE_ALIGN_TO(Alignment) _Alignas(SIMDE_ALIGN_CAP(Alignment))
+#elif \
+    (defined(__cplusplus) && (__cplusplus >= 201103L))
+  #define SIMDE_ALIGN_TO(Alignment) alignas(SIMDE_ALIGN_CAP(Alignment))
+#elif \
+    defined(HEDLEY_MSVC_VERSION)
+  #define SIMDE_ALIGN_TO(Alignment) __declspec(align(Alignment))
+  /* Unfortunately MSVC can't handle __declspec(align(__alignof(Type)));
+   * the alignment passed to the declspec has to be an integer. */
+  #define SIMDE_ALIGN_OF_UNUSABLE_FOR_LIKE
+#endif
+#define SIMDE_ALIGN_TO_64 SIMDE_ALIGN_TO(SIMDE_ALIGN_64_)
+#define SIMDE_ALIGN_TO_32 SIMDE_ALIGN_TO(SIMDE_ALIGN_32_)
+#define SIMDE_ALIGN_TO_16 SIMDE_ALIGN_TO(SIMDE_ALIGN_16_)
+#define SIMDE_ALIGN_TO_8 SIMDE_ALIGN_TO(SIMDE_ALIGN_8_)
+
+/* SIMDE_ALIGN_ASSUME_TO(Pointer, Alignment)
+ *
+ * SIMDE_ALIGN_ASSUME_TO is semantically similar to C++20's
+ * std::assume_aligned, or __builtin_assume_aligned.  It tells the
+ * compiler to assume that the provided pointer is aligned to an
+ * `Alignment`-byte boundary.
+ *
+ * If you define SIMDE_ALIGN_DEBUG prior to including this header then
+ * SIMDE_ALIGN_ASSUME_TO will turn into a runtime check.   We don't
+ * integrate with NDEBUG in this header, but it may be a good idea to
+ * put something like this in your code:
+ *
+ *   #if !defined(NDEBUG)
+ *     #define SIMDE_ALIGN_DEBUG
+ *   #endif
+ *   #include <.../simde-align.h>
+ */
+#if \
+    HEDLEY_HAS_BUILTIN(__builtin_assume_aligned) || \
+    HEDLEY_GCC_VERSION_CHECK(4,7,0)
+  #define SIMDE_ALIGN_ASSUME_TO_UNCHECKED(Pointer, Alignment) \
+    HEDLEY_REINTERPRET_CAST(__typeof__(Pointer), __builtin_assume_aligned(HEDLEY_CONST_CAST(void*, HEDLEY_REINTERPRET_CAST(const void*, Pointer)), Alignment))
+#elif HEDLEY_INTEL_VERSION_CHECK(13,0,0)
+  #define SIMDE_ALIGN_ASSUME_TO_UNCHECKED(Pointer, Alignment) (__extension__ ({ \
+      __typeof__(v) simde_assume_aligned_t_ = (Pointer); \
+      __assume_aligned(simde_assume_aligned_t_, Alignment); \
+      simde_assume_aligned_t_; \
+    }))
+#elif defined(__cplusplus) && (__cplusplus > 201703L)
+  #include <memory>
+  #define SIMDE_ALIGN_ASSUME_TO_UNCHECKED(Pointer, Alignment) std::assume_aligned<Alignment>(Pointer)
+#else
+  #if defined(__cplusplus)
+    template<typename T> HEDLEY_ALWAYS_INLINE static T* simde_align_assume_to_unchecked(T* ptr, const size_t alignment)
+  #else
+    HEDLEY_ALWAYS_INLINE static void* simde_align_assume_to_unchecked(void* ptr, const size_t alignment)
+  #endif
+  {
+    HEDLEY_ASSUME((HEDLEY_REINTERPRET_CAST(size_t, (ptr)) % SIMDE_ALIGN_CAP(alignment)) == 0);
+    return ptr;
+  }
+  #if defined(__cplusplus)
+    #define SIMDE_ALIGN_ASSUME_TO_UNCHECKED(Pointer, Alignment) simde_align_assume_to_unchecked((Pointer), (Alignment))
+  #else
+    #define SIMDE_ALIGN_ASSUME_TO_UNCHECKED(Pointer, Alignment) simde_align_assume_to_unchecked(HEDLEY_CONST_CAST(void*, HEDLEY_REINTERPRET_CAST(const void*, Pointer)), (Alignment))
+  #endif
+#endif
+
+#if !defined(SIMDE_ALIGN_DEBUG)
+  #define SIMDE_ALIGN_ASSUME_TO(Pointer, Alignment) SIMDE_ALIGN_ASSUME_TO_UNCHECKED(Pointer, Alignment)
+#else
+  #include <stdio.h>
+  #if defined(__cplusplus)
+    template<typename T>
+    static HEDLEY_ALWAYS_INLINE
+    T*
+    simde_align_assume_to_checked_uncapped(T* ptr, const size_t alignment, const char* file, int line, const char* ptrname)
+  #else
+    static HEDLEY_ALWAYS_INLINE
+    void*
+    simde_align_assume_to_checked_uncapped(void* ptr, const size_t alignment, const char* file, int line, const char* ptrname)
+  #endif
+  {
+    if (HEDLEY_UNLIKELY((HEDLEY_REINTERPRET_CAST(SIMDE_ALIGN_INTPTR_T_, (ptr)) % HEDLEY_STATIC_CAST(SIMDE_ALIGN_INTPTR_T_, SIMDE_ALIGN_CAP(alignment))) != 0)) {
+      fprintf(stderr, "%s:%d: alignment check failed for `%s' (%p %% %u == %u)\n",
+        file, line, ptrname, HEDLEY_REINTERPRET_CAST(const void*, ptr),
+        HEDLEY_STATIC_CAST(unsigned int, SIMDE_ALIGN_CAP(alignment)),
+        HEDLEY_STATIC_CAST(unsigned int, HEDLEY_REINTERPRET_CAST(SIMDE_ALIGN_INTPTR_T_, (ptr)) % HEDLEY_STATIC_CAST(SIMDE_ALIGN_INTPTR_T_, SIMDE_ALIGN_CAP(alignment))));
+    }
+
+    return ptr;
+  }
+
+  #if defined(__cplusplus)
+    #define SIMDE_ALIGN_ASSUME_TO(Pointer, Alignment) simde_align_assume_to_checked_uncapped((Pointer), (Alignment), __FILE__, __LINE__, #Pointer)
+  #else
+    #define SIMDE_ALIGN_ASSUME_TO(Pointer, Alignment) simde_align_assume_to_checked_uncapped(HEDLEY_CONST_CAST(void*, HEDLEY_REINTERPRET_CAST(const void*, Pointer)), (Alignment), __FILE__, __LINE__, #Pointer)
+  #endif
+#endif
+
+/* SIMDE_ALIGN_LIKE(Type)
+ * SIMDE_ALIGN_LIKE_#(Type)
+ *
+ * The SIMDE_ALIGN_LIKE macros are similar to the SIMDE_ALIGN_TO macros
+ * except instead of an integer they take a type; basically, it's just
+ * a more convenient way to do something like:
+ *
+ *   SIMDE_ALIGN_TO(SIMDE_ALIGN_OF(Type))
+ *
+ * The versions with a numeric suffix will fall back on using a numeric
+ * value in the event we can't use SIMDE_ALIGN_OF(Type).  This is
+ * mainly for MSVC, where __declspec(align()) can't handle anything
+ * other than hard-coded numeric values.
+ */
+#if defined(SIMDE_ALIGN_OF) && defined(SIMDE_ALIGN_TO) && !defined(SIMDE_ALIGN_OF_UNUSABLE_FOR_LIKE)
+  #define SIMDE_ALIGN_LIKE(Type) SIMDE_ALIGN_TO(SIMDE_ALIGN_OF(Type))
+  #define SIMDE_ALIGN_LIKE_64(Type) SIMDE_ALIGN_LIKE(Type)
+  #define SIMDE_ALIGN_LIKE_32(Type) SIMDE_ALIGN_LIKE(Type)
+  #define SIMDE_ALIGN_LIKE_16(Type) SIMDE_ALIGN_LIKE(Type)
+  #define SIMDE_ALIGN_LIKE_8(Type) SIMDE_ALIGN_LIKE(Type)
+#else
+  #define SIMDE_ALIGN_LIKE_64(Type) SIMDE_ALIGN_TO_64
+  #define SIMDE_ALIGN_LIKE_32(Type) SIMDE_ALIGN_TO_32
+  #define SIMDE_ALIGN_LIKE_16(Type) SIMDE_ALIGN_TO_16
+  #define SIMDE_ALIGN_LIKE_8(Type) SIMDE_ALIGN_TO_8
+#endif
+
+/* SIMDE_ALIGN_ASSUME_LIKE(Pointer, Type)
+ *
+ * This is similar to SIMDE_ALIGN_ASSUME_TO, except that it takes a
+ * type instead of a numeric value. */
+#if defined(SIMDE_ALIGN_OF) && defined(SIMDE_ALIGN_ASSUME_TO)
+  #define SIMDE_ALIGN_ASSUME_LIKE(Pointer, Type) SIMDE_ALIGN_ASSUME_TO(Pointer, SIMDE_ALIGN_OF(Type))
+#endif
+
+/* SIMDE_ALIGN_CAST(Type, Pointer)
+ *
+ * SIMDE_ALIGN_CAST is like C++'s reinterpret_cast, but it will try
+ * to silence warnings that some compilers may produce if you try
+ * to assign to a type with increased alignment requirements.
+ *
+ * Note that it does *not* actually attempt to tell the compiler that
+ * the pointer is aligned like the destination should be; that's the
+ * job of the next macro.  This macro is necessary for stupid APIs
+ * like _mm_loadu_si128 where the input is a __m128i* but the function
+ * is specifically for data which isn't necessarily aligned to
+ * _Alignof(__m128i).
+ */
+#if HEDLEY_HAS_WARNING("-Wcast-align") || defined(__clang__) || HEDLEY_GCC_VERSION_CHECK(3,4,0)
+  #define SIMDE_ALIGN_CAST(Type, Pointer) (__extension__({ \
+      HEDLEY_DIAGNOSTIC_PUSH \
+      _Pragma("GCC diagnostic ignored \"-Wcast-align\"") \
+      Type simde_r_ = HEDLEY_REINTERPRET_CAST(Type, Pointer); \
+      HEDLEY_DIAGNOSTIC_POP \
+      simde_r_; \
+    }))
+#else
+  #define SIMDE_ALIGN_CAST(Type, Pointer) HEDLEY_REINTERPRET_CAST(Type, Pointer)
+#endif
+
+/* SIMDE_ALIGN_ASSUME_CAST(Type, Pointer)
+ *
+ * This is sort of like a combination of a reinterpret_cast and a
+ * SIMDE_ALIGN_ASSUME_LIKE.  It uses SIMDE_ALIGN_ASSUME_LIKE to tell
+ * the compiler that the pointer is aligned like the specified type
+ * and casts the pointer to the specified type while suppressing any
+ * warnings from the compiler about casting to a type with greater
+ * alignment requirements.
+ */
+#define SIMDE_ALIGN_ASSUME_CAST(Type, Pointer) SIMDE_ALIGN_ASSUME_LIKE(SIMDE_ALIGN_CAST(Type, Pointer), Type)
+
+#endif /* !defined(SIMDE_ALIGN_H) */
diff --git a/external_libs/pgenlib/simde/simde-arch.h b/external_libs/pgenlib/simde/simde-arch.h
new file mode 100644
index 0000000..306974c
--- /dev/null
+++ b/external_libs/pgenlib/simde/simde-arch.h
@@ -0,0 +1,687 @@
+/* Architecture detection
+ * Created by Evan Nemerson <evan@nemerson.com>
+ *
+ *   To the extent possible under law, the authors have waived all
+ *   copyright and related or neighboring rights to this code.  For
+ *   details, see the Creative Commons Zero 1.0 Universal license at
+ *   <https://creativecommons.org/publicdomain/zero/1.0/>
+ *
+ * SPDX-License-Identifier: CC0-1.0
+ *
+ * Different compilers define different preprocessor macros for the
+ * same architecture.  This is an attempt to provide a single
+ * interface which is usable on any compiler.
+ *
+ * In general, a macro named SIMDE_ARCH_* is defined for each
+ * architecture the CPU supports.  When there are multiple possible
+ * versions, we try to define the macro to the target version.  For
+ * example, if you want to check for i586+, you could do something
+ * like:
+ *
+ *   #if defined(SIMDE_ARCH_X86) && (SIMDE_ARCH_X86 >= 5)
+ *   ...
+ *   #endif
+ *
+ * You could also just check that SIMDE_ARCH_X86 >= 5 without checking
+ * if it's defined first, but some compilers may emit a warning about
+ * an undefined macro being used (e.g., GCC with -Wundef).
+ *
+ * This was originally created for SIMDe
+ * <https://github.com/simd-everywhere/simde> (hence the prefix), but this
+ * header has no dependencies and may be used anywhere.  It is
+ * originally based on information from
+ * <https://sourceforge.net/p/predef/wiki/Architectures/>, though it
+ * has been enhanced with additional information.
+ *
+ * If you improve this file, or find a bug, please file the issue at
+ * <https://github.com/simd-everywhere/simde/issues>.  If you copy this into
+ * your project, even if you change the prefix, please keep the links
+ * to SIMDe intact so others know where to report issues, submit
+ * enhancements, and find the latest version. */
+
+#if !defined(SIMDE_ARCH_H)
+#define SIMDE_ARCH_H
+
+#include "hedley.h"
+
+/* Alpha
+   <https://en.wikipedia.org/wiki/DEC_Alpha> */
+#if defined(__alpha__) || defined(__alpha) || defined(_M_ALPHA)
+#  if defined(__alpha_ev6__)
+#    define SIMDE_ARCH_ALPHA 6
+#  elif defined(__alpha_ev5__)
+#    define SIMDE_ARCH_ALPHA 5
+#  elif defined(__alpha_ev4__)
+#    define SIMDE_ARCH_ALPHA 4
+#  else
+#    define SIMDE_ARCH_ALPHA 1
+#  endif
+#endif
+#if defined(SIMDE_ARCH_ALPHA)
+#  define SIMDE_ARCH_ALPHA_CHECK(version) ((version) <= SIMDE_ARCH_ALPHA)
+#else
+#  define SIMDE_ARCH_ALPHA_CHECK(version) (0)
+#endif
+
+/* Atmel AVR
+   <https://en.wikipedia.org/wiki/Atmel_AVR> */
+#if defined(__AVR_ARCH__)
+#  define SIMDE_ARCH_AVR __AVR_ARCH__
+#endif
+
+/* AMD64 / x86_64
+   <https://en.wikipedia.org/wiki/X86-64> */
+#if defined(__amd64__) || defined(__amd64) || defined(__x86_64__) || defined(__x86_64) || defined(_M_X64) || defined(_M_AMD64)
+#  if !defined(_M_ARM64EC)
+#     define SIMDE_ARCH_AMD64 1000
+#  endif
+#endif
+
+/* ARM
+   <https://en.wikipedia.org/wiki/ARM_architecture> */
+#if defined(__ARM_ARCH)
+#  if __ARM_ARCH > 100
+#    define SIMDE_ARCH_ARM (__ARM_ARCH)
+#  else
+#    define SIMDE_ARCH_ARM (__ARM_ARCH * 100)
+#  endif
+#elif defined(_M_ARM)
+#  if _M_ARM > 100
+#    define SIMDE_ARCH_ARM (_M_ARM)
+#  else
+#    define SIMDE_ARCH_ARM (_M_ARM * 100)
+#  endif
+#elif defined(_M_ARM64) || defined(_M_ARM64EC)
+#  define SIMDE_ARCH_ARM 800
+#elif defined(__arm__) || defined(__thumb__) || defined(__TARGET_ARCH_ARM) || defined(_ARM) || defined(_M_ARM) || defined(_M_ARM)
+#  define SIMDE_ARCH_ARM 1
+#endif
+#if defined(SIMDE_ARCH_ARM)
+#  define SIMDE_ARCH_ARM_CHECK(major, minor) (((major * 100) + (minor)) <= SIMDE_ARCH_ARM)
+#else
+#  define SIMDE_ARCH_ARM_CHECK(major, minor) (0)
+#endif
+
+/* AArch64
+   <https://en.wikipedia.org/wiki/ARM_architecture> */
+#if defined(__aarch64__) || defined(_M_ARM64) || defined(_M_ARM64EC)
+#  define SIMDE_ARCH_AARCH64 1000
+#endif
+#if defined(SIMDE_ARCH_AARCH64)
+#  define SIMDE_ARCH_AARCH64_CHECK(version) ((version) <= SIMDE_ARCH_AARCH64)
+#else
+#  define SIMDE_ARCH_AARCH64_CHECK(version) (0)
+#endif
+
+/* ARM SIMD ISA extensions */
+#if defined(__ARM_NEON) || defined(SIMDE_ARCH_AARCH64)
+#  if defined(SIMDE_ARCH_AARCH64)
+#    define SIMDE_ARCH_ARM_NEON SIMDE_ARCH_AARCH64
+#  elif defined(SIMDE_ARCH_ARM)
+#    define SIMDE_ARCH_ARM_NEON SIMDE_ARCH_ARM
+#  endif
+#endif
+#if defined(__ARM_FEATURE_AES) && __ARM_FEATURE_AES
+#  define SIMDE_ARCH_ARM_AES
+#endif
+#if defined(__ARM_FEATURE_COMPLEX) && __ARM_FEATURE_COMPLEX
+#  define SIMDE_ARCH_ARM_COMPLEX
+#endif
+#if defined(__ARM_FEATURE_CRYPTO) && __ARM_FEATURE_CRYPTO
+#  define SIMDE_ARCH_ARM_CRYPTO
+#endif
+#if defined(__ARM_FEATURE_DOTPROD) && __ARM_FEATURE_DOTPROD
+#  define SIMDE_ARCH_ARM_DOTPROD
+#endif
+#if defined(__ARM_FEATURE_FMA) && __ARM_FEATURE_FMA
+#  define SIMDE_ARCH_ARM_FMA
+#endif
+#if defined(__ARM_FEATURE_FP16_FML) && __ARM_FEATURE_FP16_FML
+#  define SIMDE_ARCH_ARM_FP16_FML
+#endif
+#if defined(__ARM_FEATURE_FRINT) && __ARM_FEATURE_FRINT
+#  define SIMDE_ARCH_ARM_FRINT
+#endif
+#if defined(__ARM_FEATURE_MATMUL_INT8) && __ARM_FEATURE_MATMUL_INT8
+#  define SIMDE_ARCH_ARM_MATMUL_INT8
+#endif
+#if defined(__ARM_FEATURE_SHA2) && __ARM_FEATURE_SHA2 && !defined(__APPLE_CC__)
+#  define SIMDE_ARCH_ARM_SHA2
+#endif
+#if defined(__ARM_FEATURE_SHA3) && __ARM_FEATURE_SHA3
+#  define SIMDE_ARCH_ARM_SHA3
+#endif
+#if defined(__ARM_FEATURE_SHA512) && __ARM_FEATURE_SHA512
+#  define SIMDE_ARCH_ARM_SHA512
+#endif
+#if defined(__ARM_FEATURE_SM3) && __ARM_FEATURE_SM3
+#  define SIMDE_ARCH_ARM_SM3
+#endif
+#if defined(__ARM_FEATURE_SM4) && __ARM_FEATURE_SM4
+#  define SIMDE_ARCH_ARM_SM4
+#endif
+#if defined(__ARM_FEATURE_SVE) && __ARM_FEATURE_SVE
+#  define SIMDE_ARCH_ARM_SVE
+#endif
+#if defined(__ARM_FEATURE_QRDMX) && __ARM_FEATURE_QRDMX
+#  define SIMDE_ARCH_ARM_QRDMX
+#endif
+
+/* Blackfin
+   <https://en.wikipedia.org/wiki/Blackfin> */
+#if defined(__bfin) || defined(__BFIN__) || defined(__bfin__)
+#  define SIMDE_ARCH_BLACKFIN 1
+#endif
+
+/* CRIS
+   <https://en.wikipedia.org/wiki/ETRAX_CRIS> */
+#if defined(__CRIS_arch_version)
+#  define SIMDE_ARCH_CRIS __CRIS_arch_version
+#elif defined(__cris__) || defined(__cris) || defined(__CRIS) || defined(__CRIS__)
+#  define SIMDE_ARCH_CRIS 1
+#endif
+
+/* Convex
+   <https://en.wikipedia.org/wiki/Convex_Computer> */
+#if defined(__convex_c38__)
+#  define SIMDE_ARCH_CONVEX 38
+#elif defined(__convex_c34__)
+#  define SIMDE_ARCH_CONVEX 34
+#elif defined(__convex_c32__)
+#  define SIMDE_ARCH_CONVEX 32
+#elif defined(__convex_c2__)
+#  define SIMDE_ARCH_CONVEX 2
+#elif defined(__convex__)
+#  define SIMDE_ARCH_CONVEX 1
+#endif
+#if defined(SIMDE_ARCH_CONVEX)
+#  define SIMDE_ARCH_CONVEX_CHECK(version) ((version) <= SIMDE_ARCH_CONVEX)
+#else
+#  define SIMDE_ARCH_CONVEX_CHECK(version) (0)
+#endif
+
+/* Adapteva Epiphany
+   <https://en.wikipedia.org/wiki/Adapteva_Epiphany> */
+#if defined(__epiphany__)
+#  define SIMDE_ARCH_EPIPHANY 1
+#endif
+
+/* Fujitsu FR-V
+   <https://en.wikipedia.org/wiki/FR-V_(microprocessor)> */
+#if defined(__frv__)
+#  define SIMDE_ARCH_FRV 1
+#endif
+
+/* H8/300
+   <https://en.wikipedia.org/wiki/H8_Family> */
+#if defined(__H8300__)
+#  define SIMDE_ARCH_H8300
+#endif
+
+/* Elbrus (8S, 8SV and successors)
+   <https://en.wikipedia.org/wiki/Elbrus-8S> */
+#if defined(__e2k__)
+#  define SIMDE_ARCH_E2K
+#endif
+
+/* HP/PA / PA-RISC
+   <https://en.wikipedia.org/wiki/PA-RISC> */
+#if defined(__PA8000__) || defined(__HPPA20__) || defined(__RISC2_0__) || defined(_PA_RISC2_0)
+#  define SIMDE_ARCH_HPPA 20
+#elif defined(__PA7100__) || defined(__HPPA11__) || defined(_PA_RISC1_1)
+#  define SIMDE_ARCH_HPPA 11
+#elif defined(_PA_RISC1_0)
+#  define SIMDE_ARCH_HPPA 10
+#elif defined(__hppa__) || defined(__HPPA__) || defined(__hppa)
+#  define SIMDE_ARCH_HPPA 1
+#endif
+#if defined(SIMDE_ARCH_HPPA)
+#  define SIMDE_ARCH_HPPA_CHECK(version) ((version) <= SIMDE_ARCH_HPPA)
+#else
+#  define SIMDE_ARCH_HPPA_CHECK(version) (0)
+#endif
+
+/* x86
+   <https://en.wikipedia.org/wiki/X86> */
+#if defined(_M_IX86)
+#  define SIMDE_ARCH_X86 (_M_IX86 / 100)
+#elif defined(__I86__)
+#  define SIMDE_ARCH_X86 __I86__
+#elif defined(i686) || defined(__i686) || defined(__i686__)
+#  define SIMDE_ARCH_X86 6
+#elif defined(i586) || defined(__i586) || defined(__i586__)
+#  define SIMDE_ARCH_X86 5
+#elif defined(i486) || defined(__i486) || defined(__i486__)
+#  define SIMDE_ARCH_X86 4
+#elif defined(i386) || defined(__i386) || defined(__i386__)
+#  define SIMDE_ARCH_X86 3
+#elif defined(_X86_) || defined(__X86__) || defined(__THW_INTEL__)
+#  define SIMDE_ARCH_X86 3
+#endif
+#if defined(SIMDE_ARCH_X86)
+#  define SIMDE_ARCH_X86_CHECK(version) ((version) <= SIMDE_ARCH_X86)
+#else
+#  define SIMDE_ARCH_X86_CHECK(version) (0)
+#endif
+
+/* SIMD ISA extensions for x86/x86_64 and Elbrus */
+#if defined(SIMDE_ARCH_X86) || defined(SIMDE_ARCH_AMD64) || defined(SIMDE_ARCH_E2K)
+#  if defined(_M_IX86_FP)
+#    define SIMDE_ARCH_X86_MMX
+#    if (_M_IX86_FP >= 1)
+#      define SIMDE_ARCH_X86_SSE 1
+#    endif
+#    if (_M_IX86_FP >= 2)
+#      define SIMDE_ARCH_X86_SSE2 1
+#    endif
+#  elif defined(_M_X64)
+#    define SIMDE_ARCH_X86_SSE 1
+#    define SIMDE_ARCH_X86_SSE2 1
+#  else
+#    if defined(__MMX__)
+#      define SIMDE_ARCH_X86_MMX 1
+#    endif
+#    if defined(__SSE__)
+#      define SIMDE_ARCH_X86_SSE 1
+#    endif
+#    if defined(__SSE2__)
+#      define SIMDE_ARCH_X86_SSE2 1
+#    endif
+#  endif
+#  if defined(__SSE3__)
+#    define SIMDE_ARCH_X86_SSE3 1
+#  endif
+#  if defined(__SSSE3__)
+#    define SIMDE_ARCH_X86_SSSE3 1
+#  endif
+#  if defined(__SSE4_1__)
+#    define SIMDE_ARCH_X86_SSE4_1 1
+#  endif
+#  if defined(__SSE4_2__)
+#    define SIMDE_ARCH_X86_SSE4_2 1
+#  endif
+#  if defined(__XOP__)
+#    define SIMDE_ARCH_X86_XOP 1
+#  endif
+#  if defined(__AVX__)
+#    define SIMDE_ARCH_X86_AVX 1
+#    if !defined(SIMDE_ARCH_X86_SSE3)
+#      define SIMDE_ARCH_X86_SSE3 1
+#    endif
+#    if !defined(SIMDE_ARCH_X86_SSE4_1)
+#      define SIMDE_ARCH_X86_SSE4_1 1
+#    endif
+#    if !defined(SIMDE_ARCH_X86_SSE4_2)
+#      define SIMDE_ARCH_X86_SSE4_2 1
+#    endif
+#  endif
+#  if defined(__AVX2__)
+#    define SIMDE_ARCH_X86_AVX2 1
+#    if defined(_MSC_VER)
+#      define SIMDE_ARCH_X86_FMA 1
+#    endif
+#  endif
+#  if defined(__FMA__)
+#    define SIMDE_ARCH_X86_FMA 1
+#    if !defined(SIMDE_ARCH_X86_AVX)
+#      define SIMDE_ARCH_X86_AVX 1
+#    endif
+#  endif
+#  if defined(__AVX512VP2INTERSECT__)
+#    define SIMDE_ARCH_X86_AVX512VP2INTERSECT 1
+#  endif
+#  if defined(__AVX512BITALG__)
+#    define SIMDE_ARCH_X86_AVX512BITALG 1
+#  endif
+#  if defined(__AVX512VPOPCNTDQ__)
+#    define SIMDE_ARCH_X86_AVX512VPOPCNTDQ 1
+#  endif
+#  if defined(__AVX512VBMI__)
+#    define SIMDE_ARCH_X86_AVX512VBMI 1
+#  endif
+#  if defined(__AVX512VBMI2__)
+#    define SIMDE_ARCH_X86_AVX512VBMI2 1
+#  endif
+#  if defined(__AVX512VNNI__)
+#    define SIMDE_ARCH_X86_AVX512VNNI 1
+#  endif
+#  if defined(__AVX5124VNNIW__)
+#    define SIMDE_ARCH_X86_AVX5124VNNIW 1
+#  endif
+#  if defined(__AVX512BW__)
+#    define SIMDE_ARCH_X86_AVX512BW 1
+#  endif
+#  if defined(__AVX512BF16__)
+#    define SIMDE_ARCH_X86_AVX512BF16 1
+#  endif
+#  if defined(__AVX512CD__)
+#    define SIMDE_ARCH_X86_AVX512CD 1
+#  endif
+#  if defined(__AVX512DQ__)
+#    define SIMDE_ARCH_X86_AVX512DQ 1
+#  endif
+#  if defined(__AVX512F__)
+#    define SIMDE_ARCH_X86_AVX512F 1
+#  endif
+#  if defined(__AVX512VL__)
+#    define SIMDE_ARCH_X86_AVX512VL 1
+#  endif
+#  if defined(__AVX512FP16__)
+#    define SIMDE_ARCH_X86_AVX512FP16 1
+#  endif
+#  if defined(__GFNI__)
+#    define SIMDE_ARCH_X86_GFNI 1
+#  endif
+#  if defined(__PCLMUL__)
+#    define SIMDE_ARCH_X86_PCLMUL 1
+#  endif
+#  if defined(__VPCLMULQDQ__)
+#    define SIMDE_ARCH_X86_VPCLMULQDQ 1
+#  endif
+#  if defined(__F16C__) || (defined(HEDLEY_MSVC_VERSION) && HEDLEY_MSVC_VERSION_CHECK(19,30,0) && defined(SIMDE_ARCH_X86_AVX2) )
+#    define SIMDE_ARCH_X86_F16C 1
+#  endif
+#  if defined(__AES__)
+#    define SIMDE_ARCH_X86_AES 1
+#  endif
+#endif
+
+/* Itanium
+   <https://en.wikipedia.org/wiki/Itanium> */
+#if defined(__ia64__) || defined(_IA64) || defined(__IA64__) || defined(__ia64) || defined(_M_IA64) || defined(__itanium__)
+#  define SIMDE_ARCH_IA64 1
+#endif
+
+/* Renesas M32R
+   <https://en.wikipedia.org/wiki/M32R> */
+#if defined(__m32r__) || defined(__M32R__)
+#  define SIMDE_ARCH_M32R
+#endif
+
+/* Motorola 68000
+   <https://en.wikipedia.org/wiki/Motorola_68000> */
+#if defined(__mc68060__) || defined(__MC68060__)
+#  define SIMDE_ARCH_M68K 68060
+#elif defined(__mc68040__) || defined(__MC68040__)
+#  define SIMDE_ARCH_M68K 68040
+#elif defined(__mc68030__) || defined(__MC68030__)
+#  define SIMDE_ARCH_M68K 68030
+#elif defined(__mc68020__) || defined(__MC68020__)
+#  define SIMDE_ARCH_M68K 68020
+#elif defined(__mc68010__) || defined(__MC68010__)
+#  define SIMDE_ARCH_M68K 68010
+#elif defined(__mc68000__) || defined(__MC68000__)
+#  define SIMDE_ARCH_M68K 68000
+#endif
+#if defined(SIMDE_ARCH_M68K)
+#  define SIMDE_ARCH_M68K_CHECK(version) ((version) <= SIMDE_ARCH_M68K)
+#else
+#  define SIMDE_ARCH_M68K_CHECK(version) (0)
+#endif
+
+/* Xilinx MicroBlaze
+   <https://en.wikipedia.org/wiki/MicroBlaze> */
+#if defined(__MICROBLAZE__) || defined(__microblaze__)
+#  define SIMDE_ARCH_MICROBLAZE
+#endif
+
+/* MIPS
+   <https://en.wikipedia.org/wiki/MIPS_architecture> */
+#if defined(_MIPS_ISA_MIPS64R2)
+#  define SIMDE_ARCH_MIPS 642
+#elif defined(_MIPS_ISA_MIPS64)
+#  define SIMDE_ARCH_MIPS 640
+#elif defined(_MIPS_ISA_MIPS32R2)
+#  define SIMDE_ARCH_MIPS 322
+#elif defined(_MIPS_ISA_MIPS32)
+#  define SIMDE_ARCH_MIPS 320
+#elif defined(_MIPS_ISA_MIPS4)
+#  define SIMDE_ARCH_MIPS 4
+#elif defined(_MIPS_ISA_MIPS3)
+#  define SIMDE_ARCH_MIPS 3
+#elif defined(_MIPS_ISA_MIPS2)
+#  define SIMDE_ARCH_MIPS 2
+#elif defined(_MIPS_ISA_MIPS1)
+#  define SIMDE_ARCH_MIPS 1
+#elif defined(_MIPS_ISA_MIPS) || defined(__mips) || defined(__MIPS__)
+#  define SIMDE_ARCH_MIPS 1
+#endif
+#if defined(SIMDE_ARCH_MIPS)
+#  define SIMDE_ARCH_MIPS_CHECK(version) ((version) <= SIMDE_ARCH_MIPS)
+#else
+#  define SIMDE_ARCH_MIPS_CHECK(version) (0)
+#endif
+
+#if defined(__mips_loongson_mmi)
+#  define SIMDE_ARCH_MIPS_LOONGSON_MMI 1
+#endif
+
+#if defined(__mips_msa)
+#  define SIMDE_ARCH_MIPS_MSA 1
+#endif
+
+/* Matsushita MN10300
+   <https://en.wikipedia.org/wiki/MN103> */
+#if defined(__MN10300__) || defined(__mn10300__)
+#  define SIMDE_ARCH_MN10300 1
+#endif
+
+/* POWER
+   <https://en.wikipedia.org/wiki/IBM_POWER_Instruction_Set_Architecture> */
+#if defined(_M_PPC)
+#  define SIMDE_ARCH_POWER _M_PPC
+#elif defined(_ARCH_PWR9)
+#  define SIMDE_ARCH_POWER 900
+#elif defined(_ARCH_PWR8)
+#  define SIMDE_ARCH_POWER 800
+#elif defined(_ARCH_PWR7)
+#  define SIMDE_ARCH_POWER 700
+#elif defined(_ARCH_PWR6)
+#  define SIMDE_ARCH_POWER 600
+#elif defined(_ARCH_PWR5)
+#  define SIMDE_ARCH_POWER 500
+#elif defined(_ARCH_PWR4)
+#  define SIMDE_ARCH_POWER 400
+#elif defined(_ARCH_440) || defined(__ppc440__)
+#  define SIMDE_ARCH_POWER 440
+#elif defined(_ARCH_450) || defined(__ppc450__)
+#  define SIMDE_ARCH_POWER 450
+#elif defined(_ARCH_601) || defined(__ppc601__)
+#  define SIMDE_ARCH_POWER 601
+#elif defined(_ARCH_603) || defined(__ppc603__)
+#  define SIMDE_ARCH_POWER 603
+#elif defined(_ARCH_604) || defined(__ppc604__)
+#  define SIMDE_ARCH_POWER 604
+#elif defined(_ARCH_605) || defined(__ppc605__)
+#  define SIMDE_ARCH_POWER 605
+#elif defined(_ARCH_620) || defined(__ppc620__)
+#  define SIMDE_ARCH_POWER 620
+#elif defined(__powerpc) || defined(__powerpc__) || defined(__POWERPC__) || defined(__ppc__) || defined(__PPC__) || defined(_ARCH_PPC) || defined(__ppc)
+#  define SIMDE_ARCH_POWER 1
+#endif
+#if defined(SIMDE_ARCH_POWER)
+  #define SIMDE_ARCH_POWER_CHECK(version) ((version) <= SIMDE_ARCH_POWER)
+#else
+  #define SIMDE_ARCH_POWER_CHECK(version) (0)
+#endif
+
+#if defined(__ALTIVEC__)
+#  define SIMDE_ARCH_POWER_ALTIVEC SIMDE_ARCH_POWER
+  #define SIMDE_ARCH_POWER_ALTIVEC_CHECK(version) ((version) <= SIMDE_ARCH_POWER)
+#else
+  #define SIMDE_ARCH_POWER_ALTIVEC_CHECK(version) (0)
+#endif
+
+/* RISC-V
+   <https://en.wikipedia.org/wiki/RISC-V> */
+#if defined(__riscv) || defined(__riscv__)
+#  if __riscv_xlen == 64
+#     define SIMDE_ARCH_RISCV64
+#  elif __riscv_xlen == 32
+#     define SIMDE_ARCH_RISCV32
+#  endif
+#endif
+
+/* RISC-V SIMD ISA extensions */
+#if defined(__riscv_zve32x)
+#  define SIMDE_ARCH_RISCV_ZVE32X 1
+#endif
+#if defined(__riscv_zve32f)
+#  define SIMDE_ARCH_RISCV_ZVE32F 1
+#endif
+#if defined(__riscv_zve64x)
+#  define SIMDE_ARCH_RISCV_ZVE64X 1
+#endif
+#if defined(__riscv_zve64f)
+#  define SIMDE_ARCH_RISCV_ZVE64F 1
+#endif
+#if defined(__riscv_zve64d)
+#  define SIMDE_ARCH_RISCV_ZVE64D 1
+#endif
+#if defined(__riscv_v)
+#  define SIMDE_ARCH_RISCV_V 1
+#endif
+#if defined(__riscv_zvfh)
+#  define SIMDE_ARCH_RISCV_ZVFH 1
+#endif
+#if defined(__riscv_zvfhmin)
+#  define SIMDE_ARCH_RISCV_ZVFHMIN 1
+#endif
+
+/* SPARC
+   <https://en.wikipedia.org/wiki/SPARC> */
+#if defined(__sparc_v9__) || defined(__sparcv9)
+#  define SIMDE_ARCH_SPARC 9
+#elif defined(__sparc_v8__) || defined(__sparcv8)
+#  define SIMDE_ARCH_SPARC 8
+#elif defined(__sparc_v7__) || defined(__sparcv7)
+#  define SIMDE_ARCH_SPARC 7
+#elif defined(__sparc_v6__) || defined(__sparcv6)
+#  define SIMDE_ARCH_SPARC 6
+#elif defined(__sparc_v5__) || defined(__sparcv5)
+#  define SIMDE_ARCH_SPARC 5
+#elif defined(__sparc_v4__) || defined(__sparcv4)
+#  define SIMDE_ARCH_SPARC 4
+#elif defined(__sparc_v3__) || defined(__sparcv3)
+#  define SIMDE_ARCH_SPARC 3
+#elif defined(__sparc_v2__) || defined(__sparcv2)
+#  define SIMDE_ARCH_SPARC 2
+#elif defined(__sparc_v1__) || defined(__sparcv1)
+#  define SIMDE_ARCH_SPARC 1
+#elif defined(__sparc__) || defined(__sparc)
+#  define SIMDE_ARCH_SPARC 1
+#endif
+#if defined(SIMDE_ARCH_SPARC)
+  #define SIMDE_ARCH_SPARC_CHECK(version) ((version) <= SIMDE_ARCH_SPARC)
+#else
+  #define SIMDE_ARCH_SPARC_CHECK(version) (0)
+#endif
+
+/* SuperH
+   <https://en.wikipedia.org/wiki/SuperH> */
+#if defined(__sh5__) || defined(__SH5__)
+#  define SIMDE_ARCH_SUPERH 5
+#elif defined(__sh4__) || defined(__SH4__)
+#  define SIMDE_ARCH_SUPERH 4
+#elif defined(__sh3__) || defined(__SH3__)
+#  define SIMDE_ARCH_SUPERH 3
+#elif defined(__sh2__) || defined(__SH2__)
+#  define SIMDE_ARCH_SUPERH 2
+#elif defined(__sh1__) || defined(__SH1__)
+#  define SIMDE_ARCH_SUPERH 1
+#elif defined(__sh__) || defined(__SH__)
+#  define SIMDE_ARCH_SUPERH 1
+#endif
+
+/* IBM System z
+   <https://en.wikipedia.org/wiki/IBM_System_z> */
+#if defined(__370__) || defined(__THW_370__) || defined(__s390__) || defined(__s390x__) || defined(__zarch__) || defined(__SYSC_ZARCH__)
+#  define SIMDE_ARCH_ZARCH __ARCH__
+#endif
+#if defined(SIMDE_ARCH_ZARCH)
+  #define SIMDE_ARCH_ZARCH_CHECK(version) ((version) <= SIMDE_ARCH_ZARCH)
+#else
+  #define SIMDE_ARCH_ZARCH_CHECK(version) (0)
+#endif
+
+#if defined(SIMDE_ARCH_ZARCH) && defined(__VEC__)
+  #define SIMDE_ARCH_ZARCH_ZVECTOR SIMDE_ARCH_ZARCH
+#endif
+
+/* TMS320 DSP
+   <https://en.wikipedia.org/wiki/Texas_Instruments_TMS320> */
+#if defined(_TMS320C6740) || defined(__TMS320C6740__)
+#  define SIMDE_ARCH_TMS320 6740
+#elif defined(_TMS320C6700_PLUS) || defined(__TMS320C6700_PLUS__)
+#  define SIMDE_ARCH_TMS320 6701
+#elif defined(_TMS320C6700) || defined(__TMS320C6700__)
+#  define SIMDE_ARCH_TMS320 6700
+#elif defined(_TMS320C6600) || defined(__TMS320C6600__)
+#  define SIMDE_ARCH_TMS320 6600
+#elif defined(_TMS320C6400_PLUS) || defined(__TMS320C6400_PLUS__)
+#  define SIMDE_ARCH_TMS320 6401
+#elif defined(_TMS320C6400) || defined(__TMS320C6400__)
+#  define SIMDE_ARCH_TMS320 6400
+#elif defined(_TMS320C6200) || defined(__TMS320C6200__)
+#  define SIMDE_ARCH_TMS320 6200
+#elif defined(_TMS320C55X) || defined(__TMS320C55X__)
+#  define SIMDE_ARCH_TMS320 550
+#elif defined(_TMS320C54X) || defined(__TMS320C54X__)
+#  define SIMDE_ARCH_TMS320 540
+#elif defined(_TMS320C28X) || defined(__TMS320C28X__)
+#  define SIMDE_ARCH_TMS320 280
+#endif
+#if defined(SIMDE_ARCH_TMS320)
+  #define SIMDE_ARCH_TMS320_CHECK(version) ((version) <= SIMDE_ARCH_TMS320)
+#else
+  #define SIMDE_ARCH_TMS320_CHECK(version) (0)
+#endif
+
+/* WebAssembly */
+#if defined(__wasm__)
+#  define SIMDE_ARCH_WASM 1
+#endif
+
+#if defined(SIMDE_ARCH_WASM) && defined(__wasm_simd128__)
+#  define SIMDE_ARCH_WASM_SIMD128
+#endif
+
+#if defined(SIMDE_ARCH_WASM) && defined(__wasm_relaxed_simd__)
+#  define SIMDE_ARCH_WASM_RELAXED_SIMD
+#endif
+
+/* Xtensa
+   <https://en.wikipedia.org/wiki/> */
+#if defined(__xtensa__) || defined(__XTENSA__)
+#  define SIMDE_ARCH_XTENSA 1
+#endif
+
+/* Availability of 16-bit floating-point arithmetic intrinsics */
+#if defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
+#  define SIMDE_ARCH_ARM_NEON_FP16
+#endif
+
+/* Availability of 16-bit brain floating-point arithmetic intrinsics */
+#if defined(__ARM_FEATURE_BF16_VECTOR_ARITHMETIC)
+#  define SIMDE_ARCH_ARM_NEON_BF16
+#endif
+
+/* LoongArch
+   <https://en.wikipedia.org/wiki/Loongson#LoongArch> */
+#if defined(__loongarch32)
+#  define SIMDE_ARCH_LOONGARCH 1
+#elif defined(__loongarch64)
+#  define SIMDE_ARCH_LOONGARCH 2
+#endif
+
+/* LSX: LoongArch 128-bits SIMD extension */
+#if defined(__loongarch_sx)
+#  define SIMDE_ARCH_LOONGARCH_LSX 1
+#endif
+
+/* LASX: LoongArch 256-bits SIMD extension */
+#if defined(__loongarch_asx)
+#  define SIMDE_ARCH_LOONGARCH_LASX 2
+#endif
+
+#endif /* !defined(SIMDE_ARCH_H) */
diff --git a/external_libs/pgenlib/simde/simde-bf16.h b/external_libs/pgenlib/simde/simde-bf16.h
new file mode 100644
index 0000000..7e07368
--- /dev/null
+++ b/external_libs/pgenlib/simde/simde-bf16.h
@@ -0,0 +1,131 @@
+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#include "hedley.h"
+#include "simde-common.h"
+#include "simde-detect-clang.h"
+
+#if !defined(SIMDE_BFLOAT16_H)
+#define SIMDE_BFLOAT16_H
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+/* This implementations is based upon simde-f16.h */
+
+/* Portable version which should work on pretty much any compiler.
+ * Obviously you can't rely on compiler support for things like
+ * conversion to/from 32-bit floats, so make sure you always use the
+ * functions and macros in this file!
+ */
+#define SIMDE_BFLOAT16_API_PORTABLE 1
+
+#define SIMDE_BFLOAT16_API_BF16 2
+
+#if !defined(SIMDE_BFLOAT16_API)
+  #if defined(SIMDE_ARM_NEON_BF16)
+    #define SIMDE_BFLOAT16_API SIMDE_BFLOAT16_API_BF16
+  #else
+    #define SIMDE_BFLOAT16_API SIMDE_BFLOAT16_API_PORTABLE
+  #endif
+#endif
+
+#if SIMDE_BFLOAT16_API == SIMDE_BFLOAT16_API_BF16
+  #include <arm_bf16.h>
+  typedef __bf16 simde_bfloat16;
+#elif SIMDE_BFLOAT16_API == SIMDE_BFLOAT16_API_PORTABLE
+  typedef struct { uint16_t value; } simde_bfloat16;
+#else
+  #error No 16-bit floating point API.
+#endif
+
+/* Conversion -- convert between single-precision and brain half-precision
+ * floats. */
+static HEDLEY_ALWAYS_INLINE HEDLEY_CONST
+simde_bfloat16
+simde_bfloat16_from_float32 (simde_float32 value) {
+#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16)
+  return vcvth_bf16_f32(value);
+#else
+  simde_bfloat16 res;
+  char* src = HEDLEY_REINTERPRET_CAST(char*, &value);
+  // rounding to nearest bfloat16
+  // If the 17th bit of value is 1, set the rounding to 1.
+  uint8_t rounding = 0;
+
+  #if SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE
+    if (src[1] & UINT8_C(0x80)) rounding = 1;
+    src[2] = HEDLEY_STATIC_CAST(char, (HEDLEY_STATIC_CAST(uint8_t, src[2]) + rounding));
+    simde_memcpy(&res, src+2, sizeof(res));
+  #else
+    if (src[2] & UINT8_C(0x80)) rounding = 1;
+    src[1] = HEDLEY_STATIC_CAST(char, (HEDLEY_STATIC_CAST(uint8_t, src[1]) + rounding));
+    simde_memcpy(&res, src, sizeof(res));
+  #endif
+
+  return res;
+#endif
+}
+
+static HEDLEY_ALWAYS_INLINE HEDLEY_CONST
+simde_float32
+simde_bfloat16_to_float32 (simde_bfloat16 value) {
+#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16)
+  return vcvtah_f32_bf16(value);
+#else
+  simde_float32 res = 0.0;
+  char* _res = HEDLEY_REINTERPRET_CAST(char*, &res);
+
+  #if SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE
+    simde_memcpy(_res+2, &value, sizeof(value));
+  #else
+    simde_memcpy(_res, &value, sizeof(value));
+  #endif
+
+  return res;
+#endif
+}
+
+SIMDE_DEFINE_CONVERSION_FUNCTION_(simde_uint16_as_bfloat16, simde_bfloat16,      uint16_t)
+
+#define SIMDE_NANBF simde_uint16_as_bfloat16(0xFFC1) // a quiet Not-a-Number
+#define SIMDE_INFINITYBF simde_uint16_as_bfloat16(0x7F80)
+#define SIMDE_NINFINITYBF simde_uint16_as_bfloat16(0xFF80)
+
+#define SIMDE_BFLOAT16_VALUE(value) simde_bfloat16_from_float32(SIMDE_FLOAT32_C(value))
+
+#if !defined(simde_isinfbf) && defined(simde_math_isinff)
+  #define simde_isinfbf(a) simde_math_isinff(simde_bfloat16_to_float32(a))
+#endif
+#if !defined(simde_isnanbf) && defined(simde_math_isnanf)
+  #define simde_isnanbf(a) simde_math_isnanf(simde_bfloat16_to_float32(a))
+#endif
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_BFLOAT16_H) */
diff --git a/external_libs/pgenlib/simde/simde-common.h b/external_libs/pgenlib/simde/simde-common.h
new file mode 100644
index 0000000..5a755cc
--- /dev/null
+++ b/external_libs/pgenlib/simde/simde-common.h
@@ -0,0 +1,1230 @@
+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2017-2020 Evan Nemerson <evan@nemerson.com>
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ *   2023      Ju-Hung Li <jhlee@pllab.cs.nthu.edu.tw> (Copyright owned by NTHU pllab)
+ */
+
+#if !defined(SIMDE_COMMON_H)
+#define SIMDE_COMMON_H
+
+#include "hedley.h"
+
+#define SIMDE_VERSION_MAJOR 0
+#define SIMDE_VERSION_MINOR 8
+#define SIMDE_VERSION_MICRO 2
+#define SIMDE_VERSION HEDLEY_VERSION_ENCODE(SIMDE_VERSION_MAJOR, SIMDE_VERSION_MINOR, SIMDE_VERSION_MICRO)
+// Also update meson.build in the root directory of the repository
+
+#include <stddef.h>
+#include <stdint.h>
+
+#include "simde-detect-clang.h"
+#include "simde-arch.h"
+#include "simde-features.h"
+#include "simde-diagnostic.h"
+#include "simde-math.h"
+#include "simde-constify.h"
+#include "simde-align.h"
+
+/* In some situations, SIMDe has to make large performance sacrifices
+ * for small increases in how faithfully it reproduces an API, but
+ * only a relatively small number of users will actually need the API
+ * to be completely accurate.  The SIMDE_FAST_* options can be used to
+ * disable these trade-offs.
+ *
+ * They can be enabled by passing -DSIMDE_FAST_MATH to the compiler, or
+ * the individual defines (e.g., -DSIMDE_FAST_NANS) if you only want to
+ * enable some optimizations.  Using -ffast-math and/or
+ * -ffinite-math-only will also enable the relevant options.  If you
+ * don't want that you can pass -DSIMDE_NO_FAST_* to disable them. */
+
+/* Most programs avoid NaNs by never passing values which can result in
+ * a NaN; for example, if you only pass non-negative values to the sqrt
+ * functions, it won't generate a NaN.  On some platforms, similar
+ * functions handle NaNs differently; for example, the _mm_min_ps SSE
+ * function will return 0.0 if you pass it (0.0, NaN), but the NEON
+ * vminq_f32 function will return NaN.  Making them behave like one
+ * another is expensive; it requires generating a mask of all lanes
+ * with NaNs, then performing the operation (e.g., vminq_f32), then
+ * blending together the result with another vector using the mask.
+ *
+ * If you don't want SIMDe to worry about the differences between how
+ * NaNs are handled on the two platforms, define this (or pass
+ * -ffinite-math-only) */
+#if !defined(SIMDE_FAST_MATH) && !defined(SIMDE_NO_FAST_MATH) && defined(__FAST_MATH__)
+  #define SIMDE_FAST_MATH
+#endif
+
+#if !defined(SIMDE_FAST_NANS) && !defined(SIMDE_NO_FAST_NANS)
+  #if defined(SIMDE_FAST_MATH)
+    #define SIMDE_FAST_NANS
+  #elif defined(__FINITE_MATH_ONLY__)
+    #if __FINITE_MATH_ONLY__
+      #define SIMDE_FAST_NANS
+    #endif
+  #endif
+#endif
+
+/* Many functions are defined as using the current rounding mode
+ * (i.e., the SIMD version of fegetround()) when converting to
+ * an integer.  For example, _mm_cvtpd_epi32.  Unfortunately,
+ * on some platforms (such as ARMv8+ where round-to-nearest is
+ * always used, regardless of the FPSCR register) this means we
+ * have to first query the current rounding mode, then choose
+ * the proper function (rounnd
+ , ceil, floor, etc.) */
+#if !defined(SIMDE_FAST_ROUND_MODE) && !defined(SIMDE_NO_FAST_ROUND_MODE) && defined(SIMDE_FAST_MATH)
+  #define SIMDE_FAST_ROUND_MODE
+#endif
+
+/* This controls how ties are rounded.  For example, does 10.5 round to
+ * 10 or 11?  IEEE 754 specifies round-towards-even, but ARMv7 (for
+ * example) doesn't support it and it must be emulated (which is rather
+ * slow).  If you're okay with just using the default for whatever arch
+ * you're on, you should definitely define this.
+ *
+ * Note that we don't use this macro to avoid correct implementations
+ * in functions which are explicitly about rounding (such as vrnd* on
+ * NEON, _mm_round_* on x86, etc.); it is only used for code where
+ * rounding is a component in another function, and even then it isn't
+ * usually a problem since such functions will use the current rounding
+ * mode. */
+#if !defined(SIMDE_FAST_ROUND_TIES) && !defined(SIMDE_NO_FAST_ROUND_TIES) && defined(SIMDE_FAST_MATH)
+  #define SIMDE_FAST_ROUND_TIES
+#endif
+
+/* For functions which convert from one type to another (mostly from
+ * floating point to integer types), sometimes we need to do a range
+ * check and potentially return a different result if the value
+ * falls outside that range.  Skipping this check can provide a
+ * performance boost, at the expense of faithfulness to the API we're
+ * emulating. */
+#if !defined(SIMDE_FAST_CONVERSION_RANGE) && !defined(SIMDE_NO_FAST_CONVERSION_RANGE) && defined(SIMDE_FAST_MATH)
+  #define SIMDE_FAST_CONVERSION_RANGE
+#endif
+
+/* Due to differences across platforms, sometimes it can be much
+ * faster for us to allow spurious floating point exceptions,
+ * or to no generate them when we should. */
+#if !defined(SIMDE_FAST_EXCEPTIONS) && !defined(SIMDE_NO_FAST_EXCEPTIONS) && defined(SIMDE_FAST_MATH)
+  #define SIMDE_FAST_EXCEPTIONS
+#endif
+
+#if \
+    HEDLEY_HAS_BUILTIN(__builtin_constant_p) || \
+    HEDLEY_GCC_VERSION_CHECK(3,4,0) || \
+    HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+    HEDLEY_TINYC_VERSION_CHECK(0,9,19) || \
+    HEDLEY_ARM_VERSION_CHECK(4,1,0) || \
+    HEDLEY_IBM_VERSION_CHECK(13,1,0) || \
+    HEDLEY_TI_CL6X_VERSION_CHECK(6,1,0) || \
+    (HEDLEY_SUNPRO_VERSION_CHECK(5,10,0) && !defined(__cplusplus)) || \
+    HEDLEY_CRAY_VERSION_CHECK(8,1,0) || \
+    HEDLEY_MCST_LCC_VERSION_CHECK(1,25,10)
+  #define SIMDE_CHECK_CONSTANT_(expr) (__builtin_constant_p(expr))
+#elif defined(__cplusplus) && (__cplusplus > 201703L)
+  #include <type_traits>
+  #define SIMDE_CHECK_CONSTANT_(expr) (std::is_constant_evaluated())
+#endif
+
+#if !defined(SIMDE_NO_CHECK_IMMEDIATE_CONSTANT)
+  #if defined(SIMDE_CHECK_CONSTANT_) && \
+      SIMDE_DETECT_CLANG_VERSION_CHECK(9,0,0) && \
+      (!defined(__apple_build_version__) || ((__apple_build_version__ < 11000000) || (__apple_build_version__ >= 12000000)))
+    #define SIMDE_REQUIRE_CONSTANT(arg) HEDLEY_REQUIRE_MSG(SIMDE_CHECK_CONSTANT_(arg), "`" #arg "' must be constant")
+  #else
+    #define SIMDE_REQUIRE_CONSTANT(arg)
+  #endif
+#else
+  #define SIMDE_REQUIRE_CONSTANT(arg)
+#endif
+
+#define SIMDE_REQUIRE_RANGE(arg, min, max) \
+  HEDLEY_REQUIRE_MSG((((arg) >= (min)) && ((arg) <= (max))), "'" #arg "' must be in [" #min ", " #max "]")
+
+#define SIMDE_REQUIRE_CONSTANT_RANGE(arg, min, max) \
+  SIMDE_REQUIRE_CONSTANT(arg) \
+  SIMDE_REQUIRE_RANGE(arg, min, max)
+
+/* A copy of HEDLEY_STATIC_ASSERT, except we don't define an empty
+ * fallback if we can't find an implementation; instead we have to
+ * check if SIMDE_STATIC_ASSERT is defined before using it. */
+#if \
+  !defined(__cplusplus) && ( \
+      (defined(__STDC_VERSION__) && (__STDC_VERSION__ >= 201112L)) || \
+      HEDLEY_HAS_FEATURE(c_static_assert) || \
+      HEDLEY_GCC_VERSION_CHECK(6,0,0) || \
+      HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+      defined(_Static_assert) \
+    )
+  /* Sometimes _Static_assert is defined (in cdefs.h) using a symbol which
+   * starts with a double-underscore. This is a system header so we have no
+   * control over it, but since it's a macro it will emit a diagnostic which
+   * prevents compilation with -Werror. */
+  #if HEDLEY_HAS_WARNING("-Wreserved-identifier")
+    #define SIMDE_STATIC_ASSERT(expr, message) (__extension__({ \
+      HEDLEY_DIAGNOSTIC_PUSH \
+      _Pragma("clang diagnostic ignored \"-Wreserved-identifier\"") \
+      _Static_assert(expr, message); \
+      HEDLEY_DIAGNOSTIC_POP \
+    }))
+  #else
+    #define SIMDE_STATIC_ASSERT(expr, message) _Static_assert(expr, message)
+  #endif
+#elif \
+  (defined(__cplusplus) && (__cplusplus >= 201103L)) || \
+  HEDLEY_MSVC_VERSION_CHECK(16,0,0)
+  #define SIMDE_STATIC_ASSERT(expr, message) HEDLEY_DIAGNOSTIC_DISABLE_CPP98_COMPAT_WRAP_(static_assert(expr, message))
+#endif
+
+/* Statement exprs */
+#if \
+    HEDLEY_GNUC_VERSION_CHECK(2,95,0) || \
+    HEDLEY_TINYC_VERSION_CHECK(0,9,26) || \
+    HEDLEY_INTEL_VERSION_CHECK(9,0,0) || \
+    HEDLEY_PGI_VERSION_CHECK(18,10,0) || \
+    HEDLEY_SUNPRO_VERSION_CHECK(5,12,0) || \
+    HEDLEY_IBM_VERSION_CHECK(11,1,0) || \
+    HEDLEY_MCST_LCC_VERSION_CHECK(1,25,10)
+  #define SIMDE_STATEMENT_EXPR_(expr) (__extension__ expr)
+#endif
+
+/* This is just a convenience macro to make it easy to call a single
+ * function with a specific diagnostic disabled. */
+#if defined(SIMDE_STATEMENT_EXPR_)
+  #define SIMDE_DISABLE_DIAGNOSTIC_EXPR_(diagnostic, expr) \
+    SIMDE_STATEMENT_EXPR_(({ \
+      HEDLEY_DIAGNOSTIC_PUSH \
+      diagnostic \
+      (expr); \
+      HEDLEY_DIAGNOSTIC_POP \
+    }))
+#endif
+
+#if defined(SIMDE_CHECK_CONSTANT_) && defined(SIMDE_STATIC_ASSERT)
+  #define SIMDE_ASSERT_CONSTANT_(v) SIMDE_STATIC_ASSERT(SIMDE_CHECK_CONSTANT_(v), #v " must be constant.")
+#endif
+
+#if \
+  (HEDLEY_HAS_ATTRIBUTE(may_alias) && !defined(HEDLEY_SUNPRO_VERSION)) || \
+  HEDLEY_GCC_VERSION_CHECK(3,3,0) || \
+  HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+  HEDLEY_IBM_VERSION_CHECK(13,1,0)
+#  define SIMDE_MAY_ALIAS __attribute__((__may_alias__))
+#else
+#  define SIMDE_MAY_ALIAS
+#endif
+
+/*  Lots of compilers support GCC-style vector extensions, but many
+    don't support all the features.  Define different macros depending
+    on support for
+
+    * SIMDE_VECTOR - Declaring a vector.
+    * SIMDE_VECTOR_OPS - basic operations (binary and unary).
+    * SIMDE_VECTOR_NEGATE - negating a vector
+    * SIMDE_VECTOR_SCALAR - For binary operators, the second argument
+        can be a scalar, in which case the result is as if that scalar
+        had been broadcast to all lanes of a vector.
+    * SIMDE_VECTOR_SUBSCRIPT - Supports array subscript notation for
+        extracting/inserting a single element.=
+
+    SIMDE_VECTOR can be assumed if any others are defined, the
+    others are independent. */
+#if !defined(SIMDE_NO_VECTOR)
+#  if \
+    HEDLEY_GCC_VERSION_CHECK(4,8,0)
+#    define SIMDE_VECTOR(size) __attribute__((__vector_size__(size)))
+#    define SIMDE_VECTOR_OPS
+#    define SIMDE_VECTOR_NEGATE
+#    define SIMDE_VECTOR_SCALAR
+#    define SIMDE_VECTOR_SUBSCRIPT
+#  elif HEDLEY_INTEL_VERSION_CHECK(16,0,0)
+#    define SIMDE_VECTOR(size) __attribute__((__vector_size__(size)))
+#    define SIMDE_VECTOR_OPS
+#    define SIMDE_VECTOR_NEGATE
+/* ICC only supports SIMDE_VECTOR_SCALAR for constants */
+#    define SIMDE_VECTOR_SUBSCRIPT
+#  elif \
+    HEDLEY_GCC_VERSION_CHECK(4,1,0) || \
+    HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+    HEDLEY_MCST_LCC_VERSION_CHECK(1,25,10)
+#    define SIMDE_VECTOR(size) __attribute__((__vector_size__(size)))
+#    define SIMDE_VECTOR_OPS
+#  elif HEDLEY_SUNPRO_VERSION_CHECK(5,12,0)
+#    define SIMDE_VECTOR(size) __attribute__((__vector_size__(size)))
+#  elif HEDLEY_HAS_ATTRIBUTE(vector_size)
+#    define SIMDE_VECTOR(size) __attribute__((__vector_size__(size)))
+#    define SIMDE_VECTOR_OPS
+#    define SIMDE_VECTOR_NEGATE
+#    define SIMDE_VECTOR_SUBSCRIPT
+#    if SIMDE_DETECT_CLANG_VERSION_CHECK(5,0,0)
+#      define SIMDE_VECTOR_SCALAR
+#    endif
+#  endif
+
+/* GCC and clang have built-in functions to handle shuffling and
+   converting of vectors, but the implementations are slightly
+   different.  This macro is just an abstraction over them.  Note that
+   elem_size is in bits but vec_size is in bytes. */
+#  if !defined(SIMDE_NO_SHUFFLE_VECTOR) && defined(SIMDE_VECTOR_SUBSCRIPT)
+     HEDLEY_DIAGNOSTIC_PUSH
+     /* We don't care about -Wvariadic-macros; all compilers that support
+      * shufflevector/shuffle support them. */
+#    if HEDLEY_HAS_WARNING("-Wc++98-compat-pedantic")
+#      pragma clang diagnostic ignored "-Wc++98-compat-pedantic"
+#    endif
+#    if HEDLEY_HAS_WARNING("-Wvariadic-macros") || HEDLEY_GCC_VERSION_CHECK(4,0,0)
+#      pragma GCC diagnostic ignored "-Wvariadic-macros"
+#    endif
+
+#    if HEDLEY_HAS_BUILTIN(__builtin_shufflevector)
+#      define SIMDE_SHUFFLE_VECTOR_(elem_size, vec_size, a, b, ...) __builtin_shufflevector(a, b, __VA_ARGS__)
+#    elif HEDLEY_GCC_HAS_BUILTIN(__builtin_shuffle,4,7,0) && !defined(__INTEL_COMPILER)
+#      define SIMDE_SHUFFLE_VECTOR_(elem_size, vec_size, a, b, ...) (__extension__ ({ \
+         int##elem_size##_t SIMDE_VECTOR(vec_size) simde_shuffle_ = { __VA_ARGS__ }; \
+           __builtin_shuffle(a, b, simde_shuffle_); \
+         }))
+#    endif
+     HEDLEY_DIAGNOSTIC_POP
+#  endif
+
+/* TODO: this actually works on XL C/C++ without SIMDE_VECTOR_SUBSCRIPT
+   but the code needs to be refactored a bit to take advantage. */
+#  if !defined(SIMDE_NO_CONVERT_VECTOR) && defined(SIMDE_VECTOR_SUBSCRIPT)
+#    if HEDLEY_HAS_BUILTIN(__builtin_convertvector) || HEDLEY_GCC_VERSION_CHECK(9,0,0)
+#      if HEDLEY_GCC_VERSION_CHECK(9,0,0) && !HEDLEY_GCC_VERSION_CHECK(9,3,0)
+         /* https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93557 */
+#        define SIMDE_CONVERT_VECTOR_(to, from) ((to) = (__extension__({ \
+             __typeof__(from) from_ = (from); \
+             ((void) from_); \
+             __builtin_convertvector(from_, __typeof__(to)); \
+           })))
+#      else
+#        define SIMDE_CONVERT_VECTOR_(to, from) ((to) = __builtin_convertvector((from), __typeof__(to)))
+#      endif
+#    endif
+#  endif
+#endif
+
+/* Since we currently require SUBSCRIPT before using a vector in a
+   union, we define these as dependencies of SUBSCRIPT.  They are
+   likely to disappear in the future, once SIMDe learns how to make
+   use of vectors without using the union members.  Do not use them
+   in your code unless you're okay with it breaking when SIMDe
+   changes. */
+#if defined(SIMDE_VECTOR_SUBSCRIPT)
+#  if defined(SIMDE_VECTOR_OPS)
+#    define SIMDE_VECTOR_SUBSCRIPT_OPS
+#  endif
+#  if defined(SIMDE_VECTOR_SCALAR)
+#    define SIMDE_VECTOR_SUBSCRIPT_SCALAR
+#  endif
+#endif
+
+#if !defined(SIMDE_DISABLE_OPENMP)
+  #if !defined(SIMDE_ENABLE_OPENMP) && ((defined(_OPENMP) && (_OPENMP >= 201307L)) || (defined(_OPENMP_SIMD) && (_OPENMP_SIMD >= 201307L))) || defined(HEDLEY_MCST_LCC_VERSION)
+    #define SIMDE_ENABLE_OPENMP
+  #endif
+#endif
+
+#if !defined(SIMDE_ENABLE_CILKPLUS) && (defined(__cilk) || defined(HEDLEY_INTEL_VERSION))
+#  define SIMDE_ENABLE_CILKPLUS
+#endif
+
+#if defined(SIMDE_ENABLE_OPENMP)
+#  define SIMDE_VECTORIZE HEDLEY_PRAGMA(omp simd)
+#  define SIMDE_VECTORIZE_SAFELEN(l) HEDLEY_PRAGMA(omp simd safelen(l))
+#  if defined(__clang__)
+#    define SIMDE_VECTORIZE_REDUCTION(r) \
+        HEDLEY_DIAGNOSTIC_PUSH \
+        _Pragma("clang diagnostic ignored \"-Wsign-conversion\"") \
+        HEDLEY_PRAGMA(omp simd reduction(r)) \
+        HEDLEY_DIAGNOSTIC_POP
+#  else
+#    define SIMDE_VECTORIZE_REDUCTION(r) HEDLEY_PRAGMA(omp simd reduction(r))
+#  endif
+#  if !defined(HEDLEY_MCST_LCC_VERSION)
+#    define SIMDE_VECTORIZE_ALIGNED(a) HEDLEY_PRAGMA(omp simd aligned(a))
+#  else
+#    define SIMDE_VECTORIZE_ALIGNED(a) HEDLEY_PRAGMA(omp simd)
+#  endif
+#elif defined(SIMDE_ENABLE_CILKPLUS)
+#  define SIMDE_VECTORIZE HEDLEY_PRAGMA(simd)
+#  define SIMDE_VECTORIZE_SAFELEN(l) HEDLEY_PRAGMA(simd vectorlength(l))
+#  define SIMDE_VECTORIZE_REDUCTION(r) HEDLEY_PRAGMA(simd reduction(r))
+#  define SIMDE_VECTORIZE_ALIGNED(a) HEDLEY_PRAGMA(simd aligned(a))
+#elif defined(__clang__) && !defined(HEDLEY_IBM_VERSION)
+#  define SIMDE_VECTORIZE HEDLEY_PRAGMA(clang loop vectorize(enable))
+#  define SIMDE_VECTORIZE_SAFELEN(l) HEDLEY_PRAGMA(clang loop vectorize_width(l))
+#  define SIMDE_VECTORIZE_REDUCTION(r) SIMDE_VECTORIZE
+#  define SIMDE_VECTORIZE_ALIGNED(a)
+#elif HEDLEY_GCC_VERSION_CHECK(4,9,0)
+#  define SIMDE_VECTORIZE HEDLEY_PRAGMA(GCC ivdep)
+#  define SIMDE_VECTORIZE_SAFELEN(l) SIMDE_VECTORIZE
+#  define SIMDE_VECTORIZE_REDUCTION(r) SIMDE_VECTORIZE
+#  define SIMDE_VECTORIZE_ALIGNED(a)
+#elif HEDLEY_CRAY_VERSION_CHECK(5,0,0)
+#  define SIMDE_VECTORIZE HEDLEY_PRAGMA(_CRI ivdep)
+#  define SIMDE_VECTORIZE_SAFELEN(l) SIMDE_VECTORIZE
+#  define SIMDE_VECTORIZE_REDUCTION(r) SIMDE_VECTORIZE
+#  define SIMDE_VECTORIZE_ALIGNED(a)
+#else
+#  define SIMDE_VECTORIZE
+#  define SIMDE_VECTORIZE_SAFELEN(l)
+#  define SIMDE_VECTORIZE_REDUCTION(r)
+#  define SIMDE_VECTORIZE_ALIGNED(a)
+#endif
+
+#define SIMDE_MASK_NZ_(v, mask) (((v) & (mask)) | !((v) & (mask)))
+
+/* Intended for checking coverage, you should never use this in
+   production. */
+#if defined(SIMDE_NO_INLINE)
+#  define SIMDE_FUNCTION_ATTRIBUTES HEDLEY_NEVER_INLINE static
+#else
+#  define SIMDE_FUNCTION_ATTRIBUTES HEDLEY_ALWAYS_INLINE static
+#endif
+
+#if defined(SIMDE_NO_INLINE)
+#  define SIMDE_HUGE_FUNCTION_ATTRIBUTES HEDLEY_NEVER_INLINE static
+#elif defined(SIMDE_CONSTRAINED_COMPILATION)
+#  define SIMDE_HUGE_FUNCTION_ATTRIBUTES static
+#else
+#  define SIMDE_HUGE_FUNCTION_ATTRIBUTES HEDLEY_ALWAYS_INLINE static
+#endif
+
+#if \
+    HEDLEY_HAS_ATTRIBUTE(unused) || \
+    HEDLEY_GCC_VERSION_CHECK(2,95,0)
+#  define SIMDE_FUNCTION_POSSIBLY_UNUSED_ __attribute__((__unused__))
+#else
+#  define SIMDE_FUNCTION_POSSIBLY_UNUSED_
+#endif
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DIAGNOSTIC_DISABLE_USED_BUT_MARKED_UNUSED_
+
+#if defined(_MSC_VER)
+#  define SIMDE_BEGIN_DECLS_ HEDLEY_DIAGNOSTIC_PUSH __pragma(warning(disable:4996 4204)) HEDLEY_BEGIN_C_DECLS
+#  define SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP HEDLEY_END_C_DECLS
+#else
+#  define SIMDE_BEGIN_DECLS_ \
+     HEDLEY_DIAGNOSTIC_PUSH \
+     SIMDE_DIAGNOSTIC_DISABLE_USED_BUT_MARKED_UNUSED_ \
+     HEDLEY_BEGIN_C_DECLS
+#  define SIMDE_END_DECLS_ \
+     HEDLEY_END_C_DECLS \
+     HEDLEY_DIAGNOSTIC_POP
+#endif
+
+#if defined(__SIZEOF_INT128__)
+#  define SIMDE_HAVE_INT128_
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DIAGNOSTIC_DISABLE_PEDANTIC_
+typedef __int128 simde_int128;
+typedef unsigned __int128 simde_uint128;
+HEDLEY_DIAGNOSTIC_POP
+#endif
+
+#if !defined(SIMDE_ENDIAN_LITTLE)
+#  define SIMDE_ENDIAN_LITTLE 1234
+#endif
+#if !defined(SIMDE_ENDIAN_BIG)
+#  define SIMDE_ENDIAN_BIG 4321
+#endif
+
+#if !defined(SIMDE_ENDIAN_ORDER)
+/* GCC (and compilers masquerading as GCC) define  __BYTE_ORDER__. */
+#  if defined(__BYTE_ORDER__) && defined(__ORDER_LITTLE_ENDIAN__) && (__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__)
+#    define SIMDE_ENDIAN_ORDER SIMDE_ENDIAN_LITTLE
+#  elif defined(__BYTE_ORDER__) && defined(__ORDER_BIG_ENDIAN__) && (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
+#    define SIMDE_ENDIAN_ORDER SIMDE_ENDIAN_BIG
+/* TI defines _BIG_ENDIAN or _LITTLE_ENDIAN */
+#  elif defined(_BIG_ENDIAN)
+#    define SIMDE_ENDIAN_ORDER SIMDE_ENDIAN_BIG
+#  elif defined(_LITTLE_ENDIAN)
+#    define SIMDE_ENDIAN_ORDER SIMDE_ENDIAN_LITTLE
+/* We know the endianness of some common architectures.  Common
+ * architectures not listed (ARM, POWER, MIPS, etc.) here are
+ * bi-endian. */
+#  elif defined(__amd64) || defined(_M_X64) || defined(__i386) || defined(_M_IX86)
+#    define SIMDE_ENDIAN_ORDER SIMDE_ENDIAN_LITTLE
+#  elif defined(__s390x__) || defined(__zarch__)
+#    define SIMDE_ENDIAN_ORDER SIMDE_ENDIAN_BIG
+/* Looks like we'll have to rely on the platform.  If we're missing a
+ * platform, please let us know. */
+#  elif defined(_WIN32)
+#    define SIMDE_ENDIAN_ORDER SIMDE_ENDIAN_LITTLE
+#  elif defined(sun) || defined(__sun) /* Solaris */
+#    include <sys/byteorder.h>
+#    if defined(_LITTLE_ENDIAN)
+#      define SIMDE_ENDIAN_ORDER SIMDE_ENDIAN_LITTLE
+#    elif defined(_BIG_ENDIAN)
+#      define SIMDE_ENDIAN_ORDER SIMDE_ENDIAN_BIG
+#    endif
+#  elif defined(__APPLE__)
+#    include <libkern/OSByteOrder.h>
+#    if defined(__LITTLE_ENDIAN__)
+#      define SIMDE_ENDIAN_ORDER SIMDE_ENDIAN_LITTLE
+#    elif defined(__BIG_ENDIAN__)
+#      define SIMDE_ENDIAN_ORDER SIMDE_ENDIAN_BIG
+#    endif
+#  elif defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__) || defined(__bsdi__) || defined(__DragonFly__) || defined(BSD)
+#    include <machine/endian.h>
+#    if defined(__BYTE_ORDER) && (__BYTE_ORDER == __LITTLE_ENDIAN)
+#      define SIMDE_ENDIAN_ORDER SIMDE_ENDIAN_LITTLE
+#    elif defined(__BYTE_ORDER) && (__BYTE_ORDER == __BIG_ENDIAN)
+#      define SIMDE_ENDIAN_ORDER SIMDE_ENDIAN_BIG
+#    endif
+#  elif defined(__linux__) || defined(__linux) || defined(__gnu_linux__)
+#    include <endian.h>
+#    if defined(__BYTE_ORDER) && defined(__LITTLE_ENDIAN) && (__BYTE_ORDER == __LITTLE_ENDIAN)
+#      define SIMDE_ENDIAN_ORDER SIMDE_ENDIAN_LITTLE
+#    elif defined(__BYTE_ORDER) && defined(__BIG_ENDIAN) && (__BYTE_ORDER == __BIG_ENDIAN)
+#      define SIMDE_ENDIAN_ORDER SIMDE_ENDIAN_BIG
+#    endif
+#  endif
+#endif
+
+#if \
+    HEDLEY_HAS_BUILTIN(__builtin_bswap64) || \
+    HEDLEY_GCC_VERSION_CHECK(4,3,0) || \
+    HEDLEY_IBM_VERSION_CHECK(13,1,0) || \
+    HEDLEY_INTEL_VERSION_CHECK(13,0,0)
+  #define simde_bswap64(v) __builtin_bswap64(v)
+#elif HEDLEY_MSVC_VERSION_CHECK(13,10,0)
+  #define simde_bswap64(v) _byteswap_uint64(v)
+#else
+  SIMDE_FUNCTION_ATTRIBUTES
+  uint64_t
+  simde_bswap64(uint64_t v) {
+    return
+      ((v & (((uint64_t) 0xff) << 56)) >> 56) |
+      ((v & (((uint64_t) 0xff) << 48)) >> 40) |
+      ((v & (((uint64_t) 0xff) << 40)) >> 24) |
+      ((v & (((uint64_t) 0xff) << 32)) >>  8) |
+      ((v & (((uint64_t) 0xff) << 24)) <<  8) |
+      ((v & (((uint64_t) 0xff) << 16)) << 24) |
+      ((v & (((uint64_t) 0xff) <<  8)) << 40) |
+      ((v & (((uint64_t) 0xff)      )) << 56);
+  }
+#endif
+
+#if !defined(SIMDE_ENDIAN_ORDER)
+#  error Unknown byte order; please file a bug
+#else
+#  if SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE
+#    define simde_endian_bswap64_be(value) simde_bswap64(value)
+#    define simde_endian_bswap64_le(value) (value)
+#  elif SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_BIG
+#    define simde_endian_bswap64_be(value) (value)
+#    define simde_endian_bswap64_le(value) simde_bswap64(value)
+#  endif
+#endif
+
+/* TODO: we should at least make an attempt to detect the correct
+   types for simde_float32/float64 instead of just assuming float and
+   double. */
+
+#if !defined(SIMDE_FLOAT32_TYPE)
+#  define SIMDE_FLOAT32_TYPE float
+#  define SIMDE_FLOAT32_C(value) value##f
+#else
+#  define SIMDE_FLOAT32_C(value) ((SIMDE_FLOAT32_TYPE) value)
+#endif
+typedef SIMDE_FLOAT32_TYPE simde_float32;
+
+#if !defined(SIMDE_FLOAT64_TYPE)
+#  define SIMDE_FLOAT64_TYPE double
+#  define SIMDE_FLOAT64_C(value) value
+#else
+#  define SIMDE_FLOAT64_C(value) ((SIMDE_FLOAT64_TYPE) value)
+#endif
+typedef SIMDE_FLOAT64_TYPE simde_float64;
+
+#if defined(SIMDE_POLY8_TYPE)
+#  undef SIMDE_POLY8_TYPE
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+#  define SIMDE_POLY8_TYPE poly8_t
+#  define SIMDE_POLY8_C(value) (HEDLEY_STATIC_CAST(poly8_t, value))
+#else
+#  define SIMDE_POLY8_TYPE uint8_t
+#  define SIMDE_POLY8_C(value) (HEDLEY_STATIC_CAST(uint8_t, value))
+#endif
+typedef SIMDE_POLY8_TYPE simde_poly8;
+
+#if defined(SIMDE_POLY16_TYPE)
+#  undef SIMDE_POLY16_TYPE
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+#  define SIMDE_POLY16_TYPE poly16_t
+#  define SIMDE_POLY16_C(value) (HEDLEY_STATIC_CAST(poly16_t, value))
+#else
+#  define SIMDE_POLY16_TYPE uint16_t
+#  define SIMDE_POLY16_C(value) (HEDLEY_STATIC_CAST(uint16_t, value))
+#endif
+typedef SIMDE_POLY16_TYPE simde_poly16;
+
+#if defined(SIMDE_POLY64_TYPE)
+#  undef SIMDE_POLY64_TYPE
+#endif
+#if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+#  define SIMDE_POLY64_TYPE poly64_t
+#  define SIMDE_POLY64_C(value) (HEDLEY_STATIC_CAST(poly64_t, value ## ull))
+#else
+#  define SIMDE_POLY64_TYPE uint64_t
+#  define SIMDE_POLY64_C(value) value ## ull
+#endif
+typedef SIMDE_POLY64_TYPE simde_poly64;
+
+#if defined(SIMDE_POLY128_TYPE)
+#  undef SIMDE_POLY128_TYPE
+#endif
+#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)
+#  define SIMDE_POLY128_TYPE poly128_t
+#  define SIMDE_POLY128_C(value) value
+#elif defined(__SIZEOF_INT128__)
+#  define SIMDE_POLY128_TYPE __int128
+#  define SIMDE_POLY128_C(value) (HEDLEY_STATIC_CAST(__int128, value))
+#else
+#  define SIMDE_POLY128_TYPE uint64_t
+#  define SIMDE_TARGET_NOT_SUPPORT_INT128_TYPE 1
+#endif
+typedef SIMDE_POLY128_TYPE simde_poly128;
+
+#if defined(__cplusplus)
+  typedef bool simde_bool;
+#elif defined(__STDC_VERSION__) && (__STDC_VERSION__ >= 199901L)
+  typedef _Bool simde_bool;
+#elif defined(bool)
+  typedef bool simde_bool;
+#else
+  #include <stdbool.h>
+  typedef bool simde_bool;
+#endif
+
+#if HEDLEY_HAS_WARNING("-Wbad-function-cast")
+#  define SIMDE_CONVERT_FTOI(T,v) \
+    HEDLEY_DIAGNOSTIC_PUSH \
+    _Pragma("clang diagnostic ignored \"-Wbad-function-cast\"") \
+    HEDLEY_STATIC_CAST(T, (v)) \
+    HEDLEY_DIAGNOSTIC_POP
+#else
+#  define SIMDE_CONVERT_FTOI(T,v) ((T) (v))
+#endif
+
+/* TODO: detect compilers which support this outside of C11 mode */
+#if defined(__STDC_VERSION__) && (__STDC_VERSION__ >= 201112L)
+  #define SIMDE_CHECKED_REINTERPRET_CAST(to, from, value) _Generic((value), to: (value), default: (_Generic((value), from: ((to) (value)))))
+  #define SIMDE_CHECKED_STATIC_CAST(to, from, value) _Generic((value), to: (value), default: (_Generic((value), from: ((to) (value)))))
+#else
+  #define SIMDE_CHECKED_REINTERPRET_CAST(to, from, value) HEDLEY_REINTERPRET_CAST(to, value)
+  #define SIMDE_CHECKED_STATIC_CAST(to, from, value) HEDLEY_STATIC_CAST(to, value)
+#endif
+
+#if HEDLEY_HAS_WARNING("-Wfloat-equal")
+#  define SIMDE_DIAGNOSTIC_DISABLE_FLOAT_EQUAL _Pragma("clang diagnostic ignored \"-Wfloat-equal\"")
+#elif HEDLEY_GCC_VERSION_CHECK(3,0,0)
+#  define SIMDE_DIAGNOSTIC_DISABLE_FLOAT_EQUAL _Pragma("GCC diagnostic ignored \"-Wfloat-equal\"")
+#else
+#  define SIMDE_DIAGNOSTIC_DISABLE_FLOAT_EQUAL
+#endif
+
+/* Some functions can trade accuracy for speed.  For those functions
+   you can control the trade-off using this macro.  Possible values:
+
+   0: prefer speed
+   1: reasonable trade-offs
+   2: prefer accuracy */
+#if !defined(SIMDE_ACCURACY_PREFERENCE)
+#  define SIMDE_ACCURACY_PREFERENCE 1
+#endif
+
+#if defined(__STDC_HOSTED__)
+#  define SIMDE_STDC_HOSTED __STDC_HOSTED__
+#else
+#  if \
+     defined(HEDLEY_PGI_VERSION) || \
+     defined(HEDLEY_MSVC_VERSION)
+#    define SIMDE_STDC_HOSTED 1
+#  else
+#    define SIMDE_STDC_HOSTED 0
+#  endif
+#endif
+
+/* Try to deal with environments without a standard library. */
+#if !defined(simde_memcpy)
+  #if HEDLEY_HAS_BUILTIN(__builtin_memcpy)
+    #define simde_memcpy(dest, src, n) __builtin_memcpy(dest, src, n)
+  #endif
+#endif
+#if !defined(simde_memset)
+  #if HEDLEY_HAS_BUILTIN(__builtin_memset)
+    #define simde_memset(s, c, n) __builtin_memset(s, c, n)
+  #endif
+#endif
+#if !defined(simde_memcmp)
+  #if HEDLEY_HAS_BUILTIN(__builtin_memcmp)
+    #define simde_memcmp(s1, s2, n) __builtin_memcmp(s1, s2, n)
+  #endif
+#endif
+
+#if !defined(simde_memcpy) || !defined(simde_memset) || !defined(simde_memcmp)
+  #if !defined(SIMDE_NO_STRING_H)
+    #if defined(__has_include)
+      #if !__has_include(<string.h>)
+        #define SIMDE_NO_STRING_H
+      #endif
+    #elif (SIMDE_STDC_HOSTED == 0)
+      #define SIMDE_NO_STRING_H
+    #endif
+  #endif
+
+  #if !defined(SIMDE_NO_STRING_H)
+    #include <string.h>
+    #if !defined(simde_memcpy)
+      #define simde_memcpy(dest, src, n) memcpy(dest, src, n)
+    #endif
+    #if !defined(simde_memset)
+      #define simde_memset(s, c, n) memset(s, c, n)
+    #endif
+    #if !defined(simde_memcmp)
+      #define simde_memcmp(s1, s2, n) memcmp(s1, s2, n)
+    #endif
+  #else
+    /* These are meant to be portable, not fast.  If you're hitting them you
+     * should think about providing your own (by defining the simde_memcpy
+     * macro prior to including any SIMDe files) or submitting a patch to
+     * SIMDe so we can detect your system-provided memcpy/memset, like by
+     * adding your compiler to the checks for __builtin_memcpy and/or
+     * __builtin_memset. */
+    #if !defined(simde_memcpy)
+      SIMDE_FUNCTION_ATTRIBUTES
+      void
+      simde_memcpy_(void* dest, const void* src, size_t len) {
+        char* dest_ = HEDLEY_STATIC_CAST(char*, dest);
+        char* src_ = HEDLEY_STATIC_CAST(const char*, src);
+        for (size_t i = 0 ; i < len ; i++) {
+          dest_[i] = src_[i];
+        }
+      }
+      #define simde_memcpy(dest, src, n) simde_memcpy_(dest, src, n)
+    #endif
+
+    #if !defined(simde_memset)
+      SIMDE_FUNCTION_ATTRIBUTES
+      void
+      simde_memset_(void* s, int c, size_t len) {
+        char* s_ = HEDLEY_STATIC_CAST(char*, s);
+        char c_ = HEDLEY_STATIC_CAST(char, c);
+        for (size_t i = 0 ; i < len ; i++) {
+          s_[i] = c_[i];
+        }
+      }
+      #define simde_memset(s, c, n) simde_memset_(s, c, n)
+    #endif
+
+    #if !defined(simde_memcmp)
+      SIMDE_FUCTION_ATTRIBUTES
+      int
+      simde_memcmp_(const void *s1, const void *s2, size_t n) {
+        unsigned char* s1_ = HEDLEY_STATIC_CAST(unsigned char*, s1);
+        unsigned char* s2_ = HEDLEY_STATIC_CAST(unsigned char*, s2);
+        for (size_t i = 0 ; i < len ; i++) {
+          if (s1_[i] != s2_[i]) {
+            return (int) (s1_[i] - s2_[i]);
+          }
+        }
+        return 0;
+      }
+    #define simde_memcmp(s1, s2, n) simde_memcmp_(s1, s2, n)
+    #endif
+  #endif
+#endif
+
+/*** Functions that quiet a signaling NaN ***/
+
+static HEDLEY_INLINE
+double
+simde_math_quiet(double x) {
+  uint64_t tmp, mask;
+  if (!simde_math_isnan(x)) {
+    return x;
+  }
+  simde_memcpy(&tmp, &x, 8);
+  mask = 0x7ff80000;
+  mask <<= 32;
+  tmp |= mask;
+  simde_memcpy(&x, &tmp, 8);
+  return x;
+}
+
+static HEDLEY_INLINE
+float
+simde_math_quietf(float x) {
+  uint32_t tmp;
+  if (!simde_math_isnanf(x)) {
+    return x;
+  }
+  simde_memcpy(&tmp, &x, 4);
+  tmp |= 0x7fc00000lu;
+  simde_memcpy(&x, &tmp, 4);
+  return x;
+}
+
+#if defined(FE_ALL_EXCEPT)
+  #define SIMDE_HAVE_FENV_H
+#elif defined(__has_include)
+  #if __has_include(<fenv.h>)
+    #include <fenv.h>
+    #define SIMDE_HAVE_FENV_H
+  #endif
+#elif SIMDE_STDC_HOSTED == 1
+  #include <fenv.h>
+  #define SIMDE_HAVE_FENV_H
+#endif
+
+#if defined(EXIT_FAILURE)
+  #define SIMDE_HAVE_STDLIB_H
+#elif defined(__has_include)
+  #if __has_include(<stdlib.h>)
+    #include <stdlib.h>
+    #define SIMDE_HAVE_STDLIB_H
+  #endif
+#elif SIMDE_STDC_HOSTED == 1
+  #include <stdlib.h>
+  #define SIMDE_HAVE_STDLIB_H
+#endif
+
+#if defined(__has_include)
+#  if defined(__cplusplus) && (__cplusplus >= 201103L) && __has_include(<cfenv>)
+#    include <cfenv>
+#  elif __has_include(<fenv.h>)
+#    include <fenv.h>
+#  endif
+#  if __has_include(<stdlib.h>)
+#    include <stdlib.h>
+#  endif
+#elif SIMDE_STDC_HOSTED == 1
+#  include <stdlib.h>
+#  include <fenv.h>
+#endif
+
+#define SIMDE_DEFINE_CONVERSION_FUNCTION_(Name, T_To, T_From) \
+  static HEDLEY_ALWAYS_INLINE HEDLEY_CONST SIMDE_FUNCTION_POSSIBLY_UNUSED_ \
+  T_To \
+  Name (T_From value) { \
+    T_To r; \
+    simde_memcpy(&r, &value, sizeof(r)); \
+    return r; \
+  }
+
+SIMDE_DEFINE_CONVERSION_FUNCTION_(simde_float32_as_uint32,      uint32_t, simde_float32)
+SIMDE_DEFINE_CONVERSION_FUNCTION_(simde_uint32_as_float32, simde_float32, uint32_t)
+SIMDE_DEFINE_CONVERSION_FUNCTION_(simde_float64_as_uint64,      uint64_t, simde_float64)
+SIMDE_DEFINE_CONVERSION_FUNCTION_(simde_uint64_as_float64, simde_float64, uint64_t)
+
+#include "check.h"
+
+/* GCC/clang have a bunch of functionality in builtins which we would
+ * like to access, but the suffixes indicate whether the operate on
+ * int, long, or long long, not fixed width types (e.g., int32_t).
+ * we use these macros to attempt to map from fixed-width to the
+ * names GCC uses.  Note that you should still cast the input(s) and
+ * return values (to/from SIMDE_BUILTIN_TYPE_*_) since often even if
+ * types are the same size they may not be compatible according to the
+ * compiler.  For example, on x86 long and long lonsg are generally
+ * both 64 bits, but platforms vary on whether an int64_t is mapped
+ * to a long or long long. */
+
+#include <limits.h>
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DIAGNOSTIC_DISABLE_CPP98_COMPAT_PEDANTIC_
+
+#if (INT8_MAX == INT_MAX) && (INT8_MIN == INT_MIN)
+  #define SIMDE_BUILTIN_SUFFIX_8_
+  #define SIMDE_BUILTIN_TYPE_8_ int
+#elif (INT8_MAX == LONG_MAX) && (INT8_MIN == LONG_MIN)
+  #define SIMDE_BUILTIN_SUFFIX_8_ l
+  #define SIMDE_BUILTIN_TYPE_8_ long
+#elif (INT8_MAX == LLONG_MAX) && (INT8_MIN == LLONG_MIN)
+  #define SIMDE_BUILTIN_SUFFIX_8_ ll
+  #define SIMDE_BUILTIN_TYPE_8_ long long
+#endif
+
+#if (INT16_MAX == INT_MAX) && (INT16_MIN == INT_MIN)
+  #define SIMDE_BUILTIN_SUFFIX_16_
+  #define SIMDE_BUILTIN_TYPE_16_ int
+#elif (INT16_MAX == LONG_MAX) && (INT16_MIN == LONG_MIN)
+  #define SIMDE_BUILTIN_SUFFIX_16_ l
+  #define SIMDE_BUILTIN_TYPE_16_ long
+#elif (INT16_MAX == LLONG_MAX) && (INT16_MIN == LLONG_MIN)
+  #define SIMDE_BUILTIN_SUFFIX_16_ ll
+  #define SIMDE_BUILTIN_TYPE_16_ long long
+#endif
+
+#if (INT32_MAX == INT_MAX) && (INT32_MIN == INT_MIN)
+  #define SIMDE_BUILTIN_SUFFIX_32_
+  #define SIMDE_BUILTIN_TYPE_32_ int
+#elif (INT32_MAX == LONG_MAX) && (INT32_MIN == LONG_MIN)
+  #define SIMDE_BUILTIN_SUFFIX_32_ l
+  #define SIMDE_BUILTIN_TYPE_32_ long
+#elif (INT32_MAX == LLONG_MAX) && (INT32_MIN == LLONG_MIN)
+  #define SIMDE_BUILTIN_SUFFIX_32_ ll
+  #define SIMDE_BUILTIN_TYPE_32_ long long
+#endif
+
+#if (INT64_MAX == INT_MAX) && (INT64_MIN == INT_MIN)
+  #define SIMDE_BUILTIN_SUFFIX_64_
+  #define SIMDE_BUILTIN_TYPE_64_ int
+#elif (INT64_MAX == LONG_MAX) && (INT64_MIN == LONG_MIN)
+  #define SIMDE_BUILTIN_SUFFIX_64_ l
+  #define SIMDE_BUILTIN_TYPE_64_ long
+#elif (INT64_MAX == LLONG_MAX) && (INT64_MIN == LLONG_MIN)
+  #define SIMDE_BUILTIN_SUFFIX_64_ ll
+  #define SIMDE_BUILTIN_TYPE_64_ long long
+#endif
+
+/* SIMDE_DIAGNOSTIC_DISABLE_CPP98_COMPAT_PEDANTIC_ */
+HEDLEY_DIAGNOSTIC_POP
+
+#if defined(SIMDE_BUILTIN_SUFFIX_8_)
+  #define SIMDE_BUILTIN_8_(name) HEDLEY_CONCAT3(__builtin_, name, SIMDE_BUILTIN_SUFFIX_8_)
+  #define SIMDE_BUILTIN_HAS_8_(name) HEDLEY_HAS_BUILTIN(HEDLEY_CONCAT3(__builtin_, name, SIMDE_BUILTIN_SUFFIX_8_))
+#else
+  #define SIMDE_BUILTIN_HAS_8_(name) 0
+#endif
+#if defined(SIMDE_BUILTIN_SUFFIX_16_)
+  #define SIMDE_BUILTIN_16_(name) HEDLEY_CONCAT3(__builtin_, name, SIMDE_BUILTIN_SUFFIX_16_)
+  #define SIMDE_BUILTIN_HAS_16_(name) HEDLEY_HAS_BUILTIN(HEDLEY_CONCAT3(__builtin_, name, SIMDE_BUILTIN_SUFFIX_16_))
+#else
+  #define SIMDE_BUILTIN_HAS_16_(name) 0
+#endif
+#if defined(SIMDE_BUILTIN_SUFFIX_32_)
+  #define SIMDE_BUILTIN_32_(name) HEDLEY_CONCAT3(__builtin_, name, SIMDE_BUILTIN_SUFFIX_32_)
+  #define SIMDE_BUILTIN_HAS_32_(name) HEDLEY_HAS_BUILTIN(HEDLEY_CONCAT3(__builtin_, name, SIMDE_BUILTIN_SUFFIX_32_))
+#else
+  #define SIMDE_BUILTIN_HAS_32_(name) 0
+#endif
+#if defined(SIMDE_BUILTIN_SUFFIX_64_)
+  #define SIMDE_BUILTIN_64_(name) HEDLEY_CONCAT3(__builtin_, name, SIMDE_BUILTIN_SUFFIX_64_)
+  #define SIMDE_BUILTIN_HAS_64_(name) HEDLEY_HAS_BUILTIN(HEDLEY_CONCAT3(__builtin_, name, SIMDE_BUILTIN_SUFFIX_64_))
+#else
+  #define SIMDE_BUILTIN_HAS_64_(name) 0
+#endif
+
+#if !defined(__cplusplus)
+  #if defined(__clang__)
+    #if HEDLEY_HAS_WARNING("-Wc11-extensions")
+      #define SIMDE_GENERIC_(...) (__extension__ ({ \
+          HEDLEY_DIAGNOSTIC_PUSH \
+          _Pragma("clang diagnostic ignored \"-Wc11-extensions\"") \
+          _Generic(__VA_ARGS__); \
+          HEDLEY_DIAGNOSTIC_POP \
+        }))
+    #elif HEDLEY_HAS_WARNING("-Wc1x-extensions")
+      #define SIMDE_GENERIC_(...) (__extension__ ({ \
+          HEDLEY_DIAGNOSTIC_PUSH \
+          _Pragma("clang diagnostic ignored \"-Wc1x-extensions\"") \
+          _Generic(__VA_ARGS__); \
+          HEDLEY_DIAGNOSTIC_POP \
+        }))
+    #endif
+  #elif \
+      defined(__STDC_VERSION__) && (__STDC_VERSION__ >= 201112L) || \
+      HEDLEY_HAS_EXTENSION(c_generic_selections) || \
+      HEDLEY_GCC_VERSION_CHECK(4,9,0) || \
+      HEDLEY_INTEL_VERSION_CHECK(17,0,0) || \
+      HEDLEY_IBM_VERSION_CHECK(12,1,0) || \
+      HEDLEY_ARM_VERSION_CHECK(5,3,0)
+    #define SIMDE_GENERIC_(...) _Generic(__VA_ARGS__)
+  #endif
+#endif
+
+/* Sometimes we run into problems with specific versions of compilers
+   which make the native versions unusable for us.  Often this is due
+   to missing functions, sometimes buggy implementations, etc.  These
+   macros are how we check for specific bugs.  As they are fixed we'll
+   start only defining them for problematic compiler versions. */
+
+#if !defined(SIMDE_IGNORE_COMPILER_BUGS)
+#  if defined(HEDLEY_GCC_VERSION)
+#    if !HEDLEY_GCC_VERSION_CHECK(4,9,0)
+#      define SIMDE_BUG_GCC_REV_208793
+#    endif
+#    if !HEDLEY_GCC_VERSION_CHECK(5,0,0)
+#      define SIMDE_BUG_GCC_BAD_MM_SRA_EPI32 /* TODO: find relevant bug or commit */
+#    endif
+#    if !HEDLEY_GCC_VERSION_CHECK(6,0,0)
+#      define SIMDE_BUG_GCC_SIZEOF_IMMEDIATE
+#    endif
+#    if !HEDLEY_GCC_VERSION_CHECK(4,6,0)
+#      define SIMDE_BUG_GCC_BAD_MM_EXTRACT_EPI8 /* TODO: find relevant bug or commit */
+#    endif
+#    if !HEDLEY_GCC_VERSION_CHECK(7,4,0) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && !HEDLEY_GCC_VERSION_CHECK(8,3,0))
+#      define SIMDE_BUG_GCC_87467
+#    endif
+#    if !HEDLEY_GCC_VERSION_CHECK(8,0,0)
+#      define SIMDE_BUG_GCC_REV_247851
+#    endif
+#    if !HEDLEY_GCC_VERSION_CHECK(10,0,0)
+#      define SIMDE_BUG_GCC_REV_274313
+#      define SIMDE_BUG_GCC_91341
+#      define SIMDE_BUG_GCC_92035
+#    endif
+#    if !HEDLEY_GCC_VERSION_CHECK(9,0,0) && defined(SIMDE_ARCH_AARCH64)
+#      define SIMDE_BUG_GCC_ARM_SHIFT_SCALAR
+#    endif
+#    if !HEDLEY_GCC_VERSION_CHECK(9,0,0) && defined(SIMDE_ARCH_AARCH64)
+#      define SIMDE_BUG_GCC_BAD_VEXT_REV32
+#    endif
+#    if !(HEDLEY_GCC_VERSION_CHECK(9,4,0) \
+          || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && !HEDLEY_GCC_VERSION_CHECK(9,0,0)) \
+         ) && defined(SIMDE_ARCH_X86) && !defined(SIMDE_ARCH_AMD64)
+#      define SIMDE_BUG_GCC_94482
+#    endif
+#    if (defined(SIMDE_ARCH_X86) && !defined(SIMDE_ARCH_AMD64)) || defined(SIMDE_ARCH_ZARCH)
+#      define SIMDE_BUG_GCC_53784
+#    endif
+#    if defined(SIMDE_ARCH_X86) || defined(SIMDE_ARCH_AMD64)
+#      if HEDLEY_GCC_VERSION_CHECK(4,3,0) /* -Wsign-conversion */
+#        define SIMDE_BUG_GCC_95144
+#      endif
+#      if !HEDLEY_GCC_VERSION_CHECK(11,2,0)
+#        define SIMDE_BUG_GCC_95483
+#      endif
+#      if defined(__OPTIMIZE__)
+#        define SIMDE_BUG_GCC_100927
+#      endif
+#      if !(HEDLEY_GCC_VERSION_CHECK(10,3,0))
+#        define SIMDE_BUG_GCC_98521
+#      endif
+#    endif
+#    if !HEDLEY_GCC_VERSION_CHECK(9,4,0) && defined(SIMDE_ARCH_AARCH64)
+#      define SIMDE_BUG_GCC_94488
+#    endif
+#    if !HEDLEY_GCC_VERSION_CHECK(9,1,0) && defined(SIMDE_ARCH_AARCH64)
+#      define SIMDE_BUG_GCC_REV_264019
+#    endif
+#    if (!HEDLEY_GCC_VERSION_CHECK(9,0,0) && !defined(SIMDE_ARCH_AARCH64)) || (!defined(SIMDE_ARCH_AARCH64) && defined(SIMDE_ARCH_ARM))
+#      define SIMDE_BUG_GCC_REV_260989
+#    endif
+#    if defined(SIMDE_ARCH_ARM) && !defined(SIMDE_ARCH_AARCH64)
+#      define SIMDE_BUG_GCC_95399
+#      define SIMDE_BUG_GCC_95471
+#      define SIMDE_BUG_GCC_111609
+#      if SIMDE_ARCH_ARM_CHECK(8,0)
+#        define SIMDE_BUG_GCC_113065
+#      endif
+#    endif
+#    if defined(SIMDE_ARCH_POWER)
+#      define SIMDE_BUG_GCC_95227
+#      define SIMDE_BUG_GCC_95782
+#      if !HEDLEY_GCC_VERSION_CHECK(12,0,0)
+#        define SIMDE_BUG_VEC_CPSGN_REVERSED_ARGS
+#      endif
+#    endif
+#    if defined(SIMDE_ARCH_X86) || defined(SIMDE_ARCH_AMD64)
+#      if !HEDLEY_GCC_VERSION_CHECK(10,2,0) && !defined(__OPTIMIZE__)
+#        define SIMDE_BUG_GCC_96174
+#      endif
+#    endif
+#    if defined(SIMDE_ARCH_ZARCH)
+#      define SIMDE_BUG_GCC_95782
+#      if HEDLEY_GCC_VERSION_CHECK(10,0,0)
+#        define SIMDE_BUG_GCC_101614
+#      endif
+#    endif
+#    if defined(SIMDE_ARCH_MIPS_MSA)
+#      define SIMDE_BUG_GCC_97248
+#      if !HEDLEY_GCC_VERSION_CHECK(12,1,0)
+#        define SIMDE_BUG_GCC_100760
+#        define SIMDE_BUG_GCC_100761
+#        define SIMDE_BUG_GCC_100762
+#      endif
+#    endif
+#    if !defined(__OPTIMIZE__) && !(\
+       HEDLEY_GCC_VERSION_CHECK(11,4,0) \
+       || (HEDLEY_GCC_VERSION_CHECK(10,4,0) && !(HEDLEY_GCC_VERSION_CHECK(11,0,0))) \
+       || (HEDLEY_GCC_VERSION_CHECK(9,5,0) && !(HEDLEY_GCC_VERSION_CHECK(10,0,0))))
+#      define SIMDE_BUG_GCC_105339
+#    endif
+#  elif defined(__clang__)
+#    if defined(SIMDE_ARCH_AARCH64)
+#      define SIMDE_BUG_CLANG_48257  // https://github.com/llvm/llvm-project/issues/47601
+#      define SIMDE_BUG_CLANG_71362  // https://github.com/llvm/llvm-project/issues/71362
+#      define SIMDE_BUG_CLANG_71365  // https://github.com/llvm/llvm-project/issues/71365
+#      define SIMDE_BUG_CLANG_71751  // https://github.com/llvm/llvm-project/issues/71751
+#      if !SIMDE_DETECT_CLANG_VERSION_CHECK(15,0,0)
+#        define SIMDE_BUG_CLANG_45541
+#      endif
+#      if !SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)
+#        define SIMDE_BUG_CLANG_46840
+#        define SIMDE_BUG_CLANG_46844
+#      endif
+#      if SIMDE_DETECT_CLANG_VERSION_CHECK(10,0,0) && SIMDE_DETECT_CLANG_VERSION_NOT(11,0,0)
+#        define SIMDE_BUG_CLANG_BAD_VI64_OPS
+#      endif
+#      if SIMDE_DETECT_CLANG_VERSION_NOT(9,0,0)
+#        define SIMDE_BUG_CLANG_GIT_4EC445B8
+#        define SIMDE_BUG_CLANG_REV_365298 /* 0464e07c8f6e3310c28eb210a4513bc2243c2a7e */
+#      endif
+#    endif
+#    if defined(SIMDE_ARCH_ARM)
+#      if !SIMDE_DETECT_CLANG_VERSION_CHECK(11,0,0)
+#        define SIMDE_BUG_CLANG_BAD_VGET_SET_LANE_TYPES
+#      endif
+#      if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+#        define SIMDE_BUG_CLANG_71763  // https://github.com/llvm/llvm-project/issues/71763
+#      endif
+#    endif
+#    if defined(SIMDE_ARCH_POWER) && !SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)
+#      define SIMDE_BUG_CLANG_46770
+#    endif
+#    if defined(SIMDE_ARCH_POWER) && (SIMDE_ARCH_POWER == 700) && (SIMDE_DETECT_CLANG_VERSION_CHECK(11,0,0))
+#      if !SIMDE_DETECT_CLANG_VERSION_CHECK(13,0,0)
+#        define SIMDE_BUG_CLANG_50893
+#        define SIMDE_BUG_CLANG_50901
+#      endif
+#    endif
+#    if defined(_ARCH_PWR9) && !SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0) && !defined(__OPTIMIZE__)
+#      define SIMDE_BUG_CLANG_POWER9_16x4_BAD_SHIFT
+#    endif
+#    if defined(SIMDE_ARCH_POWER)
+#      if !SIMDE_DETECT_CLANG_VERSION_CHECK(14,0,0)
+#        define SIMDE_BUG_CLANG_50932
+#      endif
+#      if !SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)
+#        define SIMDE_BUG_VEC_CPSGN_REVERSED_ARGS
+#      endif
+#    endif
+#    if defined(SIMDE_ARCH_X86) || defined(SIMDE_ARCH_AMD64)
+#      if SIMDE_DETECT_CLANG_VERSION_NOT(5,0,0)
+#        define SIMDE_BUG_CLANG_REV_298042 /* 6afc436a7817a52e78ae7bcdc3faafd460124cac */
+#      endif
+#      if SIMDE_DETECT_CLANG_VERSION_NOT(3,7,0)
+#        define SIMDE_BUG_CLANG_REV_234560 /* b929ad7b1726a32650a8051f69a747fb6836c540 */
+#      endif
+#      if SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0) && SIMDE_DETECT_CLANG_VERSION_NOT(5,0,0)
+#        define SIMDE_BUG_CLANG_BAD_MADD
+#      endif
+#      if SIMDE_DETECT_CLANG_VERSION_CHECK(4,0,0) && SIMDE_DETECT_CLANG_VERSION_NOT(5,0,0)
+#        define SIMDE_BUG_CLANG_REV_299346 /* ac9959eb533a58482ea4da6c4db1e635a98de384 */
+#      endif
+#      if SIMDE_DETECT_CLANG_VERSION_NOT(8,0,0)
+#        define SIMDE_BUG_CLANG_REV_344862 /* eae26bf73715994c2bd145f9b6dc3836aa4ffd4f */
+#      endif
+#      if HEDLEY_HAS_WARNING("-Wsign-conversion") && SIMDE_DETECT_CLANG_VERSION_NOT(11,0,0)
+#        define SIMDE_BUG_CLANG_45931
+#      endif
+#      if HEDLEY_HAS_WARNING("-Wvector-conversion") && SIMDE_DETECT_CLANG_VERSION_NOT(11,0,0)
+#        define SIMDE_BUG_CLANG_44589
+#      endif
+#      define SIMDE_BUG_CLANG_48673  // https://github.com/llvm/llvm-project/issues/48017
+#    endif
+#    define SIMDE_BUG_CLANG_45959  // https://github.com/llvm/llvm-project/issues/45304
+#    if defined(SIMDE_ARCH_WASM_SIMD128) && !SIMDE_DETECT_CLANG_VERSION_CHECK(17,0,0)
+#      define SIMDE_BUG_CLANG_60655
+#    endif
+#  elif defined(HEDLEY_MSVC_VERSION)
+#    if defined(SIMDE_ARCH_X86)
+#      define SIMDE_BUG_MSVC_ROUND_EXTRACT
+#    endif
+#  elif defined(HEDLEY_INTEL_VERSION)
+#    define SIMDE_BUG_INTEL_857088
+#  elif defined(HEDLEY_MCST_LCC_VERSION)
+#    define SIMDE_BUG_MCST_LCC_MISSING_AVX_LOAD_STORE_M128_FUNCS
+#    define SIMDE_BUG_MCST_LCC_MISSING_CMOV_M256
+#    define SIMDE_BUG_MCST_LCC_FMA_WRONG_RESULT
+#  elif defined(HEDLEY_PGI_VERSION)
+#    define SIMDE_BUG_PGI_30104
+#    define SIMDE_BUG_PGI_30107
+#    define SIMDE_BUG_PGI_30106
+#  endif
+#endif
+
+/* GCC and Clang both have the same issue:
+ * https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95144
+ * https://bugs.llvm.org/show_bug.cgi?id=45931
+ * This is just an easy way to work around it.
+ */
+#if \
+    (HEDLEY_HAS_WARNING("-Wsign-conversion") && SIMDE_DETECT_CLANG_VERSION_NOT(11,0,0)) || \
+    HEDLEY_GCC_VERSION_CHECK(4,3,0)
+#  define SIMDE_BUG_IGNORE_SIGN_CONVERSION(expr) (__extension__ ({ \
+       HEDLEY_DIAGNOSTIC_PUSH  \
+       _Pragma("GCC diagnostic ignored \"-Wsign-conversion\"") \
+       __typeof__(expr) simde_bug_ignore_sign_conversion_v_= (expr); \
+       HEDLEY_DIAGNOSTIC_POP  \
+       simde_bug_ignore_sign_conversion_v_; \
+     }))
+#else
+#  define SIMDE_BUG_IGNORE_SIGN_CONVERSION(expr) (expr)
+#endif
+
+/* Usually the shift count is signed (for example, NEON or SSE).
+ * OTOH, unsigned is good for PPC (vec_srl uses unsigned), and the only option for E2K.
+ * Further info: https://github.com/simd-everywhere/simde/pull/700
+ */
+#if defined(SIMDE_ARCH_E2K) || defined(SIMDE_ARCH_POWER)
+  #define SIMDE_CAST_VECTOR_SHIFT_COUNT(width, value) HEDLEY_STATIC_CAST(uint##width##_t, (value))
+#else
+  #define SIMDE_CAST_VECTOR_SHIFT_COUNT(width, value) HEDLEY_STATIC_CAST(int##width##_t, (value))
+#endif
+
+/* Initial support for RISCV V extensions based on ZVE64D. */
+#if defined(SIMDE_ARCH_RISCV_ZVE64D) && SIMDE_NATURAL_VECTOR_SIZE >= 64
+  #define RVV_FIXED_TYPE_DEF(name, lmul) \
+    typedef vint8##name##_t  fixed_vint8##name##_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen * lmul))); \
+    typedef vint16##name##_t fixed_vint16##name##_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen * lmul))); \
+    typedef vint32##name##_t fixed_vint32##name##_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen * lmul))); \
+    typedef vuint8##name##_t fixed_vuint8##name##_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen * lmul))); \
+    typedef vuint16##name##_t fixed_vuint16##name##_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen * lmul))); \
+    typedef vuint32##name##_t fixed_vuint32##name##_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen * lmul))); \
+    typedef vfloat32##name##_t fixed_vfloat32##name##_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen * lmul)));
+    RVV_FIXED_TYPE_DEF(mf2, 1/2);
+    RVV_FIXED_TYPE_DEF(m1, 1);
+    RVV_FIXED_TYPE_DEF(m2, 2);
+  #define RVV_FIXED_TYPE_DEF_64B(name, lmul) \
+    typedef vint64##name##_t fixed_vint64##name##_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen * lmul))); \
+    typedef vuint64##name##_t fixed_vuint64##name##_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen * lmul))); \
+    typedef vfloat64##name##_t fixed_vfloat64##name##_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen * lmul)));
+    RVV_FIXED_TYPE_DEF_64B(m1, 1);
+    RVV_FIXED_TYPE_DEF_64B(m2, 2);
+  #if defined(SIMDE_ARCH_RISCV_ZVFH)
+    #define RVV_FIXED_TYPE_DEF_16F(name, lmul) \
+      typedef vfloat16##name##_t fixed_vfloat16##name##_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen * lmul)));
+    RVV_FIXED_TYPE_DEF_16F(mf2, 1/2);
+    RVV_FIXED_TYPE_DEF_16F(m1, 1);
+    RVV_FIXED_TYPE_DEF_16F(m2, 2);
+  #endif
+#endif
+
+/* SIMDE_DIAGNOSTIC_DISABLE_USED_BUT_MARKED_UNUSED_ */
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_COMMON_H) */
diff --git a/external_libs/pgenlib/simde/simde-complex.h b/external_libs/pgenlib/simde/simde-complex.h
new file mode 100644
index 0000000..48ebe4c
--- /dev/null
+++ b/external_libs/pgenlib/simde/simde-complex.h
@@ -0,0 +1,148 @@
+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2020-2021 Evan Nemerson <evan@nemerson.com>
+ */
+
+/* Support for complex math.
+ *
+ * We try to avoid including <complex> (in C++ mode) since it pulls in
+ * a *lot* of code.  Unfortunately this only works for GNU modes (i.e.,
+ * -std=gnu++14 not -std=c++14) unless you pass -fext-numeric-literals,
+ * but there is no way (AFAICT) to detect that flag so we have to rely
+ * on __STRICT_ANSI__ to instead detect GNU mode.
+ *
+ * This header is separate from simde-math.h since there is a good
+ * chance it will pull in <complex>, and most of the time we don't need
+ * complex math (on x86 only SVML uses it). */
+
+#if !defined(SIMDE_COMPLEX_H)
+#define SIMDE_COMPLEX_H 1
+
+#include "simde-math.h"
+
+#if ( \
+      HEDLEY_HAS_BUILTIN(__builtin_creal) || \
+      HEDLEY_GCC_VERSION_CHECK(4,7,0) || \
+      HEDLEY_INTEL_VERSION_CHECK(13,0,0) \
+    ) && (!defined(__cplusplus) && !defined(__STRICT_ANSI__))
+  HEDLEY_DIAGNOSTIC_PUSH
+  SIMDE_DIAGNOSTIC_DISABLE_C99_EXTENSIONS_
+    typedef __complex__ float simde_cfloat32;
+    typedef __complex__ double simde_cfloat64;
+  HEDLEY_DIAGNOSTIC_POP
+  #define SIMDE_MATH_CMPLX(x, y) (HEDLEY_STATIC_CAST(double, x) + HEDLEY_STATIC_CAST(double, y) * (__extension__ 1.0j))
+  #define SIMDE_MATH_CMPLXF(x, y) (HEDLEY_STATIC_CAST(float, x) + HEDLEY_STATIC_CAST(float, y) * (__extension__ 1.0fj))
+
+  #if !defined(simde_math_creal)
+    #define simde_math_crealf(z) __builtin_crealf(z)
+  #endif
+  #if !defined(simde_math_crealf)
+    #define simde_math_creal(z) __builtin_creal(z)
+  #endif
+  #if !defined(simde_math_cimag)
+    #define simde_math_cimagf(z) __builtin_cimagf(z)
+  #endif
+  #if !defined(simde_math_cimagf)
+    #define simde_math_cimag(z) __builtin_cimag(z)
+  #endif
+  #if !defined(simde_math_cexp)
+    #define simde_math_cexp(z) __builtin_cexp(z)
+  #endif
+  #if !defined(simde_math_cexpf)
+    #define simde_math_cexpf(z) __builtin_cexpf(z)
+  #endif
+#elif !defined(__cplusplus)
+  #include <complex.h>
+
+  #if !defined(HEDLEY_MSVC_VERSION)
+    typedef float _Complex simde_cfloat32;
+    typedef double _Complex simde_cfloat64;
+  #else
+    typedef _Fcomplex simde_cfloat32;
+    typedef _Dcomplex simde_cfloat64;
+  #endif
+
+  #if defined(HEDLEY_MSVC_VERSION)
+    #define SIMDE_MATH_CMPLX(x, y) ((simde_cfloat64) { (x), (y) })
+    #define SIMDE_MATH_CMPLXF(x, y) ((simde_cfloat32) { (x), (y) })
+  #elif defined(CMPLX) && defined(CMPLXF)
+    #define SIMDE_MATH_CMPLX(x, y) CMPLX(x, y)
+    #define SIMDE_MATH_CMPLXF(x, y) CMPLXF(x, y)
+  #else
+    #define SIMDE_MATH_CMPLX(x, y) (HEDLEY_STATIC_CAST(double, x) + HEDLEY_STATIC_CAST(double, y) * I)
+    #define SIMDE_MATH_CMPLXF(x, y) (HEDLEY_STATIC_CAST(float, x) + HEDLEY_STATIC_CAST(float, y) * I)
+  #endif
+
+  #if !defined(simde_math_creal)
+    #define simde_math_creal(z) creal(z)
+  #endif
+  #if !defined(simde_math_crealf)
+    #define simde_math_crealf(z) crealf(z)
+  #endif
+  #if !defined(simde_math_cimag)
+    #define simde_math_cimag(z) cimag(z)
+  #endif
+  #if !defined(simde_math_cimagf)
+    #define simde_math_cimagf(z) cimagf(z)
+  #endif
+  #if !defined(simde_math_cexp)
+    #define simde_math_cexp(z) cexp(z)
+  #endif
+  #if !defined(simde_math_cexpf)
+    #define simde_math_cexpf(z) cexpf(z)
+  #endif
+#else
+  HEDLEY_DIAGNOSTIC_PUSH
+  #if defined(HEDLEY_MSVC_VERSION)
+    #pragma warning(disable:4530)
+  #endif
+  #include <complex>
+  HEDLEY_DIAGNOSTIC_POP
+
+  typedef std::complex<float> simde_cfloat32;
+  typedef std::complex<double> simde_cfloat64;
+  #define SIMDE_MATH_CMPLX(x, y) (std::complex<double>(x, y))
+  #define SIMDE_MATH_CMPLXF(x, y) (std::complex<float>(x, y))
+
+  #if !defined(simde_math_creal)
+    #define simde_math_creal(z) ((z).real())
+  #endif
+  #if !defined(simde_math_crealf)
+    #define simde_math_crealf(z) ((z).real())
+  #endif
+  #if !defined(simde_math_cimag)
+    #define simde_math_cimag(z) ((z).imag())
+  #endif
+  #if !defined(simde_math_cimagf)
+    #define simde_math_cimagf(z) ((z).imag())
+  #endif
+  #if !defined(simde_math_cexp)
+    #define simde_math_cexp(z) std::exp(z)
+  #endif
+  #if !defined(simde_math_cexpf)
+    #define simde_math_cexpf(z) std::exp(z)
+  #endif
+#endif
+
+#endif /* !defined(SIMDE_COMPLEX_H) */
diff --git a/external_libs/pgenlib/simde/simde-constify.h b/external_libs/pgenlib/simde/simde-constify.h
new file mode 100644
index 0000000..94a9d38
--- /dev/null
+++ b/external_libs/pgenlib/simde/simde-constify.h
@@ -0,0 +1,397 @@
+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2020      Evan Nemerson <evan@nemerson.com>
+ */
+
+/* Constify macros.  For internal use only.
+ *
+ * These are used to make it possible to call a function which takes
+ * an Integer Constant Expression (ICE) using a compile time constant.
+ * Technically it would also be possible to use a value not trivially
+ * known by the compiler, but there would be a siginficant performance
+ * hit (a switch switch is used).
+ *
+ * The basic idea is pretty simple; we just emit a do while loop which
+ * contains a switch with a case for every possible value of the
+ * constant.
+ *
+ * As long as the value you pass to the function in constant, pretty
+ * much any copmiler shouldn't have a problem generating exactly the
+ * same code as if you had used an ICE.
+ *
+ * This is intended to be used in the SIMDe implementations of
+ * functions the compilers require to be an ICE, but the other benefit
+ * is that if we also disable the warnings from
+ * SIMDE_REQUIRE_CONSTANT_RANGE we can actually just allow the tests
+ * to use non-ICE parameters
+ */
+
+#if !defined(SIMDE_CONSTIFY_H)
+#define SIMDE_CONSTIFY_H
+
+#include "simde-diagnostic.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DIAGNOSTIC_DISABLE_VARIADIC_MACROS_
+SIMDE_DIAGNOSTIC_DISABLE_CPP98_COMPAT_PEDANTIC_
+
+#define SIMDE_CONSTIFY_2_(func_name, result, default_case, imm, ...) \
+  do { \
+    switch(imm) { \
+      case 0: result = func_name(__VA_ARGS__, 0); break; \
+      case 1: result = func_name(__VA_ARGS__, 1); break; \
+      default: result = default_case; break; \
+    } \
+  } while (0)
+
+#define SIMDE_CONSTIFY_4_(func_name, result, default_case, imm, ...) \
+  do { \
+    switch(imm) { \
+      case 0: result = func_name(__VA_ARGS__, 0); break; \
+      case 1: result = func_name(__VA_ARGS__, 1); break; \
+      case 2: result = func_name(__VA_ARGS__, 2); break; \
+      case 3: result = func_name(__VA_ARGS__, 3); break; \
+      default: result = default_case; break; \
+    } \
+  } while (0)
+
+#define SIMDE_CONSTIFY_8_(func_name, result, default_case, imm, ...) \
+  do { \
+    switch(imm) { \
+      case 0: result = func_name(__VA_ARGS__, 0); break; \
+      case 1: result = func_name(__VA_ARGS__, 1); break; \
+      case 2: result = func_name(__VA_ARGS__, 2); break; \
+      case 3: result = func_name(__VA_ARGS__, 3); break; \
+      case 4: result = func_name(__VA_ARGS__, 4); break; \
+      case 5: result = func_name(__VA_ARGS__, 5); break; \
+      case 6: result = func_name(__VA_ARGS__, 6); break; \
+      case 7: result = func_name(__VA_ARGS__, 7); break; \
+      default: result = default_case; break; \
+    } \
+  } while (0)
+
+#define SIMDE_CONSTIFY_16_(func_name, result, default_case, imm, ...) \
+  do { \
+    switch(imm) { \
+      case  0: result = func_name(__VA_ARGS__,  0); break; \
+      case  1: result = func_name(__VA_ARGS__,  1); break; \
+      case  2: result = func_name(__VA_ARGS__,  2); break; \
+      case  3: result = func_name(__VA_ARGS__,  3); break; \
+      case  4: result = func_name(__VA_ARGS__,  4); break; \
+      case  5: result = func_name(__VA_ARGS__,  5); break; \
+      case  6: result = func_name(__VA_ARGS__,  6); break; \
+      case  7: result = func_name(__VA_ARGS__,  7); break; \
+      case  8: result = func_name(__VA_ARGS__,  8); break; \
+      case  9: result = func_name(__VA_ARGS__,  9); break; \
+      case 10: result = func_name(__VA_ARGS__, 10); break; \
+      case 11: result = func_name(__VA_ARGS__, 11); break; \
+      case 12: result = func_name(__VA_ARGS__, 12); break; \
+      case 13: result = func_name(__VA_ARGS__, 13); break; \
+      case 14: result = func_name(__VA_ARGS__, 14); break; \
+      case 15: result = func_name(__VA_ARGS__, 15); break; \
+      default: result = default_case; break; \
+    } \
+  } while (0)
+
+#define SIMDE_CONSTIFY_32_(func_name, result, default_case, imm, ...) \
+  do { \
+    switch(imm) { \
+      case  0: result = func_name(__VA_ARGS__,  0); break; \
+      case  1: result = func_name(__VA_ARGS__,  1); break; \
+      case  2: result = func_name(__VA_ARGS__,  2); break; \
+      case  3: result = func_name(__VA_ARGS__,  3); break; \
+      case  4: result = func_name(__VA_ARGS__,  4); break; \
+      case  5: result = func_name(__VA_ARGS__,  5); break; \
+      case  6: result = func_name(__VA_ARGS__,  6); break; \
+      case  7: result = func_name(__VA_ARGS__,  7); break; \
+      case  8: result = func_name(__VA_ARGS__,  8); break; \
+      case  9: result = func_name(__VA_ARGS__,  9); break; \
+      case 10: result = func_name(__VA_ARGS__, 10); break; \
+      case 11: result = func_name(__VA_ARGS__, 11); break; \
+      case 12: result = func_name(__VA_ARGS__, 12); break; \
+      case 13: result = func_name(__VA_ARGS__, 13); break; \
+      case 14: result = func_name(__VA_ARGS__, 14); break; \
+      case 15: result = func_name(__VA_ARGS__, 15); break; \
+      case 16: result = func_name(__VA_ARGS__, 16); break; \
+      case 17: result = func_name(__VA_ARGS__, 17); break; \
+      case 18: result = func_name(__VA_ARGS__, 18); break; \
+      case 19: result = func_name(__VA_ARGS__, 19); break; \
+      case 20: result = func_name(__VA_ARGS__, 20); break; \
+      case 21: result = func_name(__VA_ARGS__, 21); break; \
+      case 22: result = func_name(__VA_ARGS__, 22); break; \
+      case 23: result = func_name(__VA_ARGS__, 23); break; \
+      case 24: result = func_name(__VA_ARGS__, 24); break; \
+      case 25: result = func_name(__VA_ARGS__, 25); break; \
+      case 26: result = func_name(__VA_ARGS__, 26); break; \
+      case 27: result = func_name(__VA_ARGS__, 27); break; \
+      case 28: result = func_name(__VA_ARGS__, 28); break; \
+      case 29: result = func_name(__VA_ARGS__, 29); break; \
+      case 30: result = func_name(__VA_ARGS__, 30); break; \
+      case 31: result = func_name(__VA_ARGS__, 31); break; \
+      default: result = default_case; break; \
+    } \
+  } while (0)
+
+#define SIMDE_CONSTIFY_64_(func_name, result, default_case, imm, ...) \
+  do { \
+    switch(imm) { \
+      case  0: result = func_name(__VA_ARGS__,  0); break; \
+      case  1: result = func_name(__VA_ARGS__,  1); break; \
+      case  2: result = func_name(__VA_ARGS__,  2); break; \
+      case  3: result = func_name(__VA_ARGS__,  3); break; \
+      case  4: result = func_name(__VA_ARGS__,  4); break; \
+      case  5: result = func_name(__VA_ARGS__,  5); break; \
+      case  6: result = func_name(__VA_ARGS__,  6); break; \
+      case  7: result = func_name(__VA_ARGS__,  7); break; \
+      case  8: result = func_name(__VA_ARGS__,  8); break; \
+      case  9: result = func_name(__VA_ARGS__,  9); break; \
+      case 10: result = func_name(__VA_ARGS__, 10); break; \
+      case 11: result = func_name(__VA_ARGS__, 11); break; \
+      case 12: result = func_name(__VA_ARGS__, 12); break; \
+      case 13: result = func_name(__VA_ARGS__, 13); break; \
+      case 14: result = func_name(__VA_ARGS__, 14); break; \
+      case 15: result = func_name(__VA_ARGS__, 15); break; \
+      case 16: result = func_name(__VA_ARGS__, 16); break; \
+      case 17: result = func_name(__VA_ARGS__, 17); break; \
+      case 18: result = func_name(__VA_ARGS__, 18); break; \
+      case 19: result = func_name(__VA_ARGS__, 19); break; \
+      case 20: result = func_name(__VA_ARGS__, 20); break; \
+      case 21: result = func_name(__VA_ARGS__, 21); break; \
+      case 22: result = func_name(__VA_ARGS__, 22); break; \
+      case 23: result = func_name(__VA_ARGS__, 23); break; \
+      case 24: result = func_name(__VA_ARGS__, 24); break; \
+      case 25: result = func_name(__VA_ARGS__, 25); break; \
+      case 26: result = func_name(__VA_ARGS__, 26); break; \
+      case 27: result = func_name(__VA_ARGS__, 27); break; \
+      case 28: result = func_name(__VA_ARGS__, 28); break; \
+      case 29: result = func_name(__VA_ARGS__, 29); break; \
+      case 30: result = func_name(__VA_ARGS__, 30); break; \
+      case 31: result = func_name(__VA_ARGS__, 31); break; \
+      case 32: result = func_name(__VA_ARGS__, 32); break; \
+      case 33: result = func_name(__VA_ARGS__, 33); break; \
+      case 34: result = func_name(__VA_ARGS__, 34); break; \
+      case 35: result = func_name(__VA_ARGS__, 35); break; \
+      case 36: result = func_name(__VA_ARGS__, 36); break; \
+      case 37: result = func_name(__VA_ARGS__, 37); break; \
+      case 38: result = func_name(__VA_ARGS__, 38); break; \
+      case 39: result = func_name(__VA_ARGS__, 39); break; \
+      case 40: result = func_name(__VA_ARGS__, 40); break; \
+      case 41: result = func_name(__VA_ARGS__, 41); break; \
+      case 42: result = func_name(__VA_ARGS__, 42); break; \
+      case 43: result = func_name(__VA_ARGS__, 43); break; \
+      case 44: result = func_name(__VA_ARGS__, 44); break; \
+      case 45: result = func_name(__VA_ARGS__, 45); break; \
+      case 46: result = func_name(__VA_ARGS__, 46); break; \
+      case 47: result = func_name(__VA_ARGS__, 47); break; \
+      case 48: result = func_name(__VA_ARGS__, 48); break; \
+      case 49: result = func_name(__VA_ARGS__, 49); break; \
+      case 50: result = func_name(__VA_ARGS__, 50); break; \
+      case 51: result = func_name(__VA_ARGS__, 51); break; \
+      case 52: result = func_name(__VA_ARGS__, 52); break; \
+      case 53: result = func_name(__VA_ARGS__, 53); break; \
+      case 54: result = func_name(__VA_ARGS__, 54); break; \
+      case 55: result = func_name(__VA_ARGS__, 55); break; \
+      case 56: result = func_name(__VA_ARGS__, 56); break; \
+      case 57: result = func_name(__VA_ARGS__, 57); break; \
+      case 58: result = func_name(__VA_ARGS__, 58); break; \
+      case 59: result = func_name(__VA_ARGS__, 59); break; \
+      case 60: result = func_name(__VA_ARGS__, 60); break; \
+      case 61: result = func_name(__VA_ARGS__, 61); break; \
+      case 62: result = func_name(__VA_ARGS__, 62); break; \
+      case 63: result = func_name(__VA_ARGS__, 63); break; \
+      default: result = default_case; break; \
+    } \
+  } while (0)
+
+#define SIMDE_CONSTIFY_2_NO_RESULT_(func_name, default_case, imm, ...) \
+  do { \
+    switch(imm) { \
+      case 0: func_name(__VA_ARGS__, 0); break; \
+      case 1: func_name(__VA_ARGS__, 1); break; \
+      default: default_case; break; \
+    } \
+  } while (0)
+
+#define SIMDE_CONSTIFY_4_NO_RESULT_(func_name, default_case, imm, ...) \
+  do { \
+    switch(imm) { \
+      case 0: func_name(__VA_ARGS__, 0); break; \
+      case 1: func_name(__VA_ARGS__, 1); break; \
+      case 2: func_name(__VA_ARGS__, 2); break; \
+      case 3: func_name(__VA_ARGS__, 3); break; \
+      default: default_case; break; \
+    } \
+  } while (0)
+
+#define SIMDE_CONSTIFY_8_NO_RESULT_(func_name, default_case, imm, ...) \
+  do { \
+    switch(imm) { \
+      case 0: func_name(__VA_ARGS__, 0); break; \
+      case 1: func_name(__VA_ARGS__, 1); break; \
+      case 2: func_name(__VA_ARGS__, 2); break; \
+      case 3: func_name(__VA_ARGS__, 3); break; \
+      case 4: func_name(__VA_ARGS__, 4); break; \
+      case 5: func_name(__VA_ARGS__, 5); break; \
+      case 6: func_name(__VA_ARGS__, 6); break; \
+      case 7: func_name(__VA_ARGS__, 7); break; \
+      default: default_case; break; \
+    } \
+  } while (0)
+
+#define SIMDE_CONSTIFY_16_NO_RESULT_(func_name, default_case, imm, ...) \
+  do { \
+    switch(imm) { \
+      case  0: func_name(__VA_ARGS__,  0); break; \
+      case  1: func_name(__VA_ARGS__,  1); break; \
+      case  2: func_name(__VA_ARGS__,  2); break; \
+      case  3: func_name(__VA_ARGS__,  3); break; \
+      case  4: func_name(__VA_ARGS__,  4); break; \
+      case  5: func_name(__VA_ARGS__,  5); break; \
+      case  6: func_name(__VA_ARGS__,  6); break; \
+      case  7: func_name(__VA_ARGS__,  7); break; \
+      case  8: func_name(__VA_ARGS__,  8); break; \
+      case  9: func_name(__VA_ARGS__,  9); break; \
+      case 10: func_name(__VA_ARGS__, 10); break; \
+      case 11: func_name(__VA_ARGS__, 11); break; \
+      case 12: func_name(__VA_ARGS__, 12); break; \
+      case 13: func_name(__VA_ARGS__, 13); break; \
+      case 14: func_name(__VA_ARGS__, 14); break; \
+      case 15: func_name(__VA_ARGS__, 15); break; \
+      default: default_case; break; \
+    } \
+  } while (0)
+
+#define SIMDE_CONSTIFY_32_NO_RESULT_(func_name, default_case, imm, ...) \
+  do { \
+    switch(imm) { \
+      case  0: func_name(__VA_ARGS__,  0); break; \
+      case  1: func_name(__VA_ARGS__,  1); break; \
+      case  2: func_name(__VA_ARGS__,  2); break; \
+      case  3: func_name(__VA_ARGS__,  3); break; \
+      case  4: func_name(__VA_ARGS__,  4); break; \
+      case  5: func_name(__VA_ARGS__,  5); break; \
+      case  6: func_name(__VA_ARGS__,  6); break; \
+      case  7: func_name(__VA_ARGS__,  7); break; \
+      case  8: func_name(__VA_ARGS__,  8); break; \
+      case  9: func_name(__VA_ARGS__,  9); break; \
+      case 10: func_name(__VA_ARGS__, 10); break; \
+      case 11: func_name(__VA_ARGS__, 11); break; \
+      case 12: func_name(__VA_ARGS__, 12); break; \
+      case 13: func_name(__VA_ARGS__, 13); break; \
+      case 14: func_name(__VA_ARGS__, 14); break; \
+      case 15: func_name(__VA_ARGS__, 15); break; \
+      case 16: func_name(__VA_ARGS__, 16); break; \
+      case 17: func_name(__VA_ARGS__, 17); break; \
+      case 18: func_name(__VA_ARGS__, 18); break; \
+      case 19: func_name(__VA_ARGS__, 19); break; \
+      case 20: func_name(__VA_ARGS__, 20); break; \
+      case 21: func_name(__VA_ARGS__, 21); break; \
+      case 22: func_name(__VA_ARGS__, 22); break; \
+      case 23: func_name(__VA_ARGS__, 23); break; \
+      case 24: func_name(__VA_ARGS__, 24); break; \
+      case 25: func_name(__VA_ARGS__, 25); break; \
+      case 26: func_name(__VA_ARGS__, 26); break; \
+      case 27: func_name(__VA_ARGS__, 27); break; \
+      case 28: func_name(__VA_ARGS__, 28); break; \
+      case 29: func_name(__VA_ARGS__, 29); break; \
+      case 30: func_name(__VA_ARGS__, 30); break; \
+      case 31: func_name(__VA_ARGS__, 31); break; \
+      default: default_case; break; \
+    } \
+  } while (0)
+
+#define SIMDE_CONSTIFY_64_NO_RESULT_(func_name, default_case, imm, ...) \
+  do { \
+    switch(imm) { \
+      case  0: func_name(__VA_ARGS__,  0); break; \
+      case  1: func_name(__VA_ARGS__,  1); break; \
+      case  2: func_name(__VA_ARGS__,  2); break; \
+      case  3: func_name(__VA_ARGS__,  3); break; \
+      case  4: func_name(__VA_ARGS__,  4); break; \
+      case  5: func_name(__VA_ARGS__,  5); break; \
+      case  6: func_name(__VA_ARGS__,  6); break; \
+      case  7: func_name(__VA_ARGS__,  7); break; \
+      case  8: func_name(__VA_ARGS__,  8); break; \
+      case  9: func_name(__VA_ARGS__,  9); break; \
+      case 10: func_name(__VA_ARGS__, 10); break; \
+      case 11: func_name(__VA_ARGS__, 11); break; \
+      case 12: func_name(__VA_ARGS__, 12); break; \
+      case 13: func_name(__VA_ARGS__, 13); break; \
+      case 14: func_name(__VA_ARGS__, 14); break; \
+      case 15: func_name(__VA_ARGS__, 15); break; \
+      case 16: func_name(__VA_ARGS__, 16); break; \
+      case 17: func_name(__VA_ARGS__, 17); break; \
+      case 18: func_name(__VA_ARGS__, 18); break; \
+      case 19: func_name(__VA_ARGS__, 19); break; \
+      case 20: func_name(__VA_ARGS__, 20); break; \
+      case 21: func_name(__VA_ARGS__, 21); break; \
+      case 22: func_name(__VA_ARGS__, 22); break; \
+      case 23: func_name(__VA_ARGS__, 23); break; \
+      case 24: func_name(__VA_ARGS__, 24); break; \
+      case 25: func_name(__VA_ARGS__, 25); break; \
+      case 26: func_name(__VA_ARGS__, 26); break; \
+      case 27: func_name(__VA_ARGS__, 27); break; \
+      case 28: func_name(__VA_ARGS__, 28); break; \
+      case 29: func_name(__VA_ARGS__, 29); break; \
+      case 30: func_name(__VA_ARGS__, 30); break; \
+      case 31: func_name(__VA_ARGS__, 31); break; \
+      case 32: func_name(__VA_ARGS__, 32); break; \
+      case 33: func_name(__VA_ARGS__, 33); break; \
+      case 34: func_name(__VA_ARGS__, 34); break; \
+      case 35: func_name(__VA_ARGS__, 35); break; \
+      case 36: func_name(__VA_ARGS__, 36); break; \
+      case 37: func_name(__VA_ARGS__, 37); break; \
+      case 38: func_name(__VA_ARGS__, 38); break; \
+      case 39: func_name(__VA_ARGS__, 39); break; \
+      case 40: func_name(__VA_ARGS__, 40); break; \
+      case 41: func_name(__VA_ARGS__, 41); break; \
+      case 42: func_name(__VA_ARGS__, 42); break; \
+      case 43: func_name(__VA_ARGS__, 43); break; \
+      case 44: func_name(__VA_ARGS__, 44); break; \
+      case 45: func_name(__VA_ARGS__, 45); break; \
+      case 46: func_name(__VA_ARGS__, 46); break; \
+      case 47: func_name(__VA_ARGS__, 47); break; \
+      case 48: func_name(__VA_ARGS__, 48); break; \
+      case 49: func_name(__VA_ARGS__, 49); break; \
+      case 50: func_name(__VA_ARGS__, 50); break; \
+      case 51: func_name(__VA_ARGS__, 51); break; \
+      case 52: func_name(__VA_ARGS__, 52); break; \
+      case 53: func_name(__VA_ARGS__, 53); break; \
+      case 54: func_name(__VA_ARGS__, 54); break; \
+      case 55: func_name(__VA_ARGS__, 55); break; \
+      case 56: func_name(__VA_ARGS__, 56); break; \
+      case 57: func_name(__VA_ARGS__, 57); break; \
+      case 58: func_name(__VA_ARGS__, 58); break; \
+      case 59: func_name(__VA_ARGS__, 59); break; \
+      case 60: func_name(__VA_ARGS__, 60); break; \
+      case 61: func_name(__VA_ARGS__, 61); break; \
+      case 62: func_name(__VA_ARGS__, 62); break; \
+      case 63: func_name(__VA_ARGS__, 63); break; \
+      default: default_case; break; \
+    } \
+  } while (0)
+
+HEDLEY_DIAGNOSTIC_POP
+
+#endif
diff --git a/external_libs/pgenlib/simde/simde-detect-clang.h b/external_libs/pgenlib/simde/simde-detect-clang.h
new file mode 100644
index 0000000..7326f02
--- /dev/null
+++ b/external_libs/pgenlib/simde/simde-detect-clang.h
@@ -0,0 +1,131 @@
+/* Detect Clang Version
+ * Created by Evan Nemerson <evan@nemerson.com>
+ *
+ * To the extent possible under law, the author(s) have dedicated all
+ * copyright and related and neighboring rights to this software to
+ * the public domain worldwide. This software is distributed without
+ * any warranty.
+ *
+ * For details, see <http://creativecommons.org/publicdomain/zero/1.0/>.
+ * SPDX-License-Identifier: CC0-1.0
+ */
+
+/* This file was originally part of SIMDe
+ * (<https://github.com/simd-everywhere/simde>).  You're free to do with it as
+ * you please, but I do have a few small requests:
+ *
+ *  * If you make improvements, please submit them back to SIMDe
+ *    (at <https://github.com/simd-everywhere/simde/issues>) so others can
+ *    benefit from them.
+ *  * Please keep a link to SIMDe intact so people know where to submit
+ *    improvements.
+ *  * If you expose it publicly, please change the SIMDE_ prefix to
+ *    something specific to your project.
+ *
+ * The version numbers clang exposes (in the ___clang_major__,
+ * __clang_minor__, and __clang_patchlevel__ macros) are unreliable.
+ * Vendors such as Apple will define these values to their version
+ * numbers; for example, "Apple Clang 4.0" is really clang 3.1, but
+ * __clang_major__ and __clang_minor__ are defined to 4 and 0
+ * respectively, instead of 3 and 1.
+ *
+ * The solution is *usually* to use clang's feature detection macros
+ * (<https://clang.llvm.org/docs/LanguageExtensions.html#feature-checking-macros>)
+ * to determine if the feature you're interested in is available.  This
+ * generally works well, and it should probably be the first thing you
+ * try.  Unfortunately, it's not possible to check for everything.  In
+ * particular, compiler bugs.
+ *
+ * This file just uses the feature checking macros to detect features
+ * added in specific versions of clang to identify which version of
+ * clang the compiler is based on.
+ *
+ * Right now it only goes back to 3.6, but I'm happy to accept patches
+ * to go back further.  And, of course, newer versions are welcome if
+ * they're not already present, and if you find a way to detect a point
+ * release that would be great, too!
+ */
+
+#if !defined(SIMDE_DETECT_CLANG_H)
+#define SIMDE_DETECT_CLANG_H 1
+
+/* Attempt to detect the upstream clang version number.  I usually only
+ * worry about major version numbers (at least for 4.0+), but if you
+ * need more resolution I'm happy to accept patches that are able to
+ * detect minor versions as well.  That said, you'll probably have a
+ * hard time with detection since AFAIK most minor releases don't add
+ * anything we can detect. Updated based on
+ * https://github.com/google/highway/blob/438c705a295176b96a50336527bb3e7ea365ffac/hwy/detect_compiler_arch.h#L73
+ * - would welcome patches/updates there as well.
+ */
+
+#if defined(__clang__) && !defined(SIMDE_DETECT_CLANG_VERSION)
+#  if __has_warning("-Wmissing-designated-field-initializers")
+#    define SIMDE_DETECT_CLANG_VERSION 190000
+#  elif __has_warning("-Woverriding-option")
+#    define SIMDE_DETECT_CLANG_VERSION 180000
+#  elif __has_attribute(unsafe_buffer_usage)  // no new warnings in 17.0
+#    define SIMDE_DETECT_CLANG_VERSION 170000
+#  elif __has_attribute(nouwtable)  // no new warnings in 16.0
+#    define SIMDE_DETECT_CLANG_VERSION 160000
+#  elif __has_warning("-Warray-parameter")
+#    define SIMDE_DETECT_CLANG_VERSION 150000
+#  elif __has_warning("-Wbitwise-instead-of-logical")
+#    define SIMDE_DETECT_CLANG_VERSION 140000
+#  elif __has_warning("-Waix-compat")
+#    define SIMDE_DETECT_CLANG_VERSION 130000
+#  elif __has_warning("-Wformat-insufficient-args")
+#    define SIMDE_DETECT_CLANG_VERSION 120000
+#  elif __has_warning("-Wimplicit-const-int-float-conversion")
+#    define SIMDE_DETECT_CLANG_VERSION 110000
+#  elif __has_warning("-Wmisleading-indentation")
+#    define SIMDE_DETECT_CLANG_VERSION 100000
+#  elif defined(__FILE_NAME__)
+#    define SIMDE_DETECT_CLANG_VERSION 90000
+#  elif __has_warning("-Wextra-semi-stmt") || __has_builtin(__builtin_rotateleft32)
+#    define SIMDE_DETECT_CLANG_VERSION 80000
+// For reasons unknown, Xcode 10.3 (Apple LLVM version 10.0.1) is apparently
+// based on Clang 7, but does not support the warning we test.
+// See https://en.wikipedia.org/wiki/Xcode#Toolchain_versions and
+// https://trac.macports.org/wiki/XcodeVersionInfo.
+#  elif __has_warning("-Wc++98-compat-extra-semi") || \
+      (defined(__apple_build_version__) && __apple_build_version__ >= 10010000)
+#    define SIMDE_DETECT_CLANG_VERSION 70000
+#  elif __has_warning("-Wpragma-pack")
+#    define SIMDE_DETECT_CLANG_VERSION 60000
+#  elif __has_warning("-Wbitfield-enum-conversion")
+#    define SIMDE_DETECT_CLANG_VERSION 50000
+#  elif __has_attribute(diagnose_if)
+#    define SIMDE_DETECT_CLANG_VERSION 40000
+#  elif __has_warning("-Wcomma")
+#    define SIMDE_DETECT_CLANG_VERSION 39000
+#  elif __has_warning("-Wdouble-promotion")
+#    define SIMDE_DETECT_CLANG_VERSION 38000
+#  elif __has_warning("-Wshift-negative-value")
+#    define SIMDE_DETECT_CLANG_VERSION 37000
+#  elif __has_warning("-Wambiguous-ellipsis")
+#    define SIMDE_DETECT_CLANG_VERSION 36000
+#  else
+#    define SIMDE_DETECT_CLANG_VERSION 1
+#  endif
+#endif /* defined(__clang__) && !defined(SIMDE_DETECT_CLANG_VERSION) */
+
+/* The SIMDE_DETECT_CLANG_VERSION_CHECK macro is pretty
+ * straightforward; it returns true if the compiler is a derivative
+ * of clang >= the specified version.
+ *
+ * Since this file is often (primarily?) useful for working around bugs
+ * it is also helpful to have a macro which returns true if only if the
+ * compiler is a version of clang *older* than the specified version to
+ * make it a bit easier to ifdef regions to add code for older versions,
+ * such as pragmas to disable a specific warning. */
+
+#if defined(SIMDE_DETECT_CLANG_VERSION)
+#  define SIMDE_DETECT_CLANG_VERSION_CHECK(major, minor, revision) (SIMDE_DETECT_CLANG_VERSION >= ((major * 10000) + (minor * 1000) + (revision)))
+#  define SIMDE_DETECT_CLANG_VERSION_NOT(major, minor, revision) (SIMDE_DETECT_CLANG_VERSION < ((major * 10000) + (minor * 1000) + (revision)))
+#else
+#  define SIMDE_DETECT_CLANG_VERSION_CHECK(major, minor, revision) (0)
+#  define SIMDE_DETECT_CLANG_VERSION_NOT(major, minor, revision) (0)
+#endif
+
+#endif /* !defined(SIMDE_DETECT_CLANG_H) */
diff --git a/external_libs/pgenlib/simde/simde-diagnostic.h b/external_libs/pgenlib/simde/simde-diagnostic.h
new file mode 100644
index 0000000..6c7d2e7
--- /dev/null
+++ b/external_libs/pgenlib/simde/simde-diagnostic.h
@@ -0,0 +1,456 @@
+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2017-2020 Evan Nemerson <evan@nemerson.com>
+ */
+
+/* SIMDe targets a very wide range of standards and compilers, and our
+ * goal is to compile cleanly even with extremely aggressive warnings
+ * (i.e., -Weverything in clang, -Wextra in GCC, /W4 for MSVC, etc.)
+ * treated as errors.
+ *
+ * While our preference is to resolve the underlying issue a given
+ * diagnostic is warning us about, sometimes that's not possible.
+ * Fixing a warning in one compiler may cause problems in another.
+ * Sometimes a warning doesn't really apply to us (false positives),
+ * and sometimes adhering to a warning would mean dropping a feature
+ * we *know* the compiler supports since we have tested specifically
+ * for the compiler or feature.
+ *
+ * When practical, warnings are only disabled for specific code.  For
+ * a list of warnings which are enabled by default in all SIMDe code,
+ * see SIMDE_DISABLE_UNWANTED_DIAGNOSTICS.  Note that we restore the
+ * warning stack when SIMDe is done parsing, so code which includes
+ * SIMDe is not deprived of these warnings.
+ */
+
+#if !defined(SIMDE_DIAGNOSTIC_H)
+#define SIMDE_DIAGNOSTIC_H
+
+#include "hedley.h"
+#include "simde-detect-clang.h"
+#include "simde-arch.h"
+
+/* This is only to help us implement functions like _mm_undefined_ps. */
+#if defined(SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_)
+  #undef SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_
+#endif
+#if HEDLEY_HAS_WARNING("-Wuninitialized")
+  #define SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_ _Pragma("clang diagnostic ignored \"-Wuninitialized\"")
+#elif HEDLEY_GCC_VERSION_CHECK(4,2,0)
+  #define SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_ _Pragma("GCC diagnostic ignored \"-Wuninitialized\"")
+#elif HEDLEY_PGI_VERSION_CHECK(19,10,0)
+  #define SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_ _Pragma("diag_suppress 549")
+#elif HEDLEY_SUNPRO_VERSION_CHECK(5,14,0) && defined(__cplusplus)
+  #define SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_ _Pragma("error_messages(off,SEC_UNINITIALIZED_MEM_READ,SEC_UNDEFINED_RETURN_VALUE,unassigned)")
+#elif HEDLEY_SUNPRO_VERSION_CHECK(5,14,0)
+  #define SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_ _Pragma("error_messages(off,SEC_UNINITIALIZED_MEM_READ,SEC_UNDEFINED_RETURN_VALUE)")
+#elif HEDLEY_SUNPRO_VERSION_CHECK(5,12,0) && defined(__cplusplus)
+  #define SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_ _Pragma("error_messages(off,unassigned)")
+#elif \
+     HEDLEY_TI_VERSION_CHECK(16,9,9) || \
+     HEDLEY_TI_CL6X_VERSION_CHECK(8,0,0) || \
+     HEDLEY_TI_CL7X_VERSION_CHECK(1,2,0) || \
+     HEDLEY_TI_CLPRU_VERSION_CHECK(2,3,2)
+  #define SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_ _Pragma("diag_suppress 551")
+#elif HEDLEY_INTEL_VERSION_CHECK(13,0,0)
+  #define SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_ _Pragma("warning(disable:592)")
+#elif HEDLEY_MSVC_VERSION_CHECK(19,0,0) && !defined(__MSVC_RUNTIME_CHECKS)
+  #define SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_ __pragma(warning(disable:4700))
+#endif
+
+/* GCC emits a lot of "notes" about the ABI being different for things
+ * in newer versions of GCC.  We don't really care because all our
+ * functions are inlined and don't generate ABI. */
+#if HEDLEY_GCC_VERSION_CHECK(7,0,0)
+  #define SIMDE_DIAGNOSTIC_DISABLE_PSABI_ _Pragma("GCC diagnostic ignored \"-Wpsabi\"")
+#else
+  #define SIMDE_DIAGNOSTIC_DISABLE_PSABI_
+#endif
+
+/* Since MMX uses x87 FP registers, you're supposed to call _mm_empty()
+ * after each MMX function before any floating point instructions.
+ * Some compilers warn about functions which use MMX functions but
+ * don't call _mm_empty().  However, since SIMDe is implementyng the
+ * MMX API we shouldn't be calling _mm_empty(); we leave it to the
+ * caller to invoke simde_mm_empty(). */
+#if HEDLEY_INTEL_VERSION_CHECK(19,0,0)
+  #define SIMDE_DIAGNOSTIC_DISABLE_NO_EMMS_INSTRUCTION_ _Pragma("warning(disable:13200 13203)")
+#elif defined(HEDLEY_MSVC_VERSION)
+  #define SIMDE_DIAGNOSTIC_DISABLE_NO_EMMS_INSTRUCTION_ __pragma(warning(disable:4799))
+#else
+  #define SIMDE_DIAGNOSTIC_DISABLE_NO_EMMS_INSTRUCTION_
+#endif
+
+/* Intel is pushing people to use OpenMP SIMD instead of Cilk+, so they
+ * emit a diagnostic if you use #pragma simd instead of
+ * #pragma omp simd.  SIMDe supports OpenMP SIMD, you just need to
+ * compile with -qopenmp or -qopenmp-simd and define
+ * SIMDE_ENABLE_OPENMP.  Cilk+ is just a fallback. */
+#if HEDLEY_INTEL_VERSION_CHECK(18,0,0)
+  #define SIMDE_DIAGNOSTIC_DISABLE_SIMD_PRAGMA_DEPRECATED_ _Pragma("warning(disable:3948)")
+#else
+  #define SIMDE_DIAGNOSTIC_DISABLE_SIMD_PRAGMA_DEPRECATED_
+#endif
+
+/* MSVC emits a diagnostic when we call a function (like
+ * simde_mm_set_epi32) while initializing a struct.  We currently do
+ * this a *lot* in the tests. */
+#if \
+  defined(HEDLEY_MSVC_VERSION)
+  #define SIMDE_DIAGNOSTIC_DISABLE_NON_CONSTANT_AGGREGATE_INITIALIZER_ __pragma(warning(disable:4204))
+#else
+  #define SIMDE_DIAGNOSTIC_DISABLE_NON_CONSTANT_AGGREGATE_INITIALIZER_
+#endif
+
+/* This warning needs a lot of work.  It is triggered if all you do is
+ * pass the value to memcpy/__builtin_memcpy, or if you initialize a
+ * member of the union, even if that member takes up the entire union.
+ * Last tested with clang-10, hopefully things will improve in the
+ * future; if clang fixes this I'd love to enable it. */
+#if \
+  HEDLEY_HAS_WARNING("-Wconditional-uninitialized")
+  #define SIMDE_DIAGNOSTIC_DISABLE_CONDITIONAL_UNINITIALIZED_ _Pragma("clang diagnostic ignored \"-Wconditional-uninitialized\"")
+#else
+  #define SIMDE_DIAGNOSTIC_DISABLE_CONDITIONAL_UNINITIALIZED_
+#endif
+
+/* This warning is meant to catch things like `0.3 + 0.4 == 0.7`, which
+ * will is false.  However, SIMDe uses these operations exclusively
+ * for things like _mm_cmpeq_ps, for which we really do want to check
+ * for equality (or inequality).
+ *
+ * If someone wants to put together a SIMDE_FLOAT_EQUAL(a, op, b) macro
+ * which just wraps a check in some code do disable this diagnostic I'd
+ * be happy to accept it. */
+#if \
+  HEDLEY_HAS_WARNING("-Wfloat-equal") || \
+  HEDLEY_GCC_VERSION_CHECK(3,0,0)
+  #define SIMDE_DIAGNOSTIC_DISABLE_FLOAT_EQUAL_ _Pragma("GCC diagnostic ignored \"-Wfloat-equal\"")
+#else
+  #define SIMDE_DIAGNOSTIC_DISABLE_FLOAT_EQUAL_
+#endif
+
+/* This is because we use HEDLEY_STATIC_ASSERT for static assertions.
+ * If Hedley can't find an implementation it will preprocess to
+ * nothing, which means there will be a trailing semi-colon. */
+#if HEDLEY_HAS_WARNING("-Wextra-semi")
+  #define SIMDE_DIAGNOSTIC_DISABLE_EXTRA_SEMI_ _Pragma("clang diagnostic ignored \"-Wextra-semi\"")
+#elif HEDLEY_GCC_VERSION_CHECK(8,1,0) && defined(__cplusplus)
+  #define SIMDE_DIAGNOSTIC_DISABLE_EXTRA_SEMI_ _Pragma("GCC diagnostic ignored \"-Wextra-semi\"")
+#else
+  #define SIMDE_DIAGNOSTIC_DISABLE_EXTRA_SEMI_
+#endif
+
+/* We do use a few variadic macros, which technically aren't available
+ * until C99 and C++11, but every compiler I'm aware of has supported
+ * them for much longer.  That said, usage is isolated to the test
+ * suite and compilers known to support them. */
+#if HEDLEY_HAS_WARNING("-Wvariadic-macros") || HEDLEY_GCC_VERSION_CHECK(4,0,0)
+  #if HEDLEY_HAS_WARNING("-Wc++98-compat-pedantic")
+    #define SIMDE_DIAGNOSTIC_DISABLE_VARIADIC_MACROS_ \
+      _Pragma("clang diagnostic ignored \"-Wvariadic-macros\"") \
+      _Pragma("clang diagnostic ignored \"-Wc++98-compat-pedantic\"")
+  #else
+    #define SIMDE_DIAGNOSTIC_DISABLE_VARIADIC_MACROS_ _Pragma("GCC diagnostic ignored \"-Wvariadic-macros\"")
+  #endif
+#else
+  #define SIMDE_DIAGNOSTIC_DISABLE_VARIADIC_MACROS_
+#endif
+
+/* emscripten requires us to use a __wasm_unimplemented_simd128__ macro
+ * before we can access certain SIMD intrinsics, but this diagnostic
+ * warns about it being a reserved name.  It is a reserved name, but
+ * it's reserved for the compiler and we are using it to convey
+ * information to the compiler.
+ *
+ * This is also used when enabling native aliases since we don't get to
+ * choose the macro names. */
+#if HEDLEY_HAS_WARNING("-Wreserved-id-macro")
+  #define SIMDE_DIAGNOSTIC_DISABLE_RESERVED_ID_MACRO_ _Pragma("clang diagnostic ignored \"-Wreserved-id-macro\"")
+#else
+  #define SIMDE_DIAGNOSTIC_DISABLE_RESERVED_ID_MACRO_
+#endif
+
+/* Similar to above; types like simde__m128i are reserved due to the
+ * double underscore, but we didn't choose them, Intel did. */
+#if HEDLEY_HAS_WARNING("-Wreserved-identifier")
+  #define SIMDE_DIAGNOSTIC_DISABLE_RESERVED_ID_ _Pragma("clang diagnostic ignored \"-Wreserved-identifier\"")
+#else
+  #define SIMDE_DIAGNOSTIC_DISABLE_RESERVED_ID_
+#endif
+
+/* clang 3.8 warns about the packed attribute being unnecessary when
+ * used in the _mm_loadu_* functions.  That *may* be true for version
+ * 3.8, but for later versions it is crucial in order to make unaligned
+ * access safe. */
+#if HEDLEY_HAS_WARNING("-Wpacked")
+  #define SIMDE_DIAGNOSTIC_DISABLE_PACKED_ _Pragma("clang diagnostic ignored \"-Wpacked\"")
+#else
+  #define SIMDE_DIAGNOSTIC_DISABLE_PACKED_
+#endif
+
+/* Triggered when assigning a float to a double implicitly.  We use
+ * explicit casts in SIMDe, this is only used in the test suite. */
+#if HEDLEY_HAS_WARNING("-Wdouble-promotion")
+  #define SIMDE_DIAGNOSTIC_DISABLE_DOUBLE_PROMOTION_ _Pragma("clang diagnostic ignored \"-Wdouble-promotion\"")
+#else
+  #define SIMDE_DIAGNOSTIC_DISABLE_DOUBLE_PROMOTION_
+#endif
+
+/* Several compilers treat conformant array parameters as VLAs.  We
+ * test to make sure we're in C mode (C++ doesn't support CAPs), and
+ * that the version of the standard supports CAPs.  We also reject
+ * some buggy compilers like MSVC (the logic is in Hedley if you want
+ * to take a look), but with certain warnings enabled some compilers
+ * still like to emit a diagnostic. */
+#if HEDLEY_HAS_WARNING("-Wvla")
+  #define SIMDE_DIAGNOSTIC_DISABLE_VLA_ _Pragma("clang diagnostic ignored \"-Wvla\"")
+#elif HEDLEY_GCC_VERSION_CHECK(4,3,0)
+  #define SIMDE_DIAGNOSTIC_DISABLE_VLA_ _Pragma("GCC diagnostic ignored \"-Wvla\"")
+#else
+  #define SIMDE_DIAGNOSTIC_DISABLE_VLA_
+#endif
+
+/* If you add an unused attribute to a function and don't use it, clang
+ * may emit this. */
+#if HEDLEY_HAS_WARNING("-Wused-but-marked-unused")
+  #define SIMDE_DIAGNOSTIC_DISABLE_USED_BUT_MARKED_UNUSED_ _Pragma("clang diagnostic ignored \"-Wused-but-marked-unused\"")
+#else
+  #define SIMDE_DIAGNOSTIC_DISABLE_USED_BUT_MARKED_UNUSED_
+#endif
+
+#if HEDLEY_HAS_WARNING("-Wpass-failed")
+  #define SIMDE_DIAGNOSTIC_DISABLE_PASS_FAILED_ _Pragma("clang diagnostic ignored \"-Wpass-failed\"")
+#else
+  #define SIMDE_DIAGNOSTIC_DISABLE_PASS_FAILED_
+#endif
+
+#if HEDLEY_HAS_WARNING("-Wpadded")
+  #define SIMDE_DIAGNOSTIC_DISABLE_PADDED_ _Pragma("clang diagnostic ignored \"-Wpadded\"")
+#elif HEDLEY_MSVC_VERSION_CHECK(19,0,0) /* Likely goes back further */
+  #define SIMDE_DIAGNOSTIC_DISABLE_PADDED_ __pragma(warning(disable:4324))
+#else
+  #define SIMDE_DIAGNOSTIC_DISABLE_PADDED_
+#endif
+
+#if HEDLEY_HAS_WARNING("-Wzero-as-null-pointer-constant")
+  #define SIMDE_DIAGNOSTIC_DISABLE_ZERO_AS_NULL_POINTER_CONSTANT_ _Pragma("clang diagnostic ignored \"-Wzero-as-null-pointer-constant\"")
+#else
+  #define SIMDE_DIAGNOSTIC_DISABLE_ZERO_AS_NULL_POINTER_CONSTANT_
+#endif
+
+#if HEDLEY_HAS_WARNING("-Wold-style-cast")
+  #define SIMDE_DIAGNOSTIC_DISABLE_OLD_STYLE_CAST_ _Pragma("clang diagnostic ignored \"-Wold-style-cast\"")
+#else
+  #define SIMDE_DIAGNOSTIC_DISABLE_OLD_STYLE_CAST_
+#endif
+
+#if HEDLEY_HAS_WARNING("-Wcast-function-type") || HEDLEY_GCC_VERSION_CHECK(8,0,0)
+  #define SIMDE_DIAGNOSTIC_DISABLE_CAST_FUNCTION_TYPE_ _Pragma("GCC diagnostic ignored \"-Wcast-function-type\"")
+#else
+  #define SIMDE_DIAGNOSTIC_DISABLE_CAST_FUNCTION_TYPE_
+#endif
+
+/* clang will emit this warning when we use C99 extensions when not in
+ * C99 mode, even though it does support this.  In such cases we check
+ * the compiler and version first, so we know it's not a problem. */
+#if HEDLEY_HAS_WARNING("-Wc99-extensions")
+  #define SIMDE_DIAGNOSTIC_DISABLE_C99_EXTENSIONS_ _Pragma("clang diagnostic ignored \"-Wc99-extensions\"")
+#else
+  #define SIMDE_DIAGNOSTIC_DISABLE_C99_EXTENSIONS_
+#endif
+
+/* Similar problm as above; we rely on some basic C99 support, but clang
+ * has started warning obut this even in C17 mode with -Weverything. */
+#if HEDLEY_HAS_WARNING("-Wdeclaration-after-statement")
+  #define SIMDE_DIAGNOSTIC_DISABLE_DECLARATION_AFTER_STATEMENT_ _Pragma("clang diagnostic ignored \"-Wdeclaration-after-statement\"")
+#else
+  #define SIMDE_DIAGNOSTIC_DISABLE_DECLARATION_AFTER_STATEMENT_
+#endif
+
+/* https://github.com/simd-everywhere/simde/issues/277 */
+#if defined(HEDLEY_GCC_VERSION) && HEDLEY_GCC_VERSION_CHECK(4,6,0) && !HEDLEY_GCC_VERSION_CHECK(6,4,0) && defined(__cplusplus)
+  #define SIMDE_DIAGNOSTIC_DISABLE_BUGGY_UNUSED_BUT_SET_VARIBALE_ _Pragma("GCC diagnostic ignored \"-Wunused-but-set-variable\"")
+#else
+  #define SIMDE_DIAGNOSTIC_DISABLE_BUGGY_UNUSED_BUT_SET_VARIBALE_
+#endif
+
+/* This is the warning that you normally define _CRT_SECURE_NO_WARNINGS
+ * to silence, but you have to do that before including anything and
+ * that would require reordering includes. */
+#if defined(_MSC_VER)
+  #define SIMDE_DIAGNOSTIC_DISABLE_ANNEX_K_ __pragma(warning(disable:4996))
+#else
+  #define SIMDE_DIAGNOSTIC_DISABLE_ANNEX_K_
+#endif
+
+/* Some compilers, such as clang, may use `long long` for 64-bit
+ * integers, but `long long` triggers a diagnostic with
+ * -Wc++98-compat-pedantic which says 'long long' is incompatible with
+ * C++98. */
+#if HEDLEY_HAS_WARNING("-Wc++98-compat-pedantic")
+  #if HEDLEY_HAS_WARNING("-Wc++11-long-long")
+    #define SIMDE_DIAGNOSTIC_DISABLE_CPP98_COMPAT_PEDANTIC_ \
+      _Pragma("clang diagnostic ignored \"-Wc++98-compat-pedantic\"") \
+      _Pragma("clang diagnostic ignored \"-Wc++11-long-long\"")
+  #else
+    #define SIMDE_DIAGNOSTIC_DISABLE_CPP98_COMPAT_PEDANTIC_ _Pragma("clang diagnostic ignored \"-Wc++98-compat-pedantic\"")
+  #endif
+#else
+  #define SIMDE_DIAGNOSTIC_DISABLE_CPP98_COMPAT_PEDANTIC_
+#endif
+
+/* Some problem as above */
+#if HEDLEY_HAS_WARNING("-Wc++11-long-long")
+  #define SIMDE_DIAGNOSTIC_DISABLE_CPP11_LONG_LONG_ _Pragma("clang diagnostic ignored \"-Wc++11-long-long\"")
+#else
+  #define SIMDE_DIAGNOSTIC_DISABLE_CPP11_LONG_LONG_
+#endif
+
+/* emscripten emits this whenever stdin/stdout/stderr is used in a
+ * macro. */
+#if HEDLEY_HAS_WARNING("-Wdisabled-macro-expansion")
+  #define SIMDE_DIAGNOSTIC_DISABLE_DISABLED_MACRO_EXPANSION_ _Pragma("clang diagnostic ignored \"-Wdisabled-macro-expansion\"")
+#else
+  #define SIMDE_DIAGNOSTIC_DISABLE_DISABLED_MACRO_EXPANSION_
+#endif
+
+/* Clang uses C11 generic selections to implement some AltiVec
+ * functions, which triggers this diagnostic when not compiling
+ * in C11 mode */
+#if HEDLEY_HAS_WARNING("-Wc11-extensions")
+  #define SIMDE_DIAGNOSTIC_DISABLE_C11_EXTENSIONS_ _Pragma("clang diagnostic ignored \"-Wc11-extensions\"")
+#else
+  #define SIMDE_DIAGNOSTIC_DISABLE_C11_EXTENSIONS_
+#endif
+
+/* Clang sometimes triggers this warning in macros in the AltiVec and
+ * NEON headers, or due to missing functions. */
+#if HEDLEY_HAS_WARNING("-Wvector-conversion")
+  #define SIMDE_DIAGNOSTIC_DISABLE_VECTOR_CONVERSION_ _Pragma("clang diagnostic ignored \"-Wvector-conversion\"")
+  /* For NEON, the situation with -Wvector-conversion in clang < 10 is
+   * bad enough that we just disable the warning altogether.  On x86,
+   * clang has similar issues on several sse4.2+ intrinsics before 3.8. */
+  #if \
+      (defined(SIMDE_ARCH_ARM) && SIMDE_DETECT_CLANG_VERSION_NOT(10,0,0)) || \
+      SIMDE_DETECT_CLANG_VERSION_NOT(3,8,0)
+    #define SIMDE_DIAGNOSTIC_DISABLE_BUGGY_VECTOR_CONVERSION_ SIMDE_DIAGNOSTIC_DISABLE_VECTOR_CONVERSION_
+  #endif
+#else
+  #define SIMDE_DIAGNOSTIC_DISABLE_VECTOR_CONVERSION_
+#endif
+#if !defined(SIMDE_DIAGNOSTIC_DISABLE_BUGGY_VECTOR_CONVERSION_)
+  #define SIMDE_DIAGNOSTIC_DISABLE_BUGGY_VECTOR_CONVERSION_
+#endif
+
+/* Prior to 5.0, clang didn't support disabling diagnostics in
+ * statement exprs.  As a result, some macros we use don't
+ * properly silence warnings. */
+#if SIMDE_DETECT_CLANG_VERSION_NOT(5,0,0) && HEDLEY_HAS_WARNING("-Wcast-qual") && HEDLEY_HAS_WARNING("-Wcast-align")
+  #define SIMDE_DIAGNOSTIC_DISABLE_BUGGY_CASTS_ _Pragma("clang diagnostic ignored \"-Wcast-qual\"") _Pragma("clang diagnostic ignored \"-Wcast-align\"")
+#elif SIMDE_DETECT_CLANG_VERSION_NOT(5,0,0) && HEDLEY_HAS_WARNING("-Wcast-qual")
+  #define SIMDE_DIAGNOSTIC_DISABLE_BUGGY_CASTS_ _Pragma("clang diagnostic ignored \"-Wcast-qual\"")
+#elif SIMDE_DETECT_CLANG_VERSION_NOT(5,0,0) && HEDLEY_HAS_WARNING("-Wcast-align")
+  #define SIMDE_DIAGNOSTIC_DISABLE_BUGGY_CASTS_ _Pragma("clang diagnostic ignored \"-Wcast-align\"")
+#else
+  #define SIMDE_DIAGNOSTIC_DISABLE_BUGGY_CASTS_
+#endif
+
+/* SLEEF triggers this a *lot* in their headers */
+#if HEDLEY_HAS_WARNING("-Wignored-qualifiers")
+  #define SIMDE_DIAGNOSTIC_DISABLE_IGNORED_QUALIFIERS_ _Pragma("clang diagnostic ignored \"-Wignored-qualifiers\"")
+#elif HEDLEY_GCC_VERSION_CHECK(4,3,0)
+  #define SIMDE_DIAGNOSTIC_DISABLE_IGNORED_QUALIFIERS_ _Pragma("GCC diagnostic ignored \"-Wignored-qualifiers\"")
+#else
+  #define SIMDE_DIAGNOSTIC_DISABLE_IGNORED_QUALIFIERS_
+#endif
+
+/* GCC emits this under some circumstances when using __int128 */
+#if HEDLEY_GCC_VERSION_CHECK(4,8,0)
+  #define SIMDE_DIAGNOSTIC_DISABLE_PEDANTIC_ _Pragma("GCC diagnostic ignored \"-Wpedantic\"")
+#else
+  #define SIMDE_DIAGNOSTIC_DISABLE_PEDANTIC_
+#endif
+
+/* MSVC doesn't like (__assume(0), code) and will warn about code being
+ * unreachable, but we want it there because not all compilers
+ * understand the unreachable macro and will complain if it is missing.
+ * I'm planning on adding a new macro to Hedley to handle this a bit
+ * more elegantly, but until then... */
+#if defined(HEDLEY_MSVC_VERSION)
+  #define SIMDE_DIAGNOSTIC_DISABLE_UNREACHABLE_ __pragma(warning(disable:4702))
+#elif defined(__clang__)
+  #define SIMDE_DIAGNOSTIC_DISABLE_UNREACHABLE_ HEDLEY_PRAGMA(clang diagnostic ignored "-Wunreachable-code")
+#else
+  #define SIMDE_DIAGNOSTIC_DISABLE_UNREACHABLE_
+#endif
+
+/* This is a false positive from GCC in a few places. */
+#if HEDLEY_GCC_VERSION_CHECK(4,7,0)
+  #define SIMDE_DIAGNOSTIC_DISABLE_MAYBE_UNINITIAZILED_ _Pragma("GCC diagnostic ignored \"-Wmaybe-uninitialized\"")
+#else
+  #define SIMDE_DIAGNOSTIC_DISABLE_MAYBE_UNINITIAZILED_
+#endif
+
+#if defined(SIMDE_ENABLE_NATIVE_ALIASES)
+  #define SIMDE_DISABLE_UNWANTED_DIAGNOSTICS_NATIVE_ALIASES_ \
+    SIMDE_DIAGNOSTIC_DISABLE_RESERVED_ID_MACRO_
+#else
+  #define SIMDE_DISABLE_UNWANTED_DIAGNOSTICS_NATIVE_ALIASES_
+#endif
+
+/* Some native functions on E2K with instruction set < v6 are declared
+ * as deprecated due to inefficiency. Still they are more efficient
+ * than SIMDe implementation. So we're using them, and switching off
+ * these deprecation warnings. */
+#if defined(HEDLEY_MCST_LCC_VERSION)
+#  define SIMDE_LCC_DISABLE_DEPRECATED_WARNINGS _Pragma("diag_suppress 1215,1444")
+#  define SIMDE_LCC_REVERT_DEPRECATED_WARNINGS _Pragma("diag_default 1215,1444")
+#else
+#  define SIMDE_LCC_DISABLE_DEPRECATED_WARNINGS
+#  define SIMDE_LCC_REVERT_DEPRECATED_WARNINGS
+#endif
+
+#define SIMDE_DISABLE_UNWANTED_DIAGNOSTICS \
+  HEDLEY_DIAGNOSTIC_DISABLE_UNUSED_FUNCTION \
+  SIMDE_DISABLE_UNWANTED_DIAGNOSTICS_NATIVE_ALIASES_ \
+  SIMDE_DIAGNOSTIC_DISABLE_PSABI_ \
+  SIMDE_DIAGNOSTIC_DISABLE_NO_EMMS_INSTRUCTION_ \
+  SIMDE_DIAGNOSTIC_DISABLE_SIMD_PRAGMA_DEPRECATED_ \
+  SIMDE_DIAGNOSTIC_DISABLE_CONDITIONAL_UNINITIALIZED_ \
+  SIMDE_DIAGNOSTIC_DISABLE_DECLARATION_AFTER_STATEMENT_ \
+  SIMDE_DIAGNOSTIC_DISABLE_FLOAT_EQUAL_ \
+  SIMDE_DIAGNOSTIC_DISABLE_NON_CONSTANT_AGGREGATE_INITIALIZER_ \
+  SIMDE_DIAGNOSTIC_DISABLE_EXTRA_SEMI_ \
+  SIMDE_DIAGNOSTIC_DISABLE_VLA_ \
+  SIMDE_DIAGNOSTIC_DISABLE_USED_BUT_MARKED_UNUSED_ \
+  SIMDE_DIAGNOSTIC_DISABLE_PASS_FAILED_ \
+  SIMDE_DIAGNOSTIC_DISABLE_CPP98_COMPAT_PEDANTIC_ \
+  SIMDE_DIAGNOSTIC_DISABLE_CPP11_LONG_LONG_ \
+  SIMDE_DIAGNOSTIC_DISABLE_BUGGY_UNUSED_BUT_SET_VARIBALE_ \
+  SIMDE_DIAGNOSTIC_DISABLE_BUGGY_CASTS_ \
+  SIMDE_DIAGNOSTIC_DISABLE_BUGGY_VECTOR_CONVERSION_ \
+  SIMDE_DIAGNOSTIC_DISABLE_RESERVED_ID_
+
+#endif /* !defined(SIMDE_DIAGNOSTIC_H) */
diff --git a/external_libs/pgenlib/simde/simde-f16.h b/external_libs/pgenlib/simde/simde-f16.h
new file mode 100644
index 0000000..77a220a
--- /dev/null
+++ b/external_libs/pgenlib/simde/simde-f16.h
@@ -0,0 +1,321 @@
+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2021      Evan Nemerson <evan@nemerson.com>
+ *   2023      Ju-Hung Li <jhlee@pllab.cs.nthu.edu.tw> (Copyright owned by NTHU pllab)
+ */
+
+#include "hedley.h"
+#include "simde-common.h"
+#include "simde-detect-clang.h"
+
+#if !defined(SIMDE_FLOAT16_H)
+#define SIMDE_FLOAT16_H
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+/* Portable version which should work on pretty much any compiler.
+ * Obviously you can't rely on compiler support for things like
+ * conversion to/from 32-bit floats, so make sure you always use the
+ * functions and macros in this file!
+ *
+ * The portable implementations are (heavily) based on CC0 code by
+ * Fabian Giesen: <https://gist.github.com/rygorous/2156668> (see also
+ * <https://fgiesen.wordpress.com/2012/03/28/half-to-float-done-quic/>).
+ * I have basically just modified it to get rid of some UB (lots of
+ * aliasing, right shifting a negative value), use fixed-width types,
+ * and work in C. */
+#define SIMDE_FLOAT16_API_PORTABLE 1
+/* _Float16, per C standard (TS 18661-3;
+ * <http://www.open-std.org/jtc1/sc22/wg14/www/docs/n1945.pdf>). */
+#define SIMDE_FLOAT16_API_FLOAT16 2
+/* clang >= 6.0 supports __fp16 as an interchange format on all
+ * targets, but only allows you to use them for arguments and return
+ * values on targets which have defined an ABI.  We get around the
+ * restriction by wrapping the __fp16 in a struct, but we can't do
+ * that on Arm since it would break compatibility with the NEON F16
+ * functions. */
+#define SIMDE_FLOAT16_API_FP16_NO_ABI 3
+/* This is basically __fp16 as specified by Arm, where arguments and
+ * return values are raw __fp16 values not structs. */
+#define SIMDE_FLOAT16_API_FP16 4
+
+/* Choosing an implementation.  This is a bit rough, but I don't have
+ * any ideas on how to improve it.  If you do, patches are definitely
+ * welcome. */
+#if !defined(SIMDE_FLOAT16_API)
+  #if defined(__ARM_FP16_FORMAT_IEEE) && (defined(SIMDE_ARM_NEON_FP16) || defined(__ARM_FP16_ARGS))
+    #define SIMDE_FLOAT16_API SIMDE_FLOAT16_API_FP16
+  #elif !defined(__EMSCRIPTEN__) && !(defined(__clang__) && defined(SIMDE_ARCH_POWER)) && \
+    !(defined(HEDLEY_MSVC_VERSION) && defined(__clang__)) && \
+    !(defined(SIMDE_ARCH_MIPS) && defined(__clang__)) && \
+    !(defined(__clang__) && defined(SIMDE_ARCH_RISCV64)) && ( \
+      defined(SIMDE_X86_AVX512FP16_NATIVE) || \
+      (defined(SIMDE_ARCH_X86_SSE2) && HEDLEY_GCC_VERSION_CHECK(12,0,0)) || \
+      (defined(SIMDE_ARCH_AARCH64) && HEDLEY_GCC_VERSION_CHECK(7,0,0) && !defined(__cplusplus)) || \
+      ((defined(SIMDE_ARCH_X86) || defined(SIMDE_ARCH_AMD64)) && SIMDE_DETECT_CLANG_VERSION_CHECK(15,0,0)) || \
+      (!(defined(SIMDE_ARCH_X86) || defined(SIMDE_ARCH_AMD64)) && SIMDE_DETECT_CLANG_VERSION_CHECK(6,0,0))) || \
+      defined(SIMDE_ARCH_RISCV_ZVFH)
+    /* We haven't found a better way to detect this.  It seems like defining
+    * __STDC_WANT_IEC_60559_TYPES_EXT__, then including float.h, then
+    * checking for defined(FLT16_MAX) should work, but both gcc and
+    * clang will define the constants even if _Float16 is not
+    * supported.  Ideas welcome. */
+    #define SIMDE_FLOAT16_API SIMDE_FLOAT16_API_FLOAT16
+  #elif defined(__FLT16_MIN__) && \
+      (defined(__clang__) && \
+      (!defined(SIMDE_ARCH_AARCH64) || SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0)) \
+      && !defined(SIMDE_ARCH_RISCV64))
+    #define SIMDE_FLOAT16_API SIMDE_FLOAT16_API_FP16_NO_ABI
+  #else
+    #define SIMDE_FLOAT16_API SIMDE_FLOAT16_API_PORTABLE
+  #endif
+#endif
+
+#if SIMDE_FLOAT16_API == SIMDE_FLOAT16_API_FLOAT16
+  typedef _Float16 simde_float16;
+  #define SIMDE_FLOAT16_IS_SCALAR 1
+  #if !defined(__cplusplus)
+    #define SIMDE_FLOAT16_C(value) value##f16
+  #else
+    #define SIMDE_FLOAT16_C(value) HEDLEY_STATIC_CAST(_Float16, (value))
+  #endif
+#elif SIMDE_FLOAT16_API == SIMDE_FLOAT16_API_FP16_NO_ABI
+  typedef struct { __fp16 value; } simde_float16;
+  #if defined(SIMDE_STATEMENT_EXPR_) && !defined(SIMDE_TESTS_H)
+    #define SIMDE_FLOAT16_C(value) (__extension__({ ((simde_float16) { HEDLEY_DIAGNOSTIC_PUSH SIMDE_DIAGNOSTIC_DISABLE_C99_EXTENSIONS_ HEDLEY_STATIC_CAST(__fp16, (value)) }); HEDLEY_DIAGNOSTIC_POP }))
+  #else
+    #define SIMDE_FLOAT16_C(value) ((simde_float16) { HEDLEY_STATIC_CAST(__fp16, (value)) })
+    #define SIMDE_FLOAT16_IS_SCALAR 1
+  #endif
+#elif SIMDE_FLOAT16_API == SIMDE_FLOAT16_API_FP16
+  typedef __fp16 simde_float16;
+  #define SIMDE_FLOAT16_IS_SCALAR 1
+  #define SIMDE_FLOAT16_C(value) HEDLEY_STATIC_CAST(__fp16, (value))
+#elif SIMDE_FLOAT16_API == SIMDE_FLOAT16_API_PORTABLE
+  typedef struct { uint16_t value; } simde_float16;
+#else
+  #error No 16-bit floating point API.
+#endif
+
+#if \
+    defined(SIMDE_VECTOR_OPS) && \
+    (SIMDE_FLOAT16_API != SIMDE_FLOAT16_API_PORTABLE) && \
+    (SIMDE_FLOAT16_API != SIMDE_FLOAT16_API_FP16_NO_ABI)
+  #define SIMDE_FLOAT16_VECTOR
+#endif
+
+/* Reinterpret -- you *generally* shouldn't need these, they're really
+ * intended for internal use.  However, on x86 half-precision floats
+ * get stuffed into a __m128i/__m256i, so it may be useful. */
+
+SIMDE_DEFINE_CONVERSION_FUNCTION_(simde_float16_as_uint16,      uint16_t, simde_float16)
+SIMDE_DEFINE_CONVERSION_FUNCTION_(simde_uint16_as_float16, simde_float16,      uint16_t)
+
+#if SIMDE_FLOAT16_API == SIMDE_FLOAT16_API_PORTABLE
+  #define SIMDE_NANHF simde_uint16_as_float16(0x7E00) // a quiet Not-a-Number
+  #define SIMDE_INFINITYHF simde_uint16_as_float16(0x7C00)
+  #define SIMDE_NINFINITYHF simde_uint16_as_float16(0xFC00)
+#else
+  #if SIMDE_FLOAT16_API == SIMDE_FLOAT16_API_FP16_NO_ABI
+    #if SIMDE_MATH_BUILTIN_LIBM(nanf16)
+      #define SIMDE_NANHF SIMDE_FLOAT16_C(__builtin_nanf16(""))
+    #elif defined(SIMDE_MATH_NAN)
+      #define SIMDE_NANHF SIMDE_FLOAT16_C(SIMDE_MATH_NAN)
+    #endif
+    #if SIMDE_MATH_BUILTIN_LIBM(inf16)
+      #define SIMDE_INFINITYHF SIMDE_FLOAT16_C(__builtin_inf16())
+      #define SIMDE_NINFINITYHF SIMDE_FLOAT16_C(-__builtin_inf16())
+    #else
+      #define SIMDE_INFINITYHF SIMDE_FLOAT16_C(SIMDE_MATH_INFINITY)
+      #define SIMDE_NINFINITYHF SIMDE_FLOAT16_C(-SIMDE_MATH_INFINITY)
+    #endif
+  #else
+    #if SIMDE_MATH_BUILTIN_LIBM(nanf16)
+      #define SIMDE_NANHF  __builtin_nanf16("")
+    #elif defined(SIMDE_MATH_NAN)
+      #define SIMDE_NANHF SIMDE_MATH_NAN
+    #endif
+    #if SIMDE_MATH_BUILTIN_LIBM(inf16)
+      #define SIMDE_INFINITYHF __builtin_inf16()
+      #define SIMDE_NINFINITYHF -(__builtin_inf16())
+    #else
+      #define SIMDE_INFINITYHF HEDLEY_STATIC_CAST(simde_float16, SIMDE_MATH_INFINITY)
+      #define SIMDE_NINFINITYHF HEDLEY_STATIC_CAST(simde_float16, -SIMDE_MATH_INFINITY)
+    #endif
+  #endif
+#endif
+
+/* Conversion -- convert between single-precision and half-precision
+ * floats. */
+static HEDLEY_ALWAYS_INLINE HEDLEY_CONST
+simde_float16
+simde_float16_from_float32 (simde_float32 value) {
+  simde_float16 res;
+
+  #if \
+      (SIMDE_FLOAT16_API == SIMDE_FLOAT16_API_FLOAT16) || \
+      (SIMDE_FLOAT16_API == SIMDE_FLOAT16_API_FP16)
+    res = HEDLEY_STATIC_CAST(simde_float16, value);
+  #elif (SIMDE_FLOAT16_API == SIMDE_FLOAT16_API_FP16_NO_ABI)
+    res.value = HEDLEY_STATIC_CAST(__fp16, value);
+  #else
+    /* This code is CC0, based heavily on code by Fabian Giesen. */
+    uint32_t f32u = simde_float32_as_uint32(value);
+    static const uint32_t f32u_infty = UINT32_C(255) << 23;
+    static const uint32_t f16u_max = (UINT32_C(127) + UINT32_C(16)) << 23;
+    static const uint32_t denorm_magic =
+      ((UINT32_C(127) - UINT32_C(15)) + (UINT32_C(23) - UINT32_C(10)) + UINT32_C(1)) << 23;
+    uint16_t f16u;
+
+    uint32_t sign = f32u & (UINT32_C(1) << 31);
+    f32u ^= sign;
+
+   /* NOTE all the integer compares in this function cast the operands
+    * to signed values to help compilers vectorize to SSE2, which lacks
+    * unsigned comparison instructions.  This is fine since all
+    * operands are below 0x80000000 (we clear the sign bit). */
+
+    if (f32u > f16u_max) { /* result is Inf or NaN (all exponent bits set) */
+      f16u = (f32u > f32u_infty) ?  UINT32_C(0x7e00) : UINT32_C(0x7c00); /* NaN->qNaN and Inf->Inf */
+    } else { /* (De)normalized number or zero */
+      if (f32u < (UINT32_C(113) << 23)) { /* resulting FP16 is subnormal or zero */
+        /* use a magic value to align our 10 mantissa bits at the bottom of
+        * the float. as long as FP addition is round-to-nearest-even this
+        * just works. */
+        f32u = simde_float32_as_uint32(simde_uint32_as_float32(f32u) + simde_uint32_as_float32(denorm_magic));
+
+        /* and one integer subtract of the bias later, we have our final float! */
+        f16u = HEDLEY_STATIC_CAST(uint16_t, f32u - denorm_magic);
+      } else {
+        uint32_t mant_odd = (f32u >> 13) & 1;
+
+        /* update exponent, rounding bias part 1 */
+        f32u += (HEDLEY_STATIC_CAST(uint32_t, 15 - 127) << 23) + UINT32_C(0xfff);
+        /* rounding bias part 2 */
+        f32u += mant_odd;
+        /* take the bits! */
+        f16u = HEDLEY_STATIC_CAST(uint16_t, f32u >> 13);
+      }
+    }
+
+    f16u |= sign >> 16;
+    res = simde_uint16_as_float16(f16u);
+  #endif
+
+  return res;
+}
+
+static HEDLEY_ALWAYS_INLINE HEDLEY_CONST
+simde_float32
+simde_float16_to_float32 (simde_float16 value) {
+  simde_float32 res;
+
+  #if defined(SIMDE_FLOAT16_FLOAT16) || defined(SIMDE_FLOAT16_FP16)
+    res = HEDLEY_STATIC_CAST(simde_float32, value);
+  #else
+    /* This code is CC0, based heavily on code by Fabian Giesen. */
+    uint16_t half = simde_float16_as_uint16(value);
+    const simde_float32 denorm_magic = simde_uint32_as_float32((UINT32_C(113) << 23));
+    const uint32_t shifted_exp = UINT32_C(0x7c00) << 13; /* exponent mask after shift */
+    uint32_t f32u;
+
+    f32u = (half & UINT32_C(0x7fff)) << 13; /* exponent/mantissa bits */
+    uint32_t exp = shifted_exp & f32u; /* just the exponent */
+    f32u += (UINT32_C(127) - UINT32_C(15)) << 23; /* exponent adjust */
+
+    /* handle exponent special cases */
+    if (exp == shifted_exp) /* Inf/NaN? */
+      f32u += (UINT32_C(128) - UINT32_C(16)) << 23; /* extra exp adjust */
+    else if (exp == 0) { /* Zero/Denormal? */
+      f32u += (1) << 23; /* extra exp adjust */
+      f32u = simde_float32_as_uint32(simde_uint32_as_float32(f32u) - denorm_magic); /* renormalize */
+    }
+
+    f32u |= (half & UINT32_C(0x8000)) << 16; /* sign bit */
+    res = simde_uint32_as_float32(f32u);
+  #endif
+
+  return res;
+}
+
+#ifdef SIMDE_FLOAT16_C
+  #define SIMDE_FLOAT16_VALUE(value) SIMDE_FLOAT16_C(value)
+#else
+  #define SIMDE_FLOAT16_VALUE(value) simde_float16_from_float32(SIMDE_FLOAT32_C(value))
+#endif
+
+#if !defined(simde_isinfhf) && defined(simde_math_isinff)
+  #define simde_isinfhf(a) simde_math_isinff(simde_float16_to_float32(a))
+#endif
+#if !defined(simde_isnanhf) && defined(simde_math_isnanf)
+  #define simde_isnanhf(a) simde_math_isnanf(simde_float16_to_float32(a))
+#endif
+#if !defined(simde_isnormalhf) && defined(simde_math_isnormalf)
+  #define simde_isnormalhf(a) simde_math_isnormalf(simde_float16_to_float32(a))
+#endif
+#if !defined(simde_issubnormalhf) && defined(simde_math_issubnormalf)
+  #define simde_issubnormalhf(a) simde_math_issubnormalf(simde_float16_to_float32(a))
+#endif
+
+#define simde_fpclassifyhf(a) simde_math_fpclassifyf(simde_float16_to_float32(a))
+
+static HEDLEY_INLINE
+uint8_t
+simde_fpclasshf(simde_float16 v, const int imm8) {
+  uint16_t bits = simde_float16_as_uint16(v);
+  uint8_t negative = (bits >> 15) & 1;
+  uint16_t const ExpMask = 0x7C00; // [14:10]
+  uint16_t const MantMask = 0x03FF; // [9:0]
+  uint8_t exponent_all_ones = ((bits & ExpMask) == ExpMask);
+  uint8_t exponent_all_zeros = ((bits & ExpMask) == 0);
+  uint8_t mantissa_all_zeros = ((bits & MantMask) == 0);
+  uint8_t zero = exponent_all_zeros & mantissa_all_zeros;
+  uint8_t signaling_bit = (bits >> 9) & 1;
+
+  uint8_t result = 0;
+  uint8_t snan = exponent_all_ones & (!mantissa_all_zeros) & (!signaling_bit);
+  uint8_t qnan = exponent_all_ones & (!mantissa_all_zeros) & signaling_bit;
+  uint8_t positive_zero = (!negative) & zero;
+  uint8_t negative_zero = negative & zero;
+  uint8_t positive_infinity = (!negative) & exponent_all_ones & mantissa_all_zeros;
+  uint8_t negative_infinity = negative & exponent_all_ones & mantissa_all_zeros;
+  uint8_t denormal = exponent_all_zeros & (!mantissa_all_zeros);
+  uint8_t finite_negative = negative & (!exponent_all_ones) & (!zero);
+  result = (((imm8 >> 0) & qnan)              | \
+            ((imm8 >> 1) & positive_zero)     | \
+            ((imm8 >> 2) & negative_zero)     | \
+            ((imm8 >> 3) & positive_infinity) | \
+            ((imm8 >> 4) & negative_infinity) | \
+            ((imm8 >> 5) & denormal)          | \
+            ((imm8 >> 6) & finite_negative)   | \
+            ((imm8 >> 7) & snan));
+  return result;
+}
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_FLOAT16_H) */
diff --git a/external_libs/pgenlib/simde/simde-features.h b/external_libs/pgenlib/simde/simde-features.h
new file mode 100644
index 0000000..7b622ea
--- /dev/null
+++ b/external_libs/pgenlib/simde/simde-features.h
@@ -0,0 +1,769 @@
+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2020      Evan Nemerson <evan@nemerson.com>
+ *   2023      Ju-Hung Li <jhlee@pllab.cs.nthu.edu.tw> (Copyright owned by NTHU pllab)
+ */
+
+/* simde-arch.h is used to determine which features are available according
+   to the compiler.  However, we want to make it possible to forcibly enable
+   or disable APIs */
+
+#if !defined(SIMDE_FEATURES_H)
+#define SIMDE_FEATURES_H
+
+#include "simde-arch.h"
+#include "simde-diagnostic.h"
+
+#if !defined(SIMDE_X86_SVML_NATIVE) && !defined(SIMDE_X86_SVML_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_X86_SVML)
+    #define SIMDE_X86_SVML_NATIVE
+  #endif
+#endif
+
+#if !defined(SIMDE_X86_AVX512VP2INTERSECT_NATIVE) && !defined(SIMDE_X86_AVX512VP2INTERSECT_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_X86_AVX512VP2INTERSECT)
+    #define SIMDE_X86_AVX512VP2INTERSECT_NATIVE
+  #endif
+#endif
+#if defined(SIMDE_X86_AVX512VP2INTERSECT_NATIVE) && !defined(SIMDE_X86_AVX512F_NATIVE)
+  #define SIMDE_X86_AVX512F_NATIVE
+#endif
+
+#if !defined(SIMDE_X86_AVX512VPOPCNTDQ_NATIVE) && !defined(SIMDE_X86_AVX512VPOPCNTDQ_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_X86_AVX512VPOPCNTDQ)
+    #define SIMDE_X86_AVX512VPOPCNTDQ_NATIVE
+  #endif
+#endif
+#if defined(SIMDE_X86_AVX512VPOPCNTDQ_NATIVE) && !defined(SIMDE_X86_AVX512F_NATIVE)
+  #define SIMDE_X86_AVX512F_NATIVE
+#endif
+
+#if !defined(SIMDE_X86_AVX512BITALG_NATIVE) && !defined(SIMDE_X86_AVX512BITALG_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_X86_AVX512BITALG)
+    #define SIMDE_X86_AVX512BITALG_NATIVE
+  #endif
+#endif
+#if defined(SIMDE_X86_AVX512BITALG_NATIVE) && !defined(SIMDE_X86_AVX512F_NATIVE)
+  #define SIMDE_X86_AVX512F_NATIVE
+#endif
+
+#if !defined(SIMDE_X86_AVX512VBMI_NATIVE) && !defined(SIMDE_X86_AVX512VBMI_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_X86_AVX512VBMI)
+    #define SIMDE_X86_AVX512VBMI_NATIVE
+  #endif
+#endif
+#if defined(SIMDE_X86_AVX512VBMI_NATIVE) && !defined(SIMDE_X86_AVX512F_NATIVE)
+  #define SIMDE_X86_AVX512F_NATIVE
+#endif
+
+#if !defined(SIMDE_X86_AVX512VBMI2_NATIVE) && !defined(SIMDE_X86_AVX512VBMI2_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_X86_AVX512VBMI2)
+    #define SIMDE_X86_AVX512VBMI2_NATIVE
+  #endif
+#endif
+#if defined(SIMDE_X86_AVX512VBMI2_NATIVE) && !defined(SIMDE_X86_AVX512F_NATIVE)
+  #define SIMDE_X86_AVX512F_NATIVE
+#endif
+
+#if !defined(SIMDE_X86_AVX512VNNI_NATIVE) && !defined(SIMDE_X86_AVX512VNNI_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_X86_AVX512VNNI)
+    #define SIMDE_X86_AVX512VNNI_NATIVE
+  #endif
+#endif
+#if defined(SIMDE_X86_AVX512VNNI_NATIVE) && !defined(SIMDE_X86_AVX512F_NATIVE)
+  #define SIMDE_X86_AVX512F_NATIVE
+#endif
+
+#if !defined(SIMDE_X86_AVX5124VNNIW_NATIVE) && !defined(SIMDE_X86_AVX5124VNNIW_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_X86_AVX5124VNNIW)
+    #define SIMDE_X86_AVX5124VNNIW_NATIVE
+  #endif
+#endif
+#if defined(SIMDE_X86_AVX5124VNNIW_NATIVE) && !defined(SIMDE_X86_AVX512F_NATIVE)
+  #define SIMDE_X86_AVX512F_NATIVE
+#endif
+
+#if !defined(SIMDE_X86_AVX512CD_NATIVE) && !defined(SIMDE_X86_AVX512CD_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_X86_AVX512CD)
+    #define SIMDE_X86_AVX512CD_NATIVE
+  #endif
+#endif
+#if defined(SIMDE_X86_AVX512CD_NATIVE) && !defined(SIMDE_X86_AVX512F_NATIVE)
+  #define SIMDE_X86_AVX512F_NATIVE
+#endif
+
+#if !defined(SIMDE_X86_AVX512DQ_NATIVE) && !defined(SIMDE_X86_AVX512DQ_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_X86_AVX512DQ)
+    #define SIMDE_X86_AVX512DQ_NATIVE
+  #endif
+#endif
+#if defined(SIMDE_X86_AVX512DQ_NATIVE) && !defined(SIMDE_X86_AVX512F_NATIVE)
+  #define SIMDE_X86_AVX512F_NATIVE
+#endif
+
+#if !defined(SIMDE_X86_AVX512VL_NATIVE) && !defined(SIMDE_X86_AVX512VL_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_X86_AVX512VL)
+    #define SIMDE_X86_AVX512VL_NATIVE
+  #endif
+#endif
+#if defined(SIMDE_X86_AVX512VL_NATIVE) && !defined(SIMDE_X86_AVX512F_NATIVE)
+  #define SIMDE_X86_AVX512F_NATIVE
+#endif
+
+#if !defined(SIMDE_X86_AVX512BW_NATIVE) && !defined(SIMDE_X86_AVX512BW_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_X86_AVX512BW)
+    #define SIMDE_X86_AVX512BW_NATIVE
+  #endif
+#endif
+#if defined(SIMDE_X86_AVX512BW_NATIVE) && !defined(SIMDE_X86_AVX512F_NATIVE)
+  #define SIMDE_X86_AVX512F_NATIVE
+#endif
+
+#if !defined(SIMDE_X86_AVX512FP16_NATIVE) && !defined(SIMDE_X86_AVX512FP16_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_X86_AVX512FP16)
+    #define SIMDE_X86_AVX512FP16_NATIVE
+  #endif
+#endif
+#if defined(SIMDE_X86_AVX512BW_NATIVE) && !defined(SIMDE_X86_AVX512F_NATIVE)
+  #define SIMDE_X86_AVX512F_NATIVE
+#endif
+
+#if !defined(SIMDE_X86_AVX512BF16_NATIVE) && !defined(SIMDE_X86_AVX512BF16_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_X86_AVX512BF16)
+    #define SIMDE_X86_AVX512BF16_NATIVE
+  #endif
+#endif
+#if defined(SIMDE_X86_AVX512BF16_NATIVE) && !defined(SIMDE_X86_AVX512F_NATIVE)
+  #define SIMDE_X86_AVX512F_NATIVE
+#endif
+
+#if !defined(SIMDE_X86_AVX512F_NATIVE) && !defined(SIMDE_X86_AVX512F_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_X86_AVX512F)
+    #define SIMDE_X86_AVX512F_NATIVE
+  #endif
+#endif
+#if defined(SIMDE_X86_AVX512F_NATIVE) && !defined(SIMDE_X86_AVX2_NATIVE)
+  #define SIMDE_X86_AVX2_NATIVE
+#endif
+
+#if !defined(SIMDE_X86_FMA_NATIVE) && !defined(SIMDE_X86_FMA_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_X86_FMA)
+    #define SIMDE_X86_FMA_NATIVE
+  #endif
+#endif
+#if defined(SIMDE_X86_FMA_NATIVE) && !defined(SIMDE_X86_AVX_NATIVE)
+  #define SIMDE_X86_AVX_NATIVE
+#endif
+
+#if !defined(SIMDE_X86_AVX2_NATIVE) && !defined(SIMDE_X86_AVX2_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_X86_AVX2)
+    #define SIMDE_X86_AVX2_NATIVE
+  #endif
+#endif
+#if defined(SIMDE_X86_AVX2_NATIVE) && !defined(SIMDE_X86_AVX_NATIVE)
+  #define SIMDE_X86_AVX_NATIVE
+#endif
+
+#if !defined(SIMDE_X86_AVX_NATIVE) && !defined(SIMDE_X86_AVX_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_X86_AVX)
+    #define SIMDE_X86_AVX_NATIVE
+  #endif
+#endif
+#if defined(SIMDE_X86_AVX_NATIVE) && !defined(SIMDE_X86_SSE4_2_NATIVE)
+  #define SIMDE_X86_SSE4_2_NATIVE
+#endif
+
+#if !defined(SIMDE_X86_XOP_NATIVE) && !defined(SIMDE_X86_XOP_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_X86_XOP)
+    #define SIMDE_X86_XOP_NATIVE
+  #endif
+#endif
+#if defined(SIMDE_X86_XOP_NATIVE) && !defined(SIMDE_X86_SSE4_2_NATIVE)
+  #define SIMDE_X86_SSE4_2_NATIVE
+#endif
+
+#if !defined(SIMDE_X86_SSE4_2_NATIVE) && !defined(SIMDE_X86_SSE4_2_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_X86_SSE4_2)
+    #define SIMDE_X86_SSE4_2_NATIVE
+  #endif
+#endif
+#if defined(SIMDE_X86_SSE4_2_NATIVE) && !defined(SIMDE_X86_SSE4_1_NATIVE)
+  #define SIMDE_X86_SSE4_1_NATIVE
+#endif
+
+#if !defined(SIMDE_X86_SSE4_1_NATIVE) && !defined(SIMDE_X86_SSE4_1_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_X86_SSE4_1)
+    #define SIMDE_X86_SSE4_1_NATIVE
+  #endif
+#endif
+#if defined(SIMDE_X86_SSE4_1_NATIVE) && !defined(SIMDE_X86_SSSE3_NATIVE)
+  #define SIMDE_X86_SSSE3_NATIVE
+#endif
+
+#if !defined(SIMDE_X86_SSSE3_NATIVE) && !defined(SIMDE_X86_SSSE3_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_X86_SSSE3)
+    #define SIMDE_X86_SSSE3_NATIVE
+  #endif
+#endif
+#if defined(SIMDE_X86_SSSE3_NATIVE) && !defined(SIMDE_X86_SSE3_NATIVE)
+  #define SIMDE_X86_SSE3_NATIVE
+#endif
+
+#if !defined(SIMDE_X86_SSE3_NATIVE) && !defined(SIMDE_X86_SSE3_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_X86_SSE3)
+    #define SIMDE_X86_SSE3_NATIVE
+  #endif
+#endif
+#if defined(SIMDE_X86_SSE3_NATIVE) && !defined(SIMDE_X86_SSE2_NATIVE)
+  #define SIMDE_X86_SSE2_NATIVE
+#endif
+
+#if !defined(SIMDE_X86_AES_NATIVE) && !defined(SIMDE_X86_AES_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_X86_AES)
+    #define SIMDE_X86_AES_NATIVE
+  #endif
+#endif
+#if defined(SIMDE_X86_AES_NATIVE) && !defined(SIMDE_X86_SSE2_NATIVE)
+  #define SIMDE_X86_SSE2_NATIVE
+#endif
+
+#if !defined(SIMDE_X86_SSE2_NATIVE) && !defined(SIMDE_X86_SSE2_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_X86_SSE2)
+    #define SIMDE_X86_SSE2_NATIVE
+  #endif
+#endif
+#if defined(SIMDE_X86_SSE2_NATIVE) && !defined(SIMDE_X86_SSE_NATIVE)
+  #define SIMDE_X86_SSE_NATIVE
+#endif
+
+#if !defined(SIMDE_X86_SSE_NATIVE) && !defined(SIMDE_X86_SSE_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_X86_SSE)
+    #define SIMDE_X86_SSE_NATIVE
+  #endif
+#endif
+
+#if !defined(SIMDE_X86_MMX_NATIVE) && !defined(SIMDE_X86_MMX_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_X86_MMX)
+    #define SIMDE_X86_MMX_NATIVE
+  #endif
+#endif
+
+#if !defined(SIMDE_X86_GFNI_NATIVE) && !defined(SIMDE_X86_GFNI_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_X86_GFNI)
+    #define SIMDE_X86_GFNI_NATIVE
+  #endif
+#endif
+
+#if !defined(SIMDE_X86_PCLMUL_NATIVE) && !defined(SIMDE_X86_PCLMUL_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_X86_PCLMUL)
+    #define SIMDE_X86_PCLMUL_NATIVE
+  #endif
+#endif
+
+#if !defined(SIMDE_X86_VPCLMULQDQ_NATIVE) && !defined(SIMDE_X86_VPCLMULQDQ_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_X86_VPCLMULQDQ)
+    #define SIMDE_X86_VPCLMULQDQ_NATIVE
+  #endif
+#endif
+
+#if !defined(SIMDE_X86_F16C_NATIVE) && !defined(SIMDE_X86_F16C_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_X86_F16C)
+    #define SIMDE_X86_F16C_NATIVE
+  #endif
+#endif
+
+#if !defined(SIMDE_X86_SVML_NATIVE) && !defined(SIMDE_X86_SVML_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_X86) && (defined(__INTEL_COMPILER) || (HEDLEY_MSVC_VERSION_CHECK(14, 20, 0) && !defined(__clang__)))
+    #define SIMDE_X86_SVML_NATIVE
+  #endif
+#endif
+
+#if defined(HEDLEY_MSVC_VERSION)
+  #pragma warning(push)
+  #pragma warning(disable:4799)
+#endif
+
+#if \
+    defined(SIMDE_X86_AVX_NATIVE) || defined(SIMDE_X86_GFNI_NATIVE) || defined(SIMDE_X86_SVML_NATIVE)
+  #include <immintrin.h>
+#elif defined(SIMDE_X86_SSE4_2_NATIVE)
+  #include <nmmintrin.h>
+#elif defined(SIMDE_X86_SSE4_1_NATIVE)
+  #include <smmintrin.h>
+#elif defined(SIMDE_X86_SSSE3_NATIVE)
+  #include <tmmintrin.h>
+#elif defined(SIMDE_X86_SSE3_NATIVE)
+  #include <pmmintrin.h>
+#elif defined(SIMDE_X86_SSE2_NATIVE)
+  #include <emmintrin.h>
+#elif defined(SIMDE_X86_SSE_NATIVE)
+  #include <xmmintrin.h>
+#elif defined(SIMDE_X86_MMX_NATIVE)
+  #include <mmintrin.h>
+#endif
+
+#if defined(SIMDE_X86_XOP_NATIVE)
+  #if defined(_MSC_VER)
+    #include <intrin.h>
+  #else
+    #include <x86intrin.h>
+  #endif
+#endif
+
+#if defined(SIMDE_X86_AES_NATIVE)
+  #include <wmmintrin.h>
+#endif
+
+#if defined(HEDLEY_MSVC_VERSION)
+  #pragma warning(pop)
+#endif
+
+#if !defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_ARM_NEON_A64V8_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_ARM_NEON) && defined(SIMDE_ARCH_AARCH64) && SIMDE_ARCH_ARM_CHECK(8,0)
+    #define SIMDE_ARM_NEON_A64V8_NATIVE
+  #endif
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+  #define SIMDE_ARM_NEON_A32V8_NATIVE
+#endif
+
+#if !defined(SIMDE_ARM_NEON_A32V8_NATIVE) && !defined(SIMDE_ARM_NEON_A32V8_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_ARM_NEON) && SIMDE_ARCH_ARM_CHECK(8,0) && (__ARM_NEON_FP & 0x02)
+    #define SIMDE_ARM_NEON_A32V8_NATIVE
+  #endif
+#endif
+#if defined(__ARM_ACLE)
+  #include <arm_acle.h>
+#endif
+#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && !defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define SIMDE_ARM_NEON_A32V7_NATIVE
+#endif
+
+#if !defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_ARM_NEON_A32V7_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_ARM_NEON) && SIMDE_ARCH_ARM_CHECK(7,0)
+    #define SIMDE_ARM_NEON_A32V7_NATIVE
+  #endif
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #include <arm_neon.h>
+  #if defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
+    #include <arm_fp16.h>
+  #endif
+#endif
+
+#if !defined(SIMDE_ARM_SVE_NATIVE) && !defined(SIMDE_ARM_SVE_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_ARM_SVE)
+    #define SIMDE_ARM_SVE_NATIVE
+    #include <arm_sve.h>
+  #endif
+#endif
+
+#if !defined(SIMDE_RISCV_V_NATIVE) && !defined(SIMDE_RISCV_V_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_RISCV_V)
+    #define SIMDE_RISCV_V_NATIVE
+  #endif
+#endif
+#if defined(SIMDE_RISCV_V_NATIVE)
+  #include <riscv_vector.h>
+#endif
+
+#if !defined(SIMDE_WASM_SIMD128_NATIVE) && !defined(SIMDE_WASM_SIMD128_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_WASM_SIMD128)
+    #define SIMDE_WASM_SIMD128_NATIVE
+  #endif
+#endif
+
+#if !defined(SIMDE_WASM_RELAXED_SIMD_NATIVE) && !defined(SIMDE_WASM_RELAXED_SIMD_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_WASM_RELAXED_SIMD)
+    #define SIMDE_WASM_RELAXED_SIMD_NATIVE
+  #endif
+#endif
+#if defined(SIMDE_WASM_SIMD128_NATIVE) || defined(SIMDE_WASM_RELAXED_SIMD_NATIVE)
+  #include <wasm_simd128.h>
+#endif
+
+#if !defined(SIMDE_POWER_ALTIVEC_P9_NATIVE) && !defined(SIMDE_POWER_ALTIVEC_P9_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if SIMDE_ARCH_POWER_ALTIVEC_CHECK(900)
+    #define SIMDE_POWER_ALTIVEC_P9_NATIVE
+  #endif
+#endif
+#if defined(SIMDE_POWER_ALTIVEC_P9_NATIVE) && !defined(SIMDE_POWER_ALTIVEC_P8)
+  #define SIMDE_POWER_ALTIVEC_P8_NATIVE
+#endif
+
+#if !defined(SIMDE_POWER_ALTIVEC_P8_NATIVE) && !defined(SIMDE_POWER_ALTIVEC_P8_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if SIMDE_ARCH_POWER_ALTIVEC_CHECK(800)
+    #define SIMDE_POWER_ALTIVEC_P8_NATIVE
+  #endif
+#endif
+#if defined(SIMDE_POWER_ALTIVEC_P8_NATIVE) && !defined(SIMDE_POWER_ALTIVEC_P7)
+  #define SIMDE_POWER_ALTIVEC_P7_NATIVE
+#endif
+
+#if !defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) && !defined(SIMDE_POWER_ALTIVEC_P7_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if SIMDE_ARCH_POWER_ALTIVEC_CHECK(700)
+    #define SIMDE_POWER_ALTIVEC_P7_NATIVE
+  #endif
+#endif
+#if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) && !defined(SIMDE_POWER_ALTIVEC_P6)
+  #define SIMDE_POWER_ALTIVEC_P6_NATIVE
+#endif
+
+#if !defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) && !defined(SIMDE_POWER_ALTIVEC_P6_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if SIMDE_ARCH_POWER_ALTIVEC_CHECK(600)
+    #define SIMDE_POWER_ALTIVEC_P6_NATIVE
+  #endif
+#endif
+#if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) && !defined(SIMDE_POWER_ALTIVEC_P5)
+  #define SIMDE_POWER_ALTIVEC_P5_NATIVE
+#endif
+
+#if !defined(SIMDE_POWER_ALTIVEC_P5_NATIVE) && !defined(SIMDE_POWER_ALTIVEC_P5_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if SIMDE_ARCH_POWER_ALTIVEC_CHECK(500)
+    #define SIMDE_POWER_ALTIVEC_P5_NATIVE
+  #endif
+#endif
+
+#if !defined(SIMDE_ZARCH_ZVECTOR_15_NATIVE) && !defined(SIMDE_ZARCH_ZVECTOR_15_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if SIMDE_ARCH_ZARCH_CHECK(13) && defined(SIMDE_ARCH_ZARCH_ZVECTOR)
+    #define SIMDE_ZARCH_ZVECTOR_15_NATIVE
+  #endif
+#endif
+
+#if !defined(SIMDE_ZARCH_ZVECTOR_14_NATIVE) && !defined(SIMDE_ZARCH_ZVECTOR_14_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if SIMDE_ARCH_ZARCH_CHECK(12) && defined(SIMDE_ARCH_ZARCH_ZVECTOR)
+    #define SIMDE_ZARCH_ZVECTOR_14_NATIVE
+  #endif
+#endif
+
+#if !defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) && !defined(SIMDE_ZARCH_ZVECTOR_13_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if SIMDE_ARCH_ZARCH_CHECK(11) && defined(SIMDE_ARCH_ZARCH_ZVECTOR)
+    #define SIMDE_ZARCH_ZVECTOR_13_NATIVE
+  #endif
+#endif
+
+#if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+  /* AltiVec conflicts with lots of stuff.  The bool keyword conflicts
+   * with the bool keyword in C++ and the bool macro in C99+ (defined
+   * in stdbool.h).  The vector keyword conflicts with std::vector in
+   * C++ if you are `using std;`.
+   *
+   * Luckily AltiVec allows you to use `__vector`/`__bool`/`__pixel`
+   * instead, but altivec.h will unconditionally define
+   * `vector`/`bool`/`pixel` so we need to work around that.
+   *
+   * Unfortunately this means that if your code uses AltiVec directly
+   * it may break.  If this is the case you'll want to define
+   * `SIMDE_POWER_ALTIVEC_NO_UNDEF` before including SIMDe.  Or, even
+   * better, port your code to use the double-underscore versions. */
+  #if defined(bool)
+    #undef bool
+  #endif
+
+  #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+    #include <altivec.h>
+
+    #if !defined(SIMDE_POWER_ALTIVEC_NO_UNDEF)
+      #if defined(vector)
+        #undef vector
+      #endif
+      #if defined(pixel)
+        #undef pixel
+      #endif
+      #if defined(bool)
+        #undef bool
+      #endif
+    #endif /* !defined(SIMDE_POWER_ALTIVEC_NO_UNDEF) */
+  #elif defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+    #include <vecintrin.h>
+  #endif
+
+  /* Use these intsead of vector/pixel/bool in SIMDe. */
+  #define SIMDE_POWER_ALTIVEC_VECTOR(T) __vector T
+  #define SIMDE_POWER_ALTIVEC_PIXEL __pixel
+  #define SIMDE_POWER_ALTIVEC_BOOL __bool
+
+  /* Re-define bool if we're using stdbool.h */
+  #if !defined(__cplusplus) && defined(__bool_true_false_are_defined) && !defined(SIMDE_POWER_ALTIVEC_NO_UNDEF)
+    #define bool _Bool
+  #endif
+#endif
+
+#if !defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE) && !defined(SIMDE_MIPS_LOONGSON_MMI_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_MIPS_LOONGSON_MMI)
+    #define SIMDE_MIPS_LOONGSON_MMI_NATIVE  1
+  #endif
+#endif
+#if defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+  #include <loongson-mmiintrin.h>
+#endif
+
+#if !defined(SIMDE_MIPS_MSA_NATIVE) && !defined(SIMDE_MIPS_MSA_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_MIPS_MSA)
+    #define SIMDE_MIPS_MSA_NATIVE  1
+  #endif
+#endif
+#if defined(SIMDE_MIPS_MSA_NATIVE)
+  #include <msa.h>
+#endif
+
+/* This is used to determine whether or not to fall back on a vector
+ * function in an earlier ISA extensions, as well as whether
+ * we expected any attempts at vectorization to be fruitful or if we
+ * expect to always be running serial code.
+ *
+ * Note that, for some architectures (okay, *one* architecture) there
+ * can be a split where some types are supported for one vector length
+ * but others only for a shorter length.  Therefore, it is possible to
+ * provide separate values for float/int/double types. */
+
+#if !defined(SIMDE_NATURAL_VECTOR_SIZE)
+  #if defined(SIMDE_X86_AVX512F_NATIVE)
+    #define SIMDE_NATURAL_VECTOR_SIZE (512)
+  #elif defined(SIMDE_X86_AVX2_NATIVE)
+    #define SIMDE_NATURAL_VECTOR_SIZE (256)
+  #elif defined(SIMDE_X86_AVX_NATIVE)
+    #define SIMDE_NATURAL_FLOAT_VECTOR_SIZE (256)
+    #define SIMDE_NATURAL_INT_VECTOR_SIZE (128)
+    #define SIMDE_NATURAL_DOUBLE_VECTOR_SIZE (128)
+  #elif \
+      defined(SIMDE_X86_SSE2_NATIVE) || \
+      defined(SIMDE_ARM_NEON_A32V7_NATIVE) || \
+      defined(SIMDE_WASM_SIMD128_NATIVE) || \
+      defined(SIMDE_POWER_ALTIVEC_P5_NATIVE) || \
+      defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) || \
+      defined(SIMDE_MIPS_MSA_NATIVE)
+    #define SIMDE_NATURAL_VECTOR_SIZE (128)
+  #elif defined(SIMDE_X86_SSE_NATIVE)
+    #define SIMDE_NATURAL_FLOAT_VECTOR_SIZE (128)
+    #define SIMDE_NATURAL_INT_VECTOR_SIZE (64)
+    #define SIMDE_NATURAL_DOUBLE_VECTOR_SIZE (0)
+  #elif defined(SIMDE_RISCV_V_NATIVE) && defined(__riscv_v_fixed_vlen)
+        //FIXME : SIMDE_NATURAL_VECTOR_SIZE == __riscv_v_fixed_vlen
+        #define SIMDE_NATURAL_VECTOR_SIZE (128)
+  #endif
+
+  #if !defined(SIMDE_NATURAL_VECTOR_SIZE)
+    #if defined(SIMDE_NATURAL_FLOAT_VECTOR_SIZE)
+      #define SIMDE_NATURAL_VECTOR_SIZE SIMDE_NATURAL_FLOAT_VECTOR_SIZE
+    #elif defined(SIMDE_NATURAL_INT_VECTOR_SIZE)
+      #define SIMDE_NATURAL_VECTOR_SIZE SIMDE_NATURAL_INT_VECTOR_SIZE
+    #elif defined(SIMDE_NATURAL_DOUBLE_VECTOR_SIZE)
+      #define SIMDE_NATURAL_VECTOR_SIZE SIMDE_NATURAL_DOUBLE_VECTOR_SIZE
+    #else
+      #define SIMDE_NATURAL_VECTOR_SIZE (0)
+    #endif
+  #endif
+
+  #if !defined(SIMDE_NATURAL_FLOAT_VECTOR_SIZE)
+    #define SIMDE_NATURAL_FLOAT_VECTOR_SIZE SIMDE_NATURAL_VECTOR_SIZE
+  #endif
+  #if !defined(SIMDE_NATURAL_INT_VECTOR_SIZE)
+    #define SIMDE_NATURAL_INT_VECTOR_SIZE SIMDE_NATURAL_VECTOR_SIZE
+  #endif
+  #if !defined(SIMDE_NATURAL_DOUBLE_VECTOR_SIZE)
+    #define SIMDE_NATURAL_DOUBLE_VECTOR_SIZE SIMDE_NATURAL_VECTOR_SIZE
+  #endif
+#endif
+
+#define SIMDE_NATURAL_VECTOR_SIZE_LE(x) ((SIMDE_NATURAL_VECTOR_SIZE > 0) && (SIMDE_NATURAL_VECTOR_SIZE <= (x)))
+#define SIMDE_NATURAL_VECTOR_SIZE_GE(x) ((SIMDE_NATURAL_VECTOR_SIZE > 0) && (SIMDE_NATURAL_VECTOR_SIZE >= (x)))
+#define SIMDE_NATURAL_FLOAT_VECTOR_SIZE_LE(x) ((SIMDE_NATURAL_FLOAT_VECTOR_SIZE > 0) && (SIMDE_NATURAL_FLOAT_VECTOR_SIZE <= (x)))
+#define SIMDE_NATURAL_FLOAT_VECTOR_SIZE_GE(x) ((SIMDE_NATURAL_FLOAT_VECTOR_SIZE > 0) && (SIMDE_NATURAL_FLOAT_VECTOR_SIZE >= (x)))
+#define SIMDE_NATURAL_INT_VECTOR_SIZE_LE(x) ((SIMDE_NATURAL_INT_VECTOR_SIZE > 0) && (SIMDE_NATURAL_INT_VECTOR_SIZE <= (x)))
+#define SIMDE_NATURAL_INT_VECTOR_SIZE_GE(x) ((SIMDE_NATURAL_INT_VECTOR_SIZE > 0) && (SIMDE_NATURAL_INT_VECTOR_SIZE >= (x)))
+#define SIMDE_NATURAL_DOUBLE_VECTOR_SIZE_LE(x) ((SIMDE_NATURAL_DOUBLE_VECTOR_SIZE > 0) && (SIMDE_NATURAL_DOUBLE_VECTOR_SIZE <= (x)))
+#define SIMDE_NATURAL_DOUBLE_VECTOR_SIZE_GE(x) ((SIMDE_NATURAL_DOUBLE_VECTOR_SIZE > 0) && (SIMDE_NATURAL_DOUBLE_VECTOR_SIZE >= (x)))
+
+/* Native aliases */
+#if defined(SIMDE_ENABLE_NATIVE_ALIASES)
+  #if !defined(SIMDE_X86_MMX_NATIVE)
+    #define SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES
+  #endif
+  #if !defined(SIMDE_X86_SSE_NATIVE)
+    #define SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES
+  #endif
+  #if !defined(SIMDE_X86_SSE2_NATIVE)
+    #define SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES
+  #endif
+  #if !defined(SIMDE_X86_SSE3_NATIVE)
+    #define SIMDE_X86_SSE3_ENABLE_NATIVE_ALIASES
+  #endif
+  #if !defined(SIMDE_X86_SSSE3_NATIVE)
+    #define SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES
+  #endif
+  #if !defined(SIMDE_X86_SSE4_1_NATIVE)
+    #define SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES
+  #endif
+  #if !defined(SIMDE_X86_SSE4_2_NATIVE)
+    #define SIMDE_X86_SSE4_2_ENABLE_NATIVE_ALIASES
+  #endif
+  #if !defined(SIMDE_X86_AVX_NATIVE)
+    #define SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES
+  #endif
+  #if !defined(SIMDE_X86_AVX2_NATIVE)
+    #define SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES
+  #endif
+  #if !defined(SIMDE_X86_FMA_NATIVE)
+    #define SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES
+  #endif
+  #if !defined(SIMDE_X86_AVX512F_NATIVE)
+    #define SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES
+  #endif
+  #if !defined(SIMDE_X86_AVX512VL_NATIVE)
+    #define SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES
+  #endif
+  #if !defined(SIMDE_X86_AVX512VBMI_NATIVE)
+    #define SIMDE_X86_AVX512VBMI_ENABLE_NATIVE_ALIASES
+  #endif
+  #if !defined(SIMDE_X86_AVX512VBMI2_NATIVE)
+    #define SIMDE_X86_AVX512VBMI2_ENABLE_NATIVE_ALIASES
+  #endif
+  #if !defined(SIMDE_X86_AVX512BW_NATIVE)
+    #define SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES
+  #endif
+  #if !defined(SIMDE_X86_AVX512VNNI_NATIVE)
+    #define SIMDE_X86_AVX512VNNI_ENABLE_NATIVE_ALIASES
+  #endif
+  #if !defined(SIMDE_X86_AVX5124VNNIW_NATIVE)
+    #define SIMDE_X86_AVX5124VNNIW_ENABLE_NATIVE_ALIASES
+  #endif
+  #if !defined(SIMDE_X86_AVX512BF16_NATIVE)
+    #define SIMDE_X86_AVX512BF16_ENABLE_NATIVE_ALIASES
+  #endif
+  #if !defined(SIMDE_X86_AVX512BITALG_NATIVE)
+    #define SIMDE_X86_AVX512BITALG_ENABLE_NATIVE_ALIASES
+  #endif
+  #if !defined(SIMDE_X86_AVX512VPOPCNTDQ_NATIVE)
+    #define SIMDE_X86_AVX512VPOPCNTDQ_ENABLE_NATIVE_ALIASES
+  #endif
+  #if !defined(SIMDE_X86_AVX512VP2INTERSECT_NATIVE)
+    #define SIMDE_X86_AVX512VP2INTERSECT_ENABLE_NATIVE_ALIASES
+  #endif
+  #if !defined(SIMDE_X86_AVX512DQ_NATIVE)
+    #define SIMDE_X86_AVX512DQ_ENABLE_NATIVE_ALIASES
+  #endif
+  #if !defined(SIMDE_X86_AVX512CD_NATIVE)
+    #define SIMDE_X86_AVX512CD_ENABLE_NATIVE_ALIASES
+  #endif
+  #if !defined(SIMDE_X86_AVX512FP16_NATIVE)
+    #define SIMDE_X86_AVX512FP16_ENABLE_NATIVE_ALIASES
+  #endif
+  #if !defined(SIMDE_X86_GFNI_NATIVE)
+    #define SIMDE_X86_GFNI_ENABLE_NATIVE_ALIASES
+  #endif
+  #if !defined(SIMDE_X86_PCLMUL_NATIVE)
+    #define SIMDE_X86_PCLMUL_ENABLE_NATIVE_ALIASES
+  #endif
+  #if !defined(SIMDE_X86_VPCLMULQDQ_NATIVE)
+    #define SIMDE_X86_VPCLMULQDQ_ENABLE_NATIVE_ALIASES
+  #endif
+  #if !defined(SIMDE_X86_F16C_NATIVE)
+    #define SIMDE_X86_F16C_ENABLE_NATIVE_ALIASES
+  #endif
+  #if !defined(SIMDE_X86_AES_NATIVE)
+    #define SIMDE_X86_AES_ENABLE_NATIVE_ALIASES
+  #endif
+  #if !defined(SIMDE_X86_SVML_NATIVE)
+    #define SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES
+  #endif
+
+  #if !defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    #define SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES
+  #endif
+  #if !defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    #define SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES
+  #endif
+  #if !defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    #define SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES
+  #endif
+
+  #if !defined(SIMDE_ARM_SVE_NATIVE)
+    #define SIMDE_ARM_SVE_ENABLE_NATIVE_ALIASES
+  #endif
+
+  #if !defined(SIMDE_RISCV_V_NATIVE)
+    #define SIMDE_RISCV_V_ENABLE_NATIVE_ALIASES
+  #endif
+
+  #if !defined(SIMDE_MIPS_MSA_NATIVE)
+    #define SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES
+  #endif
+
+  #if !defined(SIMDE_WASM_SIMD128_NATIVE)
+    #define SIMDE_WASM_SIMD128_ENABLE_NATIVE_ALIASES
+  #endif
+#endif
+
+/* Are floating point values stored using IEEE 754?  Knowing
+ * this at during preprocessing is a bit tricky, mostly because what
+ * we're curious about is how values are stored and not whether the
+ * implementation is fully conformant in terms of rounding, NaN
+ * handling, etc.
+ *
+ * For example, if you use -ffast-math or -Ofast on
+ * GCC or clang IEEE 754 isn't strictly followed, therefore IEE 754
+ * support is not advertised (by defining __STDC_IEC_559__).
+ *
+ * However, what we care about is whether it is safe to assume that
+ * floating point values are stored in IEEE 754 format, in which case
+ * we can provide faster implementations of some functions.
+ *
+ * Luckily every vaugely modern architecture I'm aware of uses IEEE 754-
+ * so we just assume IEEE 754 for now.  There is a test which verifies
+ * this, if that test fails sowewhere please let us know and we'll add
+ * an exception for that platform.  Meanwhile, you can define
+ * SIMDE_NO_IEEE754_STORAGE. */
+#if !defined(SIMDE_IEEE754_STORAGE) && !defined(SIMDE_NO_IEE754_STORAGE)
+  #define SIMDE_IEEE754_STORAGE
+#endif
+
+#if defined(SIMDE_ARCH_ARM_NEON_FP16)
+  #define SIMDE_ARM_NEON_FP16
+#endif
+
+#if defined(SIMDE_ARCH_ARM_NEON_BF16)
+  #define SIMDE_ARM_NEON_BF16
+#endif
+
+#if !defined(SIMDE_LOONGARCH_LASX_NATIVE) && !defined(SIMDE_LOONGARCH_LASX_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_LOONGARCH_LASX)
+    #define SIMDE_LOONGARCH_LASX_NATIVE
+  #endif
+#endif
+
+#if !defined(SIMDE_LOONGARCH_LSX_NATIVE) && !defined(SIMDE_LOONGARCH_LSX_NO_NATIVE) && !defined(SIMDE_NO_NATIVE)
+  #if defined(SIMDE_ARCH_LOONGARCH_LSX)
+    #define SIMDE_LOONGARCH_LSX_NATIVE
+  #endif
+#endif
+
+#if defined(SIMDE_LOONGARCH_LASX_NATIVE)
+  #include <lasxintrin.h>
+#endif
+#if defined(SIMDE_LOONGARCH_LSX_NATIVE)
+  #include <lsxintrin.h>
+#endif
+
+#endif /* !defined(SIMDE_FEATURES_H) */
diff --git a/external_libs/pgenlib/simde/simde-math.h b/external_libs/pgenlib/simde/simde-math.h
new file mode 100644
index 0000000..d18bf4f
--- /dev/null
+++ b/external_libs/pgenlib/simde/simde-math.h
@@ -0,0 +1,2065 @@
+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2017-2020 Evan Nemerson <evan@nemerson.com>
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+/* Attempt to find math functions.  Functions may be in <cmath>,
+ * <math.h>, compiler built-ins/intrinsics, or platform/architecture
+ * specific headers.  In some cases, especially those not built in to
+ * libm, we may need to define our own implementations. */
+
+#if !defined(SIMDE_MATH_H)
+#define SIMDE_MATH_H 1
+
+#include "hedley.h"
+#include "simde-features.h"
+
+#include <stdint.h>
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #include <arm_neon.h>
+#endif
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+
+/* SLEEF support
+ * https://sleef.org/
+ *
+ * If you include <sleef.h> prior to including SIMDe, SIMDe will use
+ * SLEEF.  You can also define SIMDE_MATH_SLEEF_ENABLE prior to
+ * including SIMDe to force the issue.
+ *
+ * Note that SLEEF does requires linking to libsleef.
+ *
+ * By default, SIMDe will use the 1 ULP functions, but if you use
+ * SIMDE_ACCURACY_PREFERENCE of 0 we will use up to 4 ULP.  This is
+ * only the case for the simde_math_* functions; for code in other
+ * SIMDe headers which calls SLEEF directly we may use functions with
+ * greater error if the API we're implementing is less precise (for
+ * example, SVML guarantees 4 ULP, so we will generally use the 3.5
+ * ULP functions from SLEEF). */
+#if !defined(SIMDE_MATH_SLEEF_DISABLE)
+  #if defined(__SLEEF_H__)
+    #define SIMDE_MATH_SLEEF_ENABLE
+  #endif
+#endif
+
+#if defined(SIMDE_MATH_SLEEF_ENABLE) && !defined(__SLEEF_H__)
+  HEDLEY_DIAGNOSTIC_PUSH
+  SIMDE_DIAGNOSTIC_DISABLE_IGNORED_QUALIFIERS_
+  #include <sleef.h>
+  HEDLEY_DIAGNOSTIC_POP
+#endif
+
+#if defined(SIMDE_MATH_SLEEF_ENABLE) && defined(__SLEEF_H__)
+  #if defined(SLEEF_VERSION_MAJOR)
+    #define SIMDE_MATH_SLEEF_VERSION_CHECK(major, minor, patch) (HEDLEY_VERSION_ENCODE(SLEEF_VERSION_MAJOR, SLEEF_VERSION_MINOR, SLEEF_VERSION_PATCHLEVEL) >= HEDLEY_VERSION_ENCODE(major, minor, patch))
+  #else
+    #define SIMDE_MATH_SLEEF_VERSION_CHECK(major, minor, patch) (HEDLEY_VERSION_ENCODE(3,0,0) >= HEDLEY_VERSION_ENCODE(major, minor, patch))
+  #endif
+#else
+  #define SIMDE_MATH_SLEEF_VERSION_CHECK(major, minor, patch) (0)
+#endif
+
+#if defined(__has_builtin)
+  #define SIMDE_MATH_BUILTIN_LIBM(func) __has_builtin(__builtin_##func)
+#elif \
+    HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+    HEDLEY_ARM_VERSION_CHECK(4,1,0) || \
+    HEDLEY_GCC_VERSION_CHECK(4,4,0)
+  #define SIMDE_MATH_BUILTIN_LIBM(func) (1)
+#else
+  #define SIMDE_MATH_BUILTIN_LIBM(func) (0)
+#endif
+
+#if defined(HUGE_VAL)
+  /* Looks like <math.h> or <cmath> has already been included. */
+
+  /* The math.h from libc++ (yes, the C header from the C++ standard
+   * library) will define an isnan function, but not an isnan macro
+   * like the C standard requires.  So we detect the header guards
+   * macro libc++ uses. */
+  #if defined(isnan) || (defined(_LIBCPP_MATH_H) && !defined(_LIBCPP_CMATH))
+    #define SIMDE_MATH_HAVE_MATH_H
+  #elif defined(__cplusplus)
+    #define SIMDE_MATH_HAVE_CMATH
+  #endif
+#elif defined(__has_include)
+  #if defined(__cplusplus) && (__cplusplus >= 201103L) && __has_include(<cmath>)
+    #define SIMDE_MATH_HAVE_CMATH
+    #include <cmath>
+  #elif __has_include(<math.h>)
+    #define SIMDE_MATH_HAVE_MATH_H
+    #include <math.h>
+  #elif !defined(SIMDE_MATH_NO_LIBM)
+    #define SIMDE_MATH_NO_LIBM
+  #endif
+#elif !defined(SIMDE_MATH_NO_LIBM)
+  #if defined(__cplusplus) && (__cplusplus >= 201103L)
+    #define SIMDE_MATH_HAVE_CMATH
+    HEDLEY_DIAGNOSTIC_PUSH
+    #if defined(HEDLEY_MSVC_VERSION)
+      /* VS 14 emits this diagnostic about noexcept being used on a
+       * <cmath> function, which we can't do anything about. */
+      #pragma warning(disable:4996)
+    #endif
+    #include <cmath>
+    HEDLEY_DIAGNOSTIC_POP
+  #else
+    #define SIMDE_MATH_HAVE_MATH_H
+    #include <math.h>
+  #endif
+#endif
+
+#if !defined(SIMDE_MATH_INFINITY)
+  #if \
+      HEDLEY_HAS_BUILTIN(__builtin_inf) || \
+      HEDLEY_GCC_VERSION_CHECK(3,3,0) || \
+      HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+      HEDLEY_ARM_VERSION_CHECK(4,1,0) || \
+      HEDLEY_CRAY_VERSION_CHECK(8,1,0)
+    #define SIMDE_MATH_INFINITY (__builtin_inf())
+  #elif defined(INFINITY)
+    #define SIMDE_MATH_INFINITY INFINITY
+  #endif
+#endif
+
+#if !defined(SIMDE_INFINITYF)
+  #if \
+      HEDLEY_HAS_BUILTIN(__builtin_inff) || \
+      HEDLEY_GCC_VERSION_CHECK(3,3,0) || \
+      HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+      HEDLEY_CRAY_VERSION_CHECK(8,1,0) || \
+      HEDLEY_IBM_VERSION_CHECK(13,1,0)
+    #define SIMDE_MATH_INFINITYF (__builtin_inff())
+  #elif defined(INFINITYF)
+    #define SIMDE_MATH_INFINITYF INFINITYF
+  #elif defined(SIMDE_MATH_INFINITY)
+    #define SIMDE_MATH_INFINITYF HEDLEY_STATIC_CAST(float, SIMDE_MATH_INFINITY)
+  #endif
+#endif
+
+#if !defined(SIMDE_MATH_NAN)
+  #if \
+      HEDLEY_HAS_BUILTIN(__builtin_nan) || \
+      HEDLEY_GCC_VERSION_CHECK(3,3,0) || \
+      HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+      HEDLEY_ARM_VERSION_CHECK(4,1,0) || \
+      HEDLEY_CRAY_VERSION_CHECK(8,1,0) || \
+      HEDLEY_IBM_VERSION_CHECK(13,1,0)
+    #define SIMDE_MATH_NAN (__builtin_nan(""))
+  #elif defined(NAN)
+    #define SIMDE_MATH_NAN NAN
+  #endif
+#endif
+
+#if !defined(SIMDE_NANF)
+  #if \
+      HEDLEY_HAS_BUILTIN(__builtin_nanf) || \
+      HEDLEY_GCC_VERSION_CHECK(3,3,0) || \
+      HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+      HEDLEY_ARM_VERSION_CHECK(4,1,0) || \
+      HEDLEY_CRAY_VERSION_CHECK(8,1,0)
+    #define SIMDE_MATH_NANF (__builtin_nanf(""))
+  #elif defined(NANF)
+    #define SIMDE_MATH_NANF NANF
+  #elif defined(SIMDE_MATH_NAN)
+    #define SIMDE_MATH_NANF HEDLEY_STATIC_CAST(float, SIMDE_MATH_NAN)
+  #endif
+#endif
+
+#if !defined(SIMDE_MATH_PI)
+  #if defined(M_PI)
+    #define SIMDE_MATH_PI M_PI
+  #else
+    #define SIMDE_MATH_PI 3.14159265358979323846
+  #endif
+#endif
+
+#if !defined(SIMDE_MATH_PIF)
+  #if defined(M_PI)
+    #define SIMDE_MATH_PIF HEDLEY_STATIC_CAST(float, M_PI)
+  #else
+    #define SIMDE_MATH_PIF 3.14159265358979323846f
+  #endif
+#endif
+
+#if !defined(SIMDE_MATH_PI_OVER_180)
+  #define SIMDE_MATH_PI_OVER_180 0.0174532925199432957692369076848861271344287188854172545609719144
+#endif
+
+#if !defined(SIMDE_MATH_PI_OVER_180F)
+  #define SIMDE_MATH_PI_OVER_180F 0.0174532925199432957692369076848861271344287188854172545609719144f
+#endif
+
+#if !defined(SIMDE_MATH_180_OVER_PI)
+  #define SIMDE_MATH_180_OVER_PI 57.295779513082320876798154814105170332405472466564321549160243861
+#endif
+
+#if !defined(SIMDE_MATH_180_OVER_PIF)
+  #define SIMDE_MATH_180_OVER_PIF 57.295779513082320876798154814105170332405472466564321549160243861f
+#endif
+
+#if !defined(SIMDE_MATH_FLT_MIN)
+  #if defined(__FLT_MIN__)
+    #define SIMDE_MATH_FLT_MIN __FLT_MIN__
+  #else
+    #if !defined(FLT_MIN)
+      #if defined(__cplusplus)
+        #include <cfloat>
+      #else
+        #include <float.h>
+      #endif
+    #endif
+    #define SIMDE_MATH_FLT_MIN FLT_MIN
+  #endif
+#endif
+
+#if !defined(SIMDE_MATH_FLT_MAX)
+  #if defined(__FLT_MAX__)
+    #define SIMDE_MATH_FLT_MAX __FLT_MAX__
+  #else
+    #if !defined(FLT_MAX)
+      #if defined(__cplusplus)
+        #include <cfloat>
+      #else
+        #include <float.h>
+      #endif
+    #endif
+    #define SIMDE_MATH_FLT_MAX FLT_MAX
+  #endif
+#endif
+
+#if !defined(SIMDE_MATH_DBL_MIN)
+  #if defined(__DBL_MIN__)
+    #define SIMDE_MATH_DBL_MIN __DBL_MIN__
+  #else
+    #if !defined(DBL_MIN)
+      #if defined(__cplusplus)
+        #include <cfloat>
+      #else
+        #include <float.h>
+      #endif
+    #endif
+    #define SIMDE_MATH_DBL_MIN DBL_MIN
+  #endif
+#endif
+
+#if !defined(SIMDE_MATH_DBL_MAX)
+  #if defined(__DBL_MAX__)
+    #define SIMDE_MATH_DBL_MAX __DBL_MAX__
+  #else
+    #if !defined(DBL_MAX)
+      #if defined(__cplusplus)
+        #include <cfloat>
+      #else
+        #include <float.h>
+      #endif
+    #endif
+    #define SIMDE_MATH_DBL_MAX DBL_MAX
+  #endif
+#endif
+
+/*** Classification macros from C99 ***/
+
+#if !defined(simde_math_isinf)
+  #if SIMDE_MATH_BUILTIN_LIBM(isinf)
+    #define simde_math_isinf(v) __builtin_isinf(v)
+  #elif defined(isinf) || defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_isinf(v) isinf(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_isinf(v) std::isinf(v)
+  #endif
+#endif
+
+#if !defined(simde_math_isinff)
+  #if HEDLEY_HAS_BUILTIN(__builtin_isinff) || \
+      HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+      HEDLEY_ARM_VERSION_CHECK(4,1,0)
+    #define simde_math_isinff(v) __builtin_isinff(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_isinff(v) std::isinf(v)
+  #elif defined(simde_math_isinf)
+    #define simde_math_isinff(v) simde_math_isinf(HEDLEY_STATIC_CAST(double, v))
+  #endif
+#endif
+
+#if !defined(simde_math_isnan)
+  #if SIMDE_MATH_BUILTIN_LIBM(isnan)
+    #define simde_math_isnan(v) __builtin_isnan(v)
+  #elif defined(isnan) || defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_isnan(v) isnan(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_isnan(v) std::isnan(v)
+  #endif
+#endif
+
+#if !defined(simde_math_isnanf)
+  #if HEDLEY_HAS_BUILTIN(__builtin_isnanf) || \
+      HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+      HEDLEY_ARM_VERSION_CHECK(4,1,0)
+    /* XL C/C++ has __builtin_isnan but not __builtin_isnanf */
+    #define simde_math_isnanf(v) __builtin_isnanf(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_isnanf(v) std::isnan(v)
+  #elif defined(simde_math_isnan)
+    #define simde_math_isnanf(v) simde_math_isnan(HEDLEY_STATIC_CAST(double, v))
+  #endif
+#endif
+
+#if !defined(simde_math_isnormal)
+  #if SIMDE_MATH_BUILTIN_LIBM(isnormal)
+    #define simde_math_isnormal(v) __builtin_isnormal(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_isnormal(v) isnormal(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_isnormal(v) std::isnormal(v)
+  #endif
+#endif
+
+#if !defined(simde_math_isnormalf)
+  #if HEDLEY_HAS_BUILTIN(__builtin_isnormalf)
+    #define simde_math_isnormalf(v) __builtin_isnormalf(v)
+  #elif SIMDE_MATH_BUILTIN_LIBM(isnormal)
+    #define simde_math_isnormalf(v) __builtin_isnormal(v)
+  #elif defined(isnormalf)
+    #define simde_math_isnormalf(v) isnormalf(v)
+  #elif defined(isnormal) || defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_isnormalf(v) isnormal(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_isnormalf(v) std::isnormal(v)
+  #elif defined(simde_math_isnormal)
+    #define simde_math_isnormalf(v) simde_math_isnormal(v)
+  #endif
+#endif
+
+#if !defined(simde_math_issubnormalf)
+  #if SIMDE_MATH_BUILTIN_LIBM(fpclassify)
+    #define simde_math_issubnormalf(v) __builtin_fpclassify(0, 0, 0, 1, 0, v)
+  #elif defined(fpclassify)
+    #define simde_math_issubnormalf(v) (fpclassify(v) == FP_SUBNORMAL)
+  #elif defined(SIMDE_IEEE754_STORAGE)
+    #define simde_math_issubnormalf(v) (((simde_float32_as_uint32(v) & UINT32_C(0x7F800000)) == UINT32_C(0)) && ((simde_float32_as_uint32(v) & UINT32_C(0x007FFFFF)) != UINT32_C(0)))
+  #endif
+#endif
+
+#if !defined(simde_math_issubnormal)
+  #if SIMDE_MATH_BUILTIN_LIBM(fpclassify)
+    #define simde_math_issubnormal(v) __builtin_fpclassify(0, 0, 0, 1, 0, v)
+  #elif defined(fpclassify)
+    #define simde_math_issubnormal(v) (fpclassify(v) == FP_SUBNORMAL)
+  #elif defined(SIMDE_IEEE754_STORAGE)
+    #define simde_math_issubnormal(v) (((simde_float64_as_uint64(v) & UINT64_C(0x7FF0000000000000)) == UINT64_C(0)) && ((simde_float64_as_uint64(v) & UINT64_C(0x00FFFFFFFFFFFFF)) != UINT64_C(0)))
+  #endif
+#endif
+
+#if defined(FP_NAN)
+  #define SIMDE_MATH_FP_NAN FP_NAN
+#else
+  #define SIMDE_MATH_FP_NAN 0
+#endif
+#if defined(FP_INFINITE)
+  #define SIMDE_MATH_FP_INFINITE FP_INFINITE
+#else
+  #define SIMDE_MATH_FP_INFINITE 1
+#endif
+#if defined(FP_ZERO)
+  #define SIMDE_MATH_FP_ZERO FP_ZERO
+#else
+  #define SIMDE_MATH_FP_ZERO 2
+#endif
+#if defined(FP_SUBNORMAL)
+  #define SIMDE_MATH_FP_SUBNORMAL FP_SUBNORMAL
+#else
+  #define SIMDE_MATH_FP_SUBNORMAL 3
+#endif
+#if defined(FP_NORMAL)
+  #define SIMDE_MATH_FP_NORMAL FP_NORMAL
+#else
+  #define SIMDE_MATH_FP_NORMAL 4
+#endif
+
+static HEDLEY_INLINE
+int
+simde_math_fpclassifyf(float v) {
+  #if SIMDE_MATH_BUILTIN_LIBM(fpclassify)
+    return __builtin_fpclassify(SIMDE_MATH_FP_NAN, SIMDE_MATH_FP_INFINITE, SIMDE_MATH_FP_NORMAL, SIMDE_MATH_FP_SUBNORMAL, SIMDE_MATH_FP_ZERO, v);
+  #elif defined(fpclassify)
+    return fpclassify(v);
+  #else
+    return
+      simde_math_isnormalf(v) ? SIMDE_MATH_FP_NORMAL    :
+      (v == 0.0f)             ? SIMDE_MATH_FP_ZERO      :
+      simde_math_isnanf(v)    ? SIMDE_MATH_FP_NAN       :
+      simde_math_isinff(v)    ? SIMDE_MATH_FP_INFINITE  :
+                                SIMDE_MATH_FP_SUBNORMAL;
+  #endif
+}
+
+static HEDLEY_INLINE
+int
+simde_math_fpclassify(double v) {
+  #if SIMDE_MATH_BUILTIN_LIBM(fpclassify)
+    return __builtin_fpclassify(SIMDE_MATH_FP_NAN, SIMDE_MATH_FP_INFINITE, SIMDE_MATH_FP_NORMAL, SIMDE_MATH_FP_SUBNORMAL, SIMDE_MATH_FP_ZERO, v);
+  #elif defined(fpclassify)
+    return fpclassify(v);
+  #else
+    return
+      simde_math_isnormal(v) ? SIMDE_MATH_FP_NORMAL    :
+      (v == 0.0)             ? SIMDE_MATH_FP_ZERO      :
+      simde_math_isnan(v)    ? SIMDE_MATH_FP_NAN       :
+      simde_math_isinf(v)    ? SIMDE_MATH_FP_INFINITE  :
+                               SIMDE_MATH_FP_SUBNORMAL;
+  #endif
+}
+
+#define SIMDE_MATH_FP_QNAN      0x01
+#define SIMDE_MATH_FP_PZERO     0x02
+#define SIMDE_MATH_FP_NZERO     0x04
+#define SIMDE_MATH_FP_PINF      0x08
+#define SIMDE_MATH_FP_NINF      0x10
+#define SIMDE_MATH_FP_DENORMAL  0x20
+#define SIMDE_MATH_FP_NEGATIVE  0x40
+#define SIMDE_MATH_FP_SNAN      0x80
+
+static HEDLEY_INLINE
+uint8_t
+simde_math_fpclassf(float v, const int imm8) {
+  union {
+    float f;
+    uint32_t u;
+  } fu;
+  fu.f = v;
+  uint32_t bits = fu.u;
+  uint8_t NegNum = (bits >> 31) & 1;
+  uint32_t const ExpMask = 0x3F800000; // [30:23]
+  uint32_t const MantMask = 0x007FFFFF; // [22:0]
+  uint8_t ExpAllOnes = ((bits & ExpMask) == ExpMask);
+  uint8_t ExpAllZeros = ((bits & ExpMask) == 0);
+  uint8_t MantAllZeros = ((bits & MantMask) == 0);
+  uint8_t ZeroNumber = ExpAllZeros & MantAllZeros;
+  uint8_t SignalingBit = (bits >> 22) & 1;
+
+  uint8_t result = 0;
+  uint8_t qNaN_res = ExpAllOnes & (!MantAllZeros) & SignalingBit;
+  uint8_t Pzero_res = (!NegNum) & ExpAllZeros & MantAllZeros;
+  uint8_t Nzero_res = NegNum & ExpAllZeros & MantAllZeros;
+  uint8_t Pinf_res = (!NegNum) & ExpAllOnes & MantAllZeros;
+  uint8_t Ninf_res = NegNum & ExpAllOnes & MantAllZeros;
+  uint8_t Denorm_res = ExpAllZeros & (!MantAllZeros);
+  uint8_t FinNeg_res = NegNum & (!ExpAllOnes) & (!ZeroNumber);
+  uint8_t sNaN_res = ExpAllOnes & (!MantAllZeros) & (!SignalingBit);
+  result = (((imm8 >> 0) & qNaN_res)   | \
+            ((imm8 >> 1) & Pzero_res)  | \
+            ((imm8 >> 2) & Nzero_res)  | \
+            ((imm8 >> 3) & Pinf_res)   | \
+            ((imm8 >> 4) & Ninf_res)   | \
+            ((imm8 >> 5) & Denorm_res) | \
+            ((imm8 >> 6) & FinNeg_res) | \
+            ((imm8 >> 7) & sNaN_res));
+  return result;
+}
+
+static HEDLEY_INLINE
+uint8_t
+simde_math_fpclass(double v, const int imm8) {
+  union {
+    double d;
+    uint64_t u;
+  } du;
+  du.d = v;
+  uint64_t bits = du.u;
+  uint8_t NegNum = (bits >> 63) & 1;
+  uint64_t const ExpMask =  0x3FF0000000000000; // [62:52]
+  uint64_t const MantMask = 0x000FFFFFFFFFFFFF; // [51:0]
+  uint8_t ExpAllOnes = ((bits & ExpMask) == ExpMask);
+  uint8_t ExpAllZeros = ((bits & ExpMask) == 0);
+  uint8_t MantAllZeros = ((bits & MantMask) == 0);
+  uint8_t ZeroNumber = ExpAllZeros & MantAllZeros;
+  uint8_t SignalingBit = (bits >> 51) & 1;
+
+  uint8_t result = 0;
+  uint8_t qNaN_res = ExpAllOnes & (!MantAllZeros) & SignalingBit;
+  uint8_t Pzero_res = (!NegNum) & ExpAllZeros & MantAllZeros;
+  uint8_t Nzero_res = NegNum & ExpAllZeros & MantAllZeros;
+  uint8_t Pinf_res = (!NegNum) & ExpAllOnes & MantAllZeros;
+  uint8_t Ninf_res = NegNum & ExpAllOnes & MantAllZeros;
+  uint8_t Denorm_res = ExpAllZeros & (!MantAllZeros);
+  uint8_t FinNeg_res = NegNum & (!ExpAllOnes) & (!ZeroNumber);
+  uint8_t sNaN_res = ExpAllOnes & (!MantAllZeros) & (!SignalingBit);
+  result = (((imm8 >> 0) & qNaN_res)   | \
+            ((imm8 >> 1) & Pzero_res)  | \
+            ((imm8 >> 2) & Nzero_res)  | \
+            ((imm8 >> 3) & Pinf_res)   | \
+            ((imm8 >> 4) & Ninf_res)   | \
+            ((imm8 >> 5) & Denorm_res) | \
+            ((imm8 >> 6) & FinNeg_res) | \
+            ((imm8 >> 7) & sNaN_res));
+  return result;
+}
+
+/*** Manipulation functions ***/
+
+#if !defined(simde_math_nextafter)
+  #if \
+      (HEDLEY_HAS_BUILTIN(__builtin_nextafter) && !defined(HEDLEY_IBM_VERSION)) || \
+      HEDLEY_ARM_VERSION_CHECK(4,1,0) || \
+      HEDLEY_GCC_VERSION_CHECK(3,4,0) || \
+      HEDLEY_INTEL_VERSION_CHECK(13,0,0)
+    #define simde_math_nextafter(x, y) __builtin_nextafter(x, y)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_nextafter(x, y) std::nextafter(x, y)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_nextafter(x, y) nextafter(x, y)
+  #endif
+#endif
+
+#if !defined(simde_math_nextafterf)
+  #if \
+      (HEDLEY_HAS_BUILTIN(__builtin_nextafterf) && !defined(HEDLEY_IBM_VERSION)) || \
+      HEDLEY_ARM_VERSION_CHECK(4,1,0) || \
+      HEDLEY_GCC_VERSION_CHECK(3,4,0) || \
+      HEDLEY_INTEL_VERSION_CHECK(13,0,0)
+    #define simde_math_nextafterf(x, y) __builtin_nextafterf(x, y)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_nextafterf(x, y) std::nextafter(x, y)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_nextafterf(x, y) nextafterf(x, y)
+  #endif
+#endif
+
+/*** Functions from C99 ***/
+
+#if !defined(simde_math_abs)
+  #if SIMDE_MATH_BUILTIN_LIBM(abs)
+    #define simde_math_abs(v) __builtin_abs(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_abs(v) std::abs(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_abs(v) abs(v)
+  #endif
+#endif
+
+#if !defined(simde_math_labs)
+  #if SIMDE_MATH_BUILTIN_LIBM(labs)
+    #define simde_math_labs(v) __builtin_labs(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_labs(v) std::labs(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_labs(v) labs(v)
+  #endif
+#endif
+
+#if !defined(simde_math_llabs)
+  #if SIMDE_MATH_BUILTIN_LIBM(llabs)
+    #define simde_math_llabs(v) __builtin_llabs(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_llabs(v) std::llabs(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_llabs(v) llabs(v)
+  #endif
+#endif
+
+#if !defined(simde_math_fabsf)
+  #if SIMDE_MATH_BUILTIN_LIBM(fabsf)
+    #define simde_math_fabsf(v) __builtin_fabsf(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_fabsf(v) std::abs(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_fabsf(v) fabsf(v)
+  #endif
+#endif
+
+#if !defined(simde_math_acos)
+  #if SIMDE_MATH_BUILTIN_LIBM(acos)
+    #define simde_math_acos(v) __builtin_acos(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_acos(v) std::acos(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_acos(v) acos(v)
+  #endif
+#endif
+
+#if !defined(simde_math_acosf)
+  #if SIMDE_MATH_BUILTIN_LIBM(acosf)
+    #define simde_math_acosf(v) __builtin_acosf(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_acosf(v) std::acos(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_acosf(v) acosf(v)
+  #endif
+#endif
+
+#if !defined(simde_math_acosh)
+  #if SIMDE_MATH_BUILTIN_LIBM(acosh)
+    #define simde_math_acosh(v) __builtin_acosh(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_acosh(v) std::acosh(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_acosh(v) acosh(v)
+  #endif
+#endif
+
+#if !defined(simde_math_acoshf)
+  #if SIMDE_MATH_BUILTIN_LIBM(acoshf)
+    #define simde_math_acoshf(v) __builtin_acoshf(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_acoshf(v) std::acosh(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_acoshf(v) acoshf(v)
+  #endif
+#endif
+
+#if !defined(simde_math_asin)
+  #if SIMDE_MATH_BUILTIN_LIBM(asin)
+    #define simde_math_asin(v) __builtin_asin(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_asin(v) std::asin(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_asin(v) asin(v)
+  #endif
+#endif
+
+#if !defined(simde_math_asinf)
+  #if SIMDE_MATH_BUILTIN_LIBM(asinf)
+    #define simde_math_asinf(v) __builtin_asinf(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_asinf(v) std::asin(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_asinf(v) asinf(v)
+  #endif
+#endif
+
+#if !defined(simde_math_asinh)
+  #if SIMDE_MATH_BUILTIN_LIBM(asinh)
+    #define simde_math_asinh(v) __builtin_asinh(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_asinh(v) std::asinh(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_asinh(v) asinh(v)
+  #endif
+#endif
+
+#if !defined(simde_math_asinhf)
+  #if SIMDE_MATH_BUILTIN_LIBM(asinhf)
+    #define simde_math_asinhf(v) __builtin_asinhf(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_asinhf(v) std::asinh(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_asinhf(v) asinhf(v)
+  #endif
+#endif
+
+#if !defined(simde_math_atan)
+  #if SIMDE_MATH_BUILTIN_LIBM(atan)
+    #define simde_math_atan(v) __builtin_atan(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_atan(v) std::atan(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_atan(v) atan(v)
+  #endif
+#endif
+
+#if !defined(simde_math_atan2)
+  #if SIMDE_MATH_BUILTIN_LIBM(atan2)
+    #define simde_math_atan2(y, x) __builtin_atan2(y, x)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_atan2(y, x) std::atan2(y, x)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_atan2(y, x) atan2(y, x)
+  #endif
+#endif
+
+#if !defined(simde_math_atan2f)
+  #if SIMDE_MATH_BUILTIN_LIBM(atan2f)
+    #define simde_math_atan2f(y, x) __builtin_atan2f(y, x)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_atan2f(y, x) std::atan2(y, x)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_atan2f(y, x) atan2f(y, x)
+  #endif
+#endif
+
+#if !defined(simde_math_atanf)
+  #if SIMDE_MATH_BUILTIN_LIBM(atanf)
+    #define simde_math_atanf(v) __builtin_atanf(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_atanf(v) std::atan(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_atanf(v) atanf(v)
+  #endif
+#endif
+
+#if !defined(simde_math_atanh)
+  #if SIMDE_MATH_BUILTIN_LIBM(atanh)
+    #define simde_math_atanh(v) __builtin_atanh(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_atanh(v) std::atanh(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_atanh(v) atanh(v)
+  #endif
+#endif
+
+#if !defined(simde_math_atanhf)
+  #if SIMDE_MATH_BUILTIN_LIBM(atanhf)
+    #define simde_math_atanhf(v) __builtin_atanhf(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_atanhf(v) std::atanh(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_atanhf(v) atanhf(v)
+  #endif
+#endif
+
+#if !defined(simde_math_cbrt)
+  #if SIMDE_MATH_BUILTIN_LIBM(cbrt)
+    #define simde_math_cbrt(v) __builtin_cbrt(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_cbrt(v) std::cbrt(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_cbrt(v) cbrt(v)
+  #endif
+#endif
+
+#if !defined(simde_math_cbrtf)
+  #if SIMDE_MATH_BUILTIN_LIBM(cbrtf)
+    #define simde_math_cbrtf(v) __builtin_cbrtf(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_cbrtf(v) std::cbrt(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_cbrtf(v) cbrtf(v)
+  #endif
+#endif
+
+#if !defined(simde_math_ceil)
+  #if SIMDE_MATH_BUILTIN_LIBM(ceil)
+    #define simde_math_ceil(v) __builtin_ceil(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_ceil(v) std::ceil(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_ceil(v) ceil(v)
+  #endif
+#endif
+
+#if !defined(simde_math_ceilf)
+  #if SIMDE_MATH_BUILTIN_LIBM(ceilf)
+    #define simde_math_ceilf(v) __builtin_ceilf(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_ceilf(v) std::ceil(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_ceilf(v) ceilf(v)
+  #endif
+#endif
+
+#if !defined(simde_math_copysign)
+  #if SIMDE_MATH_BUILTIN_LIBM(copysign)
+    #define simde_math_copysign(x, y) __builtin_copysign(x, y)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_copysign(x, y) std::copysign(x, y)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_copysign(x, y) copysign(x, y)
+  #endif
+#endif
+
+#if !defined(simde_math_copysignf)
+  #if SIMDE_MATH_BUILTIN_LIBM(copysignf)
+    #define simde_math_copysignf(x, y) __builtin_copysignf(x, y)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_copysignf(x, y) std::copysignf(x, y)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_copysignf(x, y) copysignf(x, y)
+  #endif
+#endif
+
+#if !defined(simde_math_signbit)
+  #if SIMDE_MATH_BUILTIN_LIBM(signbit)
+    #if (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0))
+      #define simde_math_signbit(x) __builtin_signbit(x)
+    #else
+      #define simde_math_signbit(x) __builtin_signbit(HEDLEY_STATIC_CAST(double, (x)))
+    #endif
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_signbit(x) std::signbit(x)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_signbit(x) signbit(x)
+  #endif
+#endif
+
+#if !defined(simde_math_cos)
+  #if SIMDE_MATH_BUILTIN_LIBM(cos)
+    #define simde_math_cos(v) __builtin_cos(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_cos(v) std::cos(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_cos(v) cos(v)
+  #endif
+#endif
+
+#if !defined(simde_math_cosf)
+  #if defined(SIMDE_MATH_SLEEF_ENABLE)
+    #if SIMDE_ACCURACY_PREFERENCE < 1
+      #define simde_math_cosf(v) Sleef_cosf_u35(v)
+    #else
+      #define simde_math_cosf(v) Sleef_cosf_u10(v)
+    #endif
+  #elif SIMDE_MATH_BUILTIN_LIBM(cosf)
+    #define simde_math_cosf(v) __builtin_cosf(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_cosf(v) std::cos(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_cosf(v) cosf(v)
+  #endif
+#endif
+
+#if !defined(simde_math_cosh)
+  #if SIMDE_MATH_BUILTIN_LIBM(cosh)
+    #define simde_math_cosh(v) __builtin_cosh(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_cosh(v) std::cosh(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_cosh(v) cosh(v)
+  #endif
+#endif
+
+#if !defined(simde_math_coshf)
+  #if SIMDE_MATH_BUILTIN_LIBM(coshf)
+    #define simde_math_coshf(v) __builtin_coshf(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_coshf(v) std::cosh(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_coshf(v) coshf(v)
+  #endif
+#endif
+
+#if !defined(simde_math_erf)
+  #if SIMDE_MATH_BUILTIN_LIBM(erf)
+    #define simde_math_erf(v) __builtin_erf(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_erf(v) std::erf(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_erf(v) erf(v)
+  #endif
+#endif
+
+#if !defined(simde_math_erff)
+  #if SIMDE_MATH_BUILTIN_LIBM(erff)
+    #define simde_math_erff(v) __builtin_erff(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_erff(v) std::erf(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_erff(v) erff(v)
+  #endif
+#endif
+
+#if !defined(simde_math_erfc)
+  #if SIMDE_MATH_BUILTIN_LIBM(erfc)
+    #define simde_math_erfc(v) __builtin_erfc(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_erfc(v) std::erfc(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_erfc(v) erfc(v)
+  #endif
+#endif
+
+#if !defined(simde_math_erfcf)
+  #if SIMDE_MATH_BUILTIN_LIBM(erfcf)
+    #define simde_math_erfcf(v) __builtin_erfcf(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_erfcf(v) std::erfc(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_erfcf(v) erfcf(v)
+  #endif
+#endif
+
+#if !defined(simde_math_exp)
+  #if SIMDE_MATH_BUILTIN_LIBM(exp)
+    #define simde_math_exp(v) __builtin_exp(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_exp(v) std::exp(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_exp(v) exp(v)
+  #endif
+#endif
+
+#if !defined(simde_math_expf)
+  #if SIMDE_MATH_BUILTIN_LIBM(expf)
+    #define simde_math_expf(v) __builtin_expf(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_expf(v) std::exp(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_expf(v) expf(v)
+  #endif
+#endif
+
+#if !defined(simde_math_expm1)
+  #if SIMDE_MATH_BUILTIN_LIBM(expm1)
+    #define simde_math_expm1(v) __builtin_expm1(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_expm1(v) std::expm1(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_expm1(v) expm1(v)
+  #endif
+#endif
+
+#if !defined(simde_math_expm1f)
+  #if SIMDE_MATH_BUILTIN_LIBM(expm1f)
+    #define simde_math_expm1f(v) __builtin_expm1f(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_expm1f(v) std::expm1(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_expm1f(v) expm1f(v)
+  #endif
+#endif
+
+#if !defined(simde_math_exp2)
+  #if SIMDE_MATH_BUILTIN_LIBM(exp2)
+    #define simde_math_exp2(v) __builtin_exp2(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_exp2(v) std::exp2(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_exp2(v) exp2(v)
+  #endif
+#endif
+
+#if !defined(simde_math_exp2f)
+  #if SIMDE_MATH_BUILTIN_LIBM(exp2f)
+    #define simde_math_exp2f(v) __builtin_exp2f(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_exp2f(v) std::exp2(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_exp2f(v) exp2f(v)
+  #endif
+#endif
+
+#if HEDLEY_HAS_BUILTIN(__builtin_exp10) ||  HEDLEY_GCC_VERSION_CHECK(3,4,0)
+  #  define simde_math_exp10(v) __builtin_exp10(v)
+#else
+#  define simde_math_exp10(v) pow(10.0, (v))
+#endif
+
+#if HEDLEY_HAS_BUILTIN(__builtin_exp10f) ||  HEDLEY_GCC_VERSION_CHECK(3,4,0)
+  #  define simde_math_exp10f(v) __builtin_exp10f(v)
+#else
+#  define simde_math_exp10f(v) powf(10.0f, (v))
+#endif
+
+#if !defined(simde_math_fabs)
+  #if SIMDE_MATH_BUILTIN_LIBM(fabs)
+    #define simde_math_fabs(v) __builtin_fabs(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_fabs(v) std::fabs(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_fabs(v) fabs(v)
+  #endif
+#endif
+
+#if !defined(simde_math_fabsf)
+  #if SIMDE_MATH_BUILTIN_LIBM(fabsf)
+    #define simde_math_fabsf(v) __builtin_fabsf(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_fabsf(v) std::fabs(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_fabsf(v) fabsf(v)
+  #endif
+#endif
+
+#if !defined(simde_math_floor)
+  #if SIMDE_MATH_BUILTIN_LIBM(floor)
+    #define simde_math_floor(v) __builtin_floor(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_floor(v) std::floor(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_floor(v) floor(v)
+  #endif
+#endif
+
+#if !defined(simde_math_floorf)
+  #if SIMDE_MATH_BUILTIN_LIBM(floorf)
+    #define simde_math_floorf(v) __builtin_floorf(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_floorf(v) std::floor(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_floorf(v) floorf(v)
+  #endif
+#endif
+
+#if !defined(simde_math_fma)
+  #if SIMDE_MATH_BUILTIN_LIBM(fma)
+    #define simde_math_fma(x, y, z) __builtin_fma(x, y, z)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_fma(x, y, z) std::fma(x, y, z)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_fma(x, y, z) fma(x, y, z)
+  #endif
+#endif
+
+#if !defined(simde_math_fmaf)
+  #if SIMDE_MATH_BUILTIN_LIBM(fmaf)
+    #define simde_math_fmaf(x, y, z) __builtin_fmaf(x, y, z)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_fmaf(x, y, z) std::fma(x, y, z)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_fmaf(x, y, z) fmaf(x, y, z)
+  #endif
+#endif
+
+#if !defined(simde_math_fmax)
+  #if SIMDE_MATH_BUILTIN_LIBM(fmax)
+    #define simde_math_fmax(x, y) __builtin_fmax(x, y)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_fmax(x, y) std::fmax(x, y)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_fmax(x, y) fmax(x, y)
+  #endif
+#endif
+
+#if !defined(simde_math_fmaxf)
+  #if SIMDE_MATH_BUILTIN_LIBM(fmaxf)
+    #define simde_math_fmaxf(x, y) __builtin_fmaxf(x, y)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_fmaxf(x, y) std::fmax(x, y)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_fmaxf(x, y) fmaxf(x, y)
+  #endif
+#endif
+
+#if !defined(simde_math_hypot)
+  #if SIMDE_MATH_BUILTIN_LIBM(hypot)
+    #define simde_math_hypot(y, x) __builtin_hypot(y, x)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_hypot(y, x) std::hypot(y, x)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_hypot(y, x) hypot(y, x)
+  #endif
+#endif
+
+#if !defined(simde_math_hypotf)
+  #if SIMDE_MATH_BUILTIN_LIBM(hypotf)
+    #define simde_math_hypotf(y, x) __builtin_hypotf(y, x)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_hypotf(y, x) std::hypot(y, x)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_hypotf(y, x) hypotf(y, x)
+  #endif
+#endif
+
+#if !defined(simde_math_log)
+  #if SIMDE_MATH_BUILTIN_LIBM(log)
+    #define simde_math_log(v) __builtin_log(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_log(v) std::log(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_log(v) log(v)
+  #endif
+#endif
+
+#if !defined(simde_math_logf)
+  #if SIMDE_MATH_BUILTIN_LIBM(logf)
+    #define simde_math_logf(v) __builtin_logf(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_logf(v) std::log(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_logf(v) logf(v)
+  #endif
+#endif
+
+#if !defined(simde_math_logb)
+  #if SIMDE_MATH_BUILTIN_LIBM(logb)
+    #define simde_math_logb(v) __builtin_logb(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_logb(v) std::logb(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_logb(v) logb(v)
+  #endif
+#endif
+
+#if !defined(simde_math_logbf)
+  #if SIMDE_MATH_BUILTIN_LIBM(logbf)
+    #define simde_math_logbf(v) __builtin_logbf(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_logbf(v) std::logb(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_logbf(v) logbf(v)
+  #endif
+#endif
+
+#if !defined(simde_math_log1p)
+  #if SIMDE_MATH_BUILTIN_LIBM(log1p)
+    #define simde_math_log1p(v) __builtin_log1p(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_log1p(v) std::log1p(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_log1p(v) log1p(v)
+  #endif
+#endif
+
+#if !defined(simde_math_log1pf)
+  #if SIMDE_MATH_BUILTIN_LIBM(log1pf)
+    #define simde_math_log1pf(v) __builtin_log1pf(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_log1pf(v) std::log1p(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_log1pf(v) log1pf(v)
+  #endif
+#endif
+
+#if !defined(simde_math_log2)
+  #if SIMDE_MATH_BUILTIN_LIBM(log2)
+    #define simde_math_log2(v) __builtin_log2(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_log2(v) std::log2(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_log2(v) log2(v)
+  #endif
+#endif
+
+#if !defined(simde_math_log2f)
+  #if SIMDE_MATH_BUILTIN_LIBM(log2f)
+    #define simde_math_log2f(v) __builtin_log2f(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_log2f(v) std::log2(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_log2f(v) log2f(v)
+  #endif
+#endif
+
+#if !defined(simde_math_log10)
+  #if SIMDE_MATH_BUILTIN_LIBM(log10)
+    #define simde_math_log10(v) __builtin_log10(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_log10(v) std::log10(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_log10(v) log10(v)
+  #endif
+#endif
+
+#if !defined(simde_math_log10f)
+  #if SIMDE_MATH_BUILTIN_LIBM(log10f)
+    #define simde_math_log10f(v) __builtin_log10f(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_log10f(v) std::log10(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_log10f(v) log10f(v)
+  #endif
+#endif
+
+#if !defined(simde_math_modf)
+  #if SIMDE_MATH_BUILTIN_LIBM(modf)
+    #define simde_math_modf(x, iptr) __builtin_modf(x, iptr)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_modf(x, iptr) std::modf(x, iptr)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_modf(x, iptr) modf(x, iptr)
+  #endif
+#endif
+
+#if !defined(simde_math_modff)
+  #if SIMDE_MATH_BUILTIN_LIBM(modff)
+    #define simde_math_modff(x, iptr) __builtin_modff(x, iptr)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_modff(x, iptr) std::modf(x, iptr)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_modff(x, iptr) modff(x, iptr)
+  #endif
+#endif
+
+#if !defined(simde_math_nearbyint)
+  #if SIMDE_MATH_BUILTIN_LIBM(nearbyint)
+    #define simde_math_nearbyint(v) __builtin_nearbyint(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_nearbyint(v) std::nearbyint(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_nearbyint(v) nearbyint(v)
+  #endif
+#endif
+
+#if !defined(simde_math_nearbyintf)
+  #if SIMDE_MATH_BUILTIN_LIBM(nearbyintf)
+    #define simde_math_nearbyintf(v) __builtin_nearbyintf(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_nearbyintf(v) std::nearbyint(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_nearbyintf(v) nearbyintf(v)
+  #endif
+#endif
+
+#if !defined(simde_math_pow)
+  #if SIMDE_MATH_BUILTIN_LIBM(pow)
+    #define simde_math_pow(y, x) __builtin_pow(y, x)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_pow(y, x) std::pow(y, x)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_pow(y, x) pow(y, x)
+  #endif
+#endif
+
+#if !defined(simde_math_powf)
+  #if SIMDE_MATH_BUILTIN_LIBM(powf)
+    #define simde_math_powf(y, x) __builtin_powf(y, x)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_powf(y, x) std::pow(y, x)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_powf(y, x) powf(y, x)
+  #endif
+#endif
+
+#if !defined(simde_math_rint)
+  #if SIMDE_MATH_BUILTIN_LIBM(rint)
+    #define simde_math_rint(v) __builtin_rint(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_rint(v) std::rint(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_rint(v) rint(v)
+  #endif
+#endif
+
+#if !defined(simde_math_rintf)
+  #if SIMDE_MATH_BUILTIN_LIBM(rintf)
+    #define simde_math_rintf(v) __builtin_rintf(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_rintf(v) std::rint(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_rintf(v) rintf(v)
+  #endif
+#endif
+
+#if !defined(simde_math_round)
+  #if SIMDE_MATH_BUILTIN_LIBM(round)
+    #define simde_math_round(v) __builtin_round(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_round(v) std::round(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_round(v) round(v)
+  #endif
+#endif
+
+#if !defined(simde_math_roundf)
+  #if SIMDE_MATH_BUILTIN_LIBM(roundf)
+    #define simde_math_roundf(v) __builtin_roundf(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_roundf(v) std::round(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_roundf(v) roundf(v)
+  #endif
+#endif
+
+#if !defined(simde_math_roundeven)
+  #if \
+     ((!defined(HEDLEY_EMSCRIPTEN_VERSION) || HEDLEY_EMSCRIPTEN_VERSION_CHECK(3, 1, 43)) && HEDLEY_HAS_BUILTIN(__builtin_roundeven)) || \
+      HEDLEY_GCC_VERSION_CHECK(10,0,0)
+    #define simde_math_roundeven(v) __builtin_roundeven(v)
+  #elif defined(simde_math_round) && defined(simde_math_fabs)
+    static HEDLEY_INLINE
+    double
+    simde_math_roundeven(double v) {
+      double rounded = simde_math_round(v);
+      double diff = rounded - v;
+      if (HEDLEY_UNLIKELY(simde_math_fabs(diff) == 0.5) && (HEDLEY_STATIC_CAST(int64_t, rounded) & 1)) {
+        rounded = v - diff;
+      }
+      return rounded;
+    }
+    #define simde_math_roundeven simde_math_roundeven
+  #endif
+#endif
+
+#if !defined(simde_math_roundevenf)
+  #if \
+     ((!defined(HEDLEY_EMSCRIPTEN_VERSION) || HEDLEY_EMSCRIPTEN_VERSION_CHECK(3, 1, 43)) && HEDLEY_HAS_BUILTIN(__builtin_roundevenf)) || \
+      HEDLEY_GCC_VERSION_CHECK(10,0,0)
+    #define simde_math_roundevenf(v) __builtin_roundevenf(v)
+  #elif defined(simde_math_roundf) && defined(simde_math_fabsf)
+    static HEDLEY_INLINE
+    float
+    simde_math_roundevenf(float v) {
+      float rounded = simde_math_roundf(v);
+      float diff = rounded - v;
+      if (HEDLEY_UNLIKELY(simde_math_fabsf(diff) == 0.5f) && (HEDLEY_STATIC_CAST(int32_t, rounded) & 1)) {
+        rounded = v - diff;
+      }
+      return rounded;
+    }
+    #define simde_math_roundevenf simde_math_roundevenf
+  #endif
+#endif
+
+#if !defined(simde_math_sin)
+  #if SIMDE_MATH_BUILTIN_LIBM(sin)
+    #define simde_math_sin(v) __builtin_sin(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_sin(v) std::sin(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_sin(v) sin(v)
+  #endif
+#endif
+
+#if !defined(simde_math_sinf)
+  #if SIMDE_MATH_BUILTIN_LIBM(sinf)
+    #define simde_math_sinf(v) __builtin_sinf(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_sinf(v) std::sin(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_sinf(v) sinf(v)
+  #endif
+#endif
+
+#if !defined(simde_math_sinh)
+  #if SIMDE_MATH_BUILTIN_LIBM(sinh)
+    #define simde_math_sinh(v) __builtin_sinh(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_sinh(v) std::sinh(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_sinh(v) sinh(v)
+  #endif
+#endif
+
+#if !defined(simde_math_sinhf)
+  #if SIMDE_MATH_BUILTIN_LIBM(sinhf)
+    #define simde_math_sinhf(v) __builtin_sinhf(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_sinhf(v) std::sinh(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_sinhf(v) sinhf(v)
+  #endif
+#endif
+
+#if !defined(simde_math_sqrt)
+  #if SIMDE_MATH_BUILTIN_LIBM(sqrt)
+    #define simde_math_sqrt(v) __builtin_sqrt(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_sqrt(v) std::sqrt(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_sqrt(v) sqrt(v)
+  #endif
+#endif
+
+#if !defined(simde_math_sqrtf)
+  #if SIMDE_MATH_BUILTIN_LIBM(sqrtf)
+    #define simde_math_sqrtf(v) __builtin_sqrtf(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_sqrtf(v) std::sqrt(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_sqrtf(v) sqrtf(v)
+  #endif
+#endif
+
+#if !defined(simde_math_sqrtl)
+  #if SIMDE_MATH_BUILTIN_LIBM(sqrtl)
+    #define simde_math_sqrtl(v) __builtin_sqrtl(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_sqrtl(v) std::sqrt(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_sqrtl(v) sqrtl(v)
+  #endif
+#endif
+
+#if !defined(simde_math_tan)
+  #if SIMDE_MATH_BUILTIN_LIBM(tan)
+    #define simde_math_tan(v) __builtin_tan(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_tan(v) std::tan(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_tan(v) tan(v)
+  #endif
+#endif
+
+#if !defined(simde_math_tanf)
+  #if SIMDE_MATH_BUILTIN_LIBM(tanf)
+    #define simde_math_tanf(v) __builtin_tanf(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_tanf(v) std::tan(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_tanf(v) tanf(v)
+  #endif
+#endif
+
+#if !defined(simde_math_tanh)
+  #if SIMDE_MATH_BUILTIN_LIBM(tanh)
+    #define simde_math_tanh(v) __builtin_tanh(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_tanh(v) std::tanh(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_tanh(v) tanh(v)
+  #endif
+#endif
+
+#if !defined(simde_math_tanhf)
+  #if SIMDE_MATH_BUILTIN_LIBM(tanhf)
+    #define simde_math_tanhf(v) __builtin_tanhf(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_tanhf(v) std::tanh(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_tanhf(v) tanhf(v)
+  #endif
+#endif
+
+#if !defined(simde_math_trunc)
+  #if SIMDE_MATH_BUILTIN_LIBM(trunc)
+    #define simde_math_trunc(v) __builtin_trunc(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_trunc(v) std::trunc(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_trunc(v) trunc(v)
+  #endif
+#endif
+
+#if !defined(simde_math_truncf)
+  #if SIMDE_MATH_BUILTIN_LIBM(truncf)
+    #define simde_math_truncf(v) __builtin_truncf(v)
+  #elif defined(SIMDE_MATH_HAVE_CMATH)
+    #define simde_math_truncf(v) std::trunc(v)
+  #elif defined(SIMDE_MATH_HAVE_MATH_H)
+    #define simde_math_truncf(v) truncf(v)
+  #endif
+#endif
+
+/*** Comparison macros (which don't raise invalid errors) ***/
+
+#if defined(isunordered)
+  #define simde_math_isunordered(x, y) isunordered(x, y)
+#elif HEDLEY_HAS_BUILTIN(__builtin_isunordered)
+  #define simde_math_isunordered(x, y) __builtin_isunordered(x, y)
+#else
+  static HEDLEY_INLINE
+  int simde_math_isunordered(double x, double y) {
+    return (x != y) && (x != x || y != y);
+  }
+  #define simde_math_isunordered simde_math_isunordered
+
+  static HEDLEY_INLINE
+  int simde_math_isunorderedf(float x, float y) {
+    return (x != y) && (x != x || y != y);
+  }
+  #define simde_math_isunorderedf simde_math_isunorderedf
+#endif
+#if !defined(simde_math_isunorderedf)
+  #define simde_math_isunorderedf simde_math_isunordered
+#endif
+
+/*** Additional functions not in libm ***/
+
+#if defined(simde_math_fabs) && defined(simde_math_sqrt) && defined(simde_math_exp)
+  static HEDLEY_INLINE
+  double
+  simde_math_cdfnorm(double x) {
+    /* https://www.johndcook.com/blog/cpp_phi/
+    * Public Domain */
+    static const double a1 =  0.254829592;
+    static const double a2 = -0.284496736;
+    static const double a3 =  1.421413741;
+    static const double a4 = -1.453152027;
+    static const double a5 =  1.061405429;
+    static const double p  =  0.3275911;
+
+    const int sign = x < 0;
+    x = simde_math_fabs(x) / simde_math_sqrt(2.0);
+
+    /* A&S formula 7.1.26 */
+    double t = 1.0 / (1.0 + p * x);
+    double y = 1.0 - (((((a5 * t + a4) * t) + a3) * t + a2) * t + a1) * t * simde_math_exp(-x * x);
+
+    return 0.5 * (1.0 + (sign ? -y : y));
+  }
+  #define simde_math_cdfnorm simde_math_cdfnorm
+#endif
+
+#if defined(simde_math_fabsf) && defined(simde_math_sqrtf) && defined(simde_math_expf)
+  static HEDLEY_INLINE
+  float
+  simde_math_cdfnormf(float x) {
+    /* https://www.johndcook.com/blog/cpp_phi/
+    * Public Domain */
+    static const float a1 =  0.254829592f;
+    static const float a2 = -0.284496736f;
+    static const float a3 =  1.421413741f;
+    static const float a4 = -1.453152027f;
+    static const float a5 =  1.061405429f;
+    static const float p  =  0.3275911f;
+
+    const int sign = x < 0;
+    x = simde_math_fabsf(x) / simde_math_sqrtf(2.0f);
+
+    /* A&S formula 7.1.26 */
+    float t = 1.0f / (1.0f + p * x);
+    float y = 1.0f - (((((a5 * t + a4) * t) + a3) * t + a2) * t + a1) * t * simde_math_expf(-x * x);
+
+    return 0.5f * (1.0f + (sign ? -y : y));
+  }
+  #define simde_math_cdfnormf simde_math_cdfnormf
+#endif
+
+#if !defined(simde_math_cdfnorminv) && defined(simde_math_log) && defined(simde_math_sqrt)
+  /*https://web.archive.org/web/20150910081113/http://home.online.no/~pjacklam/notes/invnorm/impl/sprouse/ltqnorm.c*/
+  static HEDLEY_INLINE
+  double
+  simde_math_cdfnorminv(double p) {
+    static const double a[6] = {
+      -3.969683028665376e+01,
+       2.209460984245205e+02,
+      -2.759285104469687e+02,
+       1.383577518672690e+02,
+      -3.066479806614716e+01,
+       2.506628277459239e+00
+    };
+
+    static const double b[5] = {
+      -5.447609879822406e+01,
+       1.615858368580409e+02,
+      -1.556989798598866e+02,
+       6.680131188771972e+01,
+      -1.328068155288572e+01
+    };
+
+    static const double c[6] = {
+      -7.784894002430293e-03,
+      -3.223964580411365e-01,
+      -2.400758277161838e+00,
+      -2.549732539343734e+00,
+       4.374664141464968e+00,
+       2.938163982698783e+00
+    };
+
+    static const double d[4] = {
+      7.784695709041462e-03,
+      3.224671290700398e-01,
+      2.445134137142996e+00,
+      3.754408661907416e+00
+    };
+
+    static const double low  = 0.02425;
+    static const double high = 0.97575;
+    double q, r;
+
+    if (p < 0 || p > 1) {
+      return 0.0;
+    } else if (p == 0) {
+      return -SIMDE_MATH_INFINITY;
+    } else if (p == 1) {
+      return SIMDE_MATH_INFINITY;
+    } else if (p < low) {
+      q = simde_math_sqrt(-2.0 * simde_math_log(p));
+      return
+        (((((c[0] * q + c[1]) * q + c[2]) * q + c[3]) * q + c[4]) * q + c[5]) /
+        (((((d[0] * q + d[1]) * q + d[2]) * q + d[3]) * q + 1));
+    } else if (p > high) {
+      q = simde_math_sqrt(-2.0 * simde_math_log(1.0 - p));
+      return
+        -(((((c[0] * q + c[1]) * q + c[2]) * q + c[3]) * q + c[4]) * q + c[5]) /
+         (((((d[0] * q + d[1]) * q + d[2]) * q + d[3]) * q + 1));
+    } else {
+      q = p - 0.5;
+      r = q * q;
+      return (((((a[0] * r + a[1]) * r + a[2]) * r + a[3]) * r + a[4]) * r + a[5]) *
+        q / (((((b[0] * r + b[1]) * r + b[2]) * r + b[3]) * r + b[4]) * r + 1);
+    }
+}
+#define simde_math_cdfnorminv simde_math_cdfnorminv
+#endif
+
+#if !defined(simde_math_cdfnorminvf) && defined(simde_math_logf) && defined(simde_math_sqrtf)
+  static HEDLEY_INLINE
+  float
+  simde_math_cdfnorminvf(float p) {
+    static const float a[6] = {
+      -3.969683028665376e+01f,
+       2.209460984245205e+02f,
+      -2.759285104469687e+02f,
+       1.383577518672690e+02f,
+      -3.066479806614716e+01f,
+       2.506628277459239e+00f
+    };
+    static const float b[5] = {
+      -5.447609879822406e+01f,
+       1.615858368580409e+02f,
+      -1.556989798598866e+02f,
+       6.680131188771972e+01f,
+      -1.328068155288572e+01f
+    };
+    static const float c[6] = {
+      -7.784894002430293e-03f,
+      -3.223964580411365e-01f,
+      -2.400758277161838e+00f,
+      -2.549732539343734e+00f,
+       4.374664141464968e+00f,
+       2.938163982698783e+00f
+    };
+    static const float d[4] = {
+      7.784695709041462e-03f,
+      3.224671290700398e-01f,
+      2.445134137142996e+00f,
+      3.754408661907416e+00f
+    };
+    static const float low  = 0.02425f;
+    static const float high = 0.97575f;
+    float q, r;
+
+    if (p < 0 || p > 1) {
+      return 0.0f;
+    } else if (p == 0) {
+      return -SIMDE_MATH_INFINITYF;
+    } else if (p == 1) {
+      return SIMDE_MATH_INFINITYF;
+    } else if (p < low) {
+      q = simde_math_sqrtf(-2.0f * simde_math_logf(p));
+      return
+        (((((c[0] * q + c[1]) * q + c[2]) * q + c[3]) * q + c[4]) * q + c[5]) /
+        (((((d[0] * q + d[1]) * q + d[2]) * q + d[3]) * q + 1));
+    } else if (p > high) {
+      q = simde_math_sqrtf(-2.0f * simde_math_logf(1.0f - p));
+      return
+        -(((((c[0] * q + c[1]) * q + c[2]) * q + c[3]) * q + c[4]) * q + c[5]) /
+         (((((d[0] * q + d[1]) * q + d[2]) * q + d[3]) * q + 1));
+    } else {
+      q = p - 0.5f;
+      r = q * q;
+      return (((((a[0] * r + a[1]) * r + a[2]) * r + a[3]) * r + a[4]) * r + a[5]) *
+         q / (((((b[0] * r + b[1]) * r + b[2]) * r + b[3]) * r + b[4]) * r + 1);
+    }
+  }
+  #define simde_math_cdfnorminvf simde_math_cdfnorminvf
+#endif
+
+#if !defined(simde_math_erfinv) && defined(simde_math_log) && defined(simde_math_copysign) && defined(simde_math_sqrt)
+  static HEDLEY_INLINE
+  double
+  simde_math_erfinv(double x) {
+    /* https://stackoverflow.com/questions/27229371/inverse-error-function-in-c
+     *
+     * The original answer on SO uses a constant of 0.147, but in my
+     * testing 0.14829094707965850830078125 gives a lower average absolute error
+     * (0.0001410958211636170744895935 vs. 0.0001465479290345683693885803).
+     * That said, if your goal is to minimize the *maximum* absolute
+     * error, 0.15449436008930206298828125 provides significantly better
+     * results; 0.0009250640869140625000000000 vs ~ 0.005. */
+    double tt1, tt2, lnx;
+    double sgn = simde_math_copysign(1.0, x);
+
+    x = (1.0 - x) * (1.0 + x);
+    lnx = simde_math_log(x);
+
+    tt1 = 2.0 / (SIMDE_MATH_PI * 0.14829094707965850830078125) + 0.5 * lnx;
+    tt2 = (1.0 / 0.14829094707965850830078125) * lnx;
+
+    return sgn * simde_math_sqrt(-tt1 + simde_math_sqrt(tt1 * tt1 - tt2));
+  }
+  #define simde_math_erfinv simde_math_erfinv
+#endif
+
+#if !defined(simde_math_erfinvf) && defined(simde_math_logf) && defined(simde_math_copysignf) && defined(simde_math_sqrtf)
+  static HEDLEY_INLINE
+  float
+  simde_math_erfinvf(float x) {
+    float tt1, tt2, lnx;
+    float sgn = simde_math_copysignf(1.0f, x);
+
+    x = (1.0f - x) * (1.0f + x);
+    lnx = simde_math_logf(x);
+
+    tt1 = 2.0f / (SIMDE_MATH_PIF * 0.14829094707965850830078125f) + 0.5f * lnx;
+    tt2 = (1.0f / 0.14829094707965850830078125f) * lnx;
+
+    return sgn * simde_math_sqrtf(-tt1 + simde_math_sqrtf(tt1 * tt1 - tt2));
+  }
+  #define simde_math_erfinvf simde_math_erfinvf
+#endif
+
+#if !defined(simde_math_erfcinv) && defined(simde_math_erfinv) && defined(simde_math_log) && defined(simde_math_sqrt)
+  static HEDLEY_INLINE
+  double
+  simde_math_erfcinv(double x) {
+    if(x >= 0.0625 && x < 2.0) {
+      return simde_math_erfinv(1.0 - x);
+    } else if (x < 0.0625 && x >= 1.0e-100) {
+      static const double p[6] = {
+        0.1550470003116,
+        1.382719649631,
+        0.690969348887,
+        -1.128081391617,
+        0.680544246825,
+        -0.16444156791
+      };
+      static const double q[3] = {
+        0.155024849822,
+        1.385228141995,
+        1.000000000000
+      };
+
+      const double t = 1.0 / simde_math_sqrt(-simde_math_log(x));
+      return (p[0] / t + p[1] + t * (p[2] + t * (p[3] + t * (p[4] + t * p[5])))) /
+            (q[0] + t * (q[1] + t * (q[2])));
+    } else if (x < 1.0e-100 && x >= SIMDE_MATH_DBL_MIN) {
+      static const double p[4] = {
+        0.00980456202915,
+        0.363667889171,
+        0.97302949837,
+        -0.5374947401
+      };
+      static const double q[3] = {
+        0.00980451277802,
+        0.363699971544,
+        1.000000000000
+      };
+
+      const double t = 1.0 / simde_math_sqrt(-simde_math_log(x));
+      return (p[0] / t + p[1] + t * (p[2] + t * p[3])) /
+             (q[0] + t * (q[1] + t * (q[2])));
+    } else if (!simde_math_isnormal(x)) {
+      return SIMDE_MATH_INFINITY;
+    } else {
+      return -SIMDE_MATH_INFINITY;
+    }
+  }
+
+  #define simde_math_erfcinv simde_math_erfcinv
+#endif
+
+#if !defined(simde_math_erfcinvf) && defined(simde_math_erfinvf) && defined(simde_math_logf) && defined(simde_math_sqrtf)
+  static HEDLEY_INLINE
+  float
+  simde_math_erfcinvf(float x) {
+    if(x >= 0.0625f && x < 2.0f) {
+      return simde_math_erfinvf(1.0f - x);
+    } else if (x < 0.0625f && x >= SIMDE_MATH_FLT_MIN) {
+      static const float p[6] = {
+         0.1550470003116f,
+         1.382719649631f,
+         0.690969348887f,
+        -1.128081391617f,
+         0.680544246825f
+        -0.164441567910f
+      };
+      static const float q[3] = {
+        0.155024849822f,
+        1.385228141995f,
+        1.000000000000f
+      };
+
+      const float t = 1.0f / simde_math_sqrtf(-simde_math_logf(x));
+      return (p[0] / t + p[1] + t * (p[2] + t * (p[3] + t * (p[4] + t * p[5])))) /
+             (q[0] + t * (q[1] + t * (q[2])));
+    } else if (x < SIMDE_MATH_FLT_MIN && simde_math_isnormalf(x)) {
+      static const float p[4] = {
+        0.00980456202915f,
+        0.36366788917100f,
+        0.97302949837000f,
+        -0.5374947401000f
+      };
+      static const float q[3] = {
+        0.00980451277802f,
+        0.36369997154400f,
+        1.00000000000000f
+      };
+
+      const float t = 1.0f / simde_math_sqrtf(-simde_math_logf(x));
+      return (p[0] / t + p[1] + t * (p[2] + t * p[3])) /
+             (q[0] + t * (q[1] + t * (q[2])));
+    } else {
+      return simde_math_isnormalf(x) ? -SIMDE_MATH_INFINITYF : SIMDE_MATH_INFINITYF;
+    }
+  }
+
+  #define simde_math_erfcinvf simde_math_erfcinvf
+#endif
+
+static HEDLEY_INLINE
+double
+simde_math_rad2deg(double radians) {
+ return radians * SIMDE_MATH_180_OVER_PI;
+}
+
+static HEDLEY_INLINE
+float
+simde_math_rad2degf(float radians) {
+    return radians * SIMDE_MATH_180_OVER_PIF;
+}
+
+static HEDLEY_INLINE
+double
+simde_math_deg2rad(double degrees) {
+  return degrees * SIMDE_MATH_PI_OVER_180;
+}
+
+static HEDLEY_INLINE
+float
+simde_math_deg2radf(float degrees) {
+    return degrees * (SIMDE_MATH_PI_OVER_180F);
+}
+
+/***  Saturated arithmetic ***/
+
+static HEDLEY_INLINE
+int8_t
+simde_math_adds_i8(int8_t a, int8_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vqaddb_s8(a, b);
+  #else
+    uint8_t a_ = HEDLEY_STATIC_CAST(uint8_t, a);
+    uint8_t b_ = HEDLEY_STATIC_CAST(uint8_t, b);
+    uint8_t r_ = a_ + b_;
+
+    a_ = (a_ >> ((8 * sizeof(r_)) - 1)) + INT8_MAX;
+    if (HEDLEY_STATIC_CAST(int8_t, ((a_ ^ b_) | ~(b_ ^ r_))) >= 0) {
+      r_ = a_;
+    }
+
+    return HEDLEY_STATIC_CAST(int8_t, r_);
+  #endif
+}
+
+static HEDLEY_INLINE
+int16_t
+simde_math_adds_i16(int16_t a, int16_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vqaddh_s16(a, b);
+  #else
+    uint16_t a_ = HEDLEY_STATIC_CAST(uint16_t, a);
+    uint16_t b_ = HEDLEY_STATIC_CAST(uint16_t, b);
+    uint16_t r_ = a_ + b_;
+
+    a_ = (a_ >> ((8 * sizeof(r_)) - 1)) + INT16_MAX;
+    if (HEDLEY_STATIC_CAST(int16_t, ((a_ ^ b_) | ~(b_ ^ r_))) >= 0) {
+      r_ = a_;
+    }
+
+    return HEDLEY_STATIC_CAST(int16_t, r_);
+  #endif
+}
+
+static HEDLEY_INLINE
+int32_t
+simde_math_adds_i32(int32_t a, int32_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vqadds_s32(a, b);
+  #else
+    uint32_t a_ = HEDLEY_STATIC_CAST(uint32_t, a);
+    uint32_t b_ = HEDLEY_STATIC_CAST(uint32_t, b);
+    uint32_t r_ = a_ + b_;
+
+    a_ = (a_ >> ((8 * sizeof(r_)) - 1)) + INT32_MAX;
+    if (HEDLEY_STATIC_CAST(int32_t, ((a_ ^ b_) | ~(b_ ^ r_))) >= 0) {
+      r_ = a_;
+    }
+
+    return HEDLEY_STATIC_CAST(int32_t, r_);
+  #endif
+}
+
+static HEDLEY_INLINE
+int64_t
+simde_math_adds_i64(int64_t a, int64_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vqaddd_s64(a, b);
+  #else
+    uint64_t a_ = HEDLEY_STATIC_CAST(uint64_t, a);
+    uint64_t b_ = HEDLEY_STATIC_CAST(uint64_t, b);
+    uint64_t r_ = a_ + b_;
+
+    a_ = (a_ >> ((8 * sizeof(r_)) - 1)) + INT64_MAX;
+    if (HEDLEY_STATIC_CAST(int64_t, ((a_ ^ b_) | ~(b_ ^ r_))) >= 0) {
+      r_ = a_;
+    }
+
+    return HEDLEY_STATIC_CAST(int64_t, r_);
+  #endif
+}
+
+static HEDLEY_INLINE
+uint8_t
+simde_math_adds_u8(uint8_t a, uint8_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vqaddb_u8(a, b);
+  #else
+    uint8_t r = a + b;
+    r |= -(r < a);
+    return r;
+  #endif
+}
+
+static HEDLEY_INLINE
+uint16_t
+simde_math_adds_u16(uint16_t a, uint16_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vqaddh_u16(a, b);
+  #else
+    uint16_t r = a + b;
+    r |= -(r < a);
+    return r;
+  #endif
+}
+
+static HEDLEY_INLINE
+uint32_t
+simde_math_adds_u32(uint32_t a, uint32_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vqadds_u32(a, b);
+  #else
+    uint32_t r = a + b;
+    r |= -(r < a);
+    return r;
+  #endif
+}
+
+static HEDLEY_INLINE
+uint64_t
+simde_math_adds_u64(uint64_t a, uint64_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vqaddd_u64(a, b);
+  #else
+    uint64_t r = a + b;
+    r |= -(r < a);
+    return r;
+  #endif
+}
+
+static HEDLEY_INLINE
+int8_t
+simde_math_subs_i8(int8_t a, int8_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vqsubb_s8(a, b);
+  #else
+    uint8_t a_ = HEDLEY_STATIC_CAST(uint8_t, a);
+    uint8_t b_ = HEDLEY_STATIC_CAST(uint8_t, b);
+    uint8_t r_ = a_ - b_;
+
+    a_ = (a_ >> 7) + INT8_MAX;
+
+    if (HEDLEY_STATIC_CAST(int8_t, (a_ ^ b_) & (a_ ^ r_)) < 0) {
+      r_ = a_;
+    }
+
+    return HEDLEY_STATIC_CAST(int8_t, r_);
+  #endif
+}
+
+static HEDLEY_INLINE
+int16_t
+simde_math_subs_i16(int16_t a, int16_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vqsubh_s16(a, b);
+  #else
+    uint16_t a_ = HEDLEY_STATIC_CAST(uint16_t, a);
+    uint16_t b_ = HEDLEY_STATIC_CAST(uint16_t, b);
+    uint16_t r_ = a_ - b_;
+
+    a_ = (a_ >> 15) + INT16_MAX;
+
+    if (HEDLEY_STATIC_CAST(int16_t, (a_ ^ b_) & (a_ ^ r_)) < 0) {
+      r_ = a_;
+    }
+
+    return HEDLEY_STATIC_CAST(int16_t, r_);
+  #endif
+}
+
+static HEDLEY_INLINE
+int32_t
+simde_math_subs_i32(int32_t a, int32_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vqsubs_s32(a, b);
+  #else
+    uint32_t a_ = HEDLEY_STATIC_CAST(uint32_t, a);
+    uint32_t b_ = HEDLEY_STATIC_CAST(uint32_t, b);
+    uint32_t r_ = a_ - b_;
+
+    a_ = (a_ >> 31) + INT32_MAX;
+
+    if (HEDLEY_STATIC_CAST(int32_t, (a_ ^ b_) & (a_ ^ r_)) < 0) {
+      r_ = a_;
+    }
+
+    return HEDLEY_STATIC_CAST(int32_t, r_);
+  #endif
+}
+
+static HEDLEY_INLINE
+int64_t
+simde_math_subs_i64(int64_t a, int64_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vqsubd_s64(a, b);
+  #else
+    uint64_t a_ = HEDLEY_STATIC_CAST(uint64_t, a);
+    uint64_t b_ = HEDLEY_STATIC_CAST(uint64_t, b);
+    uint64_t r_ = a_ - b_;
+
+    a_ = (a_ >> 63) + INT64_MAX;
+
+    if (HEDLEY_STATIC_CAST(int64_t, (a_ ^ b_) & (a_ ^ r_)) < 0) {
+      r_ = a_;
+    }
+
+    return HEDLEY_STATIC_CAST(int64_t, r_);
+  #endif
+}
+
+static HEDLEY_INLINE
+uint8_t
+simde_math_subs_u8(uint8_t a, uint8_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vqsubb_u8(a, b);
+  #else
+    uint8_t res = a - b;
+    res &= -(res <= a);
+    return res;
+  #endif
+}
+
+static HEDLEY_INLINE
+uint16_t
+simde_math_subs_u16(uint16_t a, uint16_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vqsubh_u16(a, b);
+  #else
+    uint16_t res = a - b;
+    res &= -(res <= a);
+    return res;
+  #endif
+}
+
+static HEDLEY_INLINE
+uint32_t
+simde_math_subs_u32(uint32_t a, uint32_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vqsubs_u32(a, b);
+  #else
+    uint32_t res = a - b;
+    res &= -(res <= a);
+    return res;
+  #endif
+}
+
+static HEDLEY_INLINE
+uint64_t
+simde_math_subs_u64(uint64_t a, uint64_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vqsubd_u64(a, b);
+  #else
+    uint64_t res = a - b;
+    res &= -(res <= a);
+    return res;
+  #endif
+}
+
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_MATH_H) */
diff --git a/external_libs/pgenlib/simde/x86/aes.h b/external_libs/pgenlib/simde/x86/aes.h
new file mode 100644
index 0000000..1d5b049
--- /dev/null
+++ b/external_libs/pgenlib/simde/x86/aes.h
@@ -0,0 +1,417 @@
+/* MIT License
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ */
+
+#if !defined(SIMDE_X86_AES_H)
+#define SIMDE_X86_AES_H
+
+/*
+ * Advanced Encryption Standard
+ * @author Dani Huertas
+ * @email huertas.dani@gmail.com
+ *
+ * Based on the document FIPS PUB 197
+ */
+
+#include "sse2.h"
+
+/*
+ * Multiplication in GF(2^8)
+ * http://en.wikipedia.org/wiki/Finite_field_arithmetic
+ * Irreducible polynomial m(x) = x8 + x4 + x3 + x + 1
+ *
+ * NOTE: This function can be easily replaced with a look up table for a speed
+ *       boost, at the expense of an increase in memory size.
+
+SIMDE_FUNCTION_ATTRIBUTES
+uint8_t gmult(uint8_t a, uint8_t b) {
+  uint8_t p = 0, i = 0, hbs = 0;
+
+  for (i = 0; i < 8; i++) {
+    if (b & 1) {
+      p ^= a;
+    }
+
+    hbs = a & 0x80;
+    a <<= 1;
+    if (hbs) a ^= 0x1b; // 0000 0001 0001 1011
+    b >>= 1;
+  }
+
+  return (uint8_t)p;
+}
+ */
+
+#if !(defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO))
+
+#include "../simde-aes.h"
+
+/*
+ * Transformation in the Cipher and Inverse Cipher in which a Round
+ * Key is added to the State using an XOR operation. The length of a
+ * Round Key equals the size of the State (i.e., for Nb = 4, the Round
+ * Key length equals 128 bits/16 bytes).
+ */
+SIMDE_FUNCTION_ATTRIBUTES
+void simde_x_aes_add_round_key(uint8_t *state, simde__m128i_private w, uint8_t r) {
+
+  int Nb = simde_x_aes_Nb;
+  uint8_t c;
+
+  for (c = 0; c < Nb; c++) {
+    state[Nb*0+c] = state[Nb*0+c]^w.u8[4*Nb*r+4*c+0];
+    state[Nb*1+c] = state[Nb*1+c]^w.u8[4*Nb*r+4*c+1];
+    state[Nb*2+c] = state[Nb*2+c]^w.u8[4*Nb*r+4*c+2];
+    state[Nb*3+c] = state[Nb*3+c]^w.u8[4*Nb*r+4*c+3];
+  }
+}
+
+/*
+ * Transformation in the Cipher that takes all of the columns of the
+ * State and mixes their data (independently of one another) to
+ * produce new columns.
+ */
+SIMDE_FUNCTION_ATTRIBUTES
+void simde_x_aes_mix_columns(uint8_t *state) {
+
+  int Nb = simde_x_aes_Nb;
+  // uint8_t k[] = {0x02, 0x01, 0x01, 0x03}; // a(x) = {02} + {01}x + {01}x2 + {03}x3
+  uint8_t i, j, col[4], res[4];
+
+  for (j = 0; j < Nb; j++) {
+    for (i = 0; i < 4; i++) {
+      col[i] = state[Nb*i+j];
+    }
+
+    //coef_mult(k, col, res);
+    simde_x_aes_coef_mult_lookup(0, col, res);
+
+    for (i = 0; i < 4; i++) {
+      state[Nb*i+j] = res[i];
+    }
+  }
+}
+
+/*
+ * Transformation in the Inverse Cipher that is the inverse of
+ * MixColumns().
+ */
+SIMDE_FUNCTION_ATTRIBUTES
+void simde_x_aes_inv_mix_columns(uint8_t *state) {
+
+  int Nb = simde_x_aes_Nb;
+  // uint8_t k[] = {0x0e, 0x09, 0x0d, 0x0b}; // a(x) = {0e} + {09}x + {0d}x2 + {0b}x3
+  uint8_t i, j, col[4], res[4];
+
+  for (j = 0; j < Nb; j++) {
+    for (i = 0; i < 4; i++) {
+      col[i] = state[Nb*i+j];
+    }
+
+    //coef_mult(k, col, res);
+    simde_x_aes_coef_mult_lookup(4, col, res);
+
+    for (i = 0; i < 4; i++) {
+      state[Nb*i+j] = res[i];
+    }
+  }
+}
+
+/*
+ * Transformation in the Cipher that processes the State by cyclically
+ * shifting the last three rows of the State by different offsets.
+ */
+SIMDE_FUNCTION_ATTRIBUTES
+void simde_x_aes_shift_rows(uint8_t *state) {
+
+  int Nb = simde_x_aes_Nb;
+  uint8_t i, k, s, tmp;
+
+  for (i = 1; i < 4; i++) {
+    // shift(1,4)=1; shift(2,4)=2; shift(3,4)=3
+    // shift(r, 4) = r;
+    s = 0;
+    while (s < i) {
+      tmp = state[Nb*i+0];
+
+      for (k = 1; k < Nb; k++) {
+        state[Nb*i+k-1] = state[Nb*i+k];
+      }
+
+      state[Nb*i+Nb-1] = tmp;
+      s++;
+    }
+  }
+}
+
+/*
+ * Transformation in the Inverse Cipher that is the inverse of
+ * ShiftRows().
+ */
+SIMDE_FUNCTION_ATTRIBUTES
+void simde_x_aes_inv_shift_rows(uint8_t *state) {
+
+  uint8_t Nb = simde_x_aes_Nb;
+  uint8_t i, k, s, tmp;
+
+  for (i = 1; i < 4; i++) {
+    s = 0;
+    while (s < i) {
+      tmp = state[Nb*i+Nb-1];
+
+      for (k = Nb-1; k > 0; k--) {
+        state[Nb*i+k] = state[Nb*i+k-1];
+      }
+
+      state[Nb*i+0] = tmp;
+      s++;
+    }
+  }
+}
+
+/*
+ * Transformation in the Cipher that processes the State using a non
+ * linear byte substitution table (S-box) that operates on each of the
+ * State bytes independently.
+ */
+SIMDE_FUNCTION_ATTRIBUTES
+void simde_x_aes_sub_bytes(uint8_t *state) {
+
+  int Nb = simde_x_aes_Nb;
+  uint8_t i, j;
+
+  for (i = 0; i < 4; i++) {
+    for (j = 0; j < Nb; j++) {
+      // s_box row: yyyy ----
+      // s_box col: ---- xxxx
+      // s_box[16*(yyyy) + xxxx] == s_box[yyyyxxxx]
+      state[Nb*i+j] = simde_x_aes_s_box[state[Nb*i+j]];
+    }
+  }
+}
+
+/*
+ * Transformation in the Inverse Cipher that is the inverse of
+ * SubBytes().
+ */
+SIMDE_FUNCTION_ATTRIBUTES
+void simde_x_aes_inv_sub_bytes(uint8_t *state) {
+
+  int Nb = simde_x_aes_Nb;
+  uint8_t i, j;
+
+  for (i = 0; i < 4; i++) {
+    for (j = 0; j < Nb; j++) {
+      state[Nb*i+j] = simde_x_aes_inv_s_box[state[Nb*i+j]];
+    }
+  }
+}
+
+/*
+ * Performs the AES cipher operation
+ */
+SIMDE_FUNCTION_ATTRIBUTES
+void simde_x_aes_enc(simde__m128i_private in, simde__m128i_private *out, simde__m128i_private w, int is_last) {
+
+  int Nb = simde_x_aes_Nb;
+  uint8_t state[4*simde_x_aes_Nb];
+  uint8_t r = 0, i, j;
+
+  for (i = 0; i < 4; i++) {
+    for (j = 0; j < Nb; j++) {
+      state[Nb*i+j] = in.u8[i+4*j];
+    }
+  }
+
+  simde_x_aes_sub_bytes(state);
+  simde_x_aes_shift_rows(state);
+
+  if (!is_last)
+    simde_x_aes_mix_columns(state);
+
+  simde_x_aes_add_round_key(state, w, r);
+
+  for (i = 0; i < 4; i++) {
+    for (j = 0; j < Nb; j++) {
+      out->u8[i+4*j] = state[Nb*i+j];
+    }
+  }
+}
+
+/*
+ * Performs the AES inverse cipher operation
+ */
+SIMDE_FUNCTION_ATTRIBUTES
+void simde_x_aes_dec(simde__m128i_private in, simde__m128i_private *out, simde__m128i_private w, int is_last) {
+
+  int Nb = simde_x_aes_Nb;
+  uint8_t state[4*simde_x_aes_Nb];
+  uint8_t r = 0, i, j;
+
+  for (i = 0; i < 4; i++) {
+    for (j = 0; j < Nb; j++) {
+      state[Nb*i+j] = in.u8[i+4*j];
+    }
+  }
+
+  simde_x_aes_inv_shift_rows(state);
+  simde_x_aes_inv_sub_bytes(state);
+
+  if (!is_last)
+    simde_x_aes_inv_mix_columns(state);
+
+  simde_x_aes_add_round_key(state, w, r);
+
+  for (i = 0; i < 4; i++) {
+    for (j = 0; j < Nb; j++) {
+      out->u8[i+4*j] = state[Nb*i+j];
+    }
+  }
+}
+#endif // if !(defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO))
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i simde_mm_aesenc_si128(simde__m128i a, simde__m128i round_key) {
+  #if defined(SIMDE_X86_AES_NATIVE)
+    return _mm_aesenc_si128(a, round_key);
+  #else
+    simde__m128i_private result_;
+    simde__m128i_private a_ = simde__m128i_to_private(a);
+    simde__m128i_private round_key_ = simde__m128i_to_private(round_key);
+    #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)
+      result_.neon_u8 = veorq_u8(
+        vaesmcq_u8(vaeseq_u8(a_.neon_u8, vdupq_n_u8(0))),
+        round_key_.neon_u8);
+    #else
+      simde_x_aes_enc(a_, &result_, round_key_, 0);
+    #endif
+    return simde__m128i_from_private(result_);
+  #endif
+}
+#if defined(SIMDE_X86_AES_ENABLE_NATIVE_ALIASES)
+  #define _mm_aesenc_si128(a, b) simde_mm_aesenc_si128(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i simde_mm_aesdec_si128(simde__m128i a, simde__m128i round_key) {
+  #if defined(SIMDE_X86_AES_NATIVE)
+    return _mm_aesdec_si128(a, round_key);
+  #else
+    simde__m128i_private result_;
+    simde__m128i_private a_ = simde__m128i_to_private(a);
+    simde__m128i_private round_key_ = simde__m128i_to_private(round_key);
+    #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)
+      result_.neon_u8 = veorq_u8(
+        vaesimcq_u8(vaesdq_u8(a_.neon_u8, vdupq_n_u8(0))),
+        round_key_.neon_u8);
+    #else
+      simde_x_aes_dec(a_, &result_, round_key_, 0);
+    #endif
+    return simde__m128i_from_private(result_);
+  #endif
+}
+#if defined(SIMDE_X86_AES_ENABLE_NATIVE_ALIASES)
+  #define _mm_aesdec_si128(a, b) simde_mm_aesdec_si128(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i simde_mm_aesenclast_si128(simde__m128i a, simde__m128i round_key) {
+  #if defined(SIMDE_X86_AES_NATIVE)
+    return _mm_aesenclast_si128(a, round_key);
+  #else
+    simde__m128i_private result_;
+    simde__m128i_private a_ = simde__m128i_to_private(a);
+    simde__m128i_private round_key_ = simde__m128i_to_private(round_key);
+    #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)
+      result_.neon_u8 = vaeseq_u8(a_.neon_u8, vdupq_n_u8(0));
+      result_.neon_i32 = veorq_s32(result_.neon_i32, round_key_.neon_i32); // _mm_xor_si128
+    #else
+      simde_x_aes_enc(a_, &result_, round_key_, 1);
+    #endif
+    return simde__m128i_from_private(result_);
+  #endif
+}
+#if defined(SIMDE_X86_AES_ENABLE_NATIVE_ALIASES)
+  #define _mm_aesenclast_si128(a, b) simde_mm_aesenclast_si128(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i simde_mm_aesdeclast_si128(simde__m128i a, simde__m128i round_key) {
+  #if defined(SIMDE_X86_AES_NATIVE)
+    return _mm_aesdeclast_si128(a, round_key);
+  #else
+    simde__m128i_private result_;
+    simde__m128i_private a_ = simde__m128i_to_private(a);
+    simde__m128i_private round_key_ = simde__m128i_to_private(round_key);
+    #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)
+      result_.neon_u8 = veorq_u8(
+        vaesdq_u8(a_.neon_u8, vdupq_n_u8(0)),
+        round_key_.neon_u8);
+    #else
+      simde_x_aes_dec(a_, &result_, round_key_, 1);
+    #endif
+    return simde__m128i_from_private(result_);
+  #endif
+}
+#if defined(SIMDE_X86_AES_ENABLE_NATIVE_ALIASES)
+  #define _mm_aesdeclast_si128(a, b) simde_mm_aesdeclast_si128(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i simde_mm_aesimc_si128(simde__m128i a) {
+  #if defined(SIMDE_X86_AES_NATIVE)
+    return _mm_aesimc_si128(a);
+  #else
+    simde__m128i_private result_ = simde__m128i_to_private(simde_mm_setzero_si128());
+    simde__m128i_private a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)
+      result_.neon_u8 = vaesimcq_u8(a_.neon_u8);
+    #else
+      int Nb = simde_x_aes_Nb;
+      // uint8_t k[] = {0x0e, 0x09, 0x0d, 0x0b}; // a(x) = {0e} + {09}x + {0d}x2 + {0b}x3
+      uint8_t i, j, col[4], res[4];
+
+      for (j = 0; j < Nb; j++) {
+        for (i = 0; i < 4; i++) {
+          col[i] = a_.u8[Nb*j+i];
+        }
+
+        //coef_mult(k, col, res);
+        simde_x_aes_coef_mult_lookup(4, col, res);
+
+        for (i = 0; i < 4; i++) {
+          result_.u8[Nb*j+i] = res[i];
+        }
+      }
+    #endif
+    return simde__m128i_from_private(result_);
+  #endif
+}
+#if defined(SIMDE_X86_AES_ENABLE_NATIVE_ALIASES)
+  #define _mm_aesimc_si128(a) simde_mm_aesimc_si128(a)
+#endif
+
+#undef simde_x_aes_Nb
+
+#endif /* !defined(SIMDE_X86_AES_H) */
diff --git a/external_libs/pgenlib/simde/x86/avx.h b/external_libs/pgenlib/simde/x86/avx.h
new file mode 100644
index 0000000..2314f95
--- /dev/null
+++ b/external_libs/pgenlib/simde/x86/avx.h
@@ -0,0 +1,6267 @@
+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2018-2020 Evan Nemerson <evan@nemerson.com>
+ *        2020 Michael R. Crusoe <crusoe@debian.org>
+ */
+
+#include "sse.h"
+#if !defined(SIMDE_X86_AVX_H)
+#define SIMDE_X86_AVX_H
+
+#include "sse4.2.h"
+#include "../simde-f16.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+typedef union {
+  #if defined(SIMDE_VECTOR_SUBSCRIPT)
+    SIMDE_ALIGN_TO_32 int8_t          i8 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_32 int16_t        i16 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_32 int32_t        i32 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_32 int64_t        i64 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_32 uint8_t         u8 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_32 uint16_t       u16 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_32 uint32_t       u32 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_32 uint64_t       u64 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    #if defined(SIMDE_HAVE_INT128_)
+    SIMDE_ALIGN_TO_32 simde_int128  i128 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_32 simde_uint128 u128 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    #endif
+    SIMDE_ALIGN_TO_32 simde_float32  f32 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_32 simde_float64  f64 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_32 int_fast32_t  i32f SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_32 uint_fast32_t u32f SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+  #else
+    SIMDE_ALIGN_TO_32 int8_t          i8[32];
+    SIMDE_ALIGN_TO_32 int16_t        i16[16];
+    SIMDE_ALIGN_TO_32 int32_t        i32[8];
+    SIMDE_ALIGN_TO_32 int64_t        i64[4];
+    SIMDE_ALIGN_TO_32 uint8_t         u8[32];
+    SIMDE_ALIGN_TO_32 uint16_t       u16[16];
+    SIMDE_ALIGN_TO_32 uint32_t       u32[8];
+    SIMDE_ALIGN_TO_32 uint64_t       u64[4];
+    SIMDE_ALIGN_TO_32 int_fast32_t  i32f[32 / sizeof(int_fast32_t)];
+    SIMDE_ALIGN_TO_32 uint_fast32_t u32f[32 / sizeof(uint_fast32_t)];
+    #if defined(SIMDE_HAVE_INT128_)
+    SIMDE_ALIGN_TO_32 simde_int128  i128[2];
+    SIMDE_ALIGN_TO_32 simde_uint128 u128[2];
+    #endif
+    SIMDE_ALIGN_TO_32 simde_float32  f32[8];
+    SIMDE_ALIGN_TO_32 simde_float64  f64[4];
+  #endif
+
+    SIMDE_ALIGN_TO_32 simde__m128_private m128_private[2];
+    SIMDE_ALIGN_TO_32 simde__m128         m128[2];
+
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    SIMDE_ALIGN_TO_32 __m256         n;
+  #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned char)      altivec_u8[2];
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned short)     altivec_u16[2];
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned int)       altivec_u32[2];
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed char)        altivec_i8[2];
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed short)       altivec_i16[2];
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(int)                altivec_i32[2];
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(float)              altivec_f32[2];
+    #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
+      SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long) altivec_u64[2];
+      SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(long long)          altivec_i64[2];
+      SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(double)             altivec_f64[2];
+    #endif
+  #endif
+} simde__m256_private;
+
+typedef union {
+  #if defined(SIMDE_VECTOR_SUBSCRIPT)
+    SIMDE_ALIGN_TO_32 int8_t          i8 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_32 int16_t        i16 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_32 int32_t        i32 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_32 int64_t        i64 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_32 uint8_t         u8 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_32 uint16_t       u16 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_32 uint32_t       u32 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_32 uint64_t       u64 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    #if defined(SIMDE_HAVE_INT128_)
+    SIMDE_ALIGN_TO_32 simde_int128  i128 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_32 simde_uint128 u128 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    #endif
+    SIMDE_ALIGN_TO_32 simde_float32  f32 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_32 simde_float64  f64 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_32 int_fast32_t  i32f SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_32 uint_fast32_t u32f SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+  #else
+    SIMDE_ALIGN_TO_32 int8_t          i8[32];
+    SIMDE_ALIGN_TO_32 int16_t        i16[16];
+    SIMDE_ALIGN_TO_32 int32_t        i32[8];
+    SIMDE_ALIGN_TO_32 int64_t        i64[4];
+    SIMDE_ALIGN_TO_32 uint8_t         u8[32];
+    SIMDE_ALIGN_TO_32 uint16_t       u16[16];
+    SIMDE_ALIGN_TO_32 uint32_t       u32[8];
+    SIMDE_ALIGN_TO_32 uint64_t       u64[4];
+    #if defined(SIMDE_HAVE_INT128_)
+    SIMDE_ALIGN_TO_32 simde_int128  i128[2];
+    SIMDE_ALIGN_TO_32 simde_uint128 u128[2];
+    #endif
+    SIMDE_ALIGN_TO_32 simde_float32  f32[8];
+    SIMDE_ALIGN_TO_32 simde_float64  f64[4];
+    SIMDE_ALIGN_TO_32 int_fast32_t  i32f[32 / sizeof(int_fast32_t)];
+    SIMDE_ALIGN_TO_32 uint_fast32_t u32f[32 / sizeof(uint_fast32_t)];
+  #endif
+
+    SIMDE_ALIGN_TO_32 simde__m128d_private m128d_private[2];
+    SIMDE_ALIGN_TO_32 simde__m128d         m128d[2];
+
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    SIMDE_ALIGN_TO_32 __m256d        n;
+  #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned char)      altivec_u8[2];
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned short)     altivec_u16[2];
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned int)       altivec_u32[2];
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed char)        altivec_i8[2];
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed short)       altivec_i16[2];
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed int)         altivec_i32[2];
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(float)              altivec_f32[2];
+    #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
+      SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long) altivec_u64[2];
+      SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed long long)   altivec_i64[2];
+      SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(double)             altivec_f64[2];
+    #endif
+  #endif
+} simde__m256d_private;
+
+typedef union {
+  #if defined(SIMDE_VECTOR_SUBSCRIPT)
+    SIMDE_ALIGN_TO_32 int8_t          i8 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_32 int16_t        i16 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_32 int32_t        i32 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_32 int64_t        i64 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_32 uint8_t         u8 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_32 uint16_t       u16 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_32 uint32_t       u32 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_32 uint64_t       u64 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    #if defined(SIMDE_HAVE_INT128_)
+    SIMDE_ALIGN_TO_32 simde_int128  i128 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_32 simde_uint128 u128 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    #endif
+    #if defined(SIMDE_FLOAT16_VECTOR)
+    SIMDE_ALIGN_TO_32 simde_float16  f16 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    #else
+    SIMDE_ALIGN_TO_32 simde_float16  f16[16];
+    #endif
+    SIMDE_ALIGN_TO_32 simde_float32  f32 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_32 simde_float64  f64 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_32 int_fast32_t  i32f SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_32 uint_fast32_t u32f SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+  #else
+    SIMDE_ALIGN_TO_32 int8_t          i8[32];
+    SIMDE_ALIGN_TO_32 int16_t        i16[16];
+    SIMDE_ALIGN_TO_32 int32_t        i32[8];
+    SIMDE_ALIGN_TO_32 int64_t        i64[4];
+    SIMDE_ALIGN_TO_32 uint8_t         u8[32];
+    SIMDE_ALIGN_TO_32 uint16_t       u16[16];
+    SIMDE_ALIGN_TO_32 uint32_t       u32[8];
+    SIMDE_ALIGN_TO_32 uint64_t       u64[4];
+    SIMDE_ALIGN_TO_32 int_fast32_t  i32f[32 / sizeof(int_fast32_t)];
+    SIMDE_ALIGN_TO_32 uint_fast32_t u32f[32 / sizeof(uint_fast32_t)];
+    #if defined(SIMDE_HAVE_INT128_)
+    SIMDE_ALIGN_TO_32 simde_int128  i128[2];
+    SIMDE_ALIGN_TO_32 simde_uint128 u128[2];
+    #endif
+    SIMDE_ALIGN_TO_32 simde_float16  f16[16];
+    SIMDE_ALIGN_TO_32 simde_float32  f32[8];
+    SIMDE_ALIGN_TO_32 simde_float64  f64[4];
+  #endif
+
+    SIMDE_ALIGN_TO_32 simde__m128i_private m128i_private[2];
+    SIMDE_ALIGN_TO_32 simde__m128i         m128i[2];
+
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    SIMDE_ALIGN_TO_32 __m256i        n;
+  #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned char)      altivec_u8[2];
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned short)     altivec_u16[2];
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned int)       altivec_u32[2];
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed char)        altivec_i8[2];
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed short)       altivec_i16[2];
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed int)         altivec_i32[2];
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(float)              altivec_f32[2];
+    #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
+      SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long) altivec_u64[2];
+      SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed long long)   altivec_i64[2];
+      SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(double)             altivec_f64[2];
+    #endif
+  #endif
+} simde__m256i_private;
+
+#if defined(SIMDE_X86_AVX_NATIVE)
+  typedef __m256 simde__m256;
+  typedef __m256i simde__m256i;
+  typedef __m256d simde__m256d;
+#elif defined(SIMDE_VECTOR_SUBSCRIPT)
+  typedef simde_float32 simde__m256  SIMDE_ALIGN_TO_32 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+  typedef int_fast32_t  simde__m256i SIMDE_ALIGN_TO_32 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+  typedef simde_float64 simde__m256d SIMDE_ALIGN_TO_32 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS;
+#else
+  typedef simde__m256_private  simde__m256;
+  typedef simde__m256i_private simde__m256i;
+  typedef simde__m256d_private simde__m256d;
+#endif
+
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #if !defined(HEDLEY_INTEL_VERSION) && !defined(_AVXINTRIN_H_INCLUDED) && !defined(__AVXINTRIN_H) && !defined(_CMP_EQ_OQ)
+    typedef simde__m256 __m256;
+    typedef simde__m256i __m256i;
+    typedef simde__m256d __m256d;
+  #else
+    #undef __m256
+    #define __m256 simde__m256
+    #undef __m256i
+    #define __m256i simde__m256i
+    #undef __m256d
+    #define __m256d simde__m256d
+  #endif
+#endif
+
+HEDLEY_STATIC_ASSERT(32 == sizeof(simde__m256), "simde__m256 size incorrect");
+HEDLEY_STATIC_ASSERT(32 == sizeof(simde__m256_private), "simde__m256_private size incorrect");
+HEDLEY_STATIC_ASSERT(32 == sizeof(simde__m256i), "simde__m256i size incorrect");
+HEDLEY_STATIC_ASSERT(32 == sizeof(simde__m256i_private), "simde__m256i_private size incorrect");
+HEDLEY_STATIC_ASSERT(32 == sizeof(simde__m256d), "simde__m256d size incorrect");
+HEDLEY_STATIC_ASSERT(32 == sizeof(simde__m256d_private), "simde__m256d_private size incorrect");
+#if defined(SIMDE_CHECK_ALIGNMENT) && defined(SIMDE_ALIGN_OF)
+HEDLEY_STATIC_ASSERT(SIMDE_ALIGN_OF(simde__m256) == 32, "simde__m256 is not 32-byte aligned");
+HEDLEY_STATIC_ASSERT(SIMDE_ALIGN_OF(simde__m256_private) == 32, "simde__m256_private is not 32-byte aligned");
+HEDLEY_STATIC_ASSERT(SIMDE_ALIGN_OF(simde__m256i) == 32, "simde__m256i is not 32-byte aligned");
+HEDLEY_STATIC_ASSERT(SIMDE_ALIGN_OF(simde__m256i_private) == 32, "simde__m256i_private is not 32-byte aligned");
+HEDLEY_STATIC_ASSERT(SIMDE_ALIGN_OF(simde__m256d) == 32, "simde__m256d is not 32-byte aligned");
+HEDLEY_STATIC_ASSERT(SIMDE_ALIGN_OF(simde__m256d_private) == 32, "simde__m256d_private is not 32-byte aligned");
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde__m256_from_private(simde__m256_private v) {
+  simde__m256 r;
+  simde_memcpy(&r, &v, sizeof(r));
+  return r;
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256_private
+simde__m256_to_private(simde__m256 v) {
+  simde__m256_private r;
+  simde_memcpy(&r, &v, sizeof(r));
+  return r;
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde__m256i_from_private(simde__m256i_private v) {
+  simde__m256i r;
+  simde_memcpy(&r, &v, sizeof(r));
+  return r;
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i_private
+simde__m256i_to_private(simde__m256i v) {
+  simde__m256i_private r;
+  simde_memcpy(&r, &v, sizeof(r));
+  return r;
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde__m256d_from_private(simde__m256d_private v) {
+  simde__m256d r;
+  simde_memcpy(&r, &v, sizeof(r));
+  return r;
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d_private
+simde__m256d_to_private(simde__m256d v) {
+  simde__m256d_private r;
+  simde_memcpy(&r, &v, sizeof(r));
+  return r;
+}
+
+#define SIMDE_CMP_EQ_OQ     0
+#define SIMDE_CMP_LT_OS     1
+#define SIMDE_CMP_LE_OS     2
+#define SIMDE_CMP_UNORD_Q   3
+#define SIMDE_CMP_NEQ_UQ    4
+#define SIMDE_CMP_NLT_US    5
+#define SIMDE_CMP_NLE_US    6
+#define SIMDE_CMP_ORD_Q     7
+#define SIMDE_CMP_EQ_UQ     8
+#define SIMDE_CMP_NGE_US    9
+#define SIMDE_CMP_NGT_US   10
+#define SIMDE_CMP_FALSE_OQ 11
+#define SIMDE_CMP_NEQ_OQ   12
+#define SIMDE_CMP_GE_OS    13
+#define SIMDE_CMP_GT_OS    14
+#define SIMDE_CMP_TRUE_UQ  15
+#define SIMDE_CMP_EQ_OS    16
+#define SIMDE_CMP_LT_OQ    17
+#define SIMDE_CMP_LE_OQ    18
+#define SIMDE_CMP_UNORD_S  19
+#define SIMDE_CMP_NEQ_US   20
+#define SIMDE_CMP_NLT_UQ   21
+#define SIMDE_CMP_NLE_UQ   22
+#define SIMDE_CMP_ORD_S    23
+#define SIMDE_CMP_EQ_US    24
+#define SIMDE_CMP_NGE_UQ   25
+#define SIMDE_CMP_NGT_UQ   26
+#define SIMDE_CMP_FALSE_OS 27
+#define SIMDE_CMP_NEQ_OS   28
+#define SIMDE_CMP_GE_OQ    29
+#define SIMDE_CMP_GT_OQ    30
+#define SIMDE_CMP_TRUE_US  31
+
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) && !defined(_CMP_EQ_OQ)
+#define _CMP_EQ_OQ SIMDE_CMP_EQ_OQ
+#define _CMP_LT_OS SIMDE_CMP_LT_OS
+#define _CMP_LE_OS SIMDE_CMP_LE_OS
+#define _CMP_UNORD_Q SIMDE_CMP_UNORD_Q
+#define _CMP_NEQ_UQ SIMDE_CMP_NEQ_UQ
+#define _CMP_NLT_US SIMDE_CMP_NLT_US
+#define _CMP_NLE_US SIMDE_CMP_NLE_US
+#define _CMP_ORD_Q SIMDE_CMP_ORD_Q
+#define _CMP_EQ_UQ SIMDE_CMP_EQ_UQ
+#define _CMP_NGE_US SIMDE_CMP_NGE_US
+#define _CMP_NGT_US SIMDE_CMP_NGT_US
+#define _CMP_FALSE_OQ SIMDE_CMP_FALSE_OQ
+#define _CMP_NEQ_OQ SIMDE_CMP_NEQ_OQ
+#define _CMP_GE_OS SIMDE_CMP_GE_OS
+#define _CMP_GT_OS SIMDE_CMP_GT_OS
+#define _CMP_TRUE_UQ SIMDE_CMP_TRUE_UQ
+#define _CMP_EQ_OS SIMDE_CMP_EQ_OS
+#define _CMP_LT_OQ SIMDE_CMP_LT_OQ
+#define _CMP_LE_OQ SIMDE_CMP_LE_OQ
+#define _CMP_UNORD_S SIMDE_CMP_UNORD_S
+#define _CMP_NEQ_US SIMDE_CMP_NEQ_US
+#define _CMP_NLT_UQ SIMDE_CMP_NLT_UQ
+#define _CMP_NLE_UQ SIMDE_CMP_NLE_UQ
+#define _CMP_ORD_S SIMDE_CMP_ORD_S
+#define _CMP_EQ_US SIMDE_CMP_EQ_US
+#define _CMP_NGE_UQ SIMDE_CMP_NGE_UQ
+#define _CMP_NGT_UQ SIMDE_CMP_NGT_UQ
+#define _CMP_FALSE_OS SIMDE_CMP_FALSE_OS
+#define _CMP_NEQ_OS SIMDE_CMP_NEQ_OS
+#define _CMP_GE_OQ SIMDE_CMP_GE_OQ
+#define _CMP_GT_OQ SIMDE_CMP_GT_OQ
+#define _CMP_TRUE_US SIMDE_CMP_TRUE_US
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_castps_pd (simde__m256 a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_castps_pd(a);
+  #else
+    return *HEDLEY_REINTERPRET_CAST(simde__m256d*, &a);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_castps_pd
+  #define _mm256_castps_pd(a) simde_mm256_castps_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_castps_si256 (simde__m256 a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_castps_si256(a);
+  #else
+    return *HEDLEY_REINTERPRET_CAST(simde__m256i*, &a);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_castps_si256
+  #define _mm256_castps_si256(a) simde_mm256_castps_si256(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_castsi256_pd (simde__m256i a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_castsi256_pd(a);
+  #else
+    return *HEDLEY_REINTERPRET_CAST(simde__m256d*, &a);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_castsi256_pd
+  #define _mm256_castsi256_pd(a) simde_mm256_castsi256_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_castsi256_ps (simde__m256i a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_castsi256_ps(a);
+  #else
+    return *HEDLEY_REINTERPRET_CAST(simde__m256*, &a);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_castsi256_ps
+  #define _mm256_castsi256_ps(a) simde_mm256_castsi256_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_castpd_ps (simde__m256d a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_castpd_ps(a);
+  #else
+    return *HEDLEY_REINTERPRET_CAST(simde__m256*, &a);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_castpd_ps
+  #define _mm256_castpd_ps(a) simde_mm256_castpd_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_castpd_si256 (simde__m256d a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_castpd_si256(a);
+  #else
+    return *HEDLEY_REINTERPRET_CAST(simde__m256i*, &a);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_castpd_si256
+  #define _mm256_castpd_si256(a) simde_mm256_castpd_si256(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_setzero_si256 (void) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_setzero_si256();
+  #else
+    simde__m256i_private r_;
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_setzero_si128();
+      r_.m128i[1] = simde_mm_setzero_si128();
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) {
+        r_.i32f[i] = 0;
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_setzero_si256
+  #define _mm256_setzero_si256() simde_mm256_setzero_si256()
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_setzero_ps (void) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_setzero_ps();
+  #else
+    return simde_mm256_castsi256_ps(simde_mm256_setzero_si256());
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_setzero_ps
+  #define _mm256_setzero_ps() simde_mm256_setzero_ps()
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_setzero_pd (void) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_setzero_pd();
+  #else
+    return simde_mm256_castsi256_pd(simde_mm256_setzero_si256());
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_setzero_pd
+  #define _mm256_setzero_pd() simde_mm256_setzero_pd()
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_x_mm256_not_ps(simde__m256 a) {
+  simde__m256_private
+    r_,
+    a_ = simde__m256_to_private(a);
+
+  #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+    r_.i32 = ~a_.i32;
+  #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128)
+    r_.m128[0] = simde_x_mm_not_ps(a_.m128[0]);
+    r_.m128[1] = simde_x_mm_not_ps(a_.m128[1]);
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+      r_.i32[i] = ~(a_.i32[i]);
+    }
+  #endif
+
+  return simde__m256_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_x_mm256_select_ps(simde__m256 a, simde__m256 b, simde__m256 mask) {
+  /* This function is for when you want to blend two elements together
+   * according to a mask.  It is similar to _mm256_blendv_ps, except that
+   * it is undefined whether the blend is based on the highest bit in
+   * each lane (like blendv) or just bitwise operations.  This allows
+   * us to implement the function efficiently everywhere.
+   *
+   * Basically, you promise that all the lanes in mask are either 0 or
+   * ~0. */
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_blendv_ps(a, b, mask);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a),
+      b_ = simde__m256_to_private(b),
+      mask_ = simde__m256_to_private(mask);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32 = a_.i32 ^ ((a_.i32 ^ b_.i32) & mask_.i32);
+    #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128)
+      r_.m128[0] = simde_x_mm_select_ps(a_.m128[0], b_.m128[0], mask_.m128[0]);
+      r_.m128[1] = simde_x_mm_select_ps(a_.m128[1], b_.m128[1], mask_.m128[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = a_.i32[i] ^ ((a_.i32[i] ^ b_.i32[i]) & mask_.i32[i]);
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_x_mm256_not_pd(simde__m256d a) {
+  simde__m256d_private
+    r_,
+    a_ = simde__m256d_to_private(a);
+
+  #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+    r_.i64 = ~a_.i64;
+  #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128)
+    r_.m128d[0] = simde_x_mm_not_pd(a_.m128d[0]);
+    r_.m128d[1] = simde_x_mm_not_pd(a_.m128d[1]);
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+      r_.i64[i] = ~(a_.i64[i]);
+    }
+  #endif
+
+  return simde__m256d_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_x_mm256_select_pd(simde__m256d a, simde__m256d b, simde__m256d mask) {
+  /* This function is for when you want to blend two elements together
+   * according to a mask.  It is similar to _mm256_blendv_pd, except that
+   * it is undefined whether the blend is based on the highest bit in
+   * each lane (like blendv) or just bitwise operations.  This allows
+   * us to implement the function efficiently everywhere.
+   *
+   * Basically, you promise that all the lanes in mask are either 0 or
+   * ~0. */
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_blendv_pd(a, b, mask);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a),
+      b_ = simde__m256d_to_private(b),
+      mask_ = simde__m256d_to_private(mask);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i64 = a_.i64 ^ ((a_.i64 ^ b_.i64) & mask_.i64);
+    #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128)
+      r_.m128d[0] = simde_x_mm_select_pd(a_.m128d[0], b_.m128d[0], mask_.m128d[0]);
+      r_.m128d[1] = simde_x_mm_select_pd(a_.m128d[1], b_.m128d[1], mask_.m128d[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = a_.i64[i] ^ ((a_.i64[i] ^ b_.i64[i]) & mask_.i64[i]);
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_x_mm256_setone_si256 (void) {
+  simde__m256i_private r_;
+
+#if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+  __typeof__(r_.i32f) rv = { 0, };
+  r_.i32f = ~rv;
+#elif defined(SIMDE_X86_AVX2_NATIVE)
+  __m256i t = _mm256_setzero_si256();
+  r_.n = _mm256_cmpeq_epi32(t, t);
+#else
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) {
+    r_.i32f[i] = ~HEDLEY_STATIC_CAST(int_fast32_t, 0);
+  }
+#endif
+
+  return simde__m256i_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_x_mm256_setone_ps (void) {
+  return simde_mm256_castsi256_ps(simde_x_mm256_setone_si256());
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_x_mm256_setone_pd (void) {
+  return simde_mm256_castsi256_pd(simde_x_mm256_setone_si256());
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_set_epi8 (int8_t e31, int8_t e30, int8_t e29, int8_t e28,
+                      int8_t e27, int8_t e26, int8_t e25, int8_t e24,
+                      int8_t e23, int8_t e22, int8_t e21, int8_t e20,
+                      int8_t e19, int8_t e18, int8_t e17, int8_t e16,
+                      int8_t e15, int8_t e14, int8_t e13, int8_t e12,
+                      int8_t e11, int8_t e10, int8_t  e9, int8_t  e8,
+                      int8_t  e7, int8_t  e6, int8_t  e5, int8_t  e4,
+                      int8_t  e3, int8_t  e2, int8_t  e1, int8_t  e0) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_set_epi8(e31, e30, e29, e28, e27, e26, e25, e24,
+                           e23, e22, e21, e20, e19, e18, e17, e16,
+                           e15, e14, e13, e12, e11, e10,  e9,  e8,
+                            e7,  e6,  e5,  e4,  e3,  e2,  e1,  e0);
+  #else
+    simde__m256i_private r_;
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_set_epi8(
+        e15, e14, e13, e12, e11, e10,  e9,  e8,
+        e7,  e6,  e5,  e4,  e3,  e2,  e1,  e0);
+      r_.m128i[1] = simde_mm_set_epi8(
+        e31, e30, e29, e28, e27, e26, e25, e24,
+        e23, e22, e21, e20, e19, e18, e17, e16);
+    #else
+      r_.i8[ 0] =  e0;
+      r_.i8[ 1] =  e1;
+      r_.i8[ 2] =  e2;
+      r_.i8[ 3] =  e3;
+      r_.i8[ 4] =  e4;
+      r_.i8[ 5] =  e5;
+      r_.i8[ 6] =  e6;
+      r_.i8[ 7] =  e7;
+      r_.i8[ 8] =  e8;
+      r_.i8[ 9] =  e9;
+      r_.i8[10] = e10;
+      r_.i8[11] = e11;
+      r_.i8[12] = e12;
+      r_.i8[13] = e13;
+      r_.i8[14] = e14;
+      r_.i8[15] = e15;
+      r_.i8[16] = e16;
+      r_.i8[17] = e17;
+      r_.i8[18] = e18;
+      r_.i8[19] = e19;
+      r_.i8[20] = e20;
+      r_.i8[21] = e21;
+      r_.i8[22] = e22;
+      r_.i8[23] = e23;
+      r_.i8[24] = e24;
+      r_.i8[25] = e25;
+      r_.i8[26] = e26;
+      r_.i8[27] = e27;
+      r_.i8[28] = e28;
+      r_.i8[29] = e29;
+      r_.i8[30] = e30;
+      r_.i8[31] = e31;
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_set_epi8
+  #define _mm256_set_epi8(e31, e30, e29, e28, e27, e26, e25, e24, e23, e22, e21, e20, e19, e18, e17, e16, e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0) \
+  simde_mm256_set_epi8(e31, e30, e29, e28, e27, e26, e25, e24, e23, e22, e21, e20, e19, e18, e17, e16, e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_set_epi16 (int16_t e15, int16_t e14, int16_t e13, int16_t e12,
+                       int16_t e11, int16_t e10, int16_t  e9, int16_t  e8,
+                       int16_t  e7, int16_t  e6, int16_t  e5, int16_t  e4,
+                       int16_t  e3, int16_t  e2, int16_t  e1, int16_t  e0) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_set_epi16(e15, e14, e13, e12, e11, e10,  e9,  e8,
+                            e7,  e6,  e5,  e4,  e3,  e2,  e1,  e0);
+  #else
+    simde__m256i_private r_;
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_set_epi16( e7,  e6,  e5,  e4,  e3,  e2,  e1,  e0);
+      r_.m128i[1] = simde_mm_set_epi16(e15, e14, e13, e12, e11, e10,  e9,  e8);
+    #else
+      r_.i16[ 0] =  e0;
+      r_.i16[ 1] =  e1;
+      r_.i16[ 2] =  e2;
+      r_.i16[ 3] =  e3;
+      r_.i16[ 4] =  e4;
+      r_.i16[ 5] =  e5;
+      r_.i16[ 6] =  e6;
+      r_.i16[ 7] =  e7;
+      r_.i16[ 8] =  e8;
+      r_.i16[ 9] =  e9;
+      r_.i16[10] = e10;
+      r_.i16[11] = e11;
+      r_.i16[12] = e12;
+      r_.i16[13] = e13;
+      r_.i16[14] = e14;
+      r_.i16[15] = e15;
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_set_epi16
+  #define _mm256_set_epi16(e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0) \
+  simde_mm256_set_epi16(e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_set_epi32 (int32_t e7, int32_t e6, int32_t e5, int32_t e4,
+                       int32_t e3, int32_t e2, int32_t e1, int32_t e0) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_set_epi32(e7, e6, e5, e4, e3, e2, e1, e0);
+  #else
+    simde__m256i_private r_;
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_set_epi32(e3, e2, e1, e0);
+      r_.m128i[1] = simde_mm_set_epi32(e7, e6, e5, e4);
+    #else
+      r_.i32[ 0] =  e0;
+      r_.i32[ 1] =  e1;
+      r_.i32[ 2] =  e2;
+      r_.i32[ 3] =  e3;
+      r_.i32[ 4] =  e4;
+      r_.i32[ 5] =  e5;
+      r_.i32[ 6] =  e6;
+      r_.i32[ 7] =  e7;
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_set_epi32
+  #define _mm256_set_epi32(e7, e6, e5, e4, e3, e2, e1, e0) \
+  simde_mm256_set_epi32(e7, e6, e5, e4, e3, e2, e1, e0)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_set_epi64x (int64_t  e3, int64_t  e2, int64_t  e1, int64_t  e0) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_set_epi64x(e3, e2, e1, e0);
+  #else
+    simde__m256i_private r_;
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_set_epi64x(e1, e0);
+      r_.m128i[1] = simde_mm_set_epi64x(e3, e2);
+    #else
+      r_.i64[0] = e0;
+      r_.i64[1] = e1;
+      r_.i64[2] = e2;
+      r_.i64[3] = e3;
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_set_epi64x
+  #define _mm256_set_epi64x(e3, e2, e1, e0) simde_mm256_set_epi64x(e3, e2, e1, e0)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_x_mm256_set_epu8 (uint8_t e31, uint8_t e30, uint8_t e29, uint8_t e28,
+                        uint8_t e27, uint8_t e26, uint8_t e25, uint8_t e24,
+                        uint8_t e23, uint8_t e22, uint8_t e21, uint8_t e20,
+                        uint8_t e19, uint8_t e18, uint8_t e17, uint8_t e16,
+                        uint8_t e15, uint8_t e14, uint8_t e13, uint8_t e12,
+                        uint8_t e11, uint8_t e10, uint8_t  e9, uint8_t  e8,
+                        uint8_t  e7, uint8_t  e6, uint8_t  e5, uint8_t  e4,
+                        uint8_t  e3, uint8_t  e2, uint8_t  e1, uint8_t  e0) {
+  simde__m256i_private r_;
+
+  r_.u8[ 0] =  e0;
+  r_.u8[ 1] =  e1;
+  r_.u8[ 2] =  e2;
+  r_.u8[ 3] =  e3;
+  r_.u8[ 4] =  e4;
+  r_.u8[ 5] =  e5;
+  r_.u8[ 6] =  e6;
+  r_.u8[ 7] =  e7;
+  r_.u8[ 8] =  e8;
+  r_.u8[ 9] =  e9;
+  r_.u8[10] = e10;
+  r_.u8[11] = e11;
+  r_.u8[12] = e12;
+  r_.u8[13] = e13;
+  r_.u8[14] = e14;
+  r_.u8[15] = e15;
+  r_.u8[16] = e16;
+  r_.u8[17] = e17;
+  r_.u8[18] = e18;
+  r_.u8[19] = e19;
+  r_.u8[20] = e20;
+  r_.u8[20] = e20;
+  r_.u8[21] = e21;
+  r_.u8[22] = e22;
+  r_.u8[23] = e23;
+  r_.u8[24] = e24;
+  r_.u8[25] = e25;
+  r_.u8[26] = e26;
+  r_.u8[27] = e27;
+  r_.u8[28] = e28;
+  r_.u8[29] = e29;
+  r_.u8[30] = e30;
+  r_.u8[31] = e31;
+
+  return simde__m256i_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_x_mm256_set_epu16 (uint16_t e15, uint16_t e14, uint16_t e13, uint16_t e12,
+                       uint16_t e11, uint16_t e10, uint16_t  e9, uint16_t  e8,
+                       uint16_t  e7, uint16_t  e6, uint16_t  e5, uint16_t  e4,
+                       uint16_t  e3, uint16_t  e2, uint16_t  e1, uint16_t  e0) {
+  simde__m256i_private r_;
+
+  r_.u16[ 0] =  e0;
+  r_.u16[ 1] =  e1;
+  r_.u16[ 2] =  e2;
+  r_.u16[ 3] =  e3;
+  r_.u16[ 4] =  e4;
+  r_.u16[ 5] =  e5;
+  r_.u16[ 6] =  e6;
+  r_.u16[ 7] =  e7;
+  r_.u16[ 8] =  e8;
+  r_.u16[ 9] =  e9;
+  r_.u16[10] = e10;
+  r_.u16[11] = e11;
+  r_.u16[12] = e12;
+  r_.u16[13] = e13;
+  r_.u16[14] = e14;
+  r_.u16[15] = e15;
+
+  return simde__m256i_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_x_mm256_set_epu32 (uint32_t e7, uint32_t e6, uint32_t e5, uint32_t e4,
+                         uint32_t e3, uint32_t e2, uint32_t e1, uint32_t e0) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_set_epi32(HEDLEY_STATIC_CAST(int32_t, e7), HEDLEY_STATIC_CAST(int32_t, e6), HEDLEY_STATIC_CAST(int32_t, e5), HEDLEY_STATIC_CAST(int32_t, e4),
+                            HEDLEY_STATIC_CAST(int32_t, e3), HEDLEY_STATIC_CAST(int32_t, e2), HEDLEY_STATIC_CAST(int32_t, e1), HEDLEY_STATIC_CAST(int32_t, e0));
+  #else
+    simde__m256i_private r_;
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_set_epi32(HEDLEY_STATIC_CAST(int32_t, e3), HEDLEY_STATIC_CAST(int32_t, e2), HEDLEY_STATIC_CAST(int32_t, e1), HEDLEY_STATIC_CAST(int32_t, e0));
+      r_.m128i[1] = simde_mm_set_epi32(HEDLEY_STATIC_CAST(int32_t, e7), HEDLEY_STATIC_CAST(int32_t, e6), HEDLEY_STATIC_CAST(int32_t, e5), HEDLEY_STATIC_CAST(int32_t, e4));
+    #else
+      r_.u32[ 0] =  e0;
+      r_.u32[ 1] =  e1;
+      r_.u32[ 2] =  e2;
+      r_.u32[ 3] =  e3;
+      r_.u32[ 4] =  e4;
+      r_.u32[ 5] =  e5;
+      r_.u32[ 6] =  e6;
+      r_.u32[ 7] =  e7;
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_x_mm256_set_epu64x (uint64_t  e3, uint64_t  e2, uint64_t  e1, uint64_t  e0) {
+  simde__m256i_private r_;
+
+  r_.u64[0] = e0;
+  r_.u64[1] = e1;
+  r_.u64[2] = e2;
+  r_.u64[3] = e3;
+
+  return simde__m256i_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_set_ps (simde_float32 e7, simde_float32 e6, simde_float32 e5, simde_float32 e4,
+                    simde_float32 e3, simde_float32 e2, simde_float32 e1, simde_float32 e0) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_set_ps(e7, e6, e5, e4, e3, e2, e1, e0);
+  #else
+    simde__m256_private r_;
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128[0] = simde_mm_set_ps(e3, e2, e1, e0);
+      r_.m128[1] = simde_mm_set_ps(e7, e6, e5, e4);
+    #else
+      r_.f32[0] = e0;
+      r_.f32[1] = e1;
+      r_.f32[2] = e2;
+      r_.f32[3] = e3;
+      r_.f32[4] = e4;
+      r_.f32[5] = e5;
+      r_.f32[6] = e6;
+      r_.f32[7] = e7;
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_set_ps
+  #define _mm256_set_ps(e7, e6, e5, e4, e3, e2, e1, e0) \
+  simde_mm256_set_ps(e7, e6, e5, e4, e3, e2, e1, e0)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_set_pd (simde_float64 e3, simde_float64 e2, simde_float64 e1, simde_float64 e0) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_set_pd(e3, e2, e1, e0);
+  #else
+    simde__m256d_private r_;
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128d[0] = simde_mm_set_pd(e1, e0);
+      r_.m128d[1] = simde_mm_set_pd(e3, e2);
+    #else
+      r_.f64[0] = e0;
+      r_.f64[1] = e1;
+      r_.f64[2] = e2;
+      r_.f64[3] = e3;
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_set_pd
+  #define _mm256_set_pd(e3, e2, e1, e0) \
+  simde_mm256_set_pd(e3, e2, e1, e0)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_set_m128 (simde__m128 e1, simde__m128 e0) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_insertf128_ps(_mm256_castps128_ps256(e0), e1, 1);
+  #else
+    simde__m256_private r_;
+    simde__m128_private
+      e1_ = simde__m128_to_private(e1),
+      e0_ = simde__m128_to_private(e0);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128_private[0] = e0_;
+      r_.m128_private[1] = e1_;
+    #elif defined(SIMDE_HAVE_INT128_)
+      r_.i128[0] = e0_.i128[0];
+      r_.i128[1] = e1_.i128[0];
+    #else
+      r_.i64[0] = e0_.i64[0];
+      r_.i64[1] = e0_.i64[1];
+      r_.i64[2] = e1_.i64[0];
+      r_.i64[3] = e1_.i64[1];
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_set_m128
+  #define _mm256_set_m128(e1, e0) simde_mm256_set_m128(e1, e0)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_set_m128d (simde__m128d e1, simde__m128d e0) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_insertf128_pd(_mm256_castpd128_pd256(e0), e1, 1);
+  #else
+    simde__m256d_private r_;
+    simde__m128d_private
+      e1_ = simde__m128d_to_private(e1),
+      e0_ = simde__m128d_to_private(e0);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128d_private[0] = e0_;
+      r_.m128d_private[1] = e1_;
+    #else
+      r_.i64[0] = e0_.i64[0];
+      r_.i64[1] = e0_.i64[1];
+      r_.i64[2] = e1_.i64[0];
+      r_.i64[3] = e1_.i64[1];
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_set_m128d
+  #define _mm256_set_m128d(e1, e0) simde_mm256_set_m128d(e1, e0)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_set_m128i (simde__m128i e1, simde__m128i e0) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_insertf128_si256(_mm256_castsi128_si256(e0), e1, 1);
+  #else
+    simde__m256i_private r_;
+    simde__m128i_private
+      e1_ = simde__m128i_to_private(e1),
+      e0_ = simde__m128i_to_private(e0);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128i_private[0] = e0_;
+      r_.m128i_private[1] = e1_;
+    #else
+      r_.i64[0] = e0_.i64[0];
+      r_.i64[1] = e0_.i64[1];
+      r_.i64[2] = e1_.i64[0];
+      r_.i64[3] = e1_.i64[1];
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_set_m128i
+  #define _mm256_set_m128i(e1, e0) simde_mm256_set_m128i(e1, e0)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_set1_epi8 (int8_t a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_set1_epi8(a);
+  #else
+    simde__m256i_private r_;
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_set1_epi8(a);
+      r_.m128i[1] = simde_mm_set1_epi8(a);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = a;
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_set1_epi8
+  #define _mm256_set1_epi8(a) simde_mm256_set1_epi8(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_set1_epi16 (int16_t a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_set1_epi16(a);
+  #else
+    simde__m256i_private r_;
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_set1_epi16(a);
+      r_.m128i[1] = simde_mm_set1_epi16(a);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = a;
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_set1_epi16
+  #define _mm256_set1_epi16(a) simde_mm256_set1_epi16(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_set1_epi32 (int32_t a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_set1_epi32(a);
+  #else
+    simde__m256i_private r_;
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_set1_epi32(a);
+      r_.m128i[1] = simde_mm_set1_epi32(a);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = a;
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_set1_epi32
+  #define _mm256_set1_epi32(a) simde_mm256_set1_epi32(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_set1_epi64x (int64_t a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_set1_epi64x(a);
+  #else
+    simde__m256i_private r_;
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_set1_epi64x(a);
+      r_.m128i[1] = simde_mm_set1_epi64x(a);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = a;
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_set1_epi64x
+  #define _mm256_set1_epi64x(a) simde_mm256_set1_epi64x(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_set1_ps (simde_float32 a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_set1_ps(a);
+  #else
+    simde__m256_private r_;
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128[0] = simde_mm_set1_ps(a);
+      r_.m128[1] = simde_mm_set1_ps(a);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = a;
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_set1_ps
+  #define _mm256_set1_ps(a) simde_mm256_set1_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_set1_pd (simde_float64 a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_set1_pd(a);
+  #else
+    simde__m256d_private r_;
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128d[0] = simde_mm_set1_pd(a);
+      r_.m128d[1] = simde_mm_set1_pd(a);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = a;
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_set1_pd
+  #define _mm256_set1_pd(a) simde_mm256_set1_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_x_mm256_deinterleaveeven_epi16 (simde__m256i a, simde__m256i b) {
+  simde__m256i_private
+    r_,
+    a_ = simde__m256i_to_private(a),
+    b_ = simde__m256i_to_private(b);
+
+  #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+    r_.m128i[0] = simde_x_mm_deinterleaveeven_epi16(a_.m128i[0], b_.m128i[0]);
+    r_.m128i[1] = simde_x_mm_deinterleaveeven_epi16(a_.m128i[1], b_.m128i[1]);
+  #elif defined(SIMDE_SHUFFLE_VECTOR_)
+    r_.i16 = SIMDE_SHUFFLE_VECTOR_(16, 32, a_.i16, b_.i16, 0, 2, 4, 6, 16, 18, 20, 22, 8, 10, 12, 14, 24, 26, 28, 30);
+  #else
+    const size_t halfway_point = (sizeof(r_.i16) / sizeof(r_.i16[0])) / 2;
+    const size_t quarter_point = (sizeof(r_.i16) / sizeof(r_.i16[0])) / 4;
+    for (size_t i = 0 ; i < quarter_point ; i++) {
+      r_.i16[i] = a_.i16[2 * i];
+      r_.i16[i + quarter_point] = b_.i16[2 * i];
+      r_.i16[halfway_point + i] = a_.i16[halfway_point + 2 * i];
+      r_.i16[halfway_point + i + quarter_point] = b_.i16[halfway_point + 2 * i];
+    }
+  #endif
+
+  return simde__m256i_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_x_mm256_deinterleaveodd_epi16 (simde__m256i a, simde__m256i b) {
+  simde__m256i_private
+    r_,
+    a_ = simde__m256i_to_private(a),
+    b_ = simde__m256i_to_private(b);
+
+  #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+    r_.m128i[0] = simde_x_mm_deinterleaveodd_epi16(a_.m128i[0], b_.m128i[0]);
+    r_.m128i[1] = simde_x_mm_deinterleaveodd_epi16(a_.m128i[1], b_.m128i[1]);
+  #elif defined(SIMDE_SHUFFLE_VECTOR_)
+    r_.i16 = SIMDE_SHUFFLE_VECTOR_(16, 32, a_.i16, b_.i16, 1, 3, 5, 7, 17, 19, 21, 23, 9, 11, 13, 15, 25, 27, 29, 31);
+  #else
+    const size_t halfway_point = (sizeof(r_.i16) / sizeof(r_.i16[0])) / 2;
+    const size_t quarter_point = (sizeof(r_.i16) / sizeof(r_.i16[0])) / 4;
+    for (size_t i = 0 ; i < quarter_point ; i++) {
+      r_.i16[i] = a_.i16[2 * i + 1];
+      r_.i16[i + quarter_point] = b_.i16[2 * i + 1];
+      r_.i16[halfway_point + i] = a_.i16[halfway_point + 2 * i + 1];
+      r_.i16[halfway_point + i + quarter_point] = b_.i16[halfway_point + 2 * i + 1];
+    }
+  #endif
+
+  return simde__m256i_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_x_mm256_deinterleaveeven_epi32 (simde__m256i a, simde__m256i b) {
+  simde__m256i_private
+    r_,
+    a_ = simde__m256i_to_private(a),
+    b_ = simde__m256i_to_private(b);
+
+  #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+    r_.m128i[0] = simde_x_mm_deinterleaveeven_epi32(a_.m128i[0], b_.m128i[0]);
+    r_.m128i[1] = simde_x_mm_deinterleaveeven_epi32(a_.m128i[1], b_.m128i[1]);
+  #elif defined(SIMDE_SHUFFLE_VECTOR_)
+    r_.i32 = SIMDE_SHUFFLE_VECTOR_(32, 32, a_.i32, b_.i32, 0, 2, 8, 10, 4, 6, 12, 14);
+  #else
+    const size_t halfway_point = (sizeof(r_.i32) / sizeof(r_.i32[0])) / 2;
+    const size_t quarter_point = (sizeof(r_.i32) / sizeof(r_.i32[0])) / 4;
+    for (size_t i = 0 ; i < quarter_point ; i++) {
+      r_.i32[i] = a_.i32[2 * i];
+      r_.i32[i + quarter_point] = b_.i32[2 * i];
+      r_.i32[halfway_point + i] = a_.i32[halfway_point + 2 * i];
+      r_.i32[halfway_point + i + quarter_point] = b_.i32[halfway_point + 2 * i];
+    }
+  #endif
+
+  return simde__m256i_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_x_mm256_deinterleaveodd_epi32 (simde__m256i a, simde__m256i b) {
+  simde__m256i_private
+    r_,
+    a_ = simde__m256i_to_private(a),
+    b_ = simde__m256i_to_private(b);
+
+  #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+    r_.m128i[0] = simde_x_mm_deinterleaveodd_epi32(a_.m128i[0], b_.m128i[0]);
+    r_.m128i[1] = simde_x_mm_deinterleaveodd_epi32(a_.m128i[1], b_.m128i[1]);
+  #elif defined(SIMDE_SHUFFLE_VECTOR_)
+    r_.i32 = SIMDE_SHUFFLE_VECTOR_(32, 32, a_.i32, b_.i32, 1, 3, 9, 11, 5, 7, 13, 15);
+  #else
+    const size_t halfway_point = (sizeof(r_.i32) / sizeof(r_.i32[0])) / 2;
+    const size_t quarter_point = (sizeof(r_.i32) / sizeof(r_.i32[0])) / 4;
+    for (size_t i = 0 ; i < quarter_point ; i++) {
+      r_.i32[i] = a_.i32[2 * i + 1];
+      r_.i32[i + quarter_point] = b_.i32[2 * i + 1];
+      r_.i32[halfway_point + i] = a_.i32[halfway_point + 2 * i + 1];
+      r_.i32[halfway_point + i + quarter_point] = b_.i32[halfway_point + 2 * i + 1];
+    }
+  #endif
+
+  return simde__m256i_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_x_mm256_deinterleaveeven_ps (simde__m256 a, simde__m256 b) {
+  simde__m256_private
+    r_,
+    a_ = simde__m256_to_private(a),
+    b_ = simde__m256_to_private(b);
+
+  #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+    r_.m128[0] = simde_x_mm_deinterleaveeven_ps(a_.m128[0], b_.m128[0]);
+    r_.m128[1] = simde_x_mm_deinterleaveeven_ps(a_.m128[1], b_.m128[1]);
+  #elif defined(SIMDE_SHUFFLE_VECTOR_)
+    r_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 32, a_.f32, b_.f32, 0, 2, 8, 10, 4, 6, 12, 14);
+  #else
+    const size_t halfway_point = (sizeof(r_.f32) / sizeof(r_.f32[0])) / 2;
+    const size_t quarter_point = (sizeof(r_.f32) / sizeof(r_.f32[0])) / 4;
+    for (size_t i = 0 ; i < quarter_point ; i++) {
+      r_.f32[i] = a_.f32[2 * i];
+      r_.f32[i + quarter_point] = b_.f32[2 * i];
+      r_.f32[halfway_point + i] = a_.f32[halfway_point + 2 * i];
+      r_.f32[halfway_point + i + quarter_point] = b_.f32[halfway_point + 2 * i];
+    }
+  #endif
+
+  return simde__m256_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_x_mm256_deinterleaveodd_ps (simde__m256 a, simde__m256 b) {
+  simde__m256_private
+    r_,
+    a_ = simde__m256_to_private(a),
+    b_ = simde__m256_to_private(b);
+
+  #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+    r_.m128[0] = simde_x_mm_deinterleaveodd_ps(a_.m128[0], b_.m128[0]);
+    r_.m128[1] = simde_x_mm_deinterleaveodd_ps(a_.m128[1], b_.m128[1]);
+  #elif defined(SIMDE_SHUFFLE_VECTOR_)
+    r_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 32, a_.f32, b_.f32, 1, 3, 9, 11, 5, 7, 13, 15);
+  #else
+    const size_t halfway_point = (sizeof(r_.f32) / sizeof(r_.f32[0])) / 2;
+    const size_t quarter_point = (sizeof(r_.f32) / sizeof(r_.f32[0])) / 4;
+    for (size_t i = 0 ; i < quarter_point ; i++) {
+      r_.f32[i] = a_.f32[2 * i + 1];
+      r_.f32[i + quarter_point] = b_.f32[2 * i + 1];
+      r_.f32[halfway_point + i] = a_.f32[halfway_point + 2 * i + 1];
+      r_.f32[halfway_point + i + quarter_point] = b_.f32[halfway_point + 2 * i + 1];
+    }
+  #endif
+
+  return simde__m256_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_x_mm256_deinterleaveeven_pd (simde__m256d a, simde__m256d b) {
+  simde__m256d_private
+    r_,
+    a_ = simde__m256d_to_private(a),
+    b_ = simde__m256d_to_private(b);
+
+  #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+    r_.m128d[0] = simde_x_mm_deinterleaveeven_pd(a_.m128d[0], b_.m128d[0]);
+    r_.m128d[1] = simde_x_mm_deinterleaveeven_pd(a_.m128d[1], b_.m128d[1]);
+  #elif defined(SIMDE_SHUFFLE_VECTOR_)
+    r_.f64 = SIMDE_SHUFFLE_VECTOR_(64, 32, a_.f64, b_.f64, 0, 4, 2, 6);
+  #else
+    const size_t halfway_point = (sizeof(r_.f64) / sizeof(r_.f64[0])) / 2;
+    const size_t quarter_point = (sizeof(r_.f64) / sizeof(r_.f64[0])) / 4;
+    for (size_t i = 0 ; i < quarter_point ; i++) {
+      r_.f64[i] = a_.f64[2 * i];
+      r_.f64[i + quarter_point] = b_.f64[2 * i];
+      r_.f64[halfway_point + i] = a_.f64[halfway_point + 2 * i];
+      r_.f64[halfway_point + i + quarter_point] = b_.f64[halfway_point + 2 * i];
+    }
+  #endif
+
+  return simde__m256d_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_x_mm256_deinterleaveodd_pd (simde__m256d a, simde__m256d b) {
+  simde__m256d_private
+    r_,
+    a_ = simde__m256d_to_private(a),
+    b_ = simde__m256d_to_private(b);
+
+  #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+    r_.m128d[0] = simde_x_mm_deinterleaveodd_pd(a_.m128d[0], b_.m128d[0]);
+    r_.m128d[1] = simde_x_mm_deinterleaveodd_pd(a_.m128d[1], b_.m128d[1]);
+  #elif defined(SIMDE_SHUFFLE_VECTOR_)
+    r_.f64 = SIMDE_SHUFFLE_VECTOR_(64, 32, a_.f64, b_.f64, 1, 5, 3, 7);
+  #else
+    const size_t halfway_point = (sizeof(r_.f64) / sizeof(r_.f64[0])) / 2;
+    const size_t quarter_point = (sizeof(r_.f64) / sizeof(r_.f64[0])) / 4;
+    for (size_t i = 0 ; i < quarter_point ; i++) {
+      r_.f64[i] = a_.f64[2 * i + 1];
+      r_.f64[i + quarter_point] = b_.f64[2 * i + 1];
+      r_.f64[halfway_point + i] = a_.f64[halfway_point + 2 * i + 1];
+      r_.f64[halfway_point + i + quarter_point] = b_.f64[halfway_point + 2 * i + 1];
+    }
+  #endif
+
+  return simde__m256d_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_x_mm256_abs_ps(simde__m256 a) {
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_fabsf(a_.f32[i]);
+      }
+    return simde__m256_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_x_mm256_abs_pd(simde__m256d a) {
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_fabs(a_.f64[i]);
+      }
+    return simde__m256d_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_add_ps (simde__m256 a, simde__m256 b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_add_ps(a, b);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a),
+      b_ = simde__m256_to_private(b);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128[0] = simde_mm_add_ps(a_.m128[0], b_.m128[0]);
+      r_.m128[1] = simde_mm_add_ps(a_.m128[1], b_.m128[1]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.f32 = a_.f32 + b_.f32;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = a_.f32[i] + b_.f32[i];
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_add_ps
+  #define _mm256_add_ps(a, b) simde_mm256_add_ps(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_hadd_ps (simde__m256 a, simde__m256 b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_hadd_ps(a, b);
+  #else
+    return simde_mm256_add_ps(simde_x_mm256_deinterleaveeven_ps(a, b), simde_x_mm256_deinterleaveodd_ps(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_hadd_ps
+  #define _mm256_hadd_ps(a, b) simde_mm256_hadd_ps(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_add_pd (simde__m256d a, simde__m256d b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_add_pd(a, b);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a),
+      b_ = simde__m256d_to_private(b);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128d[0] = simde_mm_add_pd(a_.m128d[0], b_.m128d[0]);
+      r_.m128d[1] = simde_mm_add_pd(a_.m128d[1], b_.m128d[1]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.f64 = a_.f64 + b_.f64;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = a_.f64[i] + b_.f64[i];
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_add_pd
+  #define _mm256_add_pd(a, b) simde_mm256_add_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_hadd_pd (simde__m256d a, simde__m256d b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_hadd_pd(a, b);
+  #else
+      return simde_mm256_add_pd(simde_x_mm256_deinterleaveeven_pd(a, b), simde_x_mm256_deinterleaveodd_pd(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_hadd_pd
+  #define _mm256_hadd_pd(a, b) simde_mm256_hadd_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_addsub_ps (simde__m256 a, simde__m256 b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_addsub_ps(a, b);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a),
+      b_ = simde__m256_to_private(b);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128[0] = simde_mm_addsub_ps(a_.m128[0], b_.m128[0]);
+      r_.m128[1] = simde_mm_addsub_ps(a_.m128[1], b_.m128[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i += 2) {
+        r_.f32[  i  ] = a_.f32[  i  ] - b_.f32[  i  ];
+        r_.f32[i + 1] = a_.f32[i + 1] + b_.f32[i + 1];
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_addsub_ps
+  #define _mm256_addsub_ps(a, b) simde_mm256_addsub_ps(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_addsub_pd (simde__m256d a, simde__m256d b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_addsub_pd(a, b);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a),
+      b_ = simde__m256d_to_private(b);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128d[0] = simde_mm_addsub_pd(a_.m128d[0], b_.m128d[0]);
+      r_.m128d[1] = simde_mm_addsub_pd(a_.m128d[1], b_.m128d[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i += 2) {
+        r_.f64[  i  ] = a_.f64[  i  ] - b_.f64[  i  ];
+        r_.f64[i + 1] = a_.f64[i + 1] + b_.f64[i + 1];
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_addsub_pd
+  #define _mm256_addsub_pd(a, b) simde_mm256_addsub_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_and_ps (simde__m256 a, simde__m256 b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_and_ps(a, b);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a),
+      b_ = simde__m256_to_private(b);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128[0] = simde_mm_and_ps(a_.m128[0], b_.m128[0]);
+      r_.m128[1] = simde_mm_and_ps(a_.m128[1], b_.m128[1]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32f = a_.i32f & b_.i32f;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) {
+        r_.i32f[i] = a_.i32f[i] & b_.i32f[i];
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_and_ps
+  #define _mm256_and_ps(a, b) simde_mm256_and_ps(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_and_pd (simde__m256d a, simde__m256d b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_and_pd(a, b);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a),
+      b_ = simde__m256d_to_private(b);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128d[0] = simde_mm_and_pd(a_.m128d[0], b_.m128d[0]);
+      r_.m128d[1] = simde_mm_and_pd(a_.m128d[1], b_.m128d[1]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32f = a_.i32f & b_.i32f;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) {
+        r_.i32f[i] = a_.i32f[i] & b_.i32f[i];
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_and_pd
+  #define _mm256_and_pd(a, b) simde_mm256_and_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_andnot_ps (simde__m256 a, simde__m256 b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_andnot_ps(a, b);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a),
+      b_ = simde__m256_to_private(b);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128[0] = simde_mm_andnot_ps(a_.m128[0], b_.m128[0]);
+      r_.m128[1] = simde_mm_andnot_ps(a_.m128[1], b_.m128[1]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32f = ~a_.i32f & b_.i32f;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) {
+        r_.i32f[i] = ~a_.i32f[i] & b_.i32f[i];
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_andnot_ps
+  #define _mm256_andnot_ps(a, b) simde_mm256_andnot_ps(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_andnot_pd (simde__m256d a, simde__m256d b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_andnot_pd(a, b);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a),
+      b_ = simde__m256d_to_private(b);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128d[0] = simde_mm_andnot_pd(a_.m128d[0], b_.m128d[0]);
+      r_.m128d[1] = simde_mm_andnot_pd(a_.m128d[1], b_.m128d[1]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32f = ~a_.i32f & b_.i32f;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) {
+        r_.i32f[i] = ~a_.i32f[i] & b_.i32f[i];
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_andnot_pd
+  #define _mm256_andnot_pd(a, b) simde_mm256_andnot_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_blend_ps (simde__m256 a, simde__m256 b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) {
+  simde__m256_private
+    r_,
+    a_ = simde__m256_to_private(a),
+    b_ = simde__m256_to_private(b);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+    r_.f32[i] = ((imm8 >> i) & 1) ? b_.f32[i] : a_.f32[i];
+  }
+
+  return simde__m256_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX_NATIVE)
+#  define simde_mm256_blend_ps(a, b, imm8) _mm256_blend_ps(a, b, imm8)
+#elif SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+#  define simde_mm256_blend_ps(a, b, imm8) \
+      simde_mm256_set_m128( \
+          simde_mm_blend_ps(simde_mm256_extractf128_ps(a, 1), simde_mm256_extractf128_ps(b, 1), (imm8) >> 4), \
+          simde_mm_blend_ps(simde_mm256_extractf128_ps(a, 0), simde_mm256_extractf128_ps(b, 0), (imm8) & 0x0F))
+#endif
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_blend_ps
+  #define _mm256_blend_ps(a, b, imm8) simde_mm256_blend_ps(a, b, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_blend_pd (simde__m256d a, simde__m256d b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 15) {
+  simde__m256d_private
+    r_,
+    a_ = simde__m256d_to_private(a),
+    b_ = simde__m256d_to_private(b);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+    r_.f64[i] = ((imm8 >> i) & 1) ? b_.f64[i] : a_.f64[i];
+  }
+  return simde__m256d_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX_NATIVE)
+#  define simde_mm256_blend_pd(a, b, imm8) _mm256_blend_pd(a, b, imm8)
+#elif SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+#  define simde_mm256_blend_pd(a, b, imm8) \
+      simde_mm256_set_m128d( \
+          simde_mm_blend_pd(simde_mm256_extractf128_pd(a, 1), simde_mm256_extractf128_pd(b, 1), (imm8) >> 2), \
+          simde_mm_blend_pd(simde_mm256_extractf128_pd(a, 0), simde_mm256_extractf128_pd(b, 0), (imm8) & 3))
+#endif
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_blend_pd
+  #define _mm256_blend_pd(a, b, imm8) simde_mm256_blend_pd(a, b, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_blendv_ps (simde__m256 a, simde__m256 b, simde__m256 mask) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_blendv_ps(a, b, mask);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a),
+      b_ = simde__m256_to_private(b),
+      mask_ = simde__m256_to_private(mask);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128[0] = simde_mm_blendv_ps(a_.m128[0], b_.m128[0], mask_.m128[0]);
+      r_.m128[1] = simde_mm_blendv_ps(a_.m128[1], b_.m128[1], mask_.m128[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+        r_.f32[i] = (mask_.u32[i] & (UINT32_C(1) << 31)) ? b_.f32[i] : a_.f32[i];
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_blendv_ps
+  #define _mm256_blendv_ps(a, b, imm8) simde_mm256_blendv_ps(a, b, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_blendv_pd (simde__m256d a, simde__m256d b, simde__m256d mask) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_blendv_pd(a, b, mask);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a),
+      b_ = simde__m256d_to_private(b),
+      mask_ = simde__m256d_to_private(mask);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128d[0] = simde_mm_blendv_pd(a_.m128d[0], b_.m128d[0], mask_.m128d[0]);
+      r_.m128d[1] = simde_mm_blendv_pd(a_.m128d[1], b_.m128d[1], mask_.m128d[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
+        r_.f64[i] = (mask_.u64[i] & (UINT64_C(1) << 63)) ? b_.f64[i] : a_.f64[i];
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_blendv_pd
+  #define _mm256_blendv_pd(a, b, imm8) simde_mm256_blendv_pd(a, b, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_broadcast_pd (simde__m128d const * mem_addr) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_broadcast_pd(mem_addr);
+  #else
+    simde__m256d_private r_;
+
+    simde__m128d tmp = simde_mm_loadu_pd(HEDLEY_REINTERPRET_CAST(simde_float64 const*, mem_addr));
+    r_.m128d[0] = tmp;
+    r_.m128d[1] = tmp;
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_broadcast_pd
+  #define _mm256_broadcast_pd(mem_addr) simde_mm256_broadcast_pd(mem_addr)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_broadcast_ps (simde__m128 const * mem_addr) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_broadcast_ps(mem_addr);
+  #else
+    simde__m256_private r_;
+
+    simde__m128 tmp = simde_mm_loadu_ps(HEDLEY_REINTERPRET_CAST(simde_float32 const*, mem_addr));
+    r_.m128[0] = tmp;
+    r_.m128[1] = tmp;
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_broadcast_ps
+  #define _mm256_broadcast_ps(mem_addr) simde_mm256_broadcast_ps(HEDLEY_REINTERPRET_CAST(simde__m128 const*, mem_addr))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_broadcast_sd (simde_float64 const * a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_broadcast_sd(a);
+  #else
+    return simde_mm256_set1_pd(*a);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_broadcast_sd
+  #define _mm256_broadcast_sd(mem_addr) simde_mm256_broadcast_sd(HEDLEY_REINTERPRET_CAST(double const*, mem_addr))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_broadcast_ss (simde_float32 const * a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm_broadcast_ss(a);
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    return simde__m128_from_wasm_v128(wasm_v128_load32_splat(a));
+  #else
+    return simde_mm_set1_ps(*a);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm_broadcast_ss
+  #define _mm_broadcast_ss(mem_addr) simde_mm_broadcast_ss(mem_addr)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_broadcast_ss (simde_float32 const * a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_broadcast_ss(a);
+  #else
+    return simde_mm256_set1_ps(*a);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_broadcast_ss
+  #define _mm256_broadcast_ss(mem_addr) simde_mm256_broadcast_ss(mem_addr)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_castpd128_pd256 (simde__m128d a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_castpd128_pd256(a);
+  #else
+    simde__m256d_private r_;
+    simde__m128d_private a_ = simde__m128d_to_private(a);
+
+    r_.m128d_private[0] = a_;
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_castpd128_pd256
+  #define _mm256_castpd128_pd256(a) simde_mm256_castpd128_pd256(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm256_castpd256_pd128 (simde__m256d a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_castpd256_pd128(a);
+  #else
+    simde__m256d_private a_ = simde__m256d_to_private(a);
+    return a_.m128d[0];
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_castpd256_pd128
+  #define _mm256_castpd256_pd128(a) simde_mm256_castpd256_pd128(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_castps128_ps256 (simde__m128 a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_castps128_ps256(a);
+  #else
+    simde__m256_private r_;
+    simde__m128_private a_ = simde__m128_to_private(a);
+
+    r_.m128_private[0] = a_;
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_castps128_ps256
+  #define _mm256_castps128_ps256(a) simde_mm256_castps128_ps256(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm256_castps256_ps128 (simde__m256 a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_castps256_ps128(a);
+  #else
+    simde__m256_private a_ = simde__m256_to_private(a);
+    return a_.m128[0];
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_castps256_ps128
+  #define _mm256_castps256_ps128(a) simde_mm256_castps256_ps128(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_castsi128_si256 (simde__m128i a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_castsi128_si256(a);
+  #else
+    simde__m256i_private r_;
+    simde__m128i_private a_ = simde__m128i_to_private(a);
+
+    r_.m128i_private[0] = a_;
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_castsi128_si256
+  #define _mm256_castsi128_si256(a) simde_mm256_castsi128_si256(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm256_castsi256_si128 (simde__m256i a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_castsi256_si128(a);
+  #else
+    simde__m256i_private a_ = simde__m256i_to_private(a);
+    return a_.m128i[0];
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_castsi256_si128
+  #define _mm256_castsi256_si128(a) simde_mm256_castsi256_si128(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_round_ps (simde__m256 a, const int rounding) {
+  simde__m256_private
+    r_,
+    a_ = simde__m256_to_private(a);
+
+  switch (rounding & ~SIMDE_MM_FROUND_NO_EXC) {
+    #if defined(simde_math_nearbyintf)
+      case SIMDE_MM_FROUND_CUR_DIRECTION:
+        for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+          r_.f32[i] = simde_math_nearbyintf(a_.f32[i]);
+        }
+        break;
+    #endif
+
+    #if defined(simde_math_roundf)
+      case SIMDE_MM_FROUND_TO_NEAREST_INT:
+        for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+          r_.f32[i] = simde_math_roundf(a_.f32[i]);
+        }
+        break;
+    #endif
+
+    #if defined(simde_math_floorf)
+      case SIMDE_MM_FROUND_TO_NEG_INF:
+        for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+          r_.f32[i] = simde_math_floorf(a_.f32[i]);
+        }
+        break;
+    #endif
+
+    #if defined(simde_math_ceilf)
+      case SIMDE_MM_FROUND_TO_POS_INF:
+        for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+          r_.f32[i] = simde_math_ceilf(a_.f32[i]);
+        }
+        break;
+    #endif
+
+    #if defined(simde_math_truncf)
+      case SIMDE_MM_FROUND_TO_ZERO:
+        for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+          r_.f32[i] = simde_math_truncf(a_.f32[i]);
+        }
+        break;
+    #endif
+
+    default:
+      HEDLEY_UNREACHABLE_RETURN(simde_mm256_undefined_ps());
+  }
+
+  return simde__m256_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX_NATIVE)
+  #define simde_mm256_round_ps(a, rounding) _mm256_round_ps(a, rounding)
+#elif SIMDE_NATURAL_VECTOR_SIZE_LE(128) && defined(SIMDE_STATEMENT_EXPR_)
+  #define simde_mm256_round_ps(a, rounding) SIMDE_STATEMENT_EXPR_(({ \
+    simde__m256_private \
+      simde_mm256_round_ps_r_ = simde__m256_to_private(simde_mm256_setzero_ps()), \
+      simde_mm256_round_ps_a_ = simde__m256_to_private(a); \
+    \
+    for (size_t simde_mm256_round_ps_i = 0 ; simde_mm256_round_ps_i < (sizeof(simde_mm256_round_ps_r_.m128) / sizeof(simde_mm256_round_ps_r_.m128[0])) ; simde_mm256_round_ps_i++) { \
+      simde_mm256_round_ps_r_.m128[simde_mm256_round_ps_i] = simde_mm_round_ps(simde_mm256_round_ps_a_.m128[simde_mm256_round_ps_i], rounding); \
+    } \
+    \
+    simde__m256_from_private(simde_mm256_round_ps_r_); \
+  }))
+#endif
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_round_ps
+  #define _mm256_round_ps(a, rounding) simde_mm256_round_ps(a, rounding)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_round_pd (simde__m256d a, const int rounding) {
+  simde__m256d_private
+    r_,
+    a_ = simde__m256d_to_private(a);
+
+  switch (rounding & ~SIMDE_MM_FROUND_NO_EXC) {
+    #if defined(simde_math_nearbyint)
+      case SIMDE_MM_FROUND_CUR_DIRECTION:
+        for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+          r_.f64[i] = simde_math_nearbyint(a_.f64[i]);
+        }
+        break;
+    #endif
+
+    #if defined(simde_math_round)
+      case SIMDE_MM_FROUND_TO_NEAREST_INT:
+        for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+          r_.f64[i] = simde_math_round(a_.f64[i]);
+        }
+        break;
+    #endif
+
+    #if defined(simde_math_floor)
+      case SIMDE_MM_FROUND_TO_NEG_INF:
+        for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+          r_.f64[i] = simde_math_floor(a_.f64[i]);
+        }
+        break;
+    #endif
+
+    #if defined(simde_math_ceil)
+      case SIMDE_MM_FROUND_TO_POS_INF:
+        for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+          r_.f64[i] = simde_math_ceil(a_.f64[i]);
+        }
+        break;
+    #endif
+
+    #if defined(simde_math_trunc)
+      case SIMDE_MM_FROUND_TO_ZERO:
+        for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+          r_.f64[i] = simde_math_trunc(a_.f64[i]);
+        }
+        break;
+    #endif
+
+    default:
+      HEDLEY_UNREACHABLE_RETURN(simde_mm256_undefined_pd());
+  }
+
+  return simde__m256d_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX_NATIVE)
+  #define simde_mm256_round_pd(a, rounding) _mm256_round_pd(a, rounding)
+#elif SIMDE_NATURAL_VECTOR_SIZE_LE(128) && defined(SIMDE_STATEMENT_EXPR_)
+  #define simde_mm256_round_pd(a, rounding) SIMDE_STATEMENT_EXPR_(({ \
+    simde__m256d_private \
+      simde_mm256_round_pd_r_ = simde__m256d_to_private(simde_mm256_setzero_pd()), \
+      simde_mm256_round_pd_a_ = simde__m256d_to_private(a); \
+    \
+    for (size_t simde_mm256_round_pd_i = 0 ; simde_mm256_round_pd_i < (sizeof(simde_mm256_round_pd_r_.m128d) / sizeof(simde_mm256_round_pd_r_.m128d[0])) ; simde_mm256_round_pd_i++) { \
+      simde_mm256_round_pd_r_.m128d[simde_mm256_round_pd_i] = simde_mm_round_pd(simde_mm256_round_pd_a_.m128d[simde_mm256_round_pd_i], rounding); \
+    } \
+    \
+    simde__m256d_from_private(simde_mm256_round_pd_r_); \
+  }))
+#endif
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_round_pd
+  #define _mm256_round_pd(a, rounding) simde_mm256_round_pd(a, rounding)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_ceil_pd (simde__m256d a) {
+  return simde_mm256_round_pd(a, SIMDE_MM_FROUND_TO_POS_INF);
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_ceil_pd
+  #define _mm256_ceil_pd(a) simde_mm256_ceil_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_ceil_ps (simde__m256 a) {
+  return simde_mm256_round_ps(a, SIMDE_MM_FROUND_TO_POS_INF);
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_ceil_ps
+  #define _mm256_ceil_ps(a) simde_mm256_ceil_ps(a)
+#endif
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DIAGNOSTIC_DISABLE_FLOAT_EQUAL
+
+/* This implementation does not support signaling NaNs (yet?) */
+SIMDE_HUGE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cmp_pd (simde__m128d a, simde__m128d b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 31) {
+  switch (imm8) {
+    case SIMDE_CMP_EQ_UQ:
+    case SIMDE_CMP_EQ_US:
+      return simde_mm_or_pd(simde_mm_cmpunord_pd(a, b), simde_mm_cmpeq_pd(a, b));
+      break;
+    case SIMDE_CMP_EQ_OQ:
+    case SIMDE_CMP_EQ_OS:
+      return simde_mm_cmpeq_pd(a, b);
+      break;
+    case SIMDE_CMP_NGE_US:
+    case SIMDE_CMP_NGE_UQ:
+      return simde_x_mm_not_pd(simde_mm_cmpge_pd(a, b));
+      break;
+    case SIMDE_CMP_LT_OS:
+    case SIMDE_CMP_LT_OQ:
+      return simde_mm_cmplt_pd(a, b);
+      break;
+    case SIMDE_CMP_NGT_US:
+    case SIMDE_CMP_NGT_UQ:
+      return simde_x_mm_not_pd(simde_mm_cmpgt_pd(a, b));
+      break;
+    case SIMDE_CMP_LE_OS:
+    case SIMDE_CMP_LE_OQ:
+      return simde_mm_cmple_pd(a, b);
+      break;
+    case SIMDE_CMP_NEQ_UQ:
+    case SIMDE_CMP_NEQ_US:
+      return simde_mm_cmpneq_pd(a, b);
+      break;
+    case SIMDE_CMP_NEQ_OQ:
+    case SIMDE_CMP_NEQ_OS:
+      return simde_mm_and_pd(simde_mm_cmpord_pd(a, b), simde_mm_cmpneq_pd(a, b));
+      break;
+    case SIMDE_CMP_NLT_US:
+    case SIMDE_CMP_NLT_UQ:
+      return simde_x_mm_not_pd(simde_mm_cmplt_pd(a, b));
+      break;
+    case SIMDE_CMP_GE_OS:
+    case SIMDE_CMP_GE_OQ:
+      return simde_mm_cmpge_pd(a, b);
+      break;
+    case SIMDE_CMP_NLE_US:
+    case SIMDE_CMP_NLE_UQ:
+      return simde_x_mm_not_pd(simde_mm_cmple_pd(a, b));
+      break;
+    case SIMDE_CMP_GT_OS:
+    case SIMDE_CMP_GT_OQ:
+      return simde_mm_cmpgt_pd(a, b);
+      break;
+    case SIMDE_CMP_FALSE_OQ:
+    case SIMDE_CMP_FALSE_OS:
+      return simde_mm_setzero_pd();
+      break;
+    case SIMDE_CMP_TRUE_UQ:
+    case SIMDE_CMP_TRUE_US:
+      return simde_x_mm_setone_pd();
+      break;
+    case SIMDE_CMP_UNORD_Q:
+    case SIMDE_CMP_UNORD_S:
+      return simde_mm_cmpunord_pd(a, b);
+      break;
+    case SIMDE_CMP_ORD_Q:
+    case SIMDE_CMP_ORD_S:
+      return simde_mm_cmpord_pd(a, b);
+      break;
+  }
+
+  HEDLEY_UNREACHABLE_RETURN(simde_mm_setzero_pd());
+}
+#if defined(__clang__) && defined(__AVX512DQ__)
+  #define simde_mm_cmp_pd(a, b, imm8) (__extension__ ({ \
+    simde__m128d simde_mm_cmp_pd_r; \
+    switch (imm8) { \
+      case SIMDE_CMP_FALSE_OQ: \
+      case SIMDE_CMP_FALSE_OS: \
+        simde_mm_cmp_pd_r = simde_mm_setzero_pd(); \
+        break; \
+      case SIMDE_CMP_TRUE_UQ: \
+      case SIMDE_CMP_TRUE_US: \
+        simde_mm_cmp_pd_r = simde_x_mm_setone_pd(); \
+        break; \
+      default: \
+        simde_mm_cmp_pd_r = simde_mm_cmp_pd(a, b, imm8); \
+        break; \
+    } \
+    simde_mm_cmp_pd_r; \
+  }))
+#elif defined(SIMDE_X86_AVX_NATIVE)
+#  define simde_mm_cmp_pd(a, b, imm8) _mm_cmp_pd(a, b, imm8)
+#endif
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cmp_pd
+  #define _mm_cmp_pd(a, b, imm8) simde_mm_cmp_pd(a, b, imm8)
+#endif
+
+SIMDE_HUGE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cmp_ps (simde__m128 a, simde__m128 b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 31) {
+  switch (imm8) {
+    case SIMDE_CMP_EQ_UQ:
+    case SIMDE_CMP_EQ_US:
+      return simde_mm_or_ps(simde_mm_cmpunord_ps(a, b), simde_mm_cmpeq_ps(a, b));
+      break;
+    case SIMDE_CMP_EQ_OQ:
+    case SIMDE_CMP_EQ_OS:
+      return simde_mm_cmpeq_ps(a, b);
+      break;
+    case SIMDE_CMP_NGE_US:
+    case SIMDE_CMP_NGE_UQ:
+      return simde_x_mm_not_ps(simde_mm_cmpge_ps(a, b));
+      break;
+    case SIMDE_CMP_LT_OS:
+    case SIMDE_CMP_LT_OQ:
+      return simde_mm_cmplt_ps(a, b);
+      break;
+    case SIMDE_CMP_NGT_US:
+    case SIMDE_CMP_NGT_UQ:
+      return simde_x_mm_not_ps(simde_mm_cmpgt_ps(a, b));
+      break;
+    case SIMDE_CMP_LE_OS:
+    case SIMDE_CMP_LE_OQ:
+      return simde_mm_cmple_ps(a, b);
+      break;
+    case SIMDE_CMP_NEQ_UQ:
+    case SIMDE_CMP_NEQ_US:
+      return simde_mm_cmpneq_ps(a, b);
+      break;
+    case SIMDE_CMP_NEQ_OQ:
+    case SIMDE_CMP_NEQ_OS:
+      return simde_mm_and_ps(simde_mm_cmpord_ps(a, b), simde_mm_cmpneq_ps(a, b));
+      break;
+    case SIMDE_CMP_NLT_US:
+    case SIMDE_CMP_NLT_UQ:
+      return simde_x_mm_not_ps(simde_mm_cmplt_ps(a, b));
+      break;
+    case SIMDE_CMP_GE_OS:
+    case SIMDE_CMP_GE_OQ:
+      return simde_mm_cmpge_ps(a, b);
+      break;
+    case SIMDE_CMP_NLE_US:
+    case SIMDE_CMP_NLE_UQ:
+      return simde_x_mm_not_ps(simde_mm_cmple_ps(a, b));
+      break;
+    case SIMDE_CMP_GT_OS:
+    case SIMDE_CMP_GT_OQ:
+      return simde_mm_cmpgt_ps(a, b);
+      break;
+    case SIMDE_CMP_FALSE_OQ:
+    case SIMDE_CMP_FALSE_OS:
+      return simde_mm_setzero_ps();
+      break;
+    case SIMDE_CMP_TRUE_UQ:
+    case SIMDE_CMP_TRUE_US:
+      return simde_x_mm_setone_ps();
+      break;
+    case SIMDE_CMP_UNORD_Q:
+    case SIMDE_CMP_UNORD_S:
+      return simde_mm_cmpunord_ps(a, b);
+      break;
+    case SIMDE_CMP_ORD_Q:
+    case SIMDE_CMP_ORD_S:
+      return simde_mm_cmpord_ps(a, b);
+      break;
+  }
+
+  HEDLEY_UNREACHABLE_RETURN(simde_mm_setzero_ps());
+}
+/* Prior to 9.0 clang has problems with _mm{,256}_cmp_{ps,pd} for all four of the true/false
+ * comparisons, but only when AVX-512 is enabled. */
+#if defined(__clang__) && defined(__AVX512DQ__)
+  #define simde_mm_cmp_ps(a, b, imm8) (__extension__ ({ \
+    simde__m128 simde_mm_cmp_ps_r; \
+    switch (imm8) { \
+      case SIMDE_CMP_FALSE_OQ: \
+      case SIMDE_CMP_FALSE_OS: \
+        simde_mm_cmp_ps_r = simde_mm_setzero_ps(); \
+        break; \
+      case SIMDE_CMP_TRUE_UQ: \
+      case SIMDE_CMP_TRUE_US: \
+        simde_mm_cmp_ps_r = simde_x_mm_setone_ps(); \
+        break; \
+      default: \
+        simde_mm_cmp_ps_r = simde_mm_cmp_ps(a, b, imm8); \
+        break; \
+    } \
+    simde_mm_cmp_ps_r; \
+  }))
+#elif defined(SIMDE_X86_AVX_NATIVE)
+  #define simde_mm_cmp_ps(a, b, imm8) _mm_cmp_ps(a, b, imm8)
+#endif
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cmp_ps
+  #define _mm_cmp_ps(a, b, imm8) simde_mm_cmp_ps(a, b, imm8)
+#endif
+
+SIMDE_HUGE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cmp_sd (simde__m128d a, simde__m128d b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 31) {
+  simde__m128d_private
+    a_ = simde__m128d_to_private(a),
+    b_ = simde__m128d_to_private(b);
+
+  switch (imm8) {
+    case SIMDE_CMP_EQ_OQ:
+    case SIMDE_CMP_EQ_OS:
+      a_.i64[0] = (a_.f64[0] == b_.f64[0]) ? ~INT64_C(0) : INT64_C(0);
+      break;
+
+    case SIMDE_CMP_LT_OQ:
+    case SIMDE_CMP_LT_OS:
+      a_.i64[0] = (a_.f64[0] < b_.f64[0]) ? ~INT64_C(0) : INT64_C(0);
+      break;
+
+    case SIMDE_CMP_LE_OQ:
+    case SIMDE_CMP_LE_OS:
+      a_.i64[0] = (a_.f64[0] <= b_.f64[0]) ? ~INT64_C(0) : INT64_C(0);
+      break;
+
+    case SIMDE_CMP_UNORD_Q:
+    case SIMDE_CMP_UNORD_S:
+      a_.i64[0] = ((a_.f64[0] != a_.f64[0]) || (b_.f64[0] != b_.f64[0])) ? ~INT64_C(0) : INT64_C(0);
+      break;
+
+    case SIMDE_CMP_NEQ_UQ:
+    case SIMDE_CMP_NEQ_US:
+      a_.i64[0] = ((a_.f64[0] == a_.f64[0]) & (b_.f64[0] == b_.f64[0]) & (a_.f64[0] != b_.f64[0])) ? ~INT64_C(0) : INT64_C(0);
+      break;
+
+    case SIMDE_CMP_NEQ_OQ:
+    case SIMDE_CMP_NEQ_OS:
+      a_.i64[0] = ((a_.f64[0] == a_.f64[0]) & (b_.f64[0] == b_.f64[0]) & (a_.f64[0] != b_.f64[0])) ? ~INT64_C(0) : INT64_C(0);
+      break;
+
+    case SIMDE_CMP_NLT_UQ:
+    case SIMDE_CMP_NLT_US:
+      a_.i64[0] = !(a_.f64[0] < b_.f64[0]) ? ~INT64_C(0) : INT64_C(0);
+      break;
+
+    case SIMDE_CMP_NLE_UQ:
+    case SIMDE_CMP_NLE_US:
+      a_.i64[0] = !(a_.f64[0] <= b_.f64[0]) ? ~INT64_C(0) : INT64_C(0);
+      break;
+
+    case SIMDE_CMP_ORD_Q:
+    case SIMDE_CMP_ORD_S:
+      a_.i64[0] = ((a_.f64[0] == a_.f64[0]) & (b_.f64[0] == b_.f64[0])) ? ~INT64_C(0) : INT64_C(0);
+      break;
+
+    case SIMDE_CMP_EQ_UQ:
+    case SIMDE_CMP_EQ_US:
+      a_.i64[0] = ((a_.f64[0] != a_.f64[0]) | (b_.f64[0] != b_.f64[0]) | (a_.f64[0] == b_.f64[0])) ? ~INT64_C(0) : INT64_C(0);
+      break;
+
+    case SIMDE_CMP_NGE_UQ:
+    case SIMDE_CMP_NGE_US:
+      a_.i64[0] = !(a_.f64[0] >= b_.f64[0]) ? ~INT64_C(0) : INT64_C(0);
+      break;
+
+    case SIMDE_CMP_NGT_UQ:
+    case SIMDE_CMP_NGT_US:
+      a_.i64[0] = !(a_.f64[0] > b_.f64[0]) ? ~INT64_C(0) : INT64_C(0);
+      break;
+
+    case SIMDE_CMP_FALSE_OQ:
+    case SIMDE_CMP_FALSE_OS:
+      a_.i64[0] = INT64_C(0);
+      break;
+
+    case SIMDE_CMP_GE_OQ:
+    case SIMDE_CMP_GE_OS:
+      a_.i64[0] = (a_.f64[0] >= b_.f64[0]) ? ~INT64_C(0) : INT64_C(0);
+      break;
+
+    case SIMDE_CMP_GT_OQ:
+    case SIMDE_CMP_GT_OS:
+      a_.i64[0] = (a_.f64[0] > b_.f64[0]) ? ~INT64_C(0) : INT64_C(0);
+      break;
+
+    case SIMDE_CMP_TRUE_UQ:
+    case SIMDE_CMP_TRUE_US:
+      a_.i64[0] = ~INT64_C(0);
+      break;
+
+    default:
+      HEDLEY_UNREACHABLE();
+  }
+
+  return simde__m128d_from_private(a_);
+}
+#if defined(SIMDE_X86_AVX_NATIVE)
+#  define simde_mm_cmp_sd(a, b, imm8) _mm_cmp_sd(a, b, imm8)
+#endif
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cmp_sd
+  #define _mm_cmp_sd(a, b, imm8) simde_mm_cmp_sd(a, b, imm8)
+#endif
+
+SIMDE_HUGE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cmp_ss (simde__m128 a, simde__m128 b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 31) {
+  simde__m128_private
+    a_ = simde__m128_to_private(a),
+    b_ = simde__m128_to_private(b);
+
+  switch (imm8) {
+    case SIMDE_CMP_EQ_OQ:
+    case SIMDE_CMP_EQ_OS:
+      a_.i32[0] = (a_.f32[0] == b_.f32[0]) ? ~INT32_C(0) : INT32_C(0);
+      break;
+
+    case SIMDE_CMP_LT_OQ:
+    case SIMDE_CMP_LT_OS:
+      a_.i32[0] = (a_.f32[0] < b_.f32[0]) ? ~INT32_C(0) : INT32_C(0);
+      break;
+
+    case SIMDE_CMP_LE_OQ:
+    case SIMDE_CMP_LE_OS:
+      a_.i32[0] = (a_.f32[0] <= b_.f32[0]) ? ~INT32_C(0) : INT32_C(0);
+      break;
+
+    case SIMDE_CMP_UNORD_Q:
+    case SIMDE_CMP_UNORD_S:
+      a_.i32[0] = ((a_.f32[0] != a_.f32[0]) || (b_.f32[0] != b_.f32[0])) ? ~INT32_C(0) : INT32_C(0);
+      break;
+
+    case SIMDE_CMP_NEQ_UQ:
+    case SIMDE_CMP_NEQ_US:
+      a_.i32[0] = ((a_.f32[0] == a_.f32[0]) & (b_.f32[0] == b_.f32[0]) & (a_.f32[0] != b_.f32[0])) ? ~INT32_C(0) : INT32_C(0);
+      break;
+
+    case SIMDE_CMP_NEQ_OQ:
+    case SIMDE_CMP_NEQ_OS:
+      a_.i32[0] = ((a_.f32[0] == a_.f32[0]) & (b_.f32[0] == b_.f32[0]) & (a_.f32[0] != b_.f32[0])) ? ~INT32_C(0) : INT32_C(0);
+      break;
+
+    case SIMDE_CMP_NLT_UQ:
+    case SIMDE_CMP_NLT_US:
+      a_.i32[0] = !(a_.f32[0] < b_.f32[0]) ? ~INT32_C(0) : INT32_C(0);
+      break;
+
+    case SIMDE_CMP_NLE_UQ:
+    case SIMDE_CMP_NLE_US:
+      a_.i32[0] = !(a_.f32[0] <= b_.f32[0]) ? ~INT32_C(0) : INT32_C(0);
+      break;
+
+    case SIMDE_CMP_ORD_Q:
+    case SIMDE_CMP_ORD_S:
+      a_.i32[0] = ((a_.f32[0] == a_.f32[0]) & (b_.f32[0] == b_.f32[0])) ? ~INT32_C(0) : INT32_C(0);
+      break;
+
+    case SIMDE_CMP_EQ_UQ:
+    case SIMDE_CMP_EQ_US:
+      a_.i32[0] = ((a_.f32[0] != a_.f32[0]) | (b_.f32[0] != b_.f32[0]) | (a_.f32[0] == b_.f32[0])) ? ~INT32_C(0) : INT32_C(0);
+      break;
+
+    case SIMDE_CMP_NGE_UQ:
+    case SIMDE_CMP_NGE_US:
+      a_.i32[0] = !(a_.f32[0] >= b_.f32[0]) ? ~INT32_C(0) : INT32_C(0);
+      break;
+
+    case SIMDE_CMP_NGT_UQ:
+    case SIMDE_CMP_NGT_US:
+      a_.i32[0] = !(a_.f32[0] > b_.f32[0]) ? ~INT32_C(0) : INT32_C(0);
+      break;
+
+    case SIMDE_CMP_FALSE_OQ:
+    case SIMDE_CMP_FALSE_OS:
+      a_.i32[0] = INT32_C(0);
+      break;
+
+    case SIMDE_CMP_GE_OQ:
+    case SIMDE_CMP_GE_OS:
+      a_.i32[0] = (a_.f32[0] >= b_.f32[0]) ? ~INT32_C(0) : INT32_C(0);
+      break;
+
+    case SIMDE_CMP_GT_OQ:
+    case SIMDE_CMP_GT_OS:
+      a_.i32[0] = (a_.f32[0] > b_.f32[0]) ? ~INT32_C(0) : INT32_C(0);
+      break;
+
+    case SIMDE_CMP_TRUE_UQ:
+    case SIMDE_CMP_TRUE_US:
+      a_.i32[0] = ~INT32_C(0);
+      break;
+
+    default:
+      HEDLEY_UNREACHABLE();
+  }
+
+  return simde__m128_from_private(a_);
+}
+#if defined(SIMDE_X86_AVX_NATIVE)
+  #define simde_mm_cmp_ss(a, b, imm8) _mm_cmp_ss(a, b, imm8)
+#endif
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cmp_ss
+  #define _mm_cmp_ss(a, b, imm8) simde_mm_cmp_ss(a, b, imm8)
+#endif
+
+SIMDE_HUGE_FUNCTION_ATTRIBUTES
+simde__m256d
+#if defined(__clang__) && defined(__AVX512DQ__)
+simde_mm256_cmp_pd_internal_
+#else
+simde_mm256_cmp_pd
+#endif
+(simde__m256d a, simde__m256d b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 31) {
+  simde__m256d_private
+    r_,
+    a_ = simde__m256d_to_private(a),
+    b_ = simde__m256d_to_private(b);
+
+  switch (imm8) {
+    case SIMDE_CMP_EQ_OQ:
+    case SIMDE_CMP_EQ_OS:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+        r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), (a_.f64 == b_.f64));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+          r_.i64[i] = (a_.f64[i] == b_.f64[i]) ? ~INT32_C(0) : INT32_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_LT_OQ:
+    case SIMDE_CMP_LT_OS:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+        r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), (a_.f64 < b_.f64));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+          r_.i64[i] = (a_.f64[i] < b_.f64[i]) ? ~INT32_C(0) : INT32_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_LE_OQ:
+    case SIMDE_CMP_LE_OS:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+        r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), (a_.f64 <= b_.f64));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+          r_.i64[i] = (a_.f64[i] <= b_.f64[i]) ? ~INT32_C(0) : INT32_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_UNORD_Q:
+    case SIMDE_CMP_UNORD_S:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+        r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), (a_.f64 != a_.f64) | (b_.f64 != b_.f64));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+          r_.i64[i] = ((a_.f64[i] != a_.f64[i]) || (b_.f64[i] != b_.f64[i])) ? ~INT32_C(0) : INT32_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_NEQ_UQ:
+    case SIMDE_CMP_NEQ_US:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+        r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), (a_.f64 != b_.f64));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+          r_.i64[i] = (a_.f64[i] != b_.f64[i]) ? ~INT32_C(0) : INT32_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_NEQ_OQ:
+    case SIMDE_CMP_NEQ_OS:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+        r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), (a_.f64 == a_.f64) & (b_.f64 == b_.f64) & (a_.f64 != b_.f64));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+          r_.i64[i] = ((a_.f64[i] == a_.f64[i]) & (b_.f64[i] == b_.f64[i]) & (a_.f64[i] != b_.f64[i])) ? ~INT32_C(0) : INT32_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_NLT_UQ:
+    case SIMDE_CMP_NLT_US:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+        r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), ~(a_.f64 < b_.f64));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+          r_.i64[i] = !(a_.f64[i] < b_.f64[i]) ? ~INT32_C(0) : INT32_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_NLE_UQ:
+    case SIMDE_CMP_NLE_US:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+        r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), ~(a_.f64 <= b_.f64));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+          r_.i64[i] = !(a_.f64[i] <= b_.f64[i]) ? ~INT32_C(0) : INT32_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_ORD_Q:
+    case SIMDE_CMP_ORD_S:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+        r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), ((a_.f64 == a_.f64) & (b_.f64 == b_.f64)));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+          r_.i64[i] = ((a_.f64[i] == a_.f64[i]) & (b_.f64[i] == b_.f64[i])) ? ~INT32_C(0) : INT32_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_EQ_UQ:
+    case SIMDE_CMP_EQ_US:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+        r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), (a_.f64 != a_.f64) | (b_.f64 != b_.f64) | (a_.f64 == b_.f64));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+          r_.i64[i] = ((a_.f64[i] != a_.f64[i]) | (b_.f64[i] != b_.f64[i]) | (a_.f64[i] == b_.f64[i])) ? ~INT32_C(0) : INT32_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_NGE_UQ:
+    case SIMDE_CMP_NGE_US:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+        r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), ~(a_.f64 >= b_.f64));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+          r_.i64[i] = !(a_.f64[i] >= b_.f64[i]) ? ~INT32_C(0) : INT32_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_NGT_UQ:
+    case SIMDE_CMP_NGT_US:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+        r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), ~(a_.f64 > b_.f64));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+          r_.i64[i] = !(a_.f64[i] > b_.f64[i]) ? ~INT32_C(0) : INT32_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_FALSE_OQ:
+    case SIMDE_CMP_FALSE_OS:
+      r_ = simde__m256d_to_private(simde_mm256_setzero_pd());
+      break;
+
+    case SIMDE_CMP_GE_OQ:
+    case SIMDE_CMP_GE_OS:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+        r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), (a_.f64 >= b_.f64));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+          r_.i64[i] = (a_.f64[i] >= b_.f64[i]) ? ~INT32_C(0) : INT32_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_GT_OQ:
+    case SIMDE_CMP_GT_OS:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+        r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), (a_.f64 > b_.f64));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+          r_.i64[i] = (a_.f64[i] > b_.f64[i]) ? ~INT32_C(0) : INT32_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_TRUE_UQ:
+    case SIMDE_CMP_TRUE_US:
+      r_ = simde__m256d_to_private(simde_x_mm256_setone_pd());
+      break;
+
+    default:
+      HEDLEY_UNREACHABLE();
+  }
+
+  return simde__m256d_from_private(r_);
+}
+#if defined(__clang__) && defined(__AVX512DQ__)
+  #define simde_mm256_cmp_pd(a, b, imm8) (__extension__ ({ \
+    simde__m256d simde_mm256_cmp_pd_r; \
+    switch (imm8) { \
+      case SIMDE_CMP_FALSE_OQ: \
+      case SIMDE_CMP_FALSE_OS: \
+        simde_mm256_cmp_pd_r = simde_mm256_setzero_pd(); \
+        break; \
+      case SIMDE_CMP_TRUE_UQ: \
+      case SIMDE_CMP_TRUE_US: \
+        simde_mm256_cmp_pd_r = simde_x_mm256_setone_pd(); \
+        break; \
+      default: \
+        simde_mm256_cmp_pd_r = simde_mm256_cmp_pd_internal_(a, b, imm8); \
+        break; \
+    } \
+    simde_mm256_cmp_pd_r; \
+  }))
+#elif defined(SIMDE_X86_AVX_NATIVE)
+  #define simde_mm256_cmp_pd(a, b, imm8) _mm256_cmp_pd(a, b, imm8)
+#endif
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cmp_pd
+  #define _mm256_cmp_pd(a, b, imm8) simde_mm256_cmp_pd(a, b, imm8)
+#endif
+
+SIMDE_HUGE_FUNCTION_ATTRIBUTES
+simde__m256
+#if defined(__clang__) && defined(__AVX512DQ__)
+simde_mm256_cmp_ps_internal_
+#else
+simde_mm256_cmp_ps
+#endif
+(simde__m256 a, simde__m256 b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 31) {
+  simde__m256_private
+    r_,
+    a_ = simde__m256_to_private(a),
+    b_ = simde__m256_to_private(b);
+
+  switch (imm8) {
+    case SIMDE_CMP_EQ_OQ:
+    case SIMDE_CMP_EQ_OS:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+        r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), (a_.f32 == b_.f32));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+          r_.i32[i] = (a_.f32[i] == b_.f32[i]) ? ~INT32_C(0) : INT32_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_LT_OQ:
+    case SIMDE_CMP_LT_OS:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+        r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), (a_.f32 < b_.f32));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+          r_.i32[i] = (a_.f32[i] < b_.f32[i]) ? ~INT32_C(0) : INT32_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_LE_OQ:
+    case SIMDE_CMP_LE_OS:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+        r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), (a_.f32 <= b_.f32));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+          r_.i32[i] = (a_.f32[i] <= b_.f32[i]) ? ~INT32_C(0) : INT32_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_UNORD_Q:
+    case SIMDE_CMP_UNORD_S:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+        r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), (a_.f32 != a_.f32) | (b_.f32 != b_.f32));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+          r_.i32[i] = ((a_.f32[i] != a_.f32[i]) || (b_.f32[i] != b_.f32[i])) ? ~INT32_C(0) : INT32_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_NEQ_UQ:
+    case SIMDE_CMP_NEQ_US:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+        r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), (a_.f32 != b_.f32));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+          r_.i32[i] = (a_.f32[i] != b_.f32[i]) ? ~INT32_C(0) : INT32_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_NEQ_OQ:
+    case SIMDE_CMP_NEQ_OS:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+        r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), (a_.f32 == a_.f32) & (b_.f32 == b_.f32) & (a_.f32 != b_.f32));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+          r_.i32[i] = ((a_.f32[i] == a_.f32[i]) & (b_.f32[i] == b_.f32[i]) & (a_.f32[i] != b_.f32[i])) ? ~INT32_C(0) : INT32_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_NLT_UQ:
+    case SIMDE_CMP_NLT_US:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+        r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), ~(a_.f32 < b_.f32));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+          r_.i32[i] = !(a_.f32[i] < b_.f32[i]) ? ~INT32_C(0) : INT32_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_NLE_UQ:
+    case SIMDE_CMP_NLE_US:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+        r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), ~(a_.f32 <= b_.f32));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+          r_.i32[i] = !(a_.f32[i] <= b_.f32[i]) ? ~INT32_C(0) : INT32_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_ORD_Q:
+    case SIMDE_CMP_ORD_S:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+        r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), ((a_.f32 == a_.f32) & (b_.f32 == b_.f32)));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+          r_.i32[i] = ((a_.f32[i] == a_.f32[i]) & (b_.f32[i] == b_.f32[i])) ? ~INT32_C(0) : INT32_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_EQ_UQ:
+    case SIMDE_CMP_EQ_US:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+        r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), (a_.f32 != a_.f32) | (b_.f32 != b_.f32) | (a_.f32 == b_.f32));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+          r_.i32[i] = ((a_.f32[i] != a_.f32[i]) | (b_.f32[i] != b_.f32[i]) | (a_.f32[i] == b_.f32[i])) ? ~INT32_C(0) : INT32_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_NGE_UQ:
+    case SIMDE_CMP_NGE_US:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+        r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), ~(a_.f32 >= b_.f32));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+          r_.i32[i] = !(a_.f32[i] >= b_.f32[i]) ? ~INT32_C(0) : INT32_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_NGT_UQ:
+    case SIMDE_CMP_NGT_US:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+        r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), ~(a_.f32 > b_.f32));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+          r_.i32[i] = !(a_.f32[i] > b_.f32[i]) ? ~INT32_C(0) : INT32_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_FALSE_OQ:
+    case SIMDE_CMP_FALSE_OS:
+      r_ = simde__m256_to_private(simde_mm256_setzero_ps());
+      break;
+
+    case SIMDE_CMP_GE_OQ:
+    case SIMDE_CMP_GE_OS:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+        r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), (a_.f32 >= b_.f32));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+          r_.i32[i] = (a_.f32[i] >= b_.f32[i]) ? ~INT32_C(0) : INT32_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_GT_OQ:
+    case SIMDE_CMP_GT_OS:
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+        r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), (a_.f32 > b_.f32));
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+          r_.i32[i] = (a_.f32[i] > b_.f32[i]) ? ~INT32_C(0) : INT32_C(0);
+        }
+      #endif
+      break;
+
+    case SIMDE_CMP_TRUE_UQ:
+    case SIMDE_CMP_TRUE_US:
+      r_ = simde__m256_to_private(simde_x_mm256_setone_ps());
+      break;
+
+    default:
+      HEDLEY_UNREACHABLE();
+  }
+
+  return simde__m256_from_private(r_);
+}
+#if defined(__clang__) && defined(__AVX512DQ__)
+  #define simde_mm256_cmp_ps(a, b, imm8) (__extension__ ({ \
+    simde__m256 simde_mm256_cmp_ps_r; \
+    switch (imm8) { \
+      case SIMDE_CMP_FALSE_OQ: \
+      case SIMDE_CMP_FALSE_OS: \
+        simde_mm256_cmp_ps_r = simde_mm256_setzero_ps(); \
+        break; \
+      case SIMDE_CMP_TRUE_UQ: \
+      case SIMDE_CMP_TRUE_US: \
+        simde_mm256_cmp_ps_r = simde_x_mm256_setone_ps(); \
+        break; \
+      default: \
+        simde_mm256_cmp_ps_r = simde_mm256_cmp_ps_internal_(a, b, imm8); \
+        break; \
+    } \
+    simde_mm256_cmp_ps_r; \
+  }))
+#elif defined(SIMDE_X86_AVX_NATIVE)
+  #define simde_mm256_cmp_ps(a, b, imm8) _mm256_cmp_ps(a, b, imm8)
+#elif defined(SIMDE_STATEMENT_EXPR_) && SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+  #define simde_mm256_cmp_ps(a, b, imm8) SIMDE_STATEMENT_EXPR_(({ \
+    simde__m256_private \
+      simde_mm256_cmp_ps_r_ = simde__m256_to_private(simde_mm256_setzero_ps()), \
+      simde_mm256_cmp_ps_a_ = simde__m256_to_private((a)), \
+      simde_mm256_cmp_ps_b_ = simde__m256_to_private((b)); \
+    \
+    for (size_t i = 0 ; i < (sizeof(simde_mm256_cmp_ps_r_.m128) / sizeof(simde_mm256_cmp_ps_r_.m128[0])) ; i++) { \
+      simde_mm256_cmp_ps_r_.m128[i] = simde_mm_cmp_ps(simde_mm256_cmp_ps_a_.m128[i], simde_mm256_cmp_ps_b_.m128[i], (imm8)); \
+    } \
+    \
+    simde__m256_from_private(simde_mm256_cmp_ps_r_); \
+  }))
+#endif
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cmp_ps
+  #define _mm256_cmp_ps(a, b, imm8) simde_mm256_cmp_ps(a, b, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_x_mm256_copysign_ps(simde__m256 dest, simde__m256 src) {
+  simde__m256_private
+    r_,
+    dest_ = simde__m256_to_private(dest),
+    src_ = simde__m256_to_private(src);
+
+  #if defined(simde_math_copysignf)
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_copysignf(dest_.f32[i], src_.f32[i]);
+    }
+  #else
+    simde__m256 sgnbit = simde_mm256_xor_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C(0.0)), simde_mm256_set1_ps(-SIMDE_FLOAT32_C(0.0)));
+    return simde_mm256_xor_ps(simde_mm256_and_ps(sgnbit, src), simde_mm256_andnot_ps(sgnbit, dest));
+  #endif
+
+  return simde__m256_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_x_mm256_copysign_pd(simde__m256d dest, simde__m256d src) {
+  simde__m256d_private
+    r_,
+    dest_ = simde__m256d_to_private(dest),
+    src_ = simde__m256d_to_private(src);
+
+  #if defined(simde_math_copysign)
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_copysign(dest_.f64[i], src_.f64[i]);
+    }
+  #else
+    simde__m256d sgnbit = simde_mm256_xor_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C(0.0)), simde_mm256_set1_pd(-SIMDE_FLOAT64_C(0.0)));
+    return simde_mm256_xor_pd(simde_mm256_and_pd(sgnbit, src), simde_mm256_andnot_pd(sgnbit, dest));
+  #endif
+
+  return simde__m256d_from_private(r_);
+}
+
+HEDLEY_DIAGNOSTIC_POP /* -Wfloat-equal */
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_cvtepi32_pd (simde__m128i a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_cvtepi32_pd(a);
+  #else
+    simde__m256d_private r_;
+    simde__m128i_private a_ = simde__m128i_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = HEDLEY_STATIC_CAST(simde_float64, a_.i32[i]);
+    }
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cvtepi32_pd
+  #define _mm256_cvtepi32_pd(a) simde_mm256_cvtepi32_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+  simde_mm256_cvtepi32_ps (simde__m256i a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_cvtepi32_ps(a);
+  #else
+    simde__m256_private r_;
+    simde__m256i_private a_ = simde__m256i_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = HEDLEY_STATIC_CAST(simde_float32, a_.i32[i]);
+    }
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cvtepi32_ps
+  #define _mm256_cvtepi32_ps(a) simde_mm256_cvtepi32_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm256_cvtpd_epi32 (simde__m256d a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_cvtpd_epi32(a);
+  #else
+    simde__m128i_private r_;
+    simde__m256d_private a_ = simde__m256d_to_private(a);
+
+    #if defined(simde_math_nearbyint)
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(a_.f64) / sizeof(a_.f64[0])) ; i++) {
+        r_.i32[i] = SIMDE_CONVERT_FTOI(int32_t, simde_math_nearbyint(a_.f64[i]));
+      }
+    #else
+      HEDLEY_UNREACHABLE();
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cvtpd_epi32
+  #define _mm256_cvtpd_epi32(a) simde_mm256_cvtpd_epi32(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm256_cvtpd_ps (simde__m256d a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_cvtpd_ps(a);
+  #else
+    simde__m128_private r_;
+    simde__m256d_private a_ = simde__m256d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = HEDLEY_STATIC_CAST(simde_float32, a_.f64[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cvtpd_ps
+  #define _mm256_cvtpd_ps(a) simde_mm256_cvtpd_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_cvtps_epi32 (simde__m256 a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_cvtps_epi32(a);
+  #else
+    simde__m256i_private r_;
+    simde__m256_private a_ = simde__m256_to_private(a);
+
+    #if defined(simde_math_nearbyintf)
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(a_.f32) / sizeof(a_.f32[0])) ; i++) {
+        r_.i32[i] = SIMDE_CONVERT_FTOI(int32_t, simde_math_nearbyintf(a_.f32[i]));
+      }
+    #else
+      HEDLEY_UNREACHABLE();
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cvtps_epi32
+  #define _mm256_cvtps_epi32(a) simde_mm256_cvtps_epi32(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_cvtps_pd (simde__m128 a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_cvtps_pd(a);
+  #else
+    simde__m256d_private r_;
+    simde__m128_private a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(a_.f32) / sizeof(a_.f32[0])) ; i++) {
+      r_.f64[i] = HEDLEY_STATIC_CAST(double, a_.f32[i]);
+    }
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cvtps_pd
+  #define _mm256_cvtps_pd(a) simde_mm256_cvtps_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float64
+simde_mm256_cvtsd_f64 (simde__m256d a) {
+  #if defined(SIMDE_X86_AVX_NATIVE) && ( \
+      SIMDE_DETECT_CLANG_VERSION_CHECK(3,9,0) || \
+      HEDLEY_GCC_VERSION_CHECK(7,0,0) || \
+      HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+      HEDLEY_MSVC_VERSION_CHECK(19,14,0))
+    return _mm256_cvtsd_f64(a);
+  #else
+    simde__m256d_private a_ = simde__m256d_to_private(a);
+    return a_.f64[0];
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cvtsd_f64
+  #define _mm256_cvtsd_f64(a) simde_mm256_cvtsd_f64(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int32_t
+simde_mm256_cvtsi256_si32 (simde__m256i a) {
+  #if defined(SIMDE_X86_AVX_NATIVE) && ( \
+      SIMDE_DETECT_CLANG_VERSION_CHECK(3,9,0) || \
+      HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+      HEDLEY_MSVC_VERSION_CHECK(19,14,0))
+    return _mm256_cvtsi256_si32(a);
+  #else
+    simde__m256i_private a_ = simde__m256i_to_private(a);
+    return a_.i32[0];
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cvtsi256_si32
+  #define _mm256_cvtsi256_si32(a) simde_mm256_cvtsi256_si32(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float32
+simde_mm256_cvtss_f32 (simde__m256 a) {
+  #if defined(SIMDE_X86_AVX_NATIVE) && ( \
+      SIMDE_DETECT_CLANG_VERSION_CHECK(3,9,0) || \
+      HEDLEY_GCC_VERSION_CHECK(7,0,0) || \
+      HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \
+      HEDLEY_MSVC_VERSION_CHECK(19,14,0))
+    return _mm256_cvtss_f32(a);
+  #else
+    simde__m256_private a_ = simde__m256_to_private(a);
+    return a_.f32[0];
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cvtss_f32
+  #define _mm256_cvtss_f32(a) simde_mm256_cvtss_f32(a)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm256_cvttpd_epi32 (simde__m256d a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_cvttpd_epi32(a);
+  #else
+    simde__m128i_private r_;
+    simde__m256d_private a_ = simde__m256d_to_private(a);
+
+    #if defined(simde_math_trunc)
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(a_.f64) / sizeof(a_.f64[0])) ; i++) {
+        r_.i32[i] = SIMDE_CONVERT_FTOI(int32_t, simde_math_trunc(a_.f64[i]));
+      }
+    #else
+      HEDLEY_UNREACHABLE();
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cvttpd_epi32
+  #define _mm256_cvttpd_epi32(a) simde_mm256_cvttpd_epi32(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_cvttps_epi32 (simde__m256 a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_cvttps_epi32(a);
+  #else
+    simde__m256i_private r_;
+    simde__m256_private a_ = simde__m256_to_private(a);
+
+    #if defined(simde_math_truncf)
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(a_.f32) / sizeof(a_.f32[0])) ; i++) {
+        r_.i32[i] = SIMDE_CONVERT_FTOI(int32_t, simde_math_truncf(a_.f32[i]));
+      }
+    #else
+      HEDLEY_UNREACHABLE();
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cvttps_epi32
+  #define _mm256_cvttps_epi32(a) simde_mm256_cvttps_epi32(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_div_ps (simde__m256 a, simde__m256 b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_div_ps(a, b);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a),
+      b_ = simde__m256_to_private(b);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128[0] = simde_mm_div_ps(a_.m128[0], b_.m128[0]);
+      r_.m128[1] = simde_mm_div_ps(a_.m128[1], b_.m128[1]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.f32 = a_.f32 / b_.f32;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = a_.f32[i] / b_.f32[i];
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_div_ps
+  #define _mm256_div_ps(a, b) simde_mm256_div_ps(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_div_pd (simde__m256d a, simde__m256d b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_div_pd(a, b);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a),
+      b_ = simde__m256d_to_private(b);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128d[0] = simde_mm_div_pd(a_.m128d[0], b_.m128d[0]);
+      r_.m128d[1] = simde_mm_div_pd(a_.m128d[1], b_.m128d[1]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.f64 = a_.f64 / b_.f64;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = a_.f64[i] / b_.f64[i];
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_div_pd
+  #define _mm256_div_pd(a, b) simde_mm256_div_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm256_extractf128_pd (simde__m256d a, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 1) {
+  simde__m256d_private a_ = simde__m256d_to_private(a);
+  return a_.m128d[imm8];
+}
+#if defined(SIMDE_X86_AVX_NATIVE)
+#  define simde_mm256_extractf128_pd(a, imm8) _mm256_extractf128_pd(a, imm8)
+#endif
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_extractf128_pd
+  #define _mm256_extractf128_pd(a, imm8) simde_mm256_extractf128_pd(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm256_extractf128_ps (simde__m256 a, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 1) {
+  simde__m256_private a_ = simde__m256_to_private(a);
+  return a_.m128[imm8];
+}
+#if defined(SIMDE_X86_AVX_NATIVE)
+#  define simde_mm256_extractf128_ps(a, imm8) _mm256_extractf128_ps(a, imm8)
+#endif
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_extractf128_ps
+  #define _mm256_extractf128_ps(a, imm8) simde_mm256_extractf128_ps(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm256_extractf128_si256 (simde__m256i a, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 1) {
+  simde__m256i_private a_ = simde__m256i_to_private(a);
+  return a_.m128i[imm8];
+}
+#if defined(SIMDE_X86_AVX_NATIVE)
+#  define simde_mm256_extractf128_si256(a, imm8) _mm256_extractf128_si256(a, imm8)
+#endif
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_extractf128_si256
+  #define _mm256_extractf128_si256(a, imm8) simde_mm256_extractf128_si256(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_floor_pd (simde__m256d a) {
+  return simde_mm256_round_pd(a, SIMDE_MM_FROUND_TO_NEG_INF);
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_floor_pd
+  #define _mm256_floor_pd(a) simde_mm256_floor_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_floor_ps (simde__m256 a) {
+  return simde_mm256_round_ps(a, SIMDE_MM_FROUND_TO_NEG_INF);
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_floor_ps
+  #define _mm256_floor_ps(a) simde_mm256_floor_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_insert_epi8 (simde__m256i a, int8_t i, const int index)
+    SIMDE_REQUIRE_RANGE(index, 0, 31) {
+  simde__m256i_private a_ = simde__m256i_to_private(a);
+
+  a_.i8[index] = i;
+
+  return simde__m256i_from_private(a_);
+}
+#if defined(SIMDE_X86_AVX_NATIVE) && \
+    (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,10,0))
+  #define simde_mm256_insert_epi8(a, i, index) _mm256_insert_epi8(a, i, index)
+#endif
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_insert_epi8
+  #define _mm256_insert_epi8(a, i, index) simde_mm256_insert_epi8(a, i, index)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_insert_epi16 (simde__m256i a, int16_t i, const int index)
+    SIMDE_REQUIRE_RANGE(index, 0, 15)  {
+  simde__m256i_private a_ = simde__m256i_to_private(a);
+
+  a_.i16[index] = i;
+
+  return simde__m256i_from_private(a_);
+}
+#if defined(SIMDE_X86_AVX_NATIVE) && \
+    (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,10,0))
+  #define simde_mm256_insert_epi16(a, i, index) _mm256_insert_epi16(a, i, index)
+#endif
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_insert_epi16
+  #define _mm256_insert_epi16(a, i, imm8) simde_mm256_insert_epi16(a, i, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_insert_epi32 (simde__m256i a, int32_t i, const int index)
+    SIMDE_REQUIRE_RANGE(index, 0, 7)  {
+  simde__m256i_private a_ = simde__m256i_to_private(a);
+
+  a_.i32[index] = i;
+
+  return simde__m256i_from_private(a_);
+}
+#if defined(SIMDE_X86_AVX_NATIVE) && \
+    (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,10,0))
+  #define simde_mm256_insert_epi32(a, i, index) _mm256_insert_epi32(a, i, index)
+#endif
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_insert_epi32
+  #define _mm256_insert_epi32(a, i, index) simde_mm256_insert_epi32(a, i, index)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_insert_epi64 (simde__m256i a, int64_t i, const int index)
+    SIMDE_REQUIRE_RANGE(index, 0, 3)  {
+  simde__m256i_private a_ = simde__m256i_to_private(a);
+
+  a_.i64[index] = i;
+
+  return simde__m256i_from_private(a_);
+}
+#if defined(SIMDE_X86_AVX_NATIVE) && defined(SIMDE_ARCH_AMD64) && \
+    (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,20,0)) && \
+    SIMDE_DETECT_CLANG_VERSION_CHECK(3,7,0)
+  #define simde_mm256_insert_epi64(a, i, index) _mm256_insert_epi64(a, i, index)
+#endif
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARCH_AMD64))
+  #undef _mm256_insert_epi64
+  #define _mm256_insert_epi64(a, i, index) simde_mm256_insert_epi64(a, i, index)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d simde_mm256_insertf128_pd(simde__m256d a, simde__m128d b, int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 1) {
+  simde__m256d_private a_ = simde__m256d_to_private(a);
+  simde__m128d_private b_ = simde__m128d_to_private(b);
+
+  a_.m128d_private[imm8] = b_;
+
+  return simde__m256d_from_private(a_);
+}
+#if defined(SIMDE_X86_AVX_NATIVE)
+  #define simde_mm256_insertf128_pd(a, b, imm8) _mm256_insertf128_pd(a, b, imm8)
+#endif
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_insertf128_pd
+  #define _mm256_insertf128_pd(a, b, imm8) simde_mm256_insertf128_pd(a, b, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256 simde_mm256_insertf128_ps(simde__m256 a, simde__m128 b, int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 1) {
+  simde__m256_private a_ = simde__m256_to_private(a);
+  simde__m128_private b_ = simde__m128_to_private(b);
+
+  a_.m128_private[imm8] = b_;
+
+  return simde__m256_from_private(a_);
+}
+#if defined(SIMDE_X86_AVX_NATIVE)
+  #define simde_mm256_insertf128_ps(a, b, imm8) _mm256_insertf128_ps(a, b, imm8)
+#endif
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_insertf128_ps
+  #define _mm256_insertf128_ps(a, b, imm8) simde_mm256_insertf128_ps(a, b, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i simde_mm256_insertf128_si256(simde__m256i a, simde__m128i b, int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 1) {
+  simde__m256i_private a_ = simde__m256i_to_private(a);
+  simde__m128i_private b_ = simde__m128i_to_private(b);
+
+  a_.m128i_private[imm8] = b_;
+
+  return simde__m256i_from_private(a_);
+}
+#if defined(SIMDE_X86_AVX_NATIVE)
+  #define simde_mm256_insertf128_si256(a, b, imm8) _mm256_insertf128_si256(a, b, imm8)
+#endif
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_insertf128_si256
+  #define _mm256_insertf128_si256(a, b, imm8) simde_mm256_insertf128_si256(a, b, imm8)
+#endif
+
+#if defined(SIMDE_X86_AVX_NATIVE)
+#  define simde_mm256_dp_ps(a, b, imm8) _mm256_dp_ps(a, b, imm8)
+#else
+#  define simde_mm256_dp_ps(a, b, imm8) \
+    simde_mm256_set_m128( \
+      simde_mm_dp_ps(simde_mm256_extractf128_ps(a, 1), simde_mm256_extractf128_ps(b, 1), imm8), \
+      simde_mm_dp_ps(simde_mm256_extractf128_ps(a, 0), simde_mm256_extractf128_ps(b, 0), imm8))
+#endif
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_dp_ps
+  #define _mm256_dp_ps(a, b, imm8) simde_mm256_dp_ps(a, b, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int32_t
+simde_mm256_extract_epi32 (simde__m256i a, const int index)
+    SIMDE_REQUIRE_RANGE(index, 0, 7) {
+  simde__m256i_private a_ = simde__m256i_to_private(a);
+  return a_.i32[index];
+}
+#if defined(SIMDE_X86_AVX_NATIVE) && \
+    (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,10,0))
+  #define simde_mm256_extract_epi32(a, index) _mm256_extract_epi32(a, index)
+#endif
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_extract_epi32
+  #define _mm256_extract_epi32(a, index) simde_mm256_extract_epi32(a, index)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int64_t
+simde_mm256_extract_epi64 (simde__m256i a, const int index)
+    SIMDE_REQUIRE_RANGE(index, 0, 3) {
+  simde__m256i_private a_ = simde__m256i_to_private(a);
+  return a_.i64[index];
+}
+#if defined(SIMDE_X86_AVX_NATIVE) && defined(SIMDE_ARCH_AMD64)
+  #if !defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,20,0)
+    #define simde_mm256_extract_epi64(a, index) _mm256_extract_epi64(a, index)
+  #endif
+#endif
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARCH_AMD64))
+  #undef _mm256_extract_epi64
+  #define _mm256_extract_epi64(a, index) simde_mm256_extract_epi64(a, index)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_lddqu_si256 (simde__m256i const * mem_addr) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_loadu_si256(mem_addr);
+  #else
+    simde__m256i r;
+    simde_memcpy(&r, SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m256i), sizeof(r));
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_lddqu_si256
+  #define _mm256_lddqu_si256(a) simde_mm256_lddqu_si256(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_load_pd (const double mem_addr[HEDLEY_ARRAY_PARAM(4)]) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_load_pd(mem_addr);
+  #else
+    simde__m256d r;
+    simde_memcpy(&r, SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m256d), sizeof(r));
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_load_pd
+  #define _mm256_load_pd(a) simde_mm256_load_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_load_ps (const float mem_addr[HEDLEY_ARRAY_PARAM(8)]) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_load_ps(mem_addr);
+  #else
+    simde__m256 r;
+    simde_memcpy(&r, SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m256), sizeof(r));
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_load_ps
+  #define _mm256_load_ps(a) simde_mm256_load_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_load_si256 (simde__m256i const * mem_addr) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_load_si256(mem_addr);
+  #else
+    simde__m256i r;
+    simde_memcpy(&r, SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m256i), sizeof(r));
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_load_si256
+  #define _mm256_load_si256(a) simde_mm256_load_si256(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_loadu_pd (const double a[HEDLEY_ARRAY_PARAM(4)]) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_loadu_pd(a);
+  #else
+    simde__m256d r;
+    simde_memcpy(&r, a, sizeof(r));
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_loadu_pd
+  #define _mm256_loadu_pd(a) simde_mm256_loadu_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_loadu_ps (const float a[HEDLEY_ARRAY_PARAM(8)]) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_loadu_ps(a);
+  #else
+    simde__m256 r;
+    simde_memcpy(&r, a, sizeof(r));
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_loadu_ps
+  #define _mm256_loadu_ps(a) simde_mm256_loadu_ps(a)
+#endif
+
+#if defined(SIMDE_X86_AVX512VL_NATIVE) && defined(SIMDE_X86_AVX512BW_NATIVE) \
+    && !defined(SIMDE_BUG_GCC_95483) && !defined(SIMDE_BUG_CLANG_REV_344862) \
+    && (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,20,0))
+  #define simde_mm256_loadu_epi8(mem_addr) _mm256_loadu_epi8(mem_addr)
+#else
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_loadu_epi8(void const * mem_addr) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_loadu_si256(SIMDE_ALIGN_CAST(__m256i const *, mem_addr));
+  #else
+    simde__m256i r;
+    simde_memcpy(&r, mem_addr, sizeof(r));
+    return r;
+  #endif
+}
+#endif
+#define simde_x_mm256_loadu_epi8(mem_addr) simde_mm256_loadu_epi8(mem_addr)
+#if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && (defined(SIMDE_BUG_GCC_95483) || defined(SIMDE_BUG_CLANG_REV_344862)))
+  #undef _mm256_loadu_epi8
+  #define _mm256_loadu_epi8(a) simde_mm256_loadu_epi8(a)
+#endif
+
+#if defined(SIMDE_X86_AVX512VL_NATIVE) && defined(SIMDE_X86_AVX512BW_NATIVE) \
+    && !defined(SIMDE_BUG_GCC_95483) && !defined(SIMDE_BUG_CLANG_REV_344862) \
+    && (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,20,0))
+  #define simde_mm256_loadu_epi16(mem_addr) _mm256_loadu_epi16(mem_addr)
+#else
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_loadu_epi16(void const * mem_addr) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_loadu_si256(SIMDE_ALIGN_CAST(__m256i const *, mem_addr));
+  #else
+    simde__m256i r;
+    simde_memcpy(&r, mem_addr, sizeof(r));
+    return r;
+  #endif
+}
+#endif
+#define simde_x_mm256_loadu_epi16(mem_addr) simde_mm256_loadu_epi16(mem_addr)
+#if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && (defined(SIMDE_BUG_GCC_95483) || defined(SIMDE_BUG_CLANG_REV_344862)))
+  #undef _mm256_loadu_epi16
+  #define _mm256_loadu_epi16(a) simde_mm256_loadu_epi16(a)
+#endif
+
+#if defined(SIMDE_X86_AVX512VL_NATIVE) && !defined(SIMDE_BUG_GCC_95483) \
+    && !defined(SIMDE_BUG_CLANG_REV_344862) \
+    && (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,20,0))
+  #define simde_mm256_loadu_epi32(mem_addr) _mm256_loadu_epi32(mem_addr)
+#else
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_loadu_epi32(void const * mem_addr) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_loadu_si256(SIMDE_ALIGN_CAST(__m256i const *, mem_addr));
+  #else
+    simde__m256i r;
+    simde_memcpy(&r, mem_addr, sizeof(r));
+    return r;
+  #endif
+}
+#endif
+#define simde_x_mm256_loadu_epi32(mem_addr) simde_mm256_loadu_epi32(mem_addr)
+#if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && (defined(SIMDE_BUG_GCC_95483) || defined(SIMDE_BUG_CLANG_REV_344862)))
+  #undef _mm256_loadu_epi32
+  #define _mm256_loadu_epi32(a) simde_mm256_loadu_epi32(a)
+#endif
+
+#if defined(SIMDE_X86_AVX512VL_NATIVE) && !defined(SIMDE_BUG_GCC_95483) \
+    && !defined(SIMDE_BUG_CLANG_REV_344862) \
+    && (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,20,0))
+  #define simde_mm256_loadu_epi64(mem_addr) _mm256_loadu_epi64(mem_addr)
+#else
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_loadu_epi64(void const * mem_addr) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_loadu_si256(SIMDE_ALIGN_CAST(__m256i const *, mem_addr));
+  #else
+    simde__m256i r;
+    simde_memcpy(&r, mem_addr, sizeof(r));
+    return r;
+  #endif
+}
+#endif
+#define simde_x_mm256_loadu_epi64(mem_addr) simde_mm256_loadu_epi64(mem_addr)
+#if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && (defined(SIMDE_BUG_GCC_95483) || defined(SIMDE_BUG_CLANG_REV_344862)))
+  #undef _mm256_loadu_epi64
+  #define _mm256_loadu_epi64(a) simde_mm256_loadu_epi64(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_loadu_si256 (void const * mem_addr) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_loadu_si256(SIMDE_ALIGN_CAST(const __m256i*, mem_addr));
+  #else
+    simde__m256i r;
+    simde_memcpy(&r, mem_addr, sizeof(r));
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_loadu_si256
+  #define _mm256_loadu_si256(mem_addr) simde_mm256_loadu_si256(mem_addr)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_loadu2_m128 (const float hiaddr[HEDLEY_ARRAY_PARAM(4)], const float loaddr[HEDLEY_ARRAY_PARAM(4)]) {
+  #if defined(SIMDE_X86_AVX_NATIVE) && !defined(SIMDE_BUG_GCC_91341) && !defined(SIMDE_BUG_MCST_LCC_MISSING_AVX_LOAD_STORE_M128_FUNCS)
+    return _mm256_loadu2_m128(hiaddr, loaddr);
+  #else
+    return
+      simde_mm256_insertf128_ps(simde_mm256_castps128_ps256(simde_mm_loadu_ps(loaddr)),
+              simde_mm_loadu_ps(hiaddr), 1);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_loadu2_m128
+  #define _mm256_loadu2_m128(hiaddr, loaddr) simde_mm256_loadu2_m128(hiaddr, loaddr)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_loadu2_m128d (const double hiaddr[HEDLEY_ARRAY_PARAM(2)], const double loaddr[HEDLEY_ARRAY_PARAM(2)]) {
+  #if defined(SIMDE_X86_AVX_NATIVE) && !defined(SIMDE_BUG_GCC_91341) && !defined(SIMDE_BUG_MCST_LCC_MISSING_AVX_LOAD_STORE_M128_FUNCS)
+    return _mm256_loadu2_m128d(hiaddr, loaddr);
+  #else
+    return
+      simde_mm256_insertf128_pd(simde_mm256_castpd128_pd256(simde_mm_loadu_pd(loaddr)),
+              simde_mm_loadu_pd(hiaddr), 1);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_loadu2_m128d
+  #define _mm256_loadu2_m128d(hiaddr, loaddr) simde_mm256_loadu2_m128d(hiaddr, loaddr)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_loadu2_m128i (const simde__m128i* hiaddr, const simde__m128i* loaddr) {
+  #if defined(SIMDE_X86_AVX_NATIVE) && !defined(SIMDE_BUG_GCC_91341) && !defined(SIMDE_BUG_MCST_LCC_MISSING_AVX_LOAD_STORE_M128_FUNCS)
+    return _mm256_loadu2_m128i(hiaddr, loaddr);
+  #else
+    return
+      simde_mm256_insertf128_si256(simde_mm256_castsi128_si256(simde_mm_loadu_si128(loaddr)),
+          simde_mm_loadu_si128(hiaddr), 1);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_loadu2_m128i
+  #define _mm256_loadu2_m128i(hiaddr, loaddr) simde_mm256_loadu2_m128i(hiaddr, loaddr)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_maskload_pd (const simde_float64 mem_addr[HEDLEY_ARRAY_PARAM(2)], simde__m128i mask) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0)
+      return _mm_maskload_pd(mem_addr, HEDLEY_REINTERPRET_CAST(simde__m128d, mask));
+    #else
+      return _mm_maskload_pd(mem_addr, mask);
+    #endif
+  #else
+    simde__m128d_private r_;
+    simde__m128i_private
+      mask_ = simde__m128i_to_private(mask),
+      mask_shr_;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      mask_shr_.neon_i64 = vshrq_n_s64(mask_.neon_i64, 63);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      return simde_mm_and_pd(simde_mm_load_pd(mem_addr),
+          simde__m128d_from_wasm_v128(wasm_i64x2_shr(mask_.wasm_v128, 63)));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(mask_.i64) / sizeof(mask_.i64[0])) ; i++) {
+        mask_shr_.i64[i] = mask_.i64[i] >> 63;
+      }
+    #endif
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = mask_shr_.i64[i] ? mem_addr[i] : SIMDE_FLOAT64_C(0.0);
+      }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm_maskload_pd
+  #define _mm_maskload_pd(mem_addr, mask) simde_mm_maskload_pd(HEDLEY_REINTERPRET_CAST(double const*, mem_addr), mask)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_maskload_pd (const simde_float64 mem_addr[HEDLEY_ARRAY_PARAM(4)], simde__m256i mask) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0)
+      return _mm256_maskload_pd(mem_addr, HEDLEY_REINTERPRET_CAST(simde__m256d, mask));
+    #else
+      return _mm256_maskload_pd(mem_addr, mask);
+    #endif
+  #else
+    simde__m256d_private r_;
+    simde__m256i_private mask_ = simde__m256i_to_private(mask);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = (mask_.i64[i] >> 63) ? mem_addr[i] : SIMDE_FLOAT64_C(0.0);
+    }
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_maskload_pd
+  #define _mm256_maskload_pd(mem_addr, mask) simde_mm256_maskload_pd(HEDLEY_REINTERPRET_CAST(double const*, mem_addr), mask)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_maskload_ps (const simde_float32 mem_addr[HEDLEY_ARRAY_PARAM(4)], simde__m128i mask) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0)
+      return _mm_maskload_ps(mem_addr, HEDLEY_REINTERPRET_CAST(simde__m128, mask));
+    #else
+      return _mm_maskload_ps(mem_addr, mask);
+    #endif
+  #else
+    simde__m128_private r_;
+    simde__m128i_private
+      mask_ = simde__m128i_to_private(mask),
+      mask_shr_;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      mask_shr_.neon_i32 = vshrq_n_s32(mask_.neon_i32, 31);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      return simde_mm_and_ps(simde_mm_load_ps(mem_addr),
+          simde__m128_from_wasm_v128(wasm_i32x4_shr(mask_.wasm_v128, 31)));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(mask_.i32) / sizeof(mask_.i32[0])) ; i++) {
+        mask_shr_.i32[i] = mask_.i32[i] >> 31;
+      }
+    #endif
+
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = mask_shr_.i32[i] ? mem_addr[i] : SIMDE_FLOAT32_C(0.0);
+      }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm_maskload_ps
+  #define _mm_maskload_ps(mem_addr, mask) simde_mm_maskload_ps(HEDLEY_REINTERPRET_CAST(float const*, mem_addr), mask)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_maskload_ps (const simde_float32 mem_addr[HEDLEY_ARRAY_PARAM(8)], simde__m256i mask) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0)
+      return _mm256_maskload_ps(mem_addr, HEDLEY_REINTERPRET_CAST(simde__m256, mask));
+    #else
+      return _mm256_maskload_ps(mem_addr, mask);
+    #endif
+  #else
+    simde__m256_private r_;
+    simde__m256i_private mask_ = simde__m256i_to_private(mask);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = (mask_.i32[i] >> 31) ? mem_addr[i] : SIMDE_FLOAT32_C(0.0);
+    }
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_maskload_ps
+  #define _mm256_maskload_ps(mem_addr, mask) simde_mm256_maskload_ps(HEDLEY_REINTERPRET_CAST(float const*, mem_addr), mask)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_maskstore_pd (simde_float64 mem_addr[HEDLEY_ARRAY_PARAM(2)], simde__m128i mask, simde__m128d a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0)
+      _mm_maskstore_pd(mem_addr, HEDLEY_REINTERPRET_CAST(simde__m128d, mask), a);
+    #else
+      _mm_maskstore_pd(mem_addr, mask, a);
+    #endif
+  #else
+    simde__m128i_private mask_ = simde__m128i_to_private(mask);
+    simde__m128d_private a_ = simde__m128d_to_private(a);
+
+    #if defined(SIMDE_WASM_SIMD128_NATIVE)
+      if ((HEDLEY_STATIC_CAST(unsigned long long, wasm_i64x2_extract_lane(mask_.wasm_v128, 0)) & 0x8000000000000000ull) != 0)
+        mem_addr[0] = wasm_f64x2_extract_lane(a_.wasm_v128, 0);
+      if ((HEDLEY_STATIC_CAST(unsigned long long, wasm_i64x2_extract_lane(mask_.wasm_v128, 1)) & 0x8000000000000000ull) != 0)
+        mem_addr[1] = wasm_f64x2_extract_lane(a_.wasm_v128, 1);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(a_.f64) / sizeof(a_.f64[0])) ; i++) {
+        if (mask_.u64[i] >> 63)
+          mem_addr[i] = a_.f64[i];
+      }
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm_maskstore_pd
+  #define _mm_maskstore_pd(mem_addr, mask, a) simde_mm_maskstore_pd(HEDLEY_REINTERPRET_CAST(double*, mem_addr), mask, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm256_maskstore_pd (simde_float64 mem_addr[HEDLEY_ARRAY_PARAM(4)], simde__m256i mask, simde__m256d a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0)
+      _mm256_maskstore_pd(mem_addr, HEDLEY_REINTERPRET_CAST(simde__m256d, mask), a);
+    #else
+      _mm256_maskstore_pd(mem_addr, mask, a);
+    #endif
+  #else
+    simde__m256i_private mask_ = simde__m256i_to_private(mask);
+    simde__m256d_private a_ = simde__m256d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(a_.f64) / sizeof(a_.f64[0])) ; i++) {
+      if (mask_.u64[i] & (UINT64_C(1) << 63))
+        mem_addr[i] = a_.f64[i];
+    }
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_maskstore_pd
+  #define _mm256_maskstore_pd(mem_addr, mask, a) simde_mm256_maskstore_pd(HEDLEY_REINTERPRET_CAST(double*, mem_addr), mask, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_maskstore_ps (simde_float32 mem_addr[HEDLEY_ARRAY_PARAM(4)], simde__m128i mask, simde__m128 a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0)
+      _mm_maskstore_ps(mem_addr, HEDLEY_REINTERPRET_CAST(simde__m128, mask), a);
+    #else
+      _mm_maskstore_ps(mem_addr, mask, a);
+    #endif
+  #else
+    simde__m128i_private mask_ = simde__m128i_to_private(mask);
+    simde__m128_private a_ = simde__m128_to_private(a);
+
+    #if defined(SIMDE_WASM_SIMD128_NATIVE)
+      if ((HEDLEY_STATIC_CAST(unsigned long long, wasm_i32x4_extract_lane(mask_.wasm_v128, 0)) & 0x80000000ull) != 0)
+        mem_addr[0] = wasm_f32x4_extract_lane(a_.wasm_v128, 0);
+      if ((HEDLEY_STATIC_CAST(unsigned long long, wasm_i32x4_extract_lane(mask_.wasm_v128, 1)) & 0x80000000ull) != 0)
+        mem_addr[1] = wasm_f32x4_extract_lane(a_.wasm_v128, 1);
+      if ((HEDLEY_STATIC_CAST(unsigned long long, wasm_i32x4_extract_lane(mask_.wasm_v128, 2)) & 0x80000000ull) != 0)
+        mem_addr[2] = wasm_f32x4_extract_lane(a_.wasm_v128, 2);
+      if ((HEDLEY_STATIC_CAST(unsigned long long, wasm_i32x4_extract_lane(mask_.wasm_v128, 3)) & 0x80000000ull) != 0)
+        mem_addr[3] = wasm_f32x4_extract_lane(a_.wasm_v128, 3);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(a_.f32) / sizeof(a_.f32[0])) ; i++) {
+        if (mask_.u32[i] & (UINT32_C(1) << 31))
+          mem_addr[i] = a_.f32[i];
+      }
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm_maskstore_ps
+  #define _mm_maskstore_ps(mem_addr, mask, a) simde_mm_maskstore_ps(HEDLEY_REINTERPRET_CAST(float*, mem_addr), mask, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm256_maskstore_ps (simde_float32 mem_addr[HEDLEY_ARRAY_PARAM(8)], simde__m256i mask, simde__m256 a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0)
+      _mm256_maskstore_ps(mem_addr, HEDLEY_REINTERPRET_CAST(simde__m256, mask), a);
+    #else
+      _mm256_maskstore_ps(mem_addr, mask, a);
+    #endif
+  #else
+    simde__m256i_private mask_ = simde__m256i_to_private(mask);
+    simde__m256_private a_ = simde__m256_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(a_.f32) / sizeof(a_.f32[0])) ; i++) {
+      if (mask_.u32[i] & (UINT32_C(1) << 31))
+        mem_addr[i] = a_.f32[i];
+    }
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_maskstore_ps
+  #define _mm256_maskstore_ps(mem_addr, mask, a) simde_mm256_maskstore_ps(HEDLEY_REINTERPRET_CAST(float*, mem_addr), mask, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_min_ps (simde__m256 a, simde__m256 b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_min_ps(a, b);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a),
+      b_ = simde__m256_to_private(b);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128[0] = simde_mm_min_ps(a_.m128[0], b_.m128[0]);
+      r_.m128[1] = simde_mm_min_ps(a_.m128[1], b_.m128[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = (a_.f32[i] < b_.f32[i]) ? a_.f32[i] : b_.f32[i];
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_min_ps
+  #define _mm256_min_ps(a, b) simde_mm256_min_ps(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_min_pd (simde__m256d a, simde__m256d b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_min_pd(a, b);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a),
+      b_ = simde__m256d_to_private(b);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128d[0] = simde_mm_min_pd(a_.m128d[0], b_.m128d[0]);
+      r_.m128d[1] = simde_mm_min_pd(a_.m128d[1], b_.m128d[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = (a_.f64[i] < b_.f64[i]) ? a_.f64[i] : b_.f64[i];
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_min_pd
+  #define _mm256_min_pd(a, b) simde_mm256_min_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_max_ps (simde__m256 a, simde__m256 b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_max_ps(a, b);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a),
+      b_ = simde__m256_to_private(b);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128[0] = simde_mm_max_ps(a_.m128[0], b_.m128[0]);
+      r_.m128[1] = simde_mm_max_ps(a_.m128[1], b_.m128[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = (a_.f32[i] > b_.f32[i]) ? a_.f32[i] : b_.f32[i];
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_max_ps
+  #define _mm256_max_ps(a, b) simde_mm256_max_ps(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_max_pd (simde__m256d a, simde__m256d b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_max_pd(a, b);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a),
+      b_ = simde__m256d_to_private(b);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128d[0] = simde_mm_max_pd(a_.m128d[0], b_.m128d[0]);
+      r_.m128d[1] = simde_mm_max_pd(a_.m128d[1], b_.m128d[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = (a_.f64[i] > b_.f64[i]) ? a_.f64[i] : b_.f64[i];
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_max_pd
+  #define _mm256_max_pd(a, b) simde_mm256_max_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_movedup_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_movedup_pd(a);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.f64 = SIMDE_SHUFFLE_VECTOR_(64, 32, a_.f64, a_.f64, 0, 0, 2, 2);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i += 2) {
+        r_.f64[i] = r_.f64[i + 1] = a_.f64[i];
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_movedup_pd
+  #define _mm256_movedup_pd(a) simde_mm256_movedup_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_movehdup_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_movehdup_ps(a);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 32, a_.f32, a_.f32, 1, 1, 3, 3, 5, 5, 7, 7);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 1 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i += 2) {
+        r_.f32[i - 1] = r_.f32[i] = a_.f32[i];
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_movehdup_ps
+  #define _mm256_movehdup_ps(a) simde_mm256_movehdup_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_moveldup_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_moveldup_ps(a);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 32, a_.f32, a_.f32, 0, 0, 2, 2, 4, 4, 6, 6);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i += 2) {
+        r_.f32[i] = r_.f32[i + 1] = a_.f32[i];
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_moveldup_ps
+  #define _mm256_moveldup_ps(a) simde_mm256_moveldup_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm256_movemask_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_movemask_ps(a);
+  #else
+    simde__m256_private a_ = simde__m256_to_private(a);
+    int r = 0;
+
+    SIMDE_VECTORIZE_REDUCTION(|:r)
+    for (size_t i = 0 ; i < (sizeof(a_.f32) / sizeof(a_.f32[0])) ; i++) {
+      r |= (a_.u32[i] >> 31) << i;
+    }
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_movemask_ps
+  #define _mm256_movemask_ps(a) simde_mm256_movemask_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm256_movemask_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_movemask_pd(a);
+  #else
+    simde__m256d_private a_ = simde__m256d_to_private(a);
+    int r = 0;
+
+    SIMDE_VECTORIZE_REDUCTION(|:r)
+    for (size_t i = 0 ; i < (sizeof(a_.f64) / sizeof(a_.f64[0])) ; i++) {
+      r |= (a_.u64[i] >> 63) << i;
+    }
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_movemask_pd
+  #define _mm256_movemask_pd(a) simde_mm256_movemask_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_mul_ps (simde__m256 a, simde__m256 b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_mul_ps(a, b);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a),
+      b_ = simde__m256_to_private(b);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128[0] = simde_mm_mul_ps(a_.m128[0], b_.m128[0]);
+      r_.m128[1] = simde_mm_mul_ps(a_.m128[1], b_.m128[1]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.f32 = a_.f32 * b_.f32;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = a_.f32[i] * b_.f32[i];
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_mul_ps
+  #define _mm256_mul_ps(a, b) simde_mm256_mul_ps(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_mul_pd (simde__m256d a, simde__m256d b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_mul_pd(a, b);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a),
+      b_ = simde__m256d_to_private(b);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128d[0] = simde_mm_mul_pd(a_.m128d[0], b_.m128d[0]);
+      r_.m128d[1] = simde_mm_mul_pd(a_.m128d[1], b_.m128d[1]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.f64 = a_.f64 * b_.f64;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = a_.f64[i] * b_.f64[i];
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_mul_pd
+  #define _mm256_mul_pd(a, b) simde_mm256_mul_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_or_ps (simde__m256 a, simde__m256 b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_or_ps(a, b);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a),
+      b_ = simde__m256_to_private(b);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128[0] = simde_mm_or_ps(a_.m128[0], b_.m128[0]);
+      r_.m128[1] = simde_mm_or_ps(a_.m128[1], b_.m128[1]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32f = a_.i32f | b_.i32f;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+        r_.u32[i] = a_.u32[i] | b_.u32[i];
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_or_ps
+  #define _mm256_or_ps(a, b) simde_mm256_or_ps(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_or_pd (simde__m256d a, simde__m256d b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_or_pd(a, b);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a),
+      b_ = simde__m256d_to_private(b);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128d[0] = simde_mm_or_pd(a_.m128d[0], b_.m128d[0]);
+      r_.m128d[1] = simde_mm_or_pd(a_.m128d[1], b_.m128d[1]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32f = a_.i32f | b_.i32f;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
+        r_.u64[i] = a_.u64[i] | b_.u64[i];
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_or_pd
+  #define _mm256_or_pd(a, b) simde_mm256_or_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_permute_ps (simde__m256 a, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) {
+  simde__m256_private
+    r_,
+    a_ = simde__m256_to_private(a);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+    r_.f32[i] = a_.m128_private[i >> 2].f32[(imm8 >> ((i << 1) & 7)) & 3];
+  }
+
+  return simde__m256_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX_NATIVE)
+#  define simde_mm256_permute_ps(a, imm8) _mm256_permute_ps(a, imm8)
+#endif
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_permute_ps
+  #define _mm256_permute_ps(a, imm8) simde_mm256_permute_ps(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_permute_pd (simde__m256d a, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 15) {
+  simde__m256d_private
+    r_,
+    a_ = simde__m256d_to_private(a);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+    r_.f64[i] = a_.f64[((imm8 >> i) & 1) + (i & 2)];
+  }
+
+  return simde__m256d_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX_NATIVE)
+#  define simde_mm256_permute_pd(a, imm8) _mm256_permute_pd(a, imm8)
+#endif
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_permute_pd
+  #define _mm256_permute_pd(a, imm8) simde_mm256_permute_pd(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_permute_ps (simde__m128 a, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) {
+  simde__m128_private
+    r_,
+    a_ = simde__m128_to_private(a);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+    r_.f32[i] = a_.f32[(imm8 >> ((i << 1) & 7)) & 3];
+  }
+
+  return simde__m128_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX_NATIVE)
+#  define simde_mm_permute_ps(a, imm8) _mm_permute_ps(a, imm8)
+#elif defined(SIMDE_WASM_SIMD128_NATIVE)
+#  define simde_mm_permute_ps(a, imm8) simde__m128_from_wasm_v128(wasm_i32x4_shuffle(simde__m128_to_wasm_v128(a), simde__m128_to_wasm_v128(a), ((imm8) & 3), (((imm8) >> 2) & 3 ), (((imm8) >> 4) & 3), (((imm8) >> 6) & 3)))
+#endif
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm_permute_ps
+  #define _mm_permute_ps(a, imm8) simde_mm_permute_ps(a, imm8)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_permute_pd (simde__m128d a, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 3) {
+  simde__m128d_private
+    r_,
+    a_ = simde__m128d_to_private(a);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+    r_.f64[i] = a_.f64[((imm8 >> i) & 1) + (i & 2)];
+  }
+
+  return simde__m128d_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX_NATIVE)
+#  define simde_mm_permute_pd(a, imm8) _mm_permute_pd(a, imm8)
+#elif defined(SIMDE_WASM_SIMD128_NATIVE)
+#  define simde_mm_permute_pd(a, imm8) simde__m128d_from_wasm_v128(wasm_i64x2_shuffle(simde__m128d_to_wasm_v128(a), simde__m128d_to_wasm_v128(a), ((imm8) & 1), (((imm8) >> 1) & 1 )))
+#endif
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm_permute_pd
+  #define _mm_permute_pd(a, imm8) simde_mm_permute_pd(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_permutevar_ps (simde__m128 a, simde__m128i b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm_permutevar_ps(a, b);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+    simde__m128i_private b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f32x4_make(
+        (a_.f32[wasm_i32x4_extract_lane(b_.wasm_v128, 0) & 3]),
+        (a_.f32[wasm_i32x4_extract_lane(b_.wasm_v128, 1) & 3]),
+        (a_.f32[wasm_i32x4_extract_lane(b_.wasm_v128, 2) & 3]),
+        (a_.f32[wasm_i32x4_extract_lane(b_.wasm_v128, 3) & 3]));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = a_.f32[b_.i32[i] & 3];
+      }
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm_permutevar_ps
+  #define _mm_permutevar_ps(a, b) simde_mm_permutevar_ps(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_permutevar_pd (simde__m128d a, simde__m128i b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm_permutevar_pd(a, b);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+    simde__m128i_private b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f64x2_make(
+        (a_.f64[(wasm_i64x2_extract_lane(b_.wasm_v128, 0) >> 1) & 1]),
+        (a_.f64[(wasm_i64x2_extract_lane(b_.wasm_v128, 1) >> 1) & 1]));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = a_.f64[(b_.i64[i] & 2) >> 1];
+      }
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm_permutevar_pd
+  #define _mm_permutevar_pd(a, b) simde_mm_permutevar_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_permutevar_ps (simde__m256 a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_permutevar_ps(a, b);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+    simde__m256i_private b_ = simde__m256i_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = a_.f32[(b_.i32[i] & 3) + (i & 4)];
+    }
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_permutevar_ps
+  #define _mm256_permutevar_ps(a, b) simde_mm256_permutevar_ps(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_permutevar_pd (simde__m256d a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_permutevar_pd(a, b);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+    simde__m256i_private b_ = simde__m256i_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = a_.f64[((b_.i64[i] & 2) >> 1) + (i & 2)];
+    }
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_permutevar_pd
+  #define _mm256_permutevar_pd(a, b) simde_mm256_permutevar_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_permute2f128_ps (simde__m256 a, simde__m256 b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) {
+  simde__m256_private
+    r_,
+    a_ = simde__m256_to_private(a),
+    b_ = simde__m256_to_private(b);
+
+  r_.m128_private[0] = (imm8 & 0x08) ? simde__m128_to_private(simde_mm_setzero_ps()) : ((imm8 & 0x02) ? b_.m128_private[(imm8     ) & 1] : a_.m128_private[(imm8     ) & 1]);
+  r_.m128_private[1] = (imm8 & 0x80) ? simde__m128_to_private(simde_mm_setzero_ps()) : ((imm8 & 0x20) ? b_.m128_private[(imm8 >> 4) & 1] : a_.m128_private[(imm8 >> 4) & 1]);
+
+  return simde__m256_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX_NATIVE)
+#  define simde_mm256_permute2f128_ps(a, b, imm8) _mm256_permute2f128_ps(a, b, imm8)
+#endif
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_permute2f128_ps
+  #define _mm256_permute2f128_ps(a, b, imm8) simde_mm256_permute2f128_ps(a, b, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_permute2f128_pd (simde__m256d a, simde__m256d b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) {
+  simde__m256d_private
+    r_,
+    a_ = simde__m256d_to_private(a),
+    b_ = simde__m256d_to_private(b);
+
+  r_.m128d_private[0] = (imm8 & 0x08) ? simde__m128d_to_private(simde_mm_setzero_pd()) : ((imm8 & 0x02) ? b_.m128d_private[(imm8     ) & 1] : a_.m128d_private[(imm8     ) & 1]);
+  r_.m128d_private[1] = (imm8 & 0x80) ? simde__m128d_to_private(simde_mm_setzero_pd()) : ((imm8 & 0x20) ? b_.m128d_private[(imm8 >> 4) & 1] : a_.m128d_private[(imm8 >> 4) & 1]);
+
+  return simde__m256d_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX_NATIVE)
+#  define simde_mm256_permute2f128_pd(a, b, imm8) _mm256_permute2f128_pd(a, b, imm8)
+#endif
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_permute2f128_pd
+  #define _mm256_permute2f128_pd(a, b, imm8) simde_mm256_permute2f128_pd(a, b, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_permute2f128_si256 (simde__m256i a, simde__m256i b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) {
+  simde__m256i_private
+    r_,
+    a_ = simde__m256i_to_private(a),
+    b_ = simde__m256i_to_private(b);
+
+  r_.m128i_private[0] = (imm8 & 0x08) ? simde__m128i_to_private(simde_mm_setzero_si128()) : ((imm8 & 0x02) ? b_.m128i_private[(imm8     ) & 1] : a_.m128i_private[(imm8     ) & 1]);
+  r_.m128i_private[1] = (imm8 & 0x80) ? simde__m128i_to_private(simde_mm_setzero_si128()) : ((imm8 & 0x20) ? b_.m128i_private[(imm8 >> 4) & 1] : a_.m128i_private[(imm8 >> 4) & 1]);
+
+  return simde__m256i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX_NATIVE)
+#  define simde_mm256_permute2f128_si128(a, b, imm8) _mm256_permute2f128_si128(a, b, imm8)
+#endif
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_permute2f128_si256
+  #define _mm256_permute2f128_si256(a, b, imm8) simde_mm256_permute2f128_si256(a, b, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_rcp_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_rcp_ps(a);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128[0] = simde_mm_rcp_ps(a_.m128[0]);
+      r_.m128[1] = simde_mm_rcp_ps(a_.m128[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = SIMDE_FLOAT32_C(1.0) / a_.f32[i];
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_rcp_ps
+  #define _mm256_rcp_ps(a) simde_mm256_rcp_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_rsqrt_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_rsqrt_ps(a);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if defined(simde_math_sqrtf)
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = 1.0f / simde_math_sqrtf(a_.f32[i]);
+      }
+    #else
+      HEDLEY_UNREACHABLE();
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_rsqrt_ps
+  #define _mm256_rsqrt_ps(a) simde_mm256_rsqrt_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_setr_epi8 (
+    int8_t e31, int8_t e30, int8_t e29, int8_t e28, int8_t e27, int8_t e26, int8_t e25, int8_t e24,
+    int8_t e23, int8_t e22, int8_t e21, int8_t e20, int8_t e19, int8_t e18, int8_t e17, int8_t e16,
+    int8_t e15, int8_t e14, int8_t e13, int8_t e12, int8_t e11, int8_t e10, int8_t  e9, int8_t  e8,
+    int8_t  e7, int8_t  e6, int8_t  e5, int8_t  e4, int8_t  e3, int8_t  e2, int8_t  e1, int8_t  e0) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_setr_epi8(
+        e31, e30, e29, e28, e27, e26, e25, e24,
+        e23, e22, e21, e20, e19, e18, e17, e16,
+        e15, e14, e13, e12, e11, e10,  e9,  e8,
+        e7,  e6,  e5,  e4,  e3,  e2,  e1,  e0);
+  #else
+    return simde_mm256_set_epi8(
+        e0,  e1,  e2,  e3,  e4,  e5,  e6,  e7,
+        e8,  e9, e10, e11, e12, e13, e14, e15,
+        e16, e17, e18, e19, e20, e21, e22, e23,
+        e24, e25, e26, e27, e28, e29, e30, e31);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_setr_epi8
+  #define _mm256_setr_epi8(e31, e30, e29, e28, e27, e26, e25, e24, e23, e22, e21, e20, e19, e18, e17, e16, e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0) \
+    simde_mm256_setr_epi8(e31, e30, e29, e28, e27, e26, e25, e24, e23, e22, e21, e20, e19, e18, e17, e16, e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_setr_epi16 (
+    int16_t e15, int16_t e14, int16_t e13, int16_t e12, int16_t e11, int16_t e10, int16_t  e9, int16_t  e8,
+    int16_t  e7, int16_t  e6, int16_t  e5, int16_t  e4, int16_t  e3, int16_t  e2, int16_t  e1, int16_t  e0) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_setr_epi16(
+        e15, e14, e13, e12, e11, e10,  e9,  e8,
+        e7,  e6,  e5,  e4,  e3,  e2,  e1,  e0);
+  #else
+    return simde_mm256_set_epi16(
+        e0,  e1,  e2,  e3,  e4,  e5,  e6,  e7,
+        e8,  e9, e10, e11, e12, e13, e14, e15);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_setr_epi16
+  #define _mm256_setr_epi16(e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0) \
+    simde_mm256_setr_epi16(e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_setr_epi32 (
+    int32_t  e7, int32_t  e6, int32_t  e5, int32_t  e4, int32_t  e3, int32_t  e2, int32_t  e1, int32_t  e0) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_setr_epi32(e7, e6, e5, e4, e3, e2, e1, e0);
+  #else
+    return simde_mm256_set_epi32(e0, e1, e2, e3, e4, e5, e6, e7);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_setr_epi32
+  #define _mm256_setr_epi32(e7, e6, e5, e4, e3, e2, e1, e0) \
+    simde_mm256_setr_epi32(e7, e6, e5, e4, e3, e2, e1, e0)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_setr_epi64x (int64_t  e3, int64_t  e2, int64_t  e1, int64_t  e0) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_setr_epi64x(e3, e2, e1, e0);
+  #else
+    return simde_mm256_set_epi64x(e0, e1, e2, e3);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_setr_epi64x
+  #define _mm256_setr_epi64x(e3, e2, e1, e0) \
+    simde_mm256_setr_epi64x(e3, e2, e1, e0)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_setr_ps (
+    simde_float32  e7, simde_float32  e6, simde_float32  e5, simde_float32  e4,
+    simde_float32  e3, simde_float32  e2, simde_float32  e1, simde_float32  e0) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_setr_ps(e7, e6, e5, e4, e3, e2, e1, e0);
+  #else
+    return simde_mm256_set_ps(e0, e1, e2, e3, e4, e5, e6, e7);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_setr_ps
+  #define _mm256_setr_ps(e7, e6, e5, e4, e3, e2, e1, e0) \
+    simde_mm256_setr_ps(e7, e6, e5, e4, e3, e2, e1, e0)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_setr_pd (simde_float64  e3, simde_float64  e2, simde_float64  e1, simde_float64  e0) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_setr_pd(e3, e2, e1, e0);
+  #else
+    return simde_mm256_set_pd(e0, e1, e2, e3);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_setr_pd
+  #define _mm256_setr_pd(e3, e2, e1, e0) \
+    simde_mm256_setr_pd(e3, e2, e1, e0)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_setr_m128 (simde__m128 lo, simde__m128 hi) {
+  #if defined(SIMDE_X86_AVX_NATIVE) && \
+      !defined(SIMDE_BUG_GCC_REV_247851) && \
+      SIMDE_DETECT_CLANG_VERSION_CHECK(3,6,0)
+    return _mm256_setr_m128(lo, hi);
+  #else
+    return simde_mm256_set_m128(hi, lo);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_setr_m128
+  #define _mm256_setr_m128(lo, hi) \
+    simde_mm256_setr_m128(lo, hi)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_setr_m128d (simde__m128d lo, simde__m128d hi) {
+  #if defined(SIMDE_X86_AVX_NATIVE) && \
+      !defined(SIMDE_BUG_GCC_REV_247851) && \
+      SIMDE_DETECT_CLANG_VERSION_CHECK(3,6,0)
+    return _mm256_setr_m128d(lo, hi);
+  #else
+    return simde_mm256_set_m128d(hi, lo);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_setr_m128d
+  #define _mm256_setr_m128d(lo, hi) \
+    simde_mm256_setr_m128d(lo, hi)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_setr_m128i (simde__m128i lo, simde__m128i hi) {
+  #if defined(SIMDE_X86_AVX_NATIVE) && \
+      !defined(SIMDE_BUG_GCC_REV_247851) && \
+      SIMDE_DETECT_CLANG_VERSION_CHECK(3,6,0)
+    return _mm256_setr_m128i(lo, hi);
+  #else
+    return simde_mm256_set_m128i(hi, lo);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_setr_m128i
+  #define _mm256_setr_m128i(lo, hi) \
+    simde_mm256_setr_m128i(lo, hi)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_shuffle_ps (simde__m256 a, simde__m256 b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) {
+  simde__m256_private
+    r_,
+    a_ = simde__m256_to_private(a),
+    b_ = simde__m256_to_private(b);
+
+  r_.f32[0] = a_.m128_private[0].f32[(imm8 >> 0) & 3];
+  r_.f32[1] = a_.m128_private[0].f32[(imm8 >> 2) & 3];
+  r_.f32[2] = b_.m128_private[0].f32[(imm8 >> 4) & 3];
+  r_.f32[3] = b_.m128_private[0].f32[(imm8 >> 6) & 3];
+  r_.f32[4] = a_.m128_private[1].f32[(imm8 >> 0) & 3];
+  r_.f32[5] = a_.m128_private[1].f32[(imm8 >> 2) & 3];
+  r_.f32[6] = b_.m128_private[1].f32[(imm8 >> 4) & 3];
+  r_.f32[7] = b_.m128_private[1].f32[(imm8 >> 6) & 3];
+
+  return simde__m256_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX_NATIVE)
+  #define simde_mm256_shuffle_ps(a, b, imm8) _mm256_shuffle_ps(a, b, imm8)
+#elif SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+  #define simde_mm256_shuffle_ps(a, b, imm8) \
+      simde_mm256_set_m128( \
+          simde_mm_shuffle_ps(simde_mm256_extractf128_ps(a, 1), simde_mm256_extractf128_ps(b, 1), (imm8)), \
+          simde_mm_shuffle_ps(simde_mm256_extractf128_ps(a, 0), simde_mm256_extractf128_ps(b, 0), (imm8)))
+#elif defined(SIMDE_SHUFFLE_VECTOR_)
+  #define simde_mm256_shuffle_ps(a, b, imm8) \
+    SIMDE_SHUFFLE_VECTOR_(32, 32, a, b, \
+      (((imm8) >> 0) & 3) + 0, \
+      (((imm8) >> 2) & 3) + 0, \
+      (((imm8) >> 4) & 3) + 8, \
+      (((imm8) >> 6) & 3) + 8, \
+      (((imm8) >> 0) & 3) + 4, \
+      (((imm8) >> 2) & 3) + 4, \
+      (((imm8) >> 4) & 3) + 12, \
+      (((imm8) >> 6) & 3) + 12)
+#endif
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_shuffle_ps
+  #define _mm256_shuffle_ps(a, b, imm8) simde_mm256_shuffle_ps(a, b, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_shuffle_pd (simde__m256d a, simde__m256d b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 15) {
+  simde__m256d_private
+    r_,
+    a_ = simde__m256d_to_private(a),
+    b_ = simde__m256d_to_private(b);
+
+  r_.f64[0] = a_.f64[((imm8     ) & 1)    ];
+  r_.f64[1] = b_.f64[((imm8 >> 1) & 1)    ];
+  r_.f64[2] = a_.f64[((imm8 >> 2) & 1) | 2];
+  r_.f64[3] = b_.f64[((imm8 >> 3) & 1) | 2];
+
+  return simde__m256d_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX_NATIVE)
+  #define simde_mm256_shuffle_pd(a, b, imm8) _mm256_shuffle_pd(a, b, imm8)
+#elif SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+  #define simde_mm256_shuffle_pd(a, b, imm8) \
+      simde_mm256_set_m128d( \
+          simde_mm_shuffle_pd(simde_mm256_extractf128_pd(a, 1), simde_mm256_extractf128_pd(b, 1), (imm8 >> 2) & 3), \
+          simde_mm_shuffle_pd(simde_mm256_extractf128_pd(a, 0), simde_mm256_extractf128_pd(b, 0), (imm8 >> 0) & 3))
+#elif defined(SIMDE_SHUFFLE_VECTOR_)
+  #define simde_mm256_shuffle_pd(a, b, imm8) \
+    SIMDE_SHUFFLE_VECTOR_(64, 32, a, b, \
+      (((imm8) >> 0) & 1) + 0, \
+      (((imm8) >> 1) & 1) + 4, \
+      (((imm8) >> 2) & 1) + 2, \
+      (((imm8) >> 3) & 1) + 6)
+#endif
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_shuffle_pd
+  #define _mm256_shuffle_pd(a, b, imm8) simde_mm256_shuffle_pd(a, b, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_sqrt_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_sqrt_ps(a);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128[0] = simde_mm_sqrt_ps(a_.m128[0]);
+      r_.m128[1] = simde_mm_sqrt_ps(a_.m128[1]);
+    #elif defined(simde_math_sqrtf)
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_sqrtf(a_.f32[i]);
+      }
+    #else
+      HEDLEY_UNREACHABLE();
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_sqrt_ps
+  #define _mm256_sqrt_ps(a) simde_mm256_sqrt_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_sqrt_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_sqrt_pd(a);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128d[0] = simde_mm_sqrt_pd(a_.m128d[0]);
+      r_.m128d[1] = simde_mm_sqrt_pd(a_.m128d[1]);
+    #elif defined(simde_math_sqrt)
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_sqrt(a_.f64[i]);
+      }
+    #else
+      HEDLEY_UNREACHABLE();
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_sqrt_pd
+  #define _mm256_sqrt_pd(a) simde_mm256_sqrt_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm256_store_ps (simde_float32 mem_addr[8], simde__m256 a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    _mm256_store_ps(mem_addr, a);
+  #else
+    simde_memcpy(SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m256), &a, sizeof(a));
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_store_ps
+  #define _mm256_store_ps(mem_addr, a) simde_mm256_store_ps(HEDLEY_REINTERPRET_CAST(float*, mem_addr), a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm256_store_pd (simde_float64 mem_addr[4], simde__m256d a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    _mm256_store_pd(mem_addr, a);
+  #else
+    simde_memcpy(SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m256d), &a, sizeof(a));
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_store_pd
+  #define _mm256_store_pd(mem_addr, a) simde_mm256_store_pd(HEDLEY_REINTERPRET_CAST(double*, mem_addr), a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm256_store_si256 (simde__m256i* mem_addr, simde__m256i a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    _mm256_store_si256(mem_addr, a);
+  #else
+  simde_memcpy(SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m256i), &a, sizeof(a));
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_store_si256
+  #define _mm256_store_si256(mem_addr, a) simde_mm256_store_si256(mem_addr, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm256_storeu_ps (simde_float32 mem_addr[8], simde__m256 a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    _mm256_storeu_ps(mem_addr, a);
+  #else
+    simde_memcpy(mem_addr, &a, sizeof(a));
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_storeu_ps
+  #define _mm256_storeu_ps(mem_addr, a) simde_mm256_storeu_ps(HEDLEY_REINTERPRET_CAST(float*, mem_addr), a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm256_storeu_pd (simde_float64 mem_addr[4], simde__m256d a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    _mm256_storeu_pd(mem_addr, a);
+  #else
+    simde_memcpy(mem_addr, &a, sizeof(a));
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_storeu_pd
+  #define _mm256_storeu_pd(mem_addr, a) simde_mm256_storeu_pd(HEDLEY_REINTERPRET_CAST(double*, mem_addr), a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm256_storeu_si256 (void* mem_addr, simde__m256i a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    _mm256_storeu_si256(SIMDE_ALIGN_CAST(__m256i*, mem_addr), a);
+  #else
+    simde_memcpy(mem_addr, &a, sizeof(a));
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_storeu_si256
+  #define _mm256_storeu_si256(mem_addr, a) simde_mm256_storeu_si256(mem_addr, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm256_storeu2_m128 (simde_float32 hi_addr[4], simde_float32 lo_addr[4], simde__m256 a) {
+  #if defined(SIMDE_X86_AVX_NATIVE) && !defined(SIMDE_BUG_GCC_91341) && !defined(SIMDE_BUG_MCST_LCC_MISSING_AVX_LOAD_STORE_M128_FUNCS)
+    _mm256_storeu2_m128(hi_addr, lo_addr, a);
+  #else
+    simde_mm_storeu_ps(lo_addr, simde_mm256_castps256_ps128(a));
+    simde_mm_storeu_ps(hi_addr, simde_mm256_extractf128_ps(a, 1));
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_storeu2_m128
+  #define _mm256_storeu2_m128(hi_addr, lo_addr, a) simde_mm256_storeu2_m128(hi_addr, lo_addr, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm256_storeu2_m128d (simde_float64 hi_addr[2], simde_float64 lo_addr[2], simde__m256d a) {
+  #if defined(SIMDE_X86_AVX_NATIVE) && !defined(SIMDE_BUG_GCC_91341) && !defined(SIMDE_BUG_MCST_LCC_MISSING_AVX_LOAD_STORE_M128_FUNCS)
+    _mm256_storeu2_m128d(hi_addr, lo_addr, a);
+  #else
+    simde_mm_storeu_pd(lo_addr, simde_mm256_castpd256_pd128(a));
+    simde_mm_storeu_pd(hi_addr, simde_mm256_extractf128_pd(a, 1));
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_storeu2_m128d
+  #define _mm256_storeu2_m128d(hi_addr, lo_addr, a) simde_mm256_storeu2_m128d(hi_addr, lo_addr, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm256_storeu2_m128i (simde__m128i* hi_addr, simde__m128i* lo_addr, simde__m256i a) {
+  #if defined(SIMDE_X86_AVX_NATIVE) && !defined(SIMDE_BUG_GCC_91341) && !defined(SIMDE_BUG_MCST_LCC_MISSING_AVX_LOAD_STORE_M128_FUNCS)
+    _mm256_storeu2_m128i(hi_addr, lo_addr, a);
+  #else
+    simde_mm_storeu_si128(lo_addr, simde_mm256_castsi256_si128(a));
+    simde_mm_storeu_si128(hi_addr, simde_mm256_extractf128_si256(a, 1));
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_storeu2_m128i
+  #define _mm256_storeu2_m128i(hi_addr, lo_addr, a) simde_mm256_storeu2_m128i(hi_addr, lo_addr, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm256_stream_ps (simde_float32 mem_addr[8], simde__m256 a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    _mm256_stream_ps(mem_addr, a);
+  #elif HEDLEY_HAS_BUILTIN(__builtin_nontemporal_store) && defined(SIMDE_VECTOR_SUBSCRIPT)
+    __builtin_nontemporal_store(a, SIMDE_ALIGN_CAST(__typeof__(a)*, mem_addr));
+  #else
+    simde_memcpy(SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m256), &a, sizeof(a));
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_stream_ps
+  #define _mm256_stream_ps(mem_addr, a) simde_mm256_stream_ps(HEDLEY_REINTERPRET_CAST(float*, mem_addr), a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm256_stream_pd (simde_float64 mem_addr[4], simde__m256d a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    _mm256_stream_pd(mem_addr, a);
+  #elif HEDLEY_HAS_BUILTIN(__builtin_nontemporal_store) && defined(SIMDE_VECTOR_SUBSCRIPT)
+    __builtin_nontemporal_store(a, SIMDE_ALIGN_CAST(__typeof__(a)*, mem_addr));
+  #else
+    simde_memcpy(SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m256d), &a, sizeof(a));
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_stream_pd
+  #define _mm256_stream_pd(mem_addr, a) simde_mm256_stream_pd(HEDLEY_REINTERPRET_CAST(double*, mem_addr), a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm256_stream_si256 (simde__m256i* mem_addr, simde__m256i a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    _mm256_stream_si256(mem_addr, a);
+  #elif HEDLEY_HAS_BUILTIN(__builtin_nontemporal_store) && defined(SIMDE_VECTOR_SUBSCRIPT)
+    __builtin_nontemporal_store(a, SIMDE_ALIGN_CAST(__typeof__(a)*, mem_addr));
+  #else
+    simde_memcpy(SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m256i), &a, sizeof(a));
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_stream_si256
+  #define _mm256_stream_si256(mem_addr, a) simde_mm256_stream_si256(mem_addr, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_sub_ps (simde__m256 a, simde__m256 b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_sub_ps(a, b);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a),
+      b_ = simde__m256_to_private(b);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128[0] = simde_mm_sub_ps(a_.m128[0], b_.m128[0]);
+      r_.m128[1] = simde_mm_sub_ps(a_.m128[1], b_.m128[1]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.f32 = a_.f32 - b_.f32;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = a_.f32[i] - b_.f32[i];
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_sub_ps
+  #define _mm256_sub_ps(a, b) simde_mm256_sub_ps(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_hsub_ps (simde__m256 a, simde__m256 b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_hsub_ps(a, b);
+  #else
+      return simde_mm256_sub_ps(simde_x_mm256_deinterleaveeven_ps(a, b), simde_x_mm256_deinterleaveodd_ps(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_hsub_ps
+  #define _mm256_hsub_ps(a, b) simde_mm256_hsub_ps(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_sub_pd (simde__m256d a, simde__m256d b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_sub_pd(a, b);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a),
+      b_ = simde__m256d_to_private(b);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128d[0] = simde_mm_sub_pd(a_.m128d[0], b_.m128d[0]);
+      r_.m128d[1] = simde_mm_sub_pd(a_.m128d[1], b_.m128d[1]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.f64 = a_.f64 - b_.f64;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = a_.f64[i] - b_.f64[i];
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_sub_pd
+  #define _mm256_sub_pd(a, b) simde_mm256_sub_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_hsub_pd (simde__m256d a, simde__m256d b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_hsub_pd(a, b);
+  #else
+      return simde_mm256_sub_pd(simde_x_mm256_deinterleaveeven_pd(a, b), simde_x_mm256_deinterleaveodd_pd(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_hsub_pd
+  #define _mm256_hsub_pd(a, b) simde_mm256_hsub_pd(a, b)
+#endif
+
+#if defined(SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_)
+  HEDLEY_DIAGNOSTIC_PUSH
+  SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_undefined_ps (void) {
+  simde__m256_private r_;
+
+#if \
+    defined(SIMDE_X86_AVX_NATIVE) && \
+    (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(5,0,0)) && \
+    (!defined(__has_builtin) || HEDLEY_HAS_BUILTIN(__builtin_ia32_undef256))
+  r_.n = _mm256_undefined_ps();
+#elif !defined(SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_)
+  r_ = simde__m256_to_private(simde_mm256_setzero_ps());
+#endif
+
+  return simde__m256_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_undefined_ps
+  #define _mm256_undefined_ps() simde_mm256_undefined_ps()
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_undefined_pd (void) {
+  simde__m256d_private r_;
+
+#if \
+    defined(SIMDE_X86_AVX_NATIVE) && \
+    (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(5,0,0)) && \
+    (!defined(__has_builtin) || HEDLEY_HAS_BUILTIN(__builtin_ia32_undef256))
+  r_.n = _mm256_undefined_pd();
+#elif !defined(SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_)
+  r_ = simde__m256d_to_private(simde_mm256_setzero_pd());
+#endif
+
+  return simde__m256d_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_undefined_pd
+  #define _mm256_undefined_pd() simde_mm256_undefined_pd()
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_undefined_si256 (void) {
+  simde__m256i_private r_;
+#if \
+    defined(SIMDE_X86_AVX_NATIVE) && \
+    (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(5,0,0)) && \
+    (!defined(__has_builtin) || HEDLEY_HAS_BUILTIN(__builtin_ia32_undef256))
+  r_.n = _mm256_undefined_si256();
+#elif !defined(SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_)
+  r_ = simde__m256i_to_private(simde_mm256_setzero_si256());
+#endif
+
+  return simde__m256i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_undefined_si256
+  #define _mm256_undefined_si256() simde_mm256_undefined_si256()
+#endif
+
+#if defined(SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_)
+  HEDLEY_DIAGNOSTIC_POP
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_xor_ps (simde__m256 a, simde__m256 b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_xor_ps(a, b);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a),
+      b_ = simde__m256_to_private(b);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128[0] = simde_mm_xor_ps(a_.m128[0], b_.m128[0]);
+      r_.m128[1] = simde_mm_xor_ps(a_.m128[1], b_.m128[1]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32f = a_.i32f ^ b_.i32f;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+        r_.u32[i] = a_.u32[i] ^ b_.u32[i];
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_xor_ps
+  #define _mm256_xor_ps(a, b) simde_mm256_xor_ps(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_xor_pd (simde__m256d a, simde__m256d b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_xor_pd(a, b);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a),
+      b_ = simde__m256d_to_private(b);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r_.m128d[0] = simde_mm_xor_pd(a_.m128d[0], b_.m128d[0]);
+      r_.m128d[1] = simde_mm_xor_pd(a_.m128d[1], b_.m128d[1]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32f = a_.i32f ^ b_.i32f;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
+        r_.u64[i] = a_.u64[i] ^ b_.u64[i];
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_xor_pd
+  #define _mm256_xor_pd(a, b) simde_mm256_xor_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_x_mm256_xorsign_ps(simde__m256 dest, simde__m256 src) {
+  return simde_mm256_xor_ps(simde_mm256_and_ps(simde_mm256_set1_ps(-0.0f), src), dest);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_x_mm256_xorsign_pd(simde__m256d dest, simde__m256d src) {
+  return simde_mm256_xor_pd(simde_mm256_and_pd(simde_mm256_set1_pd(-0.0), src), dest);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_x_mm256_negate_ps(simde__m256 a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return simde_mm256_xor_ps(a,_mm256_set1_ps(SIMDE_FLOAT32_C(-0.0)));
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if defined(SIMDE_VECTOR_NEGATE)
+      r_.f32 = -a_.f32;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = -a_.f32[i];
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_x_mm256_negate_pd(simde__m256d a) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return simde_mm256_xor_pd(a, _mm256_set1_pd(SIMDE_FLOAT64_C(-0.0)));
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if defined(SIMDE_VECTOR_NEGATE)
+      r_.f64 = -a_.f64;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = -a_.f64[i];
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_unpackhi_ps (simde__m256 a, simde__m256 b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_unpackhi_ps(a, b);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a),
+      b_ = simde__m256_to_private(b);
+
+    #if defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 32, a_.f32, b_.f32, 2, 10, 3, 11, 6, 14, 7, 15);
+    #else
+      r_.f32[0] = a_.f32[2];
+      r_.f32[1] = b_.f32[2];
+      r_.f32[2] = a_.f32[3];
+      r_.f32[3] = b_.f32[3];
+      r_.f32[4] = a_.f32[6];
+      r_.f32[5] = b_.f32[6];
+      r_.f32[6] = a_.f32[7];
+      r_.f32[7] = b_.f32[7];
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_unpackhi_ps
+  #define _mm256_unpackhi_ps(a, b) simde_mm256_unpackhi_ps(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_unpackhi_pd (simde__m256d a, simde__m256d b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_unpackhi_pd(a, b);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a),
+      b_ = simde__m256d_to_private(b);
+
+    #if defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.f64 = SIMDE_SHUFFLE_VECTOR_(64, 32, a_.f64, b_.f64, 1, 5, 3, 7);
+    #else
+      r_.f64[0] = a_.f64[1];
+      r_.f64[1] = b_.f64[1];
+      r_.f64[2] = a_.f64[3];
+      r_.f64[3] = b_.f64[3];
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_unpackhi_pd
+  #define _mm256_unpackhi_pd(a, b) simde_mm256_unpackhi_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_unpacklo_ps (simde__m256 a, simde__m256 b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_unpacklo_ps(a, b);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a),
+      b_ = simde__m256_to_private(b);
+
+    #if defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 32, a_.f32, b_.f32, 0, 8, 1, 9, 4, 12, 5, 13);
+    #else
+      r_.f32[0] = a_.f32[0];
+      r_.f32[1] = b_.f32[0];
+      r_.f32[2] = a_.f32[1];
+      r_.f32[3] = b_.f32[1];
+      r_.f32[4] = a_.f32[4];
+      r_.f32[5] = b_.f32[4];
+      r_.f32[6] = a_.f32[5];
+      r_.f32[7] = b_.f32[5];
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_unpacklo_ps
+  #define _mm256_unpacklo_ps(a, b) simde_mm256_unpacklo_ps(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_unpacklo_pd (simde__m256d a, simde__m256d b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_unpacklo_pd(a, b);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a),
+      b_ = simde__m256d_to_private(b);
+
+    #if defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.f64 = SIMDE_SHUFFLE_VECTOR_(64, 32, a_.f64, b_.f64, 0, 4, 2, 6);
+    #else
+      r_.f64[0] = a_.f64[0];
+      r_.f64[1] = b_.f64[0];
+      r_.f64[2] = a_.f64[2];
+      r_.f64[3] = b_.f64[2];
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_unpacklo_pd
+  #define _mm256_unpacklo_pd(a, b) simde_mm256_unpacklo_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_zextps128_ps256 (simde__m128 a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_insertf128_ps(_mm256_setzero_ps(), a, 0);
+  #else
+    simde__m256_private r_;
+
+    r_.m128_private[0] = simde__m128_to_private(a);
+    r_.m128_private[1] = simde__m128_to_private(simde_mm_setzero_ps());
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_zextps128_ps256
+  #define _mm256_zextps128_ps256(a) simde_mm256_zextps128_ps256(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_zextpd128_pd256 (simde__m128d a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_insertf128_pd(_mm256_setzero_pd(), a, 0);
+  #else
+    simde__m256d_private r_;
+
+    r_.m128d_private[0] = simde__m128d_to_private(a);
+    r_.m128d_private[1] = simde__m128d_to_private(simde_mm_setzero_pd());
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_zextpd128_pd256
+  #define _mm256_zextpd128_pd256(a) simde_mm256_zextpd128_pd256(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_zextsi128_si256 (simde__m128i a) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_insertf128_si256(_mm256_setzero_si256(), a, 0);
+  #else
+    simde__m256i_private r_;
+
+    r_.m128i_private[0] = simde__m128i_to_private(a);
+    r_.m128i_private[1] = simde__m128i_to_private(simde_mm_setzero_si128());
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_zextsi128_si256
+  #define _mm256_zextsi128_si256(a) simde_mm256_zextsi128_si256(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_testc_ps (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm_testc_ps(a, b);
+  #else
+    simde__m128_private
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_WASM_SIMD128_NATIVE)
+      v128_t m = wasm_u32x4_shr(wasm_v128_or(wasm_v128_not(b_.wasm_v128), a_.wasm_v128), 31);
+      m = wasm_v128_and(m, simde_mm_movehl_ps(m, m));
+      m = wasm_v128_and(m, simde_mm_shuffle_epi32(m, SIMDE_MM_SHUFFLE(3, 2, 0, 1)));
+      return wasm_i32x4_extract_lane(m, 0);
+    #else
+      uint_fast32_t r = 0;
+      SIMDE_VECTORIZE_REDUCTION(|:r)
+      for (size_t i = 0 ; i < (sizeof(a_.u32) / sizeof(a_.u32[0])) ; i++) {
+        r |= ~a_.u32[i] & b_.u32[i];
+      }
+
+      return HEDLEY_STATIC_CAST(int, ((~r >> 31) & 1));
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm_testc_ps
+  #define _mm_testc_ps(a, b) simde_mm_testc_ps(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_testc_pd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm_testc_pd(a, b);
+  #else
+    simde__m128d_private
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(SIMDE_WASM_SIMD128_NATIVE)
+      v128_t m = wasm_u64x2_shr(wasm_v128_or(wasm_v128_not(b_.wasm_v128), a_.wasm_v128), 63);
+      return HEDLEY_STATIC_CAST(int, wasm_i64x2_extract_lane(m, 0) & wasm_i64x2_extract_lane(m, 1));
+    #else
+      uint_fast64_t r = 0;
+      SIMDE_VECTORIZE_REDUCTION(|:r)
+      for (size_t i = 0 ; i < (sizeof(a_.u64) / sizeof(a_.u64[0])) ; i++) {
+        r |= ~a_.u64[i] & b_.u64[i];
+      }
+
+      return HEDLEY_STATIC_CAST(int, ((~r >> 63) & 1));
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm_testc_pd
+  #define _mm_testc_pd(a, b) simde_mm_testc_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm256_testc_ps (simde__m256 a, simde__m256 b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_testc_ps(a, b);
+  #else
+    uint_fast32_t r = 0;
+    simde__m256_private
+      a_ = simde__m256_to_private(a),
+      b_ = simde__m256_to_private(b);
+
+    SIMDE_VECTORIZE_REDUCTION(|:r)
+    for (size_t i = 0 ; i < (sizeof(a_.u32) / sizeof(a_.u32[0])) ; i++) {
+      r |= ~a_.u32[i] & b_.u32[i];
+    }
+
+    return HEDLEY_STATIC_CAST(int, ((~r >> 31) & 1));
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_testc_ps
+  #define _mm256_testc_ps(a, b) simde_mm256_testc_ps(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm256_testc_pd (simde__m256d a, simde__m256d b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_testc_pd(a, b);
+  #else
+    uint_fast64_t r = 0;
+    simde__m256d_private
+      a_ = simde__m256d_to_private(a),
+      b_ = simde__m256d_to_private(b);
+
+    SIMDE_VECTORIZE_REDUCTION(|:r)
+    for (size_t i = 0 ; i < (sizeof(a_.u64) / sizeof(a_.u64[0])) ; i++) {
+      r |= ~a_.u64[i] & b_.u64[i];
+    }
+
+    return HEDLEY_STATIC_CAST(int, ((~r >> 63) & 1));
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_testc_pd
+  #define _mm256_testc_pd(a, b) simde_mm256_testc_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm256_testc_si256 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_testc_si256(a, b);
+  #else
+    int_fast32_t r = 0;
+    simde__m256i_private
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    SIMDE_VECTORIZE_REDUCTION(|:r)
+    for (size_t i = 0 ; i < (sizeof(a_.i32f) / sizeof(a_.i32f[0])) ; i++) {
+      r |= ~a_.i32f[i] & b_.i32f[i];
+    }
+
+    return HEDLEY_STATIC_CAST(int, !r);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_testc_si256
+  #define _mm256_testc_si256(a, b) simde_mm256_testc_si256(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_testz_ps (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm_testz_ps(a, b);
+  #else
+    simde__m128_private
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_WASM_SIMD128_NATIVE)
+      v128_t m = wasm_u32x4_shr(wasm_v128_not(wasm_v128_and(a_.wasm_v128, b_.wasm_v128)), 31);
+      m = wasm_v128_and(m, simde_mm_movehl_ps(m, m));
+      m = wasm_v128_and(m, simde_mm_shuffle_epi32(m, SIMDE_MM_SHUFFLE(3, 2, 0, 1)));
+      return wasm_i32x4_extract_lane(m, 0);
+    #else
+      uint_fast32_t r = 0;
+      SIMDE_VECTORIZE_REDUCTION(|:r)
+      for (size_t i = 0 ; i < (sizeof(a_.u32) / sizeof(a_.u32[0])) ; i++) {
+        r |= a_.u32[i] & b_.u32[i];
+      }
+
+      return HEDLEY_STATIC_CAST(int, ((~r >> 31) & 1));
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm_testz_ps
+  #define _mm_testz_ps(a, b) simde_mm_testz_ps(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_testz_pd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm_testz_pd(a, b);
+  #else
+    simde__m128d_private
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(SIMDE_WASM_SIMD128_NATIVE)
+      v128_t m = wasm_u64x2_shr(wasm_v128_not(wasm_v128_and(a_.wasm_v128, b_.wasm_v128)), 63);
+      return HEDLEY_STATIC_CAST(int, wasm_i64x2_extract_lane(m, 0) & wasm_i64x2_extract_lane(m, 1));
+    #else
+      uint_fast64_t r = 0;
+      SIMDE_VECTORIZE_REDUCTION(|:r)
+      for (size_t i = 0 ; i < (sizeof(a_.u64) / sizeof(a_.u64[0])) ; i++) {
+        r |= a_.u64[i] & b_.u64[i];
+      }
+
+      return HEDLEY_STATIC_CAST(int, ((~r >> 63) & 1));
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm_testz_pd
+  #define _mm_testz_pd(a, b) simde_mm_testz_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm256_testz_ps (simde__m256 a, simde__m256 b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_testz_ps(a, b);
+  #else
+    uint_fast32_t r = 0;
+    simde__m256_private
+      a_ = simde__m256_to_private(a),
+      b_ = simde__m256_to_private(b);
+
+    SIMDE_VECTORIZE_REDUCTION(|:r)
+    for (size_t i = 0 ; i < (sizeof(a_.u32) / sizeof(a_.u32[0])) ; i++) {
+      r |= a_.u32[i] & b_.u32[i];
+    }
+
+    return HEDLEY_STATIC_CAST(int, ((~r >> 31) & 1));
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_testz_ps
+  #define _mm256_testz_ps(a, b) simde_mm256_testz_ps(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm256_testz_pd (simde__m256d a, simde__m256d b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_testz_pd(a, b);
+  #else
+    uint_fast64_t r = 0;
+    simde__m256d_private
+      a_ = simde__m256d_to_private(a),
+      b_ = simde__m256d_to_private(b);
+
+    SIMDE_VECTORIZE_REDUCTION(|:r)
+    for (size_t i = 0 ; i < (sizeof(a_.u64) / sizeof(a_.u64[0])) ; i++) {
+      r |= a_.u64[i] & b_.u64[i];
+    }
+
+    return HEDLEY_STATIC_CAST(int, ((~r >> 63) & 1));
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_testz_pd
+  #define _mm256_testz_pd(a, b) simde_mm256_testz_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm256_testz_si256 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_testz_si256(a, b);
+  #else
+    int_fast32_t r = 0;
+    simde__m256i_private
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      r = simde_mm_testz_si128(a_.m128i[0], b_.m128i[0]) && simde_mm_testz_si128(a_.m128i[1], b_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE_REDUCTION(|:r)
+      for (size_t i = 0 ; i < (sizeof(a_.i32f) / sizeof(a_.i32f[0])) ; i++) {
+        r |= a_.i32f[i] & b_.i32f[i];
+      }
+
+      r = !r;
+    #endif
+
+    return HEDLEY_STATIC_CAST(int, r);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_testz_si256
+  #define _mm256_testz_si256(a, b) simde_mm256_testz_si256(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_testnzc_ps (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm_testnzc_ps(a, b);
+  #else
+    simde__m128_private
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_WASM_SIMD128_NATIVE)
+      v128_t m = wasm_u32x4_shr(wasm_v128_and(a_.wasm_v128, b_.wasm_v128), 31);
+      v128_t m2 = wasm_u32x4_shr(wasm_v128_andnot(b_.wasm_v128, a_.wasm_v128), 31);
+      m  = wasm_v128_or(m,  simde_mm_movehl_ps(m, m));
+      m2 = wasm_v128_or(m2, simde_mm_movehl_ps(m2, m2));
+      m  = wasm_v128_or(m,  simde_mm_shuffle_epi32(m, SIMDE_MM_SHUFFLE(3, 2, 0, 1)));
+      m2 = wasm_v128_or(m2, simde_mm_shuffle_epi32(m2, SIMDE_MM_SHUFFLE(3, 2, 0, 1)));
+      return wasm_i32x4_extract_lane(m, 0) & wasm_i32x4_extract_lane(m2, 0);
+    #else
+      uint32_t rz = 0, rc = 0;
+      for (size_t i = 0 ; i < (sizeof(a_.u32) / sizeof(a_.u32[0])) ; i++) {
+        rc |= ~a_.u32[i] & b_.u32[i];
+        rz |=  a_.u32[i] & b_.u32[i];
+      }
+
+      return
+        (rc >> ((sizeof(rc) * CHAR_BIT) - 1)) &
+        (rz >> ((sizeof(rz) * CHAR_BIT) - 1));
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm_testnzc_ps
+  #define _mm_testnzc_ps(a, b) simde_mm_testnzc_ps(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_testnzc_pd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm_testnzc_pd(a, b);
+  #else
+    simde__m128d_private
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+    #if defined(SIMDE_WASM_SIMD128_NATIVE)
+      v128_t m = wasm_u64x2_shr(wasm_v128_and(a_.wasm_v128, b_.wasm_v128), 63);
+      v128_t m2 = wasm_u64x2_shr(wasm_v128_andnot(b_.wasm_v128, a_.wasm_v128), 63);
+      return HEDLEY_STATIC_CAST(int, (wasm_i64x2_extract_lane(m, 0)  | wasm_i64x2_extract_lane(m, 1))
+                                   & (wasm_i64x2_extract_lane(m2, 0) | wasm_i64x2_extract_lane(m2, 1)));
+    #else
+      uint64_t rc = 0, rz = 0;
+      for (size_t i = 0 ; i < (sizeof(a_.u64) / sizeof(a_.u64[0])) ; i++) {
+        rc |= ~a_.u64[i] & b_.u64[i];
+        rz |=  a_.u64[i] & b_.u64[i];
+      }
+
+      return
+        (rc >> ((sizeof(rc) * CHAR_BIT) - 1)) &
+        (rz >> ((sizeof(rz) * CHAR_BIT) - 1));
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm_testnzc_pd
+  #define _mm_testnzc_pd(a, b) simde_mm_testnzc_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm256_testnzc_ps (simde__m256 a, simde__m256 b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_testnzc_ps(a, b);
+  #else
+    uint32_t rc = 0, rz = 0;
+    simde__m256_private
+      a_ = simde__m256_to_private(a),
+      b_ = simde__m256_to_private(b);
+
+    for (size_t i = 0 ; i < (sizeof(a_.u32) / sizeof(a_.u32[0])) ; i++) {
+      rc |= ~a_.u32[i] & b_.u32[i];
+      rz |=  a_.u32[i] & b_.u32[i];
+    }
+
+    return
+      (rc >> ((sizeof(rc) * CHAR_BIT) - 1)) &
+      (rz >> ((sizeof(rz) * CHAR_BIT) - 1));
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_testnzc_ps
+  #define _mm256_testnzc_ps(a, b) simde_mm256_testnzc_ps(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm256_testnzc_pd (simde__m256d a, simde__m256d b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_testnzc_pd(a, b);
+  #else
+    uint64_t rc = 0, rz = 0;
+    simde__m256d_private
+      a_ = simde__m256d_to_private(a),
+      b_ = simde__m256d_to_private(b);
+
+    for (size_t i = 0 ; i < (sizeof(a_.u64) / sizeof(a_.u64[0])) ; i++) {
+      rc |= ~a_.u64[i] & b_.u64[i];
+      rz |=  a_.u64[i] & b_.u64[i];
+    }
+
+    return
+      (rc >> ((sizeof(rc) * CHAR_BIT) - 1)) &
+      (rz >> ((sizeof(rz) * CHAR_BIT) - 1));
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_testnzc_pd
+  #define _mm256_testnzc_pd(a, b) simde_mm256_testnzc_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm256_testnzc_si256 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_testnzc_si256(a, b);
+  #else
+    int32_t rc = 0, rz = 0;
+    simde__m256i_private
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    for (size_t i = 0 ; i < (sizeof(a_.i32f) / sizeof(a_.i32f[0])) ; i++) {
+      rc |= ~a_.i32f[i] & b_.i32f[i];
+      rz |=  a_.i32f[i] & b_.i32f[i];
+    }
+
+    return !!(rc & rz);
+  #endif
+}
+#if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_testnzc_si256
+  #define _mm256_testnzc_si256(a, b) simde_mm256_testnzc_si256(a, b)
+#endif
+
+SIMDE_END_DECLS_
+
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_X86_AVX_H) */
diff --git a/external_libs/pgenlib/simde/x86/avx2.h b/external_libs/pgenlib/simde/x86/avx2.h
new file mode 100644
index 0000000..c01c1e8
--- /dev/null
+++ b/external_libs/pgenlib/simde/x86/avx2.h
@@ -0,0 +1,5758 @@
+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2018-2020 Evan Nemerson <evan@nemerson.com>
+ *   2019-2020 Michael R. Crusoe <crusoe@debian.org>
+ *   2020      Himanshi Mathur <himanshi18037@iiitd.ac.in>
+ *   2020      Hidayat Khan <huk2209@gmail.com>
+ */
+
+#if !defined(SIMDE_X86_AVX2_H)
+#define SIMDE_X86_AVX2_H
+
+#include "avx.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_abs_epi8 (simde__m256i a) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_abs_epi8(a);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_abs_epi8(a_.m128i[0]);
+      r_.m128i[1] = simde_mm_abs_epi8(a_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = (a_.i8[i] < INT32_C(0)) ? -a_.i8[i] : a_.i8[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_abs_epi8
+  #define _mm256_abs_epi8(a) simde_mm256_abs_epi8(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_abs_epi16 (simde__m256i a) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_abs_epi16(a);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_abs_epi16(a_.m128i[0]);
+      r_.m128i[1] = simde_mm_abs_epi16(a_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = (a_.i16[i] < INT32_C(0)) ? -a_.i16[i] : a_.i16[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_abs_epi16
+  #define _mm256_abs_epi16(a) simde_mm256_abs_epi16(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_abs_epi32(simde__m256i a) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_abs_epi32(a);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_abs_epi32(a_.m128i[0]);
+      r_.m128i[1] = simde_mm_abs_epi32(a_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0; i < (sizeof(r_.i32) / sizeof(r_.i32[0])); i++) {
+        r_.i32[i] = (a_.i32[i] < INT32_C(0)) ? -a_.i32[i] : a_.i32[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_abs_epi32
+  #define _mm256_abs_epi32(a) simde_mm256_abs_epi32(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_add_epi8 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_add_epi8(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_add_epi8(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_add_epi8(a_.m128i[1], b_.m128i[1]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i8 = a_.i8 + b_.i8;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = a_.i8[i] + b_.i8[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_add_epi8
+  #define _mm256_add_epi8(a, b) simde_mm256_add_epi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_add_epi16 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_add_epi16(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_add_epi16(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_add_epi16(a_.m128i[1], b_.m128i[1]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i16 = a_.i16 + b_.i16;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = a_.i16[i] + b_.i16[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_add_epi16
+  #define _mm256_add_epi16(a, b) simde_mm256_add_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_hadd_epi16 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_hadd_epi16(a, b);
+  #else
+    return simde_mm256_add_epi16(simde_x_mm256_deinterleaveeven_epi16(a, b), simde_x_mm256_deinterleaveodd_epi16(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_hadd_epi16
+  #define _mm256_hadd_epi16(a, b) simde_mm256_hadd_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_add_epi32 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_add_epi32(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_add_epi32(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_add_epi32(a_.m128i[1], b_.m128i[1]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32 = a_.i32 + b_.i32;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = a_.i32[i] + b_.i32[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_add_epi32
+  #define _mm256_add_epi32(a, b) simde_mm256_add_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_hadd_epi32 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_hadd_epi32(a, b);
+  #else
+    return simde_mm256_add_epi32(simde_x_mm256_deinterleaveeven_epi32(a, b), simde_x_mm256_deinterleaveodd_epi32(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_hadd_epi32
+  #define _mm256_hadd_epi32(a, b) simde_mm256_hadd_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_add_epi64 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_add_epi64(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_add_epi64(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_add_epi64(a_.m128i[1], b_.m128i[1]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_CLANG_BAD_VI64_OPS)
+      r_.i64 = a_.i64 + b_.i64;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = a_.i64[i] + b_.i64[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_add_epi64
+  #define _mm256_add_epi64(a, b) simde_mm256_add_epi64(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_alignr_epi8 (simde__m256i a, simde__m256i b, int count)
+    SIMDE_REQUIRE_CONSTANT_RANGE(count, 0, 255) {
+  simde__m256i_private
+    r_,
+    a_ = simde__m256i_to_private(a),
+    b_ = simde__m256i_to_private(b);
+
+  if (HEDLEY_UNLIKELY(count > 31))
+    return simde_mm256_setzero_si256();
+
+  for (size_t h = 0 ; h < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; h++) {
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.m128i_private[h].i8) / sizeof(r_.m128i_private[h].i8[0])) ; i++) {
+      const int srcpos = count + HEDLEY_STATIC_CAST(int, i);
+      if (srcpos > 31) {
+        r_.m128i_private[h].i8[i] = 0;
+      } else if (srcpos > 15) {
+        r_.m128i_private[h].i8[i] = a_.m128i_private[h].i8[(srcpos) & 15];
+      } else {
+        r_.m128i_private[h].i8[i] = b_.m128i_private[h].i8[srcpos];
+      }
+    }
+  }
+
+  return simde__m256i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE) && !defined(SIMDE_BUG_PGI_30106)
+#  define simde_mm256_alignr_epi8(a, b, count) _mm256_alignr_epi8(a, b, count)
+#elif SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+#  define simde_mm256_alignr_epi8(a, b, count) \
+      simde_mm256_set_m128i( \
+          simde_mm_alignr_epi8(simde_mm256_extracti128_si256(a, 1), simde_mm256_extracti128_si256(b, 1), (count)), \
+          simde_mm_alignr_epi8(simde_mm256_extracti128_si256(a, 0), simde_mm256_extracti128_si256(b, 0), (count)))
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_alignr_epi8
+  #define _mm256_alignr_epi8(a, b, count) simde_mm256_alignr_epi8(a, b, (count))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_and_si256 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_and_si256(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_and_si128(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_and_si128(a_.m128i[1], b_.m128i[1]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32f = a_.i32f & b_.i32f;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = a_.i64[i] & b_.i64[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_and_si256
+  #define _mm256_and_si256(a, b) simde_mm256_and_si256(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_andnot_si256 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_andnot_si256(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_andnot_si128(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_andnot_si128(a_.m128i[1], b_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) {
+        r_.i32f[i] = ~(a_.i32f[i]) & b_.i32f[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_andnot_si256
+  #define _mm256_andnot_si256(a, b) simde_mm256_andnot_si256(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_adds_epi8 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_adds_epi8(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_adds_epi8(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_adds_epi8(a_.m128i[1], b_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = simde_math_adds_i8(a_.i8[i], b_.i8[i]);
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_adds_epi8
+  #define _mm256_adds_epi8(a, b) simde_mm256_adds_epi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_adds_epi16(simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_adds_epi16(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_adds_epi16(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_adds_epi16(a_.m128i[1], b_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = simde_math_adds_i16(a_.i16[i], b_.i16[i]);
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_adds_epi16
+  #define _mm256_adds_epi16(a, b) simde_mm256_adds_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_hadds_epi16 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_hadds_epi16(a, b);
+  #else
+    return simde_mm256_adds_epi16(simde_x_mm256_deinterleaveeven_epi16(a, b), simde_x_mm256_deinterleaveodd_epi16(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_hadds_epi16
+  #define _mm256_hadds_epi16(a, b) simde_mm256_hadds_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_adds_epu8 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_adds_epu8(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_adds_epu8(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_adds_epu8(a_.m128i[1], b_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+        r_.u8[i] = simde_math_adds_u8(a_.u8[i], b_.u8[i]);
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_adds_epu8
+  #define _mm256_adds_epu8(a, b) simde_mm256_adds_epu8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_adds_epu16(simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_adds_epu16(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_adds_epu16(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_adds_epu16(a_.m128i[1], b_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+        r_.u16[i] = simde_math_adds_u16(a_.u16[i], b_.u16[i]);
+    }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_adds_epu16
+  #define _mm256_adds_epu16(a, b) simde_mm256_adds_epu16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_avg_epu8 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_avg_epu8(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+      r_.u8[i] = (a_.u8[i] + b_.u8[i] + 1) >> 1;
+    }
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_avg_epu8
+  #define _mm256_avg_epu8(a, b) simde_mm256_avg_epu8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_avg_epu16 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_avg_epu16(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+      r_.u16[i] = (a_.u16[i] + b_.u16[i] + 1) >> 1;
+    }
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_avg_epu16
+  #define _mm256_avg_epu16(a, b) simde_mm256_avg_epu16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_blend_epi32(simde__m128i a, simde__m128i b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 15) {
+  simde__m128i_private
+    r_,
+    a_ = simde__m128i_to_private(a),
+    b_ = simde__m128i_to_private(b);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+    r_.i32[i] = ((imm8 >> i) & 1) ? b_.i32[i] : a_.i32[i];
+  }
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+#  define simde_mm_blend_epi32(a, b, imm8) _mm_blend_epi32(a, b, imm8)
+#elif SIMDE_NATURAL_FLOAT_VECTOR_SIZE_LE(128)
+#  define simde_mm_blend_epi32(a, b, imm8) \
+  simde_mm_castps_si128(simde_mm_blend_ps(simde_mm_castsi128_ps(a), simde_mm_castsi128_ps(b), (imm8)))
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_blend_epi32
+  #define _mm_blend_epi32(a, b, imm8) simde_mm_blend_epi32(a, b, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_blend_epi16(simde__m256i a, simde__m256i b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) {
+  simde__m256i_private
+    r_,
+    a_ = simde__m256i_to_private(a),
+    b_ = simde__m256i_to_private(b);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+    r_.i16[i] = ((imm8 >> i%8) & 1) ? b_.i16[i] : a_.i16[i];
+  }
+
+  return simde__m256i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE) && defined(SIMDE_BUG_CLANG_REV_234560)
+#  define simde_mm256_blend_epi16(a, b, imm8) _mm256_castpd_si256(_mm256_blend_epi16(a, b, imm8))
+#elif defined(SIMDE_X86_AVX2_NATIVE)
+#  define simde_mm256_blend_epi16(a, b, imm8) _mm256_blend_epi16(a, b, imm8)
+#elif SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+#  define simde_mm256_blend_epi16(a, b, imm8) \
+      simde_mm256_set_m128i( \
+          simde_mm_blend_epi16(simde_mm256_extracti128_si256(a, 1), simde_mm256_extracti128_si256(b, 1), (imm8)), \
+          simde_mm_blend_epi16(simde_mm256_extracti128_si256(a, 0), simde_mm256_extracti128_si256(b, 0), (imm8)))
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_blend_epi16
+  #define _mm256_blend_epi16(a, b, imm8) simde_mm256_blend_epi16(a, b, imm8)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_blend_epi32(simde__m256i a, simde__m256i b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) {
+  simde__m256i_private
+    r_,
+    a_ = simde__m256i_to_private(a),
+    b_ = simde__m256i_to_private(b);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+    r_.i32[i] = ((imm8 >> i) & 1) ? b_.i32[i] : a_.i32[i];
+  }
+
+  return simde__m256i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+#  define simde_mm256_blend_epi32(a, b, imm8) _mm256_blend_epi32(a, b, imm8)
+#elif SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+#  define simde_mm256_blend_epi32(a, b, imm8) \
+      simde_mm256_set_m128i( \
+          simde_mm_blend_epi32(simde_mm256_extracti128_si256(a, 1), simde_mm256_extracti128_si256(b, 1), (imm8) >> 4), \
+          simde_mm_blend_epi32(simde_mm256_extracti128_si256(a, 0), simde_mm256_extracti128_si256(b, 0), (imm8) & 0x0F))
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_blend_epi32
+  #define _mm256_blend_epi32(a, b, imm8) simde_mm256_blend_epi32(a, b, imm8)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_blendv_epi8(simde__m256i a, simde__m256i b, simde__m256i mask) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_blendv_epi8(a, b, mask);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b),
+      mask_ = simde__m256i_to_private(mask);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_blendv_epi8(a_.m128i[0], b_.m128i[0], mask_.m128i[0]);
+      r_.m128i[1] = simde_mm_blendv_epi8(a_.m128i[1], b_.m128i[1], mask_.m128i[1]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+      __typeof__(mask_.i8) tmp = mask_.i8 >> 7;
+      r_.i8 = (tmp & b_.i8) | (~tmp & a_.i8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+        int8_t tmp = mask_.i8[i] >> 7;
+        r_.i8[i] = (tmp & b_.i8[i]) | (~tmp & a_.i8[i]);
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+#  define simde_mm256_blendv_epi8(a, b, imm8)  _mm256_blendv_epi8(a, b, imm8)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_blendv_epi8
+  #define _mm256_blendv_epi8(a, b, mask) simde_mm256_blendv_epi8(a, b, mask)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_broadcastb_epi8 (simde__m128i a) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm_broadcastb_epi8(a);
+  #else
+    simde__m128i_private r_;
+    simde__m128i_private a_= simde__m128i_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+      r_.i8[i] = a_.i8[0];
+    }
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_broadcastb_epi8
+  #define _mm_broadcastb_epi8(a) simde_mm_broadcastb_epi8(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_broadcastb_epi8 (simde__m128i a) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_broadcastb_epi8(a);
+  #else
+    simde__m256i_private r_;
+    simde__m128i_private a_= simde__m128i_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+      r_.i8[i] = a_.i8[0];
+    }
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_broadcastb_epi8
+  #define _mm256_broadcastb_epi8(a) simde_mm256_broadcastb_epi8(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_broadcastw_epi16 (simde__m128i a) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm_broadcastw_epi16(a);
+  #else
+    simde__m128i_private r_;
+    simde__m128i_private a_= simde__m128i_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+      r_.i16[i] = a_.i16[0];
+    }
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_broadcastw_epi16
+  #define _mm_broadcastw_epi16(a) simde_mm_broadcastw_epi16(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_broadcastw_epi16 (simde__m128i a) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_broadcastw_epi16(a);
+  #else
+    simde__m256i_private r_;
+    simde__m128i_private a_= simde__m128i_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+      r_.i16[i] = a_.i16[0];
+    }
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_broadcastw_epi16
+  #define _mm256_broadcastw_epi16(a) simde_mm256_broadcastw_epi16(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_broadcastd_epi32 (simde__m128i a) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm_broadcastd_epi32(a);
+  #else
+    simde__m128i_private r_;
+    simde__m128i_private a_= simde__m128i_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+      r_.i32[i] = a_.i32[0];
+    }
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_broadcastd_epi32
+  #define _mm_broadcastd_epi32(a) simde_mm_broadcastd_epi32(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_broadcastd_epi32 (simde__m128i a) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_broadcastd_epi32(a);
+  #else
+    simde__m256i_private r_;
+    simde__m128i_private a_= simde__m128i_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+      r_.i32[i] = a_.i32[0];
+    }
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_broadcastd_epi32
+  #define _mm256_broadcastd_epi32(a) simde_mm256_broadcastd_epi32(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_broadcastq_epi64 (simde__m128i a) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm_broadcastq_epi64(a);
+  #else
+    simde__m128i_private r_;
+    simde__m128i_private a_= simde__m128i_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+      r_.i64[i] = a_.i64[0];
+    }
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_broadcastq_epi64
+  #define _mm_broadcastq_epi64(a) simde_mm_broadcastq_epi64(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_broadcastq_epi64 (simde__m128i a) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_broadcastq_epi64(a);
+  #else
+    simde__m256i_private r_;
+    simde__m128i_private a_= simde__m128i_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+      r_.i64[i] = a_.i64[0];
+    }
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_broadcastq_epi64
+  #define _mm256_broadcastq_epi64(a) simde_mm256_broadcastq_epi64(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_broadcastss_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm_broadcastss_ps(a);
+  #elif defined(SIMDE_X86_SSE_NATIVE)
+    return simde_mm_shuffle_ps(a, a, 0);
+  #else
+    simde__m128_private r_;
+    simde__m128_private a_= simde__m128_to_private(a);
+
+    #if defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.f32, a_.f32, 0, 0, 0, 0);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = a_.f32[0];
+      }
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_broadcastss_ps
+  #define _mm_broadcastss_ps(a) simde_mm_broadcastss_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_broadcastss_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_broadcastss_ps(a);
+  #else
+    simde__m256_private r_;
+    simde__m128_private a_= simde__m128_to_private(a);
+
+    #if defined(SIMDE_X86_AVX_NATIVE)
+      __m128 tmp = _mm_permute_ps(a_.n, 0);
+      r_.n = _mm256_insertf128_ps(_mm256_castps128_ps256(tmp), tmp, 1);
+    #elif HEDLEY_HAS_BUILTIN(__builtin_shufflevector)
+      r_.f32 = __builtin_shufflevector(a_.f32, a_.f32, 0, 0, 0, 0, 0, 0, 0, 0);
+    #elif SIMDE_NATURAL_FLOAT_VECTOR_SIZE_LE(128)
+      r_.m128[0] = r_.m128[1] = simde_mm_broadcastss_ps(simde__m128_from_private(a_));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = a_.f32[0];
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_broadcastss_ps
+  #define _mm256_broadcastss_ps(a) simde_mm256_broadcastss_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_broadcastsd_pd (simde__m128d a) {
+  return simde_mm_movedup_pd(a);
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_broadcastsd_pd
+  #define _mm_broadcastsd_pd(a) simde_mm_broadcastsd_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_broadcastsd_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_broadcastsd_pd(a);
+  #else
+    simde__m256d_private r_;
+    simde__m128d_private a_= simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = a_.f64[0];
+    }
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_broadcastsd_pd
+  #define _mm256_broadcastsd_pd(a) simde_mm256_broadcastsd_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_broadcastsi128_si256 (simde__m128i a) {
+  #if defined(SIMDE_X86_AVX2_NATIVE) && \
+      (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(4,8,0))
+    return _mm256_broadcastsi128_si256(a);
+  #else
+    simde__m256i_private r_;
+    simde__m128i_private a_ = simde__m128i_to_private(a);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i_private[0] = a_;
+      r_.m128i_private[1] = a_;
+    #else
+      r_.i64[0] = a_.i64[0];
+      r_.i64[1] = a_.i64[1];
+      r_.i64[2] = a_.i64[0];
+      r_.i64[3] = a_.i64[1];
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#define simde_mm_broadcastsi128_si256(a) simde_mm256_broadcastsi128_si256(a)
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_broadcastsi128_si256
+  #define _mm256_broadcastsi128_si256(a) simde_mm256_broadcastsi128_si256(a)
+  #undef _mm_broadcastsi128_si256
+  #define _mm_broadcastsi128_si256(a) simde_mm256_broadcastsi128_si256(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_bslli_epi128 (simde__m256i a, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255)  {
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a);
+    const int ssize = HEDLEY_STATIC_CAST(int, (sizeof(r_.i8) / sizeof(r_.i8[0])));
+
+    SIMDE_VECTORIZE
+    for (int i = 0 ; i < ssize ; i++) {
+      const int e = i - imm8;
+      if(i >= (ssize/2)) {
+        if(e >= (ssize/2) && e < ssize)
+          r_.i8[i] = a_.i8[e];
+        else
+          r_.i8[i] = 0;
+      }
+      else{
+        if(e >= 0 && e < (ssize/2))
+          r_.i8[i] = a_.i8[e];
+        else
+          r_.i8[i] = 0;
+      }
+    }
+
+  return simde__m256i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE) && \
+    (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(4,8,0)) && \
+    SIMDE_DETECT_CLANG_VERSION_CHECK(3,7,0)
+  #define simde_mm256_bslli_epi128(a, imm8) _mm256_bslli_epi128(a, imm8)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_bslli_epi128
+  #define _mm256_bslli_epi128(a, imm8) simde_mm256_bslli_epi128(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_bsrli_epi128 (simde__m256i a, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255)  {
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a);
+    const int ssize = HEDLEY_STATIC_CAST(int, (sizeof(r_.i8) / sizeof(r_.i8[0])));
+
+    SIMDE_VECTORIZE
+    for (int i = 0 ; i < ssize ; i++) {
+      const int e = i + imm8;
+      if(i < (ssize/2)) {
+        if(e >= 0 && e < (ssize/2))
+          r_.i8[i] = a_.i8[e];
+        else
+          r_.i8[i] = 0;
+      }
+      else{
+        if(e >= (ssize/2) && e < ssize)
+          r_.i8[i] = a_.i8[e];
+        else
+          r_.i8[i] = 0;
+      }
+    }
+
+  return simde__m256i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE) && \
+    (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(4,8,0)) && \
+    SIMDE_DETECT_CLANG_VERSION_CHECK(3,7,0)
+  #define simde_mm256_bsrli_epi128(a, imm8) _mm256_bsrli_epi128(a, imm8)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_bsrli_epi128
+  #define _mm256_bsrli_epi128(a, imm8) simde_mm256_bsrli_epi128(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_cmpeq_epi8 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_cmpeq_epi8(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_cmpeq_epi8(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_cmpeq_epi8(a_.m128i[1], b_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = (a_.i8[i] == b_.i8[i]) ? ~INT8_C(0) : INT8_C(0);
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cmpeq_epi8
+  #define _mm256_cmpeq_epi8(a, b) simde_mm256_cmpeq_epi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_cmpeq_epi16 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_cmpeq_epi16(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_cmpeq_epi16(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_cmpeq_epi16(a_.m128i[1], b_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = (a_.i16[i] == b_.i16[i]) ? ~INT16_C(0) : INT16_C(0);
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cmpeq_epi16
+  #define _mm256_cmpeq_epi16(a, b) simde_mm256_cmpeq_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_cmpeq_epi32 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_cmpeq_epi32(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_cmpeq_epi32(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_cmpeq_epi32(a_.m128i[1], b_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = (a_.i32[i] == b_.i32[i]) ? ~INT32_C(0) : INT32_C(0);
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cmpeq_epi32
+  #define _mm256_cmpeq_epi32(a, b) simde_mm256_cmpeq_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_cmpeq_epi64 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_cmpeq_epi64(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_cmpeq_epi64(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_cmpeq_epi64(a_.m128i[1], b_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = (a_.i64[i] == b_.i64[i]) ? ~INT64_C(0) : INT64_C(0);
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cmpeq_epi64
+  #define _mm256_cmpeq_epi64(a, b) simde_mm256_cmpeq_epi64(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_cmpgt_epi8 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_cmpgt_epi8(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_cmpgt_epi8(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_cmpgt_epi8(a_.m128i[1], b_.m128i[1]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i8 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i8), a_.i8 > b_.i8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = (a_.i8[i] > b_.i8[i]) ? ~INT8_C(0) : INT8_C(0);
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cmpgt_epi8
+  #define _mm256_cmpgt_epi8(a, b) simde_mm256_cmpgt_epi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_cmpgt_epi16 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_cmpgt_epi16(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_cmpgt_epi16(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_cmpgt_epi16(a_.m128i[1], b_.m128i[1]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i16 = a_.i16 > b_.i16;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = (a_.i16[i] > b_.i16[i]) ? ~INT16_C(0) : INT16_C(0);
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cmpgt_epi16
+  #define _mm256_cmpgt_epi16(a, b) simde_mm256_cmpgt_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_cmpgt_epi32 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_cmpgt_epi32(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_cmpgt_epi32(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_cmpgt_epi32(a_.m128i[1], b_.m128i[1]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), a_.i32 > b_.i32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = (a_.i32[i] > b_.i32[i]) ? ~INT32_C(0) : INT32_C(0);
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cmpgt_epi32
+  #define _mm256_cmpgt_epi32(a, b) simde_mm256_cmpgt_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_cmpgt_epi64 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_cmpgt_epi64(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_cmpgt_epi64(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_cmpgt_epi64(a_.m128i[1], b_.m128i[1]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), a_.i64 > b_.i64);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = (a_.i64[i] > b_.i64[i]) ? ~INT64_C(0) : INT64_C(0);
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cmpgt_epi64
+  #define _mm256_cmpgt_epi64(a, b) simde_mm256_cmpgt_epi64(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_cvtepi8_epi16 (simde__m128i a) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_cvtepi8_epi16(a);
+  #else
+    simde__m256i_private r_;
+    simde__m128i_private a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_CONVERT_VECTOR_)
+      SIMDE_CONVERT_VECTOR_(r_.i16, a_.i8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = a_.i8[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cvtepi8_epi16
+  #define _mm256_cvtepi8_epi16(a) simde_mm256_cvtepi8_epi16(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_cvtepi8_epi32 (simde__m128i a) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_cvtepi8_epi32(a);
+  #else
+    simde__m256i_private r_;
+    simde__m128i_private a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_CONVERT_VECTOR_)
+      SIMDE_CONVERT_VECTOR_(r_.i32, a_.m64_private[0].i8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = a_.i8[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cvtepi8_epi32
+  #define _mm256_cvtepi8_epi32(a) simde_mm256_cvtepi8_epi32(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_cvtepi8_epi64 (simde__m128i a) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_cvtepi8_epi64(a);
+  #else
+    simde__m256i_private r_;
+    simde__m128i_private a_ = simde__m128i_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+      r_.i64[i] = a_.i8[i];
+    }
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cvtepi8_epi64
+  #define _mm256_cvtepi8_epi64(a) simde_mm256_cvtepi8_epi64(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_cvtepi16_epi32 (simde__m128i a) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_cvtepi16_epi32(a);
+  #else
+    simde__m256i_private r_;
+    simde__m128i_private a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_CONVERT_VECTOR_)
+      SIMDE_CONVERT_VECTOR_(r_.i32, a_.i16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = a_.i16[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cvtepi16_epi32
+  #define _mm256_cvtepi16_epi32(a) simde_mm256_cvtepi16_epi32(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_cvtepi16_epi64 (simde__m128i a) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_cvtepi16_epi64(a);
+  #else
+    simde__m256i_private r_;
+    simde__m128i_private a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_CONVERT_VECTOR_)
+      SIMDE_CONVERT_VECTOR_(r_.i64, a_.m64_private[0].i16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = a_.i16[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cvtepi16_epi64
+  #define _mm256_cvtepi16_epi64(a) simde_mm256_cvtepi16_epi64(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_cvtepi32_epi64 (simde__m128i a) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_cvtepi32_epi64(a);
+  #else
+    simde__m256i_private r_;
+    simde__m128i_private a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_CONVERT_VECTOR_)
+      SIMDE_CONVERT_VECTOR_(r_.i64, a_.i32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = a_.i32[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cvtepi32_epi64
+  #define _mm256_cvtepi32_epi64(a) simde_mm256_cvtepi32_epi64(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_cvtepu8_epi16 (simde__m128i a) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_cvtepu8_epi16(a);
+  #else
+    simde__m256i_private r_;
+    simde__m128i_private a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_CONVERT_VECTOR_)
+      SIMDE_CONVERT_VECTOR_(r_.i16, a_.u8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = a_.u8[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cvtepu8_epi16
+  #define _mm256_cvtepu8_epi16(a) simde_mm256_cvtepu8_epi16(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_cvtepu8_epi32 (simde__m128i a) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_cvtepu8_epi32(a);
+  #else
+    simde__m256i_private r_;
+    simde__m128i_private a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_CONVERT_VECTOR_)
+      SIMDE_CONVERT_VECTOR_(r_.i32, a_.m64_private[0].u8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = a_.u8[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cvtepu8_epi32
+  #define _mm256_cvtepu8_epi32(a) simde_mm256_cvtepu8_epi32(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_cvtepu8_epi64 (simde__m128i a) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_cvtepu8_epi64(a);
+  #else
+    simde__m256i_private r_;
+    simde__m128i_private a_ = simde__m128i_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+      r_.i64[i] = a_.u8[i];
+    }
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cvtepu8_epi64
+  #define _mm256_cvtepu8_epi64(a) simde_mm256_cvtepu8_epi64(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_cvtepu16_epi32 (simde__m128i a) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_cvtepu16_epi32(a);
+  #else
+    simde__m256i_private r_;
+    simde__m128i_private a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_CONVERT_VECTOR_)
+      SIMDE_CONVERT_VECTOR_(r_.i32, a_.u16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = a_.u16[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cvtepu16_epi32
+  #define _mm256_cvtepu16_epi32(a) simde_mm256_cvtepu16_epi32(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_cvtepu16_epi64 (simde__m128i a) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_cvtepu16_epi64(a);
+  #else
+    simde__m256i_private r_;
+    simde__m128i_private a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_CONVERT_VECTOR_)
+      SIMDE_CONVERT_VECTOR_(r_.i64, a_.m64_private[0].u16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = a_.u16[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cvtepu16_epi64
+  #define _mm256_cvtepu16_epi64(a) simde_mm256_cvtepu16_epi64(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_cvtepu32_epi64 (simde__m128i a) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_cvtepu32_epi64(a);
+  #else
+    simde__m256i_private r_;
+    simde__m128i_private a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_CONVERT_VECTOR_)
+      SIMDE_CONVERT_VECTOR_(r_.i64, a_.u32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = a_.u32[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cvtepu32_epi64
+  #define _mm256_cvtepu32_epi64(a) simde_mm256_cvtepu32_epi64(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm256_extract_epi8 (simde__m256i a, const int index)
+    SIMDE_REQUIRE_RANGE(index, 0, 31){
+  simde__m256i_private a_ = simde__m256i_to_private(a);
+  return a_.i8[index];
+}
+#if defined(SIMDE_X86_AVX2_NATIVE) && \
+    (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,10,0))
+  #define simde_mm256_extract_epi8(a, index) _mm256_extract_epi8(a, index)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_extract_epi8
+  #define _mm256_extract_epi8(a, index) simde_mm256_extract_epi8(a, index)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm256_extract_epi16 (simde__m256i a, const int index)
+    SIMDE_REQUIRE_RANGE(index, 0, 15)  {
+  simde__m256i_private a_ = simde__m256i_to_private(a);
+  return a_.i16[index];
+}
+#if defined(SIMDE_X86_AVX2_NATIVE) && \
+    (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,10,0))
+  #define simde_mm256_extract_epi16(a, index) _mm256_extract_epi16(a, index)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_extract_epi16
+  #define _mm256_extract_epi16(a, index) simde_mm256_extract_epi16(a, index)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm256_extracti128_si256 (simde__m256i a, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 1) {
+  simde__m256i_private a_ = simde__m256i_to_private(a);
+  return a_.m128i[imm8];
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+#  define simde_mm256_extracti128_si256(a, imm8) _mm256_extracti128_si256(a, imm8)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_extracti128_si256
+  #define _mm256_extracti128_si256(a, imm8) simde_mm256_extracti128_si256(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_i32gather_epi32(const int32_t* base_addr, simde__m128i vindex, const int32_t scale)
+    SIMDE_REQUIRE_CONSTANT(scale)
+    HEDLEY_REQUIRE_MSG((scale && scale <= 8 && !(scale & (scale - 1))), "`scale' must be a power of two less than or equal to 8") {
+  simde__m128i_private
+    vindex_ = simde__m128i_to_private(vindex),
+    r_;
+  const uint8_t* addr = HEDLEY_REINTERPRET_CAST(const uint8_t*, base_addr);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(vindex_.i32) / sizeof(vindex_.i32[0])) ; i++) {
+    const uint8_t* src = addr + (HEDLEY_STATIC_CAST(size_t , vindex_.i32[i]) * HEDLEY_STATIC_CAST(size_t , scale));
+    int32_t dst;
+    simde_memcpy(&dst, src, sizeof(dst));
+    r_.i32[i] = dst;
+  }
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #define simde_mm_i32gather_epi32(base_addr, vindex, scale) _mm_i32gather_epi32(SIMDE_CHECKED_REINTERPRET_CAST(int const*, int32_t const*, base_addr), vindex, scale)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_i32gather_epi32
+  #define _mm_i32gather_epi32(base_addr, vindex, scale) simde_mm_i32gather_epi32(SIMDE_CHECKED_REINTERPRET_CAST(int32_t const*, int const*, base_addr), vindex, scale)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_mask_i32gather_epi32(simde__m128i src, const int32_t* base_addr, simde__m128i vindex, simde__m128i mask, const int32_t scale)
+    SIMDE_REQUIRE_CONSTANT(scale)
+    HEDLEY_REQUIRE_MSG((scale && scale <= 8 && !(scale & (scale - 1))), "`scale' must be a power of two less than or equal to 8") {
+  simde__m128i_private
+    vindex_ = simde__m128i_to_private(vindex),
+    src_ = simde__m128i_to_private(src),
+    mask_ = simde__m128i_to_private(mask),
+    r_;
+  const uint8_t* addr = HEDLEY_REINTERPRET_CAST(const uint8_t*, base_addr);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(vindex_.i32) / sizeof(vindex_.i32[0])) ; i++) {
+    if ((mask_.i32[i] >> 31) & 1) {
+      const uint8_t* src1 = addr + (HEDLEY_STATIC_CAST(size_t , vindex_.i32[i]) * HEDLEY_STATIC_CAST(size_t , scale));
+      int32_t dst;
+      simde_memcpy(&dst, src1, sizeof(dst));
+      r_.i32[i] = dst;
+    }
+    else {
+      r_.i32[i] = src_.i32[i];
+    }
+  }
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #define simde_mm_mask_i32gather_epi32(src, base_addr, vindex, mask, scale) _mm_mask_i32gather_epi32(src, SIMDE_CHECKED_REINTERPRET_CAST(int const*, int32_t const*, base_addr), vindex, mask, scale)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_mask_i32gather_epi32
+  #define _mm_mask_i32gather_epi32(src, base_addr, vindex, mask, scale) simde_mm_mask_i32gather_epi32(src, SIMDE_CHECKED_REINTERPRET_CAST(int32_t const*, int const*, base_addr), vindex, mask, scale)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_i32gather_epi32(const int32_t* base_addr, simde__m256i vindex, const int32_t scale)
+    SIMDE_REQUIRE_CONSTANT(scale)
+    HEDLEY_REQUIRE_MSG((scale && scale <= 8 && !(scale & (scale - 1))), "`scale' must be a power of two less than or equal to 8") {
+  simde__m256i_private
+    vindex_ = simde__m256i_to_private(vindex),
+    r_;
+  const uint8_t* addr = HEDLEY_REINTERPRET_CAST(const uint8_t*, base_addr);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(vindex_.i32) / sizeof(vindex_.i32[0])) ; i++) {
+    const uint8_t* src = addr + (HEDLEY_STATIC_CAST(size_t , vindex_.i32[i]) * HEDLEY_STATIC_CAST(size_t , scale));
+    int32_t dst;
+    simde_memcpy(&dst, src, sizeof(dst));
+    r_.i32[i] = dst;
+  }
+
+  return simde__m256i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #define simde_mm256_i32gather_epi32(base_addr, vindex, scale) _mm256_i32gather_epi32(SIMDE_CHECKED_REINTERPRET_CAST(int const*, int32_t const*, base_addr), vindex, scale)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_i32gather_epi32
+  #define _mm256_i32gather_epi32(base_addr, vindex, scale) simde_mm256_i32gather_epi32(SIMDE_CHECKED_REINTERPRET_CAST(int32_t const*, int const*, base_addr), vindex, scale)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_mask_i32gather_epi32(simde__m256i src, const int32_t* base_addr, simde__m256i vindex, simde__m256i mask, const int32_t scale)
+    SIMDE_REQUIRE_CONSTANT(scale)
+    HEDLEY_REQUIRE_MSG((scale && scale <= 8 && !(scale & (scale - 1))), "`scale' must be a power of two less than or equal to 8") {
+  simde__m256i_private
+    vindex_ = simde__m256i_to_private(vindex),
+    src_ = simde__m256i_to_private(src),
+    mask_ = simde__m256i_to_private(mask),
+    r_;
+  const uint8_t* addr = HEDLEY_REINTERPRET_CAST(const uint8_t*, base_addr);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(vindex_.i32) / sizeof(vindex_.i32[0])) ; i++) {
+    if ((mask_.i32[i] >> 31) & 1) {
+      const uint8_t* src1 = addr + (HEDLEY_STATIC_CAST(size_t , vindex_.i32[i]) * HEDLEY_STATIC_CAST(size_t , scale));
+      int32_t dst;
+      simde_memcpy(&dst, src1, sizeof(dst));
+      r_.i32[i] = dst;
+    }
+    else {
+      r_.i32[i] = src_.i32[i];
+    }
+  }
+
+  return simde__m256i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #define simde_mm256_mask_i32gather_epi32(src, base_addr, vindex, mask, scale) _mm256_mask_i32gather_epi32(src, SIMDE_CHECKED_REINTERPRET_CAST(int const*, int32_t const*, base_addr), vindex, mask, scale)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_mask_i32gather_epi32
+  #define _mm256_mask_i32gather_epi32(src, base_addr, vindex, mask, scale) simde_mm256_mask_i32gather_epi32(src, SIMDE_CHECKED_REINTERPRET_CAST(int32_t const*, int const*, base_addr), vindex, mask, scale)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_i64gather_epi32(const int32_t* base_addr, simde__m128i vindex, const int32_t scale)
+    SIMDE_REQUIRE_CONSTANT(scale)
+    HEDLEY_REQUIRE_MSG((scale && scale <= 8 && !(scale & (scale - 1))), "`scale' must be a power of two less than or equal to 8") {
+  simde__m128i_private
+    vindex_ = simde__m128i_to_private(vindex),
+    r_ = simde__m128i_to_private(simde_mm_setzero_si128());
+  const uint8_t* addr = HEDLEY_REINTERPRET_CAST(const uint8_t*, base_addr);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(vindex_.i64) / sizeof(vindex_.i64[0])) ; i++) {
+    const uint8_t* src = addr + (HEDLEY_STATIC_CAST(size_t , vindex_.i64[i]) * HEDLEY_STATIC_CAST(size_t , scale));
+    int32_t dst;
+    simde_memcpy(&dst, src, sizeof(dst));
+    r_.i32[i] = dst;
+  }
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #define simde_mm_i64gather_epi32(base_addr, vindex, scale) _mm_i64gather_epi32(SIMDE_CHECKED_REINTERPRET_CAST(int const*, int32_t const*, base_addr), vindex, scale)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_i64gather_epi32
+  #define _mm_i64gather_epi32(base_addr, vindex, scale) simde_mm_i64gather_epi32(SIMDE_CHECKED_REINTERPRET_CAST(int32_t const*, int const*, base_addr), vindex, scale)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_mask_i64gather_epi32(simde__m128i src, const int32_t* base_addr, simde__m128i vindex, simde__m128i mask, const int32_t scale)
+    SIMDE_REQUIRE_CONSTANT(scale)
+    HEDLEY_REQUIRE_MSG((scale && scale <= 8 && !(scale & (scale - 1))), "`scale' must be a power of two less than or equal to 8") {
+  simde__m128i_private
+    vindex_ = simde__m128i_to_private(vindex),
+    src_ = simde__m128i_to_private(src),
+    mask_ = simde__m128i_to_private(mask),
+    r_ = simde__m128i_to_private(simde_mm_setzero_si128());
+  const uint8_t* addr = HEDLEY_REINTERPRET_CAST(const uint8_t*, base_addr);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(vindex_.i64) / sizeof(vindex_.i64[0])) ; i++) {
+    if ((mask_.i32[i] >> 31) & 1) {
+      const uint8_t* src1 = addr + (HEDLEY_STATIC_CAST(size_t , vindex_.i64[i]) * HEDLEY_STATIC_CAST(size_t , scale));
+      int32_t dst;
+      simde_memcpy(&dst, src1, sizeof(dst));
+      r_.i32[i] = dst;
+    }
+    else {
+      r_.i32[i] = src_.i32[i];
+    }
+  }
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #define simde_mm_mask_i64gather_epi32(src, base_addr, vindex, mask, scale) _mm_mask_i64gather_epi32(src, SIMDE_CHECKED_REINTERPRET_CAST(int const*, int32_t const*, base_addr), vindex, mask, scale)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_mask_i64gather_epi32
+  #define _mm_mask_i64gather_epi32(src, base_addr, vindex, mask, scale) simde_mm_mask_i64gather_epi32(src, SIMDE_CHECKED_REINTERPRET_CAST(int32_t const*, int const*, base_addr), vindex, mask, scale)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm256_i64gather_epi32(const int32_t* base_addr, simde__m256i vindex, const int32_t scale)
+    SIMDE_REQUIRE_CONSTANT(scale)
+    HEDLEY_REQUIRE_MSG((scale && scale <= 8 && !(scale & (scale - 1))), "`scale' must be a power of two less than or equal to 8") {
+  simde__m256i_private
+    vindex_ = simde__m256i_to_private(vindex);
+  simde__m128i_private
+    r_ = simde__m128i_to_private(simde_mm_setzero_si128());
+  const uint8_t* addr = HEDLEY_REINTERPRET_CAST(const uint8_t*, base_addr);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(vindex_.i64) / sizeof(vindex_.i64[0])) ; i++) {
+    const uint8_t* src = addr + (HEDLEY_STATIC_CAST(size_t , vindex_.i64[i]) * HEDLEY_STATIC_CAST(size_t , scale));
+    int32_t dst;
+    simde_memcpy(&dst, src, sizeof(dst));
+    r_.i32[i] = dst;
+  }
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #define simde_mm256_i64gather_epi32(base_addr, vindex, scale) _mm256_i64gather_epi32(SIMDE_CHECKED_REINTERPRET_CAST(int const*, int32_t const*, base_addr), vindex, scale)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_i64gather_epi32
+  #define _mm256_i64gather_epi32(base_addr, vindex, scale) simde_mm256_i64gather_epi32(SIMDE_CHECKED_REINTERPRET_CAST(int32_t const*, int const*, base_addr), vindex, scale)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm256_mask_i64gather_epi32(simde__m128i src, const int32_t* base_addr, simde__m256i vindex, simde__m128i mask, const int32_t scale)
+    SIMDE_REQUIRE_CONSTANT(scale)
+    HEDLEY_REQUIRE_MSG((scale && scale <= 8 && !(scale & (scale - 1))), "`scale' must be a power of two less than or equal to 8") {
+  simde__m256i_private
+    vindex_ = simde__m256i_to_private(vindex);
+  simde__m128i_private
+    src_ = simde__m128i_to_private(src),
+    mask_ = simde__m128i_to_private(mask),
+    r_ = simde__m128i_to_private(simde_mm_setzero_si128());
+  const uint8_t* addr = HEDLEY_REINTERPRET_CAST(const uint8_t*, base_addr);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(vindex_.i64) / sizeof(vindex_.i64[0])) ; i++) {
+    if ((mask_.i32[i] >> 31) & 1) {
+      const uint8_t* src1 = addr + (HEDLEY_STATIC_CAST(size_t , vindex_.i64[i]) * HEDLEY_STATIC_CAST(size_t , scale));
+      int32_t dst;
+      simde_memcpy(&dst, src1, sizeof(dst));
+      r_.i32[i] = dst;
+    }
+    else {
+      r_.i32[i] = src_.i32[i];
+    }
+  }
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #define simde_mm256_mask_i64gather_epi32(src, base_addr, vindex, mask, scale) _mm256_mask_i64gather_epi32(src, SIMDE_CHECKED_REINTERPRET_CAST(int const*, int32_t const*, base_addr), vindex, mask, scale)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_mask_i64gather_epi32
+  #define _mm256_mask_i64gather_epi32(src, base_addr, vindex, mask, scale) simde_mm256_mask_i64gather_epi32(src, SIMDE_CHECKED_REINTERPRET_CAST(int32_t const*, int const*, base_addr), vindex, mask, scale)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_i32gather_epi64(const int64_t* base_addr, simde__m128i vindex, const int32_t scale)
+    SIMDE_REQUIRE_CONSTANT(scale)
+    HEDLEY_REQUIRE_MSG((scale && scale <= 8 && !(scale & (scale - 1))), "`scale' must be a power of two less than or equal to 8") {
+  simde__m128i_private
+    vindex_ = simde__m128i_to_private(vindex),
+    r_;
+  const uint8_t* addr = HEDLEY_REINTERPRET_CAST(const uint8_t*, base_addr);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+    const uint8_t* src = addr + (HEDLEY_STATIC_CAST(size_t , vindex_.i32[i]) * HEDLEY_STATIC_CAST(size_t , scale));
+    int64_t dst;
+    simde_memcpy(&dst, src, sizeof(dst));
+    r_.i64[i] = dst;
+  }
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #if SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0)
+    #define simde_mm_i32gather_epi64(base_addr, vindex, scale) _mm_i32gather_epi64(HEDLEY_REINTERPRET_CAST(int64_t const*, base_addr), vindex, scale)
+  #else
+    #define simde_mm_i32gather_epi64(base_addr, vindex, scale) _mm_i32gather_epi64(HEDLEY_REINTERPRET_CAST(long long const*, base_addr), vindex, scale)
+  #endif
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_i32gather_epi64
+  #define _mm_i32gather_epi64(base_addr, vindex, scale) simde_mm_i32gather_epi64(HEDLEY_REINTERPRET_CAST(int64_t const*, base_addr), vindex, scale)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_mask_i32gather_epi64(simde__m128i src, const int64_t* base_addr, simde__m128i vindex, simde__m128i mask, const int32_t scale)
+    SIMDE_REQUIRE_CONSTANT(scale)
+    HEDLEY_REQUIRE_MSG((scale && scale <= 8 && !(scale & (scale - 1))), "`scale' must be a power of two less than or equal to 8") {
+  simde__m128i_private
+    vindex_ = simde__m128i_to_private(vindex),
+    src_ = simde__m128i_to_private(src),
+    mask_ = simde__m128i_to_private(mask),
+    r_;
+  const uint8_t* addr = HEDLEY_REINTERPRET_CAST(const uint8_t*, base_addr);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+    if ((mask_.i64[i] >> 63) & 1) {
+      const uint8_t* src1 = addr + (HEDLEY_STATIC_CAST(size_t , vindex_.i32[i]) * HEDLEY_STATIC_CAST(size_t , scale));
+      int64_t dst;
+      simde_memcpy(&dst, src1, sizeof(dst));
+      r_.i64[i] = dst;
+    }
+    else {
+      r_.i64[i] = src_.i64[i];
+    }
+  }
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #if SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0)
+    #define simde_mm_mask_i32gather_epi64(src, base_addr, vindex, mask, scale) _mm_mask_i32gather_epi64(src, HEDLEY_REINTERPRET_CAST(int64_t const*, base_addr), vindex, mask, scale)
+  #else
+    #define simde_mm_mask_i32gather_epi64(src, base_addr, vindex, mask, scale) _mm_mask_i32gather_epi64(src, HEDLEY_REINTERPRET_CAST(long long const*, base_addr), vindex, mask, scale)
+  #endif
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_mask_i32gather_epi64
+  #define _mm_mask_i32gather_epi64(src, base_addr, vindex, mask, scale) simde_mm_mask_i32gather_epi64(src, HEDLEY_REINTERPRET_CAST(int64_t const*, base_addr), vindex, mask, scale)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_i32gather_epi64(const int64_t* base_addr, simde__m128i vindex, const int32_t scale)
+    SIMDE_REQUIRE_CONSTANT(scale)
+    HEDLEY_REQUIRE_MSG((scale && scale <= 8 && !(scale & (scale - 1))), "`scale' must be a power of two less than or equal to 8") {
+  simde__m128i_private
+    vindex_ = simde__m128i_to_private(vindex);
+  simde__m256i_private
+    r_;
+  const uint8_t* addr = HEDLEY_REINTERPRET_CAST(const uint8_t*, base_addr);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(vindex_.i32) / sizeof(vindex_.i32[0])) ; i++) {
+    const uint8_t* src = addr + (HEDLEY_STATIC_CAST(size_t , vindex_.i32[i]) * HEDLEY_STATIC_CAST(size_t , scale));
+    int64_t dst;
+    simde_memcpy(&dst, src, sizeof(dst));
+    r_.i64[i] = dst;
+  }
+
+  return simde__m256i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #if SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0)
+    #define simde_mm256_i32gather_epi64(base_addr, vindex, scale) _mm256_i32gather_epi64(HEDLEY_REINTERPRET_CAST(int64_t const*, base_addr), vindex, scale)
+  #else
+    #define simde_mm256_i32gather_epi64(base_addr, vindex, scale) _mm256_i32gather_epi64(HEDLEY_REINTERPRET_CAST(long long const*, base_addr), vindex, scale)
+  #endif
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_i32gather_epi64
+  #define _mm256_i32gather_epi64(base_addr, vindex, scale) simde_mm256_i32gather_epi64(HEDLEY_REINTERPRET_CAST(int64_t const*, base_addr), vindex, scale)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_mask_i32gather_epi64(simde__m256i src, const int64_t* base_addr, simde__m128i vindex, simde__m256i mask, const int32_t scale)
+    SIMDE_REQUIRE_CONSTANT(scale)
+    HEDLEY_REQUIRE_MSG((scale && scale <= 8 && !(scale & (scale - 1))), "`scale' must be a power of two less than or equal to 8") {
+  simde__m256i_private
+    src_ = simde__m256i_to_private(src),
+    mask_ = simde__m256i_to_private(mask),
+    r_;
+  simde__m128i_private
+    vindex_ = simde__m128i_to_private(vindex);
+  const uint8_t* addr = HEDLEY_REINTERPRET_CAST(const uint8_t*, base_addr);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(vindex_.i32) / sizeof(vindex_.i32[0])) ; i++) {
+    if ((mask_.i64[i] >> 63) & 1) {
+      const uint8_t* src1 = addr + (HEDLEY_STATIC_CAST(size_t , vindex_.i32[i]) * HEDLEY_STATIC_CAST(size_t , scale));
+      int64_t dst;
+      simde_memcpy(&dst, src1, sizeof(dst));
+      r_.i64[i] = dst;
+    }
+    else {
+      r_.i64[i] = src_.i64[i];
+    }
+  }
+
+  return simde__m256i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #if SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0)
+    #define simde_mm256_mask_i32gather_epi64(src, base_addr, vindex, mask, scale) _mm256_mask_i32gather_epi64(src, HEDLEY_REINTERPRET_CAST(int64_t const*, base_addr), vindex, mask, scale)
+  #else
+    #define simde_mm256_mask_i32gather_epi64(src, base_addr, vindex, mask, scale) _mm256_mask_i32gather_epi64(src, HEDLEY_REINTERPRET_CAST(long long const*, base_addr), vindex, mask, scale)
+  #endif
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_mask_i32gather_epi64
+  #define _mm256_mask_i32gather_epi64(src, base_addr, vindex, mask, scale) simde_mm256_mask_i32gather_epi64(src, HEDLEY_REINTERPRET_CAST(int64_t const*, base_addr), vindex, mask, scale)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_i64gather_epi64(const int64_t* base_addr, simde__m128i vindex, const int32_t scale)
+    SIMDE_REQUIRE_CONSTANT(scale)
+    HEDLEY_REQUIRE_MSG((scale && scale <= 8 && !(scale & (scale - 1))), "`scale' must be a power of two less than or equal to 8") {
+  simde__m128i_private
+    vindex_ = simde__m128i_to_private(vindex),
+    r_ = simde__m128i_to_private(simde_mm_setzero_si128());
+  const uint8_t* addr = HEDLEY_REINTERPRET_CAST(const uint8_t*, base_addr);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(vindex_.i64) / sizeof(vindex_.i64[0])) ; i++) {
+    const uint8_t* src = addr + (HEDLEY_STATIC_CAST(size_t , vindex_.i64[i]) * HEDLEY_STATIC_CAST(size_t , scale));
+    int64_t dst;
+    simde_memcpy(&dst, src, sizeof(dst));
+    r_.i64[i] = dst;
+  }
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #if SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0)
+    #define simde_mm_i64gather_epi64(base_addr, vindex, scale) _mm_i64gather_epi64(HEDLEY_REINTERPRET_CAST(int64_t const*, base_addr), vindex, scale)
+  #else
+    #define simde_mm_i64gather_epi64(base_addr, vindex, scale) _mm_i64gather_epi64(HEDLEY_REINTERPRET_CAST(long long const*, base_addr), vindex, scale)
+  #endif
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_i64gather_epi64
+  #define _mm_i64gather_epi64(base_addr, vindex, scale) simde_mm_i64gather_epi64(HEDLEY_REINTERPRET_CAST(int64_t const*, base_addr), vindex, scale)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_mask_i64gather_epi64(simde__m128i src, const int64_t* base_addr, simde__m128i vindex, simde__m128i mask, const int32_t scale)
+    SIMDE_REQUIRE_CONSTANT(scale)
+    HEDLEY_REQUIRE_MSG((scale && scale <= 8 && !(scale & (scale - 1))), "`scale' must be a power of two less than or equal to 8") {
+  simde__m128i_private
+    vindex_ = simde__m128i_to_private(vindex),
+    src_ = simde__m128i_to_private(src),
+    mask_ = simde__m128i_to_private(mask),
+    r_ = simde__m128i_to_private(simde_mm_setzero_si128());
+  const uint8_t* addr = HEDLEY_REINTERPRET_CAST(const uint8_t*, base_addr);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(vindex_.i64) / sizeof(vindex_.i64[0])) ; i++) {
+    if ((mask_.i64[i] >> 63) & 1) {
+      const uint8_t* src1 = addr + (HEDLEY_STATIC_CAST(size_t , vindex_.i64[i]) * HEDLEY_STATIC_CAST(size_t , scale));
+      int64_t dst;
+      simde_memcpy(&dst, src1, sizeof(dst));
+      r_.i64[i] = dst;
+    }
+    else {
+      r_.i64[i] = src_.i64[i];
+    }
+  }
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #if SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0)
+    #define simde_mm_mask_i64gather_epi64(src, base_addr, vindex, mask, scale) _mm_mask_i64gather_epi64(src, HEDLEY_REINTERPRET_CAST(int64_t const*, base_addr), vindex, mask, scale)
+  #else
+    #define simde_mm_mask_i64gather_epi64(src, base_addr, vindex, mask, scale) _mm_mask_i64gather_epi64(src, HEDLEY_REINTERPRET_CAST(long long const*, base_addr), vindex, mask, scale)
+  #endif
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_mask_i64gather_epi64
+  #define _mm_mask_i64gather_epi64(src, base_addr, vindex, mask, scale) simde_mm_mask_i64gather_epi64(src, HEDLEY_REINTERPRET_CAST(int64_t const*, base_addr), vindex, mask, scale)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_i64gather_epi64(const int64_t* base_addr, simde__m256i vindex, const int32_t scale)
+    SIMDE_REQUIRE_CONSTANT(scale)
+    HEDLEY_REQUIRE_MSG((scale && scale <= 8 && !(scale & (scale - 1))), "`scale' must be a power of two less than or equal to 8") {
+  simde__m256i_private
+    vindex_ = simde__m256i_to_private(vindex),
+    r_ = simde__m256i_to_private(simde_mm256_setzero_si256());
+  const uint8_t* addr = HEDLEY_REINTERPRET_CAST(const uint8_t*, base_addr);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(vindex_.i64) / sizeof(vindex_.i64[0])) ; i++) {
+    const uint8_t* src = addr + (HEDLEY_STATIC_CAST(size_t , vindex_.i64[i]) * HEDLEY_STATIC_CAST(size_t , scale));
+    int64_t dst;
+    simde_memcpy(&dst, src, sizeof(dst));
+    r_.i64[i] = dst;
+  }
+
+  return simde__m256i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #if SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0)
+    #define simde_mm256_i64gather_epi64(base_addr, vindex, scale) _mm256_i64gather_epi64(HEDLEY_REINTERPRET_CAST(int64_t const*, base_addr), vindex, scale)
+  #else
+    #define simde_mm256_i64gather_epi64(base_addr, vindex, scale) _mm256_i64gather_epi64(HEDLEY_REINTERPRET_CAST(long long const*, base_addr), vindex, scale)
+  #endif
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_i64gather_epi64
+  #define _mm256_i64gather_epi64(base_addr, vindex, scale) simde_mm256_i64gather_epi64(HEDLEY_REINTERPRET_CAST(int64_t const*, base_addr), vindex, scale)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_mask_i64gather_epi64(simde__m256i src, const int64_t* base_addr, simde__m256i vindex, simde__m256i mask, const int32_t scale)
+    SIMDE_REQUIRE_CONSTANT(scale)
+    HEDLEY_REQUIRE_MSG((scale && scale <= 8 && !(scale & (scale - 1))), "`scale' must be a power of two less than or equal to 8") {
+  simde__m256i_private
+    vindex_ = simde__m256i_to_private(vindex),
+    src_ = simde__m256i_to_private(src),
+    mask_ = simde__m256i_to_private(mask),
+    r_ = simde__m256i_to_private(simde_mm256_setzero_si256());
+  const uint8_t* addr = HEDLEY_REINTERPRET_CAST(const uint8_t*, base_addr);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(vindex_.i64) / sizeof(vindex_.i64[0])) ; i++) {
+    if ((mask_.i64[i] >> 63) & 1) {
+      const uint8_t* src1 = addr + (HEDLEY_STATIC_CAST(size_t , vindex_.i64[i]) * HEDLEY_STATIC_CAST(size_t , scale));
+      int64_t dst;
+      simde_memcpy(&dst, src1, sizeof(dst));
+      r_.i64[i] = dst;
+    }
+    else {
+      r_.i64[i] = src_.i64[i];
+    }
+  }
+
+  return simde__m256i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #if SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0)
+    #define simde_mm256_mask_i64gather_epi64(src, base_addr, vindex, mask, scale) _mm256_mask_i64gather_epi64(src, HEDLEY_REINTERPRET_CAST(int64_t const*, base_addr), vindex, mask, scale)
+  #else
+    #define simde_mm256_mask_i64gather_epi64(src, base_addr, vindex, mask, scale) _mm256_mask_i64gather_epi64(src, HEDLEY_REINTERPRET_CAST(long long const*, base_addr), vindex, mask, scale)
+  #endif
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_mask_i64gather_epi64
+  #define _mm256_mask_i64gather_epi64(src, base_addr, vindex, mask, scale) simde_mm256_mask_i64gather_epi64(src, HEDLEY_REINTERPRET_CAST(int64_t const*, base_addr), vindex, mask, scale)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_i32gather_ps(const simde_float32* base_addr, simde__m128i vindex, const int32_t scale)
+    SIMDE_REQUIRE_CONSTANT(scale)
+    HEDLEY_REQUIRE_MSG((scale && scale <= 8 && !(scale & (scale - 1))), "`scale' must be a power of two less than or equal to 8") {
+  simde__m128i_private
+    vindex_ = simde__m128i_to_private(vindex);
+  simde__m128_private
+    r_;
+  const uint8_t* addr = HEDLEY_REINTERPRET_CAST(const uint8_t*, base_addr);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(vindex_.i32) / sizeof(vindex_.i32[0])) ; i++) {
+    const uint8_t* src = addr + (HEDLEY_STATIC_CAST(size_t , vindex_.i32[i]) * HEDLEY_STATIC_CAST(size_t , scale));
+    simde_float32 dst;
+    simde_memcpy(&dst, src, sizeof(dst));
+    r_.f32[i] = dst;
+  }
+
+  return simde__m128_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #define simde_mm_i32gather_ps(base_addr, vindex, scale) _mm_i32gather_ps(SIMDE_CHECKED_REINTERPRET_CAST(float const*, simde_float32 const*, base_addr), vindex, scale)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_i32gather_ps
+  #define _mm_i32gather_ps(base_addr, vindex, scale) simde_mm_i32gather_ps(SIMDE_CHECKED_REINTERPRET_CAST(simde_float32 const*, float const*, base_addr), vindex, scale)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_mask_i32gather_ps(simde__m128 src, const simde_float32* base_addr, simde__m128i vindex, simde__m128 mask, const int32_t scale)
+    SIMDE_REQUIRE_CONSTANT(scale)
+    HEDLEY_REQUIRE_MSG((scale && scale <= 8 && !(scale & (scale - 1))), "`scale' must be a power of two less than or equal to 8") {
+  simde__m128i_private
+    vindex_ = simde__m128i_to_private(vindex);
+  simde__m128_private
+    src_ = simde__m128_to_private(src),
+    mask_ = simde__m128_to_private(mask),
+    r_;
+  const uint8_t* addr = HEDLEY_REINTERPRET_CAST(const uint8_t*, base_addr);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(vindex_.i32) / sizeof(vindex_.i32[0])) ; i++) {
+    if ((mask_.i32[i] >> 31) & 1) {
+      const uint8_t* src1 = addr + (HEDLEY_STATIC_CAST(size_t , vindex_.i32[i]) * HEDLEY_STATIC_CAST(size_t , scale));
+      simde_float32 dst;
+      simde_memcpy(&dst, src1, sizeof(dst));
+      r_.f32[i] = dst;
+    }
+    else {
+      r_.f32[i] = src_.f32[i];
+    }
+  }
+
+  return simde__m128_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #define simde_mm_mask_i32gather_ps(src, base_addr, vindex, mask, scale) _mm_mask_i32gather_ps(src, SIMDE_CHECKED_REINTERPRET_CAST(float const*, simde_float32 const*, base_addr), vindex, mask, scale)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_mask_i32gather_ps
+  #define _mm_mask_i32gather_ps(src, base_addr, vindex, mask, scale) simde_mm_mask_i32gather_ps(src, SIMDE_CHECKED_REINTERPRET_CAST(simde_float32 const*, float const*, base_addr), vindex, mask, scale)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_i32gather_ps(const simde_float32* base_addr, simde__m256i vindex, const int32_t scale)
+    SIMDE_REQUIRE_CONSTANT(scale)
+    HEDLEY_REQUIRE_MSG((scale && scale <= 8 && !(scale & (scale - 1))), "`scale' must be a power of two less than or equal to 8") {
+  simde__m256i_private
+    vindex_ = simde__m256i_to_private(vindex);
+  simde__m256_private
+    r_;
+  const uint8_t* addr = HEDLEY_REINTERPRET_CAST(const uint8_t*, base_addr);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(vindex_.i32) / sizeof(vindex_.i32[0])) ; i++) {
+    const uint8_t* src = addr + (HEDLEY_STATIC_CAST(size_t , vindex_.i32[i]) * HEDLEY_STATIC_CAST(size_t , scale));
+    simde_float32 dst;
+    simde_memcpy(&dst, src, sizeof(dst));
+    r_.f32[i] = dst;
+  }
+
+  return simde__m256_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #define simde_mm256_i32gather_ps(base_addr, vindex, scale) _mm256_i32gather_ps(SIMDE_CHECKED_REINTERPRET_CAST(float const*, simde_float32 const*, (base_addr)), (vindex), (scale))
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_i32gather_ps
+  #define _mm256_i32gather_ps(base_addr, vindex, scale) simde_mm256_i32gather_ps(SIMDE_CHECKED_REINTERPRET_CAST(simde_float32 const*, float const*, (base_addr)), (vindex), (scale))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_mask_i32gather_ps(simde__m256 src, const simde_float32* base_addr, simde__m256i vindex, simde__m256 mask, const int32_t scale)
+    SIMDE_REQUIRE_CONSTANT(scale)
+    HEDLEY_REQUIRE_MSG((scale && scale <= 8 && !(scale & (scale - 1))), "`scale' must be a power of two less than or equal to 8") {
+  simde__m256i_private
+    vindex_ = simde__m256i_to_private(vindex);
+  simde__m256_private
+    src_ = simde__m256_to_private(src),
+    mask_ = simde__m256_to_private(mask),
+    r_;
+  const uint8_t* addr = HEDLEY_REINTERPRET_CAST(const uint8_t*, base_addr);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(vindex_.i32) / sizeof(vindex_.i32[0])) ; i++) {
+    if ((mask_.i32[i] >> 31) & 1) {
+      const uint8_t* src1 = addr + (HEDLEY_STATIC_CAST(size_t , vindex_.i32[i]) * HEDLEY_STATIC_CAST(size_t , scale));
+      simde_float32 dst;
+      simde_memcpy(&dst, src1, sizeof(dst));
+      r_.f32[i] = dst;
+    }
+    else {
+      r_.f32[i] = src_.f32[i];
+    }
+  }
+
+  return simde__m256_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #define simde_mm256_mask_i32gather_ps(src, base_addr, vindex, mask, scale) _mm256_mask_i32gather_ps(src, SIMDE_CHECKED_REINTERPRET_CAST(float const*, simde_float32 const*, base_addr), vindex, mask, scale)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_mask_i32gather_ps
+  #define _mm256_mask_i32gather_ps(src, base_addr, vindex, mask, scale) simde_mm256_mask_i32gather_ps(src, SIMDE_CHECKED_REINTERPRET_CAST(simde_float32 const*, float const*, base_addr), vindex, mask, scale)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_i64gather_ps(const simde_float32* base_addr, simde__m128i vindex, const int32_t scale)
+    SIMDE_REQUIRE_CONSTANT(scale)
+    HEDLEY_REQUIRE_MSG((scale && scale <= 8 && !(scale & (scale - 1))), "`scale' must be a power of two less than or equal to 8") {
+  simde__m128i_private
+    vindex_ = simde__m128i_to_private(vindex);
+  simde__m128_private
+    r_ = simde__m128_to_private(simde_mm_setzero_ps());
+  const uint8_t* addr = HEDLEY_REINTERPRET_CAST(const uint8_t*, base_addr);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(vindex_.i64) / sizeof(vindex_.i64[0])) ; i++) {
+    const uint8_t* src = addr + (HEDLEY_STATIC_CAST(size_t , vindex_.i64[i]) * HEDLEY_STATIC_CAST(size_t , scale));
+    simde_float32 dst;
+    simde_memcpy(&dst, src, sizeof(dst));
+    r_.f32[i] = dst;
+  }
+
+  return simde__m128_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #define simde_mm_i64gather_ps(base_addr, vindex, scale) _mm_i64gather_ps(SIMDE_CHECKED_REINTERPRET_CAST(float const*, simde_float32 const*, base_addr), vindex, scale)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_i64gather_ps
+  #define _mm_i64gather_ps(base_addr, vindex, scale) simde_mm_i64gather_ps(SIMDE_CHECKED_REINTERPRET_CAST(simde_float32 const*, float const*, base_addr), vindex, scale)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_mask_i64gather_ps(simde__m128 src, const simde_float32* base_addr, simde__m128i vindex, simde__m128 mask, const int32_t scale)
+    SIMDE_REQUIRE_CONSTANT(scale)
+    HEDLEY_REQUIRE_MSG((scale && scale <= 8 && !(scale & (scale - 1))), "`scale' must be a power of two less than or equal to 8") {
+  simde__m128i_private
+    vindex_ = simde__m128i_to_private(vindex);
+  simde__m128_private
+    src_ = simde__m128_to_private(src),
+    mask_ = simde__m128_to_private(mask),
+    r_ = simde__m128_to_private(simde_mm_setzero_ps());
+  const uint8_t* addr = HEDLEY_REINTERPRET_CAST(const uint8_t*, base_addr);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(vindex_.i64) / sizeof(vindex_.i64[0])) ; i++) {
+    if ((mask_.i32[i] >> 31) & 1) {
+      const uint8_t* src1 = addr + (HEDLEY_STATIC_CAST(size_t , vindex_.i64[i]) * HEDLEY_STATIC_CAST(size_t , scale));
+     simde_float32 dst;
+      simde_memcpy(&dst, src1, sizeof(dst));
+      r_.f32[i] = dst;
+    }
+    else {
+      r_.f32[i] = src_.f32[i];
+    }
+  }
+
+  return simde__m128_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #define simde_mm_mask_i64gather_ps(src, base_addr, vindex, mask, scale) _mm_mask_i64gather_ps(src, SIMDE_CHECKED_REINTERPRET_CAST(float const*, float32_t const*, base_addr), vindex, mask, scale)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_mask_i64gather_ps
+  #define _mm_mask_i64gather_ps(src, base_addr, vindex, mask, scale) simde_mm_mask_i64gather_ps(src, SIMDE_CHECKED_REINTERPRET_CAST(simde_float32 const*, float const*, base_addr), vindex, mask, scale)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm256_i64gather_ps(const simde_float32* base_addr, simde__m256i vindex, const int32_t scale)
+    SIMDE_REQUIRE_CONSTANT(scale)
+    HEDLEY_REQUIRE_MSG((scale && scale <= 8 && !(scale & (scale - 1))), "`scale' must be a power of two less than or equal to 8") {
+  simde__m256i_private
+    vindex_ = simde__m256i_to_private(vindex);
+  simde__m128_private
+    r_ = simde__m128_to_private(simde_mm_setzero_ps());
+  const uint8_t* addr = HEDLEY_REINTERPRET_CAST(const uint8_t*, base_addr);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(vindex_.i64) / sizeof(vindex_.i64[0])) ; i++) {
+    const uint8_t* src = addr + (HEDLEY_STATIC_CAST(size_t , vindex_.i64[i]) * HEDLEY_STATIC_CAST(size_t , scale));
+    simde_float32 dst;
+    simde_memcpy(&dst, src, sizeof(dst));
+    r_.f32[i] = dst;
+  }
+
+  return simde__m128_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #define simde_mm256_i64gather_ps(base_addr, vindex, scale) _mm256_i64gather_ps(SIMDE_CHECKED_REINTERPRET_CAST(float const*, simde_float32 const*, base_addr), vindex, scale)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_i64gather_ps
+  #define _mm256_i64gather_ps(base_addr, vindex, scale) simde_mm256_i64gather_ps(SIMDE_CHECKED_REINTERPRET_CAST(simde_float32 const*, float const*, base_addr), vindex, scale)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm256_mask_i64gather_ps(simde__m128 src, const simde_float32* base_addr, simde__m256i vindex, simde__m128 mask, const int32_t scale)
+    SIMDE_REQUIRE_CONSTANT(scale)
+    HEDLEY_REQUIRE_MSG((scale && scale <= 8 && !(scale & (scale - 1))), "`scale' must be a power of two less than or equal to 8") {
+  simde__m256i_private
+    vindex_ = simde__m256i_to_private(vindex);
+  simde__m128_private
+    src_ = simde__m128_to_private(src),
+    mask_ = simde__m128_to_private(mask),
+    r_ = simde__m128_to_private(simde_mm_setzero_ps());
+  const uint8_t* addr = HEDLEY_REINTERPRET_CAST(const uint8_t*, base_addr);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(vindex_.i64) / sizeof(vindex_.i64[0])) ; i++) {
+    if ((mask_.i32[i] >> 31) & 1) {
+      const uint8_t* src1 = addr + (HEDLEY_STATIC_CAST(size_t , vindex_.i64[i]) * HEDLEY_STATIC_CAST(size_t , scale));
+      simde_float32 dst;
+      simde_memcpy(&dst, src1, sizeof(dst));
+      r_.f32[i] = dst;
+    }
+    else {
+      r_.f32[i] = src_.f32[i];
+    }
+  }
+
+  return simde__m128_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #define simde_mm256_mask_i64gather_ps(src, base_addr, vindex, mask, scale) _mm256_mask_i64gather_ps(src, SIMDE_CHECKED_REINTERPRET_CAST(float const*, simde_float32 const*, base_addr), vindex, mask, scale)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_mask_i64gather_ps
+  #define _mm256_mask_i64gather_ps(src, base_addr, vindex, mask, scale) simde_mm256_mask_i64gather_ps(src, SIMDE_CHECKED_REINTERPRET_CAST(simde_float32 const*, float const*, base_addr), vindex, mask, scale)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_i32gather_pd(const simde_float64* base_addr, simde__m128i vindex, const int32_t scale)
+    SIMDE_REQUIRE_CONSTANT(scale)
+    HEDLEY_REQUIRE_MSG((scale && scale <= 8 && !(scale & (scale - 1))), "`scale' must be a power of two less than or equal to 8") {
+  simde__m128i_private
+    vindex_ = simde__m128i_to_private(vindex);
+  simde__m128d_private
+    r_;
+  const uint8_t* addr = HEDLEY_REINTERPRET_CAST(const uint8_t*, base_addr);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+    const uint8_t* src = addr + (HEDLEY_STATIC_CAST(size_t , vindex_.i32[i]) * HEDLEY_STATIC_CAST(size_t , scale));
+    simde_float64 dst;
+    simde_memcpy(&dst, src, sizeof(dst));
+    r_.f64[i] = dst;
+  }
+
+  return simde__m128d_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #define simde_mm_i32gather_pd(base_addr, vindex, scale) _mm_i32gather_pd(HEDLEY_REINTERPRET_CAST(simde_float64 const*, base_addr), vindex, scale)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_i32gather_pd
+  #define _mm_i32gather_pd(base_addr, vindex, scale) simde_mm_i32gather_pd(HEDLEY_REINTERPRET_CAST(simde_float64 const*, base_addr), vindex, scale)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_mask_i32gather_pd(simde__m128d src, const simde_float64* base_addr, simde__m128i vindex, simde__m128d mask, const int32_t scale)
+    SIMDE_REQUIRE_CONSTANT(scale)
+    HEDLEY_REQUIRE_MSG((scale && scale <= 8 && !(scale & (scale - 1))), "`scale' must be a power of two less than or equal to 8") {
+  simde__m128i_private
+    vindex_ = simde__m128i_to_private(vindex);
+  simde__m128d_private
+    src_ = simde__m128d_to_private(src),
+    mask_ = simde__m128d_to_private(mask),
+    r_;
+  const uint8_t* addr = HEDLEY_REINTERPRET_CAST(const uint8_t*, base_addr);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+    if ((mask_.i64[i] >> 63) & 1) {
+      const uint8_t* src1 = addr + (HEDLEY_STATIC_CAST(size_t , vindex_.i32[i]) * HEDLEY_STATIC_CAST(size_t , scale));
+      simde_float64 dst;
+      simde_memcpy(&dst, src1, sizeof(dst));
+      r_.f64[i] = dst;
+    }
+    else {
+      r_.f64[i] = src_.f64[i];
+    }
+  }
+
+  return simde__m128d_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #define simde_mm_mask_i32gather_pd(src, base_addr, vindex, mask, scale) _mm_mask_i32gather_pd(src, HEDLEY_REINTERPRET_CAST(simde_float64 const*, base_addr), vindex, mask, scale)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_mask_i32gather_pd
+  #define _mm_mask_i32gather_pd(src, base_addr, vindex, mask, scale) simde_mm_mask_i32gather_pd(src, HEDLEY_REINTERPRET_CAST(simde_float64 const*, base_addr), vindex, mask, scale)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_i32gather_pd(const simde_float64* base_addr, simde__m128i vindex, const int32_t scale)
+    SIMDE_REQUIRE_CONSTANT(scale)
+    HEDLEY_REQUIRE_MSG((scale && scale <= 8 && !(scale & (scale - 1))), "`scale' must be a power of two less than or equal to 8") {
+  simde__m128i_private
+    vindex_ = simde__m128i_to_private(vindex);
+  simde__m256d_private
+    r_;
+  const uint8_t* addr = HEDLEY_REINTERPRET_CAST(const uint8_t*, base_addr);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(vindex_.i32) / sizeof(vindex_.i32[0])) ; i++) {
+    const uint8_t* src = addr + (HEDLEY_STATIC_CAST(size_t , vindex_.i32[i]) * HEDLEY_STATIC_CAST(size_t , scale));
+    simde_float64 dst;
+    simde_memcpy(&dst, src, sizeof(dst));
+    r_.f64[i] = dst;
+  }
+
+  return simde__m256d_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #define simde_mm256_i32gather_pd(base_addr, vindex, scale) _mm256_i32gather_pd(HEDLEY_REINTERPRET_CAST(simde_float64 const*, base_addr), vindex, scale)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_i32gather_pd
+  #define _mm256_i32gather_pd(base_addr, vindex, scale) simde_mm256_i32gather_pd(HEDLEY_REINTERPRET_CAST(simde_float64 const*, base_addr), vindex, scale)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_mask_i32gather_pd(simde__m256d src, const simde_float64* base_addr, simde__m128i vindex, simde__m256d mask, const int32_t scale)
+    SIMDE_REQUIRE_CONSTANT(scale)
+    HEDLEY_REQUIRE_MSG((scale && scale <= 8 && !(scale & (scale - 1))), "`scale' must be a power of two less than or equal to 8") {
+  simde__m256d_private
+    src_ = simde__m256d_to_private(src),
+    mask_ = simde__m256d_to_private(mask),
+    r_;
+  simde__m128i_private
+    vindex_ = simde__m128i_to_private(vindex);
+  const uint8_t* addr = HEDLEY_REINTERPRET_CAST(const uint8_t*, base_addr);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(vindex_.i32) / sizeof(vindex_.i32[0])) ; i++) {
+    if ((mask_.i64[i] >> 63) & 1) {
+      const uint8_t* src1 = addr + (HEDLEY_STATIC_CAST(size_t , vindex_.i32[i]) * HEDLEY_STATIC_CAST(size_t , scale));
+      simde_float64 dst;
+      simde_memcpy(&dst, src1, sizeof(dst));
+      r_.f64[i] = dst;
+    }
+    else {
+      r_.f64[i] = src_.f64[i];
+    }
+  }
+
+  return simde__m256d_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #define simde_mm256_mask_i32gather_pd(src, base_addr, vindex, mask, scale) _mm256_mask_i32gather_pd(src, HEDLEY_REINTERPRET_CAST(simde_float64 const*, base_addr), vindex, mask, scale)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_mask_i32gather_pd
+  #define _mm256_mask_i32gather_pd(src, base_addr, vindex, mask, scale) simde_mm256_mask_i32gather_pd(src, HEDLEY_REINTERPRET_CAST(simde_float64 const*, base_addr), vindex, mask, scale)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_i64gather_pd(const simde_float64* base_addr, simde__m128i vindex, const int32_t scale)
+    SIMDE_REQUIRE_CONSTANT(scale)
+    HEDLEY_REQUIRE_MSG((scale && scale <= 8 && !(scale & (scale - 1))), "`scale' must be a power of two less than or equal to 8") {
+  simde__m128i_private
+    vindex_ = simde__m128i_to_private(vindex);
+  simde__m128d_private
+    r_ = simde__m128d_to_private(simde_mm_setzero_pd());
+  const uint8_t* addr = HEDLEY_REINTERPRET_CAST(const uint8_t*, base_addr);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(vindex_.i64) / sizeof(vindex_.i64[0])) ; i++) {
+    const uint8_t* src = addr + (HEDLEY_STATIC_CAST(size_t , vindex_.i64[i]) * HEDLEY_STATIC_CAST(size_t , scale));
+    simde_float64 dst;
+    simde_memcpy(&dst, src, sizeof(dst));
+    r_.f64[i] = dst;
+  }
+
+  return simde__m128d_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #define simde_mm_i64gather_pd(base_addr, vindex, scale) _mm_i64gather_pd(HEDLEY_REINTERPRET_CAST(simde_float64 const*, base_addr), vindex, scale)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_i64gather_pd
+  #define _mm_i64gather_pd(base_addr, vindex, scale) simde_mm_i64gather_pd(HEDLEY_REINTERPRET_CAST(simde_float64 const*, base_addr), vindex, scale)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_mask_i64gather_pd(simde__m128d src, const simde_float64* base_addr, simde__m128i vindex, simde__m128d mask, const int32_t scale)
+    SIMDE_REQUIRE_CONSTANT(scale)
+    HEDLEY_REQUIRE_MSG((scale && scale <= 8 && !(scale & (scale - 1))), "`scale' must be a power of two less than or equal to 8") {
+  simde__m128i_private
+    vindex_ = simde__m128i_to_private(vindex);
+  simde__m128d_private
+    src_ = simde__m128d_to_private(src),
+    mask_ = simde__m128d_to_private(mask),
+    r_ = simde__m128d_to_private(simde_mm_setzero_pd());
+  const uint8_t* addr = HEDLEY_REINTERPRET_CAST(const uint8_t*, base_addr);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(vindex_.i64) / sizeof(vindex_.i64[0])) ; i++) {
+    if ((mask_.i64[i] >> 63) & 1) {
+      const uint8_t* src1 = addr + (HEDLEY_STATIC_CAST(size_t , vindex_.i64[i]) * HEDLEY_STATIC_CAST(size_t , scale));
+      simde_float64 dst;
+      simde_memcpy(&dst, src1, sizeof(dst));
+      r_.f64[i] = dst;
+    }
+    else {
+      r_.f64[i] = src_.f64[i];
+    }
+  }
+
+  return simde__m128d_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #define simde_mm_mask_i64gather_pd(src, base_addr, vindex, mask, scale) _mm_mask_i64gather_pd(src, HEDLEY_REINTERPRET_CAST(simde_float64 const*, base_addr), vindex, mask, scale)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_mask_i64gather_pd
+  #define _mm_mask_i64gather_pd(src, base_addr, vindex, mask, scale) simde_mm_mask_i64gather_pd(src, HEDLEY_REINTERPRET_CAST(simde_float64 const*, base_addr), vindex, mask, scale)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_i64gather_pd(const simde_float64* base_addr, simde__m256i vindex, const int32_t scale)
+    SIMDE_REQUIRE_CONSTANT(scale)
+    HEDLEY_REQUIRE_MSG((scale && scale <= 8 && !(scale & (scale - 1))), "`scale' must be a power of two less than or equal to 8") {
+  simde__m256i_private
+    vindex_ = simde__m256i_to_private(vindex);
+  simde__m256d_private
+    r_ = simde__m256d_to_private(simde_mm256_setzero_pd());
+  const uint8_t* addr = HEDLEY_REINTERPRET_CAST(const uint8_t*, base_addr);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(vindex_.i64) / sizeof(vindex_.i64[0])) ; i++) {
+    const uint8_t* src = addr + (HEDLEY_STATIC_CAST(size_t , vindex_.i64[i]) * HEDLEY_STATIC_CAST(size_t , scale));
+    simde_float64 dst;
+    simde_memcpy(&dst, src, sizeof(dst));
+    r_.f64[i] = dst;
+  }
+
+  return simde__m256d_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #define simde_mm256_i64gather_pd(base_addr, vindex, scale) _mm256_i64gather_pd(HEDLEY_REINTERPRET_CAST(simde_float64 const*, base_addr), vindex, scale)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_i64gather_pd
+  #define _mm256_i64gather_pd(base_addr, vindex, scale) simde_mm256_i64gather_pd(HEDLEY_REINTERPRET_CAST(simde_float64 const*, base_addr), vindex, scale)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_mask_i64gather_pd(simde__m256d src, const simde_float64* base_addr, simde__m256i vindex, simde__m256d mask, const int32_t scale)
+    SIMDE_REQUIRE_CONSTANT(scale)
+    HEDLEY_REQUIRE_MSG((scale && scale <= 8 && !(scale & (scale - 1))), "`scale' must be a power of two less than or equal to 8") {
+  simde__m256i_private
+    vindex_ = simde__m256i_to_private(vindex);
+  simde__m256d_private
+    src_ = simde__m256d_to_private(src),
+    mask_ = simde__m256d_to_private(mask),
+    r_ = simde__m256d_to_private(simde_mm256_setzero_pd());
+  const uint8_t* addr = HEDLEY_REINTERPRET_CAST(const uint8_t*, base_addr);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(vindex_.i64) / sizeof(vindex_.i64[0])) ; i++) {
+    if ((mask_.i64[i] >> 63) & 1) {
+      const uint8_t* src1 = addr + (HEDLEY_STATIC_CAST(size_t , vindex_.i64[i]) * HEDLEY_STATIC_CAST(size_t , scale));
+      simde_float64 dst;
+      simde_memcpy(&dst, src1, sizeof(dst));
+      r_.f64[i] = dst;
+    }
+    else {
+      r_.f64[i] = src_.f64[i];
+    }
+  }
+
+  return simde__m256d_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #define simde_mm256_mask_i64gather_pd(src, base_addr, vindex, mask, scale) _mm256_mask_i64gather_pd(src, HEDLEY_REINTERPRET_CAST(simde_float64 const*, base_addr), vindex, mask, scale)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_mask_i64gather_pd
+  #define _mm256_mask_i64gather_pd(src, base_addr, vindex, mask, scale) simde_mm256_mask_i64gather_pd(src, HEDLEY_REINTERPRET_CAST(simde_float64 const*, base_addr), vindex, mask, scale)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_inserti128_si256(simde__m256i a, simde__m128i b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 1) {
+  simde__m256i_private a_ = simde__m256i_to_private(a);
+  simde__m128i_private b_ = simde__m128i_to_private(b);
+
+  a_.m128i_private[ imm8 & 1 ] = b_;
+
+  return simde__m256i_from_private(a_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #define simde_mm256_inserti128_si256(a, b, imm8) _mm256_inserti128_si256(a, b, imm8)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_inserti128_si256
+  #define _mm256_inserti128_si256(a, b, imm8) simde_mm256_inserti128_si256(a, b, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_madd_epi16 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_madd_epi16(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_madd_epi16(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_madd_epi16(a_.m128i[1], b_.m128i[1]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_CONVERT_VECTOR_) && HEDLEY_HAS_BUILTIN(__builtin_shufflevector)
+      SIMDE_ALIGN_TO_32 int32_t product SIMDE_VECTOR(64);
+      SIMDE_ALIGN_TO_32 int32_t a32x16 SIMDE_VECTOR(64);
+      SIMDE_ALIGN_TO_32 int32_t b32x16 SIMDE_VECTOR(64);
+      SIMDE_ALIGN_TO_32 int32_t even SIMDE_VECTOR(32);
+      SIMDE_ALIGN_TO_32 int32_t odd SIMDE_VECTOR(32);
+
+      SIMDE_CONVERT_VECTOR_(a32x16, a_.i16);
+      SIMDE_CONVERT_VECTOR_(b32x16, b_.i16);
+      product = a32x16 * b32x16;
+
+      even = __builtin_shufflevector(product, product, 0, 2, 4, 6, 8, 10, 12, 14);
+      odd  = __builtin_shufflevector(product, product, 1, 3, 5, 7, 9, 11, 13, 15);
+
+      r_.i32 = even + odd;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_) / sizeof(r_.i16[0])) ; i += 2) {
+        r_.i32[i / 2] = (a_.i16[i] * b_.i16[i]) + (a_.i16[i + 1] * b_.i16[i + 1]);
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_madd_epi16
+  #define _mm256_madd_epi16(a, b) simde_mm256_madd_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_maddubs_epi16 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_maddubs_epi16(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_maddubs_epi16(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_maddubs_epi16(a_.m128i[1], b_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        const int idx = HEDLEY_STATIC_CAST(int, i) << 1;
+        int32_t ts =
+          (HEDLEY_STATIC_CAST(int16_t, a_.u8[  idx  ]) * HEDLEY_STATIC_CAST(int16_t, b_.i8[  idx  ])) +
+          (HEDLEY_STATIC_CAST(int16_t, a_.u8[idx + 1]) * HEDLEY_STATIC_CAST(int16_t, b_.i8[idx + 1]));
+        r_.i16[i] = (ts > INT16_MIN) ? ((ts < INT16_MAX) ? HEDLEY_STATIC_CAST(int16_t, ts) : INT16_MAX) : INT16_MIN;
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_maddubs_epi16
+  #define _mm256_maddubs_epi16(a, b) simde_mm256_maddubs_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_maskload_epi32 (const int32_t mem_addr[HEDLEY_ARRAY_PARAM(4)], simde__m128i mask) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm_maskload_epi32(mem_addr, mask);
+  #else
+    simde__m128i_private
+      r_,
+      mask_ = simde__m128i_to_private(mask),
+      mask_shr_;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      mask_shr_.neon_i32 = vshrq_n_s32(mask_.neon_i32, 31);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        mask_shr_.i32[i] = mask_.i32[i] >> 31;
+      }
+    #endif
+
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = mask_shr_.i32[i] ? mem_addr[i] : INT32_C(0);
+      }
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_maskload_epi32
+  #define _mm_maskload_epi32(mem_addr, mask) simde_mm_maskload_epi32(HEDLEY_REINTERPRET_CAST(int32_t const*, mem_addr), mask)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_maskload_epi32 (const int32_t mem_addr[HEDLEY_ARRAY_PARAM(4)], simde__m256i mask) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_maskload_epi32(mem_addr, mask);
+  #else
+    simde__m256i_private
+      mask_ = simde__m256i_to_private(mask),
+      r_;
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+      r_.i32[i] = (mask_.i32[i] >> 31) ? mem_addr[i] : INT32_C(0);
+    }
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_maskload_epi32
+  #define _mm256_maskload_epi32(mem_addr, mask) simde_mm256_maskload_epi32(HEDLEY_REINTERPRET_CAST(int32_t const*, mem_addr), mask)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_maskload_epi64 (const int64_t mem_addr[HEDLEY_ARRAY_PARAM(2)], simde__m128i mask) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm_maskload_epi64(HEDLEY_REINTERPRET_CAST(const long long *, mem_addr), mask);
+  #else
+    simde__m128i_private
+      r_,
+      mask_ = simde__m128i_to_private(mask),
+      mask_shr_;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      mask_shr_.neon_i64 = vshrq_n_s64(mask_.neon_i64, 63);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(mask_.i64) / sizeof(mask_.i64[0])) ; i++) {
+        mask_shr_.i64[i] = mask_.i64[i] >> 63;
+      }
+    #endif
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+      r_.i64[i] = mask_shr_.i64[i] ? mem_addr[i] : INT64_C(0);
+    }
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_maskload_epi64
+  #define _mm_maskload_epi64(mem_addr, mask) simde_mm_maskload_epi64(HEDLEY_REINTERPRET_CAST(int64_t const*, mem_addr), mask)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_maskload_epi64 (const int64_t mem_addr[HEDLEY_ARRAY_PARAM(4)], simde__m256i mask) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_maskload_epi64(HEDLEY_REINTERPRET_CAST(const long long *, mem_addr), mask);
+  #else
+    simde__m256i_private
+      mask_ = simde__m256i_to_private(mask),
+      r_;
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+      r_.i64[i] = (mask_.i64[i] >> 63) ? mem_addr[i] : INT64_C(0);
+    }
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_maskload_epi64
+  #define _mm256_maskload_epi64(mem_addr, mask) simde_mm256_maskload_epi64(HEDLEY_REINTERPRET_CAST(int64_t const*, mem_addr), mask)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_maskstore_epi32 (int32_t mem_addr[HEDLEY_ARRAY_PARAM(4)], simde__m128i mask, simde__m128i a) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    _mm_maskstore_epi32(mem_addr, mask, a);
+  #else
+    simde__m128i_private mask_ = simde__m128i_to_private(mask);
+    simde__m128i_private a_ = simde__m128i_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(a_.i32) / sizeof(a_.i32[0])) ; i++) {
+      if (mask_.u32[i] & (UINT32_C(1) << 31))
+        mem_addr[i] = a_.i32[i];
+    }
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_maskstore_epi32
+  #define _mm_maskstore_epi32(mem_addr, mask, a) simde_mm_maskstore_epi32(HEDLEY_REINTERPRET_CAST(int32_t *, mem_addr), mask, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm256_maskstore_epi32 (int32_t mem_addr[HEDLEY_ARRAY_PARAM(8)], simde__m256i mask, simde__m256i a) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    _mm256_maskstore_epi32(mem_addr, mask, a);
+  #else
+    simde__m256i_private mask_ = simde__m256i_to_private(mask);
+    simde__m256i_private a_ = simde__m256i_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(a_.i32) / sizeof(a_.i32[0])) ; i++) {
+      if (mask_.u32[i] & (UINT32_C(1) << 31))
+        mem_addr[i] = a_.i32[i];
+    }
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_maskstore_epi32
+  #define _mm256_maskstore_epi32(mem_addr, mask, a) simde_mm256_maskstore_epi32(HEDLEY_REINTERPRET_CAST(int32_t *, mem_addr), mask, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_maskstore_epi64 (int64_t mem_addr[HEDLEY_ARRAY_PARAM(2)], simde__m128i mask, simde__m128i a) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    _mm_maskstore_epi64(HEDLEY_REINTERPRET_CAST(long long *, mem_addr), mask, a);
+  #else
+    simde__m128i_private mask_ = simde__m128i_to_private(mask);
+    simde__m128i_private a_ = simde__m128i_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(a_.i64) / sizeof(a_.i64[0])) ; i++) {
+      if (mask_.u64[i] >> 63)
+        mem_addr[i] = a_.i64[i];
+    }
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_maskstore_epi64
+  #define _mm_maskstore_epi64(mem_addr, mask, a) simde_mm_maskstore_epi64(HEDLEY_REINTERPRET_CAST(int64_t *, mem_addr), mask, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm256_maskstore_epi64 (int64_t mem_addr[HEDLEY_ARRAY_PARAM(4)], simde__m256i mask, simde__m256i a) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    _mm256_maskstore_epi64(HEDLEY_REINTERPRET_CAST(long long *, mem_addr), mask, a);
+  #else
+    simde__m256i_private mask_ = simde__m256i_to_private(mask);
+    simde__m256i_private a_ = simde__m256i_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(a_.i64) / sizeof(a_.i64[0])) ; i++) {
+      if (mask_.u64[i] & (UINT64_C(1) << 63))
+        mem_addr[i] = a_.i64[i];
+    }
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_maskstore_epi64
+  #define _mm256_maskstore_epi64(mem_addr, mask, a) simde_mm256_maskstore_epi64(HEDLEY_REINTERPRET_CAST(int64_t *, mem_addr), mask, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_max_epi8 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE) && !defined(__PGI)
+    return _mm256_max_epi8(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_max_epi8(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_max_epi8(a_.m128i[1], b_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = a_.i8[i] > b_.i8[i] ? a_.i8[i] : b_.i8[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_max_epi8
+  #define _mm256_max_epi8(a, b) simde_mm256_max_epi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_max_epu8 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_max_epu8(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_max_epu8(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_max_epu8(a_.m128i[1], b_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+        r_.u8[i] = (a_.u8[i] > b_.u8[i]) ? a_.u8[i] : b_.u8[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_max_epu8
+  #define _mm256_max_epu8(a, b) simde_mm256_max_epu8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_max_epu16 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_max_epu16(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_max_epu16(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_max_epu16(a_.m128i[1], b_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+        r_.u16[i] = (a_.u16[i] > b_.u16[i]) ? a_.u16[i] : b_.u16[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_max_epu16
+  #define _mm256_max_epu16(a, b) simde_mm256_max_epu16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_max_epu32 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_max_epu32(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_max_epu32(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_max_epu32(a_.m128i[1], b_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+        r_.u32[i] = (a_.u32[i] > b_.u32[i]) ? a_.u32[i] : b_.u32[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_max_epu32
+  #define _mm256_max_epu32(a, b) simde_mm256_max_epu32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_max_epi16 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_max_epi16(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_max_epi16(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_max_epi16(a_.m128i[1], b_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = (a_.i16[i] > b_.i16[i]) ? a_.i16[i] : b_.i16[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_max_epi16
+  #define _mm256_max_epi16(a, b) simde_mm256_max_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_max_epi32 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_max_epi32(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_max_epi32(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_max_epi32(a_.m128i[1], b_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = a_.i32[i] > b_.i32[i] ? a_.i32[i] : b_.i32[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_max_epi32
+  #define _mm256_max_epi32(a, b) simde_mm256_max_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_min_epi8 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE) && !defined(__PGI)
+    return _mm256_min_epi8(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_min_epi8(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_min_epi8(a_.m128i[1], b_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = a_.i8[i] < b_.i8[i] ? a_.i8[i] : b_.i8[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_min_epi8
+  #define _mm256_min_epi8(a, b) simde_mm256_min_epi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_min_epi16 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_min_epi16(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_min_epi16(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_min_epi16(a_.m128i[1], b_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = (a_.i16[i] < b_.i16[i]) ? a_.i16[i] : b_.i16[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_min_epi16
+  #define _mm256_min_epi16(a, b) simde_mm256_min_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_min_epi32 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_min_epi32(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_min_epi32(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_min_epi32(a_.m128i[1], b_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = a_.i32[i] < b_.i32[i] ? a_.i32[i] : b_.i32[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_min_epi32
+  #define _mm256_min_epi32(a, b) simde_mm256_min_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_min_epu8 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_min_epu8(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_min_epu8(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_min_epu8(a_.m128i[1], b_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+        r_.u8[i] = (a_.u8[i] < b_.u8[i]) ? a_.u8[i] : b_.u8[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_min_epu8
+  #define _mm256_min_epu8(a, b) simde_mm256_min_epu8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_min_epu16 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_min_epu16(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_min_epu16(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_min_epu16(a_.m128i[1], b_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+        r_.u16[i] = (a_.u16[i] < b_.u16[i]) ? a_.u16[i] : b_.u16[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_min_epu16
+  #define _mm256_min_epu16(a, b) simde_mm256_min_epu16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_min_epu32 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_min_epu32(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_min_epu32(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_min_epu32(a_.m128i[1], b_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+        r_.u32[i] = (a_.u32[i] < b_.u32[i]) ? a_.u32[i] : b_.u32[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_min_epu32
+  #define _mm256_min_epu32(a, b) simde_mm256_min_epu32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int32_t
+simde_mm256_movemask_epi8 (simde__m256i a) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_movemask_epi8(a);
+  #else
+    simde__m256i_private a_ = simde__m256i_to_private(a);
+    uint32_t r = 0;
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(a_.m128i) / sizeof(a_.m128i[0])) ; i++) {
+        r |= HEDLEY_STATIC_CAST(uint32_t,simde_mm_movemask_epi8(a_.m128i[i])) << (16 * i);
+      }
+    #else
+      r = 0;
+      SIMDE_VECTORIZE_REDUCTION(|:r)
+      for (size_t i = 0 ; i < (sizeof(a_.u8) / sizeof(a_.u8[0])) ; i++) {
+        r |= HEDLEY_STATIC_CAST(uint32_t, (a_.u8[31 - i] >> 7)) << (31 - i);
+      }
+    #endif
+
+    return HEDLEY_STATIC_CAST(int32_t, r);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_movemask_epi8
+  #define _mm256_movemask_epi8(a) simde_mm256_movemask_epi8(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_mpsadbw_epu8 (simde__m256i a, simde__m256i b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255)  {
+  simde__m256i_private
+    r_,
+    a_ = simde__m256i_to_private(a),
+    b_ = simde__m256i_to_private(b);
+
+  const int a_offset1 = imm8 & 4;
+  const int b_offset1 = (imm8 & 3) << 2;
+  const int a_offset2 = (imm8 >> 3) & 4;
+  const int b_offset2 = ((imm8 >> 3) & 3) << 2;
+
+  #if defined(simde_math_abs)
+    const int halfway_point = HEDLEY_STATIC_CAST(int, (sizeof(r_.u16) / sizeof(r_.u16[0])) ) / 2;
+    for (int i = 0 ; i < halfway_point ; i++) {
+      r_.u16[i] =
+        HEDLEY_STATIC_CAST(uint16_t, simde_math_abs(HEDLEY_STATIC_CAST(int, a_.u8[a_offset1 + i + 0] - b_.u8[b_offset1 + 0]))) +
+        HEDLEY_STATIC_CAST(uint16_t, simde_math_abs(HEDLEY_STATIC_CAST(int, a_.u8[a_offset1 + i + 1] - b_.u8[b_offset1 + 1]))) +
+        HEDLEY_STATIC_CAST(uint16_t, simde_math_abs(HEDLEY_STATIC_CAST(int, a_.u8[a_offset1 + i + 2] - b_.u8[b_offset1 + 2]))) +
+        HEDLEY_STATIC_CAST(uint16_t, simde_math_abs(HEDLEY_STATIC_CAST(int, a_.u8[a_offset1 + i + 3] - b_.u8[b_offset1 + 3])));
+      r_.u16[halfway_point + i] =
+        HEDLEY_STATIC_CAST(uint16_t, simde_math_abs(HEDLEY_STATIC_CAST(int, a_.u8[2 * halfway_point + a_offset2 + i + 0] - b_.u8[2 * halfway_point + b_offset2 + 0]))) +
+        HEDLEY_STATIC_CAST(uint16_t, simde_math_abs(HEDLEY_STATIC_CAST(int, a_.u8[2 * halfway_point + a_offset2 + i + 1] - b_.u8[2 * halfway_point + b_offset2 + 1]))) +
+        HEDLEY_STATIC_CAST(uint16_t, simde_math_abs(HEDLEY_STATIC_CAST(int, a_.u8[2 * halfway_point + a_offset2 + i + 2] - b_.u8[2 * halfway_point + b_offset2 + 2]))) +
+        HEDLEY_STATIC_CAST(uint16_t, simde_math_abs(HEDLEY_STATIC_CAST(int, a_.u8[2 * halfway_point + a_offset2 + i + 3] - b_.u8[2 * halfway_point + b_offset2 + 3])));
+    }
+  #else
+    HEDLEY_UNREACHABLE();
+  #endif
+
+  return simde__m256i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE) && SIMDE_DETECT_CLANG_VERSION_CHECK(3,9,0)
+  #define simde_mm256_mpsadbw_epu8(a, b, imm8) _mm256_mpsadbw_epu8(a, b, imm8)
+#elif SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+  #define simde_mm256_mpsadbw_epu8(a, b, imm8) \
+     simde_mm256_set_m128i( \
+       simde_mm_mpsadbw_epu8(simde_mm256_extracti128_si256(a, 1), simde_mm256_extracti128_si256(b, 1), (imm8 >> 3)), \
+       simde_mm_mpsadbw_epu8(simde_mm256_extracti128_si256(a, 0), simde_mm256_extracti128_si256(b, 0), (imm8)))
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_mpsadbw_epu8
+  #define _mm256_mpsadbw_epu8(a, b, imm8) simde_mm256_mpsadbw_epu8(a, b, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_mul_epi32 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_mul_epi32(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_mul_epi32(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_mul_epi32(a_.m128i[1], b_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] =
+          HEDLEY_STATIC_CAST(int64_t, a_.i32[i * 2]) *
+          HEDLEY_STATIC_CAST(int64_t, b_.i32[i * 2]);
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+#  define _mm256_mul_epi32(a, b) simde_mm256_mul_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_mul_epu32 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_mul_epu32(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_mul_epu32(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_mul_epu32(a_.m128i[1], b_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
+        r_.u64[i] = HEDLEY_STATIC_CAST(uint64_t, a_.u32[i * 2]) * HEDLEY_STATIC_CAST(uint64_t, b_.u32[i * 2]);
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+#  define _mm256_mul_epu32(a, b) simde_mm256_mul_epu32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_mulhi_epi16 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_mulhi_epi16(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+      r_.u16[i] = HEDLEY_STATIC_CAST(uint16_t, (HEDLEY_STATIC_CAST(uint32_t, HEDLEY_STATIC_CAST(int32_t, a_.i16[i]) * HEDLEY_STATIC_CAST(int32_t, b_.i16[i])) >> 16));
+    }
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+#  define _mm256_mulhi_epi16(a, b) simde_mm256_mulhi_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_mulhi_epu16 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_mulhi_epu16(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+      r_.u16[i] = HEDLEY_STATIC_CAST(uint16_t, HEDLEY_STATIC_CAST(uint32_t, a_.u16[i]) * HEDLEY_STATIC_CAST(uint32_t, b_.u16[i]) >> 16);
+    }
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+#  define _mm256_mulhi_epu16(a, b) simde_mm256_mulhi_epu16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_mulhrs_epi16 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_mulhrs_epi16(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+      r_.i16[i] = HEDLEY_STATIC_CAST(int16_t, (((HEDLEY_STATIC_CAST(int32_t, a_.i16[i]) * HEDLEY_STATIC_CAST(int32_t, b_.i16[i])) + 0x4000) >> 15));
+    }
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+#  define _mm256_mulhrs_epi16(a, b) simde_mm256_mulhrs_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_mullo_epi16 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_mullo_epi16(a, b);
+  #else
+    simde__m256i_private
+    a_ = simde__m256i_to_private(a),
+    b_ = simde__m256i_to_private(b),
+    r_;
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+      r_.i16[i] = HEDLEY_STATIC_CAST(int16_t, a_.i16[i] * b_.i16[i]);
+    }
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_mullo_epi16
+  #define _mm256_mullo_epi16(a, b) simde_mm256_mullo_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_mullo_epi32 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_mullo_epi32(a, b);
+  #else
+    simde__m256i_private
+    a_ = simde__m256i_to_private(a),
+    b_ = simde__m256i_to_private(b),
+    r_;
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+      r_.i32[i] = HEDLEY_STATIC_CAST(int32_t, a_.i32[i] * b_.i32[i]);
+    }
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_mullo_epi32
+  #define _mm256_mullo_epi32(a, b) simde_mm256_mullo_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_x_mm256_mullo_epu32 (simde__m256i a, simde__m256i b) {
+  simde__m256i_private
+    r_,
+    a_ = simde__m256i_to_private(a),
+    b_ = simde__m256i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u32 = a_.u32 * b_.u32;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+        r_.u32[i] = a_.u32[i] * b_.u32[i];
+      }
+    #endif
+
+  return simde__m256i_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_or_si256 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_or_si256(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_or_si128(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_or_si128(a_.m128i[1], b_.m128i[1]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32f = a_.i32f | b_.i32f;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) {
+        r_.i32f[i] = a_.i32f[i] | b_.i32f[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_or_si256
+  #define _mm256_or_si256(a, b) simde_mm256_or_si256(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_packs_epi16 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_packs_epi16(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_packs_epi16(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_packs_epi16(a_.m128i[1], b_.m128i[1]);
+    #else
+      const size_t halfway_point = (sizeof(r_.i8) / sizeof(r_.i8[0]))/2;
+      const size_t quarter_point = (sizeof(r_.i8) / sizeof(r_.i8[0]))/4;
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < quarter_point ; i++) {
+        r_.i8[i]     = (a_.i16[i] > INT8_MAX) ? INT8_MAX : ((a_.i16[i] < INT8_MIN) ? INT8_MIN : HEDLEY_STATIC_CAST(int8_t, a_.i16[i]));
+        r_.i8[i + quarter_point] = (b_.i16[i] > INT8_MAX) ? INT8_MAX : ((b_.i16[i] < INT8_MIN) ? INT8_MIN : HEDLEY_STATIC_CAST(int8_t, b_.i16[i]));
+        r_.i8[halfway_point + i]     = (a_.i16[quarter_point + i] > INT8_MAX) ? INT8_MAX : ((a_.i16[quarter_point + i] < INT8_MIN) ? INT8_MIN : HEDLEY_STATIC_CAST(int8_t, a_.i16[quarter_point + i]));
+        r_.i8[halfway_point + i + quarter_point] = (b_.i16[quarter_point + i] > INT8_MAX) ? INT8_MAX : ((b_.i16[quarter_point + i] < INT8_MIN) ? INT8_MIN : HEDLEY_STATIC_CAST(int8_t, b_.i16[quarter_point + i]));
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_packs_epi16
+  #define _mm256_packs_epi16(a, b) simde_mm256_packs_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_packs_epi32 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_packs_epi32(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      v_[] = {
+        simde__m256i_to_private(a),
+        simde__m256i_to_private(b)
+      };
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_packs_epi32(v_[0].m128i[0], v_[1].m128i[0]);
+      r_.m128i[1] = simde_mm_packs_epi32(v_[0].m128i[1], v_[1].m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        const int32_t v = v_[(i >> 2) & 1].i32[(i & 11) - ((i & 8) >> 1)];
+        r_.i16[i] = HEDLEY_STATIC_CAST(int16_t, (v > INT16_MAX) ? INT16_MAX : ((v < INT16_MIN) ? INT16_MIN : v));
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_packs_epi32
+  #define _mm256_packs_epi32(a, b) simde_mm256_packs_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_packus_epi16 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_packus_epi16(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_packus_epi16(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_packus_epi16(a_.m128i[1], b_.m128i[1]);
+    #else
+      const size_t halfway_point = (sizeof(r_.i8) / sizeof(r_.i8[0])) / 2;
+      const size_t quarter_point = (sizeof(r_.i8) / sizeof(r_.i8[0])) / 4;
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < quarter_point ; i++) {
+        r_.u8[i] = (a_.i16[i] > UINT8_MAX) ? UINT8_MAX : ((a_.i16[i] < 0) ? UINT8_C(0) : HEDLEY_STATIC_CAST(uint8_t, a_.i16[i]));
+        r_.u8[i + quarter_point] = (b_.i16[i] > UINT8_MAX) ? UINT8_MAX : ((b_.i16[i] < 0) ? UINT8_C(0) : HEDLEY_STATIC_CAST(uint8_t, b_.i16[i]));
+        r_.u8[halfway_point + i] = (a_.i16[quarter_point + i] > UINT8_MAX) ? UINT8_MAX : ((a_.i16[quarter_point + i] < 0) ? UINT8_C(0) : HEDLEY_STATIC_CAST(uint8_t, a_.i16[quarter_point + i]));
+        r_.u8[halfway_point + i + quarter_point] = (b_.i16[quarter_point + i] > UINT8_MAX) ? UINT8_MAX : ((b_.i16[quarter_point + i] < 0) ? UINT8_C(0) : HEDLEY_STATIC_CAST(uint8_t, b_.i16[quarter_point + i]));
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_packus_epi16
+  #define _mm256_packus_epi16(a, b) simde_mm256_packus_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_packus_epi32 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_packus_epi32(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_packus_epi32(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_packus_epi32(a_.m128i[1], b_.m128i[1]);
+    #else
+      const size_t halfway_point = (sizeof(r_.i16) / sizeof(r_.i16[0])) / 2;
+      const size_t quarter_point = (sizeof(r_.i16) / sizeof(r_.i16[0])) / 4;
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < quarter_point ; i++) {
+        r_.u16[i] = (a_.i32[i] > UINT16_MAX) ? UINT16_MAX : ((a_.i32[i] < 0) ? UINT16_C(0) : HEDLEY_STATIC_CAST(uint16_t, a_.i32[i]));
+        r_.u16[i + quarter_point] = (b_.i32[i] > UINT16_MAX) ? UINT16_MAX : ((b_.i32[i] < 0) ? UINT16_C(0) : HEDLEY_STATIC_CAST(uint16_t, b_.i32[i]));
+        r_.u16[halfway_point + i]     = (a_.i32[quarter_point + i] > UINT16_MAX) ? UINT16_MAX : ((a_.i32[quarter_point + i] < 0) ? UINT16_C(0) : HEDLEY_STATIC_CAST(uint16_t, a_.i32[quarter_point + i]));
+        r_.u16[halfway_point + i + quarter_point] = (b_.i32[quarter_point + i] > UINT16_MAX) ? UINT16_MAX : ((b_.i32[quarter_point + i] < 0) ? UINT16_C(0) : HEDLEY_STATIC_CAST(uint16_t, b_.i32[quarter_point + i]));
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_packus_epi32
+  #define _mm256_packus_epi32(a, b) simde_mm256_packus_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_permute2x128_si256 (simde__m256i a, simde__m256i b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) {
+  simde__m256i_private
+    r_,
+    a_ = simde__m256i_to_private(a),
+    b_ = simde__m256i_to_private(b);
+
+  r_.m128i_private[0] = (imm8 & 0x08) ? simde__m128i_to_private(simde_mm_setzero_si128()) : ((imm8 & 0x02) ? b_.m128i_private[(imm8     ) & 1] : a_.m128i_private[(imm8     ) & 1]);
+  r_.m128i_private[1] = (imm8 & 0x80) ? simde__m128i_to_private(simde_mm_setzero_si128()) : ((imm8 & 0x20) ? b_.m128i_private[(imm8 >> 4) & 1] : a_.m128i_private[(imm8 >> 4) & 1]);
+
+  return simde__m256i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+#  define simde_mm256_permute2x128_si256(a, b, imm8) _mm256_permute2x128_si256(a, b, imm8)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_permute2x128_si256
+  #define _mm256_permute2x128_si256(a, b, imm8) simde_mm256_permute2x128_si256(a, b, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_permute4x64_epi64 (simde__m256i a, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) {
+  simde__m256i_private
+    r_,
+    a_ = simde__m256i_to_private(a);
+
+  r_.i64[0] = (imm8 & 0x02) ? a_.i64[((imm8       ) & 1)+2] : a_.i64[(imm8       ) & 1];
+  r_.i64[1] = (imm8 & 0x08) ? a_.i64[((imm8 >> 2  ) & 1)+2] : a_.i64[(imm8 >> 2  ) & 1];
+  r_.i64[2] = (imm8 & 0x20) ? a_.i64[((imm8 >> 4  ) & 1)+2] : a_.i64[(imm8 >> 4  ) & 1];
+  r_.i64[3] = (imm8 & 0x80) ? a_.i64[((imm8 >> 6  ) & 1)+2] : a_.i64[(imm8 >> 6  ) & 1];
+
+  return simde__m256i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+#  define simde_mm256_permute4x64_epi64(a, imm8) _mm256_permute4x64_epi64(a, imm8)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_permute4x64_epi64
+  #define _mm256_permute4x64_epi64(a, imm8) simde_mm256_permute4x64_epi64(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_permute4x64_pd (simde__m256d a, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) {
+  simde__m256d_private
+    r_,
+    a_ = simde__m256d_to_private(a);
+
+  r_.f64[0] = (imm8 & 0x02) ? a_.f64[((imm8       ) & 1)+2] : a_.f64[(imm8       ) & 1];
+  r_.f64[1] = (imm8 & 0x08) ? a_.f64[((imm8 >> 2  ) & 1)+2] : a_.f64[(imm8 >> 2  ) & 1];
+  r_.f64[2] = (imm8 & 0x20) ? a_.f64[((imm8 >> 4  ) & 1)+2] : a_.f64[(imm8 >> 4  ) & 1];
+  r_.f64[3] = (imm8 & 0x80) ? a_.f64[((imm8 >> 6  ) & 1)+2] : a_.f64[(imm8 >> 6  ) & 1];
+
+  return simde__m256d_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+#  define simde_mm256_permute4x64_pd(a, imm8) _mm256_permute4x64_pd(a, imm8)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_permute4x64_pd
+  #define _mm256_permute4x64_pd(a, imm8) simde_mm256_permute4x64_pd(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_permutevar8x32_epi32 (simde__m256i a, simde__m256i idx) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_permutevar8x32_epi32(a, idx);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      idx_ = simde__m256i_to_private(idx);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+      r_.i32[i] = a_.i32[idx_.i32[i] & 7];
+    }
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_permutevar8x32_epi32
+  #define _mm256_permutevar8x32_epi32(a, idx) simde_mm256_permutevar8x32_epi32(a, idx)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_permutevar8x32_ps (simde__m256 a, simde__m256i idx) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0)
+      return _mm256_permutevar8x32_ps(a, HEDLEY_REINTERPRET_CAST(simde__m256, idx));
+    #else
+      return _mm256_permutevar8x32_ps(a, idx);
+    #endif
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+    simde__m256i_private
+      idx_ = simde__m256i_to_private(idx);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = a_.f32[idx_.i32[i] & 7];
+    }
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_permutevar8x32_ps
+  #define _mm256_permutevar8x32_ps(a, idx) simde_mm256_permutevar8x32_ps(a, idx)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_sad_epu8 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_sad_epu8(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_sad_epu8(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_sad_epu8(a_.m128i[1], b_.m128i[1]);
+    #else
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        uint16_t tmp = 0;
+        SIMDE_VECTORIZE_REDUCTION(+:tmp)
+        for (size_t j = 0 ; j < ((sizeof(r_.u8) / sizeof(r_.u8[0])) / 4) ; j++) {
+          const size_t e = j + (i * 8);
+          tmp += (a_.u8[e] > b_.u8[e]) ? (a_.u8[e] - b_.u8[e]) : (b_.u8[e] - a_.u8[e]);
+        }
+        r_.i64[i] = tmp;
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_sad_epu8
+  #define _mm256_sad_epu8(a, b) simde_mm256_sad_epu8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_shuffle_epi8 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_shuffle_epi8(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_shuffle_epi8(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_shuffle_epi8(a_.m128i[1], b_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < ((sizeof(r_.u8) / sizeof(r_.u8[0])) / 2) ; i++) {
+        r_.u8[  i   ] = (b_.u8[  i   ] & 0x80) ? 0 : a_.u8[(b_.u8[  i   ] & 0x0f)     ];
+        r_.u8[i + 16] = (b_.u8[i + 16] & 0x80) ? 0 : a_.u8[(b_.u8[i + 16] & 0x0f) + 16];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_shuffle_epi8
+  #define _mm256_shuffle_epi8(a, b) simde_mm256_shuffle_epi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_shuffle_epi32 (simde__m256i a, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) {
+  simde__m256i_private
+    r_,
+    a_ = simde__m256i_to_private(a);
+
+  for (size_t i = 0 ; i < ((sizeof(r_.i32) / sizeof(r_.i32[0])) / 2) ; i++) {
+    r_.i32[i] = a_.i32[(imm8 >> (i * 2)) & 3];
+  }
+  for (size_t i = 0 ; i < ((sizeof(r_.i32) / sizeof(r_.i32[0])) / 2) ; i++) {
+    r_.i32[i + 4] = a_.i32[((imm8 >> (i * 2)) & 3) + 4];
+  }
+
+  return simde__m256i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+#  define simde_mm256_shuffle_epi32(a, imm8) _mm256_shuffle_epi32(a, imm8)
+#elif SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128) && !defined(__PGI)
+#  define simde_mm256_shuffle_epi32(a, imm8) \
+     simde_mm256_set_m128i( \
+       simde_mm_shuffle_epi32(simde_mm256_extracti128_si256(a, 1), (imm8)), \
+       simde_mm_shuffle_epi32(simde_mm256_extracti128_si256(a, 0), (imm8)))
+#elif defined(SIMDE_SHUFFLE_VECTOR_)
+#  define simde_mm256_shuffle_epi32(a, imm8) (__extension__ ({ \
+      const simde__m256i_private simde_tmp_a_ = simde__m256i_to_private(a); \
+      simde__m256i_from_private((simde__m256i_private) { .i32 = \
+          SIMDE_SHUFFLE_VECTOR_(32, 32, \
+                                (simde_tmp_a_).i32, \
+                                (simde_tmp_a_).i32, \
+                                ((imm8)     ) & 3, \
+                                ((imm8) >> 2) & 3, \
+                                ((imm8) >> 4) & 3, \
+                                ((imm8) >> 6) & 3, \
+                                (((imm8)     ) & 3) + 4, \
+                                (((imm8) >> 2) & 3) + 4, \
+                                (((imm8) >> 4) & 3) + 4, \
+                                (((imm8) >> 6) & 3) + 4) }); }))
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_shuffle_epi32
+  #define _mm256_shuffle_epi32(a, imm8) simde_mm256_shuffle_epi32(a, imm8)
+#endif
+
+#if defined(SIMDE_X86_AVX2_NATIVE)
+#  define simde_mm256_shufflehi_epi16(a, imm8) _mm256_shufflehi_epi16(a, imm8)
+#elif SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+#  define simde_mm256_shufflehi_epi16(a, imm8) \
+     simde_mm256_set_m128i( \
+       simde_mm_shufflehi_epi16(simde_mm256_extracti128_si256(a, 1), (imm8)), \
+       simde_mm_shufflehi_epi16(simde_mm256_extracti128_si256(a, 0), (imm8)))
+#elif defined(SIMDE_SHUFFLE_VECTOR_)
+#  define simde_mm256_shufflehi_epi16(a, imm8) (__extension__ ({ \
+      const simde__m256i_private simde_tmp_a_ = simde__m256i_to_private(a); \
+      simde__m256i_from_private((simde__m256i_private) { .i16 = \
+        SIMDE_SHUFFLE_VECTOR_(16, 32, \
+          (simde_tmp_a_).i16, \
+          (simde_tmp_a_).i16, \
+          0, 1, 2, 3, \
+          (((imm8)     ) & 3) + 4, \
+          (((imm8) >> 2) & 3) + 4, \
+          (((imm8) >> 4) & 3) + 4, \
+          (((imm8) >> 6) & 3) + 4, \
+          8, 9, 10, 11, \
+          ((((imm8)     ) & 3) + 8 + 4), \
+          ((((imm8) >> 2) & 3) + 8 + 4), \
+          ((((imm8) >> 4) & 3) + 8 + 4), \
+          ((((imm8) >> 6) & 3) + 8 + 4) \
+          ) }); }))
+#else
+#  define simde_mm256_shufflehi_epi16(a, imm8) \
+     simde_mm256_set_m128i( \
+       simde_mm_shufflehi_epi16(simde_mm256_extracti128_si256(a, 1), imm8), \
+       simde_mm_shufflehi_epi16(simde_mm256_extracti128_si256(a, 0), imm8))
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_shufflehi_epi16
+  #define _mm256_shufflehi_epi16(a, imm8) simde_mm256_shufflehi_epi16(a, imm8)
+#endif
+
+#if defined(SIMDE_X86_AVX2_NATIVE)
+#  define simde_mm256_shufflelo_epi16(a, imm8) _mm256_shufflelo_epi16(a, imm8)
+#elif SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+#  define simde_mm256_shufflelo_epi16(a, imm8) \
+     simde_mm256_set_m128i( \
+       simde_mm_shufflelo_epi16(simde_mm256_extracti128_si256(a, 1), (imm8)), \
+       simde_mm_shufflelo_epi16(simde_mm256_extracti128_si256(a, 0), (imm8)))
+#elif defined(SIMDE_SHUFFLE_VECTOR_)
+#  define simde_mm256_shufflelo_epi16(a, imm8) (__extension__ ({ \
+      const simde__m256i_private simde_tmp_a_ = simde__m256i_to_private(a); \
+      simde__m256i_from_private((simde__m256i_private) { .i16 = \
+        SIMDE_SHUFFLE_VECTOR_(16, 32, \
+          (simde_tmp_a_).i16, \
+          (simde_tmp_a_).i16, \
+          (((imm8)     ) & 3), \
+          (((imm8) >> 2) & 3), \
+          (((imm8) >> 4) & 3), \
+          (((imm8) >> 6) & 3), \
+          4, 5, 6, 7, \
+          ((((imm8)     ) & 3) + 8), \
+          ((((imm8) >> 2) & 3) + 8), \
+          ((((imm8) >> 4) & 3) + 8), \
+          ((((imm8) >> 6) & 3) + 8), \
+          12, 13, 14, 15) }); }))
+#else
+#  define simde_mm256_shufflelo_epi16(a, imm8) \
+     simde_mm256_set_m128i( \
+       simde_mm_shufflelo_epi16(simde_mm256_extracti128_si256(a, 1), imm8), \
+       simde_mm_shufflelo_epi16(simde_mm256_extracti128_si256(a, 0), imm8))
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_shufflelo_epi16
+  #define _mm256_shufflelo_epi16(a, imm8) simde_mm256_shufflelo_epi16(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_sign_epi8 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_sign_epi8(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+      r_.i8[i] = (b_.i8[i] == INT8_C(0)) ? INT8_C(0) : (b_.i8[i] < INT8_C(0)) ? -a_.i8[i] : a_.i8[i];
+    }
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_sign_epi8
+  #define _mm256_sign_epi8(a, b) simde_mm256_sign_epi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_sign_epi16 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_sign_epi16(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+      r_.i16[i] = (b_.i16[i] == INT16_C(0)) ? INT16_C(0) : (b_.i16[i] < INT16_C(0)) ? -a_.i16[i] : a_.i16[i];
+    }
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_sign_epi16
+  #define _mm256_sign_epi16(a, b) simde_mm256_sign_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_sign_epi32(simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_sign_epi32(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0; i < (sizeof(r_.i32) / sizeof(r_.i32[0])); i++) {
+      r_.i32[i] = (b_.i32[i] == INT32_C(0)) ? INT32_C(0) : (b_.i32[i] < INT32_C(0)) ? -a_.i32[i] : a_.i32[i];
+    }
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_sign_epi32
+  #define _mm256_sign_epi32(a, b) simde_mm256_sign_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_sll_epi16 (simde__m256i a, simde__m128i count) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_sll_epi16(a, count);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_sll_epi16(a_.m128i[0], count);
+      r_.m128i[1] = simde_mm_sll_epi16(a_.m128i[1], count);
+    #else
+      simde__m128i_private
+        count_ = simde__m128i_to_private(count);
+
+      uint64_t shift = HEDLEY_STATIC_CAST(uint64_t, count_.i64[0]);
+      if (shift > 15)
+        return simde_mm256_setzero_si256();
+
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+        r_.i16 = a_.i16 << HEDLEY_STATIC_CAST(int16_t, shift);
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+          r_.i16[i] = HEDLEY_STATIC_CAST(int16_t, a_.i16[i] << (shift));
+        }
+      #endif
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_sll_epi16
+  #define _mm256_sll_epi16(a, count) simde_mm256_sll_epi16(a, count)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_sll_epi32 (simde__m256i a, simde__m128i count) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_sll_epi32(a, count);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_sll_epi32(a_.m128i[0], count);
+      r_.m128i[1] = simde_mm_sll_epi32(a_.m128i[1], count);
+    #else
+      simde__m128i_private
+        count_ = simde__m128i_to_private(count);
+
+      uint64_t shift = HEDLEY_STATIC_CAST(uint64_t, count_.i64[0]);
+      if (shift > 31)
+        return simde_mm256_setzero_si256();
+
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+        r_.i32 = a_.i32 << HEDLEY_STATIC_CAST(int32_t, shift);
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+          r_.i32[i] = HEDLEY_STATIC_CAST(int32_t, a_.i32[i] << (shift));
+        }
+      #endif
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_sll_epi32
+  #define _mm256_sll_epi32(a, count) simde_mm256_sll_epi32(a, count)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_sll_epi64 (simde__m256i a, simde__m128i count) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_sll_epi64(a, count);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_sll_epi64(a_.m128i[0], count);
+      r_.m128i[1] = simde_mm_sll_epi64(a_.m128i[1], count);
+    #else
+      simde__m128i_private
+        count_ = simde__m128i_to_private(count);
+
+      uint64_t shift = HEDLEY_STATIC_CAST(uint64_t, count_.i64[0]);
+      if (shift > 63)
+        return simde_mm256_setzero_si256();
+
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+        r_.i64 = a_.i64 << HEDLEY_STATIC_CAST(int64_t, shift);
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+          r_.i64[i] = HEDLEY_STATIC_CAST(int64_t, a_.i64[i] << (shift));
+        }
+      #endif
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_sll_epi64
+  #define _mm256_sll_epi64(a, count) simde_mm256_sll_epi64(a, count)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_slli_epi16 (simde__m256i a, const int imm8)
+    SIMDE_REQUIRE_RANGE(imm8, 0, 255) {
+  /* Note: There is no consistency in how compilers handle values outside of
+     the expected range, hence the discrepancy between what we allow and what
+     Intel specifies.  Some compilers will return 0, others seem to just mask
+     off everything outside of the range. */
+  simde__m256i_private
+    r_,
+    a_ = simde__m256i_to_private(a);
+
+  #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+    SIMDE_POWER_ALTIVEC_VECTOR(unsigned short) sv = vec_splats(HEDLEY_STATIC_CAST(unsigned short, imm8));
+    for (size_t i = 0 ; i < (sizeof(a_.altivec_i16) / sizeof(a_.altivec_i16[0])) ; i++) {
+      r_.altivec_i16[i] = vec_sl(a_.altivec_i16[i], sv);
+    }
+  #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+    r_.i16 = a_.i16 << HEDLEY_STATIC_CAST(int16_t, imm8);
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+      r_.i16[i] = HEDLEY_STATIC_CAST(int16_t, a_.i16[i] << (imm8 & 0xff));
+    }
+  #endif
+
+  return simde__m256i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+#  define simde_mm256_slli_epi16(a, imm8) _mm256_slli_epi16(a, imm8)
+#elif SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+#  define simde_mm256_slli_epi16(a, imm8) \
+     simde_mm256_set_m128i( \
+         simde_mm_slli_epi16(simde_mm256_extracti128_si256(a, 1), (imm8)), \
+         simde_mm_slli_epi16(simde_mm256_extracti128_si256(a, 0), (imm8)))
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_slli_epi16
+  #define _mm256_slli_epi16(a, imm8) simde_mm256_slli_epi16(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_slli_epi32 (simde__m256i a, const int imm8)
+    SIMDE_REQUIRE_RANGE(imm8, 0, 255) {
+  simde__m256i_private
+    r_,
+    a_ = simde__m256i_to_private(a);
+
+  #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+    SIMDE_POWER_ALTIVEC_VECTOR(unsigned int) sv = vec_splats(HEDLEY_STATIC_CAST(unsigned int, imm8));
+    for (size_t i = 0 ; i < (sizeof(a_.altivec_i32) / sizeof(a_.altivec_i32[0])) ; i++) {
+      r_.altivec_i32[i] = vec_sl(a_.altivec_i32[i], sv);
+    }
+  #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+    r_.i32 = a_.i32 << HEDLEY_STATIC_CAST(int32_t, imm8);
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+      r_.i32[i] = a_.i32[i] << (imm8 & 0xff);
+    }
+  #endif
+
+  return simde__m256i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+#  define simde_mm256_slli_epi32(a, imm8) _mm256_slli_epi32(a, imm8)
+#elif SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+#  define simde_mm256_slli_epi32(a, imm8) \
+     simde_mm256_set_m128i( \
+         simde_mm_slli_epi32(simde_mm256_extracti128_si256(a, 1), (imm8)), \
+         simde_mm_slli_epi32(simde_mm256_extracti128_si256(a, 0), (imm8)))
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_slli_epi32
+  #define _mm256_slli_epi32(a, imm8) simde_mm256_slli_epi32(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_slli_epi64 (simde__m256i a, const int imm8)
+    SIMDE_REQUIRE_RANGE(imm8, 0, 255) {
+  simde__m256i_private
+    r_,
+    a_ = simde__m256i_to_private(a);
+
+#if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+  r_.i64 = a_.i64 << HEDLEY_STATIC_CAST(int64_t, imm8);
+#else
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+    r_.i64[i] = a_.i64[i] << (imm8 & 0xff);
+  }
+#endif
+
+  return simde__m256i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+#  define simde_mm256_slli_epi64(a, imm8) _mm256_slli_epi64(a, imm8)
+#elif SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+#  define simde_mm256_slli_epi64(a, imm8) \
+     simde_mm256_set_m128i( \
+         simde_mm_slli_epi64(simde_mm256_extracti128_si256(a, 1), (imm8)), \
+         simde_mm_slli_epi64(simde_mm256_extracti128_si256(a, 0), (imm8)))
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_slli_epi64
+  #define _mm256_slli_epi64(a, imm8) simde_mm256_slli_epi64(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_slli_si256 (simde__m256i a, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) {
+  simde__m256i_private
+    r_,
+    a_ = simde__m256i_to_private(a);
+
+  for (size_t h = 0 ; h < (sizeof(r_.m128i_private) / sizeof(r_.m128i_private[0])) ; h++) {
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.m128i_private[h].i8) / sizeof(r_.m128i_private[h].i8[0])) ; i++) {
+      const int e = HEDLEY_STATIC_CAST(int, i) - imm8;
+      r_.m128i_private[h].i8[i] = (e >= 0) ? a_.m128i_private[h].i8[e] : 0;
+    }
+  }
+
+  return simde__m256i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+#  define simde_mm256_slli_si256(a, imm8) _mm256_slli_si256(a, imm8)
+#elif SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128) && !defined(__PGI)
+#  define simde_mm256_slli_si256(a, imm8) \
+     simde_mm256_set_m128i( \
+         simde_mm_slli_si128(simde_mm256_extracti128_si256(a, 1), (imm8)), \
+         simde_mm_slli_si128(simde_mm256_extracti128_si256(a, 0), (imm8)))
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+#  define simde_mm256_slli_si256(a, imm8) \
+     simde_mm256_set_m128i( \
+       simde_mm_bslli_si128(simde_mm256_extracti128_si256(a, 1), (imm8)), \
+       simde_mm_bslli_si128(simde_mm256_extracti128_si256(a, 0), (imm8)))
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_slli_si256
+  #define _mm256_slli_si256(a, imm8) simde_mm256_slli_si256(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_sllv_epi32 (simde__m128i a, simde__m128i b) {
+  simde__m128i_private
+    a_ = simde__m128i_to_private(a),
+    b_ = simde__m128i_to_private(b),
+    r_;
+
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    r_.neon_u32 = vshlq_u32(a_.neon_u32, vreinterpretq_s32_u32(b_.neon_u32));
+    r_.neon_u32 = vandq_u32(r_.neon_u32, vcltq_u32(b_.neon_u32, vdupq_n_u32(32)));
+  #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+    r_.u32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u32), (b_.u32 < UINT32_C(32))) & (a_.u32 << b_.u32);
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+      r_.u32[i] = (b_.u32[i] < 32) ? (a_.u32[i] << b_.u32[i]) : 0;
+    }
+  #endif
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #define simde_mm_sllv_epi32(a, b) _mm_sllv_epi32(a, b)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_sllv_epi32
+  #define _mm_sllv_epi32(a, b) simde_mm_sllv_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_sllv_epi32 (simde__m256i a, simde__m256i b) {
+  simde__m256i_private
+    a_ = simde__m256i_to_private(a),
+    b_ = simde__m256i_to_private(b),
+    r_;
+
+  #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+    r_.m128i[0] = simde_mm_sllv_epi32(a_.m128i[0], b_.m128i[0]);
+    r_.m128i[1] = simde_mm_sllv_epi32(a_.m128i[1], b_.m128i[1]);
+  #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+    r_.u32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u32), (b_.u32 < 32)) & (a_.u32 << b_.u32);
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+      r_.u32[i] = (b_.u32[i] < 32) ? (a_.u32[i] << b_.u32[i]) : 0;
+    }
+  #endif
+
+  return simde__m256i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #define simde_mm256_sllv_epi32(a, b) _mm256_sllv_epi32(a, b)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_sllv_epi32
+  #define _mm256_sllv_epi32(a, b) simde_mm256_sllv_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_sllv_epi64 (simde__m128i a, simde__m128i b) {
+  simde__m128i_private
+    a_ = simde__m128i_to_private(a),
+    b_ = simde__m128i_to_private(b),
+    r_;
+
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    r_.neon_u64 = vshlq_u64(a_.neon_u64, vreinterpretq_s64_u64(b_.neon_u64));
+    r_.neon_u64 = vandq_u64(r_.neon_u64, vcltq_u64(b_.neon_u64, vdupq_n_u64(64)));
+  #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+    r_.u64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u64), (b_.u64 < 64)) & (a_.u64 << b_.u64);
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
+      r_.u64[i] = (b_.u64[i] < 64) ? (a_.u64[i] << b_.u64[i]) : 0;
+    }
+  #endif
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #define simde_mm_sllv_epi64(a, b) _mm_sllv_epi64(a, b)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_sllv_epi64
+  #define _mm_sllv_epi64(a, b) simde_mm_sllv_epi64(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_sllv_epi64 (simde__m256i a, simde__m256i b) {
+  simde__m256i_private
+    a_ = simde__m256i_to_private(a),
+    b_ = simde__m256i_to_private(b),
+    r_;
+
+  #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+    r_.m128i[0] = simde_mm_sllv_epi64(a_.m128i[0], b_.m128i[0]);
+    r_.m128i[1] = simde_mm_sllv_epi64(a_.m128i[1], b_.m128i[1]);
+  #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+    r_.u64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u64), (b_.u64 < 64)) & (a_.u64 << b_.u64);
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
+      r_.u64[i] = (b_.u64[i] < 64) ? (a_.u64[i] << b_.u64[i]) : 0;
+    }
+  #endif
+
+  return simde__m256i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #define simde_mm256_sllv_epi64(a, b) _mm256_sllv_epi64(a, b)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_sllv_epi64
+  #define _mm256_sllv_epi64(a, b) simde_mm256_sllv_epi64(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_sra_epi16 (simde__m256i a, simde__m128i count) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_sra_epi16(a, count);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_sra_epi16(a_.m128i[0], count);
+      r_.m128i[1] = simde_mm_sra_epi16(a_.m128i[1], count);
+    #else
+      simde__m128i_private
+        count_ = simde__m128i_to_private(count);
+
+      uint64_t shift = HEDLEY_STATIC_CAST(uint64_t, count_.i64[0]);
+
+      if (shift > 15) shift = 15;
+
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+        r_.i16 = a_.i16 >> HEDLEY_STATIC_CAST(int16_t, shift);
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+          r_.i16[i] = a_.i16[i] >> shift;
+        }
+      #endif
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_sra_epi16
+  #define _mm256_sra_epi16(a, count) simde_mm256_sra_epi16(a, count)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_sra_epi32 (simde__m256i a, simde__m128i count) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_sra_epi32(a, count);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_sra_epi32(a_.m128i[0], count);
+      r_.m128i[1] = simde_mm_sra_epi32(a_.m128i[1], count);
+    #else
+      simde__m128i_private
+        count_ = simde__m128i_to_private(count);
+      uint64_t shift = HEDLEY_STATIC_CAST(uint64_t, count_.i64[0]);
+
+      if (shift > 31) shift = 31;
+
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+        r_.i32 = a_.i32 >> HEDLEY_STATIC_CAST(int16_t, shift);
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+          r_.i32[i] = a_.i32[i] >> shift;
+        }
+      #endif
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_sra_epi32
+  #define _mm256_sra_epi32(a, count) simde_mm256_sra_epi32(a, count)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_srai_epi16 (simde__m256i a, const int imm8)
+    SIMDE_REQUIRE_RANGE(imm8, 0, 255) {
+  simde__m256i_private
+    r_,
+    a_ = simde__m256i_to_private(a);
+  unsigned int shift = HEDLEY_STATIC_CAST(unsigned int, imm8);
+
+  if (shift > 15) shift = 15;
+
+  #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+    r_.i16 = a_.i16 >> HEDLEY_STATIC_CAST(int16_t, shift);
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+      r_.i16[i] = a_.i16[i] >> shift;
+    }
+  #endif
+
+  return simde__m256i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+#  define simde_mm256_srai_epi16(a, imm8) _mm256_srai_epi16(a, imm8)
+#elif SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+#  define simde_mm256_srai_epi16(a, imm8) \
+     simde_mm256_set_m128i( \
+         simde_mm_srai_epi16(simde_mm256_extracti128_si256(a, 1), (imm8)), \
+         simde_mm_srai_epi16(simde_mm256_extracti128_si256(a, 0), (imm8)))
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_srai_epi16
+  #define _mm256_srai_epi16(a, imm8) simde_mm256_srai_epi16(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_srai_epi32 (simde__m256i a, const int imm8)
+    SIMDE_REQUIRE_RANGE(imm8, 0, 255) {
+  simde__m256i_private
+    r_,
+    a_ = simde__m256i_to_private(a);
+  unsigned int shift = HEDLEY_STATIC_CAST(unsigned int, imm8);
+
+  if (shift > 31) shift = 31;
+
+  #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+    r_.i32 = a_.i32 >> HEDLEY_STATIC_CAST(int16_t, shift);
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+      r_.i32[i] = a_.i32[i] >> shift;
+    }
+  #endif
+
+  return simde__m256i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+#  define simde_mm256_srai_epi32(a, imm8) _mm256_srai_epi32(a, imm8)
+#elif SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+#  define simde_mm256_srai_epi32(a, imm8) \
+     simde_mm256_set_m128i( \
+         simde_mm_srai_epi32(simde_mm256_extracti128_si256(a, 1), (imm8)), \
+         simde_mm_srai_epi32(simde_mm256_extracti128_si256(a, 0), (imm8)))
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_srai_epi32
+  #define _mm256_srai_epi32(a, imm8) simde_mm256_srai_epi32(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_srav_epi32 (simde__m128i a, simde__m128i count) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm_srav_epi32(a, count);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      count_ = simde__m128i_to_private(count);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      int32x4_t cnt = vreinterpretq_s32_u32(vminq_u32(count_.neon_u32, vdupq_n_u32(31)));
+      r_.neon_i32 = vshlq_s32(a_.neon_i32, vnegq_s32(cnt));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        uint32_t shift = HEDLEY_STATIC_CAST(uint32_t, count_.i32[i]);
+        r_.i32[i] = a_.i32[i] >> HEDLEY_STATIC_CAST(int, shift > 31 ? 31 : shift);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_srav_epi32
+  #define _mm_srav_epi32(a, count) simde_mm_srav_epi32(a, count)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_srav_epi32 (simde__m256i a, simde__m256i count) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_srav_epi32(a, count);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      count_ = simde__m256i_to_private(count);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_srav_epi32(a_.m128i[0], count_.m128i[0]);
+      r_.m128i[1] = simde_mm_srav_epi32(a_.m128i[1], count_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        uint32_t shift = HEDLEY_STATIC_CAST(uint32_t, count_.i32[i]);
+        if (shift > 31) shift = 31;
+        r_.i32[i] = a_.i32[i] >> shift;
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_srav_epi32
+  #define _mm256_srav_epi32(a, count) simde_mm256_srav_epi32(a, count)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_srl_epi16 (simde__m256i a, simde__m128i count) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_srl_epi16(a, count);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_srl_epi16(a_.m128i[0], count);
+      r_.m128i[1] = simde_mm_srl_epi16(a_.m128i[1], count);
+    #else
+      simde__m128i_private
+        count_ = simde__m128i_to_private(count);
+
+      uint64_t shift = HEDLEY_STATIC_CAST(uint64_t , (count_.i64[0] > 16 ? 16 : count_.i64[0]));
+
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+        r_.u16 = a_.u16 >> SIMDE_CAST_VECTOR_SHIFT_COUNT(16, shift);
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+          r_.u16[i] = a_.u16[i] >> (shift);
+        }
+      #endif
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_srl_epi16
+  #define _mm256_srl_epi16(a, count) simde_mm256_srl_epi16(a, count)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_srl_epi32 (simde__m256i a, simde__m128i count) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_srl_epi32(a, count);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_srl_epi32(a_.m128i[0], count);
+      r_.m128i[1] = simde_mm_srl_epi32(a_.m128i[1], count);
+    #else
+      simde__m128i_private
+        count_ = simde__m128i_to_private(count);
+
+      uint64_t shift = HEDLEY_STATIC_CAST(uint64_t , (count_.i64[0] > 32 ? 32 : count_.i64[0]));
+
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+        r_.u32 = a_.u32 >> SIMDE_CAST_VECTOR_SHIFT_COUNT(32, shift);
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+          r_.u32[i] = a_.u32[i] >> (shift);
+        }
+      #endif
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_srl_epi32
+  #define _mm256_srl_epi32(a, count) simde_mm256_srl_epi32(a, count)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_srl_epi64 (simde__m256i a, simde__m128i count) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_srl_epi64(a, count);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_srl_epi64(a_.m128i[0], count);
+      r_.m128i[1] = simde_mm_srl_epi64(a_.m128i[1], count);
+    #else
+      simde__m128i_private
+        count_ = simde__m128i_to_private(count);
+
+      uint64_t shift = HEDLEY_STATIC_CAST(uint64_t , (count_.i64[0] > 64 ? 64 : count_.i64[0]));
+
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+        r_.u64 = a_.u64 >> SIMDE_CAST_VECTOR_SHIFT_COUNT(64, shift);
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+          r_.u64[i] = a_.u64[i] >> (shift);
+        }
+      #endif
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_srl_epi64
+  #define _mm256_srl_epi64(a, count) simde_mm256_srl_epi64(a, count)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_srli_epi16 (simde__m256i a, const int imm8)
+    SIMDE_REQUIRE_RANGE(imm8, 0, 255) {
+  simde__m256i_private
+    r_,
+    a_ = simde__m256i_to_private(a);
+
+  if (imm8 > 15)
+    return simde_mm256_setzero_si256();
+
+  #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+    SIMDE_POWER_ALTIVEC_VECTOR(unsigned short) sv = vec_splats(HEDLEY_STATIC_CAST(unsigned short, imm8));
+    for (size_t i = 0 ; i < (sizeof(a_.altivec_u16) / sizeof(a_.altivec_u16[0])) ; i++) {
+      r_.altivec_u16[i] = vec_sr(a_.altivec_u16[i], sv);
+    }
+  #else
+    if (HEDLEY_STATIC_CAST(unsigned int, imm8) > 15) {
+      simde_memset(&r_, 0, sizeof(r_));
+    } else {
+      #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+        r_.u16 = a_.u16 >> SIMDE_CAST_VECTOR_SHIFT_COUNT(16, imm8);
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+          r_.u16[i] = a_.u16[i] >> imm8;
+        }
+      #endif
+    }
+  #endif
+
+  return simde__m256i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+#  define simde_mm256_srli_epi16(a, imm8) _mm256_srli_epi16(a, imm8)
+#elif SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+#  define simde_mm256_srli_epi16(a, imm8) \
+     simde_mm256_set_m128i( \
+         simde_mm_srli_epi16(simde_mm256_extracti128_si256(a, 1), (imm8)), \
+         simde_mm_srli_epi16(simde_mm256_extracti128_si256(a, 0), (imm8)))
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_srli_epi16
+  #define _mm256_srli_epi16(a, imm8) simde_mm256_srli_epi16(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_srli_epi32 (simde__m256i a, const int imm8)
+    SIMDE_REQUIRE_RANGE(imm8, 0, 255) {
+  simde__m256i_private
+    r_,
+    a_ = simde__m256i_to_private(a);
+
+  #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+    SIMDE_POWER_ALTIVEC_VECTOR(unsigned int) sv = vec_splats(HEDLEY_STATIC_CAST(unsigned int, imm8));
+    for (size_t i = 0 ; i < (sizeof(a_.altivec_u32) / sizeof(a_.altivec_u32[0])) ; i++) {
+      r_.altivec_u32[i] = vec_sr(a_.altivec_u32[i], sv);
+    }
+  #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+    r_.u32 = a_.u32 >> SIMDE_CAST_VECTOR_SHIFT_COUNT(16, imm8);
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+      r_.u32[i] = a_.u32[i] >> imm8;
+    }
+  #endif
+
+  return simde__m256i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+#  define simde_mm256_srli_epi32(a, imm8) _mm256_srli_epi32(a, imm8)
+#elif SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+#  define simde_mm256_srli_epi32(a, imm8) \
+     simde_mm256_set_m128i( \
+         simde_mm_srli_epi32(simde_mm256_extracti128_si256(a, 1), (imm8)), \
+         simde_mm_srli_epi32(simde_mm256_extracti128_si256(a, 0), (imm8)))
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_srli_epi32
+  #define _mm256_srli_epi32(a, imm8) simde_mm256_srli_epi32(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_srli_epi64 (simde__m256i a, const int imm8)
+    SIMDE_REQUIRE_RANGE(imm8, 0, 255) {
+  simde__m256i_private
+    r_,
+    a_ = simde__m256i_to_private(a);
+
+#if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+  r_.u64 = a_.u64 >> SIMDE_CAST_VECTOR_SHIFT_COUNT(32, imm8);
+#else
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
+    r_.u64[i] = a_.u64[i] >> imm8;
+  }
+#endif
+
+  return simde__m256i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+#  define simde_mm256_srli_epi64(a, imm8) _mm256_srli_epi64(a, imm8)
+#elif SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+#  define simde_mm256_srli_epi64(a, imm8) \
+     simde_mm256_set_m128i( \
+         simde_mm_srli_epi64(simde_mm256_extracti128_si256(a, 1), (imm8)), \
+         simde_mm_srli_epi64(simde_mm256_extracti128_si256(a, 0), (imm8)))
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_srli_epi64
+  #define _mm256_srli_epi64(a, imm8) simde_mm256_srli_epi64(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_srli_si256 (simde__m256i a, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) {
+  simde__m256i_private
+    r_,
+    a_ = simde__m256i_to_private(a);
+
+  for (size_t h = 0 ; h < (sizeof(r_.m128i_private) / sizeof(r_.m128i_private[0])) ; h++) {
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.m128i_private[h].i8) / sizeof(r_.m128i_private[h].i8[0])) ; i++) {
+      const int e = imm8 + HEDLEY_STATIC_CAST(int, i);
+      r_.m128i_private[h].i8[i] = (e < 16) ? a_.m128i_private[h].i8[e] : 0;
+    }
+  }
+
+  return simde__m256i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+#  define simde_mm256_srli_si256(a, imm8) _mm256_srli_si256(a, imm8)
+#elif SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128) && !defined(__PGI)
+#  define simde_mm256_srli_si256(a, imm8) \
+     simde_mm256_set_m128i( \
+         simde_mm_srli_si128(simde_mm256_extracti128_si256(a, 1), (imm8)), \
+         simde_mm_srli_si128(simde_mm256_extracti128_si256(a, 0), (imm8)))
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+#  define simde_mm256_srli_si256(a, imm8) \
+     simde_mm256_set_m128i( \
+       simde_mm_bsrli_si128(simde_mm256_extracti128_si256(a, 1), (imm8)), \
+       simde_mm_bsrli_si128(simde_mm256_extracti128_si256(a, 0), (imm8)))
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_srli_si256
+  #define _mm256_srli_si256(a, imm8) simde_mm256_srli_si256(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_srlv_epi32 (simde__m128i a, simde__m128i b) {
+  simde__m128i_private
+    a_ = simde__m128i_to_private(a),
+    b_ = simde__m128i_to_private(b),
+    r_;
+
+  #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+    r_.u32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u32), (b_.u32 < 32)) & (a_.u32 >> b_.u32);
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+      r_.u32[i] = (b_.u32[i] < 32) ? (a_.u32[i] >> b_.u32[i]) : 0;
+    }
+  #endif
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #define simde_mm_srlv_epi32(a, b) _mm_srlv_epi32(a, b)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_srlv_epi32
+  #define _mm_srlv_epi32(a, b) simde_mm_srlv_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_srlv_epi32 (simde__m256i a, simde__m256i b) {
+  simde__m256i_private
+    a_ = simde__m256i_to_private(a),
+    b_ = simde__m256i_to_private(b),
+    r_;
+
+  #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+    r_.u32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u32), (b_.u32 < 32)) & (a_.u32 >> b_.u32);
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+      r_.u32[i] = (b_.u32[i] < 32) ? (a_.u32[i] >> b_.u32[i]) : 0;
+    }
+  #endif
+
+  return simde__m256i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #define simde_mm256_srlv_epi32(a, b) _mm256_srlv_epi32(a, b)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_srlv_epi32
+  #define _mm256_srlv_epi32(a, b) simde_mm256_srlv_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_srlv_epi64 (simde__m128i a, simde__m128i b) {
+  simde__m128i_private
+    a_ = simde__m128i_to_private(a),
+    b_ = simde__m128i_to_private(b),
+    r_;
+
+  #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+    r_.u64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u64), (b_.u64 < 64)) & (a_.u64 >> b_.u64);
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
+      r_.u64[i] = (b_.u64[i] < 64) ? (a_.u64[i] >> b_.u64[i]) : 0;
+    }
+  #endif
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #define simde_mm_srlv_epi64(a, b) _mm_srlv_epi64(a, b)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_srlv_epi64
+  #define _mm_srlv_epi64(a, b) simde_mm_srlv_epi64(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_srlv_epi64 (simde__m256i a, simde__m256i b) {
+  simde__m256i_private
+    a_ = simde__m256i_to_private(a),
+    b_ = simde__m256i_to_private(b),
+    r_;
+
+  #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+    r_.u64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u64), (b_.u64 < 64)) & (a_.u64 >> b_.u64);
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
+      r_.u64[i] = (b_.u64[i] < 64) ? (a_.u64[i] >> b_.u64[i]) : 0;
+    }
+  #endif
+
+  return simde__m256i_from_private(r_);
+}
+#if defined(SIMDE_X86_AVX2_NATIVE)
+  #define simde_mm256_srlv_epi64(a, b) _mm256_srlv_epi64(a, b)
+#endif
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_srlv_epi64
+  #define _mm256_srlv_epi64(a, b) simde_mm256_srlv_epi64(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_stream_load_si256 (const simde__m256i* mem_addr) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_stream_load_si256(HEDLEY_CONST_CAST(simde__m256i*, mem_addr));
+  #elif HEDLEY_HAS_BUILTIN(__builtin_nontemporal_store) && defined(SIMDE_VECTOR_SUBSCRIPT)
+    return __builtin_nontemporal_load(mem_addr);
+  #else
+    simde__m256i r;
+    simde_memcpy(&r, SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m256i), sizeof(r));
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+#  define _mm256_stream_load_si256(mem_addr) simde_mm256_stream_load_si256(mem_addr)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_sub_epi8 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_sub_epi8(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_sub_epi8(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_sub_epi8(a_.m128i[1], b_.m128i[1]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i8 = a_.i8 - b_.i8;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = a_.i8[i] - b_.i8[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_sub_epi8
+  #define _mm256_sub_epi8(a, b) simde_mm256_sub_epi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_sub_epi16 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_sub_epi16(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_sub_epi16(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_sub_epi16(a_.m128i[1], b_.m128i[1]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i16 = a_.i16 - b_.i16;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = a_.i16[i] - b_.i16[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_sub_epi16
+  #define _mm256_sub_epi16(a, b) simde_mm256_sub_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_hsub_epi16 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_hsub_epi16(a, b);
+  #else
+    return simde_mm256_sub_epi16(simde_x_mm256_deinterleaveeven_epi16(a, b), simde_x_mm256_deinterleaveodd_epi16(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_hsub_epi16
+  #define _mm256_hsub_epi16(a, b) simde_mm256_hsub_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_sub_epi32 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_sub_epi32(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_sub_epi32(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_sub_epi32(a_.m128i[1], b_.m128i[1]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32 = a_.i32 - b_.i32;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = a_.i32[i] - b_.i32[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_sub_epi32
+  #define _mm256_sub_epi32(a, b) simde_mm256_sub_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_hsub_epi32 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_hsub_epi32(a, b);
+  #else
+    return simde_mm256_sub_epi32(simde_x_mm256_deinterleaveeven_epi32(a, b), simde_x_mm256_deinterleaveodd_epi32(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_hsub_epi32
+  #define _mm256_hsub_epi32(a, b) simde_mm256_hsub_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_sub_epi64 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_sub_epi64(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_sub_epi64(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_sub_epi64(a_.m128i[1], b_.m128i[1]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i64 = a_.i64 - b_.i64;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = a_.i64[i] - b_.i64[i];
+      }
+    #endif
+
+  return simde__m256i_from_private(r_);
+#endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_sub_epi64
+  #define _mm256_sub_epi64(a, b) simde_mm256_sub_epi64(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_x_mm256_sub_epu32 (simde__m256i a, simde__m256i b) {
+  simde__m256i_private
+    r_,
+    a_ = simde__m256i_to_private(a),
+    b_ = simde__m256i_to_private(b);
+
+  #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+    r_.u32 = a_.u32 - b_.u32;
+  #elif SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+    r_.m128i[0] = simde_x_mm_sub_epu32(a_.m128i[0], b_.m128i[0]);
+    r_.m128i[1] = simde_x_mm_sub_epu32(a_.m128i[1], b_.m128i[1]);
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+      r_.u32[i] = a_.u32[i] - b_.u32[i];
+    }
+  #endif
+
+  return simde__m256i_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_subs_epi8 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_subs_epi8(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_subs_epi8(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_subs_epi8(a_.m128i[1], b_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = simde_math_subs_i8(a_.i8[i], b_.i8[i]);
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_subs_epi8
+  #define _mm256_subs_epi8(a, b) simde_mm256_subs_epi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_subs_epi16(simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_subs_epi16(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_subs_epi16(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_subs_epi16(a_.m128i[1], b_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = simde_math_subs_i16(a_.i16[i], b_.i16[i]);
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_subs_epi16
+  #define _mm256_subs_epi16(a, b) simde_mm256_subs_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_hsubs_epi16 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_hsubs_epi16(a, b);
+  #else
+    return simde_mm256_subs_epi16(simde_x_mm256_deinterleaveeven_epi16(a, b), simde_x_mm256_deinterleaveodd_epi16(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_hsubs_epi16
+  #define _mm256_hsubs_epi16(a, b) simde_mm256_hsubs_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_subs_epu8 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_subs_epu8(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_subs_epu8(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_subs_epu8(a_.m128i[1], b_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+        r_.u8[i] = simde_math_subs_u8(a_.u8[i], b_.u8[i]);
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_subs_epu8
+  #define _mm256_subs_epu8(a, b) simde_mm256_subs_epu8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_subs_epu16(simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_subs_epu16(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_subs_epu16(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_subs_epu16(a_.m128i[1], b_.m128i[1]);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+        r_.u16[i] = simde_math_subs_u16(a_.u16[i], b_.u16[i]);
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_subs_epu16
+  #define _mm256_subs_epu16(a, b) simde_mm256_subs_epu16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_x_mm256_test_all_ones (simde__m256i a) {
+  simde__m256i_private a_ = simde__m256i_to_private(a);
+  int r;
+  int_fast32_t r_ = ~HEDLEY_STATIC_CAST(int_fast32_t, 0);
+
+  SIMDE_VECTORIZE_REDUCTION(&:r_)
+  for (size_t i = 0 ; i < (sizeof(a_.i32f) / sizeof(a_.i32f[0])) ; i++) {
+    r_ &= a_.i32f[i];
+  }
+
+  r = (r_ == ~HEDLEY_STATIC_CAST(int_fast32_t, 0));
+
+  return r;
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_unpacklo_epi8 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_unpacklo_epi8(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_unpacklo_epi8(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_unpacklo_epi8(a_.m128i[1], b_.m128i[1]);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.i8 = SIMDE_SHUFFLE_VECTOR_(8, 32, a_.i8, b_.i8,
+           0, 32,  1, 33,  2, 34,  3, 35,
+           4, 36,  5, 37,  6, 38,  7, 39,
+          16, 48, 17, 49, 18, 50, 19, 51,
+          20, 52, 21, 53, 22, 54, 23, 55);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0]) / 2) ; i++) {
+        r_.i8[2 * i] = a_.i8[i + ~(~i | 7)];
+        r_.i8[2 * i + 1] = b_.i8[i + ~(~i | 7)];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_unpacklo_epi8
+  #define _mm256_unpacklo_epi8(a, b) simde_mm256_unpacklo_epi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_unpacklo_epi16 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_unpacklo_epi16(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_unpacklo_epi16(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_unpacklo_epi16(a_.m128i[1], b_.m128i[1]);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.i16 =SIMDE_SHUFFLE_VECTOR_(16, 32, a_.i16, b_.i16,
+        0, 16, 1, 17, 2, 18, 3, 19, 8, 24, 9, 25, 10, 26, 11, 27);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0]) / 2) ; i++) {
+        r_.i16[2 * i] = a_.i16[i + ~(~i | 3)];
+        r_.i16[2 * i + 1] = b_.i16[i + ~(~i | 3)];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_unpacklo_epi16
+  #define _mm256_unpacklo_epi16(a, b) simde_mm256_unpacklo_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_unpacklo_epi32 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_unpacklo_epi32(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_unpacklo_epi32(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_unpacklo_epi32(a_.m128i[1], b_.m128i[1]);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.i32 = SIMDE_SHUFFLE_VECTOR_(32, 32, a_.i32, b_.i32,
+                                    0, 8, 1, 9, 4, 12, 5, 13);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0]) / 2) ; i++) {
+        r_.i32[2 * i] = a_.i32[i + ~(~i | 1)];
+        r_.i32[2 * i + 1] = b_.i32[i + ~(~i | 1)];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_unpacklo_epi32
+  #define _mm256_unpacklo_epi32(a, b) simde_mm256_unpacklo_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_unpacklo_epi64 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_unpacklo_epi64(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_unpacklo_epi64(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_unpacklo_epi64(a_.m128i[1], b_.m128i[1]);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.i64 = SIMDE_SHUFFLE_VECTOR_(64, 32, a_.i64, b_.i64, 0, 4, 2, 6);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0]) / 2) ; i++) {
+        r_.i64[2 * i] = a_.i64[2 * i];
+        r_.i64[2 * i + 1] = b_.i64[2 * i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_unpacklo_epi64
+  #define _mm256_unpacklo_epi64(a, b) simde_mm256_unpacklo_epi64(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_unpackhi_epi8 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_unpackhi_epi8(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_unpackhi_epi8(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_unpackhi_epi8(a_.m128i[1], b_.m128i[1]);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.i8 = SIMDE_SHUFFLE_VECTOR_(8, 32, a_.i8, b_.i8,
+           8, 40,  9, 41, 10, 42, 11, 43,
+          12, 44, 13, 45, 14, 46, 15, 47,
+          24, 56, 25, 57, 26, 58, 27, 59,
+          28, 60, 29, 61, 30, 62, 31, 63);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0]) / 2) ; i++) {
+        r_.i8[2 * i] = a_.i8[i + 8 + ~(~i | 7)];
+        r_.i8[2 * i + 1] = b_.i8[i + 8 + ~(~i | 7)];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_unpackhi_epi8
+  #define _mm256_unpackhi_epi8(a, b) simde_mm256_unpackhi_epi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_unpackhi_epi16 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_unpackhi_epi16(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_unpackhi_epi16(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_unpackhi_epi16(a_.m128i[1], b_.m128i[1]);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.i16 = SIMDE_SHUFFLE_VECTOR_(16, 32, a_.i16, b_.i16,
+         4, 20,  5, 21,  6, 22,  7, 23,
+        12, 28, 13, 29, 14, 30, 15, 31);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0]) / 2) ; i++) {
+        r_.i16[2 * i] = a_.i16[i + 4 + ~(~i | 3)];
+        r_.i16[2 * i + 1] = b_.i16[i + 4 + ~(~i | 3)];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_unpackhi_epi16
+  #define _mm256_unpackhi_epi16(a, b) simde_mm256_unpackhi_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_unpackhi_epi32 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_unpackhi_epi32(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_unpackhi_epi32(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_unpackhi_epi32(a_.m128i[1], b_.m128i[1]);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.i32 = SIMDE_SHUFFLE_VECTOR_(32, 32, a_.i32, b_.i32,
+                                    2, 10, 3, 11, 6, 14, 7, 15);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0]) / 2) ; i++) {
+        r_.i32[2 * i] = a_.i32[i + 2 + ~(~i | 1)];
+        r_.i32[2 * i + 1] = b_.i32[i + 2 + ~(~i | 1)];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_unpackhi_epi32
+  #define _mm256_unpackhi_epi32(a, b) simde_mm256_unpackhi_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_unpackhi_epi64 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_unpackhi_epi64(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_unpackhi_epi64(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_unpackhi_epi64(a_.m128i[1], b_.m128i[1]);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.i64 = SIMDE_SHUFFLE_VECTOR_(64, 32, a_.i64, b_.i64, 1, 5, 3, 7);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0]) / 2) ; i++) {
+        r_.i64[2 * i] = a_.i64[2 * i + 1];
+        r_.i64[2 * i + 1] = b_.i64[2 * i + 1];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_unpackhi_epi64
+  #define _mm256_unpackhi_epi64(a, b) simde_mm256_unpackhi_epi64(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_xor_si256 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_xor_si256(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if SIMDE_NATURAL_INT_VECTOR_SIZE_LE(128)
+      r_.m128i[0] = simde_mm_xor_si128(a_.m128i[0], b_.m128i[0]);
+      r_.m128i[1] = simde_mm_xor_si128(a_.m128i[1], b_.m128i[1]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32f = a_.i32f ^ b_.i32f;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = a_.i64[i] ^ b_.i64[i];
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_AVX2_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_xor_si256
+  #define _mm256_xor_si256(a, b) simde_mm256_xor_si256(a, b)
+#endif
+
+SIMDE_END_DECLS_
+
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_X86_AVX2_H) */
diff --git a/external_libs/pgenlib/simde/x86/clmul.h b/external_libs/pgenlib/simde/x86/clmul.h
new file mode 100644
index 0000000..e2d8b4c
--- /dev/null
+++ b/external_libs/pgenlib/simde/x86/clmul.h
@@ -0,0 +1,387 @@
+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2020      Evan Nemerson <evan@nemerson.com>
+ *   2016      Thomas Pornin <pornin@bolet.org>
+ */
+
+/* The portable version is based on the implementation in BearSSL,
+ * which is MIT licensed, constant-time / branch-free, and documented
+ * at https://www.bearssl.org/constanttime.html (specifically, we use
+ * the implementation from ghash_ctmul64.c). */
+
+#if !defined(SIMDE_X86_CLMUL_H)
+#define SIMDE_X86_CLMUL_H
+
+#include "avx512/set.h"
+#include "avx512/setzero.h"
+
+#if !defined(SIMDE_X86_PCLMUL_NATIVE) && defined(SIMDE_ENABLE_NATIVE_ALIASES)
+#  define SIMDE_X86_PCLMUL_ENABLE_NATIVE_ALIASES
+#endif
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+uint64_t
+simde_x_clmul_u64(uint64_t x, uint64_t y) {
+  uint64_t x0, x1, x2, x3;
+  uint64_t y0, y1, y2, y3;
+  uint64_t z0, z1, z2, z3;
+
+  x0 = x & UINT64_C(0x1111111111111111);
+  x1 = x & UINT64_C(0x2222222222222222);
+  x2 = x & UINT64_C(0x4444444444444444);
+  x3 = x & UINT64_C(0x8888888888888888);
+  y0 = y & UINT64_C(0x1111111111111111);
+  y1 = y & UINT64_C(0x2222222222222222);
+  y2 = y & UINT64_C(0x4444444444444444);
+  y3 = y & UINT64_C(0x8888888888888888);
+
+  z0 = (x0 * y0) ^ (x1 * y3) ^ (x2 * y2) ^ (x3 * y1);
+  z1 = (x0 * y1) ^ (x1 * y0) ^ (x2 * y3) ^ (x3 * y2);
+  z2 = (x0 * y2) ^ (x1 * y1) ^ (x2 * y0) ^ (x3 * y3);
+  z3 = (x0 * y3) ^ (x1 * y2) ^ (x2 * y1) ^ (x3 * y0);
+
+  z0 &= UINT64_C(0x1111111111111111);
+  z1 &= UINT64_C(0x2222222222222222);
+  z2 &= UINT64_C(0x4444444444444444);
+  z3 &= UINT64_C(0x8888888888888888);
+
+  return z0 | z1 | z2 | z3;
+}
+
+static uint64_t
+simde_x_bitreverse_u64(uint64_t v) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    uint8x8_t bytes = vreinterpret_u8_u64(vmov_n_u64(v));
+    bytes = vrbit_u8(bytes);
+    bytes = vrev64_u8(bytes);
+    return vget_lane_u64(vreinterpret_u64_u8(bytes), 0);
+  #elif defined(SIMDE_X86_GFNI_NATIVE)
+    /* I don't think there is (or likely will ever be) a CPU with GFNI
+     * but not pclmulq, but this may be useful for things other than
+     * _mm_clmulepi64_si128. */
+    __m128i vec = _mm_cvtsi64_si128(HEDLEY_STATIC_CAST(int64_t, v));
+
+    /* Reverse bits within each byte */
+    vec = _mm_gf2p8affine_epi64_epi8(vec, _mm_cvtsi64_si128(HEDLEY_STATIC_CAST(int64_t, UINT64_C(0x8040201008040201))), 0);
+
+    /* Reverse bytes */
+    #if defined(SIMDE_X86_SSSE3_NATIVE)
+      vec = _mm_shuffle_epi8(vec, _mm_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7));
+    #else
+      vec = _mm_or_si128(_mm_slli_epi16(vec, 8), _mm_srli_epi16(vec, 8));
+      vec = _mm_shufflelo_epi16(vec, _MM_SHUFFLE(0, 1, 2, 3));
+      vec = _mm_shufflehi_epi16(vec, _MM_SHUFFLE(0, 1, 2, 3));
+    #endif
+
+    return HEDLEY_STATIC_CAST(uint64_t, _mm_cvtsi128_si64(vec));
+  #elif HEDLEY_HAS_BUILTIN(__builtin_bitreverse64)
+    return __builtin_bitreverse64(v);
+  #else
+    v = ((v >>  1) & UINT64_C(0x5555555555555555)) | ((v & UINT64_C(0x5555555555555555)) <<  1);
+    v = ((v >>  2) & UINT64_C(0x3333333333333333)) | ((v & UINT64_C(0x3333333333333333)) <<  2);
+    v = ((v >>  4) & UINT64_C(0x0F0F0F0F0F0F0F0F)) | ((v & UINT64_C(0x0F0F0F0F0F0F0F0F)) <<  4);
+    v = ((v >>  8) & UINT64_C(0x00FF00FF00FF00FF)) | ((v & UINT64_C(0x00FF00FF00FF00FF)) <<  8);
+    v = ((v >> 16) & UINT64_C(0x0000FFFF0000FFFF)) | ((v & UINT64_C(0x0000FFFF0000FFFF)) << 16);
+    return (v >> 32) | (v << 32);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_clmulepi64_si128 (simde__m128i a, simde__m128i b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT(imm8) {
+  simde__m128i_private
+    a_ = simde__m128i_to_private(a),
+    b_ = simde__m128i_to_private(b),
+    r_;
+
+  #if SIMDE_NATURAL_VECTOR_SIZE_GE(128)
+    #if defined(SIMDE_SHUFFLE_VECTOR_)
+      switch (imm8 & 0x11) {
+        case 0x00:
+          b_.u64 = SIMDE_SHUFFLE_VECTOR_(64, 16, b_.u64, b_.u64, 0, 0);
+          a_.u64 = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.u64, a_.u64, 0, 0);
+          break;
+        case 0x01:
+          b_.u64 = SIMDE_SHUFFLE_VECTOR_(64, 16, b_.u64, b_.u64, 0, 0);
+          a_.u64 = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.u64, a_.u64, 1, 1);
+          break;
+        case 0x10:
+          b_.u64 = SIMDE_SHUFFLE_VECTOR_(64, 16, b_.u64, b_.u64, 1, 1);
+          a_.u64 = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.u64, a_.u64, 0, 0);
+          break;
+        case 0x11:
+          b_.u64 = SIMDE_SHUFFLE_VECTOR_(64, 16, b_.u64, b_.u64, 1, 1);
+          a_.u64 = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.u64, a_.u64, 1, 1);
+          break;
+      }
+    #else
+      {
+        const uint64_t A = a_.u64[(imm8     ) & 1];
+        const uint64_t B = b_.u64[(imm8 >> 4) & 1];
+
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(a_.u64) / sizeof(a_.u64[0])) ; i++) {
+          a_.u64[i] = A;
+          b_.u64[i] = B;
+        }
+      }
+    #endif
+
+    simde__m128i_private reversed_;
+    {
+      #if defined(SIMDE_SHUFFLE_VECTOR_)
+        reversed_.u64 = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.u64, b_.u64, 1, 3);
+      #else
+        reversed_.u64[0] = a_.u64[1];
+        reversed_.u64[1] = b_.u64[1];
+      #endif
+
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(reversed_.u64) / sizeof(reversed_.u64[0])) ; i++) {
+        reversed_.u64[i] = simde_x_bitreverse_u64(reversed_.u64[i]);
+      }
+    }
+
+    #if defined(SIMDE_SHUFFLE_VECTOR_)
+      a_.u64 = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.u64, reversed_.u64, 0, 2);
+      b_.u64 = SIMDE_SHUFFLE_VECTOR_(64, 16, b_.u64, reversed_.u64, 1, 3);
+    #else
+      a_.u64[1] = reversed_.u64[0];
+      b_.u64[1] = reversed_.u64[1];
+    #endif
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(reversed_.u64) / sizeof(reversed_.u64[0])) ; i++) {
+      r_.u64[i] = simde_x_clmul_u64(a_.u64[i], b_.u64[i]);
+    }
+
+    r_.u64[1] = simde_x_bitreverse_u64(r_.u64[1]) >> 1;
+  #else
+    r_.u64[0] =                        simde_x_clmul_u64(                       a_.u64[imm8 & 1],                         b_.u64[(imm8 >> 4) & 1]);
+    r_.u64[1] = simde_x_bitreverse_u64(simde_x_clmul_u64(simde_x_bitreverse_u64(a_.u64[imm8 & 1]), simde_x_bitreverse_u64(b_.u64[(imm8 >> 4) & 1]))) >> 1;
+  #endif
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_PCLMUL_NATIVE)
+  #if defined(HEDLEY_MCST_LCC_VERSION)
+    #define simde_mm_clmulepi64_si128(a, b, imm8) (__extension__ ({ \
+      SIMDE_LCC_DISABLE_DEPRECATED_WARNINGS \
+      _mm_clmulepi64_si128((a), (b), (imm8)); \
+      SIMDE_LCC_REVERT_DEPRECATED_WARNINGS \
+    }))
+  #else
+    #define simde_mm_clmulepi64_si128(a, b, imm8) _mm_clmulepi64_si128(a, b, imm8)
+  #endif
+#elif defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_AES) && !defined(__clang__)
+  #define simde_mm_clmulepi64_si128(a, b, imm8) \
+    simde__m128i_from_neon_u64( \
+      vreinterpretq_u64_p128( \
+        vmull_p64( \
+          vgetq_lane_p64(vreinterpretq_p64_u64(simde__m128i_to_neon_u64(a)), (imm8     ) & 1), \
+          vgetq_lane_p64(vreinterpretq_p64_u64(simde__m128i_to_neon_u64(b)), (imm8 >> 4) & 1) \
+        ) \
+      ) \
+    )
+#endif
+#if defined(SIMDE_X86_PCLMUL_ENABLE_NATIVE_ALIASES)
+  #undef _mm_clmulepi64_si128
+  #define _mm_clmulepi64_si128(a, b, imm8) simde_mm_clmulepi64_si128(a, b, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_clmulepi64_epi128 (simde__m256i a, simde__m256i b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT(imm8) {
+  simde__m256i_private
+    a_ = simde__m256i_to_private(a),
+    b_ = simde__m256i_to_private(b),
+    r_;
+
+  simde__m128i_private a_lo_, b_lo_, r_lo_, a_hi_, b_hi_, r_hi_;
+
+  #if HEDLEY_HAS_BUILTIN(__builtin_shufflevector) && !defined(HEDLEY_IBM_VERSION)
+    switch (imm8 & 0x01) {
+      case 0x00:
+        a_lo_.u64 = __builtin_shufflevector(a_.u64, a_.u64, 0, 2);
+        break;
+      case 0x01:
+        a_lo_.u64 = __builtin_shufflevector(a_.u64, a_.u64, 1, 3);
+        break;
+    }
+    switch (imm8 & 0x10) {
+      case 0x00:
+        b_lo_.u64 = __builtin_shufflevector(b_.u64, b_.u64, 0, 2);
+        break;
+      case 0x10:
+        b_lo_.u64 = __builtin_shufflevector(b_.u64, b_.u64, 1, 3);
+        break;
+    }
+  #else
+    a_lo_.u64[0] = a_.u64[((imm8 >> 0) & 1) + 0];
+    a_lo_.u64[1] = a_.u64[((imm8 >> 0) & 1) + 2];
+    b_lo_.u64[0] = b_.u64[((imm8 >> 4) & 1) + 0];
+    b_lo_.u64[1] = b_.u64[((imm8 >> 4) & 1) + 2];
+  #endif
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_hi_.u64) / sizeof(r_hi_.u64[0])) ; i++) {
+    a_hi_.u64[i] = simde_x_bitreverse_u64(a_lo_.u64[i]);
+    b_hi_.u64[i] = simde_x_bitreverse_u64(b_lo_.u64[i]);
+
+    r_lo_.u64[i] = simde_x_clmul_u64(a_lo_.u64[i], b_lo_.u64[i]);
+    r_hi_.u64[i] = simde_x_clmul_u64(a_hi_.u64[i], b_hi_.u64[i]);
+
+    r_hi_.u64[i] = simde_x_bitreverse_u64(r_hi_.u64[i]) >> 1;
+  }
+
+  #if HEDLEY_HAS_BUILTIN(__builtin_shufflevector) && !defined(HEDLEY_IBM_VERSION)
+    r_.u64 = __builtin_shufflevector(r_lo_.u64, r_hi_.u64, 0, 2, 1, 3);
+  #elif defined(SIMDE_SHUFFLE_VECTOR_)
+    r_ = simde__m256i_to_private(simde_mm256_set_m128i(simde__m128i_from_private(r_hi_), simde__m128i_from_private(r_lo_)));
+    r_.u64 = SIMDE_SHUFFLE_VECTOR_(64, 32, r_.u64, r_.u64, 0, 2, 1, 3);
+  #else
+    r_.u64[0] = r_lo_.u64[0];
+    r_.u64[1] = r_hi_.u64[0];
+    r_.u64[2] = r_lo_.u64[1];
+    r_.u64[3] = r_hi_.u64[1];
+  #endif
+
+  return simde__m256i_from_private(r_);
+}
+#if defined(SIMDE_X86_VPCLMULQDQ_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE)
+  #define simde_mm256_clmulepi64_epi128(a, b, imm8) _mm256_clmulepi64_epi128(a, b, imm8)
+#endif
+#if defined(SIMDE_X86_VPCLMULQDQ_ENABLE_NATIVE_ALIASES) && defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_clmulepi64_epi128
+  #define _mm256_clmulepi64_epi128(a, b, imm8) simde_mm256_clmulepi64_epi128(a, b, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512i
+simde_mm512_clmulepi64_epi128 (simde__m512i a, simde__m512i b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT(imm8) {
+  simde__m512i_private
+    a_ = simde__m512i_to_private(a),
+    b_ = simde__m512i_to_private(b),
+    r_;
+
+  #if defined(HEDLEY_MSVC_VERSION)
+    r_ = simde__m512i_to_private(simde_mm512_setzero_si512());
+  #endif
+  #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+    switch (imm8 & 0x11) {
+      case 0x00:
+        r_.m256i[0] = simde_mm256_clmulepi64_epi128(a_.m256i[0], b_.m256i[0], 0x00);
+        r_.m256i[1] = simde_mm256_clmulepi64_epi128(a_.m256i[1], b_.m256i[1], 0x00);
+        break;
+      case 0x01:
+        r_.m256i[0] = simde_mm256_clmulepi64_epi128(a_.m256i[0], b_.m256i[0], 0x01);
+        r_.m256i[1] = simde_mm256_clmulepi64_epi128(a_.m256i[1], b_.m256i[1], 0x01);
+        break;
+      case 0x10:
+        r_.m256i[0] = simde_mm256_clmulepi64_epi128(a_.m256i[0], b_.m256i[0], 0x10);
+        r_.m256i[1] = simde_mm256_clmulepi64_epi128(a_.m256i[1], b_.m256i[1], 0x10);
+        break;
+      case 0x11:
+        r_.m256i[0] = simde_mm256_clmulepi64_epi128(a_.m256i[0], b_.m256i[0], 0x11);
+        r_.m256i[1] = simde_mm256_clmulepi64_epi128(a_.m256i[1], b_.m256i[1], 0x11);
+        break;
+    }
+  #else
+    simde__m256i_private a_lo_, b_lo_, r_lo_, a_hi_, b_hi_, r_hi_;
+
+    #if HEDLEY_HAS_BUILTIN(__builtin_shufflevector) && !defined(HEDLEY_IBM_VERSION)
+      switch (imm8 & 0x01) {
+        case 0x00:
+          a_lo_.u64 = __builtin_shufflevector(a_.u64, a_.u64, 0, 2, 4, 6);
+          break;
+        case 0x01:
+          a_lo_.u64 = __builtin_shufflevector(a_.u64, a_.u64, 1, 3, 5, 7);
+          break;
+      }
+      switch (imm8 & 0x10) {
+        case 0x00:
+          b_lo_.u64 = __builtin_shufflevector(b_.u64, b_.u64, 0, 2, 4, 6);
+          break;
+        case 0x10:
+          b_lo_.u64 = __builtin_shufflevector(b_.u64, b_.u64, 1, 3, 5, 7);
+          break;
+      }
+    #else
+      a_lo_.u64[0] = a_.u64[((imm8 >> 0) & 1) + 0];
+      a_lo_.u64[1] = a_.u64[((imm8 >> 0) & 1) + 2];
+      a_lo_.u64[2] = a_.u64[((imm8 >> 0) & 1) + 4];
+      a_lo_.u64[3] = a_.u64[((imm8 >> 0) & 1) + 6];
+      b_lo_.u64[0] = b_.u64[((imm8 >> 4) & 1) + 0];
+      b_lo_.u64[1] = b_.u64[((imm8 >> 4) & 1) + 2];
+      b_lo_.u64[2] = b_.u64[((imm8 >> 4) & 1) + 4];
+      b_lo_.u64[3] = b_.u64[((imm8 >> 4) & 1) + 6];
+    #endif
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_hi_.u64) / sizeof(r_hi_.u64[0])) ; i++) {
+      a_hi_.u64[i] = simde_x_bitreverse_u64(a_lo_.u64[i]);
+      b_hi_.u64[i] = simde_x_bitreverse_u64(b_lo_.u64[i]);
+
+      r_lo_.u64[i] = simde_x_clmul_u64(a_lo_.u64[i], b_lo_.u64[i]);
+      r_hi_.u64[i] = simde_x_clmul_u64(a_hi_.u64[i], b_hi_.u64[i]);
+
+      r_hi_.u64[i] = simde_x_bitreverse_u64(r_hi_.u64[i]) >> 1;
+    }
+
+    #if HEDLEY_HAS_BUILTIN(__builtin_shufflevector) && !defined(HEDLEY_IBM_VERSION)
+      r_.u64 = __builtin_shufflevector(r_lo_.u64, r_hi_.u64, 0, 4, 1, 5, 2, 6, 3, 7);
+    #else
+      r_.u64[0] = r_lo_.u64[0];
+      r_.u64[1] = r_hi_.u64[0];
+      r_.u64[2] = r_lo_.u64[1];
+      r_.u64[3] = r_hi_.u64[1];
+      r_.u64[4] = r_lo_.u64[2];
+      r_.u64[5] = r_hi_.u64[2];
+      r_.u64[6] = r_lo_.u64[3];
+      r_.u64[7] = r_hi_.u64[3];
+    #endif
+  #endif
+
+  return simde__m512i_from_private(r_);
+}
+#if defined(SIMDE_X86_VPCLMULQDQ_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+  #define simde_mm512_clmulepi64_epi128(a, b, imm8) _mm512_clmulepi64_epi128(a, b, imm8)
+#endif
+#if defined(SIMDE_X86_VPCLMULQDQ_ENABLE_NATIVE_ALIASES) && defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_clmulepi64_epi128
+  #define _mm512_clmulepi64_epi128(a, b, imm8) simde_mm512_clmulepi64_epi128(a, b, imm8)
+#endif
+
+SIMDE_END_DECLS_
+
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_X86_CLMUL_H) */
diff --git a/external_libs/pgenlib/simde/x86/f16c.h b/external_libs/pgenlib/simde/x86/f16c.h
new file mode 100644
index 0000000..9522bf6
--- /dev/null
+++ b/external_libs/pgenlib/simde/x86/f16c.h
@@ -0,0 +1,172 @@
+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2021      Evan Nemerson <evan@nemerson.com>
+ */
+
+#include "../simde-common.h"
+#include "../simde-math.h"
+#include "../simde-f16.h"
+
+#if !defined(SIMDE_X86_F16C_H)
+#define SIMDE_X86_F16C_H
+
+#include "avx.h"
+
+#if !defined(SIMDE_X86_PF16C_NATIVE) && defined(SIMDE_ENABLE_NATIVE_ALIASES)
+#  define SIMDE_X86_PF16C_ENABLE_NATIVE_ALIASES
+#endif
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_cvtps_ph(simde__m128 a, const int imm8) {
+  simde__m128_private a_ = simde__m128_to_private(a);
+  simde__m128i_private r_ = simde__m128i_to_private(simde_mm_setzero_si128());
+
+  HEDLEY_STATIC_CAST(void, imm8);
+
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
+    r_.neon_f16 = vcombine_f16(vcvt_f16_f32(a_.neon_f32), vdup_n_f16(SIMDE_FLOAT16_C(0.0)));
+  #elif defined(SIMDE_FLOAT16_VECTOR)
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(a_.f32) / sizeof(a_.f32[0])) ; i++) {
+      r_.f16[i] = simde_float16_from_float32(a_.f32[i]);
+    }
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(a_.f32) / sizeof(a_.f32[0])) ; i++) {
+      r_.u16[i] = simde_float16_as_uint16(simde_float16_from_float32(a_.f32[i]));
+    }
+  #endif
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_F16C_NATIVE)
+  #define simde_mm_cvtps_ph(a, imm8) _mm_cvtps_ph(a, imm8)
+#endif
+#if defined(SIMDE_X86_F16C_ENABLE_NATIVE_ALIASES)
+  #define _mm_cvtps_ph(a, sae) simde_mm_cvtps_ph(a, sae)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cvtph_ps(simde__m128i a) {
+  #if defined(SIMDE_X86_F16C_NATIVE)
+    return _mm_cvtph_ps(a);
+  #else
+    simde__m128i_private a_ = simde__m128i_to_private(a);
+    simde__m128_private r_;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
+      r_.neon_f32 = vcvt_f32_f16(vget_low_f16(a_.neon_f16));
+    #elif defined(SIMDE_FLOAT16_VECTOR)
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(a_.f32) / sizeof(a_.f32[0])) ; i++) {
+        r_.f32[i] = simde_float16_to_float32(a_.f16[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(a_.f32) / sizeof(a_.f32[0])) ; i++) {
+        r_.f32[i] = simde_float16_to_float32(simde_uint16_as_float16(a_.u16[i]));
+      }
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_F16C_ENABLE_NATIVE_ALIASES)
+  #define _mm_cvtph_ps(a) simde_mm_cvtph_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm256_cvtps_ph(simde__m256 a, const int imm8) {
+  simde__m256_private a_ = simde__m256_to_private(a);
+  simde__m128i_private r_;
+
+  HEDLEY_STATIC_CAST(void, imm8);
+
+  #if defined(SIMDE_FLOAT16_VECTOR)
+    SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(a_.f32) / sizeof(a_.f32[0])) ; i++) {
+        r_.f16[i] = simde_float16_from_float32(a_.f32[i]);
+      }
+  #else
+    SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(a_.f32) / sizeof(a_.f32[0])) ; i++) {
+        r_.u16[i] = simde_float16_as_uint16(simde_float16_from_float32(a_.f32[i]));
+      }
+  #endif
+
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_F16C_NATIVE)
+  #define simde_mm256_cvtps_ph(a, imm8) _mm256_cvtps_ph(a, imm8)
+#endif
+#if defined(SIMDE_X86_F16C_ENABLE_NATIVE_ALIASES)
+  #define _mm256_cvtps_ph(a, imm8) simde_mm256_cvtps_ph(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_cvtph_ps(simde__m128i a) {
+  #if defined(SIMDE_X86_F16C_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_cvtph_ps(a);
+  #elif defined(SIMDE_X86_F16C_NATIVE)
+    return _mm256_setr_m128(
+      _mm_cvtph_ps(a),
+      _mm_cvtph_ps(_mm_castps_si128(_mm_permute_ps(_mm_castsi128_ps(a), 0xee)))
+    );
+  #else
+    simde__m128i_private a_ = simde__m128i_to_private(a);
+    simde__m256_private r_;
+
+    #if defined(SIMDE_FLOAT16_VECTOR)
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_float16_to_float32(a_.f16[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_float16_to_float32(simde_uint16_as_float16(a_.u16[i]));
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_F16C_ENABLE_NATIVE_ALIASES)
+  #define _mm256_cvtph_ps(a) simde_mm256_cvtph_ps(a)
+#endif
+
+SIMDE_END_DECLS_
+
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_X86_F16C_H) */
diff --git a/external_libs/pgenlib/simde/x86/fma.h b/external_libs/pgenlib/simde/x86/fma.h
new file mode 100644
index 0000000..630efc5
--- /dev/null
+++ b/external_libs/pgenlib/simde/x86/fma.h
@@ -0,0 +1,732 @@
+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2019      Evan Nemerson <evan@nemerson.com>
+ */
+
+#if !defined(SIMDE_X86_FMA_H)
+#define SIMDE_X86_FMA_H
+
+#include "avx.h"
+
+#if !defined(SIMDE_X86_FMA_NATIVE) && defined(SIMDE_ENABLE_NATIVE_ALIASES)
+#  define SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES
+#endif
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_fmadd_pd (simde__m128d a, simde__m128d b, simde__m128d c) {
+  #if defined(SIMDE_X86_FMA_NATIVE)
+    return _mm_fmadd_pd(a, b, c);
+  #else
+    simde__m128d_private
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b),
+      c_ = simde__m128d_to_private(c),
+      r_;
+
+    #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_f64 = vec_madd(a_.altivec_f64, b_.altivec_f64, c_.altivec_f64);
+    #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f64 = vfmaq_f64(c_.neon_f64, b_.neon_f64, a_.neon_f64);
+    #elif defined(simde_math_fma) && (defined(__FP_FAST_FMA) || defined(FP_FAST_FMA))
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_fma(a_.f64[i], b_.f64[i], c_.f64[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = (a_.f64[i] * b_.f64[i]) + c_.f64[i];
+      }
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES)
+  #undef _mm_fmadd_pd
+  #define _mm_fmadd_pd(a, b, c) simde_mm_fmadd_pd(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_fmadd_pd (simde__m256d a, simde__m256d b, simde__m256d c) {
+  #if defined(SIMDE_X86_FMA_NATIVE)
+    return _mm256_fmadd_pd(a, b, c);
+  #else
+    return simde_mm256_add_pd(simde_mm256_mul_pd(a, b), c);
+  #endif
+}
+#if defined(SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_fmadd_pd
+  #define _mm256_fmadd_pd(a, b, c) simde_mm256_fmadd_pd(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_fmadd_ps (simde__m128 a, simde__m128 b, simde__m128 c) {
+  #if defined(SIMDE_X86_FMA_NATIVE)
+    return _mm_fmadd_ps(a, b, c);
+  #else
+    simde__m128_private
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b),
+      c_ = simde__m128_to_private(c),
+      r_;
+
+    #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
+      r_.altivec_f32 = vec_madd(a_.altivec_f32, b_.altivec_f32, c_.altivec_f32);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARCH_ARM_FMA)
+      r_.neon_f32 = vfmaq_f32(c_.neon_f32, b_.neon_f32, a_.neon_f32);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_f32 = vmlaq_f32(c_.neon_f32, b_.neon_f32, a_.neon_f32);
+    #elif defined(simde_math_fmaf) && (defined(__FP_FAST_FMAF) || defined(FP_FAST_FMAF))
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_fmaf(a_.f32[i], b_.f32[i], c_.f32[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = (a_.f32[i] * b_.f32[i]) + c_.f32[i];
+      }
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES)
+  #undef _mm_fmadd_ps
+  #define _mm_fmadd_ps(a, b, c) simde_mm_fmadd_ps(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_fmadd_ps (simde__m256 a, simde__m256 b, simde__m256 c) {
+  #if defined(SIMDE_X86_FMA_NATIVE)
+    return _mm256_fmadd_ps(a, b, c);
+  #elif SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+    simde__m256_private
+      a_ = simde__m256_to_private(a),
+      b_ = simde__m256_to_private(b),
+      c_ = simde__m256_to_private(c),
+      r_;
+
+    for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+      r_.m128[i] = simde_mm_fmadd_ps(a_.m128[i], b_.m128[i], c_.m128[i]);
+    }
+
+    return simde__m256_from_private(r_);
+  #else
+    return simde_mm256_add_ps(simde_mm256_mul_ps(a, b), c);
+  #endif
+}
+#if defined(SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_fmadd_ps
+  #define _mm256_fmadd_ps(a, b, c) simde_mm256_fmadd_ps(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_fmadd_sd (simde__m128d a, simde__m128d b, simde__m128d c) {
+  #if defined(SIMDE_X86_FMA_NATIVE) && !defined(SIMDE_BUG_MCST_LCC_FMA_WRONG_RESULT)
+    return _mm_fmadd_sd(a, b, c);
+  #else
+    return simde_mm_add_sd(simde_mm_mul_sd(a, b), c);
+  #endif
+}
+#if defined(SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES)
+  #undef _mm_fmadd_sd
+  #define _mm_fmadd_sd(a, b, c) simde_mm_fmadd_sd(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_fmadd_ss (simde__m128 a, simde__m128 b, simde__m128 c) {
+  #if defined(SIMDE_X86_FMA_NATIVE) && !defined(SIMDE_BUG_MCST_LCC_FMA_WRONG_RESULT)
+    return _mm_fmadd_ss(a, b, c);
+  #else
+    return simde_mm_add_ss(simde_mm_mul_ss(a, b), c);
+  #endif
+}
+#if defined(SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES)
+  #undef _mm_fmadd_ss
+  #define _mm_fmadd_ss(a, b, c) simde_mm_fmadd_ss(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_fmaddsub_pd (simde__m128d a, simde__m128d b, simde__m128d c) {
+  #if defined(SIMDE_X86_FMA_NATIVE)
+    return _mm_fmaddsub_pd(a, b, c);
+  #else
+    return simde_mm_addsub_pd(simde_mm_mul_pd(a, b), c);
+  #endif
+}
+#if defined(SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES)
+  #undef _mm_fmaddsub_pd
+  #define _mm_fmaddsub_pd(a, b, c) simde_mm_fmaddsub_pd(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_fmaddsub_pd (simde__m256d a, simde__m256d b, simde__m256d c) {
+  #if defined(SIMDE_X86_FMA_NATIVE)
+    return _mm256_fmaddsub_pd(a, b, c);
+  #else
+    return simde_mm256_addsub_pd(simde_mm256_mul_pd(a, b), c);
+  #endif
+}
+#if defined(SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_fmaddsub_pd
+  #define _mm256_fmaddsub_pd(a, b, c) simde_mm256_fmaddsub_pd(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_fmaddsub_ps (simde__m128 a, simde__m128 b, simde__m128 c) {
+  #if defined(SIMDE_X86_FMA_NATIVE)
+    return _mm_fmaddsub_ps(a, b, c);
+  #else
+    return simde_mm_addsub_ps(simde_mm_mul_ps(a, b), c);
+  #endif
+}
+#if defined(SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES)
+  #undef _mm_fmaddsub_ps
+  #define _mm_fmaddsub_ps(a, b, c) simde_mm_fmaddsub_ps(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_fmaddsub_ps (simde__m256 a, simde__m256 b, simde__m256 c) {
+  #if defined(SIMDE_X86_FMA_NATIVE)
+    return _mm256_fmaddsub_ps(a, b, c);
+  #else
+    return simde_mm256_addsub_ps(simde_mm256_mul_ps(a, b), c);
+  #endif
+}
+#if defined(SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_fmaddsub_ps
+  #define _mm256_fmaddsub_ps(a, b, c) simde_mm256_fmaddsub_ps(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_fmsub_pd (simde__m128d a, simde__m128d b, simde__m128d c) {
+  #if defined(SIMDE_X86_FMA_NATIVE)
+    return _mm_fmsub_pd(a, b, c);
+  #else
+    return simde_mm_sub_pd(simde_mm_mul_pd(a, b), c);
+  #endif
+}
+#if defined(SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES)
+  #undef _mm_fmsub_pd
+  #define _mm_fmsub_pd(a, b, c) simde_mm_fmsub_pd(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_fmsub_pd (simde__m256d a, simde__m256d b, simde__m256d c) {
+  #if defined(SIMDE_X86_FMA_NATIVE)
+    return _mm256_fmsub_pd(a, b, c);
+  #else
+    return simde_mm256_sub_pd(simde_mm256_mul_pd(a, b), c);
+  #endif
+}
+#if defined(SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_fmsub_pd
+  #define _mm256_fmsub_pd(a, b, c) simde_mm256_fmsub_pd(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_fmsub_ps (simde__m128 a, simde__m128 b, simde__m128 c) {
+  #if defined(SIMDE_X86_FMA_NATIVE)
+    return _mm_fmsub_ps(a, b, c);
+  #else
+    return simde_mm_sub_ps(simde_mm_mul_ps(a, b), c);
+  #endif
+}
+#if defined(SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES)
+  #undef _mm_fmsub_ps
+  #define _mm_fmsub_ps(a, b, c) simde_mm_fmsub_ps(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_fmsub_ps (simde__m256 a, simde__m256 b, simde__m256 c) {
+  #if defined(SIMDE_X86_FMA_NATIVE)
+    return _mm256_fmsub_ps(a, b, c);
+  #else
+    return simde_mm256_sub_ps(simde_mm256_mul_ps(a, b), c);
+  #endif
+}
+#if defined(SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_fmsub_ps
+  #define _mm256_fmsub_ps(a, b, c) simde_mm256_fmsub_ps(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_fmsub_sd (simde__m128d a, simde__m128d b, simde__m128d c) {
+  #if defined(SIMDE_X86_FMA_NATIVE) && !defined(SIMDE_BUG_MCST_LCC_FMA_WRONG_RESULT)
+    return _mm_fmsub_sd(a, b, c);
+  #else
+    return simde_mm_sub_sd(simde_mm_mul_sd(a, b), c);
+  #endif
+}
+#if defined(SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES)
+  #undef _mm_fmsub_sd
+  #define _mm_fmsub_sd(a, b, c) simde_mm_fmsub_sd(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_fmsub_ss (simde__m128 a, simde__m128 b, simde__m128 c) {
+  #if defined(SIMDE_X86_FMA_NATIVE) && !defined(SIMDE_BUG_MCST_LCC_FMA_WRONG_RESULT)
+    return _mm_fmsub_ss(a, b, c);
+  #else
+    return simde_mm_sub_ss(simde_mm_mul_ss(a, b), c);
+  #endif
+}
+#if defined(SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES)
+  #undef _mm_fmsub_ss
+  #define _mm_fmsub_ss(a, b, c) simde_mm_fmsub_ss(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_fmsubadd_pd (simde__m128d a, simde__m128d b, simde__m128d c) {
+  #if defined(SIMDE_X86_FMA_NATIVE)
+    return _mm_fmsubadd_pd(a, b, c);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b),
+      c_ = simde__m128d_to_private(c);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i += 2) {
+      r_.f64[  i  ] = (a_.f64[  i  ] * b_.f64[  i  ]) + c_.f64[  i  ];
+      r_.f64[i + 1] = (a_.f64[i + 1] * b_.f64[i + 1]) - c_.f64[i + 1];
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES)
+  #undef _mm_fmsubadd_pd
+  #define _mm_fmsubadd_pd(a, b, c) simde_mm_fmsubadd_pd(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_fmsubadd_pd (simde__m256d a, simde__m256d b, simde__m256d c) {
+  #if defined(SIMDE_X86_FMA_NATIVE)
+    return _mm256_fmsubadd_pd(a, b, c);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a),
+      b_ = simde__m256d_to_private(b),
+      c_ = simde__m256d_to_private(c);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i += 2) {
+      r_.f64[  i  ] = (a_.f64[  i  ] * b_.f64[  i  ]) + c_.f64[  i  ];
+      r_.f64[i + 1] = (a_.f64[i + 1] * b_.f64[i + 1]) - c_.f64[i + 1];
+    }
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_fmsubadd_pd
+  #define _mm256_fmsubadd_pd(a, b, c) simde_mm256_fmsubadd_pd(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_fmsubadd_ps (simde__m128 a, simde__m128 b, simde__m128 c) {
+  #if defined(SIMDE_X86_FMA_NATIVE)
+    return _mm_fmsubadd_ps(a, b, c);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b),
+      c_ = simde__m128_to_private(c);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i += 2) {
+      r_.f32[  i  ] = (a_.f32[  i  ] * b_.f32[  i  ]) + c_.f32[  i  ];
+      r_.f32[i + 1] = (a_.f32[i + 1] * b_.f32[i + 1]) - c_.f32[i + 1];
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES)
+  #undef _mm_fmsubadd_ps
+  #define _mm_fmsubadd_ps(a, b, c) simde_mm_fmsubadd_ps(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_fmsubadd_ps (simde__m256 a, simde__m256 b, simde__m256 c) {
+  #if defined(SIMDE_X86_FMA_NATIVE)
+    return _mm256_fmsubadd_ps(a, b, c);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a),
+      b_ = simde__m256_to_private(b),
+      c_ = simde__m256_to_private(c);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i += 2) {
+      r_.f32[  i  ] = (a_.f32[  i  ] * b_.f32[  i  ]) + c_.f32[  i  ];
+      r_.f32[i + 1] = (a_.f32[i + 1] * b_.f32[i + 1]) - c_.f32[i + 1];
+    }
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_fmsubadd_ps
+  #define _mm256_fmsubadd_ps(a, b, c) simde_mm256_fmsubadd_ps(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_fnmadd_pd (simde__m128d a, simde__m128d b, simde__m128d c) {
+  #if defined(SIMDE_X86_FMA_NATIVE)
+    return _mm_fnmadd_pd(a, b, c);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b),
+      c_ = simde__m128d_to_private(c);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f64 = vfmsq_f64(c_.neon_f64, a_.neon_f64, b_.neon_f64);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = -(a_.f64[i] * b_.f64[i]) + c_.f64[i];
+      }
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES)
+  #undef _mm_fnmadd_pd
+  #define _mm_fnmadd_pd(a, b, c) simde_mm_fnmadd_pd(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_fnmadd_pd (simde__m256d a, simde__m256d b, simde__m256d c) {
+  #if defined(SIMDE_X86_FMA_NATIVE)
+    return _mm256_fnmadd_pd(a, b, c);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a),
+      b_ = simde__m256d_to_private(b),
+      c_ = simde__m256d_to_private(c);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = -(a_.f64[i] * b_.f64[i]) + c_.f64[i];
+    }
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_fnmadd_pd
+  #define _mm256_fnmadd_pd(a, b, c) simde_mm256_fnmadd_pd(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_fnmadd_ps (simde__m128 a, simde__m128 b, simde__m128 c) {
+  #if defined(SIMDE_X86_FMA_NATIVE)
+    return _mm_fnmadd_ps(a, b, c);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b),
+      c_ = simde__m128_to_private(c);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARCH_ARM_FMA)
+      r_.neon_f32 = vfmsq_f32(c_.neon_f32, a_.neon_f32, b_.neon_f32);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_f32 = vmlsq_f32(c_.neon_f32, a_.neon_f32, b_.neon_f32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = -(a_.f32[i] * b_.f32[i]) + c_.f32[i];
+      }
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES)
+  #undef _mm_fnmadd_ps
+  #define _mm_fnmadd_ps(a, b, c) simde_mm_fnmadd_ps(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_fnmadd_ps (simde__m256 a, simde__m256 b, simde__m256 c) {
+  #if defined(SIMDE_X86_FMA_NATIVE)
+    return _mm256_fnmadd_ps(a, b, c);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a),
+      b_ = simde__m256_to_private(b),
+      c_ = simde__m256_to_private(c);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = -(a_.f32[i] * b_.f32[i]) + c_.f32[i];
+    }
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_fnmadd_ps
+  #define _mm256_fnmadd_ps(a, b, c) simde_mm256_fnmadd_ps(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_fnmadd_sd (simde__m128d a, simde__m128d b, simde__m128d c) {
+  #if defined(SIMDE_X86_FMA_NATIVE) && !defined(SIMDE_BUG_MCST_LCC_FMA_WRONG_RESULT)
+    return _mm_fnmadd_sd(a, b, c);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b),
+      c_ = simde__m128d_to_private(c);
+
+    r_ = a_;
+    r_.f64[0] = -(a_.f64[0] * b_.f64[0]) + c_.f64[0];
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES)
+  #undef _mm_fnmadd_sd
+  #define _mm_fnmadd_sd(a, b, c) simde_mm_fnmadd_sd(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_fnmadd_ss (simde__m128 a, simde__m128 b, simde__m128 c) {
+  #if defined(SIMDE_X86_FMA_NATIVE) && !defined(SIMDE_BUG_MCST_LCC_FMA_WRONG_RESULT)
+    return _mm_fnmadd_ss(a, b, c);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b),
+      c_ = simde__m128_to_private(c);
+
+    r_ = a_;
+    r_.f32[0] = -(a_.f32[0] * b_.f32[0]) + c_.f32[0];
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES)
+  #undef _mm_fnmadd_ss
+  #define _mm_fnmadd_ss(a, b, c) simde_mm_fnmadd_ss(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_fnmsub_pd (simde__m128d a, simde__m128d b, simde__m128d c) {
+  #if defined(SIMDE_X86_FMA_NATIVE)
+    return _mm_fnmsub_pd(a, b, c);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b),
+      c_ = simde__m128d_to_private(c);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = -(a_.f64[i] * b_.f64[i]) - c_.f64[i];
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES)
+  #undef _mm_fnmsub_pd
+  #define _mm_fnmsub_pd(a, b, c) simde_mm_fnmsub_pd(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_fnmsub_pd (simde__m256d a, simde__m256d b, simde__m256d c) {
+  #if defined(SIMDE_X86_FMA_NATIVE)
+    return _mm256_fnmsub_pd(a, b, c);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a),
+      b_ = simde__m256d_to_private(b),
+      c_ = simde__m256d_to_private(c);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = -(a_.f64[i] * b_.f64[i]) - c_.f64[i];
+    }
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_fnmsub_pd
+  #define _mm256_fnmsub_pd(a, b, c) simde_mm256_fnmsub_pd(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_fnmsub_ps (simde__m128 a, simde__m128 b, simde__m128 c) {
+  #if defined(SIMDE_X86_FMA_NATIVE)
+    return _mm_fnmsub_ps(a, b, c);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b),
+      c_ = simde__m128_to_private(c);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = -(a_.f32[i] * b_.f32[i]) - c_.f32[i];
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES)
+  #undef _mm_fnmsub_ps
+  #define _mm_fnmsub_ps(a, b, c) simde_mm_fnmsub_ps(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_fnmsub_ps (simde__m256 a, simde__m256 b, simde__m256 c) {
+  #if defined(SIMDE_X86_FMA_NATIVE)
+    return _mm256_fnmsub_ps(a, b, c);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a),
+      b_ = simde__m256_to_private(b),
+      c_ = simde__m256_to_private(c);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = -(a_.f32[i] * b_.f32[i]) - c_.f32[i];
+    }
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_fnmsub_ps
+  #define _mm256_fnmsub_ps(a, b, c) simde_mm256_fnmsub_ps(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_fnmsub_sd (simde__m128d a, simde__m128d b, simde__m128d c) {
+  #if defined(SIMDE_X86_FMA_NATIVE) && !defined(SIMDE_BUG_MCST_LCC_FMA_WRONG_RESULT)
+    return _mm_fnmsub_sd(a, b, c);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b),
+      c_ = simde__m128d_to_private(c);
+
+    r_ = a_;
+    r_.f64[0] = -(a_.f64[0] * b_.f64[0]) - c_.f64[0];
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES)
+  #undef _mm_fnmsub_sd
+  #define _mm_fnmsub_sd(a, b, c) simde_mm_fnmsub_sd(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_fnmsub_ss (simde__m128 a, simde__m128 b, simde__m128 c) {
+  #if defined(SIMDE_X86_FMA_NATIVE) && !defined(SIMDE_BUG_MCST_LCC_FMA_WRONG_RESULT)
+    return _mm_fnmsub_ss(a, b, c);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b),
+      c_ = simde__m128_to_private(c);
+
+    r_ = simde__m128_to_private(a);
+    r_.f32[0] = -(a_.f32[0] * b_.f32[0]) - c_.f32[0];
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_FMA_ENABLE_NATIVE_ALIASES)
+  #undef _mm_fnmsub_ss
+  #define _mm_fnmsub_ss(a, b, c) simde_mm_fnmsub_ss(a, b, c)
+#endif
+
+SIMDE_END_DECLS_
+
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_X86_FMA_H) */
diff --git a/external_libs/pgenlib/simde/x86/gfni.h b/external_libs/pgenlib/simde/x86/gfni.h
new file mode 100644
index 0000000..5982a34
--- /dev/null
+++ b/external_libs/pgenlib/simde/x86/gfni.h
@@ -0,0 +1,1295 @@
+/* Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2020-2021 Christopher Moore <moore@free.fr>
+ *   2020      Evan Nemerson <evan@nemerson.com>
+ */
+
+#if !defined(SIMDE_X86_GFNI_H)
+#define SIMDE_X86_GFNI_H
+
+#include "avx512/add.h"
+#include "avx512/and.h"
+#include "avx512/broadcast.h"
+#include "avx512/cmpeq.h"
+#include "avx512/cmpge.h"
+#include "avx512/cmpgt.h"
+#include "avx512/cmplt.h"
+#include "avx512/extract.h"
+#include "avx512/insert.h"
+#include "avx512/kshift.h"
+#include "avx512/mov.h"
+#include "avx512/mov_mask.h"
+#include "avx512/permutex2var.h"
+#include "avx512/set.h"
+#include "avx512/set1.h"
+#include "avx512/setzero.h"
+#include "avx512/shuffle.h"
+#include "avx512/srli.h"
+#include "avx512/test.h"
+#include "avx512/xor.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+/* In all the *gf2p8affine* intrinsics the argument b must be a compile-time constant so we must use macros and simde_x_mm* helper functions */
+
+/* N.B. The _mm*gf2p8affineinv_epi64_epi8 and _mm*gf2p8mul_epi8 intrinsics are for a Field Generator Polynomial (FGP) (aka reduction polynomial) of 0x11B */
+/* Only the _mm*gf2p8affine_epi64_epi8 intrinsics do not assume this specific FGP */
+
+/* The field generator polynomial is 0x11B but we make the 0x100 bit implicit to fit inside 8 bits */
+#define SIMDE_X86_GFNI_FGP 0x1B
+
+/* Computing the inverse of a GF element is expensive so use this LUT for an FGP of 0x11B */
+
+static const union {
+  uint8_t      u8[256];
+  simde__m128i m128i[16];
+} simde_x_gf2p8inverse_lut = {
+  {
+   0x00, 0x01, 0x8d, 0xf6, 0xcb, 0x52, 0x7b, 0xd1, 0xe8, 0x4f, 0x29, 0xc0, 0xb0, 0xe1, 0xe5, 0xc7,
+   0x74, 0xb4, 0xaa, 0x4b, 0x99, 0x2b, 0x60, 0x5f, 0x58, 0x3f, 0xfd, 0xcc, 0xff, 0x40, 0xee, 0xb2,
+   0x3a, 0x6e, 0x5a, 0xf1, 0x55, 0x4d, 0xa8, 0xc9, 0xc1, 0x0a, 0x98, 0x15, 0x30, 0x44, 0xa2, 0xc2,
+   0x2c, 0x45, 0x92, 0x6c, 0xf3, 0x39, 0x66, 0x42, 0xf2, 0x35, 0x20, 0x6f, 0x77, 0xbb, 0x59, 0x19,
+   0x1d, 0xfe, 0x37, 0x67, 0x2d, 0x31, 0xf5, 0x69, 0xa7, 0x64, 0xab, 0x13, 0x54, 0x25, 0xe9, 0x09,
+   0xed, 0x5c, 0x05, 0xca, 0x4c, 0x24, 0x87, 0xbf, 0x18, 0x3e, 0x22, 0xf0, 0x51, 0xec, 0x61, 0x17,
+   0x16, 0x5e, 0xaf, 0xd3, 0x49, 0xa6, 0x36, 0x43, 0xf4, 0x47, 0x91, 0xdf, 0x33, 0x93, 0x21, 0x3b,
+   0x79, 0xb7, 0x97, 0x85, 0x10, 0xb5, 0xba, 0x3c, 0xb6, 0x70, 0xd0, 0x06, 0xa1, 0xfa, 0x81, 0x82,
+   0x83, 0x7e, 0x7f, 0x80, 0x96, 0x73, 0xbe, 0x56, 0x9b, 0x9e, 0x95, 0xd9, 0xf7, 0x02, 0xb9, 0xa4,
+   0xde, 0x6a, 0x32, 0x6d, 0xd8, 0x8a, 0x84, 0x72, 0x2a, 0x14, 0x9f, 0x88, 0xf9, 0xdc, 0x89, 0x9a,
+   0xfb, 0x7c, 0x2e, 0xc3, 0x8f, 0xb8, 0x65, 0x48, 0x26, 0xc8, 0x12, 0x4a, 0xce, 0xe7, 0xd2, 0x62,
+   0x0c, 0xe0, 0x1f, 0xef, 0x11, 0x75, 0x78, 0x71, 0xa5, 0x8e, 0x76, 0x3d, 0xbd, 0xbc, 0x86, 0x57,
+   0x0b, 0x28, 0x2f, 0xa3, 0xda, 0xd4, 0xe4, 0x0f, 0xa9, 0x27, 0x53, 0x04, 0x1b, 0xfc, 0xac, 0xe6,
+   0x7a, 0x07, 0xae, 0x63, 0xc5, 0xdb, 0xe2, 0xea, 0x94, 0x8b, 0xc4, 0xd5, 0x9d, 0xf8, 0x90, 0x6b,
+   0xb1, 0x0d, 0xd6, 0xeb, 0xc6, 0x0e, 0xcf, 0xad, 0x08, 0x4e, 0xd7, 0xe3, 0x5d, 0x50, 0x1e, 0xb3,
+   0x5b, 0x23, 0x38, 0x34, 0x68, 0x46, 0x03, 0x8c, 0xdd, 0x9c, 0x7d, 0xa0, 0xcd, 0x1a, 0x41, 0x1c
+  }
+};
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_x_mm_gf2p8matrix_multiply_epi64_epi8 (simde__m128i x, simde__m128i A) {
+  #if defined(SIMDE_X86_SSSE3_NATIVE)
+    const __m128i byte_select = _mm_setr_epi8(0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1);
+    const __m128i zero = _mm_setzero_si128();
+    __m128i r, a, p, X;
+
+    a = _mm_shuffle_epi8(A, _mm_setr_epi8(7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8));
+    X = x;
+    r = zero;
+
+    #if !defined(__INTEL_COMPILER)
+      SIMDE_VECTORIZE
+    #endif
+    for (int i = 0 ; i < 8 ; i++) {
+      p = _mm_insert_epi16(zero, _mm_movemask_epi8(a), 0);
+      p = _mm_shuffle_epi8(p, byte_select);
+      p = _mm_and_si128(p, _mm_cmpgt_epi8(zero, X));
+      r = _mm_xor_si128(r, p);
+      a = _mm_add_epi8(a, a);
+      X = _mm_add_epi8(X, X);
+    }
+
+    return r;
+  #elif defined(SIMDE_X86_SSE2_NATIVE)
+    const __m128i zero = _mm_setzero_si128();
+    __m128i r, a, p, X;
+
+    a = _mm_shufflehi_epi16(A, (0 << 6) + (1 << 4) + (2 << 2) + (3 << 0));
+    a = _mm_shufflelo_epi16(a, (0 << 6) + (1 << 4) + (2 << 2) + (3 << 0));
+    a = _mm_or_si128(_mm_slli_epi16(a, 8), _mm_srli_epi16(a, 8));
+    X = _mm_unpacklo_epi8(x, _mm_unpackhi_epi64(x, x));
+    r = zero;
+
+    #if !defined(__INTEL_COMPILER)
+      SIMDE_VECTORIZE
+    #endif
+    for (int i = 0 ; i < 8 ; i++) {
+      p = _mm_set1_epi16(HEDLEY_STATIC_CAST(short, _mm_movemask_epi8(a)));
+      p = _mm_and_si128(p, _mm_cmpgt_epi8(zero, X));
+      r = _mm_xor_si128(r, p);
+      a = _mm_add_epi8(a, a);
+      X = _mm_add_epi8(X, X);
+    }
+
+    return _mm_packus_epi16(_mm_srli_epi16(_mm_slli_epi16(r, 8), 8), _mm_srli_epi16(r, 8));
+  #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    static const uint8_t byte_interleave[16] = {0, 8, 1, 9, 2, 10, 3, 11, 4, 12, 5, 13, 6, 14, 7, 15};
+    static const uint8_t byte_deinterleave[16] = {0, 2, 4, 6, 8, 10, 12, 14, 1, 3, 5, 7, 9, 11, 13, 15};
+    static const uint8_t mask_d[16] = {128, 128, 64, 64, 32, 32, 16, 16, 8, 8, 4, 4, 2, 2, 1, 1};
+    const int8x16_t mask = vreinterpretq_s8_u8(vld1q_u8(mask_d));
+    int8x16_t r, a, t, X;
+
+    t = simde__m128i_to_neon_i8(A);
+    a = vqtbl1q_s8(t, vld1q_u8(byte_interleave));
+    t = simde__m128i_to_neon_i8(x);
+    X = vqtbl1q_s8(t, vld1q_u8(byte_interleave));
+    r = vdupq_n_s8(0);
+
+    #if !defined(__INTEL_COMPILER)
+      SIMDE_VECTORIZE
+    #endif
+    for (int i = 0 ; i < 8 ; i++) {
+      t = vshrq_n_s8(a, 7);
+      t = vandq_s8(t, mask);
+      t = vreinterpretq_s8_u16(vdupq_n_u16(vaddvq_u16(vreinterpretq_u16_s8(t))));
+      t = vandq_s8(t, vshrq_n_s8(X, 7));
+      r = veorq_s8(r, t);
+      a = vshlq_n_s8(a, 1);
+      X = vshlq_n_s8(X, 1);
+    }
+
+    r = vqtbl1q_s8(r, vld1q_u8(byte_deinterleave));
+    return simde__m128i_from_neon_i8(r);
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    static const uint8_t mask_d[16] = {128, 64, 32, 16, 8, 4, 2, 1, 128, 64, 32, 16, 8, 4, 2, 1};
+    const int8x16_t mask = vreinterpretq_s8_u8(vld1q_u8(mask_d));
+    int8x16_t r, a, t, X;
+    int16x8_t t16;
+    int32x4_t t32;
+
+    a = simde__m128i_to_neon_i8(A);
+    X = simde__m128i_to_neon_i8(x);
+    r = vdupq_n_s8(0);
+
+    #if !defined(__INTEL_COMPILER)
+      SIMDE_VECTORIZE
+    #endif
+    for (int i = 0 ; i < 8 ; i++) {
+      t = vshrq_n_s8(a, 7);
+      t = vandq_s8(t, mask);
+      t16 = vreinterpretq_s16_s8 (vorrq_s8 (t  , vrev64q_s8 (t  )));
+      t32 = vreinterpretq_s32_s16(vorrq_s16(t16, vrev64q_s16(t16)));
+      t   = vreinterpretq_s8_s32 (vorrq_s32(t32, vrev64q_s32(t32)));
+      t = vandq_s8(t, vshrq_n_s8(X, 7));
+      r = veorq_s8(r, t);
+      a = vshlq_n_s8(a, 1);
+      X = vshlq_n_s8(X, 1);
+    }
+
+    return simde__m128i_from_neon_i8(r);
+  #elif defined(SIMDE_ZARCH_ZVECTOR_14_NATIVE)
+    static const SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) byte_interleave = {0, 8, 1, 9, 2, 10, 3, 11, 4, 12, 5, 13, 6, 14, 7, 15};
+    static const SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) byte_deinterleave= {0, 2, 4, 6, 8, 10, 12, 14, 1, 3, 5, 7, 9, 11, 13, 15};
+    static const SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) bit_select = {0, 8, 16, 24, 32, 40, 48, 56, 64, 72, 80, 88, 96, 104, 112, 120};
+    static const SIMDE_POWER_ALTIVEC_VECTOR(signed char) zero = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
+    SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) a, p, r;
+    SIMDE_POWER_ALTIVEC_VECTOR(signed char) X;
+
+    X = simde__m128i_to_altivec_i8(x);
+    a = simde__m128i_to_altivec_u8(A);
+    X = vec_perm(X, X, byte_interleave);
+    r = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned char), zero);
+
+    #if !defined(__INTEL_COMPILER)
+      SIMDE_VECTORIZE
+    #endif
+    for (int i = 0 ; i < 8 ; i++) {
+      #if defined(SIMDE_BUG_CLANG_50932)
+        p = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned char),
+                              vec_bperm(HEDLEY_STATIC_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned __int128), a), bit_select));
+      #else
+        p = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned char), vec_bperm_u128(a, bit_select));
+      #endif
+      p = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned char),
+                                  vec_splat(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned short), p), 3));
+      p &= X < zero;
+      r ^= p;
+      a += a;
+      X += X;
+    }
+
+    r = vec_perm(r, r, byte_deinterleave);
+    return simde__m128i_from_altivec_u8(r);
+  #elif defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+    static const SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) mask = {128, 64, 32, 16, 8, 4, 2, 1, 128, 64, 32, 16, 8, 4, 2, 1};
+    static const SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) byte_select = {7, 7, 7, 7, 7, 7, 7, 7, 15, 15, 15, 15, 15, 15, 15, 15};
+    static const SIMDE_POWER_ALTIVEC_VECTOR(signed char) zero = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
+    SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) p, r;
+    SIMDE_POWER_ALTIVEC_VECTOR(signed char) a, X;
+
+    X = simde__m128i_to_altivec_i8(x);
+    a = simde__m128i_to_altivec_i8(A);
+    r = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned char), zero);
+
+    #if !defined(__INTEL_COMPILER)
+      SIMDE_VECTORIZE
+    #endif
+    for (int i = 0 ; i < 8 ; i++) {
+      p = a < zero;
+      p &= mask;
+      p = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned char),
+                                  vec_sum2(vec_sum4(p, HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned char), zero)),
+                                           HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned int), zero)));
+      p = vec_perm(p, p, byte_select);
+      p &= X < zero;
+      r ^= p;
+      a += a;
+      X += X;
+    }
+
+    return simde__m128i_from_altivec_u8(r);
+  #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE)
+    static const SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) byte_interleave = {0, 8, 1, 9, 2, 10, 3, 11, 4, 12, 5, 13, 6, 14, 7, 15};
+    static const SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) byte_deinterleave= {0, 2, 4, 6, 8, 10, 12, 14, 1, 3, 5, 7, 9, 11, 13, 15};
+    static const SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) bit_select = {64, 72, 80, 88, 96, 104, 112, 120, 0, 8, 16, 24, 32, 40, 48, 56};
+    const SIMDE_POWER_ALTIVEC_VECTOR(signed char) zero = vec_splats(HEDLEY_STATIC_CAST(signed char, 0));
+    SIMDE_POWER_ALTIVEC_VECTOR(signed char) X;
+    SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) a, p, r;
+
+    X = simde__m128i_to_altivec_i8(x);
+    a = simde__m128i_to_altivec_u8(A);
+    X = vec_perm(X, X, byte_interleave);
+    r = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned char), zero);
+
+    #if !defined(__INTEL_COMPILER)
+      SIMDE_VECTORIZE
+    #endif
+    for (int i = 0 ; i < 8 ; i++) {
+      #if defined(SIMDE_BUG_CLANG_50932)
+        p = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned char),
+                                    vec_bperm(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned __int128), a), bit_select));
+      #else
+        p = vec_bperm(a, bit_select);
+      #endif
+      p = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned char),
+                                  vec_splat(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned short), p), 4));
+      p = vec_and(p, vec_cmplt(X, zero));
+      r = vec_xor(r, p);
+      a = vec_add(a, a);
+      X = vec_add(X, X);
+    }
+
+    r = vec_perm(r, r, byte_deinterleave);
+    return simde__m128i_from_altivec_u8(r);
+  #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+    static const SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) mask = {128, 64, 32, 16, 8, 4, 2, 1, 128, 64, 32, 16, 8, 4, 2, 1};
+    static const SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) byte_select = {4, 4, 4, 4, 4, 4, 4, 4, 12, 12, 12, 12, 12, 12, 12, 12};
+    const SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) sevens = vec_splats(HEDLEY_STATIC_CAST(unsigned char, 7));
+    const SIMDE_POWER_ALTIVEC_VECTOR(signed char) zero = vec_splats(HEDLEY_STATIC_CAST(signed char, 0));
+    SIMDE_POWER_ALTIVEC_VECTOR(signed char) X;
+    SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) a, p, r;
+
+    X = simde__m128i_to_altivec_i8(x);
+    a = simde__m128i_to_altivec_u8(A);
+    r = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned char), zero);
+
+    #if !defined(__INTEL_COMPILER)
+      SIMDE_VECTORIZE
+    #endif
+    for (int i = 0 ; i < 8 ; i++) {
+      p = vec_sr(a, sevens);
+      p = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned char),
+                                  vec_msum(p,
+                                           mask,
+                                           HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned int), zero)));
+      p = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned char),
+                                  vec_sum2s(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed int), p),
+                                            HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed int), zero)));
+      p = vec_perm(p, p, byte_select);
+      p = vec_and(p, vec_cmplt(X, zero));
+      r = vec_xor(r, p);
+      a = vec_add(a, a);
+      X = vec_add(X, X);
+    }
+
+    return simde__m128i_from_altivec_u8(r);
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    const v128_t zero = wasm_i8x16_splat(0);
+    v128_t a, p, r, X;
+
+    X = simde__m128i_to_wasm_v128(x);
+    a = simde__m128i_to_wasm_v128(A);
+    a = wasm_i8x16_shuffle(a, a, 7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8);
+    X = wasm_i8x16_shuffle(X, X, 0, 8, 1, 9, 2, 10, 3, 11, 4, 12, 5, 13, 6, 14, 7, 15);
+    r = zero;
+
+    #if !defined(__INTEL_COMPILER)
+      SIMDE_VECTORIZE
+    #endif
+    for (int i = 0 ; i < 8 ; i++) {
+      p = wasm_i16x8_splat(HEDLEY_STATIC_CAST(int16_t, wasm_i8x16_bitmask(a)));
+      p = wasm_v128_and(p, wasm_i8x16_lt(X, zero));
+      r = wasm_v128_xor(r, p);
+      a = wasm_i8x16_add(a, a);
+      X = wasm_i8x16_add(X, X);
+    }
+
+    r = wasm_i8x16_shuffle(r, r, 0, 2, 4, 6, 8, 10, 12, 14, 1, 3, 5, 7, 9, 11, 13, 15);
+    return simde__m128i_from_wasm_v128(r);
+  #else
+    simde__m128i_private
+      r_,
+      x_ = simde__m128i_to_private(x),
+      A_ = simde__m128i_to_private(A);
+
+    const uint64_t ones = UINT64_C(0x0101010101010101);
+    const uint64_t mask = UINT64_C(0x0102040810204080);
+    uint64_t q;
+
+    #if !defined(__INTEL_COMPILER)
+      SIMDE_VECTORIZE
+    #endif
+    for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+      q = simde_endian_bswap64_le(A_.u64[i / 8]);
+      q &= HEDLEY_STATIC_CAST(uint64_t, x_.u8[i]) * ones;
+      q ^= q >> 4;
+      q ^= q >> 2;
+      q ^= q >> 1;
+      q &= ones;
+      q *= 255;
+      q &= mask;
+      q |= q >> 32;
+      q |= q >> 16;
+      q |= q >> 8;
+      r_.u8[i] = HEDLEY_STATIC_CAST(uint8_t, q);
+    }
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_x_mm256_gf2p8matrix_multiply_epi64_epi8 (simde__m256i x, simde__m256i A) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    simde__m256i r, a, p;
+    const simde__m256i byte_select = simde_x_mm256_set_epu64x(UINT64_C(0x0303030303030303), UINT64_C(0x0202020202020202),
+                                                              UINT64_C(0x0101010101010101), UINT64_C(0x0000000000000000));
+    a = simde_mm256_shuffle_epi8(A, simde_mm256_broadcastsi128_si256(simde_x_mm_set_epu64x(UINT64_C(0x08090A0B0C0D0E0F), UINT64_C(0x0001020304050607))));
+    r = simde_mm256_setzero_si256();
+
+    #if !defined(__INTEL_COMPILER)
+      SIMDE_VECTORIZE
+    #endif
+    for (int i = 0 ; i < 8 ; i++) {
+      p = simde_mm256_set1_epi32(simde_mm256_movemask_epi8(a));
+      p = simde_mm256_shuffle_epi8(p, byte_select);
+      p = simde_mm256_xor_si256(r, p);
+      r = simde_mm256_blendv_epi8(r, p, x);
+      a = simde_mm256_add_epi8(a, a);
+      x = simde_mm256_add_epi8(x, x);
+    }
+
+    return r;
+  #else
+    simde__m256i_private
+      r_,
+      x_ = simde__m256i_to_private(x),
+      A_ = simde__m256i_to_private(A);
+
+    #if !defined(__INTEL_COMPILER)
+      SIMDE_VECTORIZE
+    #endif
+    for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
+      r_.m128i[i] = simde_x_mm_gf2p8matrix_multiply_epi64_epi8(x_.m128i[i], A_.m128i[i]);
+    }
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512i
+simde_x_mm512_gf2p8matrix_multiply_epi64_epi8 (simde__m512i x, simde__m512i A) {
+  #if defined(SIMDE_X86_AVX512BW_NATIVE)
+    simde__m512i r, a, p;
+    const simde__m512i byte_select = simde_x_mm512_set_epu64(UINT64_C(0x0707070707070707), UINT64_C(0x0606060606060606), UINT64_C(0x0505050505050505), UINT64_C(0x0404040404040404),
+                                                             UINT64_C(0x0303030303030303), UINT64_C(0x0202020202020202), UINT64_C(0x0101010101010101), UINT64_C(0X0000000000000000));
+    a = simde_mm512_shuffle_epi8(A, simde_mm512_broadcast_i32x4(simde_x_mm_set_epu64x(UINT64_C(0x08090A0B0C0D0E0F), UINT64_C(0x0001020304050607))));
+    r = simde_mm512_setzero_si512();
+
+    #if !defined(__INTEL_COMPILER)
+      SIMDE_VECTORIZE
+    #endif
+    for (int i = 0 ; i < 8 ; i++) {
+      p = simde_mm512_set1_epi64(HEDLEY_STATIC_CAST(int64_t, simde_mm512_movepi8_mask(a)));
+      p = simde_mm512_maskz_shuffle_epi8(simde_mm512_movepi8_mask(x), p, byte_select);
+      r = simde_mm512_xor_si512(r, p);
+      a = simde_mm512_add_epi8(a, a);
+      x = simde_mm512_add_epi8(x, x);
+    }
+
+    return r;
+  #else
+    simde__m512i_private
+      r_,
+      x_ = simde__m512i_to_private(x),
+      A_ = simde__m512i_to_private(A);
+
+    #if !defined(__INTEL_COMPILER)
+      SIMDE_VECTORIZE
+    #endif
+    for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
+      r_.m256i[i] = simde_x_mm256_gf2p8matrix_multiply_epi64_epi8(x_.m256i[i], A_.m256i[i]);
+    }
+
+    return simde__m512i_from_private(r_);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_x_mm_gf2p8inverse_epi8 (simde__m128i x) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    /* N.B. CM: this fallback may not be faster */
+    simde__m128i r, u, t, test;
+    const simde__m128i sixteens = simde_mm_set1_epi8(16);
+    const simde__m128i masked_x = simde_mm_and_si128(x, simde_mm_set1_epi8(0x0F));
+
+    test = simde_mm_set1_epi8(INT8_MIN /* 0x80 */);
+    x = simde_mm_xor_si128(x, test);
+    r = simde_mm_shuffle_epi8(simde_x_gf2p8inverse_lut.m128i[0], masked_x);
+
+    #if !defined(__INTEL_COMPILER)
+      SIMDE_VECTORIZE
+    #endif
+    for (int i = 1 ; i < 16 ; i++) {
+      t = simde_mm_shuffle_epi8(simde_x_gf2p8inverse_lut.m128i[i], masked_x);
+      test = simde_mm_add_epi8(test, sixteens);
+      u = simde_mm_cmplt_epi8(x, test);
+      r = simde_mm_blendv_epi8(t, r, u);
+    }
+
+    return r;
+  #else
+    simde__m128i_private
+      r_,
+      x_ = simde__m128i_to_private(x);
+
+    #if !defined(__INTEL_COMPILER)
+      SIMDE_VECTORIZE
+    #endif
+    for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+      r_.u8[i] = simde_x_gf2p8inverse_lut.u8[x_.u8[i]];
+    }
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_x_mm256_gf2p8inverse_epi8 (simde__m256i x) {
+  #if defined(SIMDE_X86_AVX2_NATIVE)
+    /* N.B. CM: this fallback may not be faster */
+    simde__m256i r, u, t, test;
+    const simde__m256i sixteens = simde_mm256_set1_epi8(16);
+    const simde__m256i masked_x = simde_mm256_and_si256(x, simde_mm256_set1_epi8(0x0F));
+
+    test = simde_mm256_set1_epi8(INT8_MIN /* 0x80 */);
+    x = simde_mm256_xor_si256(x, test);
+    r = simde_mm256_shuffle_epi8(simde_mm256_broadcastsi128_si256(simde_x_gf2p8inverse_lut.m128i[0]), masked_x);
+
+    #if !defined(__INTEL_COMPILER)
+      SIMDE_VECTORIZE
+    #endif
+    for (int i = 1 ; i < 16 ; i++) {
+      t = simde_mm256_shuffle_epi8(simde_mm256_broadcastsi128_si256(simde_x_gf2p8inverse_lut.m128i[i]), masked_x);
+      test = simde_mm256_add_epi8(test, sixteens);
+      u = simde_mm256_cmpgt_epi8(test, x);
+      r = simde_mm256_blendv_epi8(t, r, u);
+    }
+
+    return r;
+  #else
+    simde__m256i_private
+      r_,
+      x_ = simde__m256i_to_private(x);
+
+    #if !defined(__INTEL_COMPILER)
+      SIMDE_VECTORIZE
+    #endif
+    for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
+      r_.m128i[i] = simde_x_mm_gf2p8inverse_epi8(x_.m128i[i]);
+    }
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512i
+simde_x_mm512_gf2p8inverse_epi8 (simde__m512i x) {
+  /* N.B. CM: TODO: later add VBMI version using just two _mm512_permutex2var_epi8 and friends */
+  /* But except for Cannon Lake all processors with VBMI also have GFNI */
+  #if defined(SIMDE_X86_AVX512BW_NATIVE)
+    /* N.B. CM: this fallback may not be faster */
+    simde__m512i r, test;
+    const simde__m512i sixteens = simde_mm512_set1_epi8(16);
+    const simde__m512i masked_x = simde_mm512_and_si512(x, simde_mm512_set1_epi8(0x0F));
+
+    r = simde_mm512_shuffle_epi8(simde_mm512_broadcast_i32x4(simde_x_gf2p8inverse_lut.m128i[0]), masked_x);
+    test = sixteens;
+
+    #if !defined(__INTEL_COMPILER)
+      SIMDE_VECTORIZE
+    #endif
+    for (int i = 1 ; i < 16 ; i++) {
+      r = simde_mm512_mask_shuffle_epi8(r, simde_mm512_cmpge_epu8_mask(x, test), simde_mm512_broadcast_i32x4(simde_x_gf2p8inverse_lut.m128i[i]), masked_x);
+      test = simde_mm512_add_epi8(test, sixteens);
+    }
+
+    return r;
+  #else
+    simde__m512i_private
+      r_,
+      x_ = simde__m512i_to_private(x);
+
+    #if !defined(__INTEL_COMPILER)
+      SIMDE_VECTORIZE
+    #endif
+    for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
+      r_.m256i[i] = simde_x_mm256_gf2p8inverse_epi8(x_.m256i[i]);
+    }
+
+    return simde__m512i_from_private(r_);
+  #endif
+}
+
+#define simde_x_mm_gf2p8matrix_multiply_inverse_epi64_epi8(x, A) simde_x_mm_gf2p8matrix_multiply_epi64_epi8(simde_x_mm_gf2p8inverse_epi8(x), A)
+#define simde_x_mm256_gf2p8matrix_multiply_inverse_epi64_epi8(x, A) simde_x_mm256_gf2p8matrix_multiply_epi64_epi8(simde_x_mm256_gf2p8inverse_epi8(x), A)
+#define simde_x_mm512_gf2p8matrix_multiply_inverse_epi64_epi8(x, A) simde_x_mm512_gf2p8matrix_multiply_epi64_epi8(simde_x_mm512_gf2p8inverse_epi8(x), A)
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_gf2p8affine_epi64_epi8 (simde__m128i x, simde__m128i A, int b)
+    SIMDE_REQUIRE_CONSTANT_RANGE(b, 0, 255) {
+  return simde_mm_xor_si128(simde_x_mm_gf2p8matrix_multiply_epi64_epi8(x, A), simde_mm_set1_epi8(HEDLEY_STATIC_CAST(int8_t, b)));
+}
+#if defined(SIMDE_X86_GFNI_NATIVE)
+  #define simde_mm_gf2p8affine_epi64_epi8(x, A, b) _mm_gf2p8affine_epi64_epi8(x, A, b)
+#endif
+#if defined(SIMDE_X86_GFNI_ENABLE_NATIVE_ALIASES)
+  #undef _mm_gf2p8affine_epi64_epi8
+  #define _mm_gf2p8affine_epi64_epi8(x, A, b) simde_mm_gf2p8affine_epi64_epi8(x, A, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_gf2p8affine_epi64_epi8 (simde__m256i x, simde__m256i A, int b)
+    SIMDE_REQUIRE_CONSTANT_RANGE(b, 0, 255) {
+  return simde_mm256_xor_si256(simde_x_mm256_gf2p8matrix_multiply_epi64_epi8(x, A), simde_mm256_set1_epi8(HEDLEY_STATIC_CAST(int8_t, b)));
+}
+#if defined(SIMDE_X86_GFNI_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+  #define simde_mm256_gf2p8affine_epi64_epi8(x, A, b) _mm256_gf2p8affine_epi64_epi8(x, A, b)
+#endif
+#if defined(SIMDE_X86_GFNI_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_gf2p8affine_epi64_epi8
+  #define _mm256_gf2p8affine_epi64_epi8(x, A, b) simde_mm256_gf2p8affine_epi64_epi8(x, A, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512i
+simde_mm512_gf2p8affine_epi64_epi8 (simde__m512i x, simde__m512i A, int b)
+    SIMDE_REQUIRE_CONSTANT_RANGE(b, 0, 255) {
+  return simde_mm512_xor_si512(simde_x_mm512_gf2p8matrix_multiply_epi64_epi8(x, A), simde_mm512_set1_epi8(HEDLEY_STATIC_CAST(int8_t, b)));
+}
+#if defined(SIMDE_X86_GFNI_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+  #define simde_mm512_gf2p8affine_epi64_epi8(x, A, b) _mm512_gf2p8affine_epi64_epi8(x, A, b)
+#endif
+#if defined(SIMDE_X86_GFNI_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_gf2p8affine_epi64_epi8
+  #define _mm512_gf2p8affine_epi64_epi8(x, A, b) simde_mm512_gf2p8affine_epi64_epi8(x, A, b)
+#endif
+
+#if defined(SIMDE_X86_GFNI_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE)
+  #define simde_mm_mask_gf2p8affine_epi64_epi8(src, k, x, A, b) _mm_mask_gf2p8affine_epi64_epi8(src, k, x, A, b)
+#else
+  #define simde_mm_mask_gf2p8affine_epi64_epi8(src, k, x, A, b) simde_mm_mask_mov_epi8(src, k, simde_mm_gf2p8affine_epi64_epi8(x, A, b))
+#endif
+#if defined(SIMDE_X86_GFNI_ENABLE_NATIVE_ALIASES)
+  #undef _mm_mask_gf2p8affine_epi64_epi8
+  #define _mm_mask_gf2p8affine_epi64_epi8(src, k, x, A, b) simde_mm_mask_gf2p8affine_epi64_epi8(src, k, x, A, b)
+#endif
+
+#if defined(SIMDE_X86_GFNI_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE)
+  #define simde_mm256_mask_gf2p8affine_epi64_epi8(src, k, x, A, b) _mm256_mask_gf2p8affine_epi64_epi8(src, k, x, A, b)
+#else
+  #define simde_mm256_mask_gf2p8affine_epi64_epi8(src, k, x, A, b) simde_mm256_mask_mov_epi8(src, k, simde_mm256_gf2p8affine_epi64_epi8(x, A, b))
+#endif
+#if defined(SIMDE_X86_GFNI_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_mask_gf2p8affine_epi64_epi8
+  #define _mm256_mask_gf2p8affine_epi64_epi8(src, k, x, A, b) simde_mm256_mask_gf2p8affine_epi64_epi8(src, k, x, A, b)
+#endif
+
+#if defined(SIMDE_X86_GFNI_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+  #define simde_mm512_mask_gf2p8affine_epi64_epi8(src, k, x, A, b) _mm512_mask_gf2p8affine_epi64_epi8(src, k, x, A, b)
+#else
+  #define simde_mm512_mask_gf2p8affine_epi64_epi8(src, k, x, A, b) simde_mm512_mask_mov_epi8(src, k, simde_mm512_gf2p8affine_epi64_epi8(x, A, b))
+#endif
+#if defined(SIMDE_X86_GFNI_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_gf2p8affine_epi64_epi8
+  #define _mm512_mask_gf2p8affine_epi64_epi8(src, k, x, A, b) simde_mm512_mask_gf2p8affine_epi64_epi8(src, k, x, A, b)
+#endif
+
+#if defined(SIMDE_X86_GFNI_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE)
+  #define simde_mm_maskz_gf2p8affine_epi64_epi8(k, x, A, b) _mm_maskz_gf2p8affine_epi64_epi8(k, x, A, b)
+#else
+  #define simde_mm_maskz_gf2p8affine_epi64_epi8(k, x, A, b) simde_mm_maskz_mov_epi8(k, simde_mm_gf2p8affine_epi64_epi8(x, A, b))
+#endif
+#if defined(SIMDE_X86_GFNI_ENABLE_NATIVE_ALIASES)
+  #undef _mm_maskz_gf2p8affine_epi64_epi8
+  #define _mm_maskz_gf2p8affine_epi64_epi8(k, x, A, b) simde_mm_maskz_gf2p8affine_epi64_epi8(k, x, A, b)
+#endif
+
+#if defined(SIMDE_X86_GFNI_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE)
+  #define simde_mm256_maskz_gf2p8affine_epi64_epi8(k, x, A, b) _mm256_maskz_gf2p8affine_epi64_epi8(k, x, A, b)
+#else
+  #define simde_mm256_maskz_gf2p8affine_epi64_epi8(k, x, A, b) simde_mm256_maskz_mov_epi8(k, simde_mm256_gf2p8affine_epi64_epi8(x, A, b))
+#endif
+#if defined(SIMDE_X86_GFNI_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_maskz_gf2p8affine_epi64_epi8
+  #define _mm256_maskz_gf2p8affine_epi64_epi8(k, x, A, b) simde_mm256_maskz_gf2p8affine_epi64_epi8(k, x, A, b)
+#endif
+
+#if defined(SIMDE_X86_GFNI_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+  #define simde_mm512_maskz_gf2p8affine_epi64_epi8(k, x, A, b) _mm512_maskz_gf2p8affine_epi64_epi8(k, x, A, b)
+#else
+  #define simde_mm512_maskz_gf2p8affine_epi64_epi8(k, x, A, b) simde_mm512_maskz_mov_epi8(k, simde_mm512_gf2p8affine_epi64_epi8(x, A, b))
+#endif
+#if defined(SIMDE_X86_GFNI_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_maskz_gf2p8affine_epi64_epi8
+  #define _mm512_maskz_gf2p8affine_epi64_epi8(k, x, A, b) simde_mm512_maskz_gf2p8affine_epi64_epi8(k, x, A, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_gf2p8affineinv_epi64_epi8 (simde__m128i x, simde__m128i A, int b)
+    SIMDE_REQUIRE_CONSTANT_RANGE(b, 0, 255) {
+  return simde_mm_xor_si128(simde_x_mm_gf2p8matrix_multiply_inverse_epi64_epi8(x, A), simde_mm_set1_epi8(HEDLEY_STATIC_CAST(int8_t, b)));
+}
+#if defined(SIMDE_X86_GFNI_NATIVE)
+  #define simde_mm_gf2p8affineinv_epi64_epi8(x, A, b) _mm_gf2p8affineinv_epi64_epi8(x, A, b)
+#endif
+#if defined(SIMDE_X86_GFNI_ENABLE_NATIVE_ALIASES)
+  #undef _mm_gf2p8affineinv_epi64_epi8
+  #define _mm_gf2p8affineinv_epi64_epi8(x, A, b) simde_mm_gf2p8affineinv_epi64_epi8(x, A, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_gf2p8affineinv_epi64_epi8 (simde__m256i x, simde__m256i A, int b)
+    SIMDE_REQUIRE_CONSTANT_RANGE(b, 0, 255) {
+  return simde_mm256_xor_si256(simde_x_mm256_gf2p8matrix_multiply_inverse_epi64_epi8(x, A), simde_mm256_set1_epi8(HEDLEY_STATIC_CAST(int8_t, b)));
+}
+#if defined(SIMDE_X86_GFNI_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+  #define simde_mm256_gf2p8affineinv_epi64_epi8(x, A, b) _mm256_gf2p8affineinv_epi64_epi8(x, A, b)
+#endif
+#if defined(SIMDE_X86_GFNI_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_gf2p8affineinv_epi64_epi8
+  #define _mm256_gf2p8affineinv_epi64_epi8(x, A, b) simde_mm256_gf2p8affineinv_epi64_epi8(x, A, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512i
+simde_mm512_gf2p8affineinv_epi64_epi8 (simde__m512i x, simde__m512i A, int b)
+    SIMDE_REQUIRE_CONSTANT_RANGE(b, 0, 255) {
+  return simde_mm512_xor_si512(simde_x_mm512_gf2p8matrix_multiply_inverse_epi64_epi8(x, A), simde_mm512_set1_epi8(HEDLEY_STATIC_CAST(int8_t, b)));
+}
+#if defined(SIMDE_X86_GFNI_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+  #define simde_mm512_gf2p8affineinv_epi64_epi8(x, A, b) _mm512_gf2p8affineinv_epi64_epi8(x, A, b)
+#endif
+#if defined(SIMDE_X86_GFNI_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_gf2p8affineinv_epi64_epi8
+  #define _mm512_gf2p8affineinv_epi64_epi8(x, A, b) simde_mm512_gf2p8affineinv_epi64_epi8(x, A, b)
+#endif
+
+#if defined(SIMDE_X86_GFNI_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE)
+  #define simde_mm_mask_gf2p8affineinv_epi64_epi8(src, k, x, A, b) _mm_mask_gf2p8affineinv_epi64_epi8(src, k, x, A, b)
+#else
+  #define simde_mm_mask_gf2p8affineinv_epi64_epi8(src, k, x, A, b) simde_mm_mask_mov_epi8(src, k, simde_mm_gf2p8affineinv_epi64_epi8(x, A, b))
+#endif
+#if defined(SIMDE_X86_GFNI_ENABLE_NATIVE_ALIASES)
+  #undef _mm_mask_gf2p8affineinv_epi64_epi8
+  #define _mm_mask_gf2p8affineinv_epi64_epi8(src, k, x, A, b) simde_mm_mask_gf2p8affineinv_epi64_epi8(src, k, x, A, b)
+#endif
+
+#if defined(SIMDE_X86_GFNI_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE)
+  #define simde_mm256_mask_gf2p8affineinv_epi64_epi8(src, k, x, A, b) _mm256_mask_gf2p8affineinv_epi64_epi8(src, k, x, A, b)
+#else
+  #define simde_mm256_mask_gf2p8affineinv_epi64_epi8(src, k, x, A, b) simde_mm256_mask_mov_epi8(src, k, simde_mm256_gf2p8affineinv_epi64_epi8(x, A, b))
+#endif
+#if defined(SIMDE_X86_GFNI_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_mask_gf2p8affineinv_epi64_epi8
+  #define _mm256_mask_gf2p8affineinv_epi64_epi8(src, k, x, A, b) simde_mm256_mask_gf2p8affineinv_epi64_epi8(src, k, x, A, b)
+#endif
+
+#if defined(SIMDE_X86_GFNI_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+  #define simde_mm512_mask_gf2p8affineinv_epi64_epi8(src, k, x, A, b) _mm512_mask_gf2p8affineinv_epi64_epi8(src, k, x, A, b)
+#else
+  #define simde_mm512_mask_gf2p8affineinv_epi64_epi8(src, k, x, A, b) simde_mm512_mask_mov_epi8(src, k, simde_mm512_gf2p8affineinv_epi64_epi8(x, A, b))
+#endif
+#if defined(SIMDE_X86_GFNI_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_gf2p8affineinv_epi64_epi8
+  #define _mm512_mask_gf2p8affineinv_epi64_epi8(src, k, x, A, b) simde_mm512_mask_gf2p8affineinv_epi64_epi8(src, k, x, A, b)
+#endif
+
+#if defined(SIMDE_X86_GFNI_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE)
+  #define simde_mm_maskz_gf2p8affineinv_epi64_epi8(k, x, A, b) _mm_maskz_gf2p8affineinv_epi64_epi8(k, x, A, b)
+#else
+  #define simde_mm_maskz_gf2p8affineinv_epi64_epi8(k, x, A, b) simde_mm_maskz_mov_epi8(k, simde_mm_gf2p8affineinv_epi64_epi8(x, A, b))
+#endif
+#if defined(SIMDE_X86_GFNI_ENABLE_NATIVE_ALIASES)
+  #undef _mm_maskz_gf2p8affineinv_epi64_epi8
+  #define _mm_maskz_gf2p8affineinv_epi64_epi8(k, x, A, b) simde_mm_maskz_gf2p8affineinv_epi64_epi8(k, x, A, b)
+#endif
+
+#if defined(SIMDE_X86_GFNI_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE)
+  #define simde_mm256_maskz_gf2p8affineinv_epi64_epi8(k, x, A, b) _mm256_maskz_gf2p8affineinv_epi64_epi8(k, x, A, b)
+#else
+  #define simde_mm256_maskz_gf2p8affineinv_epi64_epi8(k, x, A, b) simde_mm256_maskz_mov_epi8(k, simde_mm256_gf2p8affineinv_epi64_epi8(x, A, b))
+#endif
+#if defined(SIMDE_X86_GFNI_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_maskz_gf2p8affineinv_epi64_epi8
+  #define _mm256_maskz_gf2p8affineinv_epi64_epi8(k, x, A, b) simde_mm256_maskz_gf2p8affineinv_epi64_epi8(k, x, A, b)
+#endif
+
+#if defined(SIMDE_X86_GFNI_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+  #define simde_mm512_maskz_gf2p8affineinv_epi64_epi8(k, x, A, b) _mm512_maskz_gf2p8affineinv_epi64_epi8(k, x, A, b)
+#else
+  #define simde_mm512_maskz_gf2p8affineinv_epi64_epi8(k, x, A, b) simde_mm512_maskz_mov_epi8(k, simde_mm512_gf2p8affineinv_epi64_epi8(x, A, b))
+#endif
+#if defined(SIMDE_X86_GFNI_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_maskz_gf2p8affineinv_epi64_epi8
+  #define _mm512_maskz_gf2p8affineinv_epi64_epi8(k, x, A, b) simde_mm512_maskz_gf2p8affineinv_epi64_epi8(k, x, A, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i simde_mm_gf2p8mul_epi8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_GFNI_NATIVE) && (defined(SIMDE_X86_AVX512VL_NATIVE) || !defined(SIMDE_X86_AVX512F_NATIVE))
+    return _mm_gf2p8mul_epi8(a, b);
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    const poly8x16_t pa = vreinterpretq_p8_u8(simde__m128i_to_neon_u8(a));
+    const poly8x16_t pb = vreinterpretq_p8_u8(simde__m128i_to_neon_u8(b));
+    const uint8x16_t lo = vreinterpretq_u8_p16(vmull_p8(vget_low_p8(pa), vget_low_p8(pb)));
+    #if defined (SIMDE_ARM_NEON_A64V8_NATIVE)
+      uint8x16_t hi = vreinterpretq_u8_p16(vmull_high_p8(pa, pb));
+    #else
+      uint8x16_t hi = vreinterpretq_u8_p16(vmull_p8(vget_high_p8(pa), vget_high_p8(pb)));
+    #endif
+    uint8x16x2_t hilo = vuzpq_u8(lo, hi);
+    uint8x16_t r = hilo.val[0];
+    hi = hilo.val[1];
+    const uint8x16_t idxHi = vshrq_n_u8(hi, 4);
+    const uint8x16_t idxLo = vandq_u8(hi, vdupq_n_u8(0xF));
+
+    #if defined (SIMDE_ARM_NEON_A64V8_NATIVE)
+      static const uint8_t reduceLutHiData[] = {
+        0x00, 0xab, 0x4d, 0xe6, 0x9a, 0x31, 0xd7, 0x7c,
+        0x2f, 0x84, 0x62, 0xc9, 0xb5, 0x1e, 0xf8, 0x53
+      };
+      static const uint8_t reduceLutLoData[] = {
+        0x00, 0x1b, 0x36, 0x2d, 0x6c, 0x77, 0x5a, 0x41,
+        0xd8, 0xc3, 0xee, 0xf5, 0xb4, 0xaf, 0x82, 0x99
+      };
+      const uint8x16_t reduceLutHi = vld1q_u8(reduceLutHiData);
+      const uint8x16_t reduceLutLo = vld1q_u8(reduceLutLoData);
+      r = veorq_u8(r, vqtbl1q_u8(reduceLutHi, idxHi));
+      r = veorq_u8(r, vqtbl1q_u8(reduceLutLo, idxLo));
+    #else
+      static const uint8_t reduceLutHiData[] = {
+        0x00, 0x2f,
+        0xab, 0x84,
+        0x4d, 0x62,
+        0xe6, 0xc9,
+        0x9a, 0xb5,
+        0x31, 0x1e,
+        0xd7, 0xf8,
+        0x7c, 0x53
+      };
+      static const uint8_t reduceLutLoData[] = {
+        0x00, 0xd8,
+        0x1b, 0xc3,
+        0x36, 0xee,
+        0x2d, 0xf5,
+        0x6c, 0xb4,
+        0x77, 0xaf,
+        0x5a, 0x82,
+        0x41, 0x99
+      };
+      const uint8x8x2_t reduceLutHi = vld2_u8(reduceLutHiData);
+      const uint8x8x2_t reduceLutLo = vld2_u8(reduceLutLoData);
+      r = veorq_u8(r, vcombine_u8(vtbl2_u8(reduceLutHi, vget_low_u8(idxHi)), vtbl2_u8(reduceLutHi, vget_high_u8(idxHi))));
+      r = veorq_u8(r, vcombine_u8(vtbl2_u8(reduceLutLo, vget_low_u8(idxLo)), vtbl2_u8(reduceLutLo, vget_high_u8(idxLo))));
+    #endif
+    return simde__m128i_from_neon_u8(r);
+  #elif defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+    SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) x, y, lo, hi;
+    SIMDE_POWER_ALTIVEC_VECTOR(unsigned short) even, odd, mask0x00FF;
+    x = simde__m128i_to_altivec_u8(a);
+    y = simde__m128i_to_altivec_u8(b);
+    mask0x00FF = vec_splats(HEDLEY_STATIC_CAST(unsigned short, 0x00FF));
+    lo = y & HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned char), mask0x00FF);
+    hi = y ^ lo;
+    even = vec_gfmsum(x, lo);
+    odd  = vec_gfmsum(x, hi);
+    lo = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned char), vec_sel(vec_rli(odd, 8), even, mask0x00FF));
+    hi = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned char), vec_sel(odd, vec_rli(even, 8), mask0x00FF));
+    const SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) reduceLutHi = {0x00, 0xab, 0x4d, 0xe6, 0x9a, 0x31, 0xd7, 0x7c, 0x2f, 0x84, 0x62, 0xc9, 0xb5, 0x1e, 0xf8, 0x53};
+    const SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) reduceLutLo = {0x00, 0x1b, 0x36, 0x2d, 0x6c, 0x77, 0x5a, 0x41, 0xd8, 0xc3, 0xee, 0xf5, 0xb4, 0xaf, 0x82, 0x99};
+    lo = lo ^ vec_perm(reduceLutHi, reduceLutHi, vec_rli(hi, 4));
+    lo = lo ^ vec_perm(reduceLutLo, reduceLutLo, hi);
+    return simde__m128i_from_altivec_u8(lo);
+  #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+    SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) x, y, r, t, m;
+    x = simde__m128i_to_altivec_u8(a);
+    y = simde__m128i_to_altivec_u8(b);
+
+    const SIMDE_POWER_ALTIVEC_VECTOR(signed char) zero = vec_splat_s8(0);
+
+    m = vec_splat_u8(0x01);
+
+    const SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) fgp = vec_splats(HEDLEY_STATIC_CAST(unsigned char, SIMDE_X86_GFNI_FGP));
+    t = vec_and(y, m);
+    t = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned char), vec_cmpeq(t, m));
+    r = vec_and(x, t);
+
+    #if !defined(__INTEL_COMPILER)
+      SIMDE_VECTORIZE
+    #endif
+    for (int i = 0 ; i < 7 ; i++) {
+      t = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned char), vec_cmplt(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed char), x), zero));
+      x = vec_add(x, x);
+      t = vec_and(fgp, t);
+      x = vec_xor(x, t);
+      m = vec_add(m, m);
+      t = vec_and(y, m);
+      t = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned char), vec_cmpeq(t, m));
+      t = vec_and(x, t);
+      r = vec_xor(r, t);
+    }
+
+    return simde__m128i_from_altivec_u8(r);
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    v128_t x, y, r, t, m;
+    x = simde__m128i_to_wasm_v128(a);
+    y = simde__m128i_to_wasm_v128(b);
+
+    m = wasm_i8x16_splat(0x01);
+
+    const v128_t fgp = wasm_i8x16_splat(SIMDE_X86_GFNI_FGP);
+
+    t = wasm_v128_and(y, m);
+    t = wasm_i8x16_eq(t, m);
+    r = wasm_v128_and(x, t);
+
+    #if !defined(__INTEL_COMPILER)
+      SIMDE_VECTORIZE
+    #endif
+    for (int i = 0 ; i < 7 ; i++) {
+      t = wasm_i8x16_shr(x, 7);
+      x = wasm_i8x16_add(x, x);
+      t = wasm_v128_and(fgp, t);
+      x = wasm_v128_xor(x, t);
+      m = wasm_i8x16_add(m, m);
+      t = wasm_v128_and(y, m);
+      t = wasm_i8x16_eq(t, m);
+      t = wasm_v128_and(x, t);
+      r = wasm_v128_xor(r, t);
+    }
+
+    return simde__m128i_from_wasm_v128(r);
+  #elif defined(SIMDE_X86_AVX512BW_NATIVE)
+    simde__m512i r4, t4, u4;
+    simde__mmask64 ma, mb;
+
+    simde__m512i a4 = simde_mm512_broadcast_i32x4(a);
+    const simde__m512i zero = simde_mm512_setzero_si512();
+    simde__mmask16 m8 = simde_mm512_cmpeq_epi32_mask(zero, zero);
+
+    const simde__m512i b4 = simde_mm512_broadcast_i32x4(b);
+
+    simde__m512i bits = simde_mm512_set_epi64(0x4040404040404040,
+                                              0x4040404040404040,
+                                              0x1010101010101010,
+                                              0x1010101010101010,
+                                              0x0404040404040404,
+                                              0x0404040404040404,
+                                              0x0101010101010101,
+                                              0x0101010101010101);
+
+    const simde__m512i fgp = simde_mm512_set1_epi8(SIMDE_X86_GFNI_FGP);
+
+    for (int i = 0 ; i < 3 ; i++) {
+      m8 = simde_kshiftli_mask16(m8, 4);
+
+      ma = simde_mm512_cmplt_epi8_mask(a4, zero);
+      u4 = simde_mm512_add_epi8(a4, a4);
+      t4 = simde_mm512_maskz_mov_epi8(ma, fgp);
+      u4 = simde_mm512_xor_epi32(u4, t4);
+
+      ma = simde_mm512_cmplt_epi8_mask(u4, zero);
+      u4 = simde_mm512_add_epi8(u4, u4);
+      t4 = simde_mm512_maskz_mov_epi8(ma, fgp);
+      a4 = simde_mm512_mask_xor_epi32(a4, m8, u4, t4);
+    }
+
+    mb = simde_mm512_test_epi8_mask(b4, bits);
+    bits = simde_mm512_add_epi8(bits, bits);
+    ma = simde_mm512_cmplt_epi8_mask(a4, zero);
+    r4 = simde_mm512_maskz_mov_epi8(mb, a4);
+    mb = simde_mm512_test_epi8_mask(b4, bits);
+    a4 = simde_mm512_add_epi8(a4, a4);
+    t4 = simde_mm512_maskz_mov_epi8(ma, fgp);
+    a4 = simde_mm512_xor_si512(a4, t4);
+    t4 = simde_mm512_maskz_mov_epi8(mb, a4);
+    r4 = simde_mm512_xor_si512(r4, t4);
+
+    r4 = simde_mm512_xor_si512(r4, simde_mm512_shuffle_i32x4(r4, r4, (1 << 6) + (0 << 4) + (3 << 2) + 2));
+    r4 = simde_mm512_xor_si512(r4, simde_mm512_shuffle_i32x4(r4, r4, (0 << 6) + (3 << 4) + (2 << 2) + 1));
+
+    return simde_mm512_extracti32x4_epi32(r4, 0);
+  #elif defined(SIMDE_X86_AVX2_NATIVE)
+    simde__m256i r2, t2;
+    simde__m256i a2 = simde_mm256_broadcastsi128_si256(a);
+    const simde__m256i zero = simde_mm256_setzero_si256();
+    const simde__m256i fgp = simde_mm256_set1_epi8(SIMDE_X86_GFNI_FGP);
+    const simde__m256i ones = simde_mm256_set1_epi8(0x01);
+    simde__m256i b2 = simde_mm256_set_m128i(simde_mm_srli_epi64(b, 4), b);
+
+    for (int i = 0 ; i < 4 ; i++) {
+      t2 = simde_mm256_cmpgt_epi8(zero, a2);
+      t2 = simde_mm256_and_si256(fgp, t2);
+      a2 = simde_mm256_add_epi8(a2, a2);
+      a2 = simde_mm256_xor_si256(a2, t2);
+    }
+
+    a2 = simde_mm256_inserti128_si256(a2, a, 0);
+
+    t2 = simde_mm256_and_si256(b2, ones);
+    t2 = simde_mm256_cmpeq_epi8(t2, ones);
+    r2 = simde_mm256_and_si256(a2, t2);
+
+    #if !defined(__INTEL_COMPILER)
+      SIMDE_VECTORIZE
+    #endif
+    for (int i = 0 ; i < 3 ; i++) {
+      t2 = simde_mm256_cmpgt_epi8(zero, a2);
+      t2 = simde_mm256_and_si256(fgp, t2);
+      a2 = simde_mm256_add_epi8(a2, a2);
+      a2 = simde_mm256_xor_si256(a2, t2);
+      b2 = simde_mm256_srli_epi64(b2, 1);
+      t2 = simde_mm256_and_si256(b2, ones);
+      t2 = simde_mm256_cmpeq_epi8(t2, ones);
+      t2 = simde_mm256_and_si256(a2, t2);
+      r2 = simde_mm256_xor_si256(r2, t2);
+    }
+
+    return simde_mm_xor_si128(simde_mm256_extracti128_si256(r2, 1),
+                              simde_mm256_extracti128_si256(r2, 0));
+  #elif defined(SIMDE_X86_SSE2_NATIVE)
+    simde__m128i r, t;
+    const simde__m128i zero = simde_mm_setzero_si128();
+    const simde__m128i ones = simde_mm_set1_epi8(0x01);
+
+    const simde__m128i fgp = simde_mm_set1_epi8(SIMDE_X86_GFNI_FGP);
+
+    t = simde_mm_and_si128(b, ones);
+    t = simde_mm_cmpeq_epi8(t, ones);
+    r = simde_mm_and_si128(a, t);
+
+    #if !defined(__INTEL_COMPILER)
+      SIMDE_VECTORIZE
+    #endif
+    for (int i = 0 ; i < 7 ; i++) {
+      t = simde_mm_cmpgt_epi8(zero, a);
+      t = simde_mm_and_si128(fgp, t);
+      a = simde_mm_add_epi8(a, a);
+      a = simde_mm_xor_si128(a, t);
+      b = simde_mm_srli_epi64(b, 1);
+      t = simde_mm_and_si128(b, ones);
+      t = simde_mm_cmpeq_epi8(t, ones);
+      t = simde_mm_and_si128(a, t);
+      r = simde_mm_xor_si128(r, t);
+    }
+
+    return r;
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    const uint8_t fgp = SIMDE_X86_GFNI_FGP;
+
+    #if !defined(__INTEL_COMPILER)
+      SIMDE_VECTORIZE
+    #endif
+    for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+      r_.u8[i] = 0;
+      while ((a_.u8[i] != 0) && (b_.u8[i] != 0)) {
+        if (b_.u8[i] & 1)
+          r_.u8[i] ^= a_.u8[i];
+
+        if (a_.u8[i] & 0x80)
+          a_.u8[i] = HEDLEY_STATIC_CAST(uint8_t, (a_.u8[i] << 1) ^ fgp);
+        else
+          a_.u8[i] <<= 1;
+
+        b_.u8[i] >>= 1;
+      }
+    }
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_GFNI_ENABLE_NATIVE_ALIASES) || defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES)
+  #undef _mm_gf2p8mul_epi8
+  #define _mm_gf2p8mul_epi8(a, b) simde_mm_gf2p8mul_epi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_gf2p8mul_epi8 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_GFNI_NATIVE) && (defined(SIMDE_X86_AVX512VL_NATIVE) || (defined(SIMDE_X86_AVX_NATIVE) && !defined(SIMDE_X86_AVX512F_NATIVE)))
+    return _mm256_gf2p8mul_epi8(a, b);
+  #elif !defined(SIMDE_X86_GFNI_NATIVE) && defined(SIMDE_X86_AVX512BW_NATIVE)
+    simde__mmask64 ma, mb;
+    simde__m512i r, t, s;
+    simde__m512i a2 = simde_mm512_broadcast_i64x4(a);
+    const simde__m512i zero = simde_mm512_setzero_si512();
+
+    const simde__m512i fgp = simde_mm512_set1_epi8(SIMDE_X86_GFNI_FGP);
+
+    s = simde_mm512_set1_epi8(0x01);
+
+    for (int i = 0 ; i < 4 ; i++) {
+      ma = simde_mm512_cmplt_epi8_mask(a2, zero);
+      a2 = simde_mm512_add_epi8(a2, a2);
+      t = simde_mm512_xor_si512(a2, fgp);
+      a2 = simde_mm512_mask_mov_epi8(a2, ma, t);
+    }
+
+    simde__m512i b2 = simde_mm512_inserti64x4(zero, simde_mm256_srli_epi64(b, 4), 1);
+    b2 = simde_mm512_inserti64x4(b2, b, 0);
+    a2 = simde_mm512_inserti64x4(a2, a, 0);
+
+    mb = simde_mm512_test_epi8_mask(b2, s);
+    r = simde_mm512_maskz_mov_epi8(mb, a2);
+
+    #if !defined(__INTEL_COMPILER)
+      SIMDE_VECTORIZE
+    #endif
+    for (int i = 0 ; i < 3 ; i++) {
+      ma = simde_mm512_cmplt_epi8_mask(a2, zero);
+      s = simde_mm512_add_epi8(s, s);
+      mb = simde_mm512_test_epi8_mask(b2, s);
+      a2 = simde_mm512_add_epi8(a2, a2);
+      t = simde_mm512_maskz_mov_epi8(ma, fgp);
+      a2 = simde_mm512_xor_si512(a2, t);
+      t = simde_mm512_maskz_mov_epi8(mb, a2);
+      r = simde_mm512_xor_si512(r, t);
+    }
+
+    return simde_mm256_xor_si256(simde_mm512_extracti64x4_epi64(r, 1),
+                                 simde_mm512_extracti64x4_epi64(r, 0));
+  #elif !defined(SIMDE_X86_GFNI_NATIVE) && defined(SIMDE_X86_AVX2_NATIVE)
+    simde__m256i r, t;
+    const simde__m256i zero = simde_mm256_setzero_si256();
+    const simde__m256i ones = simde_mm256_set1_epi8(0x01);
+
+    const simde__m256i fgp = simde_mm256_set1_epi8(SIMDE_X86_GFNI_FGP);
+
+    t = simde_mm256_and_si256(b, ones);
+    t = simde_mm256_cmpeq_epi8(t, ones);
+    r = simde_mm256_and_si256(a, t);
+
+    #if !defined(__INTEL_COMPILER)
+      SIMDE_VECTORIZE
+    #endif
+    for (int i = 0 ; i < 7 ; i++) {
+      t = simde_mm256_cmpgt_epi8(zero, a);
+      t = simde_mm256_and_si256(fgp, t);
+      a = simde_mm256_add_epi8(a, a);
+      a = simde_mm256_xor_si256(a, t);
+      b = simde_mm256_srli_epi64(b, 1);
+      t = simde_mm256_and_si256(b, ones);
+      t = simde_mm256_cmpeq_epi8(t, ones);
+      t = simde_mm256_and_si256(a, t);
+      r = simde_mm256_xor_si256(r, t);
+    }
+
+    return r;
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if !defined(__INTEL_COMPILER)
+      SIMDE_VECTORIZE
+    #endif
+    for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
+      r_.m128i[i] = simde_mm_gf2p8mul_epi8(a_.m128i[i], b_.m128i[i]);
+    }
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_GFNI_ENABLE_NATIVE_ALIASES) || defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_gf2p8mul_epi8
+  #define _mm256_gf2p8mul_epi8(a, b) simde_mm256_gf2p8mul_epi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512i
+simde_mm512_gf2p8mul_epi8 (simde__m512i a, simde__m512i b) {
+  #if defined(SIMDE_X86_GFNI_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_gf2p8mul_epi8(a, b);
+  #elif !defined(SIMDE_X86_GFNI_NATIVE) && defined(SIMDE_X86_AVX512BW_NATIVE)
+    simde__m512i r, s, t;
+    simde__mmask64 ma, mb;
+    const simde__m512i zero = simde_mm512_setzero_si512();
+
+    const simde__m512i fgp = simde_mm512_set1_epi8(SIMDE_X86_GFNI_FGP);
+
+    s = simde_mm512_set1_epi8(0x01);
+
+    mb = simde_mm512_test_epi8_mask(b, s);
+    r = simde_mm512_maskz_mov_epi8(mb, a);
+
+    #if !defined(__INTEL_COMPILER)
+      SIMDE_VECTORIZE
+    #endif
+    for (int i = 0 ; i < 7 ; i++) {
+      ma = simde_mm512_cmplt_epi8_mask(a, zero);
+      s = simde_mm512_add_epi8(s, s);
+      mb = simde_mm512_test_epi8_mask(b, s);
+      a = simde_mm512_add_epi8(a, a);
+      t = simde_mm512_maskz_mov_epi8(ma, fgp);
+      a = simde_mm512_xor_si512(a, t);
+      t = simde_mm512_maskz_mov_epi8(mb, a);
+      r = simde_mm512_xor_si512(r, t);
+    }
+
+    return r;
+  #else
+    simde__m512i_private
+      r_,
+      a_ = simde__m512i_to_private(a),
+      b_ = simde__m512i_to_private(b);
+
+    #if !defined(__INTEL_COMPILER)
+      SIMDE_VECTORIZE
+    #endif
+    for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
+      r_.m128i[i] = simde_mm_gf2p8mul_epi8(a_.m128i[i], b_.m128i[i]);
+    }
+
+    return simde__m512i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_GFNI_ENABLE_NATIVE_ALIASES) || defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_gf2p8mul_epi8
+  #define _mm512_gf2p8mul_epi8(a, b) simde_mm512_gf2p8mul_epi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_mask_gf2p8mul_epi8 (simde__m128i src, simde__mmask16 k, simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_GFNI_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE)
+    return _mm_mask_gf2p8mul_epi8(src, k, a, b);
+  #else
+    return simde_mm_mask_mov_epi8(src, k, simde_mm_gf2p8mul_epi8(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_GFNI_ENABLE_NATIVE_ALIASES) || defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES)
+  #undef _mm_mask_gf2p8mul_epi8
+  #define _mm_mask_gf2p8mul_epi8(src, k, a, b) simde_mm_mask_gf2p8mul_epi8(src, k, a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_mask_gf2p8mul_epi8 (simde__m256i src, simde__mmask32 k, simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_GFNI_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE)
+    return _mm256_mask_gf2p8mul_epi8(src, k, a, b);
+  #else
+    return simde_mm256_mask_mov_epi8(src, k, simde_mm256_gf2p8mul_epi8(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_GFNI_ENABLE_NATIVE_ALIASES) || defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_mask_gf2p8mul_epi8
+  #define _mm256_mask_gf2p8mul_epi8(src, k, a, b) simde_mm256_mask_gf2p8mul_epi8(src, k, a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512i
+simde_mm512_mask_gf2p8mul_epi8 (simde__m512i src, simde__mmask64 k, simde__m512i a, simde__m512i b) {
+  #if defined(SIMDE_X86_GFNI_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_gf2p8mul_epi8(src, k, a, b);
+  #else
+    return simde_mm512_mask_mov_epi8(src, k, simde_mm512_gf2p8mul_epi8(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_GFNI_ENABLE_NATIVE_ALIASES) || defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_gf2p8mul_epi8
+  #define _mm512_mask_gf2p8mul_epi8(src, k, a, b) simde_mm512_mask_gf2p8mul_epi8(src, k, a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_maskz_gf2p8mul_epi8 (simde__mmask16 k, simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_GFNI_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE)
+    return _mm_maskz_gf2p8mul_epi8(k, a, b);
+  #else
+    return simde_mm_maskz_mov_epi8(k, simde_mm_gf2p8mul_epi8(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_GFNI_ENABLE_NATIVE_ALIASES) || defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES)
+  #undef _mm_maskz_gf2p8mul_epi8
+  #define _mm_maskz_gf2p8mul_epi8(k, a, b) simde_mm_maskz_gf2p8mul_epi8(k, a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_maskz_gf2p8mul_epi8 (simde__mmask32 k, simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_GFNI_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE)
+    return _mm256_maskz_gf2p8mul_epi8(k, a, b);
+  #else
+    return  simde_mm256_maskz_mov_epi8(k, simde_mm256_gf2p8mul_epi8(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_GFNI_ENABLE_NATIVE_ALIASES) || defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_maskz_gf2p8mul_epi8
+  #define _mm256_maskz_gf2p8mul_epi8(k, a, b) simde_mm256_maskz_gf2p8mul_epi8(k, a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512i
+simde_mm512_maskz_gf2p8mul_epi8 (simde__mmask64 k, simde__m512i a, simde__m512i b) {
+  #if defined(SIMDE_X86_GFNI_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_maskz_gf2p8mul_epi8(k, a, b);
+  #else
+    return simde_mm512_maskz_mov_epi8(k, simde_mm512_gf2p8mul_epi8(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_GFNI_ENABLE_NATIVE_ALIASES) || defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_maskz_gf2p8mul_epi8
+  #define _mm512_maskz_gf2p8mul_epi8(k, a, b) simde_mm512_maskz_gf2p8mul_epi8(k, a, b)
+#endif
+
+SIMDE_END_DECLS_
+
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_X86_GFNI_H) */
diff --git a/external_libs/pgenlib/simde/x86/mmx.h b/external_libs/pgenlib/simde/x86/mmx.h
new file mode 100644
index 0000000..e59a683
--- /dev/null
+++ b/external_libs/pgenlib/simde/x86/mmx.h
@@ -0,0 +1,2398 @@
+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2017-2020 Evan Nemerson <evan@nemerson.com>
+ */
+
+#if !defined(SIMDE_X86_MMX_H)
+#define SIMDE_X86_MMX_H
+
+#include "../simde-common.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+
+#if defined(SIMDE_X86_MMX_NATIVE)
+  #define SIMDE_X86_MMX_USE_NATIVE_TYPE
+#elif defined(SIMDE_X86_SSE_NATIVE)
+  #define SIMDE_X86_MMX_USE_NATIVE_TYPE
+#endif
+
+#if defined(SIMDE_X86_MMX_USE_NATIVE_TYPE)
+  #include <mmintrin.h>
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #include <arm_neon.h>
+#elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+  #include <loongson-mmiintrin.h>
+#endif
+
+#include <stdint.h>
+#include <limits.h>
+
+SIMDE_BEGIN_DECLS_
+
+typedef union {
+  #if defined(SIMDE_VECTOR_SUBSCRIPT)
+    SIMDE_ALIGN_TO_8 int8_t          i8 SIMDE_VECTOR(8) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_8 int16_t        i16 SIMDE_VECTOR(8) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_8 int32_t        i32 SIMDE_VECTOR(8) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_8 int64_t        i64 SIMDE_VECTOR(8) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_8 uint8_t         u8 SIMDE_VECTOR(8) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_8 uint16_t       u16 SIMDE_VECTOR(8) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_8 uint32_t       u32 SIMDE_VECTOR(8) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_8 uint64_t       u64 SIMDE_VECTOR(8) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_8 simde_float32  f32 SIMDE_VECTOR(8) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_8 int_fast32_t  i32f SIMDE_VECTOR(8) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_8 uint_fast32_t u32f SIMDE_VECTOR(8) SIMDE_MAY_ALIAS;
+  #else
+    SIMDE_ALIGN_TO_8 int8_t          i8[8];
+    SIMDE_ALIGN_TO_8 int16_t        i16[4];
+    SIMDE_ALIGN_TO_8 int32_t        i32[2];
+    SIMDE_ALIGN_TO_8 int64_t        i64[1];
+    SIMDE_ALIGN_TO_8 uint8_t         u8[8];
+    SIMDE_ALIGN_TO_8 uint16_t       u16[4];
+    SIMDE_ALIGN_TO_8 uint32_t       u32[2];
+    SIMDE_ALIGN_TO_8 uint64_t       u64[1];
+    SIMDE_ALIGN_TO_8 simde_float32  f32[2];
+    SIMDE_ALIGN_TO_8 int_fast32_t  i32f[8 / sizeof(int_fast32_t)];
+    SIMDE_ALIGN_TO_8 uint_fast32_t u32f[8 / sizeof(uint_fast32_t)];
+  #endif
+
+  #if defined(SIMDE_X86_MMX_USE_NATIVE_TYPE)
+    __m64          n;
+  #endif
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    int8x8_t       neon_i8;
+    int16x4_t      neon_i16;
+    int32x2_t      neon_i32;
+    int64x1_t      neon_i64;
+    uint8x8_t      neon_u8;
+    uint16x4_t     neon_u16;
+    uint32x2_t     neon_u32;
+    uint64x1_t     neon_u64;
+    float32x2_t    neon_f32;
+  #endif
+  #if defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+    int8x8_t       mmi_i8;
+    int16x4_t      mmi_i16;
+    int32x2_t      mmi_i32;
+    int64_t        mmi_i64;
+    uint8x8_t      mmi_u8;
+    uint16x4_t     mmi_u16;
+    uint32x2_t     mmi_u32;
+    uint64_t       mmi_u64;
+  #endif
+} simde__m64_private;
+
+#if defined(SIMDE_X86_MMX_USE_NATIVE_TYPE)
+  typedef __m64 simde__m64;
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  typedef int32x2_t simde__m64;
+#elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+  typedef int32x2_t simde__m64;
+#elif defined(SIMDE_VECTOR_SUBSCRIPT)
+  typedef int32_t simde__m64 SIMDE_ALIGN_TO_8 SIMDE_VECTOR(8) SIMDE_MAY_ALIAS;
+#else
+  typedef simde__m64_private simde__m64;
+#endif
+
+#if !defined(SIMDE_X86_MMX_USE_NATIVE_TYPE) && defined(SIMDE_ENABLE_NATIVE_ALIASES)
+  #define SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES
+  typedef simde__m64 __m64;
+#endif
+
+HEDLEY_STATIC_ASSERT(8 == sizeof(simde__m64), "__m64 size incorrect");
+HEDLEY_STATIC_ASSERT(8 == sizeof(simde__m64_private), "__m64 size incorrect");
+#if defined(SIMDE_CHECK_ALIGNMENT) && defined(SIMDE_ALIGN_OF)
+HEDLEY_STATIC_ASSERT(SIMDE_ALIGN_OF(simde__m64) == 8, "simde__m64 is not 8-byte aligned");
+HEDLEY_STATIC_ASSERT(SIMDE_ALIGN_OF(simde__m64_private) == 8, "simde__m64_private is not 8-byte aligned");
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde__m64_from_private(simde__m64_private v) {
+  simde__m64 r;
+  simde_memcpy(&r, &v, sizeof(r));
+  return r;
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64_private
+simde__m64_to_private(simde__m64 v) {
+  simde__m64_private r;
+  simde_memcpy(&r, &v, sizeof(r));
+  return r;
+}
+
+#define SIMDE_X86_GENERATE_CONVERSION_FUNCTION(simde_type, source_type, isax, fragment) \
+  SIMDE_FUNCTION_ATTRIBUTES \
+  simde__##simde_type \
+  simde__##simde_type##_from_##isax##_##fragment(source_type value) { \
+    simde__##simde_type##_private r_; \
+    r_.isax##_##fragment = value; \
+    return simde__##simde_type##_from_private(r_); \
+  } \
+  \
+  SIMDE_FUNCTION_ATTRIBUTES \
+  source_type \
+  simde__##simde_type##_to_##isax##_##fragment(simde__##simde_type value) { \
+    simde__##simde_type##_private r_ = simde__##simde_type##_to_private(value); \
+    return r_.isax##_##fragment; \
+  }
+
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m64, int8x8_t, neon, i8)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m64, int16x4_t, neon, i16)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m64, int32x2_t, neon, i32)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m64, int64x1_t, neon, i64)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m64, uint8x8_t, neon, u8)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m64, uint16x4_t, neon, u16)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m64, uint32x2_t, neon, u32)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m64, uint64x1_t, neon, u64)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m64, float32x2_t, neon, f32)
+#endif /* defined(SIMDE_ARM_NEON_A32V7_NATIVE) */
+
+#if defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m64, int8x8_t, mmi, i8)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m64, int16x4_t, mmi, i16)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m64, int32x2_t, mmi, i32)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m64, int64_t, mmi, i64)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m64, uint8x8_t, mmi, u8)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m64, uint16x4_t, mmi, u16)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m64, uint32x2_t, mmi, u32)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m64, uint64_t, mmi, u64)
+#endif /* defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE) */
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_add_pi8 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_add_pi8(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i8 = vadd_s8(a_.neon_i8, b_.neon_i8);
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_i8 = paddb_s(a_.mmi_i8, b_.mmi_i8);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i8 = a_.i8 + b_.i8;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = a_.i8[i] + b_.i8[i];
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_paddb(a, b) simde_mm_add_pi8(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_add_pi8(a, b) simde_mm_add_pi8(a, b)
+#  define _m_paddb(a, b) simde_m_paddb(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_add_pi16 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_add_pi16(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    r_.neon_i16 = vadd_s16(a_.neon_i16, b_.neon_i16);
+  #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+    r_.mmi_i16 = paddh_s(a_.mmi_i16, b_.mmi_i16);
+  #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+    r_.i16 = a_.i16 + b_.i16;
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+      r_.i16[i] = a_.i16[i] + b_.i16[i];
+    }
+  #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_paddw(a, b) simde_mm_add_pi16(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_add_pi16(a, b) simde_mm_add_pi16(a, b)
+#  define _m_paddw(a, b) simde_mm_add_pi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_add_pi32 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_add_pi32(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vadd_s32(a_.neon_i32, b_.neon_i32);
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_i32 = paddw_s(a_.mmi_i32, b_.mmi_i32);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32 = a_.i32 + b_.i32;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = a_.i32[i] + b_.i32[i];
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_paddd(a, b) simde_mm_add_pi32(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_add_pi32(a, b) simde_mm_add_pi32(a, b)
+#  define _m_paddd(a, b) simde_mm_add_pi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_adds_pi8 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_adds_pi8(a, b);
+  #else
+    simde__m64_private
+      r_,
+      a_ = simde__m64_to_private(a),
+      b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i8 = vqadd_s8(a_.neon_i8, b_.neon_i8);
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_i8 = paddsb(a_.mmi_i8, b_.mmi_i8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        if ((((b_.i8[i]) > 0) && ((a_.i8[i]) > (INT8_MAX - (b_.i8[i]))))) {
+          r_.i8[i] = INT8_MAX;
+        } else if ((((b_.i8[i]) < 0) && ((a_.i8[i]) < (INT8_MIN - (b_.i8[i]))))) {
+          r_.i8[i] = INT8_MIN;
+        } else {
+          r_.i8[i] = (a_.i8[i]) + (b_.i8[i]);
+        }
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_paddsb(a, b) simde_mm_adds_pi8(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_adds_pi8(a, b) simde_mm_adds_pi8(a, b)
+#  define _m_paddsb(a, b) simde_mm_adds_pi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_adds_pu8 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_adds_pu8(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u8 = vqadd_u8(a_.neon_u8, b_.neon_u8);
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_u8 = paddusb(a_.mmi_u8, b_.mmi_u8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+        const uint_fast16_t x = HEDLEY_STATIC_CAST(uint_fast16_t, a_.u8[i]) + HEDLEY_STATIC_CAST(uint_fast16_t, b_.u8[i]);
+        if (x > UINT8_MAX)
+          r_.u8[i] = UINT8_MAX;
+        else
+          r_.u8[i] = HEDLEY_STATIC_CAST(uint8_t, x);
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_paddusb(a, b) simde_mm_adds_pu8(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_adds_pu8(a, b) simde_mm_adds_pu8(a, b)
+#  define _m_paddusb(a, b) simde_mm_adds_pu8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_adds_pi16 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_adds_pi16(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i16 = vqadd_s16(a_.neon_i16, b_.neon_i16);
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_i16 = paddsh(a_.mmi_i16, b_.mmi_i16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        if ((((b_.i16[i]) > 0) && ((a_.i16[i]) > (INT16_MAX - (b_.i16[i]))))) {
+          r_.i16[i] = INT16_MAX;
+        } else if ((((b_.i16[i]) < 0) && ((a_.i16[i]) < (SHRT_MIN - (b_.i16[i]))))) {
+          r_.i16[i] = SHRT_MIN;
+        } else {
+          r_.i16[i] = (a_.i16[i]) + (b_.i16[i]);
+        }
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_paddsw(a, b) simde_mm_adds_pi16(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_adds_pi16(a, b) simde_mm_adds_pi16(a, b)
+#  define _m_paddsw(a, b) simde_mm_adds_pi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_adds_pu16 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_adds_pu16(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u16 = vqadd_u16(a_.neon_u16, b_.neon_u16);
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_u16 = paddush(a_.mmi_u16, b_.mmi_u16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        const uint32_t x = a_.u16[i] + b_.u16[i];
+        if (x > UINT16_MAX)
+          r_.u16[i] = UINT16_MAX;
+        else
+          r_.u16[i] = HEDLEY_STATIC_CAST(uint16_t, x);
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_paddusw(a, b) simde_mm_adds_pu16(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_adds_pu16(a, b) simde_mm_adds_pu16(a, b)
+#  define _m_paddusw(a, b) simde_mm_adds_pu16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_and_si64 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_and_si64(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vand_s32(a_.neon_i32, b_.neon_i32);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i64 = a_.i64 & b_.i64;
+    #else
+      r_.i64[0] = a_.i64[0] & b_.i64[0];
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_pand(a, b) simde_mm_and_si64(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_and_si64(a, b) simde_mm_and_si64(a, b)
+#  define _m_pand(a, b) simde_mm_and_si64(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_andnot_si64 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_andnot_si64(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vbic_s32(b_.neon_i32, a_.neon_i32);
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_i32 = pandn_sw(a_.mmi_i32, b_.mmi_i32);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32f = ~a_.i32f & b_.i32f;
+    #else
+      r_.u64[0] = (~(a_.u64[0])) & (b_.u64[0]);
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_pandn(a, b) simde_mm_andnot_si64(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_andnot_si64(a, b) simde_mm_andnot_si64(a, b)
+#  define _m_pandn(a, b) simde_mm_andnot_si64(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_cmpeq_pi8 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_cmpeq_pi8(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u8 = vceq_s8(a_.neon_i8, b_.neon_i8);
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_i8 = pcmpeqb_s(a_.mmi_i8, b_.mmi_i8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = (a_.i8[i] == b_.i8[i]) ? ~INT8_C(0) : INT8_C(0);
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_pcmpeqb(a, b) simde_mm_cmpeq_pi8(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_cmpeq_pi8(a, b) simde_mm_cmpeq_pi8(a, b)
+#  define _m_pcmpeqb(a, b) simde_mm_cmpeq_pi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_cmpeq_pi16 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_cmpeq_pi16(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u16 = vceq_s16(a_.neon_i16, b_.neon_i16);
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_i16 = pcmpeqh_s(a_.mmi_i16, b_.mmi_i16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = (a_.i16[i] == b_.i16[i]) ? ~INT16_C(0) : INT16_C(0);
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_pcmpeqw(a, b) simde_mm_cmpeq_pi16(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_cmpeq_pi16(a, b) simde_mm_cmpeq_pi16(a, b)
+#  define _m_pcmpeqw(a, b) simde_mm_cmpeq_pi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_cmpeq_pi32 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_cmpeq_pi32(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vceq_s32(a_.neon_i32, b_.neon_i32);
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_i32 = pcmpeqw_s(a_.mmi_i32, b_.mmi_i32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = (a_.i32[i] == b_.i32[i]) ? ~INT32_C(0) : INT32_C(0);
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_pcmpeqd(a, b) simde_mm_cmpeq_pi32(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_cmpeq_pi32(a, b) simde_mm_cmpeq_pi32(a, b)
+#  define _m_pcmpeqd(a, b) simde_mm_cmpeq_pi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_cmpgt_pi8 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_cmpgt_pi8(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u8 = vcgt_s8(a_.neon_i8, b_.neon_i8);
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_i8 = pcmpgtb_s(a_.mmi_i8, b_.mmi_i8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = (a_.i8[i] > b_.i8[i]) ? ~INT8_C(0) : INT8_C(0);
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_pcmpgtb(a, b) simde_mm_cmpgt_pi8(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_cmpgt_pi8(a, b) simde_mm_cmpgt_pi8(a, b)
+#  define _m_pcmpgtb(a, b) simde_mm_cmpgt_pi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_cmpgt_pi16 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_cmpgt_pi16(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u16 = vcgt_s16(a_.neon_i16, b_.neon_i16);
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_i16 = pcmpgth_s(a_.mmi_i16, b_.mmi_i16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = (a_.i16[i] > b_.i16[i]) ? ~INT16_C(0) : INT16_C(0);
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_pcmpgtw(a, b) simde_mm_cmpgt_pi16(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_cmpgt_pi16(a, b) simde_mm_cmpgt_pi16(a, b)
+#  define _m_pcmpgtw(a, b) simde_mm_cmpgt_pi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_cmpgt_pi32 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_cmpgt_pi32(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vcgt_s32(a_.neon_i32, b_.neon_i32);
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_i32 = pcmpgtw_s(a_.mmi_i32, b_.mmi_i32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = (a_.i32[i] > b_.i32[i]) ? ~INT32_C(0) : INT32_C(0);
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_pcmpgtd(a, b) simde_mm_cmpgt_pi32(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_cmpgt_pi32(a, b) simde_mm_cmpgt_pi32(a, b)
+#  define _m_pcmpgtd(a, b) simde_mm_cmpgt_pi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int64_t
+simde_mm_cvtm64_si64 (simde__m64 a) {
+  #if defined(SIMDE_X86_MMX_NATIVE) && defined(SIMDE_ARCH_AMD64) && !defined(__PGI)
+    return _mm_cvtm64_si64(a);
+  #else
+    simde__m64_private a_ = simde__m64_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      HEDLEY_DIAGNOSTIC_PUSH
+      #if HEDLEY_HAS_WARNING("-Wvector-conversion") && SIMDE_DETECT_CLANG_VERSION_NOT(10,0,0)
+        // #pragma clang diagnostic ignored "-Wvector-conversion"
+      #endif
+      return vget_lane_s64(a_.neon_i64, 0);
+      HEDLEY_DIAGNOSTIC_POP
+    #else
+      return a_.i64[0];
+    #endif
+  #endif
+}
+#define simde_m_to_int64(a) simde_mm_cvtm64_si64(a)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARCH_AMD64))
+#  define _mm_cvtm64_si64(a) simde_mm_cvtm64_si64(a)
+#  define _m_to_int64(a) simde_mm_cvtm64_si64(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_cvtsi32_si64 (int32_t a) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_cvtsi32_si64(a);
+  #else
+    simde__m64_private r_;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      const int32_t av[2] = { a, 0 };
+      r_.neon_i32 = vld1_s32(av);
+    #else
+      r_.i32[0] = a;
+      r_.i32[1] = 0;
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_from_int(a) simde_mm_cvtsi32_si64(a)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_cvtsi32_si64(a) simde_mm_cvtsi32_si64(a)
+#  define _m_from_int(a) simde_mm_cvtsi32_si64(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_cvtsi64_m64 (int64_t a) {
+  #if defined(SIMDE_X86_MMX_NATIVE) && defined(SIMDE_ARCH_AMD64) && !defined(__PGI)
+    return _mm_cvtsi64_m64(a);
+  #else
+    simde__m64_private r_;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i64 = vld1_s64(&a);
+    #else
+      r_.i64[0] = a;
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_from_int64(a) simde_mm_cvtsi64_m64(a)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARCH_AMD64))
+#  define _mm_cvtsi64_m64(a) simde_mm_cvtsi64_m64(a)
+#  define _m_from_int64(a) simde_mm_cvtsi64_m64(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int32_t
+simde_mm_cvtsi64_si32 (simde__m64 a) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_cvtsi64_si32(a);
+  #else
+    simde__m64_private a_ = simde__m64_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      HEDLEY_DIAGNOSTIC_PUSH
+      #if HEDLEY_HAS_WARNING("-Wvector-conversion") && SIMDE_DETECT_CLANG_VERSION_NOT(10,0,0)
+        // #pragma clang diagnostic ignored "-Wvector-conversion"
+      #endif
+      return vget_lane_s32(a_.neon_i32, 0);
+      HEDLEY_DIAGNOSTIC_POP
+    #else
+      return a_.i32[0];
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_cvtsi64_si32(a) simde_mm_cvtsi64_si32(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_empty (void) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    _mm_empty();
+  #else
+    /* noop */
+  #endif
+}
+#define simde_m_empty() simde_mm_empty()
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_empty() simde_mm_empty()
+#  define _m_empty() simde_mm_empty()
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_madd_pi16 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_madd_pi16(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      int32x4_t i1 = vmull_s16(a_.neon_i16, b_.neon_i16);
+      r_.neon_i32 = vpadd_s32(vget_low_s32(i1), vget_high_s32(i1));
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_i32 = pmaddhw(a_.mmi_i16, b_.mmi_i16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i += 2) {
+        r_.i32[i / 2] = (a_.i16[i] * b_.i16[i]) + (a_.i16[i + 1] * b_.i16[i + 1]);
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_pmaddwd(a, b) simde_mm_madd_pi16(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_madd_pi16(a, b) simde_mm_madd_pi16(a, b)
+#  define _m_pmaddwd(a, b) simde_mm_madd_pi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_mulhi_pi16 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_mulhi_pi16(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      const int32x4_t t1 = vmull_s16(a_.neon_i16, b_.neon_i16);
+      const uint32x4_t t2 = vshrq_n_u32(vreinterpretq_u32_s32(t1), 16);
+      const uint16x4_t t3 = vmovn_u32(t2);
+      r_.neon_u16 = t3;
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_i16 = pmulhh(a_.mmi_i16, b_.mmi_i16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = HEDLEY_STATIC_CAST(int16_t, ((a_.i16[i] * b_.i16[i]) >> 16));
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_pmulhw(a, b) simde_mm_mulhi_pi16(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_mulhi_pi16(a, b) simde_mm_mulhi_pi16(a, b)
+#  define _m_pmulhw(a, b) simde_mm_mulhi_pi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_mullo_pi16 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_mullo_pi16(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      const int32x4_t t1 = vmull_s16(a_.neon_i16, b_.neon_i16);
+      const uint16x4_t t2 = vmovn_u32(vreinterpretq_u32_s32(t1));
+      r_.neon_u16 = t2;
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_i16 = pmullh(a_.mmi_i16, b_.mmi_i16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = HEDLEY_STATIC_CAST(int16_t, ((a_.i16[i] * b_.i16[i]) & 0xffff));
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_pmullw(a, b) simde_mm_mullo_pi16(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_mullo_pi16(a, b) simde_mm_mullo_pi16(a, b)
+#  define _m_pmullw(a, b) simde_mm_mullo_pi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_or_si64 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_or_si64(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vorr_s32(a_.neon_i32, b_.neon_i32);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i64 = a_.i64 | b_.i64;
+    #else
+      r_.i64[0] = a_.i64[0] | b_.i64[0];
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_por(a, b) simde_mm_or_si64(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_or_si64(a, b) simde_mm_or_si64(a, b)
+#  define _m_por(a, b) simde_mm_or_si64(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_packs_pi16 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_packs_pi16(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i8 = vqmovn_s16(vcombine_s16(a_.neon_i16, b_.neon_i16));
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_i8 = packsshb(a_.mmi_i16, b_.mmi_i16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        if (a_.i16[i] < INT8_MIN) {
+          r_.i8[i] = INT8_MIN;
+        } else if (a_.i16[i] > INT8_MAX) {
+          r_.i8[i] = INT8_MAX;
+        } else {
+          r_.i8[i] = HEDLEY_STATIC_CAST(int8_t, a_.i16[i]);
+        }
+      }
+
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        if (b_.i16[i] < INT8_MIN) {
+          r_.i8[i + 4] = INT8_MIN;
+        } else if (b_.i16[i] > INT8_MAX) {
+          r_.i8[i + 4] = INT8_MAX;
+        } else {
+          r_.i8[i + 4] = HEDLEY_STATIC_CAST(int8_t, b_.i16[i]);
+        }
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_packsswb(a, b) simde_mm_packs_pi16(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_packs_pi16(a, b) simde_mm_packs_pi16(a, b)
+#  define _m_packsswb(a, b) simde_mm_packs_pi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_packs_pi32 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_packs_pi32(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i16 = vqmovn_s32(vcombine_s32(a_.neon_i32, b_.neon_i32));
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_i16 = packsswh(a_.mmi_i32, b_.mmi_i32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (8 / sizeof(a_.i32[0])) ; i++) {
+        if (a_.i32[i] < SHRT_MIN) {
+          r_.i16[i] = SHRT_MIN;
+        } else if (a_.i32[i] > INT16_MAX) {
+          r_.i16[i] = INT16_MAX;
+        } else {
+          r_.i16[i] = HEDLEY_STATIC_CAST(int16_t, a_.i32[i]);
+        }
+      }
+
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (8 / sizeof(b_.i32[0])) ; i++) {
+        if (b_.i32[i] < SHRT_MIN) {
+          r_.i16[i + 2] = SHRT_MIN;
+        } else if (b_.i32[i] > INT16_MAX) {
+          r_.i16[i + 2] = INT16_MAX;
+        } else {
+          r_.i16[i + 2] = HEDLEY_STATIC_CAST(int16_t, b_.i32[i]);
+        }
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_packssdw(a, b) simde_mm_packs_pi32(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_packs_pi32(a, b) simde_mm_packs_pi32(a, b)
+#  define _m_packssdw(a, b) simde_mm_packs_pi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_packs_pu16 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_packs_pu16(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      const int16x8_t t1 = vcombine_s16(a_.neon_i16, b_.neon_i16);
+
+      /* Set elements which are < 0 to 0 */
+      const int16x8_t t2 = vandq_s16(t1, vreinterpretq_s16_u16(vcgezq_s16(t1)));
+
+      /* Vector with all s16 elements set to UINT8_MAX */
+      const int16x8_t vmax = vmovq_n_s16(HEDLEY_STATIC_CAST(int16_t, UINT8_MAX));
+
+      /* Elements which are within the acceptable range */
+      const int16x8_t le_max = vandq_s16(t2, vreinterpretq_s16_u16(vcleq_s16(t2, vmax)));
+      const int16x8_t gt_max = vandq_s16(vmax, vreinterpretq_s16_u16(vcgtq_s16(t2, vmax)));
+
+      /* Final values as 16-bit integers */
+      const int16x8_t values = vorrq_s16(le_max, gt_max);
+
+      r_.neon_u8 = vmovn_u16(vreinterpretq_u16_s16(values));
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_u8 = packushb(a_.mmi_u16, b_.mmi_u16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        if (a_.i16[i] > UINT8_MAX) {
+          r_.u8[i] = UINT8_MAX;
+        } else if (a_.i16[i] < 0) {
+          r_.u8[i] = 0;
+        } else {
+          r_.u8[i] = HEDLEY_STATIC_CAST(uint8_t, a_.i16[i]);
+        }
+      }
+
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        if (b_.i16[i] > UINT8_MAX) {
+          r_.u8[i + 4] = UINT8_MAX;
+        } else if (b_.i16[i] < 0) {
+          r_.u8[i + 4] = 0;
+        } else {
+          r_.u8[i + 4] = HEDLEY_STATIC_CAST(uint8_t, b_.i16[i]);
+        }
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_packuswb(a, b) simde_mm_packs_pu16(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_packs_pu16(a, b) simde_mm_packs_pu16(a, b)
+#  define _m_packuswb(a, b) simde_mm_packs_pu16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_set_pi8 (int8_t e7, int8_t e6, int8_t e5, int8_t e4, int8_t e3, int8_t e2, int8_t e1, int8_t e0) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_set_pi8(e7, e6, e5, e4, e3, e2, e1, e0);
+  #else
+    simde__m64_private r_;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      const int8_t v[sizeof(r_.i8) / sizeof(r_.i8[0])] = { e0, e1, e2, e3, e4, e5, e6, e7 };
+      r_.neon_i8 = vld1_s8(v);
+    #else
+      r_.i8[0] = e0;
+      r_.i8[1] = e1;
+      r_.i8[2] = e2;
+      r_.i8[3] = e3;
+      r_.i8[4] = e4;
+      r_.i8[5] = e5;
+      r_.i8[6] = e6;
+      r_.i8[7] = e7;
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_set_pi8(e7, e6, e5, e4, e3, e2, e1, e0) simde_mm_set_pi8(e7, e6, e5, e4, e3, e2, e1, e0)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_x_mm_set_pu8 (uint8_t e7, uint8_t e6, uint8_t e5, uint8_t e4, uint8_t e3, uint8_t e2, uint8_t e1, uint8_t e0) {
+  simde__m64_private r_;
+
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    r_.n = _mm_set_pi8(
+        HEDLEY_STATIC_CAST(int8_t, e7),
+        HEDLEY_STATIC_CAST(int8_t, e6),
+        HEDLEY_STATIC_CAST(int8_t, e5),
+        HEDLEY_STATIC_CAST(int8_t, e4),
+        HEDLEY_STATIC_CAST(int8_t, e3),
+        HEDLEY_STATIC_CAST(int8_t, e2),
+        HEDLEY_STATIC_CAST(int8_t, e1),
+        HEDLEY_STATIC_CAST(int8_t, e0));
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    const uint8_t v[sizeof(r_.u8) / sizeof(r_.u8[0])] = { e0, e1, e2, e3, e4, e5, e6, e7 };
+    r_.neon_u8 = vld1_u8(v);
+  #else
+    r_.u8[0] = e0;
+    r_.u8[1] = e1;
+    r_.u8[2] = e2;
+    r_.u8[3] = e3;
+    r_.u8[4] = e4;
+    r_.u8[5] = e5;
+    r_.u8[6] = e6;
+    r_.u8[7] = e7;
+  #endif
+
+  return simde__m64_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_set_pi16 (int16_t e3, int16_t e2, int16_t e1, int16_t e0) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_set_pi16(e3, e2, e1, e0);
+  #else
+    simde__m64_private r_;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      const int16_t v[sizeof(r_.i16) / sizeof(r_.i16[0])] = { e0, e1, e2, e3 };
+      r_.neon_i16 = vld1_s16(v);
+    #else
+      r_.i16[0] = e0;
+      r_.i16[1] = e1;
+      r_.i16[2] = e2;
+      r_.i16[3] = e3;
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_set_pi16(e3, e2, e1, e0) simde_mm_set_pi16(e3, e2, e1, e0)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_x_mm_set_pu16 (uint16_t e3, uint16_t e2, uint16_t e1, uint16_t e0) {
+  simde__m64_private r_;
+
+#if defined(SIMDE_X86_MMX_NATIVE)
+  r_.n = _mm_set_pi16(
+      HEDLEY_STATIC_CAST(int16_t, e3),
+      HEDLEY_STATIC_CAST(int16_t, e2),
+      HEDLEY_STATIC_CAST(int16_t, e1),
+      HEDLEY_STATIC_CAST(int16_t, e0)
+    );
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  const uint16_t v[sizeof(r_.u16) / sizeof(r_.u16[0])] = { e0, e1, e2, e3 };
+  r_.neon_u16 = vld1_u16(v);
+#else
+  r_.u16[0] = e0;
+  r_.u16[1] = e1;
+  r_.u16[2] = e2;
+  r_.u16[3] = e3;
+#endif
+
+  return simde__m64_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_x_mm_set_pu32 (uint32_t e1, uint32_t e0) {
+  simde__m64_private r_;
+
+#if defined(SIMDE_X86_MMX_NATIVE)
+  r_.n = _mm_set_pi32(
+      HEDLEY_STATIC_CAST(int32_t, e1),
+      HEDLEY_STATIC_CAST(int32_t, e0));
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  const uint32_t v[sizeof(r_.u32) / sizeof(r_.u32[0])] = { e0, e1 };
+  r_.neon_u32 = vld1_u32(v);
+#else
+  r_.u32[0] = e0;
+  r_.u32[1] = e1;
+#endif
+
+  return simde__m64_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_set_pi32 (int32_t e1, int32_t e0) {
+  simde__m64_private r_;
+
+#if defined(SIMDE_X86_MMX_NATIVE)
+  r_.n = _mm_set_pi32(e1, e0);
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  const int32_t v[sizeof(r_.i32) / sizeof(r_.i32[0])] = { e0, e1 };
+  r_.neon_i32 = vld1_s32(v);
+#else
+  r_.i32[0] = e0;
+  r_.i32[1] = e1;
+#endif
+
+  return simde__m64_from_private(r_);
+}
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_set_pi32(e1, e0) simde_mm_set_pi32(e1, e0)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_x_mm_set_pi64 (int64_t e0) {
+  simde__m64_private r_;
+
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  const int64_t v[sizeof(r_.i64) / sizeof(r_.i64[0])] = { e0 };
+  r_.neon_i64 = vld1_s64(v);
+#else
+  r_.i64[0] = e0;
+#endif
+
+  return simde__m64_from_private(r_);
+}
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_x_mm_set_f32x2 (simde_float32 e1, simde_float32 e0) {
+  simde__m64_private r_;
+
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  const simde_float32 v[sizeof(r_.f32) / sizeof(r_.f32[0])] = { e0, e1 };
+  r_.neon_f32 = vld1_f32(v);
+#else
+  r_.f32[0] = e0;
+  r_.f32[1] = e1;
+#endif
+
+  return simde__m64_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_set1_pi8 (int8_t a) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_set1_pi8(a);
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    simde__m64_private r_;
+    r_.neon_i8 = vmov_n_s8(a);
+    return simde__m64_from_private(r_);
+  #else
+    return simde_mm_set_pi8(a, a, a, a, a, a, a, a);
+  #endif
+}
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_set1_pi8(a) simde_mm_set1_pi8(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_set1_pi16 (int16_t a) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_set1_pi16(a);
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    simde__m64_private r_;
+    r_.neon_i16 = vmov_n_s16(a);
+    return simde__m64_from_private(r_);
+  #else
+    return simde_mm_set_pi16(a, a, a, a);
+  #endif
+}
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_set1_pi16(a) simde_mm_set1_pi16(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_set1_pi32 (int32_t a) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_set1_pi32(a);
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    simde__m64_private r_;
+    r_.neon_i32 = vmov_n_s32(a);
+    return simde__m64_from_private(r_);
+  #else
+    return simde_mm_set_pi32(a, a);
+  #endif
+}
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_set1_pi32(a) simde_mm_set1_pi32(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_setr_pi8 (int8_t e7, int8_t e6, int8_t e5, int8_t e4, int8_t e3, int8_t e2, int8_t e1, int8_t e0) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_setr_pi8(e7, e6, e5, e4, e3, e2, e1, e0);
+  #else
+    return simde_mm_set_pi8(e0, e1, e2, e3, e4, e5, e6, e7);
+  #endif
+}
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_setr_pi8(e7, e6, e5, e4, e3, e2, e1, e0) simde_mm_setr_pi8(e7, e6, e5, e4, e3, e2, e1, e0)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_setr_pi16 (int16_t e3, int16_t e2, int16_t e1, int16_t e0) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_setr_pi16(e3, e2, e1, e0);
+  #else
+    return simde_mm_set_pi16(e0, e1, e2, e3);
+  #endif
+}
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_setr_pi16(e3, e2, e1, e0) simde_mm_setr_pi16(e3, e2, e1, e0)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_setr_pi32 (int32_t e1, int32_t e0) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_setr_pi32(e1, e0);
+  #else
+    return simde_mm_set_pi32(e0, e1);
+  #endif
+}
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_setr_pi32(e1, e0) simde_mm_setr_pi32(e1, e0)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_setzero_si64 (void) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_setzero_si64();
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    simde__m64_private r_;
+    r_.neon_u32 = vmov_n_u32(0);
+    return simde__m64_from_private(r_);
+  #else
+    return simde_mm_set_pi32(0, 0);
+  #endif
+}
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_setzero_si64() simde_mm_setzero_si64()
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_x_mm_load_si64 (const void* mem_addr) {
+  simde__m64 r;
+  simde_memcpy(&r, SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m64), sizeof(r));
+  return r;
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_x_mm_loadu_si64 (const void* mem_addr) {
+  simde__m64 r;
+  simde_memcpy(&r, mem_addr, sizeof(r));
+  return r;
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_x_mm_store_si64 (void* mem_addr, simde__m64 value) {
+  simde_memcpy(SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m64), &value, sizeof(value));
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_x_mm_storeu_si64 (void* mem_addr, simde__m64 value) {
+  simde_memcpy(mem_addr, &value, sizeof(value));
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_x_mm_setone_si64 (void) {
+  return simde_mm_set1_pi32(~INT32_C(0));
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_sll_pi16 (simde__m64 a, simde__m64 count) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_sll_pi16(a, count);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private count_ = simde__m64_to_private(count);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      HEDLEY_DIAGNOSTIC_PUSH
+      #if HEDLEY_HAS_WARNING("-Wvector-conversion") && SIMDE_DETECT_CLANG_VERSION_NOT(10,0,0)
+        // #pragma clang diagnostic ignored "-Wvector-conversion"
+      #endif
+      r_.neon_i16 = vshl_s16(a_.neon_i16, vmov_n_s16(HEDLEY_STATIC_CAST(int16_t, vget_lane_u64(count_.neon_u64, 0))));
+      HEDLEY_DIAGNOSTIC_POP
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && defined(SIMDE_BUG_CLANG_POWER9_16x4_BAD_SHIFT)
+      if (HEDLEY_UNLIKELY(count_.u64[0] > 15))
+        return simde_mm_setzero_si64();
+
+      r_.i16 = a_.i16 << HEDLEY_STATIC_CAST(int16_t, count_.u64[0]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+      r_.i16 = a_.i16 << count_.u64[0];
+    #else
+      if (HEDLEY_UNLIKELY(count_.u64[0] > 15)) {
+        simde_memset(&r_, 0, sizeof(r_));
+        return simde__m64_from_private(r_);
+      }
+
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+        r_.u16[i] = HEDLEY_STATIC_CAST(uint16_t, a_.u16[i] << count_.u64[0]);
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_psllw(a, count) simde_mm_sll_pi16(a, count)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_sll_pi16(a, count) simde_mm_sll_pi16(a, count)
+#  define _m_psllw(a, count) simde_mm_sll_pi16(a, count)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_sll_pi32 (simde__m64 a, simde__m64 count) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_sll_pi32(a, count);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private count_ = simde__m64_to_private(count);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      HEDLEY_DIAGNOSTIC_PUSH
+      #if HEDLEY_HAS_WARNING("-Wvector-conversion") && SIMDE_DETECT_CLANG_VERSION_NOT(10,0,0)
+        // #pragma clang diagnostic ignored "-Wvector-conversion"
+      #endif
+      r_.neon_i32 = vshl_s32(a_.neon_i32, vmov_n_s32(HEDLEY_STATIC_CAST(int32_t, vget_lane_u64(count_.neon_u64, 0))));
+      HEDLEY_DIAGNOSTIC_POP
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+      r_.i32 = a_.i32 << count_.u64[0];
+    #else
+      if (HEDLEY_UNLIKELY(count_.u64[0] > 31)) {
+        simde_memset(&r_, 0, sizeof(r_));
+        return simde__m64_from_private(r_);
+      }
+
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+        r_.u32[i] = a_.u32[i] << count_.u64[0];
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_pslld(a, count) simde_mm_sll_pi32(a, count)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_sll_pi32(a, count) simde_mm_sll_pi32(a, count)
+#  define _m_pslld(a, count) simde_mm_sll_pi32(a, count)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_slli_pi16 (simde__m64 a, int count) {
+  #if defined(SIMDE_X86_MMX_NATIVE) && !defined(__PGI)
+    return _mm_slli_pi16(a, count);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+
+    #if defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_i16 = psllh_s(a_.mmi_i16, count);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && defined(SIMDE_BUG_CLANG_POWER9_16x4_BAD_SHIFT)
+      if (HEDLEY_UNLIKELY(count > 15))
+        return simde_mm_setzero_si64();
+
+      r_.i16 = a_.i16 << HEDLEY_STATIC_CAST(int16_t, count);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+      r_.i16 = a_.i16 << count;
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i16 = vshl_s16(a_.neon_i16, vmov_n_s16((int16_t) count));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+        r_.u16[i] = HEDLEY_STATIC_CAST(uint16_t, a_.u16[i] << count);
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_psllwi(a, count) simde_mm_slli_pi16(a, count)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_slli_pi16(a, count) simde_mm_slli_pi16(a, count)
+#  define _m_psllwi(a, count) simde_mm_slli_pi16(a, count)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_slli_pi32 (simde__m64 a, int count) {
+  #if defined(SIMDE_X86_MMX_NATIVE) && !defined(__PGI)
+    return _mm_slli_pi32(a, count);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+      r_.i32 = a_.i32 << count;
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vshl_s32(a_.neon_i32, vmov_n_s32((int32_t) count));
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_i32 = psllw_s(a_.mmi_i32, b_.mmi_i32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+        r_.u32[i] = a_.u32[i] << count;
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_pslldi(a, b) simde_mm_slli_pi32(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_slli_pi32(a, count) simde_mm_slli_pi32(a, count)
+#  define _m_pslldi(a, count) simde_mm_slli_pi32(a, count)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_slli_si64 (simde__m64 a, int count) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_slli_si64(a, count);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+      r_.i64 = a_.i64 << count;
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i64 = vshl_s64(a_.neon_i64, vmov_n_s64((int64_t) count));
+    #else
+      r_.u64[0] = a_.u64[0] << count;
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_psllqi(a, count) simde_mm_slli_si64(a, count)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_slli_si64(a, count) simde_mm_slli_si64(a, count)
+#  define _m_psllqi(a, count) simde_mm_slli_si64(a, count)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_sll_si64 (simde__m64 a, simde__m64 count) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_sll_si64(a, count);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private count_ = simde__m64_to_private(count);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i64 = vshl_s64(a_.neon_i64, count_.neon_i64);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i64 = a_.i64 << count_.i64;
+    #else
+      if (HEDLEY_UNLIKELY(count_.u64[0] > 63)) {
+        simde_memset(&r_, 0, sizeof(r_));
+        return simde__m64_from_private(r_);
+      }
+
+      r_.u64[0] = a_.u64[0] << count_.u64[0];
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_psllq(a, count) simde_mm_sll_si64(a, count)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_sll_si64(a, count) simde_mm_sll_si64(a, count)
+#  define _m_psllq(a, count) simde_mm_sll_si64(a, count)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_srl_pi16 (simde__m64 a, simde__m64 count) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_srl_pi16(a, count);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private count_ = simde__m64_to_private(count);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && defined(SIMDE_BUG_CLANG_POWER9_16x4_BAD_SHIFT)
+      if (HEDLEY_UNLIKELY(count_.u64[0] > 15))
+        return simde_mm_setzero_si64();
+
+      r_.u16 = a_.u16 >> HEDLEY_STATIC_CAST(uint16_t, count_.u64[0]);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+      r_.u16 = a_.u16 >> count_.u64[0];
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u16 = vshl_u16(a_.neon_u16, vmov_n_s16(-((int16_t) vget_lane_u64(count_.neon_u64, 0))));
+    #else
+      if (HEDLEY_UNLIKELY(count_.u64[0] > 15)) {
+        simde_memset(&r_, 0, sizeof(r_));
+        return simde__m64_from_private(r_);
+      }
+
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < sizeof(r_.u16) / sizeof(r_.u16[0]) ; i++) {
+        r_.u16[i] = a_.u16[i] >> count_.u64[0];
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_psrlw(a, count) simde_mm_srl_pi16(a, count)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_srl_pi16(a, count) simde_mm_srl_pi16(a, count)
+#  define _m_psrlw(a, count) simde_mm_srl_pi16(a, count)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_srl_pi32 (simde__m64 a, simde__m64 count) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_srl_pi32(a, count);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private count_ = simde__m64_to_private(count);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+      r_.u32 = a_.u32 >> count_.u64[0];
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vshl_u32(a_.neon_u32, vmov_n_s32(-((int32_t) vget_lane_u64(count_.neon_u64, 0))));
+    #else
+      if (HEDLEY_UNLIKELY(count_.u64[0] > 31)) {
+        simde_memset(&r_, 0, sizeof(r_));
+        return simde__m64_from_private(r_);
+      }
+
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < sizeof(r_.u32) / sizeof(r_.u32[0]) ; i++) {
+        r_.u32[i] = a_.u32[i] >> count_.u64[0];
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_psrld(a, count) simde_mm_srl_pi32(a, count)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_srl_pi32(a, count) simde_mm_srl_pi32(a, count)
+#  define _m_psrld(a, count) simde_mm_srl_pi32(a, count)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_srli_pi16 (simde__m64 a, int count) {
+  #if defined(SIMDE_X86_MMX_NATIVE) && !defined(__PGI)
+    return _mm_srli_pi16(a, count);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+      r_.u16 = a_.u16 >> count;
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u16 = vshl_u16(a_.neon_u16, vmov_n_s16(-((int16_t) count)));
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_i16 = psrlh_s(a_.mmi_i16, b_.mmi_i16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+        r_.u16[i] = a_.u16[i] >> count;
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_psrlwi(a, count) simde_mm_srli_pi16(a, count)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_srli_pi16(a, count) simde_mm_srli_pi16(a, count)
+#  define _m_psrlwi(a, count) simde_mm_srli_pi16(a, count)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_srli_pi32 (simde__m64 a, int count) {
+  #if defined(SIMDE_X86_MMX_NATIVE) && !defined(__PGI)
+    return _mm_srli_pi32(a, count);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+      r_.u32 = a_.u32 >> count;
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vshl_u32(a_.neon_u32, vmov_n_s32(-((int32_t) count)));
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_i32 = psrlw_s(a_.mmi_i32, b_.mmi_i32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+        r_.u32[i] = a_.u32[i] >> count;
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_psrldi(a, count) simde_mm_srli_pi32(a, count)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_srli_pi32(a, count) simde_mm_srli_pi32(a, count)
+#  define _m_psrldi(a, count) simde_mm_srli_pi32(a, count)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_srli_si64 (simde__m64 a, int count) {
+  #if defined(SIMDE_X86_MMX_NATIVE) && !defined(__PGI)
+    return _mm_srli_si64(a, count);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u64 = vshl_u64(a_.neon_u64, vmov_n_s64(-count));
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+      r_.u64 = a_.u64 >> count;
+    #else
+      r_.u64[0] = a_.u64[0] >> count;
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_psrlqi(a, count) simde_mm_srli_si64(a, count)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_srli_si64(a, count) simde_mm_srli_si64(a, count)
+#  define _m_psrlqi(a, count) simde_mm_srli_si64(a, count)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_srl_si64 (simde__m64 a, simde__m64 count) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_srl_si64(a, count);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private count_ = simde__m64_to_private(count);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_u64 = vshl_u64(a_.neon_u64, vneg_s64(count_.neon_i64));
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u64 = a_.u64 >> count_.u64;
+    #else
+      if (HEDLEY_UNLIKELY(count_.u64[0] > 63)) {
+        simde_memset(&r_, 0, sizeof(r_));
+        return simde__m64_from_private(r_);
+      }
+
+      r_.u64[0] = a_.u64[0] >> count_.u64[0];
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_psrlq(a, count) simde_mm_srl_si64(a, count)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_srl_si64(a, count) simde_mm_srl_si64(a, count)
+#  define _m_psrlq(a, count) simde_mm_srl_si64(a, count)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_srai_pi16 (simde__m64 a, int count) {
+  #if defined(SIMDE_X86_MMX_NATIVE) && !defined(__PGI)
+    return _mm_srai_pi16(a, count);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+      r_.i16 = a_.i16 >> (count & 0xff);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i16 = vshl_s16(a_.neon_i16, vmov_n_s16(-HEDLEY_STATIC_CAST(int16_t, count)));
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_i16 = psrah_s(a_.mmi_i16, count);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = a_.i16[i] >> (count & 0xff);
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_psrawi(a, count) simde_mm_srai_pi16(a, count)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_srai_pi16(a, count) simde_mm_srai_pi16(a, count)
+#  define _m_psrawi(a, count) simde_mm_srai_pi16(a, count)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_srai_pi32 (simde__m64 a, int count) {
+  #if defined(SIMDE_X86_MMX_NATIVE) && !defined(__PGI)
+    return _mm_srai_pi32(a, count);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+      r_.i32 = a_.i32 >> (count & 0xff);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vshl_s32(a_.neon_i32, vmov_n_s32(-HEDLEY_STATIC_CAST(int32_t, count)));
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_i32 = psraw_s(a_.mmi_i32, count);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = a_.i32[i] >> (count & 0xff);
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_psradi(a, count) simde_mm_srai_pi32(a, count)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_srai_pi32(a, count) simde_mm_srai_pi32(a, count)
+#  define _m_psradi(a, count) simde_mm_srai_pi32(a, count)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_sra_pi16 (simde__m64 a, simde__m64 count) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_sra_pi16(a, count);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private count_ = simde__m64_to_private(count);
+    const int cnt = HEDLEY_STATIC_CAST(int, (count_.i64[0] > 15 ? 15 : count_.i64[0]));
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+      r_.i16 = a_.i16 >> cnt;
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i16 = vshl_s16(a_.neon_i16, vmov_n_s16(-HEDLEY_STATIC_CAST(int16_t, vget_lane_u64(count_.neon_u64, 0))));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = a_.i16[i] >> cnt;
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_psraw(a, count) simde_mm_sra_pi16(a, count)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_sra_pi16(a, count) simde_mm_sra_pi16(a, count)
+#  define _m_psraw(a, count) simde_mm_sra_pi16(a, count)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_sra_pi32 (simde__m64 a, simde__m64 count) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_sra_pi32(a, count);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private count_ = simde__m64_to_private(count);
+    const int32_t cnt = (count_.u64[0] > 31) ? 31 : HEDLEY_STATIC_CAST(int32_t, count_.u64[0]);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+      r_.i32 = a_.i32 >> cnt;
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vshl_s32(a_.neon_i32, vmov_n_s32(-HEDLEY_STATIC_CAST(int32_t, vget_lane_u64(count_.neon_u64, 0))));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = a_.i32[i] >> cnt;
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_psrad(a, b) simde_mm_sra_pi32(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_sra_pi32(a, count) simde_mm_sra_pi32(a, count)
+#  define _m_psrad(a, count) simde_mm_sra_pi32(a, count)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_sub_pi8 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_sub_pi8(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i8 = vsub_s8(a_.neon_i8, b_.neon_i8);
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_i8 = psubb_s(a_.mmi_i8, b_.mmi_i8);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i8 = a_.i8 - b_.i8;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = a_.i8[i] - b_.i8[i];
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_psubb(a, b) simde_mm_sub_pi8(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_sub_pi8(a, b) simde_mm_sub_pi8(a, b)
+#  define _m_psubb(a, b) simde_mm_sub_pi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_sub_pi16 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_sub_pi16(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i16 = vsub_s16(a_.neon_i16, b_.neon_i16);
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_i16 = psubh_s(a_.mmi_i16, b_.mmi_i16);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i16 = a_.i16 - b_.i16;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = a_.i16[i] - b_.i16[i];
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_psubw(a, b) simde_mm_sub_pi16(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_sub_pi16(a, b) simde_mm_sub_pi16(a, b)
+#  define _m_psubw(a, b) simde_mm_sub_pi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_sub_pi32 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_sub_pi32(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vsub_s32(a_.neon_i32, b_.neon_i32);
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_i32 = psubw_s(a_.mmi_i32, b_.mmi_i32);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32 = a_.i32 - b_.i32;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = a_.i32[i] - b_.i32[i];
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_psubd(a, b) simde_mm_sub_pi32(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_sub_pi32(a, b) simde_mm_sub_pi32(a, b)
+#  define _m_psubd(a, b) simde_mm_sub_pi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_subs_pi8 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_subs_pi8(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i8 = vqsub_s8(a_.neon_i8, b_.neon_i8);
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_i8 = psubsb(a_.mmi_i8, b_.mmi_i8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        if (((b_.i8[i]) > 0 && (a_.i8[i]) < INT8_MIN + (b_.i8[i]))) {
+          r_.i8[i] = INT8_MIN;
+        } else if ((b_.i8[i]) < 0 && (a_.i8[i]) > INT8_MAX + (b_.i8[i])) {
+          r_.i8[i] = INT8_MAX;
+        } else {
+          r_.i8[i] = (a_.i8[i]) - (b_.i8[i]);
+        }
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_psubsb(a, b) simde_mm_subs_pi8(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_subs_pi8(a, b) simde_mm_subs_pi8(a, b)
+#  define _m_psubsb(a, b) simde_mm_subs_pi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_subs_pu8 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_subs_pu8(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u8 = vqsub_u8(a_.neon_u8, b_.neon_u8);
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_u8 = psubusb(a_.mmi_u8, b_.mmi_u8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+        const int32_t x = a_.u8[i] - b_.u8[i];
+        if (x < 0) {
+          r_.u8[i] = 0;
+        } else if (x > UINT8_MAX) {
+          r_.u8[i] = UINT8_MAX;
+        } else {
+          r_.u8[i] = HEDLEY_STATIC_CAST(uint8_t, x);
+        }
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_psubusb(a, b) simde_mm_subs_pu8(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_subs_pu8(a, b) simde_mm_subs_pu8(a, b)
+#  define _m_psubusb(a, b) simde_mm_subs_pu8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_subs_pi16 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_subs_pi16(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i16 = vqsub_s16(a_.neon_i16, b_.neon_i16);
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_i16 = psubsh(a_.mmi_i16, b_.mmi_i16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        if (((b_.i16[i]) > 0 && (a_.i16[i]) < SHRT_MIN + (b_.i16[i]))) {
+          r_.i16[i] = SHRT_MIN;
+        } else if ((b_.i16[i]) < 0 && (a_.i16[i]) > INT16_MAX + (b_.i16[i])) {
+          r_.i16[i] = INT16_MAX;
+        } else {
+          r_.i16[i] = (a_.i16[i]) - (b_.i16[i]);
+        }
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_psubsw(a, b) simde_mm_subs_pi16(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_subs_pi16(a, b) simde_mm_subs_pi16(a, b)
+#  define _m_psubsw(a, b) simde_mm_subs_pi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_subs_pu16 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_subs_pu16(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u16 = vqsub_u16(a_.neon_u16, b_.neon_u16);
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_u16 = psubush(a_.mmi_u16, b_.mmi_u16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+        const int x = a_.u16[i] - b_.u16[i];
+        if (x < 0) {
+          r_.u16[i] = 0;
+        } else if (x > UINT16_MAX) {
+          r_.u16[i] = UINT16_MAX;
+        } else {
+          r_.u16[i] = HEDLEY_STATIC_CAST(uint16_t, x);
+        }
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_psubusw(a, b) simde_mm_subs_pu16(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_subs_pu16(a, b) simde_mm_subs_pu16(a, b)
+#  define _m_psubusw(a, b) simde_mm_subs_pu16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_unpackhi_pi8 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_unpackhi_pi8(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_i8 = vzip2_s8(a_.neon_i8, b_.neon_i8);
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_i8 = punpckhbh_s(a_.mmi_i8, b_.mmi_i8);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.i8 = SIMDE_SHUFFLE_VECTOR_(8, 8, a_.i8, b_.i8, 4, 12, 5, 13, 6, 14, 7, 15);
+    #else
+      r_.i8[0] = a_.i8[4];
+      r_.i8[1] = b_.i8[4];
+      r_.i8[2] = a_.i8[5];
+      r_.i8[3] = b_.i8[5];
+      r_.i8[4] = a_.i8[6];
+      r_.i8[5] = b_.i8[6];
+      r_.i8[6] = a_.i8[7];
+      r_.i8[7] = b_.i8[7];
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_punpckhbw(a, b) simde_mm_unpackhi_pi8(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_unpackhi_pi8(a, b) simde_mm_unpackhi_pi8(a, b)
+#  define _m_punpckhbw(a, b) simde_mm_unpackhi_pi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_unpackhi_pi16 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_unpackhi_pi16(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_i16 = vzip2_s16(a_.neon_i16, b_.neon_i16);
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_i16 = punpckhhw_s(a_.mmi_i16, b_.mmi_i16);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.i16 = SIMDE_SHUFFLE_VECTOR_(16, 8, a_.i16, b_.i16, 2, 6, 3, 7);
+    #else
+      r_.i16[0] = a_.i16[2];
+      r_.i16[1] = b_.i16[2];
+      r_.i16[2] = a_.i16[3];
+      r_.i16[3] = b_.i16[3];
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_punpckhwd(a, b) simde_mm_unpackhi_pi16(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_unpackhi_pi16(a, b) simde_mm_unpackhi_pi16(a, b)
+#  define _m_punpckhwd(a, b) simde_mm_unpackhi_pi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_unpackhi_pi32 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_unpackhi_pi32(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_i32 = vzip2_s32(a_.neon_i32, b_.neon_i32);
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_i32 = punpckhwd_s(a_.mmi_i32, b_.mmi_i32);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.i32 = SIMDE_SHUFFLE_VECTOR_(32, 8, a_.i32, b_.i32, 1, 3);
+    #else
+      r_.i32[0] = a_.i32[1];
+      r_.i32[1] = b_.i32[1];
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_punpckhdq(a, b) simde_mm_unpackhi_pi32(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_unpackhi_pi32(a, b) simde_mm_unpackhi_pi32(a, b)
+#  define _m_punpckhdq(a, b) simde_mm_unpackhi_pi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_unpacklo_pi8 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_unpacklo_pi8(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_i8 = vzip1_s8(a_.neon_i8, b_.neon_i8);
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_i8 = punpcklbh_s(a_.mmi_i8, b_.mmi_i8);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.i8 = SIMDE_SHUFFLE_VECTOR_(8, 8, a_.i8, b_.i8, 0, 8, 1, 9, 2, 10, 3, 11);
+    #else
+      r_.i8[0] = a_.i8[0];
+      r_.i8[1] = b_.i8[0];
+      r_.i8[2] = a_.i8[1];
+      r_.i8[3] = b_.i8[1];
+      r_.i8[4] = a_.i8[2];
+      r_.i8[5] = b_.i8[2];
+      r_.i8[6] = a_.i8[3];
+      r_.i8[7] = b_.i8[3];
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_punpcklbw(a, b) simde_mm_unpacklo_pi8(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_unpacklo_pi8(a, b) simde_mm_unpacklo_pi8(a, b)
+#  define _m_punpcklbw(a, b) simde_mm_unpacklo_pi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_unpacklo_pi16 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_unpacklo_pi16(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_i16 = vzip1_s16(a_.neon_i16, b_.neon_i16);
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_i16 = punpcklhw_s(a_.mmi_i16, b_.mmi_i16);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.i16 = SIMDE_SHUFFLE_VECTOR_(16, 8, a_.i16, b_.i16, 0, 4, 1, 5);
+    #else
+      r_.i16[0] = a_.i16[0];
+      r_.i16[1] = b_.i16[0];
+      r_.i16[2] = a_.i16[1];
+      r_.i16[3] = b_.i16[1];
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_punpcklwd(a, b) simde_mm_unpacklo_pi16(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_unpacklo_pi16(a, b) simde_mm_unpacklo_pi16(a, b)
+#  define _m_punpcklwd(a, b) simde_mm_unpacklo_pi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_unpacklo_pi32 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_unpacklo_pi32(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_i32 = vzip1_s32(a_.neon_i32, b_.neon_i32);
+    #elif defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE)
+      r_.mmi_i32 = punpcklwd_s(a_.mmi_i32, b_.mmi_i32);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.i32 = SIMDE_SHUFFLE_VECTOR_(32, 8, a_.i32, b_.i32, 0, 2);
+    #else
+      r_.i32[0] = a_.i32[0];
+      r_.i32[1] = b_.i32[0];
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_punpckldq(a, b) simde_mm_unpacklo_pi32(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_unpacklo_pi32(a, b) simde_mm_unpacklo_pi32(a, b)
+#  define _m_punpckldq(a, b) simde_mm_unpacklo_pi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_xor_si64 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_xor_si64(a, b);
+  #else
+    simde__m64_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = veor_s32(a_.neon_i32, b_.neon_i32);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32f = a_.i32f ^ b_.i32f;
+    #else
+      r_.u64[0] = a_.u64[0] ^ b_.u64[0];
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_pxor(a, b) simde_mm_xor_si64(a, b)
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _mm_xor_si64(a, b) simde_mm_xor_si64(a, b)
+#  define _m_pxor(a, b) simde_mm_xor_si64(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int32_t
+simde_m_to_int (simde__m64 a) {
+  #if defined(SIMDE_X86_MMX_NATIVE)
+    return _m_to_int(a);
+  #else
+    simde__m64_private a_ = simde__m64_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      HEDLEY_DIAGNOSTIC_PUSH
+      #if HEDLEY_HAS_WARNING("-Wvector-conversion") && SIMDE_DETECT_CLANG_VERSION_NOT(10,0,0)
+        // #pragma clang diagnostic ignored "-Wvector-conversion"
+      #endif
+      return vget_lane_s32(a_.neon_i32, 0);
+      HEDLEY_DIAGNOSTIC_POP
+    #else
+      return a_.i32[0];
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_MMX_ENABLE_NATIVE_ALIASES)
+#  define _m_to_int(a) simde_m_to_int(a)
+#endif
+
+SIMDE_END_DECLS_
+
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_X86_MMX_H) */
diff --git a/external_libs/pgenlib/simde/x86/sse.h b/external_libs/pgenlib/simde/x86/sse.h
new file mode 100644
index 0000000..a8855f5
--- /dev/null
+++ b/external_libs/pgenlib/simde/x86/sse.h
@@ -0,0 +1,4830 @@
+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2017-2020 Evan Nemerson <evan@nemerson.com>
+ *   2015-2017 John W. Ratcliff <jratcliffscarab@gmail.com>
+ *   2015      Brandon Rowlett <browlett@nvidia.com>
+ *   2015      Ken Fast <kfast@gdeb.com>
+ */
+
+#if !defined(SIMDE_X86_SSE_H)
+#define SIMDE_X86_SSE_H
+
+#include "mmx.h"
+#include "../simde-f16.h"
+
+#if defined(_WIN32) && !defined(SIMDE_X86_SSE_NATIVE) && defined(_MSC_VER)
+  #define NOMINMAX
+  #include <windows.h>
+#endif
+
+#if defined(__ARM_ACLE)
+  #include <arm_acle.h>
+#endif
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+typedef union {
+  #if defined(SIMDE_VECTOR_SUBSCRIPT)
+    SIMDE_ALIGN_TO_16 int8_t          i8 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_16 int16_t        i16 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_16 int32_t        i32 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_16 int64_t        i64 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_16 uint8_t         u8 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_16 uint16_t       u16 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_16 uint32_t       u32 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_16 uint64_t       u64 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    #if defined(SIMDE_HAVE_INT128_)
+    SIMDE_ALIGN_TO_16 simde_int128  i128 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_16 simde_uint128 u128 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    #endif
+    #if defined(SIMDE_FLOAT16_VECTOR)
+    SIMDE_ALIGN_TO_16 simde_float16  f16 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    #else
+    SIMDE_ALIGN_TO_16 simde_float16  f16[8];
+    #endif
+    SIMDE_ALIGN_TO_16 simde_float32  f32 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_16 int_fast32_t  i32f SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_16 uint_fast32_t u32f SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+  #else
+    SIMDE_ALIGN_TO_16 int8_t         i8[16];
+    SIMDE_ALIGN_TO_16 int16_t        i16[8];
+    SIMDE_ALIGN_TO_16 int32_t        i32[4];
+    SIMDE_ALIGN_TO_16 int64_t        i64[2];
+    SIMDE_ALIGN_TO_16 uint8_t        u8[16];
+    SIMDE_ALIGN_TO_16 uint16_t       u16[8];
+    SIMDE_ALIGN_TO_16 uint32_t       u32[4];
+    SIMDE_ALIGN_TO_16 uint64_t       u64[2];
+    #if defined(SIMDE_HAVE_INT128_)
+    SIMDE_ALIGN_TO_16 simde_int128  i128[1];
+    SIMDE_ALIGN_TO_16 simde_uint128 u128[1];
+    #endif
+    SIMDE_ALIGN_TO_16 simde_float16  f16[8];
+    SIMDE_ALIGN_TO_16 simde_float32  f32[4];
+    SIMDE_ALIGN_TO_16 int_fast32_t  i32f[16 / sizeof(int_fast32_t)];
+    SIMDE_ALIGN_TO_16 uint_fast32_t u32f[16 / sizeof(uint_fast32_t)];
+  #endif
+
+    SIMDE_ALIGN_TO_16 simde__m64_private m64_private[2];
+    SIMDE_ALIGN_TO_16 simde__m64         m64[2];
+
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    SIMDE_ALIGN_TO_16 __m128         n;
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    SIMDE_ALIGN_TO_16 int8x16_t      neon_i8;
+    SIMDE_ALIGN_TO_16 int16x8_t      neon_i16;
+    SIMDE_ALIGN_TO_16 int32x4_t      neon_i32;
+    SIMDE_ALIGN_TO_16 int64x2_t      neon_i64;
+    SIMDE_ALIGN_TO_16 uint8x16_t     neon_u8;
+    SIMDE_ALIGN_TO_16 uint16x8_t     neon_u16;
+    SIMDE_ALIGN_TO_16 uint32x4_t     neon_u32;
+    SIMDE_ALIGN_TO_16 uint64x2_t     neon_u64;
+    SIMDE_ALIGN_TO_16 float32x4_t    neon_f32;
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      SIMDE_ALIGN_TO_16 float64x2_t    neon_f64;
+    #endif
+  #elif defined(SIMDE_MIPS_MSA_NATIVE)
+    v16i8 msa_i8;
+    v8i16 msa_i16;
+    v4i32 msa_i32;
+    v2i64 msa_i64;
+    v16u8 msa_u8;
+    v8u16 msa_u16;
+    v4u32 msa_u32;
+    v2u64 msa_u64;
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    SIMDE_ALIGN_TO_16 v128_t         wasm_v128;
+  #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned char)      altivec_u8;
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned short)     altivec_u16;
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned int)       altivec_u32;
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed char)        altivec_i8;
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed short)       altivec_i16;
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed int)         altivec_i32;
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(float)              altivec_f32;
+    #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long) altivec_u64;
+      SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed long long)   altivec_i64;
+      SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(double)             altivec_f64;
+    #endif
+  #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+    v16i8 lsx_i8;
+    v8i16 lsx_i16;
+    v4i32 lsx_i32;
+    v2i64 lsx_i64;
+    v16u8 lsx_u8;
+    v8u16 lsx_u16;
+    v4u32 lsx_u32;
+    v2u64 lsx_u64;
+    v4f32 lsx_f32;
+    v2f64 lsx_f64;
+  #endif
+} simde__m128_private;
+
+#if defined(SIMDE_X86_SSE_NATIVE)
+  typedef __m128 simde__m128;
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+   typedef float32x4_t simde__m128;
+#elif defined(SIMDE_WASM_SIMD128_NATIVE)
+   typedef v128_t simde__m128;
+#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+   typedef SIMDE_POWER_ALTIVEC_VECTOR(float) simde__m128;
+#elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+  typedef v4f32 simde__m128;
+#elif defined(SIMDE_VECTOR_SUBSCRIPT)
+  typedef simde_float32 simde__m128 SIMDE_ALIGN_TO_16 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+#else
+  typedef simde__m128_private simde__m128;
+#endif
+
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+  typedef simde__m128 __m128;
+#endif
+
+HEDLEY_STATIC_ASSERT(16 == sizeof(simde__m128), "simde__m128 size incorrect");
+HEDLEY_STATIC_ASSERT(16 == sizeof(simde__m128_private), "simde__m128_private size incorrect");
+#if defined(SIMDE_CHECK_ALIGNMENT) && defined(SIMDE_ALIGN_OF)
+HEDLEY_STATIC_ASSERT(SIMDE_ALIGN_OF(simde__m128) == 16, "simde__m128 is not 16-byte aligned");
+HEDLEY_STATIC_ASSERT(SIMDE_ALIGN_OF(simde__m128_private) == 16, "simde__m128_private is not 16-byte aligned");
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde__m128_from_private(simde__m128_private v) {
+  simde__m128 r;
+  simde_memcpy(&r, &v, sizeof(r));
+  return r;
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128_private
+simde__m128_to_private(simde__m128 v) {
+  simde__m128_private r;
+  simde_memcpy(&r, &v, sizeof(r));
+  return r;
+}
+
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128, int8x16_t, neon, i8)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128, int16x8_t, neon, i16)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128, int32x4_t, neon, i32)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128, int64x2_t, neon, i64)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128, uint8x16_t, neon, u8)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128, uint16x8_t, neon, u16)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128, uint32x4_t, neon, u32)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128, uint64x2_t, neon, u64)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128, float32x4_t, neon, f32)
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128, float64x2_t, neon, f64)
+  #endif
+#endif /* defined(SIMDE_ARM_NEON_A32V7_NATIVE) */
+
+#if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128, SIMDE_POWER_ALTIVEC_VECTOR(signed char), altivec, i8)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128, SIMDE_POWER_ALTIVEC_VECTOR(signed short), altivec, i16)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128, SIMDE_POWER_ALTIVEC_VECTOR(signed int), altivec, i32)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128, SIMDE_POWER_ALTIVEC_VECTOR(unsigned char), altivec, u8)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128, SIMDE_POWER_ALTIVEC_VECTOR(unsigned short), altivec, u16)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128, SIMDE_POWER_ALTIVEC_VECTOR(unsigned int), altivec, u32)
+
+  #if defined(SIMDE_BUG_GCC_95782)
+    SIMDE_FUNCTION_ATTRIBUTES
+    SIMDE_POWER_ALTIVEC_VECTOR(float)
+    simde__m128_to_altivec_f32(simde__m128 value) {
+      simde__m128_private r_ = simde__m128_to_private(value);
+      return r_.altivec_f32;
+    }
+
+    SIMDE_FUNCTION_ATTRIBUTES
+    simde__m128
+    simde__m128_from_altivec_f32(SIMDE_POWER_ALTIVEC_VECTOR(float) value) {
+      simde__m128_private r_;
+      r_.altivec_f32 = value;
+      return simde__m128_from_private(r_);
+    }
+  #else
+    SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128, SIMDE_POWER_ALTIVEC_VECTOR(float), altivec, f32)
+  #endif
+
+  #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+    SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128, SIMDE_POWER_ALTIVEC_VECTOR(signed long long), altivec, i64)
+    SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128, SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long), altivec, u64)
+  #endif
+#elif defined(SIMDE_WASM_SIMD128_NATIVE)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128, v128_t, wasm, v128);
+#endif /* defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) */
+
+#if defined(SIMDE_LOONGARCH_LSX_NATIVE)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128, v16i8, lsx, i8)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128, v8i16, lsx, i16)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128, v4i32, lsx, i32)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128, v2i64, lsx, i64)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128, v16u8, lsx, u8)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128, v8u16, lsx, u16)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128, v4u32, lsx, u32)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128, v2u64, lsx, u64)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128, v4f32, lsx, f32)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128, v2f64, lsx, f64)
+#endif /* defined(SIMDE_LOONGARCH_LSX_NATIVE) */
+
+enum {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    SIMDE_MM_ROUND_NEAREST     = _MM_ROUND_NEAREST,
+    SIMDE_MM_ROUND_DOWN        = _MM_ROUND_DOWN,
+    SIMDE_MM_ROUND_UP          = _MM_ROUND_UP,
+    SIMDE_MM_ROUND_TOWARD_ZERO = _MM_ROUND_TOWARD_ZERO
+  #else
+    SIMDE_MM_ROUND_NEAREST     = 0x0000,
+    SIMDE_MM_ROUND_DOWN        = 0x2000,
+    SIMDE_MM_ROUND_UP          = 0x4000,
+    SIMDE_MM_ROUND_TOWARD_ZERO = 0x6000
+  #endif
+};
+#if defined(_MM_ROUND_MASK)
+#  define SIMDE_MM_ROUND_MASK _MM_ROUND_MASK
+#else
+#  define SIMDE_MM_ROUND_MASK (0x6000)
+#endif
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+  #define _MM_ROUND_MASK SIMDE_MM_ROUND_MASK
+#endif
+
+#if defined(_MM_FROUND_TO_NEAREST_INT)
+#  define SIMDE_MM_FROUND_TO_NEAREST_INT _MM_FROUND_TO_NEAREST_INT
+#  define SIMDE_MM_FROUND_TO_NEG_INF     _MM_FROUND_TO_NEG_INF
+#  define SIMDE_MM_FROUND_TO_POS_INF     _MM_FROUND_TO_POS_INF
+#  define SIMDE_MM_FROUND_TO_ZERO        _MM_FROUND_TO_ZERO
+#  define SIMDE_MM_FROUND_CUR_DIRECTION  _MM_FROUND_CUR_DIRECTION
+
+#  define SIMDE_MM_FROUND_RAISE_EXC      _MM_FROUND_RAISE_EXC
+#  define SIMDE_MM_FROUND_NO_EXC         _MM_FROUND_NO_EXC
+#else
+#  define SIMDE_MM_FROUND_TO_NEAREST_INT 0x00
+#  define SIMDE_MM_FROUND_TO_NEG_INF     0x01
+#  define SIMDE_MM_FROUND_TO_POS_INF     0x02
+#  define SIMDE_MM_FROUND_TO_ZERO        0x03
+#  define SIMDE_MM_FROUND_CUR_DIRECTION  0x04
+
+#  define SIMDE_MM_FROUND_RAISE_EXC      0x00
+#  define SIMDE_MM_FROUND_NO_EXC         0x08
+#endif
+
+#define SIMDE_MM_FROUND_NINT \
+  (SIMDE_MM_FROUND_TO_NEAREST_INT | SIMDE_MM_FROUND_RAISE_EXC)
+#define SIMDE_MM_FROUND_FLOOR \
+  (SIMDE_MM_FROUND_TO_NEG_INF | SIMDE_MM_FROUND_RAISE_EXC)
+#define SIMDE_MM_FROUND_CEIL \
+  (SIMDE_MM_FROUND_TO_POS_INF | SIMDE_MM_FROUND_RAISE_EXC)
+#define SIMDE_MM_FROUND_TRUNC \
+  (SIMDE_MM_FROUND_TO_ZERO | SIMDE_MM_FROUND_RAISE_EXC)
+#define SIMDE_MM_FROUND_RINT \
+  (SIMDE_MM_FROUND_CUR_DIRECTION | SIMDE_MM_FROUND_RAISE_EXC)
+#define SIMDE_MM_FROUND_NEARBYINT \
+  (SIMDE_MM_FROUND_CUR_DIRECTION | SIMDE_MM_FROUND_NO_EXC)
+
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) && !defined(_MM_FROUND_TO_NEAREST_INT)
+#  define _MM_FROUND_TO_NEAREST_INT SIMDE_MM_FROUND_TO_NEAREST_INT
+#  define _MM_FROUND_TO_NEG_INF SIMDE_MM_FROUND_TO_NEG_INF
+#  define _MM_FROUND_TO_POS_INF SIMDE_MM_FROUND_TO_POS_INF
+#  define _MM_FROUND_TO_ZERO SIMDE_MM_FROUND_TO_ZERO
+#  define _MM_FROUND_CUR_DIRECTION SIMDE_MM_FROUND_CUR_DIRECTION
+#  define _MM_FROUND_RAISE_EXC SIMDE_MM_FROUND_RAISE_EXC
+#  define _MM_FROUND_NINT SIMDE_MM_FROUND_NINT
+#  define _MM_FROUND_FLOOR SIMDE_MM_FROUND_FLOOR
+#  define _MM_FROUND_CEIL SIMDE_MM_FROUND_CEIL
+#  define _MM_FROUND_TRUNC SIMDE_MM_FROUND_TRUNC
+#  define _MM_FROUND_RINT SIMDE_MM_FROUND_RINT
+#  define _MM_FROUND_NEARBYINT SIMDE_MM_FROUND_NEARBYINT
+#endif
+
+#if defined(_MM_EXCEPT_INVALID)
+#  define SIMDE_MM_EXCEPT_INVALID _MM_EXCEPT_INVALID
+#else
+#  define SIMDE_MM_EXCEPT_INVALID (0x0001)
+#endif
+#if defined(_MM_EXCEPT_DENORM)
+#  define SIMDE_MM_EXCEPT_DENORM _MM_EXCEPT_DENORM
+#else
+#  define SIMDE_MM_EXCEPT_DENORM (0x0002)
+#endif
+#if defined(_MM_EXCEPT_DIV_ZERO)
+#  define SIMDE_MM_EXCEPT_DIV_ZERO _MM_EXCEPT_DIV_ZERO
+#else
+#  define SIMDE_MM_EXCEPT_DIV_ZERO (0x0004)
+#endif
+#if defined(_MM_EXCEPT_OVERFLOW)
+#  define SIMDE_MM_EXCEPT_OVERFLOW _MM_EXCEPT_OVERFLOW
+#else
+#  define SIMDE_MM_EXCEPT_OVERFLOW (0x0008)
+#endif
+#if defined(_MM_EXCEPT_UNDERFLOW)
+#  define SIMDE_MM_EXCEPT_UNDERFLOW _MM_EXCEPT_UNDERFLOW
+#else
+#  define SIMDE_MM_EXCEPT_UNDERFLOW (0x0010)
+#endif
+#if defined(_MM_EXCEPT_INEXACT)
+#  define SIMDE_MM_EXCEPT_INEXACT _MM_EXCEPT_INEXACT
+#else
+#  define SIMDE_MM_EXCEPT_INEXACT (0x0020)
+#endif
+#if defined(_MM_EXCEPT_MASK)
+#  define SIMDE_MM_EXCEPT_MASK _MM_EXCEPT_MASK
+#else
+#  define SIMDE_MM_EXCEPT_MASK \
+     (SIMDE_MM_EXCEPT_INVALID | SIMDE_MM_EXCEPT_DENORM | \
+      SIMDE_MM_EXCEPT_DIV_ZERO | SIMDE_MM_EXCEPT_OVERFLOW | \
+      SIMDE_MM_EXCEPT_UNDERFLOW | SIMDE_MM_EXCEPT_INEXACT)
+#endif
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+  #define _MM_EXCEPT_INVALID SIMDE_MM_EXCEPT_INVALID
+  #define _MM_EXCEPT_DENORM SIMDE_MM_EXCEPT_DENORM
+  #define _MM_EXCEPT_DIV_ZERO SIMDE_MM_EXCEPT_DIV_ZERO
+  #define _MM_EXCEPT_OVERFLOW SIMDE_MM_EXCEPT_OVERFLOW
+  #define _MM_EXCEPT_UNDERFLOW SIMDE_MM_EXCEPT_UNDERFLOW
+  #define _MM_EXCEPT_INEXACT SIMDE_MM_EXCEPT_INEXACT
+  #define _MM_EXCEPT_MASK SIMDE_MM_EXCEPT_MASK
+#endif
+
+#if defined(_MM_MASK_INVALID)
+#  define SIMDE_MM_MASK_INVALID _MM_MASK_INVALID
+#else
+#  define SIMDE_MM_MASK_INVALID (0x0080)
+#endif
+#if defined(_MM_MASK_DENORM)
+#  define SIMDE_MM_MASK_DENORM _MM_MASK_DENORM
+#else
+#  define SIMDE_MM_MASK_DENORM (0x0100)
+#endif
+#if defined(_MM_MASK_DIV_ZERO)
+#  define SIMDE_MM_MASK_DIV_ZERO _MM_MASK_DIV_ZERO
+#else
+#  define SIMDE_MM_MASK_DIV_ZERO (0x0200)
+#endif
+#if defined(_MM_MASK_OVERFLOW)
+#  define SIMDE_MM_MASK_OVERFLOW _MM_MASK_OVERFLOW
+#else
+#  define SIMDE_MM_MASK_OVERFLOW (0x0400)
+#endif
+#if defined(_MM_MASK_UNDERFLOW)
+#  define SIMDE_MM_MASK_UNDERFLOW _MM_MASK_UNDERFLOW
+#else
+#  define SIMDE_MM_MASK_UNDERFLOW (0x0800)
+#endif
+#if defined(_MM_MASK_INEXACT)
+#  define SIMDE_MM_MASK_INEXACT _MM_MASK_INEXACT
+#else
+#  define SIMDE_MM_MASK_INEXACT (0x1000)
+#endif
+#if defined(_MM_MASK_MASK)
+#  define SIMDE_MM_MASK_MASK _MM_MASK_MASK
+#else
+#  define SIMDE_MM_MASK_MASK \
+     (SIMDE_MM_MASK_INVALID | SIMDE_MM_MASK_DENORM | \
+      SIMDE_MM_MASK_DIV_ZERO | SIMDE_MM_MASK_OVERFLOW | \
+      SIMDE_MM_MASK_UNDERFLOW | SIMDE_MM_MASK_INEXACT)
+#endif
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+  #define _MM_MASK_INVALID SIMDE_MM_MASK_INVALID
+  #define _MM_MASK_DENORM SIMDE_MM_MASK_DENORM
+  #define _MM_MASK_DIV_ZERO SIMDE_MM_MASK_DIV_ZERO
+  #define _MM_MASK_OVERFLOW SIMDE_MM_MASK_OVERFLOW
+  #define _MM_MASK_UNDERFLOW SIMDE_MM_MASK_UNDERFLOW
+  #define _MM_MASK_INEXACT SIMDE_MM_MASK_INEXACT
+  #define _MM_MASK_MASK SIMDE_MM_MASK_MASK
+#endif
+
+#if defined(_MM_FLUSH_ZERO_MASK)
+#  define SIMDE_MM_FLUSH_ZERO_MASK _MM_FLUSH_ZERO_MASK
+#else
+#  define SIMDE_MM_FLUSH_ZERO_MASK (0x8000)
+#endif
+#if defined(_MM_FLUSH_ZERO_ON)
+#  define SIMDE_MM_FLUSH_ZERO_ON _MM_FLUSH_ZERO_ON
+#else
+#  define SIMDE_MM_FLUSH_ZERO_ON (0x8000)
+#endif
+#if defined(_MM_FLUSH_ZERO_OFF)
+#  define SIMDE_MM_FLUSH_ZERO_OFF _MM_FLUSH_ZERO_OFF
+#else
+#  define SIMDE_MM_FLUSH_ZERO_OFF (0x0000)
+#endif
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+  #define _MM_FLUSH_ZERO_MASK SIMDE_MM_FLUSH_ZERO_MASK
+  #define _MM_FLUSH_ZERO_ON SIMDE_MM_FLUSH_ZERO_ON
+  #define _MM_FLUSH_ZERO_OFF SIMDE_MM_FLUSH_ZERO_OFF
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+uint32_t
+SIMDE_MM_GET_ROUNDING_MODE(void) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _MM_GET_ROUNDING_MODE();
+  #elif defined(SIMDE_HAVE_FENV_H)
+    unsigned int vfe_mode;
+
+    switch (fegetround()) {
+      #if defined(FE_TONEAREST)
+        case FE_TONEAREST:
+          vfe_mode = SIMDE_MM_ROUND_NEAREST;
+          break;
+      #endif
+
+      #if defined(FE_TOWARDZERO)
+        case FE_TOWARDZERO:
+          vfe_mode = SIMDE_MM_ROUND_DOWN;
+          break;
+      #endif
+
+      #if defined(FE_UPWARD)
+        case FE_UPWARD:
+          vfe_mode = SIMDE_MM_ROUND_UP;
+          break;
+      #endif
+
+      #if defined(FE_DOWNWARD)
+        case FE_DOWNWARD:
+          vfe_mode = SIMDE_MM_ROUND_TOWARD_ZERO;
+          break;
+      #endif
+
+      default:
+        vfe_mode = SIMDE_MM_ROUND_NEAREST;
+        break;
+    }
+
+    return vfe_mode;
+  #else
+    return SIMDE_MM_ROUND_NEAREST;
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+  #define _MM_GET_ROUNDING_MODE() SIMDE_MM_GET_ROUNDING_MODE()
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+SIMDE_MM_SET_ROUNDING_MODE(uint32_t a) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    _MM_SET_ROUNDING_MODE(a);
+  #elif defined(SIMDE_HAVE_FENV_H)
+    int fe_mode = FE_TONEAREST;
+
+    switch (a) {
+      #if defined(FE_TONEAREST)
+        case SIMDE_MM_ROUND_NEAREST:
+          fe_mode = FE_TONEAREST;
+          break;
+      #endif
+
+      #if defined(FE_TOWARDZERO)
+        case SIMDE_MM_ROUND_TOWARD_ZERO:
+          fe_mode = FE_TOWARDZERO;
+          break;
+      #endif
+
+      #if defined(FE_DOWNWARD)
+        case SIMDE_MM_ROUND_DOWN:
+          fe_mode = FE_DOWNWARD;
+          break;
+      #endif
+
+      #if defined(FE_UPWARD)
+        case SIMDE_MM_ROUND_UP:
+          fe_mode = FE_UPWARD;
+          break;
+      #endif
+
+      default:
+        return;
+    }
+
+    fesetround(fe_mode);
+  #else
+    (void) a;
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+  #define _MM_SET_ROUNDING_MODE(a) SIMDE_MM_SET_ROUNDING_MODE(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+uint32_t
+SIMDE_MM_GET_FLUSH_ZERO_MODE (void) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_getcsr() & _MM_FLUSH_ZERO_MASK;
+  #else
+    return SIMDE_MM_FLUSH_ZERO_OFF;
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+  #define _MM_GET_FLUSH_ZERO_MODE(a) SIMDE_MM_GET_FLUSH_ZERO_MODE(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+SIMDE_MM_SET_FLUSH_ZERO_MODE (uint32_t a) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    _MM_SET_FLUSH_ZERO_MODE(a);
+  #else
+    (void) a;
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+  #define _MM_SET_FLUSH_ZERO_MODE(a) SIMDE_MM_SET_FLUSH_ZERO_MODE(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+uint32_t
+simde_mm_getcsr (void) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_getcsr();
+  #else
+    return SIMDE_MM_GET_ROUNDING_MODE();
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+  #define _mm_getcsr() simde_mm_getcsr()
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_setcsr (uint32_t a) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    _mm_setcsr(a);
+  #else
+    SIMDE_MM_SET_ROUNDING_MODE(HEDLEY_STATIC_CAST(uint32_t, a & SIMDE_MM_ROUND_MASK));
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+  #define _mm_setcsr(a) simde_mm_setcsr(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_x_mm_round_ps (simde__m128 a, int rounding, int lax_rounding)
+    SIMDE_REQUIRE_CONSTANT_RANGE(rounding, 0, 15)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lax_rounding, 0, 1) {
+  simde__m128_private
+    r_,
+    a_ = simde__m128_to_private(a);
+
+  (void) lax_rounding;
+
+  /* For architectures which lack a current direction SIMD instruction.
+   *
+   * Note that NEON actually has a current rounding mode instruction,
+   * but in ARMv8+ the rounding mode is ignored and nearest is always
+   * used, so we treat ARMv7 as having a rounding mode but ARMv8 as
+   * not. */
+  #if \
+      defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || \
+      defined(SIMDE_ARM_NEON_A32V8)
+    if ((rounding & 7) == SIMDE_MM_FROUND_CUR_DIRECTION)
+      rounding = HEDLEY_STATIC_CAST(int, SIMDE_MM_GET_ROUNDING_MODE()) << 13;
+  #endif
+
+  switch (rounding & ~SIMDE_MM_FROUND_NO_EXC) {
+    case SIMDE_MM_FROUND_CUR_DIRECTION:
+      #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_14_NATIVE)
+        r_.altivec_f32 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(float), vec_round(a_.altivec_f32));
+      #elif defined(SIMDE_ARM_NEON_A32V8_NATIVE) && !defined(SIMDE_BUG_GCC_95399)
+        r_.neon_f32 = vrndiq_f32(a_.neon_f32);
+      #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+        r_.wasm_v128 = wasm_f32x4_nearest(a_.wasm_v128);
+      #elif defined(simde_math_nearbyintf)
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+          r_.f32[i] = simde_math_nearbyintf(a_.f32[i]);
+        }
+      #else
+        HEDLEY_UNREACHABLE_RETURN(simde_mm_undefined_pd());
+      #endif
+      break;
+
+    case SIMDE_MM_FROUND_TO_NEAREST_INT:
+      #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_14_NATIVE)
+        r_.altivec_f32 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(float), vec_rint(a_.altivec_f32));
+      #elif defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+        r_.neon_f32 = vrndnq_f32(a_.neon_f32);
+      #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+        r_.lsx_i64 = __lsx_vfrintrne_s(a_.lsx_f32);
+      #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+        r_.wasm_v128 = wasm_f32x4_nearest(a_.wasm_v128);
+      #elif defined(simde_math_roundevenf)
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+          r_.f32[i] = simde_math_roundevenf(a_.f32[i]);
+        }
+      #else
+        HEDLEY_UNREACHABLE_RETURN(simde_mm_undefined_pd());
+      #endif
+      break;
+
+    case SIMDE_MM_FROUND_TO_NEG_INF:
+      #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_14_NATIVE)
+        r_.altivec_f32 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(float), vec_floor(a_.altivec_f32));
+      #elif defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+        r_.neon_f32 = vrndmq_f32(a_.neon_f32);
+      #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+        r_.lsx_i64 = __lsx_vfrintrm_s(a_.lsx_f32);
+      #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+        r_.wasm_v128 = wasm_f32x4_floor(a_.wasm_v128);
+      #elif defined(simde_math_floorf)
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+          r_.f32[i] = simde_math_floorf(a_.f32[i]);
+        }
+      #else
+        HEDLEY_UNREACHABLE_RETURN(simde_mm_undefined_pd());
+      #endif
+      break;
+
+    case SIMDE_MM_FROUND_TO_POS_INF:
+      #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_14_NATIVE)
+        r_.altivec_f32 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(float), vec_ceil(a_.altivec_f32));
+      #elif defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+        r_.neon_f32 = vrndpq_f32(a_.neon_f32);
+      #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+        r_.lsx_i64 = __lsx_vfrintrp_s(a_.lsx_f32);
+      #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+        r_.wasm_v128 = wasm_f32x4_ceil(a_.wasm_v128);
+      #elif defined(simde_math_ceilf)
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+          r_.f32[i] = simde_math_ceilf(a_.f32[i]);
+        }
+      #else
+        HEDLEY_UNREACHABLE_RETURN(simde_mm_undefined_pd());
+      #endif
+      break;
+
+    case SIMDE_MM_FROUND_TO_ZERO:
+      #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_14_NATIVE)
+        r_.altivec_f32 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(float), vec_trunc(a_.altivec_f32));
+      #elif defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+        r_.neon_f32 = vrndq_f32(a_.neon_f32);
+      #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+        r_.lsx_i64 = __lsx_vfrintrz_s(a_.lsx_f32);
+      #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+        r_.wasm_v128 = wasm_f32x4_trunc(a_.wasm_v128);
+      #elif defined(simde_math_truncf)
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+          r_.f32[i] = simde_math_truncf(a_.f32[i]);
+        }
+      #else
+        HEDLEY_UNREACHABLE_RETURN(simde_mm_undefined_pd());
+      #endif
+      break;
+
+    default:
+      HEDLEY_UNREACHABLE_RETURN(simde_mm_undefined_pd());
+  }
+
+  return simde__m128_from_private(r_);
+}
+#if defined(SIMDE_X86_SSE4_1_NATIVE)
+  #define simde_mm_round_ps(a, rounding) _mm_round_ps((a), (rounding))
+#else
+  #define simde_mm_round_ps(a, rounding) simde_x_mm_round_ps((a), (rounding), 0)
+#endif
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #define _mm_round_ps(a, rounding) simde_mm_round_ps((a), (rounding))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_set_ps (simde_float32 e3, simde_float32 e2, simde_float32 e1, simde_float32 e0) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_set_ps(e3, e2, e1, e0);
+  #else
+    simde__m128_private r_;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      SIMDE_ALIGN_TO_16 simde_float32 data[4] = { e0, e1, e2, e3 };
+      r_.neon_f32 = vld1q_f32(data);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f32x4_make(e0, e1, e2, e3);
+    #else
+      r_.f32[0] = e0;
+      r_.f32[1] = e1;
+      r_.f32[2] = e2;
+      r_.f32[3] = e3;
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_set_ps(e3, e2, e1, e0) simde_mm_set_ps(e3, e2, e1, e0)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_set_ps1 (simde_float32 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_set_ps1(a);
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vdupq_n_f32(a);
+  #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_14_NATIVE)
+    (void) a;
+    return vec_splats(a);
+  #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+    return (simde__m128)__lsx_vldrepl_w(&a, 0);
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    return wasm_f32x4_splat(a);
+  #else
+    return simde_mm_set_ps(a, a, a, a);
+  #endif
+}
+#define simde_mm_set1_ps(a) simde_mm_set_ps1(a)
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_set_ps1(a) simde_mm_set_ps1(a)
+#  define _mm_set1_ps(a) simde_mm_set1_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_move_ss (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_move_ss(a, b);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_f32 = vsetq_lane_f32(vgetq_lane_f32(b_.neon_f32, 0), a_.neon_f32, 0);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      static const SIMDE_POWER_ALTIVEC_VECTOR(unsigned int) m = { ~0U, 0U, 0U, 0U };
+      r_.altivec_f32 = vec_sel(a_.altivec_f32, b_.altivec_f32, m);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i8x16_shuffle(b_.wasm_v128, a_.wasm_v128, 0, 1, 2, 3, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31);
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      r_.lsx_i64 = __lsx_vextrins_w(a_.lsx_i64, b_.lsx_i64, 0);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.f32, b_.f32, 4, 1, 2, 3);
+    #else
+      r_.f32[0] = b_.f32[0];
+      r_.f32[1] = a_.f32[1];
+      r_.f32[2] = a_.f32[2];
+      r_.f32[3] = a_.f32[3];
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_move_ss(a, b) simde_mm_move_ss((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_x_mm_broadcastlow_ps(simde__m128 a) {
+  /* This function broadcasts the first element in the input vector to
+   * all lanes.  It is used to avoid generating spurious exceptions in
+   * *_ss functions since there may be garbage in the upper lanes. */
+
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_shuffle_ps(a, a, 0);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f32 = vdupq_laneq_f32(a_.neon_f32, 0);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_f32 = vec_splat(a_.altivec_f32, 0);
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      r_.lsx_i64 = __lsx_vreplvei_w(a_.lsx_i64, 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f32x4_splat(a_.f32[0]);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.f32, a_.f32, 0, 0, 0, 0);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = a_.f32[0];
+      }
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_add_ps (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_add_ps(a, b);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_f32 = vaddq_f32(a_.neon_f32, b_.neon_f32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f32x4_add(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_f32 = vec_add(a_.altivec_f32, b_.altivec_f32);
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      r_.lsx_f32 = __lsx_vfadd_s(a_.lsx_f32, b_.lsx_f32);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.f32 = a_.f32 + b_.f32;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = a_.f32[i] + b_.f32[i];
+      }
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_add_ps(a, b) simde_mm_add_ps((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_add_ss (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_add_ss(a, b);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+    return simde_mm_move_ss(a, simde_mm_add_ps(a, b));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_ss(a, simde_mm_add_ps(simde_x_mm_broadcastlow_ps(a), simde_x_mm_broadcastlow_ps(b)));
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      float32_t b0 = vgetq_lane_f32(b_.neon_f32, 0);
+      float32x4_t value = vsetq_lane_f32(b0, vdupq_n_f32(0), 0);
+      // the upper values in the result must be the remnants of <a>.
+      r_.neon_f32 = vaddq_f32(a_.neon_f32, value);
+    #else
+      r_.f32[0] = a_.f32[0] + b_.f32[0];
+      r_.f32[1] = a_.f32[1];
+      r_.f32[2] = a_.f32[2];
+      r_.f32[3] = a_.f32[3];
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_add_ss(a, b) simde_mm_add_ss((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_and_ps (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_and_ps(a, b);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vandq_s32(a_.neon_i32, b_.neon_i32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_v128_and(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      r_.lsx_i64 = __lsx_vand_v(a_.lsx_i64, b_.lsx_i64);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32 = a_.i32 & b_.i32;
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_f32 = vec_and(a_.altivec_f32, b_.altivec_f32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = a_.i32[i] & b_.i32[i];
+      }
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_and_ps(a, b) simde_mm_and_ps((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_andnot_ps (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_andnot_ps(a, b);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vbicq_s32(b_.neon_i32, a_.neon_i32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_v128_andnot(b_.wasm_v128, a_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_14_NATIVE)
+      r_.altivec_f32 = vec_andc(b_.altivec_f32, a_.altivec_f32);
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      r_.lsx_i64 = __lsx_vandn_v(a_.lsx_i64, b_.lsx_i64);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32 = ~a_.i32 & b_.i32;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = ~(a_.i32[i]) & b_.i32[i];
+      }
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_andnot_ps(a, b) simde_mm_andnot_ps((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_xor_ps (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_xor_ps(a, b);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = veorq_s32(a_.neon_i32, b_.neon_i32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_v128_xor(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_i32 = vec_xor(a_.altivec_i32, b_.altivec_i32);
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      r_.lsx_i64 = __lsx_vxor_v(a_.lsx_i64, b_.lsx_i64);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32f = a_.i32f ^ b_.i32f;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+        r_.u32[i] = a_.u32[i] ^ b_.u32[i];
+      }
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_xor_ps(a, b) simde_mm_xor_ps((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_or_ps (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_or_ps(a, b);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vorrq_s32(a_.neon_i32, b_.neon_i32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_v128_or(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_i32 = vec_or(a_.altivec_i32, b_.altivec_i32);
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      r_.lsx_i64 = __lsx_vor_v(a_.lsx_i64, b_.lsx_i64);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32f = a_.i32f | b_.i32f;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+        r_.u32[i] = a_.u32[i] | b_.u32[i];
+      }
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_or_ps(a, b) simde_mm_or_ps((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_x_mm_not_ps(simde__m128 a) {
+  #if defined(SIMDE_X86_AVX512VL_NATIVE)
+    __m128i ai = _mm_castps_si128(a);
+    return _mm_castsi128_ps(_mm_ternarylogic_epi32(ai, ai, ai, 0x55));
+  #elif defined(SIMDE_X86_SSE2_NATIVE)
+    /* Note: we use ints instead of floats because we don't want cmpeq
+     * to return false for (NaN, NaN) */
+    __m128i ai = _mm_castps_si128(a);
+    return _mm_castsi128_ps(_mm_andnot_si128(ai, _mm_cmpeq_epi32(ai, ai)));
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vmvnq_s32(a_.neon_i32);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_i32 = vec_nor(a_.altivec_i32, a_.altivec_i32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_v128_not(a_.wasm_v128);
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      r_.lsx_i64 = __lsx_vnor_v(a_.lsx_i64, a_.lsx_i64);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32 = ~a_.i32;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = ~(a_.i32[i]);
+      }
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_x_mm_select_ps(simde__m128 a, simde__m128 b, simde__m128 mask) {
+  /* This function is for when you want to blend two elements together
+   * according to a mask.  It is similar to _mm_blendv_ps, except that
+   * it is undefined whether the blend is based on the highest bit in
+   * each lane (like blendv) or just bitwise operations.  This allows
+   * us to implement the function efficiently everywhere.
+   *
+   * Basically, you promise that all the lanes in mask are either 0 or
+   * ~0. */
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_blendv_ps(a, b, mask);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b),
+      mask_ = simde__m128_to_private(mask);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vbslq_s32(mask_.neon_u32, b_.neon_i32, a_.neon_i32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_v128_bitselect(b_.wasm_v128, a_.wasm_v128, mask_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_i32 = vec_sel(a_.altivec_i32, b_.altivec_i32, mask_.altivec_u32);
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      r_.lsx_i64 = __lsx_vbitsel_v(a_.lsx_i64, b_.lsx_i64, mask_.lsx_i64);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32 = a_.i32 ^ ((a_.i32 ^ b_.i32) & mask_.i32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = a_.i32[i] ^ ((a_.i32[i] ^ b_.i32[i]) & mask_.i32[i]);
+      }
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_avg_pu16 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_avg_pu16(a, b);
+  #else
+    simde__m64_private
+      r_,
+      a_ = simde__m64_to_private(a),
+      b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u16 = vrhadd_u16(b_.neon_u16, a_.neon_u16);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && defined(SIMDE_CONVERT_VECTOR_) && !defined(SIMDE_BUG_GCC_100761)
+      uint32_t wa SIMDE_VECTOR(16);
+      uint32_t wb SIMDE_VECTOR(16);
+      uint32_t wr SIMDE_VECTOR(16);
+      SIMDE_CONVERT_VECTOR_(wa, a_.u16);
+      SIMDE_CONVERT_VECTOR_(wb, b_.u16);
+      wr = (wa + wb + 1) >> 1;
+      SIMDE_CONVERT_VECTOR_(r_.u16, wr);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+        r_.u16[i] = (a_.u16[i] + b_.u16[i] + 1) >> 1;
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_pavgw(a, b) simde_mm_avg_pu16(a, b)
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_avg_pu16(a, b) simde_mm_avg_pu16(a, b)
+#  define _m_pavgw(a, b) simde_mm_avg_pu16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_avg_pu8 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_avg_pu8(a, b);
+  #else
+    simde__m64_private
+      r_,
+      a_ = simde__m64_to_private(a),
+      b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u8 = vrhadd_u8(b_.neon_u8, a_.neon_u8);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && defined(SIMDE_CONVERT_VECTOR_) && !defined(SIMDE_BUG_GCC_100761)
+      uint16_t wa SIMDE_VECTOR(16);
+      uint16_t wb SIMDE_VECTOR(16);
+      uint16_t wr SIMDE_VECTOR(16);
+      SIMDE_CONVERT_VECTOR_(wa, a_.u8);
+      SIMDE_CONVERT_VECTOR_(wb, b_.u8);
+      wr = (wa + wb + 1) >> 1;
+      SIMDE_CONVERT_VECTOR_(r_.u8, wr);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+        r_.u8[i] = (a_.u8[i] + b_.u8[i] + 1) >> 1;
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_pavgb(a, b) simde_mm_avg_pu8(a, b)
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_avg_pu8(a, b) simde_mm_avg_pu8(a, b)
+#  define _m_pavgb(a, b) simde_mm_avg_pu8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_x_mm_abs_ps(simde__m128 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    simde_float32 mask_;
+    uint32_t u32_ = UINT32_C(0x7FFFFFFF);
+    simde_memcpy(&mask_, &u32_, sizeof(u32_));
+    return _mm_and_ps(_mm_set1_ps(mask_), a);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_f32 = vabsq_f32(a_.neon_f32);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_14_NATIVE)
+      r_.altivec_f32 = vec_abs(a_.altivec_f32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f32x4_abs(a_.wasm_v128);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_fabsf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cmpeq_ps (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_cmpeq_ps(a, b);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vceqq_f32(a_.neon_f32, b_.neon_f32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f32x4_eq(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_14_NATIVE)
+      r_.altivec_f32 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(float), vec_cmpeq(a_.altivec_f32, b_.altivec_f32));
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      r_.lsx_i64 = __lsx_vfcmp_ceq_s(a_.lsx_f32, b_.lsx_f32);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), a_.f32 == b_.f32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.u32[i] = (a_.f32[i] == b_.f32[i]) ? ~UINT32_C(0) : UINT32_C(0);
+      }
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cmpeq_ps(a, b) simde_mm_cmpeq_ps((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cmpeq_ss (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_cmpeq_ss(a, b);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+    return simde_mm_move_ss(a, simde_mm_cmpeq_ps(a, b));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_ss(a, simde_mm_cmpeq_ps(simde_x_mm_broadcastlow_ps(a), simde_x_mm_broadcastlow_ps(b)));
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    r_.u32[0] = (a_.f32[0] == b_.f32[0]) ? ~UINT32_C(0) : UINT32_C(0);
+    SIMDE_VECTORIZE
+    for (size_t i = 1 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.u32[i] = a_.u32[i];
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cmpeq_ss(a, b) simde_mm_cmpeq_ss((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cmpge_ps (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_cmpge_ps(a, b);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vcgeq_f32(a_.neon_f32, b_.neon_f32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f32x4_ge(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_f32 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(float), vec_cmpge(a_.altivec_f32, b_.altivec_f32));
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      r_.lsx_i64 = __lsx_vfcmp_cle_s(b_.lsx_f32, a_.lsx_f32);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), (a_.f32 >= b_.f32));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.u32[i] = (a_.f32[i] >= b_.f32[i]) ? ~UINT32_C(0) : UINT32_C(0);
+      }
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cmpge_ps(a, b) simde_mm_cmpge_ps((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cmpge_ss (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE) && !defined(__PGI)
+    return _mm_cmpge_ss(a, b);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+    return simde_mm_move_ss(a, simde_mm_cmpge_ps(a, b));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_ss(a, simde_mm_cmpge_ps(simde_x_mm_broadcastlow_ps(a), simde_x_mm_broadcastlow_ps(b)));
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    r_.u32[0] = (a_.f32[0] >= b_.f32[0]) ? ~UINT32_C(0) : UINT32_C(0);
+    SIMDE_VECTORIZE
+    for (size_t i = 1 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.u32[i] = a_.u32[i];
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cmpge_ss(a, b) simde_mm_cmpge_ss((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cmpgt_ps (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_cmpgt_ps(a, b);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vcgtq_f32(a_.neon_f32, b_.neon_f32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f32x4_gt(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_f32 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(float), vec_cmpgt(a_.altivec_f32, b_.altivec_f32));
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      r_.lsx_i64 = __lsx_vfcmp_clt_s(b_.lsx_f32, a_.lsx_f32);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), (a_.f32 > b_.f32));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.u32[i] = (a_.f32[i] > b_.f32[i]) ? ~UINT32_C(0) : UINT32_C(0);
+      }
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cmpgt_ps(a, b) simde_mm_cmpgt_ps((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cmpgt_ss (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE) && !defined(__PGI)
+    return _mm_cmpgt_ss(a, b);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+    return simde_mm_move_ss(a, simde_mm_cmpgt_ps(a, b));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_ss(a, simde_mm_cmpgt_ps(simde_x_mm_broadcastlow_ps(a), simde_x_mm_broadcastlow_ps(b)));
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    r_.u32[0] = (a_.f32[0] > b_.f32[0]) ? ~UINT32_C(0) : UINT32_C(0);
+    SIMDE_VECTORIZE
+    for (size_t i = 1 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.u32[i] = a_.u32[i];
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cmpgt_ss(a, b) simde_mm_cmpgt_ss((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cmple_ps (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_cmple_ps(a, b);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vcleq_f32(a_.neon_f32, b_.neon_f32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f32x4_le(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_f32 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(float), vec_cmple(a_.altivec_f32, b_.altivec_f32));
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      r_.lsx_i64 = __lsx_vfcmp_cle_s(a_.lsx_f32, b_.lsx_f32);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), (a_.f32 <= b_.f32));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.u32[i] = (a_.f32[i] <= b_.f32[i]) ? ~UINT32_C(0) : UINT32_C(0);
+      }
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cmple_ps(a, b) simde_mm_cmple_ps((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cmple_ss (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_cmple_ss(a, b);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+    return simde_mm_move_ss(a, simde_mm_cmple_ps(a, b));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_ss(a, simde_mm_cmple_ps(simde_x_mm_broadcastlow_ps(a), simde_x_mm_broadcastlow_ps(b)));
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    r_.u32[0] = (a_.f32[0] <= b_.f32[0]) ? ~UINT32_C(0) : UINT32_C(0);
+    SIMDE_VECTORIZE
+    for (size_t i = 1 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.u32[i] = a_.u32[i];
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cmple_ss(a, b) simde_mm_cmple_ss((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cmplt_ps (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_cmplt_ps(a, b);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vcltq_f32(a_.neon_f32, b_.neon_f32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f32x4_lt(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_f32 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(float), vec_cmplt(a_.altivec_f32, b_.altivec_f32));
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      r_.lsx_i64 = __lsx_vfcmp_clt_s(a_.lsx_f32, b_.lsx_f32);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), (a_.f32 < b_.f32));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.u32[i] = (a_.f32[i] < b_.f32[i]) ? ~UINT32_C(0) : UINT32_C(0);
+      }
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cmplt_ps(a, b) simde_mm_cmplt_ps((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cmplt_ss (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_cmplt_ss(a, b);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+    return simde_mm_move_ss(a, simde_mm_cmplt_ps(a, b));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_ss(a, simde_mm_cmplt_ps(simde_x_mm_broadcastlow_ps(a), simde_x_mm_broadcastlow_ps(b)));
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    r_.u32[0] = (a_.f32[0] < b_.f32[0]) ? ~UINT32_C(0) : UINT32_C(0);
+    SIMDE_VECTORIZE
+    for (size_t i = 1 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.u32[i] = a_.u32[i];
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cmplt_ss(a, b) simde_mm_cmplt_ss((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cmpneq_ps (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_cmpneq_ps(a, b);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vmvnq_u32(vceqq_f32(a_.neon_f32, b_.neon_f32));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f32x4_ne(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_14_NATIVE)
+      r_.altivec_f32 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(float), vec_cmpeq(a_.altivec_f32, b_.altivec_f32));
+      r_.altivec_f32 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(float), vec_nor(r_.altivec_f32, r_.altivec_f32));
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      r_.lsx_i64 = __lsx_vfcmp_cune_s(a_.lsx_f32, b_.lsx_f32);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), (a_.f32 != b_.f32));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.u32[i] = (a_.f32[i] != b_.f32[i]) ? ~UINT32_C(0) : UINT32_C(0);
+      }
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cmpneq_ps(a, b) simde_mm_cmpneq_ps((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cmpneq_ss (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_cmpneq_ss(a, b);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+    return simde_mm_move_ss(a, simde_mm_cmpneq_ps(a, b));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_ss(a, simde_mm_cmpneq_ps(simde_x_mm_broadcastlow_ps(a), simde_x_mm_broadcastlow_ps(b)));
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    r_.u32[0] = (a_.f32[0] != b_.f32[0]) ? ~UINT32_C(0) : UINT32_C(0);
+    SIMDE_VECTORIZE
+    for (size_t i = 1 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.u32[i] = a_.u32[i];
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cmpneq_ss(a, b) simde_mm_cmpneq_ss((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cmpnge_ps (simde__m128 a, simde__m128 b) {
+  return simde_mm_cmplt_ps(a, b);
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cmpnge_ps(a, b) simde_mm_cmpnge_ps((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cmpnge_ss (simde__m128 a, simde__m128 b) {
+  return simde_mm_cmplt_ss(a, b);
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cmpnge_ss(a, b) simde_mm_cmpnge_ss((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cmpngt_ps (simde__m128 a, simde__m128 b) {
+  return simde_mm_cmple_ps(a, b);
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cmpngt_ps(a, b) simde_mm_cmpngt_ps((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cmpngt_ss (simde__m128 a, simde__m128 b) {
+  return simde_mm_cmple_ss(a, b);
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cmpngt_ss(a, b) simde_mm_cmpngt_ss((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cmpnle_ps (simde__m128 a, simde__m128 b) {
+  return simde_mm_cmpgt_ps(a, b);
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cmpnle_ps(a, b) simde_mm_cmpnle_ps((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cmpnle_ss (simde__m128 a, simde__m128 b) {
+  return simde_mm_cmpgt_ss(a, b);
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cmpnle_ss(a, b) simde_mm_cmpnle_ss((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cmpnlt_ps (simde__m128 a, simde__m128 b) {
+  return simde_mm_cmpge_ps(a, b);
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cmpnlt_ps(a, b) simde_mm_cmpnlt_ps((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cmpnlt_ss (simde__m128 a, simde__m128 b) {
+  return simde_mm_cmpge_ss(a, b);
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cmpnlt_ss(a, b) simde_mm_cmpnlt_ss((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cmpord_ps (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_cmpord_ps(a, b);
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    return wasm_v128_and(wasm_f32x4_eq(a, a), wasm_f32x4_eq(b, b));
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      /* Note: NEON does not have ordered compare builtin
+        Need to compare a eq a and b eq b to check for NaN
+        Do AND of results to get final */
+      uint32x4_t ceqaa = vceqq_f32(a_.neon_f32, a_.neon_f32);
+      uint32x4_t ceqbb = vceqq_f32(b_.neon_f32, b_.neon_f32);
+      r_.neon_u32 = vandq_u32(ceqaa, ceqbb);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_v128_and(wasm_f32x4_eq(a_.wasm_v128, a_.wasm_v128), wasm_f32x4_eq(b_.wasm_v128, b_.wasm_v128));
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_f32 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(float),
+          vec_and(vec_cmpeq(a_.altivec_f32, a_.altivec_f32), vec_cmpeq(b_.altivec_f32, b_.altivec_f32)));
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      r_.lsx_i64 = __lsx_vfcmp_cun_s(a_.lsx_f32, b_.lsx_f32);
+      r_.lsx_i64 = __lsx_vnor_v(r_.lsx_i64, r_.lsx_i64);
+    #elif defined(simde_math_isnanf)
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.u32[i] = (simde_math_isnanf(a_.f32[i]) || simde_math_isnanf(b_.f32[i])) ? UINT32_C(0) : ~UINT32_C(0);
+      }
+    #else
+      HEDLEY_UNREACHABLE();
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cmpord_ps(a, b) simde_mm_cmpord_ps((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cmpunord_ps (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_cmpunord_ps(a, b);
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    return wasm_v128_or(wasm_f32x4_ne(a, a), wasm_f32x4_ne(b, b));
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      uint32x4_t ceqaa = vceqq_f32(a_.neon_f32, a_.neon_f32);
+      uint32x4_t ceqbb = vceqq_f32(b_.neon_f32, b_.neon_f32);
+      r_.neon_u32 = vmvnq_u32(vandq_u32(ceqaa, ceqbb));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_v128_or(wasm_f32x4_ne(a_.wasm_v128, a_.wasm_v128), wasm_f32x4_ne(b_.wasm_v128, b_.wasm_v128));
+    #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE)
+      r_.altivec_f32 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(float),
+          vec_nand(vec_cmpeq(a_.altivec_f32, a_.altivec_f32), vec_cmpeq(b_.altivec_f32, b_.altivec_f32)));
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_f32 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(float),
+          vec_and(vec_cmpeq(a_.altivec_f32, a_.altivec_f32), vec_cmpeq(b_.altivec_f32, b_.altivec_f32)));
+      r_.altivec_f32 = vec_nor(r_.altivec_f32, r_.altivec_f32);
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      r_.lsx_i64 = __lsx_vfcmp_cun_s(a_.lsx_f32, b_.lsx_f32);
+    #elif defined(simde_math_isnanf)
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.u32[i] = (simde_math_isnanf(a_.f32[i]) || simde_math_isnanf(b_.f32[i])) ? ~UINT32_C(0) : UINT32_C(0);
+      }
+    #else
+      HEDLEY_UNREACHABLE();
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cmpunord_ps(a, b) simde_mm_cmpunord_ps((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cmpunord_ss (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE) && !defined(__PGI)
+    return _mm_cmpunord_ss(a, b);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+    return simde_mm_move_ss(a, simde_mm_cmpunord_ps(a, b));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_ss(a, simde_mm_cmpunord_ps(simde_x_mm_broadcastlow_ps(a), simde_x_mm_broadcastlow_ps(b)));
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(simde_math_isnanf)
+      r_.u32[0] = (simde_math_isnanf(a_.f32[0]) || simde_math_isnanf(b_.f32[0])) ? ~UINT32_C(0) : UINT32_C(0);
+      SIMDE_VECTORIZE
+      for (size_t i = 1 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+        r_.u32[i] = a_.u32[i];
+      }
+    #else
+      HEDLEY_UNREACHABLE();
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cmpunord_ss(a, b) simde_mm_cmpunord_ss((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_comieq_ss (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_comieq_ss(a, b);
+  #else
+    simde__m128_private
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      uint32x4_t a_not_nan = vceqq_f32(a_.neon_f32, a_.neon_f32);
+      uint32x4_t b_not_nan = vceqq_f32(b_.neon_f32, b_.neon_f32);
+      uint32x4_t a_or_b_nan = vmvnq_u32(vandq_u32(a_not_nan, b_not_nan));
+      uint32x4_t a_eq_b = vceqq_f32(a_.neon_f32, b_.neon_f32);
+      return !!(vgetq_lane_u32(vorrq_u32(a_or_b_nan, a_eq_b), 0) != 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      return wasm_f32x4_extract_lane(a_.wasm_v128, 0) == wasm_f32x4_extract_lane(b_.wasm_v128, 0);
+    #else
+      return a_.f32[0] == b_.f32[0];
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_comieq_ss(a, b) simde_mm_comieq_ss((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_comige_ss (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_comige_ss(a, b);
+  #else
+    simde__m128_private
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      uint32x4_t a_not_nan = vceqq_f32(a_.neon_f32, a_.neon_f32);
+      uint32x4_t b_not_nan = vceqq_f32(b_.neon_f32, b_.neon_f32);
+      uint32x4_t a_and_b_not_nan = vandq_u32(a_not_nan, b_not_nan);
+      uint32x4_t a_ge_b = vcgeq_f32(a_.neon_f32, b_.neon_f32);
+      return !!(vgetq_lane_u32(vandq_u32(a_and_b_not_nan, a_ge_b), 0) != 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      return wasm_f32x4_extract_lane(a_.wasm_v128, 0) >= wasm_f32x4_extract_lane(b_.wasm_v128, 0);
+    #else
+      return a_.f32[0] >= b_.f32[0];
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_comige_ss(a, b) simde_mm_comige_ss((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_comigt_ss (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_comigt_ss(a, b);
+  #else
+    simde__m128_private
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      uint32x4_t a_not_nan = vceqq_f32(a_.neon_f32, a_.neon_f32);
+      uint32x4_t b_not_nan = vceqq_f32(b_.neon_f32, b_.neon_f32);
+      uint32x4_t a_and_b_not_nan = vandq_u32(a_not_nan, b_not_nan);
+      uint32x4_t a_gt_b = vcgtq_f32(a_.neon_f32, b_.neon_f32);
+      return !!(vgetq_lane_u32(vandq_u32(a_and_b_not_nan, a_gt_b), 0) != 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      return wasm_f32x4_extract_lane(a_.wasm_v128, 0) > wasm_f32x4_extract_lane(b_.wasm_v128, 0);
+    #else
+      return a_.f32[0] > b_.f32[0];
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_comigt_ss(a, b) simde_mm_comigt_ss((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_comile_ss (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_comile_ss(a, b);
+  #else
+    simde__m128_private
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      uint32x4_t a_not_nan = vceqq_f32(a_.neon_f32, a_.neon_f32);
+      uint32x4_t b_not_nan = vceqq_f32(b_.neon_f32, b_.neon_f32);
+      uint32x4_t a_or_b_nan = vmvnq_u32(vandq_u32(a_not_nan, b_not_nan));
+      uint32x4_t a_le_b = vcleq_f32(a_.neon_f32, b_.neon_f32);
+      return !!(vgetq_lane_u32(vorrq_u32(a_or_b_nan, a_le_b), 0) != 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      return wasm_f32x4_extract_lane(a_.wasm_v128, 0) <= wasm_f32x4_extract_lane(b_.wasm_v128, 0);
+    #else
+      return a_.f32[0] <= b_.f32[0];
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_comile_ss(a, b) simde_mm_comile_ss((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_comilt_ss (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_comilt_ss(a, b);
+  #else
+    simde__m128_private
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      uint32x4_t a_not_nan = vceqq_f32(a_.neon_f32, a_.neon_f32);
+      uint32x4_t b_not_nan = vceqq_f32(b_.neon_f32, b_.neon_f32);
+      uint32x4_t a_or_b_nan = vmvnq_u32(vandq_u32(a_not_nan, b_not_nan));
+      uint32x4_t a_lt_b = vcltq_f32(a_.neon_f32, b_.neon_f32);
+      return !!(vgetq_lane_u32(vorrq_u32(a_or_b_nan, a_lt_b), 0) != 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      return wasm_f32x4_extract_lane(a_.wasm_v128, 0) < wasm_f32x4_extract_lane(b_.wasm_v128, 0);
+    #else
+      return a_.f32[0] < b_.f32[0];
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_comilt_ss(a, b) simde_mm_comilt_ss((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_comineq_ss (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_comineq_ss(a, b);
+  #else
+    simde__m128_private
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      uint32x4_t a_not_nan = vceqq_f32(a_.neon_f32, a_.neon_f32);
+      uint32x4_t b_not_nan = vceqq_f32(b_.neon_f32, b_.neon_f32);
+      uint32x4_t a_and_b_not_nan = vandq_u32(a_not_nan, b_not_nan);
+      uint32x4_t a_neq_b = vmvnq_u32(vceqq_f32(a_.neon_f32, b_.neon_f32));
+      return !!(vgetq_lane_u32(vandq_u32(a_and_b_not_nan, a_neq_b), 0) != 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      return wasm_f32x4_extract_lane(a_.wasm_v128, 0) != wasm_f32x4_extract_lane(b_.wasm_v128, 0);
+    #else
+      return a_.f32[0] != b_.f32[0];
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_comineq_ss(a, b) simde_mm_comineq_ss((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_x_mm_copysign_ps(simde__m128 dest, simde__m128 src) {
+  simde__m128_private
+    r_,
+    dest_ = simde__m128_to_private(dest),
+    src_ = simde__m128_to_private(src);
+
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    const uint32x4_t sign_pos = vreinterpretq_u32_f32(vdupq_n_f32(-SIMDE_FLOAT32_C(0.0)));
+    r_.neon_u32 = vbslq_u32(sign_pos, src_.neon_u32, dest_.neon_u32);
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    const v128_t sign_pos = wasm_f32x4_splat(-0.0f);
+    r_.wasm_v128 = wasm_v128_bitselect(src_.wasm_v128, dest_.wasm_v128, sign_pos);
+  #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+    #if defined(SIMDE_BUG_VEC_CPSGN_REVERSED_ARGS)
+      r_.altivec_f32 = vec_cpsgn(dest_.altivec_f32, src_.altivec_f32);
+    #else
+      r_.altivec_f32 = vec_cpsgn(src_.altivec_f32, dest_.altivec_f32);
+    #endif
+  #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_14_NATIVE)
+    const SIMDE_POWER_ALTIVEC_VECTOR(unsigned int) sign_pos = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned int), vec_splats(-0.0f));
+    r_.altivec_f32 = vec_sel(dest_.altivec_f32, src_.altivec_f32, sign_pos);
+  #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+    const v4f32 sign_pos = {-0.0f, -0.0f, -0.0f, -0.0f};
+    r_.lsx_i64 = __lsx_vbitsel_v(dest_.lsx_i64, src_.lsx_i64, (v2i64)sign_pos);
+  #elif defined(SIMDE_IEEE754_STORAGE)
+    (void) src_;
+    (void) dest_;
+    simde__m128 sign_pos = simde_mm_set1_ps(-0.0f);
+    r_ = simde__m128_to_private(simde_mm_xor_ps(dest, simde_mm_and_ps(simde_mm_xor_ps(dest, src), sign_pos)));
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_copysignf(dest_.f32[i], src_.f32[i]);
+    }
+  #endif
+
+  return simde__m128_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_x_mm_xorsign_ps(simde__m128 dest, simde__m128 src) {
+  return simde_mm_xor_ps(simde_mm_and_ps(simde_mm_set1_ps(-0.0f), src), dest);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cvt_pi2ps (simde__m128 a, simde__m64 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_cvt_pi2ps(a, b);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_f32 = vcombine_f32(vcvt_f32_s32(b_.neon_i32), vget_high_f32(a_.neon_f32));
+    #elif defined(SIMDE_CONVERT_VECTOR_)
+      SIMDE_CONVERT_VECTOR_(r_.m64_private[0].f32, b_.i32);
+      r_.m64_private[1] = a_.m64_private[1];
+    #else
+      r_.f32[0] = (simde_float32) b_.i32[0];
+      r_.f32[1] = (simde_float32) b_.i32[1];
+      r_.i32[2] = a_.i32[2];
+      r_.i32[3] = a_.i32[3];
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cvt_pi2ps(a, b) simde_mm_cvt_pi2ps((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_cvt_ps2pi (simde__m128 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_cvt_ps2pi(a);
+  #else
+    simde__m64_private r_;
+    simde__m128_private a_;
+
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    a_ = simde__m128_to_private(simde_mm_round_ps(a, SIMDE_MM_FROUND_CUR_DIRECTION));
+    r_.neon_i32 = vcvt_s32_f32(vget_low_f32(a_.neon_f32));
+  #elif defined(SIMDE_CONVERT_VECTOR_) && SIMDE_NATURAL_VECTOR_SIZE_GE(128) && !defined(SIMDE_BUG_GCC_100761)
+    a_ = simde__m128_to_private(simde_mm_round_ps(a, SIMDE_MM_FROUND_CUR_DIRECTION));
+    SIMDE_CONVERT_VECTOR_(r_.i32, a_.m64_private[0].f32);
+  #else
+    a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+      r_.i32[i] = HEDLEY_STATIC_CAST(int32_t, simde_math_nearbyintf(a_.f32[i]));
+    }
+  #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cvt_ps2pi(a) simde_mm_cvt_ps2pi((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cvt_si2ss (simde__m128 a, int32_t b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_cvt_si2ss(a, b);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_f32 = vsetq_lane_f32(HEDLEY_STATIC_CAST(float, b), a_.neon_f32, 0);
+    #else
+      r_.f32[0] = HEDLEY_STATIC_CAST(simde_float32, b);
+      r_.i32[1] = a_.i32[1];
+      r_.i32[2] = a_.i32[2];
+      r_.i32[3] = a_.i32[3];
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cvt_si2ss(a, b) simde_mm_cvt_si2ss((a), b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int32_t
+simde_mm_cvt_ss2si (simde__m128 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_cvt_ss2si(a);
+  #elif defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_FAST_CONVERSION_RANGE) && !defined(SIMDE_BUG_GCC_95399)
+    return vgetq_lane_s32(vcvtnq_s32_f32(simde__m128_to_neon_f32(a)), 0);
+  #else
+    simde__m128_private a_ = simde__m128_to_private(simde_mm_round_ps(a, SIMDE_MM_FROUND_CUR_DIRECTION));
+    #if !defined(SIMDE_FAST_CONVERSION_RANGE)
+      return ((a_.f32[0] > HEDLEY_STATIC_CAST(simde_float32, INT32_MIN)) &&
+          (a_.f32[0] < HEDLEY_STATIC_CAST(simde_float32, INT32_MAX))) ?
+        SIMDE_CONVERT_FTOI(int32_t, a_.f32[0]) : INT32_MIN;
+    #else
+      return SIMDE_CONVERT_FTOI(int32_t, a_.f32[0]);
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cvt_ss2si(a) simde_mm_cvt_ss2si((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cvtpi16_ps (simde__m64 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_cvtpi16_ps(a);
+  #else
+    simde__m128_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_f32 = vcvtq_f32_s32(vmovl_s16(a_.neon_i16));
+    #elif defined(SIMDE_CONVERT_VECTOR_)
+      SIMDE_CONVERT_VECTOR_(r_.f32, a_.i16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        simde_float32 v = a_.i16[i];
+        r_.f32[i] = v;
+      }
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cvtpi16_ps(a) simde_mm_cvtpi16_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cvtpi32_ps (simde__m128 a, simde__m64 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_cvtpi32_ps(a, b);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+    simde__m64_private b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_f32 = vcombine_f32(vcvt_f32_s32(b_.neon_i32), vget_high_f32(a_.neon_f32));
+    #elif defined(SIMDE_CONVERT_VECTOR_)
+      SIMDE_CONVERT_VECTOR_(r_.m64_private[0].f32, b_.i32);
+      r_.m64_private[1] = a_.m64_private[1];
+    #else
+      r_.f32[0] = (simde_float32) b_.i32[0];
+      r_.f32[1] = (simde_float32) b_.i32[1];
+      r_.i32[2] = a_.i32[2];
+      r_.i32[3] = a_.i32[3];
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cvtpi32_ps(a, b) simde_mm_cvtpi32_ps((a), b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cvtpi32x2_ps (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_cvtpi32x2_ps(a, b);
+  #else
+    simde__m128_private r_;
+    simde__m64_private
+      a_ = simde__m64_to_private(a),
+      b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_f32 = vcvtq_f32_s32(vcombine_s32(a_.neon_i32, b_.neon_i32));
+    #elif defined(SIMDE_CONVERT_VECTOR_)
+      SIMDE_CONVERT_VECTOR_(r_.m64_private[0].f32, a_.i32);
+      SIMDE_CONVERT_VECTOR_(r_.m64_private[1].f32, b_.i32);
+    #else
+      r_.f32[0] = (simde_float32) a_.i32[0];
+      r_.f32[1] = (simde_float32) a_.i32[1];
+      r_.f32[2] = (simde_float32) b_.i32[0];
+      r_.f32[3] = (simde_float32) b_.i32[1];
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cvtpi32x2_ps(a, b) simde_mm_cvtpi32x2_ps(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cvtpi8_ps (simde__m64 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_cvtpi8_ps(a);
+  #else
+    simde__m128_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_f32 = vcvtq_f32_s32(vmovl_s16(vget_low_s16(vmovl_s8(a_.neon_i8))));
+    #else
+      r_.f32[0] = HEDLEY_STATIC_CAST(simde_float32, a_.i8[0]);
+      r_.f32[1] = HEDLEY_STATIC_CAST(simde_float32, a_.i8[1]);
+      r_.f32[2] = HEDLEY_STATIC_CAST(simde_float32, a_.i8[2]);
+      r_.f32[3] = HEDLEY_STATIC_CAST(simde_float32, a_.i8[3]);
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cvtpi8_ps(a) simde_mm_cvtpi8_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_cvtps_pi16 (simde__m128 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_cvtps_pi16(a);
+  #else
+    simde__m64_private r_;
+    simde__m128_private a_ = simde__m128_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && !defined(SIMDE_BUG_GCC_95399)
+      r_.neon_i16 = vmovn_s32(vcvtq_s32_f32(vrndiq_f32(a_.neon_f32)));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = SIMDE_CONVERT_FTOI(int16_t, simde_math_roundf(a_.f32[i]));
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cvtps_pi16(a) simde_mm_cvtps_pi16((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_cvtps_pi32 (simde__m128 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_cvtps_pi32(a);
+  #else
+    simde__m64_private r_;
+    simde__m128_private a_ = simde__m128_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_FAST_CONVERSION_RANGE) && !defined(SIMDE_BUG_GCC_95399)
+      r_.neon_i32 = vcvt_s32_f32(vget_low_f32(vrndiq_f32(a_.neon_f32)));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        simde_float32 v = simde_math_roundf(a_.f32[i]);
+        #if !defined(SIMDE_FAST_CONVERSION_RANGE)
+          r_.i32[i] = ((v > HEDLEY_STATIC_CAST(simde_float32, INT32_MIN)) && (v < HEDLEY_STATIC_CAST(simde_float32, INT32_MAX))) ?
+            SIMDE_CONVERT_FTOI(int32_t, v) : INT32_MIN;
+        #else
+          r_.i32[i] = SIMDE_CONVERT_FTOI(int32_t, v);
+        #endif
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cvtps_pi32(a) simde_mm_cvtps_pi32((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_cvtps_pi8 (simde__m128 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_cvtps_pi8(a);
+  #else
+    simde__m64_private r_;
+    simde__m128_private a_ = simde__m128_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && !defined(SIMDE_BUG_GCC_95471)
+      /* Clamp the input to [INT8_MIN, INT8_MAX], round, convert to i32, narrow to
+      * i16, combine with an all-zero vector of i16 (which will become the upper
+      * half), narrow to i8. */
+      float32x4_t max = vdupq_n_f32(HEDLEY_STATIC_CAST(simde_float32, INT8_MAX));
+      float32x4_t min = vdupq_n_f32(HEDLEY_STATIC_CAST(simde_float32, INT8_MIN));
+      float32x4_t values = vrndnq_f32(vmaxq_f32(vminq_f32(max, a_.neon_f32), min));
+      r_.neon_i8 = vmovn_s16(vcombine_s16(vmovn_s32(vcvtq_s32_f32(values)), vdup_n_s16(0)));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(a_.f32) / sizeof(a_.f32[0])) ; i++) {
+        if (a_.f32[i] > HEDLEY_STATIC_CAST(simde_float32, INT8_MAX))
+          r_.i8[i] = INT8_MAX;
+        else if (a_.f32[i] <  HEDLEY_STATIC_CAST(simde_float32, INT8_MIN))
+          r_.i8[i] = INT8_MIN;
+        else
+          r_.i8[i] = SIMDE_CONVERT_FTOI(int8_t, simde_math_roundf(a_.f32[i]));
+      }
+      /* Note: the upper half is undefined */
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cvtps_pi8(a) simde_mm_cvtps_pi8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cvtpu16_ps (simde__m64 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_cvtpu16_ps(a);
+  #else
+    simde__m128_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_f32 = vcvtq_f32_u32(vmovl_u16(a_.neon_u16));
+    #elif defined(SIMDE_CONVERT_VECTOR_)
+      SIMDE_CONVERT_VECTOR_(r_.f32, a_.u16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = (simde_float32) a_.u16[i];
+      }
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cvtpu16_ps(a) simde_mm_cvtpu16_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cvtpu8_ps (simde__m64 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_cvtpu8_ps(a);
+  #else
+    simde__m128_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_f32 = vcvtq_f32_u32(vmovl_u16(vget_low_u16(vmovl_u8(a_.neon_u8))));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = HEDLEY_STATIC_CAST(simde_float32, a_.u8[i]);
+      }
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cvtpu8_ps(a) simde_mm_cvtpu8_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cvtsi32_ss (simde__m128 a, int32_t b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_cvtsi32_ss(a, b);
+  #else
+    simde__m128_private r_;
+    simde__m128_private a_ = simde__m128_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_f32 = vsetq_lane_f32(HEDLEY_STATIC_CAST(float32_t, b), a_.neon_f32, 0);
+    #else
+      r_ = a_;
+      r_.f32[0] = HEDLEY_STATIC_CAST(simde_float32, b);
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cvtsi32_ss(a, b) simde_mm_cvtsi32_ss((a), b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cvtsi64_ss (simde__m128 a, int64_t b) {
+  #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_ARCH_AMD64)
+    #if !defined(__PGI)
+      return _mm_cvtsi64_ss(a, b);
+    #else
+      return _mm_cvtsi64x_ss(a, b);
+    #endif
+  #else
+    simde__m128_private r_;
+    simde__m128_private a_ = simde__m128_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_f32 = vsetq_lane_f32(HEDLEY_STATIC_CAST(float32_t, b), a_.neon_f32, 0);
+    #else
+      r_ = a_;
+      r_.f32[0] = HEDLEY_STATIC_CAST(simde_float32, b);
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARCH_AMD64))
+#  define _mm_cvtsi64_ss(a, b) simde_mm_cvtsi64_ss((a), b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float32
+simde_mm_cvtss_f32 (simde__m128 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_cvtss_f32(a);
+  #else
+    simde__m128_private a_ = simde__m128_to_private(a);
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      return vgetq_lane_f32(a_.neon_f32, 0);
+    #else
+      return a_.f32[0];
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cvtss_f32(a) simde_mm_cvtss_f32((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int32_t
+simde_mm_cvtss_si32 (simde__m128 a) {
+  return simde_mm_cvt_ss2si(a);
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cvtss_si32(a) simde_mm_cvtss_si32((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int64_t
+simde_mm_cvtss_si64 (simde__m128 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_ARCH_AMD64)
+    #if !defined(__PGI)
+      return _mm_cvtss_si64(a);
+    #else
+      return _mm_cvtss_si64x(a);
+    #endif
+  #else
+    simde__m128_private a_ = simde__m128_to_private(a);
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      return SIMDE_CONVERT_FTOI(int64_t, simde_math_roundf(vgetq_lane_f32(a_.neon_f32, 0)));
+    #else
+      return SIMDE_CONVERT_FTOI(int64_t, simde_math_roundf(a_.f32[0]));
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARCH_AMD64))
+#  define _mm_cvtss_si64(a) simde_mm_cvtss_si64((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_cvtt_ps2pi (simde__m128 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_cvtt_ps2pi(a);
+  #else
+    simde__m64_private r_;
+    simde__m128_private a_ = simde__m128_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_FAST_CONVERSION_RANGE)
+      r_.neon_i32 = vcvt_s32_f32(vget_low_f32(a_.neon_f32));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        simde_float32 v = a_.f32[i];
+        #if !defined(SIMDE_FAST_CONVERSION_RANGE)
+          r_.i32[i] = ((v > HEDLEY_STATIC_CAST(simde_float32, INT32_MIN)) && (v < HEDLEY_STATIC_CAST(simde_float32, INT32_MAX))) ?
+            SIMDE_CONVERT_FTOI(int32_t, v) : INT32_MIN;
+        #else
+          r_.i32[i] = SIMDE_CONVERT_FTOI(int32_t, v);
+        #endif
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_mm_cvttps_pi32(a) simde_mm_cvtt_ps2pi(a)
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cvtt_ps2pi(a) simde_mm_cvtt_ps2pi((a))
+#  define _mm_cvttps_pi32(a) simde_mm_cvttps_pi32((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int32_t
+simde_mm_cvtt_ss2si (simde__m128 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_cvtt_ss2si(a);
+  #else
+    simde__m128_private a_ = simde__m128_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_FAST_CONVERSION_RANGE)
+      return SIMDE_CONVERT_FTOI(int32_t, vgetq_lane_f32(a_.neon_f32, 0));
+    #else
+      simde_float32 v = a_.f32[0];
+      #if !defined(SIMDE_FAST_CONVERSION_RANGE)
+        return ((v > HEDLEY_STATIC_CAST(simde_float32, INT32_MIN)) && (v < HEDLEY_STATIC_CAST(simde_float32, INT32_MAX))) ?
+          SIMDE_CONVERT_FTOI(int32_t, v) : INT32_MIN;
+      #else
+        return SIMDE_CONVERT_FTOI(int32_t, v);
+      #endif
+    #endif
+  #endif
+}
+#define simde_mm_cvttss_si32(a) simde_mm_cvtt_ss2si((a))
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cvtt_ss2si(a) simde_mm_cvtt_ss2si((a))
+#  define _mm_cvttss_si32(a) simde_mm_cvtt_ss2si((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int64_t
+simde_mm_cvttss_si64 (simde__m128 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_ARCH_AMD64) && !defined(_MSC_VER)
+    #if defined(__PGI)
+      return _mm_cvttss_si64x(a);
+    #else
+      return _mm_cvttss_si64(a);
+    #endif
+  #else
+    simde__m128_private a_ = simde__m128_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      return SIMDE_CONVERT_FTOI(int64_t, vgetq_lane_f32(a_.neon_f32, 0));
+    #else
+      return SIMDE_CONVERT_FTOI(int64_t, a_.f32[0]);
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARCH_AMD64))
+#  define _mm_cvttss_si64(a) simde_mm_cvttss_si64((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cmpord_ss (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_cmpord_ss(a, b);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+    return simde_mm_move_ss(a, simde_mm_cmpord_ps(a, b));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_ss(a, simde_mm_cmpord_ps(simde_x_mm_broadcastlow_ps(a), simde_x_mm_broadcastlow_ps(b)));
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    #if defined(simde_math_isnanf)
+      r_.u32[0] = (simde_math_isnanf(simde_mm_cvtss_f32(a)) || simde_math_isnanf(simde_mm_cvtss_f32(b))) ? UINT32_C(0) : ~UINT32_C(0);
+      SIMDE_VECTORIZE
+      for (size_t i = 1 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.u32[i] = a_.u32[i];
+      }
+    #else
+      HEDLEY_UNREACHABLE();
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_cmpord_ss(a, b) simde_mm_cmpord_ss((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_div_ps (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_div_ps(a, b);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f32 = vdivq_f32(a_.neon_f32, b_.neon_f32);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      float32x4_t recip0 = vrecpeq_f32(b_.neon_f32);
+      float32x4_t recip1 = vmulq_f32(recip0, vrecpsq_f32(recip0, b_.neon_f32));
+      r_.neon_f32 = vmulq_f32(a_.neon_f32, recip1);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 =  wasm_f32x4_div(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
+      r_.altivec_f32 = vec_div(a_.altivec_f32, b_.altivec_f32);
+    #elif defined(SIMDE_LOONGARCH_LASX_NATIVE)
+      r_.lsx_f32 = __lsx_vfdiv_s(a_.lsx_f32, b_.lsx_f32);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.f32 = a_.f32 / b_.f32;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = a_.f32[i] / b_.f32[i];
+      }
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_div_ps(a, b) simde_mm_div_ps((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_div_ss (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_div_ss(a, b);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+    return simde_mm_move_ss(a, simde_mm_div_ps(a, b));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_ss(a, simde_mm_div_ps(simde_x_mm_broadcastlow_ps(a), simde_x_mm_broadcastlow_ps(b)));
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      float32_t value =
+              vgetq_lane_f32(simde__m128_to_private(simde_mm_div_ps(a, b)).neon_f32, 0);
+      r_.neon_f32 = vsetq_lane_f32(value, a_.neon_f32, 0);
+    #else
+      r_.f32[0] = a_.f32[0] / b_.f32[0];
+      SIMDE_VECTORIZE
+      for (size_t i = 1 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = a_.f32[i];
+      }
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_div_ss(a, b) simde_mm_div_ss((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int16_t
+simde_mm_extract_pi16 (simde__m64 a, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 3) {
+  simde__m64_private a_ = simde__m64_to_private(a);
+  return a_.i16[imm8];
+}
+#if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) && !defined(HEDLEY_PGI_VERSION) && !defined(SIMDE_BUG_CLANG_44589)
+  #define simde_mm_extract_pi16(a, imm8) HEDLEY_STATIC_CAST(int16_t, _mm_extract_pi16(a, imm8))
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_mm_extract_pi16(a, imm8) vget_lane_s16(simde__m64_to_private(a).neon_i16, imm8)
+#endif
+#define simde_m_pextrw(a, imm8) simde_mm_extract_pi16(a, imm8)
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_extract_pi16(a, imm8) simde_mm_extract_pi16((a), (imm8))
+#  define _m_pextrw(a, imm8) simde_mm_extract_pi16((a), (imm8))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_insert_pi16 (simde__m64 a, int16_t i, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 3) {
+  simde__m64_private
+    a_ = simde__m64_to_private(a);
+
+  a_.i16[imm8] = i;
+
+  return simde__m64_from_private(a_);
+}
+#if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) && !defined(__PGI) && !defined(SIMDE_BUG_CLANG_44589)
+  #define simde_mm_insert_pi16(a, i, imm8) _mm_insert_pi16(a, i, imm8)
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_mm_insert_pi16(a, i, imm8) simde__m64_from_neon_i16(vset_lane_s16((i), simde__m64_to_neon_i16(a), (imm8)))
+#endif
+#define simde_m_pinsrw(a, i, imm8) (simde_mm_insert_pi16(a, i, imm8))
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_insert_pi16(a, i, imm8) simde_mm_insert_pi16(a, i, imm8)
+#  define _m_pinsrw(a, i, imm8) simde_mm_insert_pi16(a, i, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_load_ps (simde_float32 const mem_addr[HEDLEY_ARRAY_PARAM(4)]) {
+#if defined(SIMDE_X86_SSE_NATIVE)
+  return _mm_load_ps(mem_addr);
+#else
+  simde__m128_private r_;
+
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    r_.neon_f32 = vld1q_f32(mem_addr);
+  #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
+    r_.altivec_f32 = vec_vsx_ld(0, mem_addr);
+  #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+    r_.altivec_f32 = vec_ld(0, mem_addr);
+  #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+    r_.lsx_i64 = __lsx_vld(mem_addr, 0);
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    r_.wasm_v128 = wasm_v128_load(mem_addr);
+  #else
+    simde_memcpy(&r_, SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m128), sizeof(r_));
+  #endif
+
+  return simde__m128_from_private(r_);
+#endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_load_ps(mem_addr) simde_mm_load_ps(mem_addr)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_load1_ps (simde_float32 const* mem_addr) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_load_ps1(mem_addr);
+  #else
+    simde__m128_private r_;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_f32 = vld1q_dup_f32(mem_addr);
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      r_.lsx_i64 = __lsx_vldrepl_w(mem_addr, 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_v128_load32_splat(mem_addr);
+    #else
+      r_ = simde__m128_to_private(simde_mm_set1_ps(*mem_addr));
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#define simde_mm_load_ps1(mem_addr) simde_mm_load1_ps(mem_addr)
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_load_ps1(mem_addr) simde_mm_load1_ps(mem_addr)
+#  define _mm_load1_ps(mem_addr) simde_mm_load1_ps(mem_addr)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_load_ss (simde_float32 const* mem_addr) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_load_ss(mem_addr);
+  #else
+    simde__m128_private r_;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_f32 = vsetq_lane_f32(*mem_addr, vdupq_n_f32(0), 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_v128_load32_zero(mem_addr);
+    #else
+      r_.f32[0] = *mem_addr;
+      r_.i32[1] = 0;
+      r_.i32[2] = 0;
+      r_.i32[3] = 0;
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_load_ss(mem_addr) simde_mm_load_ss(mem_addr)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_loadh_pi (simde__m128 a, simde__m64 const* mem_addr) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_loadh_pi(a, HEDLEY_REINTERPRET_CAST(__m64 const*, mem_addr));
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    r_.neon_f32 = vcombine_f32(vget_low_f32(a_.neon_f32), vld1_f32(HEDLEY_REINTERPRET_CAST(const float32_t*, mem_addr)));
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    r_.wasm_v128 = wasm_v128_load64_lane(mem_addr, a_.wasm_v128, 1);
+  #else
+    simde__m64_private b_ = *HEDLEY_REINTERPRET_CAST(simde__m64_private const*, mem_addr);
+    r_.f32[0] = a_.f32[0];
+    r_.f32[1] = a_.f32[1];
+    r_.f32[2] = b_.f32[0];
+    r_.f32[3] = b_.f32[1];
+  #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+  #if HEDLEY_HAS_WARNING("-Wold-style-cast")
+    #define _mm_loadh_pi(a, mem_addr) simde_mm_loadh_pi((a), HEDLEY_REINTERPRET_CAST(simde__m64 const*, (mem_addr)))
+  #else
+    #define _mm_loadh_pi(a, mem_addr) simde_mm_loadh_pi((a), (simde__m64 const*) (mem_addr))
+  #endif
+#endif
+
+/* The SSE documentation says that there are no alignment requirements
+   for mem_addr.  Unfortunately they used the __m64 type for the argument
+   which is supposed to be 8-byte aligned, so some compilers (like clang
+   with -Wcast-align) will generate a warning if you try to cast, say,
+   a simde_float32* to a simde__m64* for this function.
+
+   I think the choice of argument type is unfortunate, but I do think we
+   need to stick to it here.  If there is demand I can always add something
+   like simde_x_mm_loadl_f32(simde__m128, simde_float32 mem_addr[2]) */
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_loadl_pi (simde__m128 a, simde__m64 const* mem_addr) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_loadl_pi(a, HEDLEY_REINTERPRET_CAST(__m64 const*, mem_addr));
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_f32 = vcombine_f32(vld1_f32(
+        HEDLEY_REINTERPRET_CAST(const float32_t*, mem_addr)), vget_high_f32(a_.neon_f32));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_v128_load64_lane(mem_addr, a_.wasm_v128, 0);
+    #else
+      simde__m64_private b_;
+      simde_memcpy(&b_, mem_addr, sizeof(b_));
+      r_.i32[0] = b_.i32[0];
+      r_.i32[1] = b_.i32[1];
+      r_.i32[2] = a_.i32[2];
+      r_.i32[3] = a_.i32[3];
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+  #if HEDLEY_HAS_WARNING("-Wold-style-cast")
+    #define _mm_loadl_pi(a, mem_addr) simde_mm_loadl_pi((a), HEDLEY_REINTERPRET_CAST(simde__m64 const*, (mem_addr)))
+  #else
+    #define _mm_loadl_pi(a, mem_addr) simde_mm_loadl_pi((a), (simde__m64 const*) (mem_addr))
+  #endif
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_loadr_ps (simde_float32 const mem_addr[HEDLEY_ARRAY_PARAM(4)]) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_loadr_ps(mem_addr);
+  #else
+    simde__m128_private
+      r_,
+      v_ = simde__m128_to_private(simde_mm_load_ps(mem_addr));
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_f32 = vrev64q_f32(v_.neon_f32);
+      r_.neon_f32 = vextq_f32(r_.neon_f32, r_.neon_f32, 2);
+    #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) && defined(__PPC64__)
+      r_.altivec_f32 = vec_reve(v_.altivec_f32);
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      r_.lsx_i64 = __lsx_vshuf4i_w(v_.lsx_i64, 0x1b);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 16, v_.f32, v_.f32, 3, 2, 1, 0);
+    #else
+      r_.f32[0] = v_.f32[3];
+      r_.f32[1] = v_.f32[2];
+      r_.f32[2] = v_.f32[1];
+      r_.f32[3] = v_.f32[0];
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_loadr_ps(mem_addr) simde_mm_loadr_ps(mem_addr)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_loadu_ps (simde_float32 const mem_addr[HEDLEY_ARRAY_PARAM(4)]) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_loadu_ps(mem_addr);
+  #else
+    simde__m128_private r_;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_f32 = vld1q_f32(HEDLEY_REINTERPRET_CAST(const float32_t*, mem_addr));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_v128_load(mem_addr);
+    #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) && defined(__PPC64__)
+      r_.altivec_f32 = vec_vsx_ld(0, mem_addr);
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      r_.lsx_i64 = __lsx_vld(mem_addr, 0);
+    #else
+      simde_memcpy(&r_, mem_addr, sizeof(r_));
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_loadu_ps(mem_addr) simde_mm_loadu_ps(mem_addr)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_maskmove_si64 (simde__m64 a, simde__m64 mask, int8_t* mem_addr) {
+  #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    _mm_maskmove_si64(a, mask, HEDLEY_REINTERPRET_CAST(char*, mem_addr));
+  #else
+    simde__m64_private
+      a_ = simde__m64_to_private(a),
+      mask_ = simde__m64_to_private(mask);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(a_.i8) / sizeof(a_.i8[0])) ; i++)
+      if (mask_.i8[i] < 0)
+        mem_addr[i] = a_.i8[i];
+  #endif
+}
+#define simde_m_maskmovq(a, mask, mem_addr) simde_mm_maskmove_si64(a, mask, mem_addr)
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_maskmove_si64(a, mask, mem_addr) simde_mm_maskmove_si64((a), (mask), SIMDE_CHECKED_REINTERPRET_CAST(int8_t*, char*, (mem_addr)))
+#  define _m_maskmovq(a, mask, mem_addr) simde_mm_maskmove_si64((a), (mask), SIMDE_CHECKED_REINTERPRET_CAST(int8_t*, char*, (mem_addr)))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_max_pi16 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_max_pi16(a, b);
+  #else
+    simde__m64_private
+      r_,
+      a_ = simde__m64_to_private(a),
+      b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i16 = vmax_s16(a_.neon_i16, b_.neon_i16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = (a_.i16[i] > b_.i16[i]) ? a_.i16[i] : b_.i16[i];
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_pmaxsw(a, b) simde_mm_max_pi16(a, b)
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_max_pi16(a, b) simde_mm_max_pi16(a, b)
+#  define _m_pmaxsw(a, b) simde_mm_max_pi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_max_ps (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_max_ps(a, b);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_FAST_NANS)
+      r_.neon_f32 = vmaxq_f32(a_.neon_f32, b_.neon_f32);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_f32 = vbslq_f32(vcgtq_f32(a_.neon_f32, b_.neon_f32), a_.neon_f32, b_.neon_f32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE) && defined(SIMDE_FAST_NANS)
+      r_.wasm_v128 = wasm_f32x4_max(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_v128_bitselect(a_.wasm_v128, b_.wasm_v128, wasm_f32x4_gt(a_.wasm_v128, b_.wasm_v128));
+    #elif (defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_14_NATIVE)) && defined(SIMDE_FAST_NANS)
+      r_.altivec_f32 = vec_max(a_.altivec_f32, b_.altivec_f32);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_14_NATIVE)
+      r_.altivec_f32 = vec_sel(b_.altivec_f32, a_.altivec_f32, vec_cmpgt(a_.altivec_f32, b_.altivec_f32));
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE) && defined(SIMDE_FAST_NANS)
+      r_.lsx_f32 = __lsx_vfmax_s(a_.lsx_f32, b_.lsx_f32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = (a_.f32[i] > b_.f32[i]) ? a_.f32[i] : b_.f32[i];
+      }
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_max_ps(a, b) simde_mm_max_ps((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_max_pu8 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_max_pu8(a, b);
+  #else
+    simde__m64_private
+      r_,
+      a_ = simde__m64_to_private(a),
+      b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u8 = vmax_u8(a_.neon_u8, b_.neon_u8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+        r_.u8[i] = (a_.u8[i] > b_.u8[i]) ? a_.u8[i] : b_.u8[i];
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_pmaxub(a, b) simde_mm_max_pu8(a, b)
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_max_pu8(a, b) simde_mm_max_pu8(a, b)
+#  define _m_pmaxub(a, b) simde_mm_max_pu8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_max_ss (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_max_ss(a, b);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+    return simde_mm_move_ss(a, simde_mm_max_ps(a, b));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_ss(a, simde_mm_max_ps(simde_x_mm_broadcastlow_ps(a), simde_x_mm_broadcastlow_ps(b)));
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      float32_t value = vgetq_lane_f32(maxq_f32(a_.neon_f32, b_.neon_f32), 0);
+      r_.neon_f32 = vsetq_lane_f32(value, a_.neon_f32, 0);
+    #else
+      r_.f32[0] = (a_.f32[0] > b_.f32[0]) ? a_.f32[0] : b_.f32[0];
+      r_.f32[1] = a_.f32[1];
+      r_.f32[2] = a_.f32[2];
+      r_.f32[3] = a_.f32[3];
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_max_ss(a, b) simde_mm_max_ss((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_min_pi16 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_min_pi16(a, b);
+  #else
+    simde__m64_private
+      r_,
+      a_ = simde__m64_to_private(a),
+      b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i16 = vmin_s16(a_.neon_i16, b_.neon_i16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = (a_.i16[i] < b_.i16[i]) ? a_.i16[i] : b_.i16[i];
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_pminsw(a, b) simde_mm_min_pi16(a, b)
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_min_pi16(a, b) simde_mm_min_pi16(a, b)
+#  define _m_pminsw(a, b) simde_mm_min_pi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_min_ps (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_min_ps(a, b);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_FAST_NANS) && defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_f32 = vminq_f32(a_.neon_f32, b_.neon_f32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f32x4_pmin(b_.wasm_v128, a_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_14_NATIVE)
+      #if defined(SIMDE_FAST_NANS)
+        r_.altivec_f32 = vec_min(a_.altivec_f32, b_.altivec_f32);
+      #else
+        r_.altivec_f32 = vec_sel(b_.altivec_f32, a_.altivec_f32, vec_cmpgt(b_.altivec_f32, a_.altivec_f32));
+      #endif
+    #elif defined(SIMDE_FAST_NANS) && defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      r_.lsx_f32 = __lsx_vfmin_s(a_.lsx_f32, b_.lsx_f32);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      uint32_t SIMDE_VECTOR(16) m = HEDLEY_REINTERPRET_CAST(__typeof__(m), a_.f32 < b_.f32);
+      r_.f32 =
+        HEDLEY_REINTERPRET_CAST(
+          __typeof__(r_.f32),
+          ( (HEDLEY_REINTERPRET_CAST(__typeof__(m), a_.f32) &  m) |
+            (HEDLEY_REINTERPRET_CAST(__typeof__(m), b_.f32) & ~m)
+          )
+        );
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = (a_.f32[i] < b_.f32[i]) ? a_.f32[i] : b_.f32[i];
+      }
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_min_ps(a, b) simde_mm_min_ps((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_min_pu8 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_min_pu8(a, b);
+  #else
+    simde__m64_private
+      r_,
+      a_ = simde__m64_to_private(a),
+      b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u8 = vmin_u8(a_.neon_u8, b_.neon_u8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+        r_.u8[i] = (a_.u8[i] < b_.u8[i]) ? a_.u8[i] : b_.u8[i];
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_pminub(a, b) simde_mm_min_pu8(a, b)
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_min_pu8(a, b) simde_mm_min_pu8(a, b)
+#  define _m_pminub(a, b) simde_mm_min_pu8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_min_ss (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_min_ss(a, b);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+    return simde_mm_move_ss(a, simde_mm_min_ps(a, b));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_ss(a, simde_mm_min_ps(simde_x_mm_broadcastlow_ps(a), simde_x_mm_broadcastlow_ps(b)));
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      float32_t value = vgetq_lane_f32(vminq_f32(a_.neon_f32, b_.neon_f32), 0);
+      r_.neon_f32 = vsetq_lane_f32(value, a_.neon_f32, 0);
+    #else
+      r_.f32[0] = (a_.f32[0] < b_.f32[0]) ? a_.f32[0] : b_.f32[0];
+      r_.f32[1] = a_.f32[1];
+      r_.f32[2] = a_.f32[2];
+      r_.f32[3] = a_.f32[3];
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_min_ss(a, b) simde_mm_min_ss((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_movehl_ps (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_movehl_ps(a, b);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_u64 = vzip2q_u64(b_.neon_u64, a_.neon_u64);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      float32x2_t a32 = vget_high_f32(a_.neon_f32);
+      float32x2_t b32 = vget_high_f32(b_.neon_f32);
+      r_.neon_f32 = vcombine_f32(b32, a32);
+    #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_f32 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(float),
+          vec_mergel(b_.altivec_i64, a_.altivec_i64));
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      r_.lsx_i64 = __lsx_vilvh_d(a_.lsx_i64, b_.lsx_i64);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.f32, b_.f32, 6, 7, 2, 3);
+    #else
+      r_.f32[0] = b_.f32[2];
+      r_.f32[1] = b_.f32[3];
+      r_.f32[2] = a_.f32[2];
+      r_.f32[3] = a_.f32[3];
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_movehl_ps(a, b) simde_mm_movehl_ps((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_movelh_ps (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_movelh_ps(a, b);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      float32x2_t a10 = vget_low_f32(a_.neon_f32);
+      float32x2_t b10 = vget_low_f32(b_.neon_f32);
+      r_.neon_f32 = vcombine_f32(a10, b10);
+    #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_f32 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(float),
+          vec_mergeh(a_.altivec_i64, b_.altivec_i64));
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      r_.lsx_i64 = __lsx_vilvl_d(b_.lsx_i64, a_.lsx_i64);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.f32, b_.f32, 0, 1, 4, 5);
+    #else
+      r_.f32[0] = a_.f32[0];
+      r_.f32[1] = a_.f32[1];
+      r_.f32[2] = b_.f32[0];
+      r_.f32[3] = b_.f32[1];
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_movelh_ps(a, b) simde_mm_movelh_ps((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_movemask_pi8 (simde__m64 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_movemask_pi8(a);
+  #else
+    simde__m64_private a_ = simde__m64_to_private(a);
+    int r = 0;
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      uint8x8_t input = a_.neon_u8;
+      const int8_t xr[8] = {-7, -6, -5, -4, -3, -2, -1, 0};
+      const uint8x8_t mask_and = vdup_n_u8(0x80);
+      const int8x8_t mask_shift = vld1_s8(xr);
+      const uint8x8_t mask_result = vshl_u8(vand_u8(input, mask_and), mask_shift);
+      uint8x8_t lo = mask_result;
+      r = vaddv_u8(lo);
+    #else
+      const size_t nmemb = sizeof(a_.i8) / sizeof(a_.i8[0]);
+      SIMDE_VECTORIZE_REDUCTION(|:r)
+      for (size_t i = 0 ; i < nmemb ; i++) {
+        r |= (a_.u8[nmemb - 1 - i] >> 7) << (nmemb - 1 - i);
+      }
+    #endif
+
+    return r;
+  #endif
+}
+#define simde_m_pmovmskb(a) simde_mm_movemask_pi8(a)
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_movemask_pi8(a) simde_mm_movemask_pi8(a)
+#  define _m_pmovmskb(a) simde_mm_movemask_pi8(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_movemask_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_movemask_ps(a);
+  #else
+    int r = 0;
+    simde__m128_private a_ = simde__m128_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      static const int32_t shift[4] = {0, 1, 2, 3};
+      uint32x4_t tmp = vshrq_n_u32(a_.neon_u32, 31);
+      return HEDLEY_STATIC_CAST(int32_t, vaddvq_u32(vshlq_u32(tmp, vld1q_s32(shift))));
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      // Shift out everything but the sign bits with a 32-bit unsigned shift right.
+      uint64x2_t high_bits = vreinterpretq_u64_u32(vshrq_n_u32(a_.neon_u32, 31));
+      // Merge the two pairs together with a 64-bit unsigned shift right + add.
+      uint8x16_t paired = vreinterpretq_u8_u64(vsraq_n_u64(high_bits, high_bits, 31));
+      // Extract the result.
+      return vgetq_lane_u8(paired, 0) | (vgetq_lane_u8(paired, 8) << 2);
+    #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE) && defined(SIMDE_BUG_CLANG_50932)
+      SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) idx = { 96, 64, 32, 0, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 };
+      SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) res = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned char), vec_bperm(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned __int128), a_.altivec_u64), idx));
+      return HEDLEY_STATIC_CAST(int32_t, vec_extract(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed int), res), 2));
+    #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE)
+      SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) idx = { 96, 64, 32, 0, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 };
+      SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) res = vec_bperm(a_.altivec_u8, idx);
+      return HEDLEY_STATIC_CAST(int32_t, vec_extract(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed int), res), 2));
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      v2i64 t64 = __lsx_vmskltz_w(a_.lsx_i64);
+      r = __lsx_vpickve2gr_wu(t64, 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      return HEDLEY_STATIC_CAST(int32_t, wasm_i32x4_bitmask(a_.wasm_v128));
+    #else
+      SIMDE_VECTORIZE_REDUCTION(|:r)
+      for (size_t i = 0 ; i < sizeof(a_.u32) / sizeof(a_.u32[0]) ; i++) {
+        r |= (a_.u32[i] >> ((sizeof(a_.u32[i]) * CHAR_BIT) - 1)) << i;
+      }
+    #endif
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_movemask_ps(a) simde_mm_movemask_ps((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_mul_ps (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_mul_ps(a, b);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_f32 = vmulq_f32(a_.neon_f32, b_.neon_f32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f32x4_mul(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.f32 = a_.f32 * b_.f32;
+    #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
+      r_.altivec_f32 = vec_mul(a_.altivec_f32, b_.altivec_f32);
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      r_.lsx_f32 = __lsx_vfmul_s(a_.lsx_f32, b_.lsx_f32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = a_.f32[i] * b_.f32[i];
+      }
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_mul_ps(a, b) simde_mm_mul_ps((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_mul_ss (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_mul_ss(a, b);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+    return simde_mm_move_ss(a, simde_mm_mul_ps(a, b));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_ss(a, simde_mm_mul_ps(simde_x_mm_broadcastlow_ps(a), simde_x_mm_broadcastlow_ps(b)));
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    r_.f32[0] = a_.f32[0] * b_.f32[0];
+    r_.f32[1] = a_.f32[1];
+    r_.f32[2] = a_.f32[2];
+    r_.f32[3] = a_.f32[3];
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_mul_ss(a, b) simde_mm_mul_ss((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_mulhi_pu16 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_mulhi_pu16(a, b);
+  #else
+    simde__m64_private
+      r_,
+      a_ = simde__m64_to_private(a),
+      b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      const uint32x4_t t1 = vmull_u16(a_.neon_u16, b_.neon_u16);
+      const uint32x4_t t2 = vshrq_n_u32(t1, 16);
+      const uint16x4_t t3 = vmovn_u32(t2);
+      r_.neon_u16 = t3;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+        r_.u16[i] = HEDLEY_STATIC_CAST(uint16_t, ((HEDLEY_STATIC_CAST(uint32_t, a_.u16[i]) * HEDLEY_STATIC_CAST(uint32_t, b_.u16[i])) >> UINT32_C(16)));
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_pmulhuw(a, b) simde_mm_mulhi_pu16(a, b)
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_mulhi_pu16(a, b) simde_mm_mulhi_pu16(a, b)
+#  define _m_pmulhuw(a, b) simde_mm_mulhi_pu16(a, b)
+#endif
+
+#if defined(SIMDE_X86_SSE_NATIVE) && defined(HEDLEY_GCC_VERSION)
+  #define SIMDE_MM_HINT_NTA  HEDLEY_STATIC_CAST(enum _mm_hint, 0)
+  #define SIMDE_MM_HINT_T0   HEDLEY_STATIC_CAST(enum _mm_hint, 1)
+  #define SIMDE_MM_HINT_T1   HEDLEY_STATIC_CAST(enum _mm_hint, 2)
+  #define SIMDE_MM_HINT_T2   HEDLEY_STATIC_CAST(enum _mm_hint, 3)
+  #define SIMDE_MM_HINT_ENTA HEDLEY_STATIC_CAST(enum _mm_hint, 4)
+  #define SIMDE_MM_HINT_ET0  HEDLEY_STATIC_CAST(enum _mm_hint, 5)
+  #define SIMDE_MM_HINT_ET1  HEDLEY_STATIC_CAST(enum _mm_hint, 6)
+  #define SIMDE_MM_HINT_ET2  HEDLEY_STATIC_CAST(enum _mm_hint, 7)
+#else
+  #define SIMDE_MM_HINT_NTA  0
+  #define SIMDE_MM_HINT_T0   1
+  #define SIMDE_MM_HINT_T1   2
+  #define SIMDE_MM_HINT_T2   3
+  #define SIMDE_MM_HINT_ENTA 4
+  #define SIMDE_MM_HINT_ET0  5
+  #define SIMDE_MM_HINT_ET1  6
+  #define SIMDE_MM_HINT_ET2  7
+#endif
+
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+  HEDLEY_DIAGNOSTIC_PUSH
+  #if HEDLEY_HAS_WARNING("-Wreserved-id-macro")
+    _Pragma("clang diagnostic ignored \"-Wreserved-id-macro\"")
+  #endif
+  #undef  _MM_HINT_NTA
+  #define _MM_HINT_NTA  SIMDE_MM_HINT_NTA
+  #undef  _MM_HINT_T0
+  #define _MM_HINT_T0   SIMDE_MM_HINT_T0
+  #undef  _MM_HINT_T1
+  #define _MM_HINT_T1   SIMDE_MM_HINT_T1
+  #undef  _MM_HINT_T2
+  #define _MM_HINT_T2   SIMDE_MM_HINT_T2
+  #undef  _MM_HINT_ENTA
+  #define _MM_HINT_ETNA SIMDE_MM_HINT_ENTA
+  #undef  _MM_HINT_ET0
+  #define _MM_HINT_ET0  SIMDE_MM_HINT_ET0
+  #undef  _MM_HINT_ET1
+  #define _MM_HINT_ET1  SIMDE_MM_HINT_ET1
+  #undef  _MM_HINT_ET1
+  #define _MM_HINT_ET2  SIMDE_MM_HINT_ET2
+  HEDLEY_DIAGNOSTIC_POP
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_prefetch (const void* p, int i) {
+  #if \
+      HEDLEY_HAS_BUILTIN(__builtin_prefetch) || \
+      HEDLEY_GCC_VERSION_CHECK(3,4,0) || \
+      HEDLEY_INTEL_VERSION_CHECK(13,0,0)
+    switch(i) {
+      case SIMDE_MM_HINT_NTA:
+        __builtin_prefetch(p, 0, 0);
+        break;
+      case SIMDE_MM_HINT_T0:
+        __builtin_prefetch(p, 0, 3);
+        break;
+      case SIMDE_MM_HINT_T1:
+        __builtin_prefetch(p, 0, 2);
+        break;
+      case SIMDE_MM_HINT_T2:
+        __builtin_prefetch(p, 0, 1);
+        break;
+      case SIMDE_MM_HINT_ENTA:
+        __builtin_prefetch(p, 1, 0);
+        break;
+      case SIMDE_MM_HINT_ET0:
+        __builtin_prefetch(p, 1, 3);
+        break;
+      case SIMDE_MM_HINT_ET1:
+        __builtin_prefetch(p, 1, 2);
+        break;
+      case SIMDE_MM_HINT_ET2:
+        __builtin_prefetch(p, 0, 1);
+        break;
+    }
+  #elif defined(__ARM_ACLE)
+    #if (__ARM_ACLE >= 101)
+      switch(i) {
+        case SIMDE_MM_HINT_NTA:
+          __pldx(0, 0, 1, p);
+          break;
+        case SIMDE_MM_HINT_T0:
+          __pldx(0, 0, 0, p);
+          break;
+        case SIMDE_MM_HINT_T1:
+          __pldx(0, 1, 0, p);
+          break;
+        case SIMDE_MM_HINT_T2:
+          __pldx(0, 2, 0, p);
+          break;
+        case SIMDE_MM_HINT_ENTA:
+          __pldx(1, 0, 1, p);
+          break;
+        case SIMDE_MM_HINT_ET0:
+          __pldx(1, 0, 0, p);
+          break;
+        case SIMDE_MM_HINT_ET1:
+          __pldx(1, 1, 0, p);
+          break;
+        case SIMDE_MM_HINT_ET2:
+          __pldx(1, 2, 0, p);
+          break;
+      }
+    #else
+      (void) i;
+      __pld(p)
+    #endif
+  #elif HEDLEY_PGI_VERSION_CHECK(10,0,0)
+    (void) i;
+    #pragma mem prefetch p
+  #elif HEDLEY_CRAY_VERSION_CHECK(8,1,0)
+    switch (i) {
+      case SIMDE_MM_HINT_NTA:
+        #pragma _CRI prefetch (nt) p
+        break;
+      case SIMDE_MM_HINT_T0:
+      case SIMDE_MM_HINT_T1:
+      case SIMDE_MM_HINT_T2:
+        #pragma _CRI prefetch p
+        break;
+      case SIMDE_MM_HINT_ENTA:
+        #pragma _CRI prefetch (write, nt) p
+        break;
+      case SIMDE_MM_HINT_ET0:
+      case SIMDE_MM_HINT_ET1:
+      case SIMDE_MM_HINT_ET2:
+        #pragma _CRI prefetch (write) p
+        break;
+    }
+  #elif HEDLEY_IBM_VERSION_CHECK(11,0,0)
+    switch(i) {
+      case SIMDE_MM_HINT_NTA:
+        __prefetch_by_load(p, 0, 0);
+        break;
+      case SIMDE_MM_HINT_T0:
+        __prefetch_by_load(p, 0, 3);
+        break;
+      case SIMDE_MM_HINT_T1:
+        __prefetch_by_load(p, 0, 2);
+        break;
+      case SIMDE_MM_HINT_T2:
+        __prefetch_by_load(p, 0, 1);
+        break;
+      case SIMDE_MM_HINT_ENTA:
+        __prefetch_by_load(p, 1, 0);
+        break;
+      case SIMDE_MM_HINT_ET0:
+        __prefetch_by_load(p, 1, 3);
+        break;
+      case SIMDE_MM_HINT_ET1:
+        __prefetch_by_load(p, 1, 2);
+        break;
+      case SIMDE_MM_HINT_ET2:
+        __prefetch_by_load(p, 0, 1);
+        break;
+    }
+  #elif HEDLEY_MSVC_VERSION
+    (void) i;
+    (void) p;
+  #endif
+}
+#if defined(SIMDE_X86_SSE_NATIVE)
+  #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(10,0,0) /* https://reviews.llvm.org/D71718 */
+    #define simde_mm_prefetch(p, i) \
+      (__extension__({ \
+        HEDLEY_DIAGNOSTIC_PUSH \
+        HEDLEY_DIAGNOSTIC_DISABLE_CAST_QUAL \
+        _mm_prefetch((p), (i)); \
+        HEDLEY_DIAGNOSTIC_POP \
+      }))
+  #else
+    #define simde_mm_prefetch(p, i) _mm_prefetch(p, i)
+  #endif
+#endif
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+  #define _mm_prefetch(p, i) simde_mm_prefetch(p, i)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_x_mm_negate_ps(simde__m128 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return simde_mm_xor_ps(a, _mm_set1_ps(SIMDE_FLOAT32_C(-0.0)));
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_f32 = vnegq_f32(a_.neon_f32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f32x4_neg(a_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE)
+      r_.altivec_f32 = vec_neg(a_.altivec_f32);
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      const v4f32 f32 = {0.0f, 0.0f, 0.0f, 0.0f};
+      r_.lsx_f32 = __lsx_vfsub_s(f32, a_.lsx_f32);
+    #elif defined(SIMDE_VECTOR_NEGATE)
+      r_.f32 = -a_.f32;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = -a_.f32[i];
+      }
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_rcp_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_rcp_ps(a);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      float32x4_t recip = vrecpeq_f32(a_.neon_f32);
+
+      #if SIMDE_ACCURACY_PREFERENCE > 0
+        for (int i = 0; i < SIMDE_ACCURACY_PREFERENCE ; ++i) {
+          recip = vmulq_f32(recip, vrecpsq_f32(recip, a_.neon_f32));
+        }
+      #endif
+
+      r_.neon_f32 = recip;
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f32x4_div(simde_mm_set1_ps(1.0f), a_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_f32 = vec_re(a_.altivec_f32);
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      r_.lsx_f32 = __lsx_vfrecip_s(a_.lsx_f32);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+      r_.f32 = 1.0f / a_.f32;
+    #elif defined(SIMDE_IEEE754_STORAGE)
+      /* https://stackoverflow.com/questions/12227126/division-as-multiply-and-lut-fast-float-division-reciprocal/12228234#12228234 */
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        int32_t ix;
+        simde_float32 fx = a_.f32[i];
+        simde_memcpy(&ix, &fx, sizeof(ix));
+        int32_t x = INT32_C(0x7EF311C3) - ix;
+        simde_float32 temp;
+        simde_memcpy(&temp, &x, sizeof(temp));
+        r_.f32[i] = temp * (SIMDE_FLOAT32_C(2.0) - temp * fx);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = 1.0f / a_.f32[i];
+      }
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_rcp_ps(a) simde_mm_rcp_ps((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_rcp_ss (simde__m128 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_rcp_ss(a);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+    return simde_mm_move_ss(a, simde_mm_rcp_ps(a));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_ss(a, simde_mm_rcp_ps(simde_x_mm_broadcastlow_ps(a)));
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    r_.f32[0] = 1.0f / a_.f32[0];
+    r_.f32[1] = a_.f32[1];
+    r_.f32[2] = a_.f32[2];
+    r_.f32[3] = a_.f32[3];
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_rcp_ss(a) simde_mm_rcp_ss((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_rsqrt_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_rsqrt_ps(a);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_f32 = vrsqrteq_f32(a_.neon_f32);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_f32 = vec_rsqrte(a_.altivec_f32);
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      r_.lsx_f32 = __lsx_vfrsqrt_s(a_.lsx_f32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f32x4_div(simde_mm_set1_ps(1.0f), wasm_f32x4_sqrt(a_.wasm_v128));
+    #elif defined(SIMDE_IEEE754_STORAGE)
+      /* https://basesandframes.files.wordpress.com/2020/04/even_faster_math_functions_green_2020.pdf
+        Pages 100 - 103 */
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        #if SIMDE_ACCURACY_PREFERENCE <= 0
+          r_.i32[i] = INT32_C(0x5F37624F) - (a_.i32[i] >> 1);
+        #else
+          simde_float32 x = a_.f32[i];
+          simde_float32 xhalf = SIMDE_FLOAT32_C(0.5) * x;
+          int32_t ix;
+
+          simde_memcpy(&ix, &x, sizeof(ix));
+
+          #if SIMDE_ACCURACY_PREFERENCE == 1
+            ix = INT32_C(0x5F375A82) - (ix >> 1);
+          #else
+            ix = INT32_C(0x5F37599E) - (ix >> 1);
+          #endif
+
+          simde_memcpy(&x, &ix, sizeof(x));
+
+          #if SIMDE_ACCURACY_PREFERENCE >= 2
+            x = x * (SIMDE_FLOAT32_C(1.5008909) - xhalf * x * x);
+          #endif
+          x = x * (SIMDE_FLOAT32_C(1.5008909) - xhalf * x * x);
+
+          r_.f32[i] = x;
+        #endif
+      }
+    #elif defined(simde_math_sqrtf)
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = 1.0f / simde_math_sqrtf(a_.f32[i]);
+      }
+    #else
+      HEDLEY_UNREACHABLE();
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_rsqrt_ps(a) simde_mm_rsqrt_ps((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_rsqrt_ss (simde__m128 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_rsqrt_ss(a);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+    return simde_mm_move_ss(a, simde_mm_rsqrt_ps(a));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_ss(a, simde_mm_rsqrt_ps(simde_x_mm_broadcastlow_ps(a)));
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_f32 = vsetq_lane_f32(vgetq_lane_f32(simde_mm_rsqrt_ps(a).neon_f32, 0), a_.neon_f32, 0);
+  #elif defined(SIMDE_IEEE754_STORAGE)
+    {
+      #if SIMDE_ACCURACY_PREFERENCE <= 0
+        r_.i32[0] = INT32_C(0x5F37624F) - (a_.i32[0] >> 1);
+      #else
+        simde_float32 x = a_.f32[0];
+        simde_float32 xhalf = SIMDE_FLOAT32_C(0.5) * x;
+        int32_t ix;
+
+        simde_memcpy(&ix, &x, sizeof(ix));
+
+        #if SIMDE_ACCURACY_PREFERENCE == 1
+          ix = INT32_C(0x5F375A82) - (ix >> 1);
+        #else
+          ix = INT32_C(0x5F37599E) - (ix >> 1);
+        #endif
+
+        simde_memcpy(&x, &ix, sizeof(x));
+
+        #if SIMDE_ACCURACY_PREFERENCE >= 2
+          x = x * (SIMDE_FLOAT32_C(1.5008909) - xhalf * x * x);
+        #endif
+        x = x * (SIMDE_FLOAT32_C(1.5008909) - xhalf * x * x);
+
+        r_.f32[0] = x;
+      #endif
+    }
+    r_.f32[1] = a_.f32[1];
+    r_.f32[2] = a_.f32[2];
+    r_.f32[3] = a_.f32[3];
+  #elif defined(simde_math_sqrtf)
+    r_.f32[0] = 1.0f / simde_math_sqrtf(a_.f32[0]);
+    r_.f32[1] = a_.f32[1];
+    r_.f32[2] = a_.f32[2];
+    r_.f32[3] = a_.f32[3];
+  #else
+    HEDLEY_UNREACHABLE();
+  #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_rsqrt_ss(a) simde_mm_rsqrt_ss((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_sad_pu8 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_sad_pu8(a, b);
+  #else
+    simde__m64_private
+      r_,
+      a_ = simde__m64_to_private(a),
+      b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      uint64x1_t t = vpaddl_u32(vpaddl_u16(vpaddl_u8(vabd_u8(a_.neon_u8, b_.neon_u8))));
+      r_.neon_u16 = vset_lane_u16(HEDLEY_STATIC_CAST(uint64_t, vget_lane_u64(t, 0)), vdup_n_u16(0), 0);
+    #else
+      uint16_t sum = 0;
+
+      SIMDE_VECTORIZE_REDUCTION(+:sum)
+      for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+        sum += HEDLEY_STATIC_CAST(uint8_t, simde_math_abs(a_.u8[i] - b_.u8[i]));
+      }
+
+      r_.i16[0] = HEDLEY_STATIC_CAST(int16_t, sum);
+      r_.i16[1] = 0;
+      r_.i16[2] = 0;
+      r_.i16[3] = 0;
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#define simde_m_psadbw(a, b) simde_mm_sad_pu8(a, b)
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_sad_pu8(a, b) simde_mm_sad_pu8(a, b)
+#  define _m_psadbw(a, b) simde_mm_sad_pu8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_set_ss (simde_float32 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_set_ss(a);
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vsetq_lane_f32(a, vdupq_n_f32(SIMDE_FLOAT32_C(0.0)), 0);
+  #else
+    return simde_mm_set_ps(SIMDE_FLOAT32_C(0.0), SIMDE_FLOAT32_C(0.0), SIMDE_FLOAT32_C(0.0), a);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_set_ss(a) simde_mm_set_ss(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_setr_ps (simde_float32 e3, simde_float32 e2, simde_float32 e1, simde_float32 e0) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_setr_ps(e3, e2, e1, e0);
+  #else
+    return simde_mm_set_ps(e0, e1, e2, e3);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_setr_ps(e3, e2, e1, e0) simde_mm_setr_ps(e3, e2, e1, e0)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_setzero_ps (void) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_setzero_ps();
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vdupq_n_f32(SIMDE_FLOAT32_C(0.0));
+  #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+    return vec_splats(SIMDE_FLOAT32_C(0.0));
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    return wasm_f32x4_const(0.f, 0.f, 0.f, 0.f);
+  #else
+    simde__m128 r;
+    simde_memset(&r, 0, sizeof(r));
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_setzero_ps() simde_mm_setzero_ps()
+#endif
+
+#if defined(SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_)
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_undefined_ps (void) {
+  simde__m128_private r_;
+
+  #if defined(SIMDE_HAVE_UNDEFINED128)
+    r_.n = _mm_undefined_ps();
+  #elif !defined(SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_)
+    r_ = simde__m128_to_private(simde_mm_setzero_ps());
+  #endif
+
+  return simde__m128_from_private(r_);
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_undefined_ps() simde_mm_undefined_ps()
+#endif
+
+#if defined(SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_)
+HEDLEY_DIAGNOSTIC_POP
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_x_mm_setone_ps (void) {
+  simde__m128 t = simde_mm_setzero_ps();
+  return simde_mm_cmpeq_ps(t, t);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_sfence (void) {
+    /* TODO: Use Hedley. */
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    _mm_sfence();
+  #elif defined(__GNUC__) && ((__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 7))
+    __atomic_thread_fence(__ATOMIC_SEQ_CST);
+  #elif !defined(__INTEL_COMPILER) && defined(__STDC_VERSION__) && (__STDC_VERSION__ >= 201112L) && !defined(__STDC_NO_ATOMICS__)
+    #if defined(__GNUC__) && (__GNUC__ == 4) && (__GNUC_MINOR__ < 9)
+      __atomic_thread_fence(__ATOMIC_SEQ_CST);
+    #else
+      atomic_thread_fence(memory_order_seq_cst);
+    #endif
+  #elif defined(_MSC_VER)
+    MemoryBarrier();
+  #elif HEDLEY_HAS_EXTENSION(c_atomic)
+    __c11_atomic_thread_fence(__ATOMIC_SEQ_CST);
+  #elif defined(__GNUC__) && ((__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 1))
+    __sync_synchronize();
+  #elif defined(_OPENMP)
+    #pragma omp critical(simde_mm_sfence_)
+    { }
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_sfence() simde_mm_sfence()
+#endif
+
+#define SIMDE_MM_SHUFFLE(z, y, x, w) (((z) << 6) | ((y) << 4) | ((x) << 2) | (w))
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _MM_SHUFFLE(z, y, x, w) SIMDE_MM_SHUFFLE(z, y, x, w)
+#endif
+
+#if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) && !defined(__PGI)
+#  define simde_mm_shuffle_pi16(a, imm8) _mm_shuffle_pi16(a, imm8)
+#elif defined(SIMDE_SHUFFLE_VECTOR_)
+#  define simde_mm_shuffle_pi16(a, imm8) (__extension__ ({ \
+      const simde__m64_private simde_tmp_a_ = simde__m64_to_private(a); \
+      simde__m64_from_private((simde__m64_private) { .i16 = \
+        SIMDE_SHUFFLE_VECTOR_(16, 8, \
+          (simde_tmp_a_).i16, \
+          (simde_tmp_a_).i16, \
+          (((imm8)     ) & 3), \
+          (((imm8) >> 2) & 3), \
+          (((imm8) >> 4) & 3), \
+          (((imm8) >> 6) & 3)) }); }))
+#else
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_shuffle_pi16 (simde__m64 a, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) {
+  simde__m64_private r_;
+  simde__m64_private a_ = simde__m64_to_private(a);
+
+  for (size_t i = 0 ; i < sizeof(r_.i16) / sizeof(r_.i16[0]) ; i++) {
+    r_.i16[i] = a_.i16[(imm8 >> (i * 2)) & 3];
+  }
+
+HEDLEY_DIAGNOSTIC_PUSH
+#if HEDLEY_HAS_WARNING("-Wconditional-uninitialized")
+#  pragma clang diagnostic ignored "-Wconditional-uninitialized"
+#endif
+  return simde__m64_from_private(r_);
+HEDLEY_DIAGNOSTIC_POP
+}
+#endif
+#if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) && !defined(__PGI)
+#  define simde_m_pshufw(a, imm8) _m_pshufw(a, imm8)
+#else
+#  define simde_m_pshufw(a, imm8) simde_mm_shuffle_pi16(a, imm8)
+#endif
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_shuffle_pi16(a, imm8) simde_mm_shuffle_pi16(a, imm8)
+#  define _m_pshufw(a, imm8) simde_mm_shuffle_pi16(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_shuffle_ps (simde__m128 a, simde__m128 b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) {
+  simde__m128_private
+    r_,
+    a_ = simde__m128_to_private(a),
+    b_ = simde__m128_to_private(b);
+
+  r_.f32[0] = a_.f32[(imm8 >> 0) & 3];
+  r_.f32[1] = a_.f32[(imm8 >> 2) & 3];
+  r_.f32[2] = b_.f32[(imm8 >> 4) & 3];
+  r_.f32[3] = b_.f32[(imm8 >> 6) & 3];
+
+  return simde__m128_from_private(r_);
+}
+#if defined(SIMDE_X86_SSE_NATIVE) && !defined(__PGI)
+#  define simde_mm_shuffle_ps(a, b, imm8) _mm_shuffle_ps(a, b, imm8)
+#elif defined(SIMDE_WASM_SIMD128_NATIVE)
+  #define simde_mm_shuffle_ps(a, b, imm8) (__extension__ ({ \
+    simde__m128_from_private((simde__m128_private) { .wasm_v128 = \
+      wasm_i32x4_shuffle( \
+        simde__m128_to_private(a).wasm_v128, \
+        simde__m128_to_private(b).wasm_v128, \
+        (((imm8)     ) & 3), \
+        (((imm8) >> 2) & 3), \
+        (((imm8) >> 4) & 3) + 4, \
+        (((imm8) >> 6) & 3) + 4) }); }))
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_STATEMENT_EXPR_)
+  #define simde_mm_shuffle_ps(a, b, imm8) \
+    (__extension__({ \
+      float32x4_t simde_mm_shuffle_ps_a_ = simde__m128_to_neon_f32(a); \
+      float32x4_t simde_mm_shuffle_ps_b_ = simde__m128_to_neon_f32(b); \
+      float32x4_t simde_mm_shuffle_ps_r_; \
+      \
+      simde_mm_shuffle_ps_r_ = vmovq_n_f32(vgetq_lane_f32(simde_mm_shuffle_ps_a_, (imm8) & (0x3))); \
+      simde_mm_shuffle_ps_r_ = vsetq_lane_f32(vgetq_lane_f32(simde_mm_shuffle_ps_a_, ((imm8) >> 2) & 0x3), simde_mm_shuffle_ps_r_, 1); \
+      simde_mm_shuffle_ps_r_ = vsetq_lane_f32(vgetq_lane_f32(simde_mm_shuffle_ps_b_, ((imm8) >> 4) & 0x3), simde_mm_shuffle_ps_r_, 2); \
+                               vsetq_lane_f32(vgetq_lane_f32(simde_mm_shuffle_ps_b_, ((imm8) >> 6) & 0x3), simde_mm_shuffle_ps_r_, 3); \
+    }))
+#elif defined(SIMDE_SHUFFLE_VECTOR_)
+  #define simde_mm_shuffle_ps(a, b, imm8) (__extension__ ({ \
+      simde__m128_from_private((simde__m128_private) { .f32 = \
+        SIMDE_SHUFFLE_VECTOR_(32, 16, \
+          simde__m128_to_private(a).f32, \
+          simde__m128_to_private(b).f32, \
+          (((imm8)     ) & 3), \
+          (((imm8) >> 2) & 3), \
+          (((imm8) >> 4) & 3) + 4, \
+          (((imm8) >> 6) & 3) + 4) }); }))
+#endif
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_shuffle_ps(a, b, imm8) simde_mm_shuffle_ps((a), (b), imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_sqrt_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_sqrt_ps(a);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f32 = vsqrtq_f32(a_.neon_f32);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      float32x4_t est = vrsqrteq_f32(a_.neon_f32);
+      for (int i = 0 ; i <= SIMDE_ACCURACY_PREFERENCE ; i++) {
+        est = vmulq_f32(vrsqrtsq_f32(vmulq_f32(a_.neon_f32, est), est), est);
+      }
+      r_.neon_f32 = vmulq_f32(a_.neon_f32, est);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f32x4_sqrt(a_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_14_NATIVE)
+      r_.altivec_f32 = vec_sqrt(a_.altivec_f32);
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      r_.lsx_f32 = __lsx_vfsqrt_s(a_.lsx_f32);
+    #elif defined(simde_math_sqrt)
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < sizeof(r_.f32) / sizeof(r_.f32[0]) ; i++) {
+        r_.f32[i] = simde_math_sqrtf(a_.f32[i]);
+      }
+    #else
+      HEDLEY_UNREACHABLE();
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_sqrt_ps(a) simde_mm_sqrt_ps((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_sqrt_ss (simde__m128 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_sqrt_ss(a);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+    return simde_mm_move_ss(a, simde_mm_sqrt_ps(a));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_ss(a, simde_mm_sqrt_ps(simde_x_mm_broadcastlow_ps(a)));
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      float32_t value =
+            vgetq_lane_f32(simde__m128_to_private(simde_mm_sqrt_ps(a)).neon_f32, 0);
+      r_.neon_f32 = vsetq_lane_f32(value, a_.neon_f32, 0);
+    #elif defined(simde_math_sqrtf)
+      r_.f32[0] = simde_math_sqrtf(a_.f32[0]);
+      r_.f32[1] = a_.f32[1];
+      r_.f32[2] = a_.f32[2];
+      r_.f32[3] = a_.f32[3];
+    #else
+      HEDLEY_UNREACHABLE();
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_sqrt_ss(a) simde_mm_sqrt_ss((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_store_ps (simde_float32 mem_addr[4], simde__m128 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    _mm_store_ps(mem_addr, a);
+  #else
+    simde__m128_private a_ = simde__m128_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      vst1q_f32(mem_addr, a_.neon_f32);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      vec_st(a_.altivec_f32, 0, mem_addr);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      wasm_v128_store(mem_addr, a_.wasm_v128);
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      __lsx_vst(a_.lsx_f32, mem_addr, 0);
+    #else
+      simde_memcpy(mem_addr, &a_, sizeof(a));
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_store_ps(mem_addr, a) simde_mm_store_ps(SIMDE_CHECKED_REINTERPRET_CAST(float*, simde_float32*, mem_addr), (a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_store1_ps (simde_float32 mem_addr[4], simde__m128 a) {
+  simde_float32* mem_addr_ = SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m128);
+
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    _mm_store_ps1(mem_addr_, a);
+  #else
+    simde__m128_private a_ = simde__m128_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      vst1q_f32(mem_addr_, vdupq_lane_f32(vget_low_f32(a_.neon_f32), 0));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      wasm_v128_store(mem_addr_, wasm_i32x4_shuffle(a_.wasm_v128, a_.wasm_v128, 0, 0, 0, 0));
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      vec_st(vec_splat(a_.altivec_f32, 0), 0, mem_addr_);
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      __lsx_vst(__lsx_vreplvei_w(a_.lsx_f32, 0), mem_addr_, 0);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      simde__m128_private tmp_;
+      tmp_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.f32, a_.f32, 0, 0, 0, 0);
+      simde_mm_store_ps(mem_addr_, tmp_.f32);
+    #else
+      SIMDE_VECTORIZE_ALIGNED(mem_addr_:16)
+      for (size_t i = 0 ; i < sizeof(a_.f32) / sizeof(a_.f32[0]) ; i++) {
+        mem_addr_[i] = a_.f32[0];
+      }
+    #endif
+  #endif
+}
+#define simde_mm_store_ps1(mem_addr, a) simde_mm_store1_ps(mem_addr, a)
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_store_ps1(mem_addr, a) simde_mm_store1_ps(SIMDE_CHECKED_REINTERPRET_CAST(float*, simde_float32*, mem_addr), (a))
+#  define _mm_store1_ps(mem_addr, a) simde_mm_store1_ps(SIMDE_CHECKED_REINTERPRET_CAST(float*, simde_float32*, mem_addr), (a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_store_ss (simde_float32* mem_addr, simde__m128 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    _mm_store_ss(mem_addr, a);
+  #else
+    simde__m128_private a_ = simde__m128_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      vst1q_lane_f32(mem_addr, a_.neon_f32, 0);
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      __lsx_vstelm_w(a_.lsx_f32, mem_addr, 0, 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      wasm_v128_store32_lane(HEDLEY_REINTERPRET_CAST(void*, mem_addr), a_.wasm_v128, 0);
+    #else
+      *mem_addr = a_.f32[0];
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_store_ss(mem_addr, a) simde_mm_store_ss(SIMDE_CHECKED_REINTERPRET_CAST(float*, simde_float32*, mem_addr), (a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_storeh_pi (simde__m64* mem_addr, simde__m128 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    _mm_storeh_pi(HEDLEY_REINTERPRET_CAST(__m64*, mem_addr), a);
+  #else
+    simde__m128_private a_ = simde__m128_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      vst1_f32(HEDLEY_REINTERPRET_CAST(float32_t*, mem_addr), vget_high_f32(a_.neon_f32));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      wasm_v128_store64_lane(HEDLEY_REINTERPRET_CAST(void*, mem_addr), a_.wasm_v128, 1);
+    #else
+      simde_memcpy(mem_addr, &(a_.m64[1]), sizeof(a_.m64[1]));
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_storeh_pi(mem_addr, a) simde_mm_storeh_pi(mem_addr, (a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_storel_pi (simde__m64* mem_addr, simde__m128 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    _mm_storel_pi(HEDLEY_REINTERPRET_CAST(__m64*, mem_addr), a);
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    simde__m128_private a_ = simde__m128_to_private(a);
+    wasm_v128_store64_lane(HEDLEY_REINTERPRET_CAST(void*, mem_addr), a_.wasm_v128, 0);
+  #else
+    simde__m64_private* dest_ = HEDLEY_REINTERPRET_CAST(simde__m64_private*, mem_addr);
+    simde__m128_private a_ = simde__m128_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      dest_->neon_f32 = vget_low_f32(a_.neon_f32);
+    #else
+      dest_->f32[0] = a_.f32[0];
+      dest_->f32[1] = a_.f32[1];
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_storel_pi(mem_addr, a) simde_mm_storel_pi(mem_addr, (a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_storer_ps (simde_float32 mem_addr[4], simde__m128 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    _mm_storer_ps(mem_addr, a);
+  #else
+    simde__m128_private a_ = simde__m128_to_private(a);
+
+    #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      vec_st(vec_reve(a_.altivec_f32), 0, mem_addr);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      float32x4_t tmp = vrev64q_f32(a_.neon_f32);
+      vst1q_f32(mem_addr, vextq_f32(tmp, tmp, 2));
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      __lsx_vst(__lsx_vshuf4i_w(a_.lsx_f32, 0x1b), mem_addr, 0);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      a_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.f32, a_.f32, 3, 2, 1, 0);
+      simde_mm_store_ps(mem_addr, simde__m128_from_private(a_));
+    #else
+      SIMDE_VECTORIZE_ALIGNED(mem_addr:16)
+      for (size_t i = 0 ; i < sizeof(a_.f32) / sizeof(a_.f32[0]) ; i++) {
+        mem_addr[i] = a_.f32[((sizeof(a_.f32) / sizeof(a_.f32[0])) - 1) - i];
+      }
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_storer_ps(mem_addr, a) simde_mm_storer_ps(SIMDE_CHECKED_REINTERPRET_CAST(float*, simde_float32*, mem_addr), (a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_storeu_ps (simde_float32 mem_addr[4], simde__m128 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    _mm_storeu_ps(mem_addr, a);
+  #else
+    simde__m128_private a_ = simde__m128_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      vst1q_f32(mem_addr, a_.neon_f32);
+    #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
+      vec_vsx_st(a_.altivec_f32, 0, mem_addr);
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      __lsx_vst(a_.lsx_f32, mem_addr, 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      wasm_v128_store(mem_addr, a_.wasm_v128);
+    #else
+      simde_memcpy(mem_addr, &a_, sizeof(a_));
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_storeu_ps(mem_addr, a) simde_mm_storeu_ps(SIMDE_CHECKED_REINTERPRET_CAST(float*, simde_float32*, mem_addr), (a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_sub_ps (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_sub_ps(a, b);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_f32 = vsubq_f32(a_.neon_f32, b_.neon_f32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f32x4_sub(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_f32 = vec_sub(a_.altivec_f32, b_.altivec_f32);
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      r_.lsx_f32 = __lsx_vfsub_s(a_.lsx_f32, b_.lsx_f32);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.f32 = a_.f32 - b_.f32;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = a_.f32[i] - b_.f32[i];
+      }
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_sub_ps(a, b) simde_mm_sub_ps((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_sub_ss (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_sub_ss(a, b);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+    return simde_mm_move_ss(a, simde_mm_sub_ps(a, b));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_ss(a, simde_mm_sub_ps(simde_x_mm_broadcastlow_ps(a), simde_x_mm_broadcastlow_ps(b)));
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    r_.f32[0] = a_.f32[0] - b_.f32[0];
+    r_.f32[1] = a_.f32[1];
+    r_.f32[2] = a_.f32[2];
+    r_.f32[3] = a_.f32[3];
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_sub_ss(a, b) simde_mm_sub_ss((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_ucomieq_ss (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_ucomieq_ss(a, b);
+  #else
+    simde__m128_private
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+    int r;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      uint32x4_t a_not_nan = vceqq_f32(a_.neon_f32, a_.neon_f32);
+      uint32x4_t b_not_nan = vceqq_f32(b_.neon_f32, b_.neon_f32);
+      uint32x4_t a_or_b_nan = vmvnq_u32(vandq_u32(a_not_nan, b_not_nan));
+      uint32x4_t a_eq_b = vceqq_f32(a_.neon_f32, b_.neon_f32);
+      r = !!(vgetq_lane_u32(vorrq_u32(a_or_b_nan, a_eq_b), 0) != 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r = wasm_f32x4_extract_lane(a_.wasm_v128, 0) == wasm_f32x4_extract_lane(b_.wasm_v128, 0);
+    #elif defined(SIMDE_HAVE_FENV_H)
+      fenv_t envp;
+      int x = feholdexcept(&envp);
+      r = a_.f32[0] == b_.f32[0];
+      if (HEDLEY_LIKELY(x == 0))
+        fesetenv(&envp);
+    #else
+      r = a_.f32[0] == b_.f32[0];
+    #endif
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_ucomieq_ss(a, b) simde_mm_ucomieq_ss((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_ucomige_ss (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_ucomige_ss(a, b);
+  #else
+    simde__m128_private
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+    int r;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      uint32x4_t a_not_nan = vceqq_f32(a_.neon_f32, a_.neon_f32);
+      uint32x4_t b_not_nan = vceqq_f32(b_.neon_f32, b_.neon_f32);
+      uint32x4_t a_and_b_not_nan = vandq_u32(a_not_nan, b_not_nan);
+      uint32x4_t a_ge_b = vcgeq_f32(a_.neon_f32, b_.neon_f32);
+      r = !!(vgetq_lane_u32(vandq_u32(a_and_b_not_nan, a_ge_b), 0) != 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r = wasm_f32x4_extract_lane(a_.wasm_v128, 0) >= wasm_f32x4_extract_lane(b_.wasm_v128, 0);
+    #elif defined(SIMDE_HAVE_FENV_H)
+      fenv_t envp;
+      int x = feholdexcept(&envp);
+      r = a_.f32[0] >= b_.f32[0];
+      if (HEDLEY_LIKELY(x == 0))
+        fesetenv(&envp);
+    #else
+      r = a_.f32[0] >= b_.f32[0];
+    #endif
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_ucomige_ss(a, b) simde_mm_ucomige_ss((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_ucomigt_ss (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_ucomigt_ss(a, b);
+  #else
+    simde__m128_private
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+    int r;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      uint32x4_t a_not_nan = vceqq_f32(a_.neon_f32, a_.neon_f32);
+      uint32x4_t b_not_nan = vceqq_f32(b_.neon_f32, b_.neon_f32);
+      uint32x4_t a_and_b_not_nan = vandq_u32(a_not_nan, b_not_nan);
+      uint32x4_t a_gt_b = vcgtq_f32(a_.neon_f32, b_.neon_f32);
+      r = !!(vgetq_lane_u32(vandq_u32(a_and_b_not_nan, a_gt_b), 0) != 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r = wasm_f32x4_extract_lane(a_.wasm_v128, 0) > wasm_f32x4_extract_lane(b_.wasm_v128, 0);
+    #elif defined(SIMDE_HAVE_FENV_H)
+      fenv_t envp;
+      int x = feholdexcept(&envp);
+      r = a_.f32[0] > b_.f32[0];
+      if (HEDLEY_LIKELY(x == 0))
+        fesetenv(&envp);
+    #else
+      r = a_.f32[0] > b_.f32[0];
+    #endif
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_ucomigt_ss(a, b) simde_mm_ucomigt_ss((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_ucomile_ss (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_ucomile_ss(a, b);
+  #else
+    simde__m128_private
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+    int r;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      uint32x4_t a_not_nan = vceqq_f32(a_.neon_f32, a_.neon_f32);
+      uint32x4_t b_not_nan = vceqq_f32(b_.neon_f32, b_.neon_f32);
+      uint32x4_t a_or_b_nan = vmvnq_u32(vandq_u32(a_not_nan, b_not_nan));
+      uint32x4_t a_le_b = vcleq_f32(a_.neon_f32, b_.neon_f32);
+      r = !!(vgetq_lane_u32(vorrq_u32(a_or_b_nan, a_le_b), 0) != 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r = wasm_f32x4_extract_lane(a_.wasm_v128, 0) <= wasm_f32x4_extract_lane(b_.wasm_v128, 0);
+    #elif defined(SIMDE_HAVE_FENV_H)
+      fenv_t envp;
+      int x = feholdexcept(&envp);
+      r = a_.f32[0] <= b_.f32[0];
+      if (HEDLEY_LIKELY(x == 0))
+        fesetenv(&envp);
+    #else
+      r = a_.f32[0] <= b_.f32[0];
+    #endif
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_ucomile_ss(a, b) simde_mm_ucomile_ss((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_ucomilt_ss (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_ucomilt_ss(a, b);
+  #else
+    simde__m128_private
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+    int r;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      uint32x4_t a_not_nan = vceqq_f32(a_.neon_f32, a_.neon_f32);
+      uint32x4_t b_not_nan = vceqq_f32(b_.neon_f32, b_.neon_f32);
+      uint32x4_t a_or_b_nan = vmvnq_u32(vandq_u32(a_not_nan, b_not_nan));
+      uint32x4_t a_lt_b = vcltq_f32(a_.neon_f32, b_.neon_f32);
+      r = !!(vgetq_lane_u32(vorrq_u32(a_or_b_nan, a_lt_b), 0) != 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r = wasm_f32x4_extract_lane(a_.wasm_v128, 0) < wasm_f32x4_extract_lane(b_.wasm_v128, 0);
+    #elif defined(SIMDE_HAVE_FENV_H)
+      fenv_t envp;
+      int x = feholdexcept(&envp);
+      r = a_.f32[0] < b_.f32[0];
+      if (HEDLEY_LIKELY(x == 0))
+        fesetenv(&envp);
+    #else
+      r = a_.f32[0] < b_.f32[0];
+    #endif
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_ucomilt_ss(a, b) simde_mm_ucomilt_ss((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_ucomineq_ss (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_ucomineq_ss(a, b);
+  #else
+    simde__m128_private
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+    int r;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      uint32x4_t a_not_nan = vceqq_f32(a_.neon_f32, a_.neon_f32);
+      uint32x4_t b_not_nan = vceqq_f32(b_.neon_f32, b_.neon_f32);
+      uint32x4_t a_and_b_not_nan = vandq_u32(a_not_nan, b_not_nan);
+      uint32x4_t a_neq_b = vmvnq_u32(vceqq_f32(a_.neon_f32, b_.neon_f32));
+      r = !!(vgetq_lane_u32(vandq_u32(a_and_b_not_nan, a_neq_b), 0) != 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r = wasm_f32x4_extract_lane(a_.wasm_v128, 0) != wasm_f32x4_extract_lane(b_.wasm_v128, 0);
+    #elif defined(SIMDE_HAVE_FENV_H)
+      fenv_t envp;
+      int x = feholdexcept(&envp);
+      r = a_.f32[0] != b_.f32[0];
+      if (HEDLEY_LIKELY(x == 0))
+        fesetenv(&envp);
+    #else
+      r = a_.f32[0] != b_.f32[0];
+    #endif
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_ucomineq_ss(a, b) simde_mm_ucomineq_ss((a), (b))
+#endif
+
+#if defined(SIMDE_X86_SSE_NATIVE)
+#  if defined(__has_builtin)
+#    if __has_builtin(__builtin_ia32_undef128)
+#      define SIMDE_HAVE_UNDEFINED128
+#    endif
+#  elif !defined(__PGI) && !defined(SIMDE_BUG_GCC_REV_208793) && !defined(_MSC_VER)
+#    define SIMDE_HAVE_UNDEFINED128
+#  endif
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_unpackhi_ps (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_unpackhi_ps(a, b);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f32 = vzip2q_f32(a_.neon_f32, b_.neon_f32);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      float32x2_t a1 = vget_high_f32(a_.neon_f32);
+      float32x2_t b1 = vget_high_f32(b_.neon_f32);
+      float32x2x2_t result = vzip_f32(a1, b1);
+      r_.neon_f32 = vcombine_f32(result.val[0], result.val[1]);
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      r_.lsx_i64 = __lsx_vilvh_w(b_.lsx_i64, a_.lsx_i64);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i32x4_shuffle(a_.wasm_v128, b_.wasm_v128, 2, 6, 3, 7);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.f32, b_.f32, 2, 6, 3, 7);
+    #else
+      r_.f32[0] = a_.f32[2];
+      r_.f32[1] = b_.f32[2];
+      r_.f32[2] = a_.f32[3];
+      r_.f32[3] = b_.f32[3];
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_unpackhi_ps(a, b) simde_mm_unpackhi_ps((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_unpacklo_ps (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_unpacklo_ps(a, b);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f32 = vzip1q_f32(a_.neon_f32, b_.neon_f32);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_f32 = vec_mergeh(a_.altivec_f32, b_.altivec_f32);
+    #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
+      r_.lsx_i64 = __lsx_vilvl_w(b_.lsx_i64, a_.lsx_i64);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i32x4_shuffle(a_.wasm_v128, b_.wasm_v128, 0, 4, 1, 5);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      float32x2_t a1 = vget_low_f32(a_.neon_f32);
+      float32x2_t b1 = vget_low_f32(b_.neon_f32);
+      float32x2x2_t result = vzip_f32(a1, b1);
+      r_.neon_f32 = vcombine_f32(result.val[0], result.val[1]);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.f32, b_.f32, 0, 4, 1, 5);
+    #else
+      r_.f32[0] = a_.f32[0];
+      r_.f32[1] = b_.f32[0];
+      r_.f32[2] = a_.f32[1];
+      r_.f32[3] = b_.f32[1];
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_unpacklo_ps(a, b) simde_mm_unpacklo_ps((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_stream_pi (simde__m64* mem_addr, simde__m64 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    _mm_stream_pi(HEDLEY_REINTERPRET_CAST(__m64*, mem_addr), a);
+  #elif HEDLEY_HAS_BUILTIN(__builtin_nontemporal_store) && ( \
+      defined(SIMDE_ARM_NEON_A32V7_NATIVE) || defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE) || \
+      defined(SIMDE_VECTOR_SUBSCRIPT))
+    __builtin_nontemporal_store(a, mem_addr);
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    simde__m64_private a_ = simde__m64_to_private(a);
+    vst1_s64(HEDLEY_REINTERPRET_CAST(int64_t *, mem_addr), a_.neon_i64);
+  #else
+    simde__m64_private*
+      dest = HEDLEY_REINTERPRET_CAST(simde__m64_private*, mem_addr),
+      a_ = simde__m64_to_private(a);
+
+    dest->i64[0] = a_.i64[0];
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_stream_pi(mem_addr, a) simde_mm_stream_pi(mem_addr, (a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_stream_ps (simde_float32 mem_addr[4], simde__m128 a) {
+  #if defined(SIMDE_X86_SSE_NATIVE)
+    _mm_stream_ps(mem_addr, a);
+  #elif HEDLEY_HAS_BUILTIN(__builtin_nontemporal_store) && ( \
+      defined(SIMDE_ARM_NEON_A32V7_NATIVE) || defined(SIMDE_VECTOR_SUBSCRIPT) || \
+      defined(SIMDE_WASM_SIMD128_NATIVE) || defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || \
+      defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) || defined(SIMDE_LOONGARCH_LSX_NATIVE))
+    __builtin_nontemporal_store(a, SIMDE_ALIGN_ASSUME_CAST(__typeof__(a)*, mem_addr));
+  #else
+    simde_mm_store_ps(mem_addr, a);
+  #endif
+}
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _mm_stream_ps(mem_addr, a) simde_mm_stream_ps(SIMDE_CHECKED_REINTERPRET_CAST(float*, simde_float32*, mem_addr), (a))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define SIMDE_MM_TRANSPOSE4_PS(row0, row1, row2, row3) \
+    do { \
+          float32x4x2_t SIMDE_MM_TRANSPOSE4_PS_ROW01 = vtrnq_f32(row0, row1); \
+          float32x4x2_t SIMDE_MM_TRANSPOSE4_PS_ROW23 = vtrnq_f32(row2, row3); \
+          row0 = vcombine_f32(vget_low_f32(SIMDE_MM_TRANSPOSE4_PS_ROW01.val[0]), \
+                              vget_low_f32(SIMDE_MM_TRANSPOSE4_PS_ROW23.val[0])); \
+          row1 = vcombine_f32(vget_low_f32(SIMDE_MM_TRANSPOSE4_PS_ROW01.val[1]), \
+                              vget_low_f32(SIMDE_MM_TRANSPOSE4_PS_ROW23.val[1])); \
+          row2 = vcombine_f32(vget_high_f32(SIMDE_MM_TRANSPOSE4_PS_ROW01.val[0]), \
+                              vget_high_f32(SIMDE_MM_TRANSPOSE4_PS_ROW23.val[0])); \
+          row3 = vcombine_f32(vget_high_f32(SIMDE_MM_TRANSPOSE4_PS_ROW01.val[1]), \
+                              vget_high_f32(SIMDE_MM_TRANSPOSE4_PS_ROW23.val[1])); \
+      } while (0)
+#else
+  #define SIMDE_MM_TRANSPOSE4_PS(row0, row1, row2, row3) \
+    do { \
+      simde__m128 SIMDE_MM_TRANSPOSE4_PS_tmp3, SIMDE_MM_TRANSPOSE4_PS_tmp2, SIMDE_MM_TRANSPOSE4_PS_tmp1, SIMDE_MM_TRANSPOSE4_PS_tmp0; \
+      SIMDE_MM_TRANSPOSE4_PS_tmp0 = simde_mm_unpacklo_ps((row0), (row1)); \
+      SIMDE_MM_TRANSPOSE4_PS_tmp2 = simde_mm_unpacklo_ps((row2), (row3)); \
+      SIMDE_MM_TRANSPOSE4_PS_tmp1 = simde_mm_unpackhi_ps((row0), (row1)); \
+      SIMDE_MM_TRANSPOSE4_PS_tmp3 = simde_mm_unpackhi_ps((row2), (row3)); \
+      row0 = simde_mm_movelh_ps(SIMDE_MM_TRANSPOSE4_PS_tmp0, SIMDE_MM_TRANSPOSE4_PS_tmp2); \
+      row1 = simde_mm_movehl_ps(SIMDE_MM_TRANSPOSE4_PS_tmp2, SIMDE_MM_TRANSPOSE4_PS_tmp0); \
+      row2 = simde_mm_movelh_ps(SIMDE_MM_TRANSPOSE4_PS_tmp1, SIMDE_MM_TRANSPOSE4_PS_tmp3); \
+      row3 = simde_mm_movehl_ps(SIMDE_MM_TRANSPOSE4_PS_tmp3, SIMDE_MM_TRANSPOSE4_PS_tmp1); \
+    } while (0)
+#endif
+#if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)
+#  define _MM_TRANSPOSE4_PS(row0, row1, row2, row3) SIMDE_MM_TRANSPOSE4_PS(row0, row1, row2, row3)
+#endif
+
+SIMDE_END_DECLS_
+
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_X86_SSE_H) */
diff --git a/external_libs/pgenlib/simde/x86/sse2.h b/external_libs/pgenlib/simde/x86/sse2.h
new file mode 100644
index 0000000..cb7a6a7
--- /dev/null
+++ b/external_libs/pgenlib/simde/x86/sse2.h
@@ -0,0 +1,7741 @@
+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2017-2020 Evan Nemerson <evan@nemerson.com>
+ *   2015-2017 John W. Ratcliff <jratcliffscarab@gmail.com>
+ *   2015      Brandon Rowlett <browlett@nvidia.com>
+ *   2015      Ken Fast <kfast@gdeb.com>
+ *   2017      Hasindu Gamaarachchi <hasindu@unsw.edu.au>
+ *   2018      Jeff Daily <jeff.daily@amd.com>
+ */
+
+#if !defined(SIMDE_X86_SSE2_H)
+#define SIMDE_X86_SSE2_H
+
+#include "sse.h"
+#include "../simde-f16.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+typedef union {
+  #if defined(SIMDE_VECTOR_SUBSCRIPT)
+    SIMDE_ALIGN_TO_16 int8_t          i8 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_16 int16_t        i16 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_16 int32_t        i32 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_16 int64_t        i64 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_16 uint8_t         u8 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_16 uint16_t       u16 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_16 uint32_t       u32 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_16 uint64_t       u64 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    #if defined(SIMDE_HAVE_INT128_)
+    SIMDE_ALIGN_TO_16 simde_int128  i128 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_16 simde_uint128 u128 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    #endif
+    #if defined(SIMDE_FLOAT16_VECTOR)
+    SIMDE_ALIGN_TO_16 simde_float16  f16 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    #else
+    SIMDE_ALIGN_TO_16 simde_float16  f16[8];
+    #endif
+    SIMDE_ALIGN_TO_16 simde_float32  f32 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_16 simde_float64  f64 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+
+    SIMDE_ALIGN_TO_16 int_fast32_t  i32f SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_16 uint_fast32_t u32f SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+  #else
+    SIMDE_ALIGN_TO_16 int8_t         i8[16];
+    SIMDE_ALIGN_TO_16 int16_t        i16[8];
+    SIMDE_ALIGN_TO_16 int32_t        i32[4];
+    SIMDE_ALIGN_TO_16 int64_t        i64[2];
+    SIMDE_ALIGN_TO_16 uint8_t        u8[16];
+    SIMDE_ALIGN_TO_16 uint16_t       u16[8];
+    SIMDE_ALIGN_TO_16 uint32_t       u32[4];
+    SIMDE_ALIGN_TO_16 uint64_t       u64[2];
+    #if defined(SIMDE_HAVE_INT128_)
+    SIMDE_ALIGN_TO_16 simde_int128  i128[1];
+    SIMDE_ALIGN_TO_16 simde_uint128 u128[1];
+    #endif
+    SIMDE_ALIGN_TO_16 simde_float16  f16[8];
+    SIMDE_ALIGN_TO_16 simde_float32  f32[4];
+    SIMDE_ALIGN_TO_16 simde_float64  f64[2];
+
+    SIMDE_ALIGN_TO_16 int_fast32_t  i32f[16 / sizeof(int_fast32_t)];
+    SIMDE_ALIGN_TO_16 uint_fast32_t u32f[16 / sizeof(uint_fast32_t)];
+  #endif
+
+    SIMDE_ALIGN_TO_16 simde__m64_private m64_private[2];
+    SIMDE_ALIGN_TO_16 simde__m64         m64[2];
+
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    SIMDE_ALIGN_TO_16 __m128i        n;
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    SIMDE_ALIGN_TO_16 int8x16_t      neon_i8;
+    SIMDE_ALIGN_TO_16 int16x8_t      neon_i16;
+    SIMDE_ALIGN_TO_16 int32x4_t      neon_i32;
+    SIMDE_ALIGN_TO_16 int64x2_t      neon_i64;
+    SIMDE_ALIGN_TO_16 uint8x16_t     neon_u8;
+    SIMDE_ALIGN_TO_16 uint16x8_t     neon_u16;
+    SIMDE_ALIGN_TO_16 uint32x4_t     neon_u32;
+    SIMDE_ALIGN_TO_16 uint64x2_t     neon_u64;
+    #if defined(__ARM_FP16_FORMAT_IEEE)
+    SIMDE_ALIGN_TO_16 float16x8_t    neon_f16;
+    #endif
+    SIMDE_ALIGN_TO_16 float32x4_t    neon_f32;
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    SIMDE_ALIGN_TO_16 float64x2_t    neon_f64;
+    #endif
+  #elif defined(SIMDE_MIPS_MSA_NATIVE)
+    v16i8 msa_i8;
+    v8i16 msa_i16;
+    v4i32 msa_i32;
+    v2i64 msa_i64;
+    v16u8 msa_u8;
+    v8u16 msa_u16;
+    v4u32 msa_u32;
+    v2u64 msa_u64;
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    SIMDE_ALIGN_TO_16 v128_t         wasm_v128;
+  #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed char)          altivec_i8;
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed short)         altivec_i16;
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed int)           altivec_i32;
+    #if defined(__UINT_FAST32_TYPE__) && (defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE))
+      SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(__INT_FAST32_TYPE__)  altivec_i32f;
+    #else
+      SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed int)           altivec_i32f;
+    #endif
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned char)        altivec_u8;
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned short)       altivec_u16;
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned int)         altivec_u32;
+    #if defined(__UINT_FAST32_TYPE__) && (defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE))
+      SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(__UINT_FAST32_TYPE__) altivec_u32f;
+    #else
+      SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned int)         altivec_u32f;
+    #endif
+      SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(float)                altivec_f32;
+    #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed long long)   altivec_i64;
+      SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long) altivec_u64;
+      SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(double)             altivec_f64;
+    #endif
+  #endif
+} simde__m128i_private;
+
+typedef union {
+  #if defined(SIMDE_VECTOR_SUBSCRIPT)
+    SIMDE_ALIGN_TO_16 int8_t          i8 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_16 int16_t        i16 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_16 int32_t        i32 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_16 int64_t        i64 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_16 uint8_t         u8 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_16 uint16_t       u16 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_16 uint32_t       u32 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_16 uint64_t       u64 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_16 simde_float32  f32 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_16 simde_float64  f64 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_16 int_fast32_t  i32f SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+    SIMDE_ALIGN_TO_16 uint_fast32_t u32f SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+  #else
+    SIMDE_ALIGN_TO_16 int8_t         i8[16];
+    SIMDE_ALIGN_TO_16 int16_t        i16[8];
+    SIMDE_ALIGN_TO_16 int32_t        i32[4];
+    SIMDE_ALIGN_TO_16 int64_t        i64[2];
+    SIMDE_ALIGN_TO_16 uint8_t        u8[16];
+    SIMDE_ALIGN_TO_16 uint16_t       u16[8];
+    SIMDE_ALIGN_TO_16 uint32_t       u32[4];
+    SIMDE_ALIGN_TO_16 uint64_t       u64[2];
+    SIMDE_ALIGN_TO_16 simde_float32  f32[4];
+    SIMDE_ALIGN_TO_16 simde_float64  f64[2];
+    SIMDE_ALIGN_TO_16 int_fast32_t  i32f[16 / sizeof(int_fast32_t)];
+    SIMDE_ALIGN_TO_16 uint_fast32_t u32f[16 / sizeof(uint_fast32_t)];
+  #endif
+
+    SIMDE_ALIGN_TO_16 simde__m64_private m64_private[2];
+    SIMDE_ALIGN_TO_16 simde__m64         m64[2];
+
+  #if defined(SIMDE_X86_SSE2_NATIVE) || defined(SIMDE_X86_SVML_NATIVE)
+    SIMDE_ALIGN_TO_16 __m128d        n;
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    SIMDE_ALIGN_TO_16 int8x16_t      neon_i8;
+    SIMDE_ALIGN_TO_16 int16x8_t      neon_i16;
+    SIMDE_ALIGN_TO_16 int32x4_t      neon_i32;
+    SIMDE_ALIGN_TO_16 int64x2_t      neon_i64;
+    SIMDE_ALIGN_TO_16 uint8x16_t     neon_u8;
+    SIMDE_ALIGN_TO_16 uint16x8_t     neon_u16;
+    SIMDE_ALIGN_TO_16 uint32x4_t     neon_u32;
+    SIMDE_ALIGN_TO_16 uint64x2_t     neon_u64;
+    SIMDE_ALIGN_TO_16 float32x4_t    neon_f32;
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    SIMDE_ALIGN_TO_16 float64x2_t    neon_f64;
+    #endif
+  #elif defined(SIMDE_MIPS_MSA_NATIVE)
+    v16i8 msa_i8;
+    v8i16 msa_i16;
+    v4i32 msa_i32;
+    v2i64 msa_i64;
+    v16u8 msa_u8;
+    v8u16 msa_u16;
+    v4u32 msa_u32;
+    v2u64 msa_u64;
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    SIMDE_ALIGN_TO_16 v128_t         wasm_v128;
+  #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed char)          altivec_i8;
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed short)         altivec_i16;
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed int)           altivec_i32;
+    #if defined(__INT_FAST32_TYPE__) && (defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE))
+      SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(__INT_FAST32_TYPE__)  altivec_i32f;
+    #else
+      SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed int)           altivec_i32f;
+    #endif
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned char)        altivec_u8;
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned short)       altivec_u16;
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned int)         altivec_u32;
+    #if defined(__UINT_FAST32_TYPE__) && (defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE))
+      SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(__UINT_FAST32_TYPE__) altivec_u32f;
+    #else
+      SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned int)         altivec_u32f;
+    #endif
+    SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(float)                altivec_f32;
+    #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed long long)   altivec_i64;
+      SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long) altivec_u64;
+      SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(double)             altivec_f64;
+    #endif
+  #endif
+} simde__m128d_private;
+
+#if defined(SIMDE_X86_SSE2_NATIVE) || defined(SIMDE_X86_SVML_NATIVE)
+  typedef __m128i simde__m128i;
+  typedef __m128d simde__m128d;
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+   typedef int64x2_t simde__m128i;
+#  if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+     typedef float64x2_t simde__m128d;
+#  elif defined(SIMDE_VECTOR_SUBSCRIPT)
+     typedef simde_float64 simde__m128d SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+#  else
+     typedef simde__m128d_private simde__m128d;
+#  endif
+#elif defined(SIMDE_WASM_SIMD128_NATIVE)
+   typedef v128_t simde__m128i;
+   typedef v128_t simde__m128d;
+#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+  typedef SIMDE_POWER_ALTIVEC_VECTOR(float) simde__m128i;
+  #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+     typedef SIMDE_POWER_ALTIVEC_VECTOR(double) simde__m128d;
+  #else
+     typedef simde__m128d_private simde__m128d;
+  #endif
+#elif defined(SIMDE_VECTOR_SUBSCRIPT)
+  typedef int64_t simde__m128i SIMDE_ALIGN_TO_16 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+  typedef simde_float64 simde__m128d SIMDE_ALIGN_TO_16 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
+#else
+  typedef simde__m128i_private simde__m128i;
+  typedef simde__m128d_private simde__m128d;
+#endif
+
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) || defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  typedef simde__m128i __m128i;
+  typedef simde__m128d __m128d;
+#endif
+
+HEDLEY_STATIC_ASSERT(16 == sizeof(simde__m128i), "simde__m128i size incorrect");
+HEDLEY_STATIC_ASSERT(16 == sizeof(simde__m128i_private), "simde__m128i_private size incorrect");
+HEDLEY_STATIC_ASSERT(16 == sizeof(simde__m128d), "simde__m128d size incorrect");
+HEDLEY_STATIC_ASSERT(16 == sizeof(simde__m128d_private), "simde__m128d_private size incorrect");
+#if defined(SIMDE_CHECK_ALIGNMENT) && defined(SIMDE_ALIGN_OF)
+HEDLEY_STATIC_ASSERT(SIMDE_ALIGN_OF(simde__m128i) == 16, "simde__m128i is not 16-byte aligned");
+HEDLEY_STATIC_ASSERT(SIMDE_ALIGN_OF(simde__m128i_private) == 16, "simde__m128i_private is not 16-byte aligned");
+HEDLEY_STATIC_ASSERT(SIMDE_ALIGN_OF(simde__m128d) == 16, "simde__m128d is not 16-byte aligned");
+HEDLEY_STATIC_ASSERT(SIMDE_ALIGN_OF(simde__m128d_private) == 16, "simde__m128d_private is not 16-byte aligned");
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde__m128i_from_private(simde__m128i_private v) {
+  simde__m128i r;
+  simde_memcpy(&r, &v, sizeof(r));
+  return r;
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i_private
+simde__m128i_to_private(simde__m128i v) {
+  simde__m128i_private r;
+  simde_memcpy(&r, &v, sizeof(r));
+  return r;
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde__m128d_from_private(simde__m128d_private v) {
+  simde__m128d r;
+  simde_memcpy(&r, &v, sizeof(r));
+  return r;
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d_private
+simde__m128d_to_private(simde__m128d v) {
+  simde__m128d_private r;
+  simde_memcpy(&r, &v, sizeof(r));
+  return r;
+}
+
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, int8x16_t, neon, i8)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, int16x8_t, neon, i16)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, int32x4_t, neon, i32)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, int64x2_t, neon, i64)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, uint8x16_t, neon, u8)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, uint16x8_t, neon, u16)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, uint32x4_t, neon, u32)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, uint64x2_t, neon, u64)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, float32x4_t, neon, f32)
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, float64x2_t, neon, f64)
+  #endif
+#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, SIMDE_POWER_ALTIVEC_VECTOR(signed char), altivec, i8)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, SIMDE_POWER_ALTIVEC_VECTOR(signed short), altivec, i16)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, SIMDE_POWER_ALTIVEC_VECTOR(signed int), altivec, i32)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, SIMDE_POWER_ALTIVEC_VECTOR(unsigned char), altivec, u8)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, SIMDE_POWER_ALTIVEC_VECTOR(unsigned short), altivec, u16)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, SIMDE_POWER_ALTIVEC_VECTOR(unsigned int), altivec, u32)
+  #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+    SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long), altivec, u64)
+    SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, SIMDE_POWER_ALTIVEC_VECTOR(signed long long), altivec, i64)
+  #endif
+#endif /* defined(SIMDE_ARM_NEON_A32V7_NATIVE) */
+
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, int8x16_t, neon, i8)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, int16x8_t, neon, i16)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, int32x4_t, neon, i32)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, int64x2_t, neon, i64)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, uint8x16_t, neon, u8)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, uint16x8_t, neon, u16)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, uint32x4_t, neon, u32)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, uint64x2_t, neon, u64)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, float32x4_t, neon, f32)
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, float64x2_t, neon, f64)
+  #endif
+#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, SIMDE_POWER_ALTIVEC_VECTOR(signed char), altivec, i8)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, SIMDE_POWER_ALTIVEC_VECTOR(signed short), altivec, i16)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, SIMDE_POWER_ALTIVEC_VECTOR(signed int), altivec, i32)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, SIMDE_POWER_ALTIVEC_VECTOR(unsigned char), altivec, u8)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, SIMDE_POWER_ALTIVEC_VECTOR(unsigned short), altivec, u16)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, SIMDE_POWER_ALTIVEC_VECTOR(unsigned int), altivec, u32)
+  #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+    SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long), altivec, u64)
+    SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, SIMDE_POWER_ALTIVEC_VECTOR(signed long long), altivec, i64)
+    #if defined(SIMDE_BUG_GCC_95782)
+      SIMDE_FUNCTION_ATTRIBUTES
+      SIMDE_POWER_ALTIVEC_VECTOR(double)
+      simde__m128d_to_altivec_f64(simde__m128d value) {
+        simde__m128d_private r_ = simde__m128d_to_private(value);
+        return r_.altivec_f64;
+      }
+
+      SIMDE_FUNCTION_ATTRIBUTES
+      simde__m128d
+      simde__m128d_from_altivec_f64(SIMDE_POWER_ALTIVEC_VECTOR(double) value) {
+        simde__m128d_private r_;
+        r_.altivec_f64 = value;
+        return simde__m128d_from_private(r_);
+      }
+    #else
+      SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, SIMDE_POWER_ALTIVEC_VECTOR(double), altivec, f64)
+    #endif
+  #endif
+#elif defined(SIMDE_WASM_SIMD128_NATIVE)
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, v128_t, wasm, v128);
+  SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, v128_t, wasm, v128);
+#endif /* defined(SIMDE_ARM_NEON_A32V7_NATIVE) */
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_set_pd (simde_float64 e1, simde_float64 e0) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_set_pd(e1, e0);
+  #else
+    simde__m128d_private r_;
+
+    #if defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f64x2_make(e0, e1);
+    #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      SIMDE_ALIGN_TO_16 simde_float64 data[2] = { e0, e1 };
+      r_.neon_f64 = vld1q_f64(data);
+    #else
+      r_.f64[0] = e0;
+      r_.f64[1] = e1;
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_set_pd(e1, e0) simde_mm_set_pd(e1, e0)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_set1_pd (simde_float64 a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_set1_pd(a);
+  #else
+    simde__m128d_private r_;
+
+    #if defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f64x2_splat(a);
+    #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f64 = vdupq_n_f64(a);
+    #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_f64 = vec_splats(HEDLEY_STATIC_CAST(double, a));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.f64[i] = a;
+      }
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#define simde_mm_set_pd1(a) simde_mm_set1_pd(a)
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_set1_pd(a) simde_mm_set1_pd(a)
+  #define _mm_set_pd1(a) simde_mm_set1_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_x_mm_abs_pd(simde__m128d a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    simde_float64 mask_;
+    uint64_t u64_ = UINT64_C(0x7FFFFFFFFFFFFFFF);
+    simde_memcpy(&mask_, &u64_, sizeof(u64_));
+    return _mm_and_pd(_mm_set1_pd(mask_), a);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f64 = vabsq_f64(a_.neon_f64);
+    #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_f64 = vec_abs(a_.altivec_f64);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f64x2_abs(a_.wasm_v128);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_fabs(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_x_mm_not_pd(simde__m128d a) {
+  #if defined(SIMDE_X86_AVX512VL_NATIVE)
+    __m128i ai = _mm_castpd_si128(a);
+    return _mm_castsi128_pd(_mm_ternarylogic_epi64(ai, ai, ai, 0x55));
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vmvnq_s32(a_.neon_i32);
+    #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
+      r_.altivec_f64 = vec_nor(a_.altivec_f64, a_.altivec_f64);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_i32 = vec_nor(a_.altivec_i32, a_.altivec_i32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_v128_not(a_.wasm_v128);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32f = ~a_.i32f;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) {
+        r_.i32f[i] = ~(a_.i32f[i]);
+      }
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_x_mm_select_pd(simde__m128d a, simde__m128d b, simde__m128d mask) {
+  /* This function is for when you want to blend two elements together
+   * according to a mask.  It is similar to _mm_blendv_pd, except that
+   * it is undefined whether the blend is based on the highest bit in
+   * each lane (like blendv) or just bitwise operations.  This allows
+   * us to implement the function efficiently everywhere.
+   *
+   * Basically, you promise that all the lanes in mask are either 0 or
+   * ~0. */
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_blendv_pd(a, b, mask);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b),
+      mask_ = simde__m128d_to_private(mask);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i64 = a_.i64 ^ ((a_.i64 ^ b_.i64) & mask_.i64);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i64 = vbslq_s64(mask_.neon_u64, b_.neon_i64, a_.neon_i64);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = a_.i64[i] ^ ((a_.i64[i] ^ b_.i64[i]) & mask_.i64[i]);
+      }
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_add_epi8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_add_epi8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i8 = vaddq_s8(a_.neon_i8, b_.neon_i8);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_i8 = vec_add(a_.altivec_i8, b_.altivec_i8);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i8x16_add(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i8 = a_.i8 + b_.i8;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = a_.i8[i] + b_.i8[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_add_epi8(a, b) simde_mm_add_epi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_add_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_add_epi16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i16 = vaddq_s16(a_.neon_i16, b_.neon_i16);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_i16 = vec_add(a_.altivec_i16, b_.altivec_i16);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i16x8_add(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i16 = a_.i16 + b_.i16;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = a_.i16[i] + b_.i16[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_add_epi16(a, b) simde_mm_add_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_add_epi32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_add_epi32(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vaddq_s32(a_.neon_i32, b_.neon_i32);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_i32 = vec_add(a_.altivec_i32, b_.altivec_i32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i32x4_add(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32 = a_.i32 + b_.i32;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = a_.i32[i] + b_.i32[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_add_epi32(a, b) simde_mm_add_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_add_epi64 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_add_epi64(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i64 = vaddq_s64(a_.neon_i64, b_.neon_i64);
+    #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE)
+      r_.altivec_i64 = vec_add(a_.altivec_i64, b_.altivec_i64);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i64x2_add(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i64 = a_.i64 + b_.i64;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = a_.i64[i] + b_.i64[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_add_epi64(a, b) simde_mm_add_epi64(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_add_pd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_add_pd(a, b);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f64 = vaddq_f64(a_.neon_f64, b_.neon_f64);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f64x2_add(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
+      r_.altivec_f64 = vec_add(a_.altivec_f64, b_.altivec_f64);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f64x2_add(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.f64 = a_.f64 + b_.f64;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = a_.f64[i] + b_.f64[i];
+      }
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_add_pd(a, b) simde_mm_add_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_move_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_move_sd(a, b);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f64 = vsetq_lane_f64(vgetq_lane_f64(b_.neon_f64, 0), a_.neon_f64, 0);
+    #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
+      #if defined(HEDLEY_IBM_VERSION)
+        r_.altivec_f64 = vec_xxpermdi(a_.altivec_f64, b_.altivec_f64, 1);
+      #else
+        r_.altivec_f64 = vec_xxpermdi(b_.altivec_f64, a_.altivec_f64, 1);
+      #endif
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i64x2_shuffle(a_.wasm_v128, b_.wasm_v128, 2, 1);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.f64 = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.f64, b_.f64, 2, 1);
+    #else
+      r_.f64[0] = b_.f64[0];
+      r_.f64[1] = a_.f64[1];
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_move_sd(a, b) simde_mm_move_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_x_mm_broadcastlow_pd(simde__m128d a) {
+  /* This function broadcasts the first element in the input vector to
+   * all lanes.  It is used to avoid generating spurious exceptions in
+   * *_sd functions since there may be garbage in the upper lanes. */
+
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_castsi128_pd(_mm_shuffle_epi32(_mm_castpd_si128(a), 0x44));
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f64 = vdupq_laneq_f64(a_.neon_f64, 0);
+    #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
+      r_.altivec_f64 = vec_splat(a_.altivec_f64, 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f64x2_splat(a_.f64[0]);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.f64 = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.f64, a_.f64, 0, 0);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = a_.f64[0];
+      }
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_add_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_add_sd(a, b);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+    return simde_mm_move_sd(a, simde_mm_add_pd(a, b));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_sd(a, simde_mm_add_pd(simde_x_mm_broadcastlow_pd(a), simde_x_mm_broadcastlow_pd(b)));
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    r_.f64[0] = a_.f64[0] + b_.f64[0];
+    r_.f64[1] = a_.f64[1];
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_add_sd(a, b) simde_mm_add_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_add_si64 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_add_si64(a, b);
+  #else
+    simde__m64_private
+      r_,
+      a_ = simde__m64_to_private(a),
+      b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i64 = vadd_s64(a_.neon_i64, b_.neon_i64);
+    #else
+      r_.i64[0] = a_.i64[0] + b_.i64[0];
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_add_si64(a, b) simde_mm_add_si64(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_adds_epi8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_adds_epi8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i8 = vqaddq_s8(a_.neon_i8, b_.neon_i8);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i8x16_add_sat(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_i8 = vec_adds(a_.altivec_i8, b_.altivec_i8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = simde_math_adds_i8(a_.i8[i], b_.i8[i]);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_adds_epi8(a, b) simde_mm_adds_epi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_adds_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_adds_epi16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i16 = vqaddq_s16(a_.neon_i16, b_.neon_i16);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i16x8_add_sat(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_i16 = vec_adds(a_.altivec_i16, b_.altivec_i16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = simde_math_adds_i16(a_.i16[i], b_.i16[i]);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_adds_epi16(a, b) simde_mm_adds_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_adds_epu8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_adds_epu8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u8 = vqaddq_u8(a_.neon_u8, b_.neon_u8);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_u8x16_add_sat(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
+      r_.altivec_u8 = vec_adds(a_.altivec_u8, b_.altivec_u8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+        r_.u8[i] = simde_math_adds_u8(a_.u8[i], b_.u8[i]);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_adds_epu8(a, b) simde_mm_adds_epu8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_adds_epu16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_adds_epu16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u16 = vqaddq_u16(a_.neon_u16, b_.neon_u16);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_u16x8_add_sat(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_u16 = vec_adds(a_.altivec_u16, b_.altivec_u16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+        r_.u16[i] = simde_math_adds_u16(a_.u16[i], b_.u16[i]);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_adds_epu16(a, b) simde_mm_adds_epu16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_and_pd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_and_pd(a, b);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vandq_s32(a_.neon_i32, b_.neon_i32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_v128_and(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
+      r_.altivec_f64 = vec_and(a_.altivec_f64, b_.altivec_f64);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32f = a_.i32f & b_.i32f;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) {
+        r_.i32f[i] = a_.i32f[i] & b_.i32f[i];
+      }
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_and_pd(a, b) simde_mm_and_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_and_si128 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_and_si128(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vandq_s32(b_.neon_i32, a_.neon_i32);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_u32f = vec_and(a_.altivec_u32f, b_.altivec_u32f);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_v128_and(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32f = a_.i32f & b_.i32f;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) {
+        r_.i32f[i] = a_.i32f[i] & b_.i32f[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_and_si128(a, b) simde_mm_and_si128(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_andnot_pd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_andnot_pd(a, b);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vbicq_s32(b_.neon_i32, a_.neon_i32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_v128_andnot(b_.wasm_v128, a_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_f64 = vec_andc(b_.altivec_f64, a_.altivec_f64);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_i32f = vec_andc(b_.altivec_i32f, a_.altivec_i32f);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32f = ~a_.i32f & b_.i32f;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
+        r_.u64[i] = ~a_.u64[i] & b_.u64[i];
+      }
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_andnot_pd(a, b) simde_mm_andnot_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_andnot_si128 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_andnot_si128(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vbicq_s32(b_.neon_i32, a_.neon_i32);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_i32 = vec_andc(b_.altivec_i32, a_.altivec_i32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_v128_andnot(b_.wasm_v128, a_.wasm_v128);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32f = ~a_.i32f & b_.i32f;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) {
+        r_.i32f[i] = ~(a_.i32f[i]) & b_.i32f[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_andnot_si128(a, b) simde_mm_andnot_si128(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_xor_pd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_xor_pd(a, b);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32f = a_.i32f ^ b_.i32f;
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_v128_xor(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i64 = veorq_s64(a_.neon_i64, b_.neon_i64);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) {
+        r_.i32f[i] = a_.i32f[i] ^ b_.i32f[i];
+      }
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_xor_pd(a, b) simde_mm_xor_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_avg_epu8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_avg_epu8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u8 = vrhaddq_u8(b_.neon_u8, a_.neon_u8);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_u8x16_avgr(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_u8 = vec_avg(a_.altivec_u8, b_.altivec_u8);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && defined(SIMDE_CONVERT_VECTOR_)
+      uint16_t wa SIMDE_VECTOR(32);
+      uint16_t wb SIMDE_VECTOR(32);
+      uint16_t wr SIMDE_VECTOR(32);
+      SIMDE_CONVERT_VECTOR_(wa, a_.u8);
+      SIMDE_CONVERT_VECTOR_(wb, b_.u8);
+      wr = (wa + wb + 1) >> 1;
+      SIMDE_CONVERT_VECTOR_(r_.u8, wr);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+        r_.u8[i] = (a_.u8[i] + b_.u8[i] + 1) >> 1;
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_avg_epu8(a, b) simde_mm_avg_epu8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_avg_epu16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_avg_epu16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u16 = vrhaddq_u16(b_.neon_u16, a_.neon_u16);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_u16x8_avgr(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_u16 = vec_avg(a_.altivec_u16, b_.altivec_u16);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && defined(SIMDE_CONVERT_VECTOR_)
+      uint32_t wa SIMDE_VECTOR(32);
+      uint32_t wb SIMDE_VECTOR(32);
+      uint32_t wr SIMDE_VECTOR(32);
+      SIMDE_CONVERT_VECTOR_(wa, a_.u16);
+      SIMDE_CONVERT_VECTOR_(wb, b_.u16);
+      wr = (wa + wb + 1) >> 1;
+      SIMDE_CONVERT_VECTOR_(r_.u16, wr);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+        r_.u16[i] = (a_.u16[i] + b_.u16[i] + 1) >> 1;
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_avg_epu16(a, b) simde_mm_avg_epu16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_setzero_si128 (void) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_setzero_si128();
+  #else
+    simde__m128i_private r_;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vdupq_n_s32(0);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_i32 = vec_splats(HEDLEY_STATIC_CAST(signed int, 0));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i32x4_splat(INT32_C(0));
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT)
+      r_.i32 = __extension__ (__typeof__(r_.i32)) { 0, 0, 0, 0 };
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) {
+        r_.i32f[i] = 0;
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_setzero_si128() (simde_mm_setzero_si128())
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_bslli_si128 (simde__m128i a, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255)  {
+  simde__m128i_private
+    r_,
+    a_ = simde__m128i_to_private(a);
+
+  if (HEDLEY_UNLIKELY((imm8 & ~15))) {
+    return simde_mm_setzero_si128();
+  }
+
+  #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) && defined(SIMDE_ENDIAN_ORDER)
+    r_.altivec_i8 =
+      #if (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE)
+        vec_slo
+      #else /* SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_BIG */
+        vec_sro
+      #endif
+        (a_.altivec_i8, vec_splats(HEDLEY_STATIC_CAST(unsigned char, imm8 * 8)));
+  #elif defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+    r_.altivec_i8 = vec_srb(a_.altivec_i8, vec_splats(HEDLEY_STATIC_CAST(unsigned char, (imm8 & 15) << 3)));
+  #elif defined(SIMDE_HAVE_INT128_) && (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE)
+    r_.u128[0] = a_.u128[0] << (imm8 * 8);
+  #else
+    r_ = simde__m128i_to_private(simde_mm_setzero_si128());
+    for (int i = imm8 ; i < HEDLEY_STATIC_CAST(int, sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+      r_.i8[i] = a_.i8[i - imm8];
+    }
+  #endif
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_SSE2_NATIVE) && !defined(__PGI)
+  #define simde_mm_bslli_si128(a, imm8) _mm_slli_si128(a, imm8)
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(__clang__)
+  #define simde_mm_bslli_si128(a, imm8) \
+  simde__m128i_from_neon_i8(((imm8) <= 0) ? simde__m128i_to_neon_i8(a) : (((imm8) > 15) ? (vdupq_n_s8(0)) : (vextq_s8(vdupq_n_s8(0), simde__m128i_to_neon_i8(a), 16 - (imm8)))))
+#elif defined(SIMDE_WASM_SIMD128_NATIVE)
+  #define simde_mm_bslli_si128(a, imm8) __extension__ ({        \
+    simde__m128i_from_wasm_v128(                                \
+      wasm_i8x16_shuffle(wasm_i32x4_splat(INT32_C(0)),          \
+                         simde__m128i_to_wasm_v128((a)),        \
+                         ((imm8)&0xF0) ? 0 : 16 - ((imm8)&0xF), \
+                         ((imm8)&0xF0) ? 0 : 17 - ((imm8)&0xF), \
+                         ((imm8)&0xF0) ? 0 : 18 - ((imm8)&0xF), \
+                         ((imm8)&0xF0) ? 0 : 19 - ((imm8)&0xF), \
+                         ((imm8)&0xF0) ? 0 : 20 - ((imm8)&0xF), \
+                         ((imm8)&0xF0) ? 0 : 21 - ((imm8)&0xF), \
+                         ((imm8)&0xF0) ? 0 : 22 - ((imm8)&0xF), \
+                         ((imm8)&0xF0) ? 0 : 23 - ((imm8)&0xF), \
+                         ((imm8)&0xF0) ? 0 : 24 - ((imm8)&0xF), \
+                         ((imm8)&0xF0) ? 0 : 25 - ((imm8)&0xF), \
+                         ((imm8)&0xF0) ? 0 : 26 - ((imm8)&0xF), \
+                         ((imm8)&0xF0) ? 0 : 27 - ((imm8)&0xF), \
+                         ((imm8)&0xF0) ? 0 : 28 - ((imm8)&0xF), \
+                         ((imm8)&0xF0) ? 0 : 29 - ((imm8)&0xF), \
+                         ((imm8)&0xF0) ? 0 : 30 - ((imm8)&0xF), \
+                         ((imm8)&0xF0) ? 0 : 31 - ((imm8)&0xF))); })
+#elif defined(SIMDE_SHUFFLE_VECTOR_) && !defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) && !defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+  #define simde_mm_bslli_si128(a, imm8) (__extension__ ({ \
+    const simde__m128i_private simde_tmp_a_ = simde__m128i_to_private(a); \
+    const simde__m128i_private simde_tmp_z_ = simde__m128i_to_private(simde_mm_setzero_si128()); \
+    simde__m128i_private simde_tmp_r_; \
+    if (HEDLEY_UNLIKELY(imm8 > 15)) { \
+      simde_tmp_r_ = simde__m128i_to_private(simde_mm_setzero_si128()); \
+    } else { \
+      simde_tmp_r_.i8 = \
+        SIMDE_SHUFFLE_VECTOR_(8, 16, \
+          simde_tmp_z_.i8, \
+          (simde_tmp_a_).i8, \
+          HEDLEY_STATIC_CAST(int8_t, (16 - imm8) & 31), \
+          HEDLEY_STATIC_CAST(int8_t, (17 - imm8) & 31), \
+          HEDLEY_STATIC_CAST(int8_t, (18 - imm8) & 31), \
+          HEDLEY_STATIC_CAST(int8_t, (19 - imm8) & 31), \
+          HEDLEY_STATIC_CAST(int8_t, (20 - imm8) & 31), \
+          HEDLEY_STATIC_CAST(int8_t, (21 - imm8) & 31), \
+          HEDLEY_STATIC_CAST(int8_t, (22 - imm8) & 31), \
+          HEDLEY_STATIC_CAST(int8_t, (23 - imm8) & 31), \
+          HEDLEY_STATIC_CAST(int8_t, (24 - imm8) & 31), \
+          HEDLEY_STATIC_CAST(int8_t, (25 - imm8) & 31), \
+          HEDLEY_STATIC_CAST(int8_t, (26 - imm8) & 31), \
+          HEDLEY_STATIC_CAST(int8_t, (27 - imm8) & 31), \
+          HEDLEY_STATIC_CAST(int8_t, (28 - imm8) & 31), \
+          HEDLEY_STATIC_CAST(int8_t, (29 - imm8) & 31), \
+          HEDLEY_STATIC_CAST(int8_t, (30 - imm8) & 31), \
+          HEDLEY_STATIC_CAST(int8_t, (31 - imm8) & 31)); \
+    } \
+    simde__m128i_from_private(simde_tmp_r_); }))
+#endif
+#define simde_mm_slli_si128(a, imm8) simde_mm_bslli_si128(a, imm8)
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_bslli_si128(a, imm8) simde_mm_bslli_si128(a, imm8)
+  #define _mm_slli_si128(a, imm8) simde_mm_bslli_si128(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_bsrli_si128 (simde__m128i a, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255)  {
+  simde__m128i_private
+    r_,
+    a_ = simde__m128i_to_private(a);
+
+  if (HEDLEY_UNLIKELY((imm8 & ~15))) {
+    return simde_mm_setzero_si128();
+  }
+
+  #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) && defined(SIMDE_ENDIAN_ORDER)
+    r_.altivec_i8 =
+    #if (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE)
+      vec_sro
+    #else /* SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_BIG */
+      vec_slo
+    #endif
+        (a_.altivec_i8, vec_splats(HEDLEY_STATIC_CAST(unsigned char, imm8 * 8)));
+  #elif defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+    r_.altivec_i8 = vec_slb(a_.altivec_i8, vec_splats(HEDLEY_STATIC_CAST(unsigned char, (imm8 & 15) << 3)));
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+      const int e = HEDLEY_STATIC_CAST(int, i) + imm8;
+      r_.i8[i] = (e < 16) ? a_.i8[e] : 0;
+    }
+  #endif
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_SSE2_NATIVE) && !defined(__PGI)
+  #define simde_mm_bsrli_si128(a, imm8) _mm_srli_si128(a, imm8)
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(__clang__)
+  #define simde_mm_bsrli_si128(a, imm8) \
+  simde__m128i_from_neon_i8(((imm8 < 0) || (imm8 > 15)) ? vdupq_n_s8(0) : (vextq_s8(simde__m128i_to_private(a).neon_i8, vdupq_n_s8(0), ((imm8 & 15) != 0) ? imm8 : (imm8 & 15))))
+#elif defined(SIMDE_WASM_SIMD128_NATIVE)
+  #define simde_mm_bsrli_si128(a, imm8) (__extension__ ({ \
+    const simde__m128i_private simde_tmp_a_ = simde__m128i_to_private(a); \
+    const simde__m128i_private simde_tmp_z_ = simde__m128i_to_private(simde_mm_setzero_si128()); \
+    simde__m128i_private simde_tmp_r_ = simde__m128i_to_private(a); \
+    if (HEDLEY_UNLIKELY(imm8 > 15)) { \
+      simde_tmp_r_ = simde__m128i_to_private(simde_mm_setzero_si128()); \
+    } else { \
+      simde_tmp_r_.wasm_v128 = \
+      wasm_i8x16_shuffle( \
+        simde_tmp_z_.wasm_v128, \
+        simde_tmp_a_.wasm_v128, \
+        HEDLEY_STATIC_CAST(int8_t, (imm8 + 16) & 31), \
+        HEDLEY_STATIC_CAST(int8_t, (imm8 + 17) & 31), \
+        HEDLEY_STATIC_CAST(int8_t, (imm8 + 18) & 31), \
+        HEDLEY_STATIC_CAST(int8_t, (imm8 + 19) & 31), \
+        HEDLEY_STATIC_CAST(int8_t, (imm8 + 20) & 31), \
+        HEDLEY_STATIC_CAST(int8_t, (imm8 + 21) & 31), \
+        HEDLEY_STATIC_CAST(int8_t, (imm8 + 22) & 31), \
+        HEDLEY_STATIC_CAST(int8_t, (imm8 + 23) & 31), \
+        HEDLEY_STATIC_CAST(int8_t, (imm8 + 24) & 31), \
+        HEDLEY_STATIC_CAST(int8_t, (imm8 + 25) & 31), \
+        HEDLEY_STATIC_CAST(int8_t, (imm8 + 26) & 31), \
+        HEDLEY_STATIC_CAST(int8_t, (imm8 + 27) & 31), \
+        HEDLEY_STATIC_CAST(int8_t, (imm8 + 28) & 31), \
+        HEDLEY_STATIC_CAST(int8_t, (imm8 + 29) & 31), \
+        HEDLEY_STATIC_CAST(int8_t, (imm8 + 30) & 31), \
+        HEDLEY_STATIC_CAST(int8_t, (imm8 + 31) & 31)); \
+    } \
+    simde__m128i_from_private(simde_tmp_r_); }))
+#elif defined(SIMDE_SHUFFLE_VECTOR_) && !defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) && !defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+  #define simde_mm_bsrli_si128(a, imm8) (__extension__ ({ \
+    const simde__m128i_private simde_tmp_a_ = simde__m128i_to_private(a); \
+    const simde__m128i_private simde_tmp_z_ = simde__m128i_to_private(simde_mm_setzero_si128()); \
+    simde__m128i_private simde_tmp_r_ = simde__m128i_to_private(a); \
+    if (HEDLEY_UNLIKELY(imm8 > 15)) { \
+      simde_tmp_r_ = simde__m128i_to_private(simde_mm_setzero_si128()); \
+    } else { \
+      simde_tmp_r_.i8 = \
+      SIMDE_SHUFFLE_VECTOR_(8, 16, \
+        simde_tmp_z_.i8, \
+        (simde_tmp_a_).i8, \
+        HEDLEY_STATIC_CAST(int8_t, (imm8 + 16) & 31), \
+        HEDLEY_STATIC_CAST(int8_t, (imm8 + 17) & 31), \
+        HEDLEY_STATIC_CAST(int8_t, (imm8 + 18) & 31), \
+        HEDLEY_STATIC_CAST(int8_t, (imm8 + 19) & 31), \
+        HEDLEY_STATIC_CAST(int8_t, (imm8 + 20) & 31), \
+        HEDLEY_STATIC_CAST(int8_t, (imm8 + 21) & 31), \
+        HEDLEY_STATIC_CAST(int8_t, (imm8 + 22) & 31), \
+        HEDLEY_STATIC_CAST(int8_t, (imm8 + 23) & 31), \
+        HEDLEY_STATIC_CAST(int8_t, (imm8 + 24) & 31), \
+        HEDLEY_STATIC_CAST(int8_t, (imm8 + 25) & 31), \
+        HEDLEY_STATIC_CAST(int8_t, (imm8 + 26) & 31), \
+        HEDLEY_STATIC_CAST(int8_t, (imm8 + 27) & 31), \
+        HEDLEY_STATIC_CAST(int8_t, (imm8 + 28) & 31), \
+        HEDLEY_STATIC_CAST(int8_t, (imm8 + 29) & 31), \
+        HEDLEY_STATIC_CAST(int8_t, (imm8 + 30) & 31), \
+        HEDLEY_STATIC_CAST(int8_t, (imm8 + 31) & 31)); \
+    } \
+    simde__m128i_from_private(simde_tmp_r_); }))
+#endif
+#define simde_mm_srli_si128(a, imm8) simde_mm_bsrli_si128((a), (imm8))
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_bsrli_si128(a, imm8) simde_mm_bsrli_si128((a), (imm8))
+  #define _mm_srli_si128(a, imm8) simde_mm_bsrli_si128((a), (imm8))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_clflush (void const* p) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    _mm_clflush(p);
+  #else
+    (void) p;
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_clflush(p) simde_mm_clflush(p)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_comieq_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_comieq_sd(a, b);
+  #else
+    simde__m128d_private
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      return !!vgetq_lane_u64(vceqq_f64(a_.neon_f64, b_.neon_f64), 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      return wasm_f64x2_extract_lane(a_.wasm_v128, 0) == wasm_f64x2_extract_lane(b_.wasm_v128, 0);
+    #else
+      return a_.f64[0] == b_.f64[0];
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_comieq_sd(a, b) simde_mm_comieq_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_comige_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_comige_sd(a, b);
+  #else
+    simde__m128d_private
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      return !!vgetq_lane_u64(vcgeq_f64(a_.neon_f64, b_.neon_f64), 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      return wasm_f64x2_extract_lane(a_.wasm_v128, 0) >= wasm_f64x2_extract_lane(b_.wasm_v128, 0);
+    #else
+      return a_.f64[0] >= b_.f64[0];
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_comige_sd(a, b) simde_mm_comige_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_comigt_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_comigt_sd(a, b);
+  #else
+    simde__m128d_private
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      return !!vgetq_lane_u64(vcgtq_f64(a_.neon_f64, b_.neon_f64), 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      return wasm_f64x2_extract_lane(a_.wasm_v128, 0) > wasm_f64x2_extract_lane(b_.wasm_v128, 0);
+    #else
+      return a_.f64[0] > b_.f64[0];
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_comigt_sd(a, b) simde_mm_comigt_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_comile_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_comile_sd(a, b);
+  #else
+    simde__m128d_private
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      return !!vgetq_lane_u64(vcleq_f64(a_.neon_f64, b_.neon_f64), 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      return wasm_f64x2_extract_lane(a_.wasm_v128, 0) <= wasm_f64x2_extract_lane(b_.wasm_v128, 0);
+    #else
+      return a_.f64[0] <= b_.f64[0];
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_comile_sd(a, b) simde_mm_comile_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_comilt_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_comilt_sd(a, b);
+  #else
+    simde__m128d_private
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      return !!vgetq_lane_u64(vcltq_f64(a_.neon_f64, b_.neon_f64), 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      return wasm_f64x2_extract_lane(a_.wasm_v128, 0) < wasm_f64x2_extract_lane(b_.wasm_v128, 0);
+    #else
+      return a_.f64[0] < b_.f64[0];
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_comilt_sd(a, b) simde_mm_comilt_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_comineq_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_comineq_sd(a, b);
+  #else
+    simde__m128d_private
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      return !vgetq_lane_u64(vceqq_f64(a_.neon_f64, b_.neon_f64), 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      return wasm_f64x2_extract_lane(a_.wasm_v128, 0) != wasm_f64x2_extract_lane(b_.wasm_v128, 0);
+    #else
+      return a_.f64[0] != b_.f64[0];
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_comineq_sd(a, b) simde_mm_comineq_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_x_mm_copysign_pd(simde__m128d dest, simde__m128d src) {
+  simde__m128d_private
+    r_,
+    dest_ = simde__m128d_to_private(dest),
+    src_ = simde__m128d_to_private(src);
+
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      uint64x2_t sign_pos = vreinterpretq_u64_f64(vdupq_n_f64(-SIMDE_FLOAT64_C(0.0)));
+    #else
+      simde_float64 dbl_nz = -SIMDE_FLOAT64_C(0.0);
+      uint64_t u64_nz;
+      simde_memcpy(&u64_nz, &dbl_nz, sizeof(u64_nz));
+      uint64x2_t sign_pos = vdupq_n_u64(u64_nz);
+    #endif
+    r_.neon_u64 = vbslq_u64(sign_pos, src_.neon_u64, dest_.neon_u64);
+  #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
+    #if defined(SIMDE_BUG_VEC_CPSGN_REVERSED_ARGS)
+      r_.altivec_f64 = vec_cpsgn(dest_.altivec_f64, src_.altivec_f64);
+    #else
+      r_.altivec_f64 = vec_cpsgn(src_.altivec_f64, dest_.altivec_f64);
+    #endif
+  #elif defined(simde_math_copysign)
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_copysign(dest_.f64[i], src_.f64[i]);
+    }
+  #else
+    simde__m128d sgnbit = simde_mm_set1_pd(-SIMDE_FLOAT64_C(0.0));
+    return simde_mm_xor_pd(simde_mm_and_pd(sgnbit, src), simde_mm_andnot_pd(sgnbit, dest));
+  #endif
+
+  return simde__m128d_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_x_mm_xorsign_pd(simde__m128d dest, simde__m128d src) {
+  return simde_mm_xor_pd(simde_mm_and_pd(simde_mm_set1_pd(-0.0), src), dest);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_castpd_ps (simde__m128d a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_castpd_ps(a);
+  #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vreinterpretq_f32_f64(a);
+  #else
+    simde__m128 r;
+    simde_memcpy(&r, &a, sizeof(a));
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_castpd_ps(a) simde_mm_castpd_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_castpd_si128 (simde__m128d a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_castpd_si128(a);
+  #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vreinterpretq_s64_f64(a);
+  #else
+    simde__m128i r;
+    simde_memcpy(&r, &a, sizeof(a));
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_castpd_si128(a) simde_mm_castpd_si128(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_castps_pd (simde__m128 a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_castps_pd(a);
+  #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vreinterpretq_f64_f32(a);
+  #else
+    simde__m128d r;
+    simde_memcpy(&r, &a, sizeof(a));
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_castps_pd(a) simde_mm_castps_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_castps_si128 (simde__m128 a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_castps_si128(a);
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return simde__m128i_from_neon_i32(simde__m128_to_private(a).neon_i32);
+  #else
+    simde__m128i r;
+    simde_memcpy(&r, &a, sizeof(a));
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_castps_si128(a) simde_mm_castps_si128(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_castsi128_pd (simde__m128i a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_castsi128_pd(a);
+  #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vreinterpretq_f64_s64(a);
+  #else
+    simde__m128d r;
+    simde_memcpy(&r, &a, sizeof(a));
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_castsi128_pd(a) simde_mm_castsi128_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_castsi128_ps (simde__m128i a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_castsi128_ps(a);
+  #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+    return HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(float), a);
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return simde__m128_from_neon_i32(simde__m128i_to_private(a).neon_i32);
+  #else
+    simde__m128 r;
+    simde_memcpy(&r, &a, sizeof(a));
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_castsi128_ps(a) simde_mm_castsi128_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_cmpeq_epi8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cmpeq_epi8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u8 = vceqq_s8(b_.neon_i8, a_.neon_i8);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i8x16_eq(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_i8 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed char), vec_cmpeq(a_.altivec_i8, b_.altivec_i8));
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i8 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i8), (a_.i8 == b_.i8));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = (a_.i8[i] == b_.i8[i]) ? ~INT8_C(0) : INT8_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmpeq_epi8(a, b) simde_mm_cmpeq_epi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_cmpeq_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cmpeq_epi16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u16 = vceqq_s16(b_.neon_i16, a_.neon_i16);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i16x8_eq(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_i16 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed short), vec_cmpeq(a_.altivec_i16, b_.altivec_i16));
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i16 = (a_.i16 == b_.i16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = (a_.i16[i] == b_.i16[i]) ? ~INT16_C(0) : INT16_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmpeq_epi16(a, b) simde_mm_cmpeq_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_cmpeq_epi32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cmpeq_epi32(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vceqq_s32(b_.neon_i32, a_.neon_i32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i32x4_eq(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_i32 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed int), vec_cmpeq(a_.altivec_i32, b_.altivec_i32));
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), a_.i32 == b_.i32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = (a_.i32[i] == b_.i32[i]) ? ~INT32_C(0) : INT32_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmpeq_epi32(a, b) simde_mm_cmpeq_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cmpeq_pd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cmpeq_pd(a, b);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_u64 = vceqq_f64(b_.neon_f64, a_.neon_f64);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f64x2_eq(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_f64 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(double), vec_cmpeq(a_.altivec_f64, b_.altivec_f64));
+    #elif defined(SIMDE_MIPS_MSA_NATIVE)
+      r_.msa_i32 = __msa_addv_w(a_.msa_i32, b_.msa_i32);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), (a_.f64 == b_.f64));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.u64[i] = (a_.f64[i] == b_.f64[i]) ? ~UINT64_C(0) : UINT64_C(0);
+      }
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmpeq_pd(a, b) simde_mm_cmpeq_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cmpeq_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cmpeq_sd(a, b);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+    return simde_mm_move_sd(a, simde_mm_cmpeq_pd(a, b));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_sd(a, simde_mm_cmpeq_pd(simde_x_mm_broadcastlow_pd(a), simde_x_mm_broadcastlow_pd(b)));
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    r_.u64[0] = (a_.u64[0] == b_.u64[0]) ? ~UINT64_C(0) : 0;
+    r_.u64[1] = a_.u64[1];
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmpeq_sd(a, b) simde_mm_cmpeq_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cmpneq_pd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cmpneq_pd(a, b);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_u32 = vmvnq_u32(vreinterpretq_u32_u64(vceqq_f64(b_.neon_f64, a_.neon_f64)));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f64x2_ne(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), (a_.f64 != b_.f64));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.u64[i] = (a_.f64[i] != b_.f64[i]) ? ~UINT64_C(0) : UINT64_C(0);
+      }
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmpneq_pd(a, b) simde_mm_cmpneq_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cmpneq_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cmpneq_sd(a, b);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+    return simde_mm_move_sd(a, simde_mm_cmpneq_pd(a, b));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_sd(a, simde_mm_cmpneq_pd(simde_x_mm_broadcastlow_pd(a), simde_x_mm_broadcastlow_pd(b)));
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    r_.u64[0] = (a_.f64[0] != b_.f64[0]) ? ~UINT64_C(0) : UINT64_C(0);
+    r_.u64[1] = a_.u64[1];
+
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmpneq_sd(a, b) simde_mm_cmpneq_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_cmplt_epi8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cmplt_epi8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u8 = vcltq_s8(a_.neon_i8, b_.neon_i8);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_i8 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed char),vec_cmplt(a_.altivec_i8, b_.altivec_i8));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i8x16_lt(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i8 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i8), (a_.i8 < b_.i8));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = (a_.i8[i] < b_.i8[i]) ? ~INT8_C(0) : INT8_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmplt_epi8(a, b) simde_mm_cmplt_epi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_cmplt_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cmplt_epi16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u16 = vcltq_s16(a_.neon_i16, b_.neon_i16);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_i16 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed short), vec_cmplt(a_.altivec_i16, b_.altivec_i16));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i16x8_lt(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i16), (a_.i16 < b_.i16));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = (a_.i16[i] < b_.i16[i]) ? ~INT16_C(0) : INT16_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmplt_epi16(a, b) simde_mm_cmplt_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_cmplt_epi32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cmplt_epi32(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vcltq_s32(a_.neon_i32, b_.neon_i32);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_i32 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed int), vec_cmplt(a_.altivec_i32, b_.altivec_i32));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i32x4_lt(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), (a_.i32 < b_.i32));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = (a_.i32[i] < b_.i32[i]) ? ~INT32_C(0) : INT32_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmplt_epi32(a, b) simde_mm_cmplt_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cmplt_pd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cmplt_pd(a, b);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_u64 = vcltq_f64(a_.neon_f64, b_.neon_f64);
+    #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_f64 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(double), vec_cmplt(a_.altivec_f64, b_.altivec_f64));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f64x2_lt(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), (a_.f64 < b_.f64));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.u64[i] = (a_.f64[i] < b_.f64[i]) ? ~UINT64_C(0) : UINT64_C(0);
+      }
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmplt_pd(a, b) simde_mm_cmplt_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cmplt_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cmplt_sd(a, b);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+    return simde_mm_move_sd(a, simde_mm_cmplt_pd(a, b));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_sd(a, simde_mm_cmplt_pd(simde_x_mm_broadcastlow_pd(a), simde_x_mm_broadcastlow_pd(b)));
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    r_.u64[0] = (a_.f64[0] < b_.f64[0]) ? ~UINT64_C(0) : UINT64_C(0);
+    r_.u64[1] = a_.u64[1];
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmplt_sd(a, b) simde_mm_cmplt_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cmple_pd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cmple_pd(a, b);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), (a_.f64 <= b_.f64));
+    #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_u64 = vcleq_f64(a_.neon_f64, b_.neon_f64);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f64x2_le(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_f64 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(double), vec_cmple(a_.altivec_f64, b_.altivec_f64));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.u64[i] = (a_.f64[i] <= b_.f64[i]) ? ~UINT64_C(0) : UINT64_C(0);
+      }
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmple_pd(a, b) simde_mm_cmple_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cmple_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cmple_sd(a, b);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+    return simde_mm_move_sd(a, simde_mm_cmple_pd(a, b));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_sd(a, simde_mm_cmple_pd(simde_x_mm_broadcastlow_pd(a), simde_x_mm_broadcastlow_pd(b)));
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    r_.u64[0] = (a_.f64[0] <= b_.f64[0]) ? ~UINT64_C(0) : UINT64_C(0);
+    r_.u64[1] = a_.u64[1];
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmple_sd(a, b) simde_mm_cmple_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_cmpgt_epi8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cmpgt_epi8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u8 = vcgtq_s8(a_.neon_i8, b_.neon_i8);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i8x16_gt(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_i8 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed char), vec_cmpgt(a_.altivec_i8, b_.altivec_i8));
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i8 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i8), (a_.i8 > b_.i8));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = (a_.i8[i] > b_.i8[i]) ? ~INT8_C(0) : INT8_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmpgt_epi8(a, b) simde_mm_cmpgt_epi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_cmpgt_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cmpgt_epi16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u16 = vcgtq_s16(a_.neon_i16, b_.neon_i16);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i16x8_gt(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_i16 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed short), vec_cmpgt(a_.altivec_i16, b_.altivec_i16));
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i16), (a_.i16 > b_.i16));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = (a_.i16[i] > b_.i16[i]) ? ~INT16_C(0) : INT16_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmpgt_epi16(a, b) simde_mm_cmpgt_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_cmpgt_epi32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cmpgt_epi32(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vcgtq_s32(a_.neon_i32, b_.neon_i32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i32x4_gt(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_i32 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed int), vec_cmpgt(a_.altivec_i32, b_.altivec_i32));
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), (a_.i32 > b_.i32));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = (a_.i32[i] > b_.i32[i]) ? ~INT32_C(0) : INT32_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmpgt_epi32(a, b) simde_mm_cmpgt_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cmpgt_pd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cmpgt_pd(a, b);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), (a_.f64 > b_.f64));
+    #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_u64 = vcgtq_f64(a_.neon_f64, b_.neon_f64);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f64x2_gt(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_f64 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(double), vec_cmpgt(a_.altivec_f64, b_.altivec_f64));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.u64[i] = (a_.f64[i] > b_.f64[i]) ? ~UINT64_C(0) : UINT64_C(0);
+      }
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmpgt_pd(a, b) simde_mm_cmpgt_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cmpgt_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && !defined(__PGI)
+    return _mm_cmpgt_sd(a, b);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+    return simde_mm_move_sd(a, simde_mm_cmpgt_pd(a, b));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_sd(a, simde_mm_cmpgt_pd(simde_x_mm_broadcastlow_pd(a), simde_x_mm_broadcastlow_pd(b)));
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    r_.u64[0] = (a_.f64[0] > b_.f64[0]) ? ~UINT64_C(0) : UINT64_C(0);
+    r_.u64[1] = a_.u64[1];
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmpgt_sd(a, b) simde_mm_cmpgt_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cmpge_pd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cmpge_pd(a, b);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), (a_.f64 >= b_.f64));
+    #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_u64 = vcgeq_f64(a_.neon_f64, b_.neon_f64);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f64x2_ge(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_f64 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(double), vec_cmpge(a_.altivec_f64, b_.altivec_f64));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.u64[i] = (a_.f64[i] >= b_.f64[i]) ? ~UINT64_C(0) : UINT64_C(0);
+      }
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmpge_pd(a, b) simde_mm_cmpge_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cmpge_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && !defined(__PGI)
+    return _mm_cmpge_sd(a, b);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+    return simde_mm_move_sd(a, simde_mm_cmpge_pd(a, b));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_sd(a, simde_mm_cmpge_pd(simde_x_mm_broadcastlow_pd(a), simde_x_mm_broadcastlow_pd(b)));
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    r_.u64[0] = (a_.f64[0] >= b_.f64[0]) ? ~UINT64_C(0) : UINT64_C(0);
+    r_.u64[1] = a_.u64[1];
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmpge_sd(a, b) simde_mm_cmpge_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cmpngt_pd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cmpngt_pd(a, b);
+  #else
+    return simde_mm_cmple_pd(a, b);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmpngt_pd(a, b) simde_mm_cmpngt_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cmpngt_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && !defined(__PGI)
+    return _mm_cmpngt_sd(a, b);
+  #else
+    return simde_mm_cmple_sd(a, b);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmpngt_sd(a, b) simde_mm_cmpngt_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cmpnge_pd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cmpnge_pd(a, b);
+  #else
+    return simde_mm_cmplt_pd(a, b);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmpnge_pd(a, b) simde_mm_cmpnge_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cmpnge_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && !defined(__PGI)
+    return _mm_cmpnge_sd(a, b);
+  #else
+    return simde_mm_cmplt_sd(a, b);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmpnge_sd(a, b) simde_mm_cmpnge_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cmpnlt_pd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cmpnlt_pd(a, b);
+  #else
+    return simde_mm_cmpge_pd(a, b);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmpnlt_pd(a, b) simde_mm_cmpnlt_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cmpnlt_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cmpnlt_sd(a, b);
+  #else
+    return simde_mm_cmpge_sd(a, b);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmpnlt_sd(a, b) simde_mm_cmpnlt_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cmpnle_pd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cmpnle_pd(a, b);
+  #else
+    return simde_mm_cmpgt_pd(a, b);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmpnle_pd(a, b) simde_mm_cmpnle_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cmpnle_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cmpnle_sd(a, b);
+  #else
+    return simde_mm_cmpgt_sd(a, b);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmpnle_sd(a, b) simde_mm_cmpnle_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cmpord_pd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cmpord_pd(a, b);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      /* Note: NEON does not have ordered compare builtin
+        Need to compare a eq a and b eq b to check for NaN
+        Do AND of results to get final */
+      uint64x2_t ceqaa = vceqq_f64(a_.neon_f64, a_.neon_f64);
+      uint64x2_t ceqbb = vceqq_f64(b_.neon_f64, b_.neon_f64);
+      r_.neon_u64 = vandq_u64(ceqaa, ceqbb);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_v128_and(wasm_f64x2_eq(a_.wasm_v128, a_.wasm_v128),
+                                   wasm_f64x2_eq(b_.wasm_v128, b_.wasm_v128));
+    #elif defined(simde_math_isnan)
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.u64[i] = (!simde_math_isnan(a_.f64[i]) && !simde_math_isnan(b_.f64[i])) ? ~UINT64_C(0) : UINT64_C(0);
+      }
+    #else
+      HEDLEY_UNREACHABLE();
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmpord_pd(a, b) simde_mm_cmpord_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float64
+simde_mm_cvtsd_f64 (simde__m128d a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && !defined(__PGI)
+    return _mm_cvtsd_f64(a);
+  #else
+    simde__m128d_private a_ = simde__m128d_to_private(a);
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      return HEDLEY_STATIC_CAST(simde_float64, vgetq_lane_f64(a_.neon_f64, 0));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      return HEDLEY_STATIC_CAST(simde_float64, wasm_f64x2_extract_lane(a_.wasm_v128, 0));
+    #else
+      return a_.f64[0];
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cvtsd_f64(a) simde_mm_cvtsd_f64(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cmpord_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cmpord_sd(a, b);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+    return simde_mm_move_sd(a, simde_mm_cmpord_pd(a, b));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_sd(a, simde_mm_cmpord_pd(simde_x_mm_broadcastlow_pd(a), simde_x_mm_broadcastlow_pd(b)));
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(simde_math_isnan)
+      r_.u64[0] = (!simde_math_isnan(a_.f64[0]) && !simde_math_isnan(b_.f64[0])) ? ~UINT64_C(0) : UINT64_C(0);
+      r_.u64[1] = a_.u64[1];
+    #else
+      HEDLEY_UNREACHABLE();
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmpord_sd(a, b) simde_mm_cmpord_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cmpunord_pd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cmpunord_pd(a, b);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      uint64x2_t ceqaa = vceqq_f64(a_.neon_f64, a_.neon_f64);
+      uint64x2_t ceqbb = vceqq_f64(b_.neon_f64, b_.neon_f64);
+      r_.neon_u64 = vreinterpretq_u64_u32(vmvnq_u32(vreinterpretq_u32_u64(vandq_u64(ceqaa, ceqbb))));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_v128_or(wasm_f64x2_ne(a_.wasm_v128, a_.wasm_v128),
+                                  wasm_f64x2_ne(b_.wasm_v128, b_.wasm_v128));
+    #elif defined(simde_math_isnan)
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.u64[i] = (simde_math_isnan(a_.f64[i]) || simde_math_isnan(b_.f64[i])) ? ~UINT64_C(0) : UINT64_C(0);
+      }
+    #else
+      HEDLEY_UNREACHABLE();
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmpunord_pd(a, b) simde_mm_cmpunord_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cmpunord_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cmpunord_sd(a, b);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+    return simde_mm_move_sd(a, simde_mm_cmpunord_pd(a, b));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_sd(a, simde_mm_cmpunord_pd(simde_x_mm_broadcastlow_pd(a), simde_x_mm_broadcastlow_pd(b)));
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(simde_math_isnan)
+      r_.u64[0] = (simde_math_isnan(a_.f64[0]) || simde_math_isnan(b_.f64[0])) ? ~UINT64_C(0) : UINT64_C(0);
+      r_.u64[1] = a_.u64[1];
+    #else
+      HEDLEY_UNREACHABLE();
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmpunord_sd(a, b) simde_mm_cmpunord_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cvtepi32_pd (simde__m128i a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cvtepi32_pd(a);
+  #else
+    simde__m128d_private r_;
+    simde__m128i_private a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f64x2_convert_low_i32x4(a_.wasm_v128);
+    #elif defined(SIMDE_CONVERT_VECTOR_)
+      SIMDE_CONVERT_VECTOR_(r_.f64, a_.m64_private[0].i32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = (simde_float64) a_.i32[i];
+      }
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cvtepi32_pd(a) simde_mm_cvtepi32_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cvtepi32_ps (simde__m128i a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cvtepi32_ps(a);
+  #else
+    simde__m128_private r_;
+    simde__m128i_private a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_f32 = vcvtq_f32_s32(a_.neon_i32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f32x4_convert_i32x4(a_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      HEDLEY_DIAGNOSTIC_PUSH
+      #if HEDLEY_HAS_WARNING("-Wc11-extensions")
+        // #pragma clang diagnostic ignored "-Wc11-extensions"
+      #endif
+      r_.altivec_f32 = vec_ctf(a_.altivec_i32, 0);
+      HEDLEY_DIAGNOSTIC_POP
+    #elif defined(SIMDE_CONVERT_VECTOR_)
+      SIMDE_CONVERT_VECTOR_(r_.f32, a_.i32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = (simde_float32) a_.i32[i];
+      }
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cvtepi32_ps(a) simde_mm_cvtepi32_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_cvtpd_pi32 (simde__m128d a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_cvtpd_pi32(a);
+  #else
+    simde__m64_private r_;
+    simde__m128d_private a_ = simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+      simde_float64 v = simde_math_round(a_.f64[i]);
+      #if defined(SIMDE_FAST_CONVERSION_RANGE)
+        r_.i32[i] = SIMDE_CONVERT_FTOI(int32_t, v);
+      #else
+        r_.i32[i] = ((v > HEDLEY_STATIC_CAST(simde_float64, INT32_MIN)) && (v < HEDLEY_STATIC_CAST(simde_float64, INT32_MAX))) ?
+          SIMDE_CONVERT_FTOI(int32_t, v) : INT32_MIN;
+      #endif
+    }
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cvtpd_pi32(a) simde_mm_cvtpd_pi32(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_cvtpd_epi32 (simde__m128d a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && !defined(SIMDE_BUG_PGI_30107)
+    return _mm_cvtpd_epi32(a);
+  #else
+    simde__m128i_private r_;
+
+    r_.m64[0] = simde_mm_cvtpd_pi32(a);
+    r_.m64[1] = simde_mm_setzero_si64();
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cvtpd_epi32(a) simde_mm_cvtpd_epi32(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cvtpd_ps (simde__m128d a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cvtpd_ps(a);
+  #else
+    simde__m128_private r_;
+    simde__m128d_private a_ = simde__m128d_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f32 = vcombine_f32(vcvt_f32_f64(a_.neon_f64), vdup_n_f32(0.0f));
+    #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
+      r_.altivec_f32 = vec_float2(a_.altivec_f64, vec_splats(0.0));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f32x4_demote_f64x2_zero(a_.wasm_v128);
+    #elif HEDLEY_HAS_BUILTIN(__builtin_shufflevector) && HEDLEY_HAS_BUILTIN(__builtin_convertvector)
+      float __attribute__((__vector_size__(8))) z = { 0.0f, 0.0f };
+      r_.f32 =
+        __builtin_shufflevector(
+          __builtin_convertvector(__builtin_shufflevector(a_.f64, a_.f64, 0, 1), __typeof__(z)), z,
+          0, 1, 2, 3
+        );
+    #else
+      r_.f32[0] = HEDLEY_STATIC_CAST(simde_float32, a_.f64[0]);
+      r_.f32[1] = HEDLEY_STATIC_CAST(simde_float32, a_.f64[1]);
+      r_.f32[2] = SIMDE_FLOAT32_C(0.0);
+      r_.f32[3] = SIMDE_FLOAT32_C(0.0);
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cvtpd_ps(a) simde_mm_cvtpd_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cvtpi32_pd (simde__m64 a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_cvtpi32_pd(a);
+  #else
+    simde__m128d_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+
+    #if defined(SIMDE_CONVERT_VECTOR_)
+      SIMDE_CONVERT_VECTOR_(r_.f64, a_.i32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = (simde_float64) a_.i32[i];
+      }
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cvtpi32_pd(a) simde_mm_cvtpi32_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_cvtps_epi32 (simde__m128 a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cvtps_epi32(a);
+  #else
+    simde__m128i_private r_;
+    simde__m128_private a_;
+
+    #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_FAST_CONVERSION_RANGE) && defined(SIMDE_FAST_ROUND_TIES) && !defined(SIMDE_BUG_GCC_95399)
+      a_ = simde__m128_to_private(a);
+      r_.neon_i32 = vcvtnq_s32_f32(a_.neon_f32);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) && defined(SIMDE_FAST_CONVERSION_RANGE) && defined(SIMDE_FAST_ROUND_TIES)
+      a_ = simde__m128_to_private(a);
+      HEDLEY_DIAGNOSTIC_PUSH
+      SIMDE_DIAGNOSTIC_DISABLE_C11_EXTENSIONS_
+      SIMDE_DIAGNOSTIC_DISABLE_VECTOR_CONVERSION_
+      r_.altivec_i32 = vec_cts(a_.altivec_f32, 1);
+      HEDLEY_DIAGNOSTIC_POP
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE) && defined(SIMDE_FAST_CONVERSION_RANGE) && defined(SIMDE_FAST_ROUND_TIES)
+      a_ = simde__m128_to_private(a);
+      r_.wasm_v128 = wasm_i32x4_trunc_sat_f32x4(a_.wasm_v128);
+    #else
+      a_ = simde__m128_to_private(simde_x_mm_round_ps(a, SIMDE_MM_FROUND_TO_NEAREST_INT, 1));
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        simde_float32 v = simde_math_roundf(a_.f32[i]);
+        #if defined(SIMDE_FAST_CONVERSION_RANGE)
+          r_.i32[i] = SIMDE_CONVERT_FTOI(int32_t, v);
+        #else
+          r_.i32[i] = ((v > HEDLEY_STATIC_CAST(simde_float32, INT32_MIN)) && (v < HEDLEY_STATIC_CAST(simde_float32, INT32_MAX))) ?
+            SIMDE_CONVERT_FTOI(int32_t, v) : INT32_MIN;
+        #endif
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cvtps_epi32(a) simde_mm_cvtps_epi32(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cvtps_pd (simde__m128 a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cvtps_pd(a);
+  #else
+    simde__m128d_private r_;
+    simde__m128_private a_ = simde__m128_to_private(a);
+
+    #if defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f64x2_promote_low_f32x4(a_.wasm_v128);
+    #elif defined(SIMDE_CONVERT_VECTOR_)
+      SIMDE_CONVERT_VECTOR_(r_.f64, a_.m64_private[0].f32);
+    #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f64 = vcvt_f64_f32(vget_low_f32(a_.neon_f32));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = a_.f32[i];
+      }
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cvtps_pd(a) simde_mm_cvtps_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int32_t
+simde_mm_cvtsd_si32 (simde__m128d a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cvtsd_si32(a);
+  #else
+    simde__m128d_private a_ = simde__m128d_to_private(a);
+
+    simde_float64 v = simde_math_round(a_.f64[0]);
+    #if defined(SIMDE_FAST_CONVERSION_RANGE)
+      return SIMDE_CONVERT_FTOI(int32_t, v);
+    #else
+      return ((v > HEDLEY_STATIC_CAST(simde_float64, INT32_MIN)) && (v < HEDLEY_STATIC_CAST(simde_float64, INT32_MAX))) ?
+        SIMDE_CONVERT_FTOI(int32_t, v) : INT32_MIN;
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cvtsd_si32(a) simde_mm_cvtsd_si32(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int64_t
+simde_mm_cvtsd_si64 (simde__m128d a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_ARCH_AMD64)
+    #if defined(__PGI)
+      return _mm_cvtsd_si64x(a);
+    #else
+      return _mm_cvtsd_si64(a);
+    #endif
+  #else
+    simde__m128d_private a_ = simde__m128d_to_private(a);
+    return SIMDE_CONVERT_FTOI(int64_t, simde_math_round(a_.f64[0]));
+  #endif
+}
+#define simde_mm_cvtsd_si64x(a) simde_mm_cvtsd_si64(a)
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARCH_AMD64))
+  #define _mm_cvtsd_si64(a) simde_mm_cvtsd_si64(a)
+  #define _mm_cvtsd_si64x(a) simde_mm_cvtsd_si64x(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cvtsd_ss (simde__m128 a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cvtsd_ss(a, b);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+    simde__m128d_private b_ = simde__m128d_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f32 = vsetq_lane_f32(vcvtxd_f32_f64(vgetq_lane_f64(b_.neon_f64, 0)), a_.neon_f32, 0);
+    #else
+      r_.f32[0] = HEDLEY_STATIC_CAST(simde_float32, b_.f64[0]);
+
+      SIMDE_VECTORIZE
+      for (size_t i = 1 ; i < (sizeof(r_) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = a_.i32[i];
+      }
+    #endif
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cvtsd_ss(a, b) simde_mm_cvtsd_ss(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int16_t
+simde_x_mm_cvtsi128_si16 (simde__m128i a) {
+  simde__m128i_private
+    a_ = simde__m128i_to_private(a);
+
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vgetq_lane_s16(a_.neon_i16, 0);
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    return HEDLEY_STATIC_CAST(int16_t, wasm_i16x8_extract_lane(a_.wasm_v128, 0));
+  #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+    #if defined(SIMDE_BUG_GCC_95227)
+      (void) a_;
+    #endif
+    return vec_extract(a_.altivec_i16, 0);
+  #else
+    return a_.i16[0];
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+int32_t
+simde_mm_cvtsi128_si32 (simde__m128i a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cvtsi128_si32(a);
+  #else
+    simde__m128i_private
+      a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      return vgetq_lane_s32(a_.neon_i32, 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      return HEDLEY_STATIC_CAST(int32_t, wasm_i32x4_extract_lane(a_.wasm_v128, 0));
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      #if defined(SIMDE_BUG_GCC_95227)
+        (void) a_;
+      #endif
+      return vec_extract(a_.altivec_i32, 0);
+    #else
+      return a_.i32[0];
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cvtsi128_si32(a) simde_mm_cvtsi128_si32(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int64_t
+simde_mm_cvtsi128_si64 (simde__m128i a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_ARCH_AMD64)
+    #if defined(__PGI)
+      return _mm_cvtsi128_si64x(a);
+    #else
+      return _mm_cvtsi128_si64(a);
+    #endif
+  #else
+    simde__m128i_private a_ = simde__m128i_to_private(a);
+  #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) && !defined(HEDLEY_IBM_VERSION)
+    return vec_extract(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed long long), a_.i64), 0);
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vgetq_lane_s64(a_.neon_i64, 0);
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    return HEDLEY_STATIC_CAST(int64_t, wasm_i64x2_extract_lane(a_.wasm_v128, 0));
+  #endif
+    return a_.i64[0];
+  #endif
+}
+#define simde_mm_cvtsi128_si64x(a) simde_mm_cvtsi128_si64(a)
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARCH_AMD64))
+  #define _mm_cvtsi128_si64(a) simde_mm_cvtsi128_si64(a)
+  #define _mm_cvtsi128_si64x(a) simde_mm_cvtsi128_si64x(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cvtsi32_sd (simde__m128d a, int32_t b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cvtsi32_sd(a, b);
+  #else
+    simde__m128d_private r_;
+    simde__m128d_private a_ = simde__m128d_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f64 = vsetq_lane_f64(HEDLEY_STATIC_CAST(float64_t, b), a_.neon_f64, 0);
+    #else
+      r_.f64[0] = HEDLEY_STATIC_CAST(simde_float64, b);
+      r_.i64[1] = a_.i64[1];
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cvtsi32_sd(a, b) simde_mm_cvtsi32_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_x_mm_cvtsi16_si128 (int16_t a) {
+  simde__m128i_private r_;
+
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    r_.neon_i16 = vsetq_lane_s16(a, vdupq_n_s16(0), 0);
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    r_.wasm_v128 = wasm_i16x8_make(a, 0, 0, 0, 0, 0, 0, 0);
+  #else
+    r_.i16[0] = a;
+    r_.i16[1] = 0;
+    r_.i16[2] = 0;
+    r_.i16[3] = 0;
+    r_.i16[4] = 0;
+    r_.i16[5] = 0;
+    r_.i16[6] = 0;
+    r_.i16[7] = 0;
+  #endif
+
+  return simde__m128i_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_cvtsi32_si128 (int32_t a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cvtsi32_si128(a);
+  #else
+    simde__m128i_private r_;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vsetq_lane_s32(a, vdupq_n_s32(0), 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i32x4_make(a, 0, 0, 0);
+    #else
+      r_.i32[0] = a;
+      r_.i32[1] = 0;
+      r_.i32[2] = 0;
+      r_.i32[3] = 0;
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cvtsi32_si128(a) simde_mm_cvtsi32_si128(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cvtsi64_sd (simde__m128d a, int64_t b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_ARCH_AMD64)
+    #if !defined(__PGI)
+      return _mm_cvtsi64_sd(a, b);
+    #else
+      return _mm_cvtsi64x_sd(a, b);
+    #endif
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f64 = vsetq_lane_f64(HEDLEY_STATIC_CAST(float64_t, b), a_.neon_f64, 0);
+    #else
+      r_.f64[0] = HEDLEY_STATIC_CAST(simde_float64, b);
+      r_.f64[1] = a_.f64[1];
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#define simde_mm_cvtsi64x_sd(a, b) simde_mm_cvtsi64_sd(a, b)
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARCH_AMD64))
+  #define _mm_cvtsi64_sd(a, b) simde_mm_cvtsi64_sd(a, b)
+  #define _mm_cvtsi64x_sd(a, b) simde_mm_cvtsi64x_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_cvtsi64_si128 (int64_t a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_ARCH_AMD64)
+    #if !defined(__PGI)
+      return _mm_cvtsi64_si128(a);
+    #else
+      return _mm_cvtsi64x_si128(a);
+    #endif
+  #else
+    simde__m128i_private r_;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i64 = vsetq_lane_s64(a, vdupq_n_s64(0), 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i64x2_make(a, 0);
+    #else
+      r_.i64[0] = a;
+      r_.i64[1] = 0;
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#define simde_mm_cvtsi64x_si128(a) simde_mm_cvtsi64_si128(a)
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARCH_AMD64))
+  #define _mm_cvtsi64_si128(a) simde_mm_cvtsi64_si128(a)
+  #define _mm_cvtsi64x_si128(a) simde_mm_cvtsi64x_si128(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cvtss_sd (simde__m128d a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cvtss_sd(a, b);
+  #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    float64x2_t temp = vcvt_f64_f32(vset_lane_f32(vgetq_lane_f32(simde__m128_to_private(b).neon_f32, 0), vdup_n_f32(0), 0));
+    return vsetq_lane_f64(vgetq_lane_f64(simde__m128d_to_private(a).neon_f64, 1), temp, 1);
+  #else
+    simde__m128d_private
+      a_ = simde__m128d_to_private(a);
+    simde__m128_private b_ = simde__m128_to_private(b);
+
+    a_.f64[0] = HEDLEY_STATIC_CAST(simde_float64, b_.f32[0]);
+
+    return simde__m128d_from_private(a_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cvtss_sd(a, b) simde_mm_cvtss_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_cvttpd_pi32 (simde__m128d a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_cvttpd_pi32(a);
+  #else
+    simde__m64_private r_;
+    simde__m128d_private a_ = simde__m128d_to_private(a);
+
+    #if defined(SIMDE_CONVERT_VECTOR_) && defined(SIMDE_FAST_CONVERSION_RANGE)
+      SIMDE_CONVERT_VECTOR_(r_.i32, a_.f64);
+    #else
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        simde_float64 v = a_.f64[i];
+        #if defined(SIMDE_FAST_CONVERSION_RANGE)
+          r_.i32[i] = SIMDE_CONVERT_FTOI(int32_t, v);
+        #else
+          r_.i32[i] = ((v > HEDLEY_STATIC_CAST(simde_float64, INT32_MIN)) && (v < HEDLEY_STATIC_CAST(simde_float64, INT32_MAX))) ?
+            SIMDE_CONVERT_FTOI(int32_t, v) : INT32_MIN;
+        #endif
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cvttpd_pi32(a) simde_mm_cvttpd_pi32(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_cvttpd_epi32 (simde__m128d a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cvttpd_epi32(a);
+  #else
+    simde__m128i_private r_;
+
+    r_.m64[0] = simde_mm_cvttpd_pi32(a);
+    r_.m64[1] = simde_mm_setzero_si64();
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cvttpd_epi32(a) simde_mm_cvttpd_epi32(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_cvttps_epi32 (simde__m128 a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cvttps_epi32(a);
+  #else
+    simde__m128i_private r_;
+    simde__m128_private a_ = simde__m128_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vcvtq_s32_f32(a_.neon_f32);
+
+      #if !defined(SIMDE_FAST_CONVERSION_RANGE) || !defined(SIMDE_FAST_NANS)
+        /* Values below INT32_MIN saturate anyways, so we don't need to
+         * test for that. */
+        #if !defined(SIMDE_FAST_CONVERSION_RANGE) && !defined(SIMDE_FAST_NANS)
+          uint32x4_t valid_input =
+            vandq_u32(
+              vcltq_f32(a_.neon_f32, vdupq_n_f32(SIMDE_FLOAT32_C(2147483648.0))),
+              vceqq_f32(a_.neon_f32, a_.neon_f32)
+            );
+        #elif !defined(SIMDE_FAST_CONVERSION_RANGE)
+          uint32x4_t valid_input = vcltq_f32(a_.neon_f32, vdupq_n_f32(SIMDE_FLOAT32_C(2147483648.0)));
+        #elif !defined(SIMDE_FAST_NANS)
+          uint32x4_t valid_input = vceqq_f32(a_.neon_f32, a_.neon_f32);
+        #endif
+
+        r_.neon_i32 = vbslq_s32(valid_input, r_.neon_i32, vdupq_n_s32(INT32_MIN));
+      #endif
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i32x4_trunc_sat_f32x4(a_.wasm_v128);
+
+      #if !defined(SIMDE_FAST_CONVERSION_RANGE) || !defined(SIMDE_FAST_NANS)
+        #if !defined(SIMDE_FAST_CONVERSION_RANGE) && !defined(SIMDE_FAST_NANS)
+          v128_t valid_input =
+            wasm_v128_and(
+              wasm_f32x4_lt(a_.wasm_v128, wasm_f32x4_splat(SIMDE_FLOAT32_C(2147483648.0))),
+              wasm_f32x4_eq(a_.wasm_v128, a_.wasm_v128)
+            );
+        #elif !defined(SIMDE_FAST_CONVERSION_RANGE)
+          v128_t valid_input = wasm_f32x4_lt(a_.wasm_v128, wasm_f32x4_splat(SIMDE_FLOAT32_C(2147483648.0)));
+        #elif !defined(SIMDE_FAST_NANS)
+          v128_t valid_input = wasm_f32x4_eq(a_.wasm_v128, a_.wasm_v128);
+        #endif
+
+        r_.wasm_v128 = wasm_v128_bitselect(r_.wasm_v128, wasm_i32x4_splat(INT32_MIN), valid_input);
+      #endif
+    #elif defined(SIMDE_CONVERT_VECTOR_) && !defined(SIMDE_ARCH_POWER)
+      SIMDE_CONVERT_VECTOR_(r_.i32, a_.f32);
+
+      #if !defined(SIMDE_FAST_CONVERSION_RANGE) || !defined(SIMDE_FAST_NANS)
+        #if !defined(SIMDE_FAST_CONVERSION_RANGE)
+          static const simde_float32 SIMDE_VECTOR(16) first_too_high = { SIMDE_FLOAT32_C(2147483648.0), SIMDE_FLOAT32_C(2147483648.0), SIMDE_FLOAT32_C(2147483648.0), SIMDE_FLOAT32_C(2147483648.0) };
+
+          __typeof__(r_.i32) valid_input =
+            HEDLEY_REINTERPRET_CAST(
+              __typeof__(r_.i32),
+              (a_.f32 < first_too_high) & (a_.f32 >= -first_too_high)
+            );
+        #elif !defined(SIMDE_FAST_NANS)
+          __typeof__(r_.i32) valid_input = HEDLEY_REINTERPRET_CAST( __typeof__(valid_input), a_.f32 == a_.f32);
+        #endif
+
+        __typeof__(r_.i32) invalid_output = { INT32_MIN, INT32_MIN, INT32_MIN, INT32_MIN };
+        r_.i32 = (r_.i32 & valid_input) | (invalid_output & ~valid_input);
+      #endif
+    #else
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        simde_float32 v = a_.f32[i];
+        #if defined(SIMDE_FAST_CONVERSION_RANGE) && defined(SIMDE_FAST_NANS)
+          r_.i32[i] = SIMDE_CONVERT_FTOI(int32_t, v);
+        #else
+          r_.i32[i] = ((v > HEDLEY_STATIC_CAST(simde_float32, INT32_MIN)) && (v < HEDLEY_STATIC_CAST(simde_float32, INT32_MAX))) ?
+            SIMDE_CONVERT_FTOI(int32_t, v) : INT32_MIN;
+        #endif
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cvttps_epi32(a) simde_mm_cvttps_epi32(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int32_t
+simde_mm_cvttsd_si32 (simde__m128d a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_cvttsd_si32(a);
+  #else
+    simde__m128d_private a_ = simde__m128d_to_private(a);
+    simde_float64 v = a_.f64[0];
+    #if defined(SIMDE_FAST_CONVERSION_RANGE)
+      return SIMDE_CONVERT_FTOI(int32_t, v);
+    #else
+      return ((v > HEDLEY_STATIC_CAST(simde_float64, INT32_MIN)) && (v < HEDLEY_STATIC_CAST(simde_float64, INT32_MAX))) ?
+        SIMDE_CONVERT_FTOI(int32_t, v) : INT32_MIN;
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_cvttsd_si32(a) simde_mm_cvttsd_si32(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int64_t
+simde_mm_cvttsd_si64 (simde__m128d a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_ARCH_AMD64)
+    #if !defined(__PGI)
+      return _mm_cvttsd_si64(a);
+    #else
+      return _mm_cvttsd_si64x(a);
+    #endif
+  #else
+    simde__m128d_private a_ = simde__m128d_to_private(a);
+    return SIMDE_CONVERT_FTOI(int64_t, a_.f64[0]);
+  #endif
+}
+#define simde_mm_cvttsd_si64x(a) simde_mm_cvttsd_si64(a)
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARCH_AMD64))
+  #define _mm_cvttsd_si64(a) simde_mm_cvttsd_si64(a)
+  #define _mm_cvttsd_si64x(a) simde_mm_cvttsd_si64x(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_div_pd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_div_pd(a, b);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.f64 = a_.f64 / b_.f64;
+    #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f64 = vdivq_f64(a_.neon_f64, b_.neon_f64);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 =  wasm_f64x2_div(a_.wasm_v128, b_.wasm_v128);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = a_.f64[i] / b_.f64[i];
+      }
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_div_pd(a, b) simde_mm_div_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_div_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_div_sd(a, b);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+    return simde_mm_move_sd(a, simde_mm_div_pd(a, b));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_sd(a, simde_mm_div_pd(simde_x_mm_broadcastlow_pd(a), simde_x_mm_broadcastlow_pd(b)));
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      float64x2_t temp = vdivq_f64(a_.neon_f64, b_.neon_f64);
+      r_.neon_f64 = vsetq_lane_f64(vgetq_lane(a_.neon_f64, 1), temp, 1);
+    #else
+      r_.f64[0] = a_.f64[0] / b_.f64[0];
+      r_.f64[1] = a_.f64[1];
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_div_sd(a, b) simde_mm_div_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int32_t
+simde_mm_extract_epi16 (simde__m128i a, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 7)  {
+  uint16_t r;
+  simde__m128i_private a_ = simde__m128i_to_private(a);
+
+  #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+    #if defined(SIMDE_BUG_GCC_95227)
+      (void) a_;
+      (void) imm8;
+    #endif
+    r = HEDLEY_STATIC_CAST(uint16_t, vec_extract(a_.altivec_i16, imm8));
+  #else
+    r = a_.u16[imm8 & 7];
+  #endif
+
+  return  HEDLEY_STATIC_CAST(int32_t, r);
+}
+#if defined(SIMDE_X86_SSE2_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(4,6,0))
+  #define simde_mm_extract_epi16(a, imm8) _mm_extract_epi16(a, imm8)
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_mm_extract_epi16(a, imm8) (HEDLEY_STATIC_CAST(int32_t, vgetq_lane_s16(simde__m128i_to_private(a).neon_i16, (imm8))) & (INT32_C(0x0000ffff)))
+#elif defined(SIMDE_WASM_SIMD128_NATIVE)
+  #define simde_mm_extract_epi16(a, imm8) HEDLEY_STATIC_CAST(int32_t, wasm_u16x8_extract_lane(simde__m128i_to_wasm_v128((a)), (imm8) & 7))
+#endif
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_extract_epi16(a, imm8) simde_mm_extract_epi16(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_insert_epi16 (simde__m128i a, int16_t i, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 7)  {
+  simde__m128i_private a_ = simde__m128i_to_private(a);
+  a_.i16[imm8 & 7] = i;
+  return simde__m128i_from_private(a_);
+}
+#if defined(SIMDE_X86_SSE2_NATIVE) && !defined(__PGI)
+  #define simde_mm_insert_epi16(a, i, imm8) _mm_insert_epi16((a), (i), (imm8))
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_mm_insert_epi16(a, i, imm8) simde__m128i_from_neon_i16(vsetq_lane_s16((i), simde__m128i_to_neon_i16(a), (imm8)))
+#elif defined(SIMDE_WASM_SIMD128_NATIVE)
+  #define simde_mm_insert_epi16(a, i, imm8) wasm_i16x8_replace_lane(simde__m128i_to_wasm_v128((a)), (imm8) & 7, (i))
+#endif
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_insert_epi16(a, i, imm8) simde_mm_insert_epi16(a, i, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_load_pd (simde_float64 const mem_addr[HEDLEY_ARRAY_PARAM(2)]) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_load_pd(mem_addr);
+  #else
+    simde__m128d_private r_;
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f64 = vld1q_f64(mem_addr);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vld1q_u32(HEDLEY_REINTERPRET_CAST(uint32_t const*, mem_addr));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_v128_load(mem_addr);
+    #else
+      simde_memcpy(&r_, SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m128d), sizeof(r_));
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_load_pd(mem_addr) simde_mm_load_pd(mem_addr)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_load1_pd (simde_float64 const* mem_addr) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_load1_pd(mem_addr);
+  #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return simde__m128d_from_neon_f64(vld1q_dup_f64(mem_addr));
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    return simde__m128d_from_wasm_v128(wasm_v128_load64_splat(mem_addr));
+  #else
+    return simde_mm_set1_pd(*mem_addr);
+  #endif
+}
+#define simde_mm_load_pd1(mem_addr) simde_mm_load1_pd(mem_addr)
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_load_pd1(mem_addr) simde_mm_load1_pd(mem_addr)
+  #define _mm_load1_pd(mem_addr) simde_mm_load1_pd(mem_addr)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_load_sd (simde_float64 const* mem_addr) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_load_sd(mem_addr);
+  #else
+    simde__m128d_private r_;
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f64 = vsetq_lane_f64(*mem_addr, vdupq_n_f64(0), 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_v128_load64_zero(HEDLEY_REINTERPRET_CAST(const void*, mem_addr));
+    #else
+      r_.f64[0] = *mem_addr;
+      r_.u64[1] = UINT64_C(0);
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_load_sd(mem_addr) simde_mm_load_sd(mem_addr)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_load_si128 (simde__m128i const* mem_addr) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_load_si128(HEDLEY_REINTERPRET_CAST(__m128i const*, mem_addr));
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld1q_s64(HEDLEY_REINTERPRET_CAST(int64_t const*, mem_addr));
+  #else
+    simde__m128i_private r_;
+
+    #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_i32 = vec_ld(0, HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(int) const*, mem_addr));
+    #else
+      simde_memcpy(&r_, SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m128i), sizeof(simde__m128i));
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_load_si128(mem_addr) simde_mm_load_si128(mem_addr)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_loadh_pd (simde__m128d a, simde_float64 const* mem_addr) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_loadh_pd(a, mem_addr);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f64 = vcombine_f64(vget_low_f64(a_.neon_f64), vld1_f64(HEDLEY_REINTERPRET_CAST(const float64_t*, mem_addr)));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_v128_load64_lane(HEDLEY_REINTERPRET_CAST(const void*, mem_addr), a_.wasm_v128, 1);
+    #else
+      simde_float64 t;
+
+      simde_memcpy(&t, mem_addr, sizeof(t));
+      r_.f64[0] = a_.f64[0];
+      r_.f64[1] = t;
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_loadh_pd(a, mem_addr) simde_mm_loadh_pd(a, mem_addr)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_loadl_epi64 (simde__m128i const* mem_addr) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_loadl_epi64(mem_addr);
+  #else
+    simde__m128i_private r_;
+
+    int64_t value;
+    simde_memcpy(&value, mem_addr, sizeof(value));
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i64 = vcombine_s64(vld1_s64(HEDLEY_REINTERPRET_CAST(int64_t const *, mem_addr)), vdup_n_s64(0));
+    #else
+      r_.i64[0] = value;
+      r_.i64[1] = 0;
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_loadl_epi64(mem_addr) simde_mm_loadl_epi64(mem_addr)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_loadl_pd (simde__m128d a, simde_float64 const* mem_addr) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_loadl_pd(a, mem_addr);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f64 = vcombine_f64(vld1_f64(
+        HEDLEY_REINTERPRET_CAST(const float64_t*, mem_addr)), vget_high_f64(a_.neon_f64));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_v128_load64_lane(HEDLEY_REINTERPRET_CAST(const void*, mem_addr), a_.wasm_v128, 0);
+    #else
+      r_.f64[0] = *mem_addr;
+      r_.u64[1] = a_.u64[1];
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_loadl_pd(a, mem_addr) simde_mm_loadl_pd(a, mem_addr)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_loadr_pd (simde_float64 const mem_addr[HEDLEY_ARRAY_PARAM(2)]) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_loadr_pd(mem_addr);
+  #else
+    simde__m128d_private
+      r_;
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f64 = vld1q_f64(mem_addr);
+      r_.neon_f64 = vextq_f64(r_.neon_f64, r_.neon_f64, 1);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i64 = vld1q_s64(HEDLEY_REINTERPRET_CAST(int64_t const *, mem_addr));
+      r_.neon_i64 = vextq_s64(r_.neon_i64, r_.neon_i64, 1);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      v128_t tmp = wasm_v128_load(mem_addr);
+      r_.wasm_v128 = wasm_i64x2_shuffle(tmp, tmp, 1, 0);
+    #else
+      r_.f64[0] = mem_addr[1];
+      r_.f64[1] = mem_addr[0];
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_loadr_pd(mem_addr) simde_mm_loadr_pd(mem_addr)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_loadu_pd (simde_float64 const mem_addr[HEDLEY_ARRAY_PARAM(2)]) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_loadu_pd(mem_addr);
+  #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vld1q_f64(mem_addr);
+  #else
+    simde__m128d_private r_;
+
+    simde_memcpy(&r_, mem_addr, sizeof(r_));
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_loadu_pd(mem_addr) simde_mm_loadu_pd(mem_addr)
+#endif
+
+#if defined(SIMDE_X86_AVX512VL_NATIVE) && defined(SIMDE_X86_AVX512BW_NATIVE) \
+    && !defined(SIMDE_BUG_GCC_95483) && !defined(SIMDE_BUG_CLANG_REV_344862) \
+    && (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,20,0))
+  #define simde_mm_loadu_epi8(mem_addr) _mm_loadu_epi8(mem_addr)
+#else
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_loadu_epi8(void const * mem_addr) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_loadu_si128(SIMDE_ALIGN_CAST(__m128i const *, mem_addr));
+  #else
+    simde__m128i_private r_;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i8 = vld1q_s8(HEDLEY_REINTERPRET_CAST(int8_t const*, mem_addr));
+    #else
+      simde_memcpy(&r_, mem_addr, sizeof(r_));
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#endif
+#define simde_x_mm_loadu_epi8(mem_addr) simde_mm_loadu_epi8(mem_addr)
+#if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && (defined(SIMDE_BUG_GCC_95483) || defined(SIMDE_BUG_CLANG_REV_344862)))
+  #undef _mm_loadu_epi8
+  #define _mm_loadu_epi8(a) simde_mm_loadu_epi8(a)
+#endif
+
+#if defined(SIMDE_X86_AVX512VL_NATIVE) && defined(SIMDE_X86_AVX512BW_NATIVE) \
+    && !defined(SIMDE_BUG_GCC_95483) && !defined(SIMDE_BUG_CLANG_REV_344862) \
+    && (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,20,0))
+  #define simde_mm_loadu_epi16(mem_addr) _mm_loadu_epi16(mem_addr)
+#else
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_loadu_epi16(void const * mem_addr) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_loadu_si128(SIMDE_ALIGN_CAST(__m128i const *, mem_addr));
+  #else
+    simde__m128i_private r_;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i16 = vreinterpretq_s16_s8(vld1q_s8(HEDLEY_REINTERPRET_CAST(int8_t const*, mem_addr)));
+    #else
+      simde_memcpy(&r_, mem_addr, sizeof(r_));
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#endif
+#define simde_x_mm_loadu_epi16(mem_addr) simde_mm_loadu_epi16(mem_addr)
+#if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && (defined(SIMDE_BUG_GCC_95483) || defined(SIMDE_BUG_CLANG_REV_344862)))
+  #undef _mm_loadu_epi16
+  #define _mm_loadu_epi16(a) simde_mm_loadu_epi16(a)
+#endif
+
+#if defined(SIMDE_X86_AVX512VL_NATIVE) && !defined(SIMDE_BUG_GCC_95483) \
+    && !defined(SIMDE_BUG_CLANG_REV_344862) && (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,20,0))
+  #define simde_mm_loadu_epi32(mem_addr) _mm_loadu_epi32(mem_addr)
+#else
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_loadu_epi32(void const * mem_addr) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_loadu_si128(SIMDE_ALIGN_CAST(__m128i const *, mem_addr));
+  #else
+    simde__m128i_private r_;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vreinterpretq_s32_s8(vld1q_s8(HEDLEY_REINTERPRET_CAST(int8_t const*, mem_addr)));
+    #else
+      simde_memcpy(&r_, mem_addr, sizeof(r_));
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#endif
+#define simde_x_mm_loadu_epi32(mem_addr) simde_mm_loadu_epi32(mem_addr)
+#if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && (defined(SIMDE_BUG_GCC_95483) || defined(SIMDE_BUG_CLANG_REV_344862)))
+  #undef _mm_loadu_epi32
+  #define _mm_loadu_epi32(a) simde_mm_loadu_epi32(a)
+#endif
+
+#if defined(SIMDE_X86_AVX512VL_NATIVE) && !defined(SIMDE_BUG_GCC_95483) \
+    && !defined(SIMDE_BUG_CLANG_REV_344862) \
+    && (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,20,0))
+  #define simde_mm_loadu_epi64(mem_addr) _mm_loadu_epi64(mem_addr)
+#else
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_loadu_epi64(void const * mem_addr) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_loadu_si128(SIMDE_ALIGN_CAST(__m128i const *, mem_addr));
+  #else
+    simde__m128i_private r_;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i64 = vreinterpretq_s64_s8(vld1q_s8(HEDLEY_REINTERPRET_CAST(int8_t const*, mem_addr)));
+    #else
+      simde_memcpy(&r_, mem_addr, sizeof(r_));
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#endif
+#define simde_x_mm_loadu_epi64(mem_addr) simde_mm_loadu_epi64(mem_addr)
+#if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && (defined(SIMDE_BUG_GCC_95483) || defined(SIMDE_BUG_CLANG_REV_344862)))
+  #undef _mm_loadu_epi64
+  #define _mm_loadu_epi64(a) simde_mm_loadu_epi64(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_loadu_si128 (void const* mem_addr) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_loadu_si128(HEDLEY_STATIC_CAST(__m128i const*, mem_addr));
+  #else
+    simde__m128i_private r_;
+
+    #if HEDLEY_GNUC_HAS_ATTRIBUTE(may_alias,3,3,0)
+      HEDLEY_DIAGNOSTIC_PUSH
+      SIMDE_DIAGNOSTIC_DISABLE_PACKED_
+      struct simde_mm_loadu_si128_s {
+        __typeof__(r_) v;
+      } __attribute__((__packed__, __may_alias__));
+      r_ = HEDLEY_REINTERPRET_CAST(const struct simde_mm_loadu_si128_s *, mem_addr)->v;
+      HEDLEY_DIAGNOSTIC_POP
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i8 = vld1q_s8(HEDLEY_REINTERPRET_CAST(int8_t const*, mem_addr));
+    #else
+      simde_memcpy(&r_, mem_addr, sizeof(r_));
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_loadu_si128(mem_addr) simde_mm_loadu_si128(mem_addr)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_madd_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_madd_epi16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      int32x4_t pl = vmull_s16(vget_low_s16(a_.neon_i16),  vget_low_s16(b_.neon_i16));
+      int32x4_t ph = vmull_high_s16(a_.neon_i16, b_.neon_i16);
+      r_.neon_i32 = vpaddq_s32(pl, ph);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      int32x4_t pl = vmull_s16(vget_low_s16(a_.neon_i16),  vget_low_s16(b_.neon_i16));
+      int32x4_t ph = vmull_s16(vget_high_s16(a_.neon_i16), vget_high_s16(b_.neon_i16));
+      int32x2_t rl = vpadd_s32(vget_low_s32(pl), vget_high_s32(pl));
+      int32x2_t rh = vpadd_s32(vget_low_s32(ph), vget_high_s32(ph));
+      r_.neon_i32 = vcombine_s32(rl, rh);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_i32 = vec_msum(a_.altivec_i16, b_.altivec_i16, vec_splats(0));
+    #elif defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_i32 = vec_mule(a_.altivec_i16, b_.altivec_i16) + vec_mulo(a_.altivec_i16, b_.altivec_i16);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i32x4_dot_i16x8(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_CONVERT_VECTOR_) && HEDLEY_HAS_BUILTIN(__builtin_shufflevector)
+      int32_t SIMDE_VECTOR(32) a32, b32, p32;
+      SIMDE_CONVERT_VECTOR_(a32, a_.i16);
+      SIMDE_CONVERT_VECTOR_(b32, b_.i16);
+      p32 = a32 * b32;
+      r_.i32 =
+        __builtin_shufflevector(p32, p32, 0, 2, 4, 6) +
+        __builtin_shufflevector(p32, p32, 1, 3, 5, 7);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_) / sizeof(r_.i16[0])) ; i += 2) {
+        r_.i32[i / 2] = (a_.i16[i] * b_.i16[i]) + (a_.i16[i + 1] * b_.i16[i + 1]);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_madd_epi16(a, b) simde_mm_madd_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_maskmoveu_si128 (simde__m128i a, simde__m128i mask, int8_t mem_addr[HEDLEY_ARRAY_PARAM(16)]) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    _mm_maskmoveu_si128(a, mask, HEDLEY_REINTERPRET_CAST(char*, mem_addr));
+  #else
+    simde__m128i_private
+      a_ = simde__m128i_to_private(a),
+      mask_ = simde__m128i_to_private(mask);
+
+    for (size_t i = 0 ; i < (sizeof(a_.i8) / sizeof(a_.i8[0])) ; i++) {
+      if (mask_.u8[i] & 0x80) {
+        mem_addr[i] = a_.i8[i];
+      }
+    }
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_maskmoveu_si128(a, mask, mem_addr) simde_mm_maskmoveu_si128((a), (mask), SIMDE_CHECKED_REINTERPRET_CAST(int8_t*, char*, (mem_addr)))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int32_t
+simde_mm_movemask_epi8 (simde__m128i a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && !defined(__INTEL_COMPILER)
+    /* ICC has trouble with _mm_movemask_epi8 at -O2 and above: */
+    return _mm_movemask_epi8(a);
+  #else
+    int32_t r = 0;
+    simde__m128i_private a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      /* https://github.com/WebAssembly/simd/pull/201#issue-380682845 */
+      static const uint8_t md[16] = {
+        1 << 0, 1 << 1, 1 << 2, 1 << 3,
+        1 << 4, 1 << 5, 1 << 6, 1 << 7,
+        1 << 0, 1 << 1, 1 << 2, 1 << 3,
+        1 << 4, 1 << 5, 1 << 6, 1 << 7,
+      };
+
+      /* Extend sign bit over entire lane */
+      uint8x16_t extended = vreinterpretq_u8_s8(vshrq_n_s8(a_.neon_i8, 7));
+      /* Clear all but the bit we're interested in. */
+      uint8x16_t masked = vandq_u8(vld1q_u8(md), extended);
+      /* Alternate bytes from low half and high half */
+      uint8x8x2_t tmp = vzip_u8(vget_low_u8(masked), vget_high_u8(masked));
+      uint16x8_t x = vreinterpretq_u16_u8(vcombine_u8(tmp.val[0], tmp.val[1]));
+      #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+        r = vaddvq_u16(x);
+      #else
+        uint64x2_t t64 = vpaddlq_u32(vpaddlq_u16(x));
+        r =
+          HEDLEY_STATIC_CAST(int32_t, vgetq_lane_u64(t64, 0)) +
+          HEDLEY_STATIC_CAST(int32_t, vgetq_lane_u64(t64, 1));
+      #endif
+    #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE) && !defined(HEDLEY_IBM_VERSION) && (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE)
+      static const SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) perm = { 120, 112, 104, 96, 88, 80, 72, 64, 56, 48, 40, 32, 24, 16, 8, 0 };
+      r = HEDLEY_STATIC_CAST(int32_t, vec_extract(vec_vbpermq(a_.altivec_u8, perm), 1));
+    #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE) && !defined(HEDLEY_IBM_VERSION) && (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_BIG)
+      static const SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) perm = { 120, 112, 104, 96, 88, 80, 72, 64, 56, 48, 40, 32, 24, 16, 8, 0 };
+      r = HEDLEY_STATIC_CAST(int32_t, vec_extract(vec_vbpermq(a_.altivec_u8, perm), 14));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r = HEDLEY_STATIC_CAST(int32_t, wasm_i8x16_bitmask(a_.wasm_v128));
+    #else
+      SIMDE_VECTORIZE_REDUCTION(|:r)
+      for (size_t i = 0 ; i < (sizeof(a_.u8) / sizeof(a_.u8[0])) ; i++) {
+        r |= (a_.u8[15 - i] >> 7) << (15 - i);
+      }
+    #endif
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_movemask_epi8(a) simde_mm_movemask_epi8(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int32_t
+simde_mm_movemask_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_movemask_pd(a);
+  #else
+    int32_t r = 0;
+    simde__m128d_private a_ = simde__m128d_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      HEDLEY_DIAGNOSTIC_PUSH
+      SIMDE_DIAGNOSTIC_DISABLE_VECTOR_CONVERSION_
+      uint64x2_t shifted = vshrq_n_u64(a_.neon_u64, 63);
+      r =
+        HEDLEY_STATIC_CAST(int32_t, vgetq_lane_u64(shifted, 0)) +
+        (HEDLEY_STATIC_CAST(int32_t, vgetq_lane_u64(shifted, 1)) << 1);
+      HEDLEY_DIAGNOSTIC_POP
+    #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE) && defined(SIMDE_BUG_CLANG_50932)
+      SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) idx = { 64, 0, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 };
+      SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) res = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned char), vec_bperm(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned __int128), a_.altivec_u64), idx));
+      r = HEDLEY_STATIC_CAST(int32_t, vec_extract(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed int), res), 2));
+    #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE)
+      SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) idx = { 64, 0, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 };
+      SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) res = vec_bperm(a_.altivec_u8, idx);
+      r = HEDLEY_STATIC_CAST(int32_t, vec_extract(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed int), res), 2));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r = HEDLEY_STATIC_CAST(int32_t, wasm_i64x2_bitmask(a_.wasm_v128));
+    #else
+      SIMDE_VECTORIZE_REDUCTION(|:r)
+      for (size_t i = 0 ; i < (sizeof(a_.u64) / sizeof(a_.u64[0])) ; i++) {
+        r |= (a_.u64[i] >> 63) << i;
+      }
+    #endif
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_movemask_pd(a) simde_mm_movemask_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_movepi64_pi64 (simde__m128i a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_movepi64_pi64(a);
+  #else
+    simde__m64_private r_;
+    simde__m128i_private a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_i64 = vget_low_s64(a_.neon_i64);
+    #else
+      r_.i64[0] = a_.i64[0];
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_movepi64_pi64(a) simde_mm_movepi64_pi64(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_movpi64_epi64 (simde__m64 a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_movpi64_epi64(a);
+  #else
+    simde__m128i_private r_;
+    simde__m64_private a_ = simde__m64_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i64 = vcombine_s64(a_.neon_i64, vdup_n_s64(0));
+    #else
+      r_.i64[0] = a_.i64[0];
+      r_.i64[1] = 0;
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_movpi64_epi64(a) simde_mm_movpi64_epi64(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_min_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_min_epi16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i16 = vminq_s16(a_.neon_i16, b_.neon_i16);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i16x8_min(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_i16 = vec_min(a_.altivec_i16, b_.altivec_i16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = (a_.i16[i] < b_.i16[i]) ? a_.i16[i] : b_.i16[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_min_epi16(a, b) simde_mm_min_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_min_epu8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_min_epu8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u8 = vminq_u8(a_.neon_u8, b_.neon_u8);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_u8x16_min(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_u8 = vec_min(a_.altivec_u8, b_.altivec_u8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+        r_.u8[i] = (a_.u8[i] < b_.u8[i]) ? a_.u8[i] : b_.u8[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_min_epu8(a, b) simde_mm_min_epu8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_min_pd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_min_pd(a, b);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_f64 = vec_min(a_.altivec_f64, b_.altivec_f64);
+    #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f64 = vminq_f64(a_.neon_f64, b_.neon_f64);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f64x2_min(a_.wasm_v128, b_.wasm_v128);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = (a_.f64[i] < b_.f64[i]) ? a_.f64[i] : b_.f64[i];
+      }
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_min_pd(a, b) simde_mm_min_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_min_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_min_sd(a, b);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+    return simde_mm_move_sd(a, simde_mm_min_pd(a, b));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_sd(a, simde_mm_min_pd(simde_x_mm_broadcastlow_pd(a), simde_x_mm_broadcastlow_pd(b)));
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      float64x2_t temp = vminq_f64(a_.neon_f64, b_.neon_f64);
+      r_.neon_f64 = vsetq_lane_f64(vgetq_lane(a_.neon_f64, 1), temp, 1);
+    #else
+      r_.f64[0] = (a_.f64[0] < b_.f64[0]) ? a_.f64[0] : b_.f64[0];
+      r_.f64[1] = a_.f64[1];
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_min_sd(a, b) simde_mm_min_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_max_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_max_epi16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i16 = vmaxq_s16(a_.neon_i16, b_.neon_i16);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i16x8_max(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_i16 = vec_max(a_.altivec_i16, b_.altivec_i16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = (a_.i16[i] > b_.i16[i]) ? a_.i16[i] : b_.i16[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_max_epi16(a, b) simde_mm_max_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_max_epu8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_max_epu8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u8 = vmaxq_u8(a_.neon_u8, b_.neon_u8);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_u8x16_max(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_u8 = vec_max(a_.altivec_u8, b_.altivec_u8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+        r_.u8[i] = (a_.u8[i] > b_.u8[i]) ? a_.u8[i] : b_.u8[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_max_epu8(a, b) simde_mm_max_epu8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_max_pd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_max_pd(a, b);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_f64 = vec_max(a_.altivec_f64, b_.altivec_f64);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f64x2_max(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f64 = vmaxq_f64(a_.neon_f64, b_.neon_f64);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = (a_.f64[i] > b_.f64[i]) ? a_.f64[i] : b_.f64[i];
+      }
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_max_pd(a, b) simde_mm_max_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_max_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_max_sd(a, b);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+    return simde_mm_move_sd(a, simde_mm_max_pd(a, b));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_sd(a, simde_mm_max_pd(simde_x_mm_broadcastlow_pd(a), simde_x_mm_broadcastlow_pd(b)));
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      float64x2_t temp = vmaxq_f64(a_.neon_f64, b_.neon_f64);
+      r_.neon_f64 = vsetq_lane_f64(vgetq_lane(a_.neon_f64, 1), temp, 1);
+    #else
+      r_.f64[0] = (a_.f64[0] > b_.f64[0]) ? a_.f64[0] : b_.f64[0];
+      r_.f64[1] = a_.f64[1];
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_max_sd(a, b) simde_mm_max_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_move_epi64 (simde__m128i a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_move_epi64(a);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i64 = vsetq_lane_s64(0, a_.neon_i64, 1);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i64x2_shuffle(a_.wasm_v128, wasm_i64x2_const(0, 0), 0, 2);
+    #else
+      r_.i64[0] = a_.i64[0];
+      r_.i64[1] = 0;
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_move_epi64(a) simde_mm_move_epi64(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_mul_epu32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_mul_epu32(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      uint32x2_t a_lo = vmovn_u64(a_.neon_u64);
+      uint32x2_t b_lo = vmovn_u64(b_.neon_u64);
+      r_.neon_u64 = vmull_u32(a_lo, b_lo);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_u64x2_extmul_low_u32x4(
+        wasm_i32x4_shuffle(a_.wasm_v128, a_.wasm_v128, 0, 2, 0, 2),
+        wasm_i32x4_shuffle(b_.wasm_v128, b_.wasm_v128, 0, 2, 0, 2));
+    #elif defined(SIMDE_SHUFFLE_VECTOR_) && (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE)
+      __typeof__(a_.u32) z = { 0, };
+      a_.u32 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.u32, z, 0, 4, 2, 6);
+      b_.u32 = SIMDE_SHUFFLE_VECTOR_(32, 16, b_.u32, z, 0, 4, 2, 6);
+      r_.u64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u64), a_.u32) *
+               HEDLEY_REINTERPRET_CAST(__typeof__(r_.u64), b_.u32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
+        r_.u64[i] = HEDLEY_STATIC_CAST(uint64_t, a_.u32[i * 2]) * HEDLEY_STATIC_CAST(uint64_t, b_.u32[i * 2]);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_mul_epu32(a, b) simde_mm_mul_epu32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_x_mm_mul_epi64 (simde__m128i a, simde__m128i b) {
+  simde__m128i_private
+    r_,
+    a_ = simde__m128i_to_private(a),
+    b_ = simde__m128i_to_private(b);
+
+  #if defined(SIMDE_WASM_SIMD128_NATIVE)
+    r_.wasm_v128 = wasm_i64x2_mul(a_.wasm_v128, b_.wasm_v128);
+  #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+    r_.i64 = a_.i64 * b_.i64;
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+      r_.i64[i] = a_.i64[i] * b_.i64[i];
+    }
+  #endif
+
+  return simde__m128i_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_x_mm_mod_epi64 (simde__m128i a, simde__m128i b) {
+  simde__m128i_private
+    r_,
+    a_ = simde__m128i_to_private(a),
+    b_ = simde__m128i_to_private(b);
+
+  #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
+    r_.i64 = a_.i64 % b_.i64;
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+      r_.i64[i] = a_.i64[i] % b_.i64[i];
+    }
+  #endif
+
+  return simde__m128i_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_mul_pd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_mul_pd(a, b);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.f64 = a_.f64 * b_.f64;
+    #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f64 = vmulq_f64(a_.neon_f64, b_.neon_f64);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f64x2_mul(a_.wasm_v128, b_.wasm_v128);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = a_.f64[i] * b_.f64[i];
+      }
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_mul_pd(a, b) simde_mm_mul_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_mul_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_mul_sd(a, b);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+    return simde_mm_move_sd(a, simde_mm_mul_pd(a, b));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_sd(a, simde_mm_mul_pd(simde_x_mm_broadcastlow_pd(a), simde_x_mm_broadcastlow_pd(b)));
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      float64x2_t temp = vmulq_f64(a_.neon_f64, b_.neon_f64);
+      r_.neon_f64 = vsetq_lane_f64(vgetq_lane(a_.neon_f64, 1), temp, 1);
+    #else
+      r_.f64[0] = a_.f64[0] * b_.f64[0];
+      r_.f64[1] = a_.f64[1];
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_mul_sd(a, b) simde_mm_mul_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_mul_su32 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) && !defined(__PGI)
+    return _mm_mul_su32(a, b);
+  #else
+    simde__m64_private
+      r_,
+      a_ = simde__m64_to_private(a),
+      b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.u64[0] = vget_lane_u64(vget_low_u64(vmull_u32(vreinterpret_u32_s64(a_.neon_i64), vreinterpret_u32_s64(b_.neon_i64))), 0);
+    #else
+      r_.u64[0] = HEDLEY_STATIC_CAST(uint64_t, a_.u32[0]) * HEDLEY_STATIC_CAST(uint64_t, b_.u32[0]);
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_mul_su32(a, b) simde_mm_mul_su32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_mulhi_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_mulhi_epi16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      int16x4_t a3210 = vget_low_s16(a_.neon_i16);
+      int16x4_t b3210 = vget_low_s16(b_.neon_i16);
+      int32x4_t ab3210 = vmull_s16(a3210, b3210); /* 3333222211110000 */
+      #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+        int32x4_t ab7654 = vmull_high_s16(a_.neon_i16, b_.neon_i16);
+        r_.neon_i16 = vuzp2q_s16(vreinterpretq_s16_s32(ab3210), vreinterpretq_s16_s32(ab7654));
+      #else
+        int16x4_t a7654 = vget_high_s16(a_.neon_i16);
+        int16x4_t b7654 = vget_high_s16(b_.neon_i16);
+        int32x4_t ab7654 = vmull_s16(a7654, b7654); /* 7777666655554444 */
+        uint16x8x2_t rv = vuzpq_u16(vreinterpretq_u16_s32(ab3210), vreinterpretq_u16_s32(ab7654));
+        r_.neon_u16 = rv.val[1];
+      #endif
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      const v128_t lo = wasm_i32x4_extmul_low_i16x8(a_.wasm_v128, b_.wasm_v128);
+      const v128_t hi = wasm_i32x4_extmul_high_i16x8(a_.wasm_v128, b_.wasm_v128);
+      r_.wasm_v128 = wasm_i16x8_shuffle(lo, hi, 1, 3, 5, 7, 9, 11, 13, 15);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.u16[i] = HEDLEY_STATIC_CAST(uint16_t, (HEDLEY_STATIC_CAST(uint32_t, HEDLEY_STATIC_CAST(int32_t, a_.i16[i]) * HEDLEY_STATIC_CAST(int32_t, b_.i16[i])) >> 16));
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_mulhi_epi16(a, b) simde_mm_mulhi_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_mulhi_epu16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && !defined(__PGI)
+    return _mm_mulhi_epu16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      uint16x4_t a3210 = vget_low_u16(a_.neon_u16);
+      uint16x4_t b3210 = vget_low_u16(b_.neon_u16);
+      uint32x4_t ab3210 = vmull_u16(a3210, b3210); /* 3333222211110000 */
+      #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+        uint32x4_t ab7654 = vmull_high_u16(a_.neon_u16, b_.neon_u16);
+        r_.neon_u16 = vuzp2q_u16(vreinterpretq_u16_u32(ab3210), vreinterpretq_u16_u32(ab7654));
+      #else
+        uint16x4_t a7654 = vget_high_u16(a_.neon_u16);
+        uint16x4_t b7654 = vget_high_u16(b_.neon_u16);
+        uint32x4_t ab7654 = vmull_u16(a7654, b7654); /* 7777666655554444 */
+        uint16x8x2_t neon_r = vuzpq_u16(vreinterpretq_u16_u32(ab3210), vreinterpretq_u16_u32(ab7654));
+        r_.neon_u16 = neon_r.val[1];
+      #endif
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      const v128_t lo = wasm_u32x4_extmul_low_u16x8(a_.wasm_v128, b_.wasm_v128);
+      const v128_t hi = wasm_u32x4_extmul_high_u16x8(a_.wasm_v128, b_.wasm_v128);
+      r_.wasm_v128 = wasm_i16x8_shuffle(lo, hi, 1, 3, 5, 7, 9, 11, 13, 15);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+        r_.u16[i] = HEDLEY_STATIC_CAST(uint16_t, HEDLEY_STATIC_CAST(uint32_t, a_.u16[i]) * HEDLEY_STATIC_CAST(uint32_t, b_.u16[i]) >> 16);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_mulhi_epu16(a, b) simde_mm_mulhi_epu16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_mullo_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_mullo_epi16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i16 = vmulq_s16(a_.neon_i16, b_.neon_i16);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      (void) a_;
+      (void) b_;
+      r_.altivec_i16 = vec_mul(a_.altivec_i16, b_.altivec_i16);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i16x8_mul(a_.wasm_v128, b_.wasm_v128);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.u16[i] = HEDLEY_STATIC_CAST(uint16_t, HEDLEY_STATIC_CAST(uint32_t, a_.u16[i]) * HEDLEY_STATIC_CAST(uint32_t, b_.u16[i]));
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_mullo_epi16(a, b) simde_mm_mullo_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_or_pd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_or_pd(a, b);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32f = a_.i32f | b_.i32f;
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_v128_or(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i64 = vorrq_s64(a_.neon_i64, b_.neon_i64);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) {
+        r_.i32f[i] = a_.i32f[i] | b_.i32f[i];
+      }
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_or_pd(a, b) simde_mm_or_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_or_si128 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_or_si128(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vorrq_s32(a_.neon_i32, b_.neon_i32);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_i32 = vec_or(a_.altivec_i32, b_.altivec_i32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_v128_or(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32f = a_.i32f | b_.i32f;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) {
+        r_.i32f[i] = a_.i32f[i] | b_.i32f[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_or_si128(a, b) simde_mm_or_si128(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_packs_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_packs_epi16(a, b);
+  #else
+    simde__m128i_private
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b),
+      r_;
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_i8 = vqmovn_high_s16(vqmovn_s16(a_.neon_i16), b_.neon_i16);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i8 = vcombine_s8(vqmovn_s16(a_.neon_i16), vqmovn_s16(b_.neon_i16));
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_i8 = vec_packs(a_.altivec_i16, b_.altivec_i16);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i8x16_narrow_i16x8(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_CONVERT_VECTOR_) && HEDLEY_HAS_BUILTIN(__builtin_shufflevector)
+      int16_t SIMDE_VECTOR(32) v = SIMDE_SHUFFLE_VECTOR_(16, 32, a_.i16, b_.i16, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
+      const int16_t SIMDE_VECTOR(32) min = { INT8_MIN, INT8_MIN, INT8_MIN, INT8_MIN, INT8_MIN, INT8_MIN, INT8_MIN, INT8_MIN, INT8_MIN, INT8_MIN, INT8_MIN, INT8_MIN, INT8_MIN, INT8_MIN, INT8_MIN, INT8_MIN };
+      const int16_t SIMDE_VECTOR(32) max = { INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX };
+
+      int16_t m SIMDE_VECTOR(32);
+      m = HEDLEY_REINTERPRET_CAST(__typeof__(m), v < min);
+      v = (v & ~m) | (min & m);
+
+      m = v > max;
+      v = (v & ~m) | (max & m);
+
+      SIMDE_CONVERT_VECTOR_(r_.i8, v);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        int16_t v = (i < (sizeof(a_.i16) / sizeof(a_.i16[0]))) ? a_.i16[i] : b_.i16[i & 7];
+        r_.i8[i] = (v < INT8_MIN) ? INT8_MIN : ((v > INT8_MAX) ? INT8_MAX : HEDLEY_STATIC_CAST(int8_t, v));
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_packs_epi16(a, b) simde_mm_packs_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_packs_epi32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_packs_epi32(a, b);
+  #else
+    simde__m128i_private
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b),
+      r_;
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_i16 = vqmovn_high_s32(vqmovn_s32(a_.neon_i32), b_.neon_i32);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i16 = vcombine_s16(vqmovn_s32(a_.neon_i32), vqmovn_s32(b_.neon_i32));
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_i16 = vec_packs(a_.altivec_i32, b_.altivec_i32);
+    #elif defined(SIMDE_X86_SSE2_NATIVE)
+      r_.sse_m128i = _mm_packs_epi32(a_.sse_m128i, b_.sse_m128i);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i16x8_narrow_i32x4(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_CONVERT_VECTOR_) && HEDLEY_HAS_BUILTIN(__builtin_shufflevector)
+      int32_t SIMDE_VECTOR(32) v = SIMDE_SHUFFLE_VECTOR_(32, 32, a_.i32, b_.i32, 0, 1, 2, 3, 4, 5, 6, 7);
+      const int32_t SIMDE_VECTOR(32) min = { INT16_MIN, INT16_MIN, INT16_MIN, INT16_MIN, INT16_MIN, INT16_MIN, INT16_MIN, INT16_MIN };
+      const int32_t SIMDE_VECTOR(32) max = { INT16_MAX, INT16_MAX, INT16_MAX, INT16_MAX, INT16_MAX, INT16_MAX, INT16_MAX, INT16_MAX };
+
+      int32_t m SIMDE_VECTOR(32);
+      m = HEDLEY_REINTERPRET_CAST(__typeof__(m), v < min);
+      v = (v & ~m) | (min & m);
+
+      m = HEDLEY_REINTERPRET_CAST(__typeof__(m), v > max);
+      v = (v & ~m) | (max & m);
+
+      SIMDE_CONVERT_VECTOR_(r_.i16, v);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        int32_t v = (i < (sizeof(a_.i32) / sizeof(a_.i32[0]))) ? a_.i32[i] : b_.i32[i & 3];
+        r_.i16[i] = (v < INT16_MIN) ? INT16_MIN : ((v > INT16_MAX) ? INT16_MAX : HEDLEY_STATIC_CAST(int16_t, v));
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_packs_epi32(a, b) simde_mm_packs_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_packus_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_packus_epi16(a, b);
+  #else
+    simde__m128i_private
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b),
+      r_;
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      #if defined(SIMDE_BUG_CLANG_46840)
+        r_.neon_u8 = vqmovun_high_s16(vreinterpret_s8_u8(vqmovun_s16(a_.neon_i16)), b_.neon_i16);
+      #else
+        r_.neon_u8 = vqmovun_high_s16(vqmovun_s16(a_.neon_i16), b_.neon_i16);
+      #endif
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u8 =
+        vcombine_u8(
+          vqmovun_s16(a_.neon_i16),
+          vqmovun_s16(b_.neon_i16)
+        );
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_u8 = vec_packsu(a_.altivec_i16, b_.altivec_i16);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_u8x16_narrow_i16x8(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_CONVERT_VECTOR_) && HEDLEY_HAS_BUILTIN(__builtin_shufflevector) && defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+      int16_t v SIMDE_VECTOR(32) = SIMDE_SHUFFLE_VECTOR_(16, 32, a_.i16, b_.i16, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
+
+      v &= ~(v >> 15);
+      v |= HEDLEY_REINTERPRET_CAST(__typeof__(v), v > UINT8_MAX);
+
+      SIMDE_CONVERT_VECTOR_(r_.i8, v);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        int16_t v = (i < (sizeof(a_.i16) / sizeof(a_.i16[0]))) ? a_.i16[i] : b_.i16[i & 7];
+        r_.u8[i] = (v < 0) ? UINT8_C(0) : ((v > UINT8_MAX) ? UINT8_MAX : HEDLEY_STATIC_CAST(uint8_t, v));
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_packus_epi16(a, b) simde_mm_packus_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_pause (void) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    _mm_pause();
+  #elif defined(SIMDE_ARCH_X86)
+    #if defined(_MSC_VER)
+      __asm pause;
+    #else
+      __asm__ __volatile__("pause");
+    #endif
+  #elif defined(SIMDE_ARCH_ARM_NEON)
+    #if defined(_MSC_VER)
+      __isb(_ARM64_BARRIER_SY);
+    #else
+      __asm__ __volatile__("isb\n");
+    #endif
+  #elif defined(SIMDE_ARCH_POWER)
+    __asm__ __volatile__ ("or 27,27,27" ::: "memory");
+  #elif defined(SIMDE_ARCH_WASM)
+    __asm__ __volatile__ ("nop");
+  #elif defined(HEDLEY_GCC_VERSION)
+    #if defined(SIMDE_ARCH_RISCV)
+      __builtin_riscv_pause();
+    #else
+      __asm__ __volatile__ ("nop" ::: "memory");
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_pause() (simde_mm_pause())
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_sad_epu8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_sad_epu8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      const uint16x8_t t = vpaddlq_u8(vabdq_u8(a_.neon_u8, b_.neon_u8));
+      r_.neon_u64 = vcombine_u64(
+        vpaddl_u32(vpaddl_u16(vget_low_u16(t))),
+        vpaddl_u32(vpaddl_u16(vget_high_u16(t))));
+    #else
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        uint16_t tmp = 0;
+        SIMDE_VECTORIZE_REDUCTION(+:tmp)
+        for (size_t j = 0 ; j < ((sizeof(r_.u8) / sizeof(r_.u8[0])) / 2) ; j++) {
+          const size_t e = j + (i * 8);
+          tmp += (a_.u8[e] > b_.u8[e]) ? (a_.u8[e] - b_.u8[e]) : (b_.u8[e] - a_.u8[e]);
+        }
+        r_.i64[i] = tmp;
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_sad_epu8(a, b) simde_mm_sad_epu8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_set_epi8 (int8_t e15, int8_t e14, int8_t e13, int8_t e12,
+       int8_t e11, int8_t e10, int8_t  e9, int8_t  e8,
+       int8_t  e7, int8_t  e6, int8_t  e5, int8_t  e4,
+       int8_t  e3, int8_t  e2, int8_t  e1, int8_t  e0) {
+
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_set_epi8(
+      e15, e14, e13, e12, e11, e10,  e9,  e8,
+       e7,  e6,  e5,  e4,  e3,  e2,  e1,  e0);
+  #else
+    simde__m128i_private r_;
+
+    #if defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i8x16_make(
+         e0,  e1,  e2,  e3,  e4,  e5,  e6,  e7,
+         e8,  e9, e10, e11, e12, e13, e14, e15);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      SIMDE_ALIGN_LIKE_16(int8x16_t) int8_t data[16] = {
+        e0,  e1,  e2,  e3,
+        e4,  e5,  e6,  e7,
+        e8,  e9,  e10, e11,
+        e12, e13, e14, e15};
+      r_.neon_i8 = vld1q_s8(data);
+    #else
+      r_.i8[ 0] =  e0;
+      r_.i8[ 1] =  e1;
+      r_.i8[ 2] =  e2;
+      r_.i8[ 3] =  e3;
+      r_.i8[ 4] =  e4;
+      r_.i8[ 5] =  e5;
+      r_.i8[ 6] =  e6;
+      r_.i8[ 7] =  e7;
+      r_.i8[ 8] =  e8;
+      r_.i8[ 9] =  e9;
+      r_.i8[10] = e10;
+      r_.i8[11] = e11;
+      r_.i8[12] = e12;
+      r_.i8[13] = e13;
+      r_.i8[14] = e14;
+      r_.i8[15] = e15;
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_set_epi8(e15, e14, e13, e12, e11, e10,  e9,  e8,  e7,  e6,  e5,  e4,  e3,  e2,  e1,  e0) simde_mm_set_epi8(e15, e14, e13, e12, e11, e10,  e9,  e8,  e7,  e6,  e5,  e4,  e3,  e2,  e1,  e0)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_set_epi16 (int16_t e7, int16_t e6, int16_t e5, int16_t e4,
+        int16_t e3, int16_t e2, int16_t e1, int16_t e0) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_set_epi16(e7, e6, e5, e4, e3, e2, e1, e0);
+  #else
+    simde__m128i_private r_;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      SIMDE_ALIGN_LIKE_16(int16x8_t) int16_t data[8] = { e0, e1, e2, e3, e4, e5, e6, e7 };
+      r_.neon_i16 = vld1q_s16(data);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i16x8_make(e0, e1, e2, e3, e4, e5, e6, e7);
+    #else
+      r_.i16[0] = e0;
+      r_.i16[1] = e1;
+      r_.i16[2] = e2;
+      r_.i16[3] = e3;
+      r_.i16[4] = e4;
+      r_.i16[5] = e5;
+      r_.i16[6] = e6;
+      r_.i16[7] = e7;
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_set_epi16(e7,  e6,  e5,  e4,  e3,  e2,  e1,  e0) simde_mm_set_epi16(e7,  e6,  e5,  e4,  e3,  e2,  e1,  e0)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_loadu_si16 (void const* mem_addr) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && ( \
+      SIMDE_DETECT_CLANG_VERSION_CHECK(8,0,0) || \
+      HEDLEY_INTEL_VERSION_CHECK(20,21,1) || \
+      HEDLEY_GCC_VERSION_CHECK(12,1,0))
+    return _mm_loadu_si16(mem_addr);
+  #else
+    int16_t val;
+    simde_memcpy(&val, mem_addr, sizeof(val));
+    return simde_x_mm_cvtsi16_si128(val);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_loadu_si16(mem_addr) simde_mm_loadu_si16(mem_addr)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_set_epi32 (int32_t e3, int32_t e2, int32_t e1, int32_t e0) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_set_epi32(e3, e2, e1, e0);
+  #else
+    simde__m128i_private r_;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      SIMDE_ALIGN_LIKE_16(int32x4_t) int32_t data[4] = { e0, e1, e2, e3 };
+      r_.neon_i32 = vld1q_s32(data);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i32x4_make(e0, e1, e2, e3);
+    #else
+      r_.i32[0] = e0;
+      r_.i32[1] = e1;
+      r_.i32[2] = e2;
+      r_.i32[3] = e3;
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_set_epi32(e3,  e2,  e1,  e0) simde_mm_set_epi32(e3,  e2,  e1,  e0)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_loadu_si32 (void const* mem_addr) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && ( \
+      SIMDE_DETECT_CLANG_VERSION_CHECK(8,0,0) || \
+      HEDLEY_INTEL_VERSION_CHECK(20,21,1) || \
+      HEDLEY_GCC_VERSION_CHECK(12,1,0))
+    return _mm_loadu_si32(mem_addr);
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    return simde__m128i_from_wasm_v128(wasm_v128_load32_zero(mem_addr));
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    simde__m128i_private r_;
+    r_.neon_i32 = vsetq_lane_s32(* HEDLEY_REINTERPRET_CAST(const int32_t *, mem_addr), vdupq_n_s32(0), 0);
+    return simde__m128i_from_private(r_);
+  #else
+    int32_t val;
+    simde_memcpy(&val, mem_addr, sizeof(val));
+    return simde_mm_cvtsi32_si128(val);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_loadu_si32(mem_addr) simde_mm_loadu_si32(mem_addr)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_set_epi64 (simde__m64 e1, simde__m64 e0) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_set_epi64(e1, e0);
+  #else
+    simde__m128i_private r_;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i64 = vcombine_s64(simde__m64_to_neon_i64(e0), simde__m64_to_neon_i64(e1));
+    #else
+      r_.m64[0] = e0;
+      r_.m64[1] = e1;
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_set_epi64(e1, e0) (simde_mm_set_epi64((e1), (e0)))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_set_epi64x (int64_t e1, int64_t e0) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,0,0))
+    return _mm_set_epi64x(e1, e0);
+  #else
+    simde__m128i_private r_;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      SIMDE_ALIGN_LIKE_16(int64x2_t) int64_t data[2] = {e0, e1};
+      r_.neon_i64 = vld1q_s64(data);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i64x2_make(e0, e1);
+    #else
+      r_.i64[0] = e0;
+      r_.i64[1] = e1;
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_set_epi64x(e1, e0) simde_mm_set_epi64x(e1, e0)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_loadu_si64 (void const* mem_addr) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && ( \
+      SIMDE_DETECT_CLANG_VERSION_CHECK(8,0,0) || \
+      HEDLEY_GCC_VERSION_CHECK(11,0,0) || \
+      HEDLEY_INTEL_VERSION_CHECK(20,21,1))
+    return _mm_loadu_si64(mem_addr);
+  #else
+  int64_t val;
+    simde_memcpy(&val, mem_addr, sizeof(val));
+    return simde_mm_cvtsi64_si128(val);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_loadu_si64(mem_addr) simde_mm_loadu_si64(mem_addr)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_x_mm_set_epu8 (uint8_t e15, uint8_t e14, uint8_t e13, uint8_t e12,
+         uint8_t e11, uint8_t e10, uint8_t  e9, uint8_t  e8,
+         uint8_t  e7, uint8_t  e6, uint8_t  e5, uint8_t  e4,
+         uint8_t  e3, uint8_t  e2, uint8_t  e1, uint8_t  e0) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_set_epi8(
+      HEDLEY_STATIC_CAST(char, e15), HEDLEY_STATIC_CAST(char, e14), HEDLEY_STATIC_CAST(char, e13), HEDLEY_STATIC_CAST(char, e12),
+      HEDLEY_STATIC_CAST(char, e11), HEDLEY_STATIC_CAST(char, e10), HEDLEY_STATIC_CAST(char,  e9), HEDLEY_STATIC_CAST(char,  e8),
+      HEDLEY_STATIC_CAST(char,  e7), HEDLEY_STATIC_CAST(char,  e6), HEDLEY_STATIC_CAST(char,  e5), HEDLEY_STATIC_CAST(char,  e4),
+      HEDLEY_STATIC_CAST(char,  e3), HEDLEY_STATIC_CAST(char,  e2), HEDLEY_STATIC_CAST(char,  e1), HEDLEY_STATIC_CAST(char,  e0));
+  #else
+    simde__m128i_private r_;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      SIMDE_ALIGN_LIKE_16(uint8x16_t) uint8_t data[16] = {
+        e0,  e1,  e2,  e3,
+        e4,  e5,  e6,  e7,
+        e8,  e9,  e10, e11,
+        e12, e13, e14, e15};
+      r_.neon_u8 = vld1q_u8(data);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_u8x16_make(e0, e1, e2, e3, e4, e5, e6, e7, e8, e9, e10, e11, e12, e13, e14, e15);
+    #else
+      r_.u8[ 0] =  e0; r_.u8[ 1] =  e1; r_.u8[ 2] =  e2; r_.u8[ 3] =  e3;
+      r_.u8[ 4] =  e4; r_.u8[ 5] =  e5; r_.u8[ 6] =  e6; r_.u8[ 7] =  e7;
+      r_.u8[ 8] =  e8; r_.u8[ 9] =  e9; r_.u8[10] = e10; r_.u8[11] = e11;
+      r_.u8[12] = e12; r_.u8[13] = e13; r_.u8[14] = e14; r_.u8[15] = e15;
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_x_mm_set_epu16 (uint16_t e7, uint16_t e6, uint16_t e5, uint16_t e4,
+          uint16_t e3, uint16_t e2, uint16_t e1, uint16_t e0) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_set_epi16(
+      HEDLEY_STATIC_CAST(short,  e7), HEDLEY_STATIC_CAST(short,  e6), HEDLEY_STATIC_CAST(short,  e5), HEDLEY_STATIC_CAST(short,  e4),
+      HEDLEY_STATIC_CAST(short,  e3), HEDLEY_STATIC_CAST(short,  e2), HEDLEY_STATIC_CAST(short,  e1), HEDLEY_STATIC_CAST(short,  e0));
+  #else
+    simde__m128i_private r_;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      SIMDE_ALIGN_LIKE_16(uint16x8_t) uint16_t data[8] = { e0, e1, e2, e3, e4, e5, e6, e7 };
+      r_.neon_u16 = vld1q_u16(data);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_u16x8_make(e0, e1, e2, e3, e4, e5, e6, e7);
+    #else
+      r_.u16[0] = e0; r_.u16[1] = e1; r_.u16[2] = e2; r_.u16[3] = e3;
+      r_.u16[4] = e4; r_.u16[5] = e5; r_.u16[6] = e6; r_.u16[7] = e7;
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_x_mm_set_epu32 (uint32_t e3, uint32_t e2, uint32_t e1, uint32_t e0) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_set_epi32(
+      HEDLEY_STATIC_CAST(int,  e3), HEDLEY_STATIC_CAST(int,  e2), HEDLEY_STATIC_CAST(int,  e1), HEDLEY_STATIC_CAST(int,  e0));
+  #else
+    simde__m128i_private r_;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      SIMDE_ALIGN_LIKE_16(uint32x4_t) uint32_t data[4] = { e0, e1, e2, e3 };
+      r_.neon_u32 = vld1q_u32(data);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_u32x4_make(e0, e1, e2, e3);
+    #else
+      r_.u32[0] = e0;
+      r_.u32[1] = e1;
+      r_.u32[2] = e2;
+      r_.u32[3] = e3;
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_x_mm_set_epu64x (uint64_t e1, uint64_t e0) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,0,0))
+    return _mm_set_epi64x(HEDLEY_STATIC_CAST(int64_t,  e1), HEDLEY_STATIC_CAST(int64_t,  e0));
+  #else
+    simde__m128i_private r_;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      SIMDE_ALIGN_LIKE_16(uint64x2_t) uint64_t data[2] = {e0, e1};
+      r_.neon_u64 = vld1q_u64(data);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_u64x2_make(e0, e1);
+    #else
+      r_.u64[0] = e0;
+      r_.u64[1] = e1;
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_set_sd (simde_float64 a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_set_sd(a);
+  #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vsetq_lane_f64(a, vdupq_n_f64(SIMDE_FLOAT64_C(0.0)), 0);
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    return simde__m128d_from_wasm_v128(wasm_f64x2_make(a, 0));
+  #else
+    return simde_mm_set_pd(SIMDE_FLOAT64_C(0.0), a);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_set_sd(a) simde_mm_set_sd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_set1_epi8 (int8_t a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_set1_epi8(a);
+  #else
+    simde__m128i_private r_;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i8 = vdupq_n_s8(a);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i8x16_splat(a);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_i8 = vec_splats(HEDLEY_STATIC_CAST(signed char, a));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = a;
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_set1_epi8(a) simde_mm_set1_epi8(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_set1_epi16 (int16_t a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_set1_epi16(a);
+  #else
+    simde__m128i_private r_;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i16 = vdupq_n_s16(a);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i16x8_splat(a);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_i16 = vec_splats(HEDLEY_STATIC_CAST(signed short, a));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = a;
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_set1_epi16(a) simde_mm_set1_epi16(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_set1_epi32 (int32_t a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_set1_epi32(a);
+  #else
+    simde__m128i_private r_;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vdupq_n_s32(a);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i32x4_splat(a);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_i32 = vec_splats(HEDLEY_STATIC_CAST(signed int, a));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = a;
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_set1_epi32(a) simde_mm_set1_epi32(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_set1_epi64x (int64_t a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,0,0))
+    return _mm_set1_epi64x(a);
+  #else
+    simde__m128i_private r_;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i64 = vdupq_n_s64(a);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i64x2_splat(a);
+    #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_i64 = vec_splats(HEDLEY_STATIC_CAST(signed long long, a));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = a;
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_set1_epi64x(a) simde_mm_set1_epi64x(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_set1_epi64 (simde__m64 a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_set1_epi64(a);
+  #else
+    simde__m64_private a_ = simde__m64_to_private(a);
+    return simde_mm_set1_epi64x(a_.i64[0]);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_set1_epi64(a) simde_mm_set1_epi64(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_x_mm_set1_epu8 (uint8_t value) {
+  #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+    return simde__m128i_from_altivec_u8(vec_splats(HEDLEY_STATIC_CAST(unsigned char, value)));
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    return simde__m128i_from_wasm_v128(wasm_u8x16_splat(value));
+  #else
+    return simde_mm_set1_epi8(HEDLEY_STATIC_CAST(int8_t, value));
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_x_mm_set1_epu16 (uint16_t value) {
+  #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+    return simde__m128i_from_altivec_u16(vec_splats(HEDLEY_STATIC_CAST(unsigned short, value)));
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    return simde__m128i_from_wasm_v128(wasm_u16x8_splat(value));
+  #else
+    return simde_mm_set1_epi16(HEDLEY_STATIC_CAST(int16_t, value));
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_x_mm_set1_epu32 (uint32_t value) {
+  #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+    return simde__m128i_from_altivec_u32(vec_splats(HEDLEY_STATIC_CAST(unsigned int, value)));
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    return simde__m128i_from_wasm_v128(wasm_u32x4_splat(value));
+  #else
+    return simde_mm_set1_epi32(HEDLEY_STATIC_CAST(int32_t, value));
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_x_mm_set1_epu64 (uint64_t value) {
+  #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
+    return simde__m128i_from_altivec_u64(vec_splats(HEDLEY_STATIC_CAST(unsigned long long, value)));
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    return simde__m128i_from_wasm_v128(wasm_u64x2_splat(value));
+  #else
+    return simde_mm_set1_epi64x(HEDLEY_STATIC_CAST(int64_t, value));
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_setr_epi8 (int8_t e15, int8_t e14, int8_t e13, int8_t e12,
+        int8_t e11, int8_t e10, int8_t  e9, int8_t  e8,
+        int8_t  e7, int8_t  e6, int8_t  e5, int8_t  e4,
+        int8_t  e3, int8_t  e2, int8_t  e1, int8_t  e0) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_setr_epi8(
+      e15, e14, e13, e12, e11, e10,  e9,    e8,
+      e7,  e6,  e5,  e4,  e3,  e2,  e1,  e0);
+  #else
+    return simde_mm_set_epi8(
+      e0, e1, e2, e3, e4, e5, e6, e7,
+      e8, e9, e10, e11, e12, e13, e14, e15);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_setr_epi8(e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0) simde_mm_setr_epi8(e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_setr_epi16 (int16_t e7, int16_t e6, int16_t e5, int16_t e4,
+         int16_t e3, int16_t e2, int16_t e1, int16_t e0) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_setr_epi16(e7,  e6,  e5,  e4,  e3,  e2,  e1,  e0);
+  #else
+    return simde_mm_set_epi16(e0, e1, e2, e3, e4, e5, e6, e7);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_setr_epi16(e7, e6, e5, e4, e3, e2, e1, e0) simde_mm_setr_epi16(e7, e6, e5, e4, e3, e2, e1, e0)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_setr_epi32 (int32_t e3, int32_t e2, int32_t e1, int32_t e0) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_setr_epi32(e3, e2, e1, e0);
+  #else
+    return simde_mm_set_epi32(e0, e1, e2, e3);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_setr_epi32(e3, e2, e1, e0) simde_mm_setr_epi32(e3, e2, e1, e0)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_setr_epi64 (simde__m64 e1, simde__m64 e0) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_setr_epi64(e1, e0);
+  #else
+    return simde_mm_set_epi64(e0, e1);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_setr_epi64(e1, e0) (simde_mm_setr_epi64((e1), (e0)))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_setr_pd (simde_float64 e1, simde_float64 e0) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_setr_pd(e1, e0);
+  #else
+    return simde_mm_set_pd(e0, e1);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_setr_pd(e1, e0) simde_mm_setr_pd(e1, e0)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_setzero_pd (void) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_setzero_pd();
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    return simde__m128d_from_wasm_v128(wasm_f64x2_const(0.0, 0.0));
+  #else
+    return simde_mm_castsi128_pd(simde_mm_setzero_si128());
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_setzero_pd() simde_mm_setzero_pd()
+#endif
+
+#if defined(SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_)
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_undefined_pd (void) {
+  simde__m128d_private r_;
+
+  #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE__HAVE_UNDEFINED128)
+    r_.n = _mm_undefined_pd();
+  #elif !defined(SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_)
+    r_ = simde__m128d_to_private(simde_mm_setzero_pd());
+  #endif
+
+  return simde__m128d_from_private(r_);
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_undefined_pd() simde_mm_undefined_pd()
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_undefined_si128 (void) {
+  simde__m128i_private r_;
+
+  #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE__HAVE_UNDEFINED128)
+    r_.n = _mm_undefined_si128();
+  #elif !defined(SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_)
+    r_ = simde__m128i_to_private(simde_mm_setzero_si128());
+  #endif
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_undefined_si128() (simde_mm_undefined_si128())
+#endif
+
+#if defined(SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_)
+HEDLEY_DIAGNOSTIC_POP
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_x_mm_setone_pd (void) {
+  return simde_mm_castps_pd(simde_x_mm_setone_ps());
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_x_mm_setone_si128 (void) {
+  return simde_mm_castps_si128(simde_x_mm_setone_ps());
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_shuffle_epi32 (simde__m128i a, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255)  {
+  simde__m128i_private
+    r_,
+    a_ = simde__m128i_to_private(a);
+
+  for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+    r_.i32[i] = a_.i32[(imm8 >> (i * 2)) & 3];
+  }
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_SSE2_NATIVE)
+  #define simde_mm_shuffle_epi32(a, imm8) _mm_shuffle_epi32((a), (imm8))
+#elif defined(SIMDE_WASM_SIMD128_NATIVE)
+  #define simde_mm_shuffle_epi32(a, imm8) (__extension__ ({ \
+      const simde__m128i_private simde_tmp_a_ = simde__m128i_to_private(a); \
+      simde__m128i_from_wasm_v128( \
+        wasm_i32x4_shuffle( \
+          (simde_tmp_a_).wasm_v128, \
+          (simde_tmp_a_).wasm_v128, \
+          ((imm8)     ) & 3, \
+          ((imm8) >> 2) & 3, \
+          ((imm8) >> 4) & 3, \
+          ((imm8) >> 6) & 3)); }))
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_STATEMENT_EXPR_)
+  #define simde_mm_shuffle_epi32(a, imm8) \
+    (__extension__ ({ \
+      const int32x4_t simde_mm_shuffle_epi32_a_ = simde__m128i_to_neon_i32(a); \
+      int32x4_t simde_mm_shuffle_epi32_r_; \
+      simde_mm_shuffle_epi32_r_ = vmovq_n_s32(vgetq_lane_s32(simde_mm_shuffle_epi32_a_, (imm8) & (0x3))); \
+      simde_mm_shuffle_epi32_r_ = vsetq_lane_s32(vgetq_lane_s32(simde_mm_shuffle_epi32_a_, ((imm8) >> 2) & 0x3), simde_mm_shuffle_epi32_r_, 1); \
+      simde_mm_shuffle_epi32_r_ = vsetq_lane_s32(vgetq_lane_s32(simde_mm_shuffle_epi32_a_, ((imm8) >> 4) & 0x3), simde_mm_shuffle_epi32_r_, 2); \
+      simde_mm_shuffle_epi32_r_ = vsetq_lane_s32(vgetq_lane_s32(simde_mm_shuffle_epi32_a_, ((imm8) >> 6) & 0x3), simde_mm_shuffle_epi32_r_, 3); \
+      vreinterpretq_s64_s32(simde_mm_shuffle_epi32_r_); \
+    }))
+#elif defined(SIMDE_SHUFFLE_VECTOR_)
+  #define simde_mm_shuffle_epi32(a, imm8) (__extension__ ({ \
+      const simde__m128i_private simde_tmp_a_ = simde__m128i_to_private(a); \
+      simde__m128i_from_private((simde__m128i_private) { .i32 = \
+        SIMDE_SHUFFLE_VECTOR_(32, 16, \
+          (simde_tmp_a_).i32, \
+          (simde_tmp_a_).i32, \
+          ((imm8)     ) & 3, \
+          ((imm8) >> 2) & 3, \
+          ((imm8) >> 4) & 3, \
+          ((imm8) >> 6) & 3) }); }))
+#endif
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_shuffle_epi32(a, imm8) simde_mm_shuffle_epi32(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_shuffle_pd (simde__m128d a, simde__m128d b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 3)  {
+  simde__m128d_private
+    r_,
+    a_ = simde__m128d_to_private(a),
+    b_ = simde__m128d_to_private(b);
+
+  r_.f64[0] = ((imm8 & 1) == 0) ? a_.f64[0] : a_.f64[1];
+  r_.f64[1] = ((imm8 & 2) == 0) ? b_.f64[0] : b_.f64[1];
+
+  return simde__m128d_from_private(r_);
+}
+#if defined(SIMDE_X86_SSE2_NATIVE) && !defined(__PGI)
+  #define simde_mm_shuffle_pd(a, b, imm8) _mm_shuffle_pd((a), (b), (imm8))
+#elif defined(SIMDE_SHUFFLE_VECTOR_)
+  #define simde_mm_shuffle_pd(a, b, imm8) (__extension__ ({ \
+      simde__m128d_from_private((simde__m128d_private) { .f64 = \
+        SIMDE_SHUFFLE_VECTOR_(64, 16, \
+          simde__m128d_to_private(a).f64, \
+          simde__m128d_to_private(b).f64, \
+          (((imm8)     ) & 1), \
+          (((imm8) >> 1) & 1) + 2) }); }))
+#endif
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_shuffle_pd(a, b, imm8) simde_mm_shuffle_pd(a, b, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_shufflehi_epi16 (simde__m128i a, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255)  {
+  simde__m128i_private
+    r_,
+    a_ = simde__m128i_to_private(a);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < ((sizeof(a_.i16) / sizeof(a_.i16[0])) / 2) ; i++) {
+    r_.i16[i] = a_.i16[i];
+  }
+  for (size_t i = ((sizeof(a_.i16) / sizeof(a_.i16[0])) / 2) ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+    r_.i16[i] = a_.i16[((imm8 >> ((i - 4) * 2)) & 3) + 4];
+  }
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_SSE2_NATIVE)
+  #define simde_mm_shufflehi_epi16(a, imm8) _mm_shufflehi_epi16((a), (imm8))
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_STATEMENT_EXPR_)
+  #define simde_mm_shufflehi_epi16(a, imm8) \
+    (__extension__ ({ \
+      int16x8_t simde_mm_shufflehi_epi16_a_ = simde__m128i_to_neon_i16(a); \
+      int16x8_t simde_mm_shufflehi_epi16_r_ = simde_mm_shufflehi_epi16_a_; \
+      simde_mm_shufflehi_epi16_r_ = vsetq_lane_s16(vgetq_lane_s16(simde_mm_shufflehi_epi16_a_, (((imm8)     ) & 0x3) + 4), simde_mm_shufflehi_epi16_r_, 4); \
+      simde_mm_shufflehi_epi16_r_ = vsetq_lane_s16(vgetq_lane_s16(simde_mm_shufflehi_epi16_a_, (((imm8) >> 2) & 0x3) + 4), simde_mm_shufflehi_epi16_r_, 5); \
+      simde_mm_shufflehi_epi16_r_ = vsetq_lane_s16(vgetq_lane_s16(simde_mm_shufflehi_epi16_a_, (((imm8) >> 4) & 0x3) + 4), simde_mm_shufflehi_epi16_r_, 6); \
+      simde_mm_shufflehi_epi16_r_ = vsetq_lane_s16(vgetq_lane_s16(simde_mm_shufflehi_epi16_a_, (((imm8) >> 6) & 0x3) + 4), simde_mm_shufflehi_epi16_r_, 7); \
+      simde__m128i_from_neon_i16(simde_mm_shufflehi_epi16_r_); \
+    }))
+#elif defined(SIMDE_WASM_SIMD128_NATIVE)
+  #define simde_mm_shufflehi_epi16(a, imm8) (__extension__ ({ \
+      const simde__m128i_private simde_tmp_a_ = simde__m128i_to_private(a); \
+      simde__m128i_from_private((simde__m128i_private) { .wasm_v128 = \
+        wasm_i16x8_shuffle( \
+          (simde_tmp_a_).wasm_v128, \
+          (simde_tmp_a_).wasm_v128, \
+          0, 1, 2, 3, \
+          (((imm8)     ) & 3) + 4, \
+          (((imm8) >> 2) & 3) + 4, \
+          (((imm8) >> 4) & 3) + 4, \
+          (((imm8) >> 6) & 3) + 4) }); }))
+#elif defined(SIMDE_SHUFFLE_VECTOR_)
+  #define simde_mm_shufflehi_epi16(a, imm8) (__extension__ ({ \
+      const simde__m128i_private simde_tmp_a_ = simde__m128i_to_private(a); \
+      simde__m128i_from_private((simde__m128i_private) { .i16 = \
+        SIMDE_SHUFFLE_VECTOR_(16, 16, \
+          (simde_tmp_a_).i16, \
+          (simde_tmp_a_).i16, \
+          0, 1, 2, 3, \
+          (((imm8)     ) & 3) + 4, \
+          (((imm8) >> 2) & 3) + 4, \
+          (((imm8) >> 4) & 3) + 4, \
+          (((imm8) >> 6) & 3) + 4) }); }))
+#endif
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_shufflehi_epi16(a, imm8) simde_mm_shufflehi_epi16(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_shufflelo_epi16 (simde__m128i a, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255)  {
+  simde__m128i_private
+    r_,
+    a_ = simde__m128i_to_private(a);
+
+  for (size_t i = 0 ; i < ((sizeof(r_.i16) / sizeof(r_.i16[0])) / 2) ; i++) {
+    r_.i16[i] = a_.i16[((imm8 >> (i * 2)) & 3)];
+  }
+  SIMDE_VECTORIZE
+  for (size_t i = ((sizeof(a_.i16) / sizeof(a_.i16[0])) / 2) ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+    r_.i16[i] = a_.i16[i];
+  }
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_SSE2_NATIVE)
+  #define simde_mm_shufflelo_epi16(a, imm8) _mm_shufflelo_epi16((a), (imm8))
+#elif defined(SIMDE_WASM_SIMD128_NATIVE)
+  #define simde_mm_shufflelo_epi16(a, imm8) \
+    simde__m128i_from_wasm_v128(            \
+      wasm_i16x8_shuffle(                   \
+        simde__m128i_to_wasm_v128((a)),     \
+        wasm_i16x8_splat(0),                \
+        (((imm8) & 0x03)     ),             \
+        (((imm8) & 0x0c) >> 2),             \
+        (((imm8) & 0x30) >> 4),             \
+        (((imm8) & 0xc0) >> 6),             \
+        4, 5, 6, 7))
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_STATEMENT_EXPR_)
+  #define simde_mm_shufflelo_epi16(a, imm8) \
+    (__extension__({ \
+      int16x8_t simde_mm_shufflelo_epi16_a_ = simde__m128i_to_neon_i16(a); \
+      int16x8_t simde_mm_shufflelo_epi16_r_ = simde_mm_shufflelo_epi16_a_; \
+      simde_mm_shufflelo_epi16_r_ = vsetq_lane_s16(vgetq_lane_s16(simde_mm_shufflelo_epi16_a_, (((imm8)     ) & 0x3)), simde_mm_shufflelo_epi16_r_, 0); \
+      simde_mm_shufflelo_epi16_r_ = vsetq_lane_s16(vgetq_lane_s16(simde_mm_shufflelo_epi16_a_, (((imm8) >> 2) & 0x3)), simde_mm_shufflelo_epi16_r_, 1); \
+      simde_mm_shufflelo_epi16_r_ = vsetq_lane_s16(vgetq_lane_s16(simde_mm_shufflelo_epi16_a_, (((imm8) >> 4) & 0x3)), simde_mm_shufflelo_epi16_r_, 2); \
+      simde_mm_shufflelo_epi16_r_ = vsetq_lane_s16(vgetq_lane_s16(simde_mm_shufflelo_epi16_a_, (((imm8) >> 6) & 0x3)), simde_mm_shufflelo_epi16_r_, 3); \
+      simde__m128i_from_neon_i16(simde_mm_shufflelo_epi16_r_); \
+    }))
+#elif defined(SIMDE_SHUFFLE_VECTOR_)
+  #define simde_mm_shufflelo_epi16(a, imm8) (__extension__ ({ \
+      const simde__m128i_private simde_tmp_a_ = simde__m128i_to_private(a); \
+      simde__m128i_from_private((simde__m128i_private) { .i16 = \
+        SIMDE_SHUFFLE_VECTOR_(16, 16, \
+          (simde_tmp_a_).i16, \
+          (simde_tmp_a_).i16, \
+          (((imm8)     ) & 3), \
+          (((imm8) >> 2) & 3), \
+          (((imm8) >> 4) & 3), \
+          (((imm8) >> 6) & 3), \
+          4, 5, 6, 7) }); }))
+#endif
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_shufflelo_epi16(a, imm8) simde_mm_shufflelo_epi16(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_sll_epi16 (simde__m128i a, simde__m128i count) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_sll_epi16(a, count);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      count_ = simde__m128i_to_private(count);
+
+    if (count_.u64[0] > 15)
+      return simde_mm_setzero_si128();
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+      r_.u16 = (a_.u16 << count_.u64[0]);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u16 = vshlq_u16(a_.neon_u16, vdupq_n_s16(HEDLEY_STATIC_CAST(int16_t, count_.u64[0])));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = ((wasm_i64x2_extract_lane(count_.wasm_v128, 0) < 16) ? wasm_i16x8_shl(a_.wasm_v128, HEDLEY_STATIC_CAST(int32_t, wasm_i64x2_extract_lane(count_.wasm_v128, 0))) : wasm_i16x8_const(0,0,0,0,0,0,0,0));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+        r_.u16[i] = HEDLEY_STATIC_CAST(uint16_t, (a_.u16[i] << count_.u64[0]));
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_sll_epi16(a, count) simde_mm_sll_epi16((a), (count))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_sll_epi32 (simde__m128i a, simde__m128i count) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_sll_epi32(a, count);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      count_ = simde__m128i_to_private(count);
+
+    if (count_.u64[0] > 31)
+      return simde_mm_setzero_si128();
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+      r_.u32 = (a_.u32 << count_.u64[0]);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vshlq_u32(a_.neon_u32, vdupq_n_s32(HEDLEY_STATIC_CAST(int32_t, count_.u64[0])));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = ((wasm_i64x2_extract_lane(count_.wasm_v128, 0) < 32) ? wasm_i32x4_shl(a_.wasm_v128, HEDLEY_STATIC_CAST(int32_t, wasm_i64x2_extract_lane(count_.wasm_v128, 0))) : wasm_i32x4_const(0,0,0,0));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+        r_.u32[i] = HEDLEY_STATIC_CAST(uint32_t, (a_.u32[i] << count_.u64[0]));
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_sll_epi32(a, count) (simde_mm_sll_epi32(a, (count)))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_sll_epi64 (simde__m128i a, simde__m128i count) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_sll_epi64(a, count);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      count_ = simde__m128i_to_private(count);
+
+    if (count_.u64[0] > 63)
+      return simde_mm_setzero_si128();
+
+    const int_fast16_t s = HEDLEY_STATIC_CAST(int_fast16_t, count_.u64[0]);
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u64 = vshlq_u64(a_.neon_u64, vdupq_n_s64(HEDLEY_STATIC_CAST(int64_t, s)));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = (s < 64) ? wasm_i64x2_shl(a_.wasm_v128, HEDLEY_STATIC_CAST(uint32_t, s)) : wasm_i64x2_const(0,0);
+    #else
+      #if !defined(SIMDE_BUG_GCC_94488)
+        SIMDE_VECTORIZE
+      #endif
+      for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
+        r_.u64[i] = a_.u64[i] << s;
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_sll_epi64(a, count) (simde_mm_sll_epi64(a, (count)))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_sqrt_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_sqrt_pd(a);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f64 = vsqrtq_f64(a_.neon_f64);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f64x2_sqrt(a_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_f64 = vec_sqrt(a_.altivec_f64);
+    #elif defined(simde_math_sqrt)
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_sqrt(a_.f64[i]);
+      }
+    #else
+      HEDLEY_UNREACHABLE();
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_sqrt_pd(a) simde_mm_sqrt_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_sqrt_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_sqrt_sd(a, b);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+    return simde_mm_move_sd(a, simde_mm_sqrt_pd(b));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_sd(a, simde_mm_sqrt_pd(simde_x_mm_broadcastlow_pd(b)));
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(simde_math_sqrt)
+      r_.f64[0] = simde_math_sqrt(b_.f64[0]);
+      r_.f64[1] = a_.f64[1];
+    #else
+      HEDLEY_UNREACHABLE();
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_sqrt_sd(a, b) simde_mm_sqrt_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_srl_epi16 (simde__m128i a, simde__m128i count) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_srl_epi16(a, count);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      count_ = simde__m128i_to_private(count);
+
+    const int cnt = HEDLEY_STATIC_CAST(int, (count_.i64[0] > 16 ? 16 : count_.i64[0]));
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u16 = vshlq_u16(a_.neon_u16, vdupq_n_s16(HEDLEY_STATIC_CAST(int16_t, -cnt)));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+        r_.u16[i] = a_.u16[i] >> cnt;
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_srl_epi16(a, count) (simde_mm_srl_epi16(a, (count)))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_srl_epi32 (simde__m128i a, simde__m128i count) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_srl_epi32(a, count);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      count_ = simde__m128i_to_private(count);
+
+    const int cnt = HEDLEY_STATIC_CAST(int, (count_.i64[0] > 32 ? 32 : count_.i64[0]));
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vshlq_u32(a_.neon_u32, vdupq_n_s32(HEDLEY_STATIC_CAST(int32_t, -cnt)));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_u32x4_shr(a_.wasm_v128, HEDLEY_STATIC_CAST(uint32_t, cnt));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+        r_.u32[i] = a_.u32[i] >> cnt;
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_srl_epi32(a, count) (simde_mm_srl_epi32(a, (count)))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_srl_epi64 (simde__m128i a, simde__m128i count) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_srl_epi64(a, count);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      count_ = simde__m128i_to_private(count);
+
+    const int cnt = HEDLEY_STATIC_CAST(int, (count_.i64[0] > 64 ? 64 : count_.i64[0]));
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u64 = vshlq_u64(a_.neon_u64, vdupq_n_s64(HEDLEY_STATIC_CAST(int64_t, -cnt)));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_u64x2_shr(a_.wasm_v128, HEDLEY_STATIC_CAST(uint32_t, cnt));
+    #else
+      #if !defined(SIMDE_BUG_GCC_94488)
+        SIMDE_VECTORIZE
+      #endif
+      for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
+        r_.u64[i] = a_.u64[i] >> cnt;
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_srl_epi64(a, count) (simde_mm_srl_epi64(a, (count)))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_srai_epi16 (simde__m128i a, const int imm8)
+    SIMDE_REQUIRE_RANGE(imm8, 0, 255) {
+  /* MSVC requires a range of (0, 255). */
+  simde__m128i_private
+    r_,
+    a_ = simde__m128i_to_private(a);
+
+  const int cnt = (imm8 & ~15) ? 15 : imm8;
+
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    r_.neon_i16 = vshlq_s16(a_.neon_i16, vdupq_n_s16(HEDLEY_STATIC_CAST(int16_t, -cnt)));
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    r_.wasm_v128 = wasm_i16x8_shr(a_.wasm_v128, HEDLEY_STATIC_CAST(uint32_t, cnt));
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_) / sizeof(r_.i16[0])) ; i++) {
+      r_.i16[i] = a_.i16[i] >> cnt;
+    }
+  #endif
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_SSE2_NATIVE)
+  #define simde_mm_srai_epi16(a, imm8) _mm_srai_epi16((a), (imm8))
+#endif
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_srai_epi16(a, imm8) simde_mm_srai_epi16(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_srai_epi32 (simde__m128i a, const int imm8)
+    SIMDE_REQUIRE_RANGE(imm8, 0, 255) {
+  /* MSVC requires a range of (0, 255). */
+  simde__m128i_private
+    r_,
+    a_ = simde__m128i_to_private(a);
+
+  const int cnt = (imm8 & ~31) ? 31 : imm8;
+
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    r_.neon_i32 = vshlq_s32(a_.neon_i32, vdupq_n_s32(-cnt));
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    r_.wasm_v128 = wasm_i32x4_shr(a_.wasm_v128, HEDLEY_STATIC_CAST(uint32_t, cnt));
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_) / sizeof(r_.i32[0])) ; i++) {
+      r_.i32[i] = a_.i32[i] >> cnt;
+    }
+  #endif
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_SSE2_NATIVE)
+  #define simde_mm_srai_epi32(a, imm8) _mm_srai_epi32((a), (imm8))
+#endif
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_srai_epi32(a, imm8) simde_mm_srai_epi32(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_sra_epi16 (simde__m128i a, simde__m128i count) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_sra_epi16(a, count);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      count_ = simde__m128i_to_private(count);
+
+    const int cnt = HEDLEY_STATIC_CAST(int, (count_.i64[0] > 15 ? 15 : count_.i64[0]));
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i16 = vshlq_s16(a_.neon_i16, vdupq_n_s16(HEDLEY_STATIC_CAST(int16_t, -cnt)));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i16x8_shr(a_.wasm_v128, HEDLEY_STATIC_CAST(uint32_t, cnt));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = a_.i16[i] >> cnt;
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_sra_epi16(a, count) (simde_mm_sra_epi16(a, count))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_sra_epi32 (simde__m128i a, simde__m128i count) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && !defined(SIMDE_BUG_GCC_BAD_MM_SRA_EPI32)
+    return _mm_sra_epi32(a, count);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      count_ = simde__m128i_to_private(count);
+
+    const int cnt = count_.u64[0] > 31 ? 31 : HEDLEY_STATIC_CAST(int, count_.u64[0]);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vshlq_s32(a_.neon_i32, vdupq_n_s32(HEDLEY_STATIC_CAST(int32_t, -cnt)));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i32x4_shr(a_.wasm_v128, HEDLEY_STATIC_CAST(uint32_t, cnt));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = a_.i32[i] >> cnt;
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_sra_epi32(a, count) (simde_mm_sra_epi32(a, (count)))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_slli_epi16 (simde__m128i a, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255)  {
+  if (HEDLEY_UNLIKELY((imm8 > 15))) {
+    return simde_mm_setzero_si128();
+  }
+
+  simde__m128i_private
+    r_,
+    a_ = simde__m128i_to_private(a);
+
+  #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+    r_.i16 = a_.i16 << SIMDE_CAST_VECTOR_SHIFT_COUNT(8, imm8 & 0xff);
+  #else
+    const int s = (imm8 > HEDLEY_STATIC_CAST(int, sizeof(r_.i16[0]) * CHAR_BIT) - 1) ? 0 : imm8;
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+      r_.i16[i] = HEDLEY_STATIC_CAST(int16_t, a_.i16[i] << s);
+    }
+  #endif
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_SSE2_NATIVE)
+  #define simde_mm_slli_epi16(a, imm8) _mm_slli_epi16(a, imm8)
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_mm_slli_epi16(a, imm8) \
+    (((imm8) <= 0) ? \
+      (a) : \
+      simde__m128i_from_neon_i16( \
+        ((imm8) > 15) ? \
+          vandq_s16(simde__m128i_to_neon_i16(a), vdupq_n_s16(0)) : \
+          vshlq_n_s16(simde__m128i_to_neon_i16(a), ((imm8) & 15))))
+#elif defined(SIMDE_WASM_SIMD128_NATIVE)
+  #define simde_mm_slli_epi16(a, imm8) \
+    ((imm8 < 16) ? wasm_i16x8_shl(simde__m128i_to_private(a).wasm_v128, imm8) : wasm_i16x8_const(0,0,0,0,0,0,0,0))
+#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+  #define simde_mm_slli_epi16(a, imm8) \
+    ((imm8 & ~15) ? simde_mm_setzero_si128() : simde__m128i_from_altivec_i16(vec_sl(simde__m128i_to_altivec_i16(a), vec_splat_u16(HEDLEY_STATIC_CAST(unsigned short, imm8)))))
+#endif
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_slli_epi16(a, imm8) simde_mm_slli_epi16(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_slli_epi32 (simde__m128i a, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255)  {
+  if (HEDLEY_UNLIKELY((imm8 > 31))) {
+    return simde_mm_setzero_si128();
+  }
+  simde__m128i_private
+    r_,
+    a_ = simde__m128i_to_private(a);
+
+  #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+    r_.i32 = a_.i32 << imm8;
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+      r_.i32[i] = a_.i32[i] << (imm8 & 0xff);
+    }
+  #endif
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_SSE2_NATIVE)
+  #define simde_mm_slli_epi32(a, imm8) _mm_slli_epi32(a, imm8)
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_mm_slli_epi32(a, imm8) \
+    (((imm8) <= 0) ? \
+      (a) : \
+      simde__m128i_from_neon_i32( \
+        ((imm8) > 31) ? \
+          vandq_s32(simde__m128i_to_neon_i32(a), vdupq_n_s32(0)) : \
+          vshlq_n_s32(simde__m128i_to_neon_i32(a), ((imm8) & 31))))
+#elif defined(SIMDE_WASM_SIMD128_NATIVE)
+  #define simde_mm_slli_epi32(a, imm8) \
+    ((imm8 < 32) ? wasm_i32x4_shl(simde__m128i_to_private(a).wasm_v128, imm8) : wasm_i32x4_const(0,0,0,0))
+#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+  #define simde_mm_slli_epi32(a, imm8) \
+     (__extension__ ({ \
+       simde__m128i ret; \
+       if ((imm8) <= 0) { \
+         ret = a; \
+       } else if ((imm8) > 31) { \
+         ret = simde_mm_setzero_si128(); \
+       } else { \
+         ret = simde__m128i_from_altivec_i32( \
+           vec_sl(simde__m128i_to_altivec_i32(a), \
+             vec_splats(HEDLEY_STATIC_CAST(unsigned int, (imm8) & 31)))); \
+       } \
+       ret; \
+     }))
+#endif
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_slli_epi32(a, imm8) simde_mm_slli_epi32(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_slli_epi64 (simde__m128i a, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255)  {
+  if (HEDLEY_UNLIKELY((imm8 > 63))) {
+    return simde_mm_setzero_si128();
+  }
+  simde__m128i_private
+    r_,
+    a_ = simde__m128i_to_private(a);
+
+  #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+    r_.i64 = a_.i64 << imm8;
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+      r_.i64[i] = a_.i64[i] << (imm8 & 0xff);
+    }
+  #endif
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_SSE2_NATIVE)
+  #define simde_mm_slli_epi64(a, imm8) _mm_slli_epi64(a, imm8)
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_mm_slli_epi64(a, imm8) \
+    (((imm8) <= 0) ? \
+      (a) : \
+      simde__m128i_from_neon_i64( \
+        ((imm8) > 63) ? \
+          vandq_s64(simde__m128i_to_neon_i64(a), vdupq_n_s64(0)) : \
+          vshlq_n_s64(simde__m128i_to_neon_i64(a), ((imm8) & 63))))
+#elif defined(SIMDE_WASM_SIMD128_NATIVE)
+  #define simde_mm_slli_epi64(a, imm8) \
+    ((imm8 < 64) ? wasm_i64x2_shl(simde__m128i_to_private(a).wasm_v128, imm8) : wasm_i64x2_const(0,0))
+#endif
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_slli_epi64(a, imm8) simde_mm_slli_epi64(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_srli_epi16 (simde__m128i a, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255)  {
+  if (HEDLEY_UNLIKELY((imm8 > 15))) {
+    return simde_mm_setzero_si128();
+  }
+  simde__m128i_private
+    r_,
+    a_ = simde__m128i_to_private(a);
+
+  #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+    r_.u16 = a_.u16 >> SIMDE_CAST_VECTOR_SHIFT_COUNT(8, imm8);
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+      r_.u16[i] = a_.u16[i] >> (imm8 & 0xff);
+    }
+  #endif
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_SSE2_NATIVE)
+  #define simde_mm_srli_epi16(a, imm8) _mm_srli_epi16(a, imm8)
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_mm_srli_epi16(a, imm8) \
+    (((imm8) <= 0) ? \
+      (a) : \
+      simde__m128i_from_neon_u16( \
+        ((imm8) > 15) ? \
+          vandq_u16(simde__m128i_to_neon_u16(a), vdupq_n_u16(0)) : \
+          vshrq_n_u16(simde__m128i_to_neon_u16(a), ((imm8) & 15) | (((imm8) & 15) == 0))))
+#elif defined(SIMDE_WASM_SIMD128_NATIVE)
+  #define simde_mm_srli_epi16(a, imm8) \
+    ((imm8 < 16) ? wasm_u16x8_shr(simde__m128i_to_private(a).wasm_v128, imm8) : wasm_i16x8_const(0,0,0,0,0,0,0,0))
+#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+  #define simde_mm_srli_epi16(a, imm8) \
+    ((imm8 & ~15) ? simde_mm_setzero_si128() : simde__m128i_from_altivec_i16(vec_sr(simde__m128i_to_altivec_i16(a), vec_splat_u16(HEDLEY_STATIC_CAST(unsigned short, imm8)))))
+#endif
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_srli_epi16(a, imm8) simde_mm_srli_epi16(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_srli_epi32 (simde__m128i a, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255)  {
+  if (HEDLEY_UNLIKELY((imm8 > 31))) {
+    return simde_mm_setzero_si128();
+  }
+  simde__m128i_private
+    r_,
+    a_ = simde__m128i_to_private(a);
+
+  #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+    r_.u32 = a_.u32 >> SIMDE_CAST_VECTOR_SHIFT_COUNT(8, imm8 & 0xff);
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+      r_.u32[i] = a_.u32[i] >> (imm8 & 0xff);
+    }
+  #endif
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_SSE2_NATIVE)
+  #define simde_mm_srli_epi32(a, imm8) _mm_srli_epi32(a, imm8)
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_mm_srli_epi32(a, imm8) \
+    (((imm8) <= 0) ? \
+      (a) : \
+      simde__m128i_from_neon_u32( \
+        ((imm8) > 31) ? \
+          vandq_u32(simde__m128i_to_neon_u32(a), vdupq_n_u32(0)) : \
+          vshrq_n_u32(simde__m128i_to_neon_u32(a), ((imm8) & 31) | (((imm8) & 31) == 0))))
+#elif defined(SIMDE_WASM_SIMD128_NATIVE)
+  #define simde_mm_srli_epi32(a, imm8) \
+    ((imm8 < 32) ? wasm_u32x4_shr(simde__m128i_to_private(a).wasm_v128, imm8) : wasm_i32x4_const(0,0,0,0))
+#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+  #define simde_mm_srli_epi32(a, imm8) \
+    (__extension__ ({ \
+        simde__m128i ret; \
+        if ((imm8) <= 0) { \
+            ret = a; \
+        } else if ((imm8) > 31) { \
+            ret = simde_mm_setzero_si128(); \
+        } else { \
+            ret = simde__m128i_from_altivec_i32( \
+              vec_sr(simde__m128i_to_altivec_i32(a), \
+                vec_splats(HEDLEY_STATIC_CAST(unsigned int, (imm8) & 31)))); \
+        } \
+        ret; \
+    }))
+#endif
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_srli_epi32(a, imm8) simde_mm_srli_epi32(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_srli_epi64 (simde__m128i a, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255)  {
+  simde__m128i_private
+    r_,
+    a_ = simde__m128i_to_private(a);
+
+  if (HEDLEY_UNLIKELY((imm8 & 63) != imm8))
+    return simde_mm_setzero_si128();
+
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    r_.neon_u64 = vshlq_u64(a_.neon_u64, vdupq_n_s64(-imm8));
+  #else
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && !defined(SIMDE_BUG_GCC_94488)
+      r_.u64 = a_.u64 >> SIMDE_CAST_VECTOR_SHIFT_COUNT(8, imm8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.u64[i] = a_.u64[i] >> imm8;
+      }
+    #endif
+  #endif
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_SSE2_NATIVE)
+  #define simde_mm_srli_epi64(a, imm8) _mm_srli_epi64(a, imm8)
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_mm_srli_epi64(a, imm8) \
+    (((imm8) <= 0) ? \
+      (a) : \
+      simde__m128i_from_neon_u64( \
+        ((imm8) > 63) ? \
+          vandq_u64(simde__m128i_to_neon_u64(a), vdupq_n_u64(0)) : \
+          vshrq_n_u64(simde__m128i_to_neon_u64(a), ((imm8) & 63) | (((imm8) & 63) == 0))))
+#elif defined(SIMDE_WASM_SIMD128_NATIVE)
+  #define simde_mm_srli_epi64(a, imm8) \
+    ((imm8 < 64) ? wasm_u64x2_shr(simde__m128i_to_private(a).wasm_v128, imm8) : wasm_i64x2_const(0,0))
+#endif
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_srli_epi64(a, imm8) simde_mm_srli_epi64(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_store_pd (simde_float64 mem_addr[HEDLEY_ARRAY_PARAM(2)], simde__m128d a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    _mm_store_pd(mem_addr, a);
+  #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    vst1q_f64(mem_addr, simde__m128d_to_private(a).neon_f64);
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    vst1q_s64(HEDLEY_REINTERPRET_CAST(int64_t*, mem_addr), simde__m128d_to_private(a).neon_i64);
+  #else
+    simde_memcpy(SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m128d), &a, sizeof(a));
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_store_pd(mem_addr, a) simde_mm_store_pd(HEDLEY_REINTERPRET_CAST(double*, mem_addr), a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_store1_pd (simde_float64 mem_addr[HEDLEY_ARRAY_PARAM(2)], simde__m128d a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    _mm_store1_pd(mem_addr, a);
+  #else
+    simde__m128d_private a_ = simde__m128d_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      vst1q_f64(mem_addr, vdupq_laneq_f64(a_.neon_f64, 0));
+    #else
+      mem_addr[0] = a_.f64[0];
+      mem_addr[1] = a_.f64[0];
+    #endif
+  #endif
+}
+#define simde_mm_store_pd1(mem_addr, a) simde_mm_store1_pd(HEDLEY_REINTERPRET_CAST(double*, mem_addr), a)
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_store1_pd(mem_addr, a) simde_mm_store1_pd(HEDLEY_REINTERPRET_CAST(double*, mem_addr), a)
+  #define _mm_store_pd1(mem_addr, a) simde_mm_store_pd1(HEDLEY_REINTERPRET_CAST(double*, mem_addr), a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_store_sd (simde_float64* mem_addr, simde__m128d a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    _mm_store_sd(mem_addr, a);
+  #else
+    simde__m128d_private a_ = simde__m128d_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      const simde_float64 v = vgetq_lane_f64(a_.neon_f64, 0);
+      simde_memcpy(mem_addr, &v, sizeof(v));
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      const int64_t v = vgetq_lane_s64(a_.neon_i64, 0);
+      simde_memcpy(HEDLEY_REINTERPRET_CAST(int64_t*, mem_addr), &v, sizeof(v));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      wasm_v128_store64_lane(HEDLEY_REINTERPRET_CAST(void*, mem_addr), a_.wasm_v128, 0);
+    #else
+      simde_float64 v = a_.f64[0];
+      simde_memcpy(mem_addr, &v, sizeof(simde_float64));
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_store_sd(mem_addr, a) simde_mm_store_sd(HEDLEY_REINTERPRET_CAST(double*, mem_addr), a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_store_si128 (simde__m128i* mem_addr, simde__m128i a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    _mm_store_si128(HEDLEY_STATIC_CAST(__m128i*, mem_addr), a);
+  #else
+    simde__m128i_private a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      vst1q_s32(HEDLEY_REINTERPRET_CAST(int32_t*, mem_addr), a_.neon_i32);
+    #else
+      simde_memcpy(SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m128i), &a_, sizeof(a_));
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_store_si128(mem_addr, a) simde_mm_store_si128(mem_addr, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+  simde_mm_storeh_pd (simde_float64* mem_addr, simde__m128d a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    _mm_storeh_pd(mem_addr, a);
+  #else
+    simde__m128d_private a_ = simde__m128d_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      *mem_addr = vgetq_lane_f64(a_.neon_f64, 1);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+       wasm_v128_store64_lane(HEDLEY_REINTERPRET_CAST(void*, mem_addr), a_.wasm_v128, 1);
+    #else
+      *mem_addr = a_.f64[1];
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_storeh_pd(mem_addr, a) simde_mm_storeh_pd(HEDLEY_REINTERPRET_CAST(double*, mem_addr), a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_storel_epi64 (simde__m128i* mem_addr, simde__m128i a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    _mm_storel_epi64(HEDLEY_STATIC_CAST(__m128i*, mem_addr), a);
+  #else
+    simde__m128i_private a_ = simde__m128i_to_private(a);
+    int64_t tmp;
+
+    /* memcpy to prevent aliasing, tmp because we can't take the
+     * address of a vector element. */
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      tmp = vgetq_lane_s64(a_.neon_i64, 0);
+    #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
+      #if defined(SIMDE_BUG_GCC_95227)
+        (void) a_;
+      #endif
+      tmp = vec_extract(a_.altivec_i64, 0);
+    #else
+      tmp = a_.i64[0];
+    #endif
+
+    simde_memcpy(mem_addr, &tmp, sizeof(tmp));
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_storel_epi64(mem_addr, a) simde_mm_storel_epi64(mem_addr, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_storel_pd (simde_float64* mem_addr, simde__m128d a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    _mm_storel_pd(mem_addr, a);
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    wasm_v128_store64_lane(HEDLEY_REINTERPRET_CAST(void*, mem_addr), simde__m128d_to_wasm_v128(a), 0);
+  #else
+    simde__m128d_private a_ = simde__m128d_to_private(a);
+
+    simde_float64 tmp;
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      tmp = vgetq_lane_f64(a_.neon_f64, 0);
+    #else
+      tmp = a_.f64[0];
+    #endif
+    simde_memcpy(mem_addr, &tmp, sizeof(tmp));
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_storel_pd(mem_addr, a) simde_mm_storel_pd(HEDLEY_REINTERPRET_CAST(double*, mem_addr), a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_storer_pd (simde_float64 mem_addr[2], simde__m128d a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    _mm_storer_pd(mem_addr, a);
+  #else
+    simde__m128d_private a_ = simde__m128d_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      vst1q_s64(HEDLEY_REINTERPRET_CAST(int64_t*, mem_addr), vextq_s64(a_.neon_i64, a_.neon_i64, 1));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      a_.wasm_v128 = wasm_i64x2_shuffle(a_.wasm_v128, a_.wasm_v128, 1, 0);
+      simde_mm_store_pd(mem_addr, simde__m128d_from_private(a_));
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      a_.f64 = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.f64, a_.f64, 1, 0);
+      simde_mm_store_pd(mem_addr, simde__m128d_from_private(a_));
+    #else
+      mem_addr[0] = a_.f64[1];
+      mem_addr[1] = a_.f64[0];
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_storer_pd(mem_addr, a) simde_mm_storer_pd(HEDLEY_REINTERPRET_CAST(double*, mem_addr), a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_storeu_pd (simde_float64* mem_addr, simde__m128d a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    _mm_storeu_pd(mem_addr, a);
+  #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    vst1q_f64(mem_addr, simde__m128d_to_private(a).neon_f64);
+  #else
+    simde_memcpy(mem_addr, &a, sizeof(a));
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_storeu_pd(mem_addr, a) simde_mm_storeu_pd(HEDLEY_REINTERPRET_CAST(double*, mem_addr), a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_storeu_si128 (void* mem_addr, simde__m128i a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    _mm_storeu_si128(HEDLEY_STATIC_CAST(__m128i*, mem_addr), a);
+  #else
+    simde_memcpy(mem_addr, &a, sizeof(a));
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_storeu_si128(mem_addr, a) simde_mm_storeu_si128(mem_addr, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_storeu_si16 (void* mem_addr, simde__m128i a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && ( \
+      SIMDE_DETECT_CLANG_VERSION_CHECK(8,0,0) || \
+      HEDLEY_GCC_VERSION_CHECK(11,0,0) || \
+      HEDLEY_INTEL_VERSION_CHECK(20,21,1))
+    _mm_storeu_si16(mem_addr, a);
+  #else
+    int16_t val = simde_x_mm_cvtsi128_si16(a);
+    simde_memcpy(mem_addr, &val, sizeof(val));
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_storeu_si16(mem_addr, a) simde_mm_storeu_si16(mem_addr, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_storeu_si32 (void* mem_addr, simde__m128i a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && ( \
+      SIMDE_DETECT_CLANG_VERSION_CHECK(8,0,0) || \
+      HEDLEY_GCC_VERSION_CHECK(11,0,0) || \
+      HEDLEY_INTEL_VERSION_CHECK(20,21,1))
+    _mm_storeu_si32(mem_addr, a);
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    wasm_v128_store32_lane(mem_addr, simde__m128i_to_wasm_v128(a), 0);
+  #else
+    int32_t val = simde_mm_cvtsi128_si32(a);
+    simde_memcpy(mem_addr, &val, sizeof(val));
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_storeu_si32(mem_addr, a) simde_mm_storeu_si32(mem_addr, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_storeu_si64 (void* mem_addr, simde__m128i a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && ( \
+      SIMDE_DETECT_CLANG_VERSION_CHECK(8,0,0) || \
+      HEDLEY_GCC_VERSION_CHECK(11,0,0) || \
+      HEDLEY_INTEL_VERSION_CHECK(20,21,1))
+    _mm_storeu_si64(mem_addr, a);
+  #else
+    int64_t val = simde_mm_cvtsi128_si64(a);
+    simde_memcpy(mem_addr, &val, sizeof(val));
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_storeu_si64(mem_addr, a) simde_mm_storeu_si64(mem_addr, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_stream_pd (simde_float64 mem_addr[HEDLEY_ARRAY_PARAM(2)], simde__m128d a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    _mm_stream_pd(mem_addr, a);
+  #elif HEDLEY_HAS_BUILTIN(__builtin_nontemporal_store) && ( \
+      defined(SIMDE_VECTOR_SUBSCRIPT) || defined(SIMDE_ARM_NEON_A64V8_NATIVE) || \
+      defined(SIMDE_WASM_SIMD128_NATIVE) || defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || \
+      defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE))
+      __builtin_nontemporal_store(a, SIMDE_ALIGN_CAST(__typeof__(a)*, mem_addr));
+  #else
+    simde_mm_store_pd(mem_addr, a);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_stream_pd(mem_addr, a) simde_mm_stream_pd(HEDLEY_REINTERPRET_CAST(double*, mem_addr), a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_stream_si128 (simde__m128i* mem_addr, simde__m128i a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_ARCH_AMD64)
+    _mm_stream_si128(HEDLEY_STATIC_CAST(__m128i*, mem_addr), a);
+  #elif HEDLEY_HAS_BUILTIN(__builtin_nontemporal_store) && ( \
+      defined(SIMDE_VECTOR_SUBSCRIPT) || defined(SIMDE_ARM_NEON_A32V7_NATIVE) || \
+      defined(SIMDE_WASM_SIMD128_NATIVE) || defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || \
+      defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE))
+      __builtin_nontemporal_store(a, SIMDE_ALIGN_CAST(__typeof__(a)*, mem_addr));
+  #else
+    simde_mm_store_si128(mem_addr, a);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_stream_si128(mem_addr, a) simde_mm_stream_si128(mem_addr, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_stream_si32 (int32_t* mem_addr, int32_t a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    _mm_stream_si32(mem_addr, a);
+  #elif HEDLEY_HAS_BUILTIN(__builtin_nontemporal_store)
+    __builtin_nontemporal_store(a, mem_addr);
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    vst1q_lane_s32(mem_addr, vdupq_n_s32(a), 0);
+  #else
+    *mem_addr = a;
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_stream_si32(mem_addr, a) simde_mm_stream_si32(mem_addr, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_stream_si64 (int64_t* mem_addr, int64_t a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_ARCH_AMD64) && !defined(HEDLEY_MSVC_VERSION)
+    _mm_stream_si64(SIMDE_CHECKED_REINTERPRET_CAST(long long int*, int64_t*, mem_addr), a);
+  #elif HEDLEY_HAS_BUILTIN(__builtin_nontemporal_store)
+    __builtin_nontemporal_store(a, mem_addr);
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    vst1_s64(mem_addr, vdup_n_s64(a));
+  #else
+    *mem_addr = a;
+  #endif
+}
+#define simde_mm_stream_si64x(mem_addr, a) simde_mm_stream_si64(mem_addr, a)
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARCH_AMD64))
+  #define _mm_stream_si64(mem_addr, a) simde_mm_stream_si64(SIMDE_CHECKED_REINTERPRET_CAST(int64_t*, __int64*, mem_addr), a)
+  #define _mm_stream_si64x(mem_addr, a) simde_mm_stream_si64(SIMDE_CHECKED_REINTERPRET_CAST(int64_t*, __int64*, mem_addr), a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_sub_epi8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_sub_epi8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i8 = vsubq_s8(a_.neon_i8, b_.neon_i8);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i8x16_sub(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i8 = a_.i8 - b_.i8;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = a_.i8[i] - b_.i8[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_sub_epi8(a, b) simde_mm_sub_epi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_sub_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_sub_epi16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i16 = vsubq_s16(a_.neon_i16, b_.neon_i16);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i16x8_sub(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i16 = a_.i16 - b_.i16;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = a_.i16[i] - b_.i16[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_sub_epi16(a, b) simde_mm_sub_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_sub_epi32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_sub_epi32(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vsubq_s32(a_.neon_i32, b_.neon_i32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i32x4_sub(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32 = a_.i32 - b_.i32;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = a_.i32[i] - b_.i32[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_sub_epi32(a, b) simde_mm_sub_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_sub_epi64 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_sub_epi64(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i64 = vsubq_s64(a_.neon_i64, b_.neon_i64);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i64x2_sub(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i64 = a_.i64 - b_.i64;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = a_.i64[i] - b_.i64[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_sub_epi64(a, b) simde_mm_sub_epi64(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_x_mm_sub_epu32 (simde__m128i a, simde__m128i b) {
+  simde__m128i_private
+    r_,
+    a_ = simde__m128i_to_private(a),
+    b_ = simde__m128i_to_private(b);
+
+  #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+    r_.u32 = a_.u32 - b_.u32;
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    r_.neon_u32 = vsubq_u32(a_.neon_u32, b_.neon_u32);
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+      r_.u32[i] = a_.u32[i] - b_.u32[i];
+    }
+  #endif
+
+  return simde__m128i_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_sub_pd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_sub_pd(a, b);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.f64 = a_.f64 - b_.f64;
+    #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f64 = vsubq_f64(a_.neon_f64, b_.neon_f64);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f64x2_sub(a_.wasm_v128, b_.wasm_v128);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = a_.f64[i] - b_.f64[i];
+      }
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_sub_pd(a, b) simde_mm_sub_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_sub_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_sub_sd(a, b);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+    return simde_mm_move_sd(a, simde_mm_sub_pd(a, b));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_sd(a, simde_mm_sub_pd(simde_x_mm_broadcastlow_pd(a), simde_x_mm_broadcastlow_pd(b)));
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    r_.f64[0] = a_.f64[0] - b_.f64[0];
+    r_.f64[1] = a_.f64[1];
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_sub_sd(a, b) simde_mm_sub_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_sub_si64 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_sub_si64(a, b);
+  #else
+    simde__m64_private
+      r_,
+      a_ = simde__m64_to_private(a),
+      b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i64 = a_.i64 - b_.i64;
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i64 = vsub_s64(a_.neon_i64, b_.neon_i64);
+    #else
+      r_.i64[0] = a_.i64[0] - b_.i64[0];
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_sub_si64(a, b) simde_mm_sub_si64(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_subs_epi8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_subs_epi8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i8 = vqsubq_s8(a_.neon_i8, b_.neon_i8);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i8x16_sub_sat(a_.wasm_v128, b_.wasm_v128);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = simde_math_subs_i8(a_.i8[i], b_.i8[i]);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_subs_epi8(a, b) simde_mm_subs_epi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_subs_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_subs_epi16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i16 = vqsubq_s16(a_.neon_i16, b_.neon_i16);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i16x8_sub_sat(a_.wasm_v128, b_.wasm_v128);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = simde_math_subs_i16(a_.i16[i], b_.i16[i]);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_subs_epi16(a, b) simde_mm_subs_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_subs_epu8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_subs_epu8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u8 = vqsubq_u8(a_.neon_u8, b_.neon_u8);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_u8x16_sub_sat(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_u8 = vec_subs(a_.altivec_u8, b_.altivec_u8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_) / sizeof(r_.u8[0])) ; i++) {
+        r_.u8[i] = simde_math_subs_u8(a_.u8[i], b_.u8[i]);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_subs_epu8(a, b) simde_mm_subs_epu8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_subs_epu16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_subs_epu16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u16 = vqsubq_u16(a_.neon_u16, b_.neon_u16);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_u16x8_sub_sat(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_u16 = vec_subs(a_.altivec_u16, b_.altivec_u16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_) / sizeof(r_.u16[0])) ; i++) {
+        r_.u16[i] = simde_math_subs_u16(a_.u16[i], b_.u16[i]);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_subs_epu16(a, b) simde_mm_subs_epu16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_ucomieq_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_ucomieq_sd(a, b);
+  #else
+    simde__m128d_private
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+    int r;
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      uint64x2_t a_not_nan = vceqq_f64(a_.neon_f64, a_.neon_f64);
+      uint64x2_t b_not_nan = vceqq_f64(b_.neon_f64, b_.neon_f64);
+      uint64x2_t a_or_b_nan = vreinterpretq_u64_u32(vmvnq_u32(vreinterpretq_u32_u64(vandq_u64(a_not_nan, b_not_nan))));
+      uint64x2_t a_eq_b = vceqq_f64(a_.neon_f64, b_.neon_f64);
+      r = !!(vgetq_lane_u64(vorrq_u64(a_or_b_nan, a_eq_b), 0) != 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      return wasm_f64x2_extract_lane(a_.wasm_v128, 0) == wasm_f64x2_extract_lane(b_.wasm_v128, 0);
+    #elif defined(SIMDE_HAVE_FENV_H)
+      fenv_t envp;
+      int x = feholdexcept(&envp);
+      r =  a_.f64[0] == b_.f64[0];
+      if (HEDLEY_LIKELY(x == 0))
+        fesetenv(&envp);
+    #else
+      r =  a_.f64[0] == b_.f64[0];
+    #endif
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_ucomieq_sd(a, b) simde_mm_ucomieq_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_ucomige_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_ucomige_sd(a, b);
+  #else
+    simde__m128d_private
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+    int r;
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      uint64x2_t a_not_nan = vceqq_f64(a_.neon_f64, a_.neon_f64);
+      uint64x2_t b_not_nan = vceqq_f64(b_.neon_f64, b_.neon_f64);
+      uint64x2_t a_and_b_not_nan = vandq_u64(a_not_nan, b_not_nan);
+      uint64x2_t a_ge_b = vcgeq_f64(a_.neon_f64, b_.neon_f64);
+      r = !!(vgetq_lane_u64(vandq_u64(a_and_b_not_nan, a_ge_b), 0) != 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      return wasm_f64x2_extract_lane(a_.wasm_v128, 0) >= wasm_f64x2_extract_lane(b_.wasm_v128, 0);
+    #elif defined(SIMDE_HAVE_FENV_H)
+      fenv_t envp;
+      int x = feholdexcept(&envp);
+      r = a_.f64[0] >= b_.f64[0];
+      if (HEDLEY_LIKELY(x == 0))
+        fesetenv(&envp);
+    #else
+      r = a_.f64[0] >= b_.f64[0];
+    #endif
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_ucomige_sd(a, b) simde_mm_ucomige_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_ucomigt_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_ucomigt_sd(a, b);
+  #else
+    simde__m128d_private
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+    int r;
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      uint64x2_t a_not_nan = vceqq_f64(a_.neon_f64, a_.neon_f64);
+      uint64x2_t b_not_nan = vceqq_f64(b_.neon_f64, b_.neon_f64);
+      uint64x2_t a_and_b_not_nan = vandq_u64(a_not_nan, b_not_nan);
+      uint64x2_t a_gt_b = vcgtq_f64(a_.neon_f64, b_.neon_f64);
+      r = !!(vgetq_lane_u64(vandq_u64(a_and_b_not_nan, a_gt_b), 0) != 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      return wasm_f64x2_extract_lane(a_.wasm_v128, 0) > wasm_f64x2_extract_lane(b_.wasm_v128, 0);
+    #elif defined(SIMDE_HAVE_FENV_H)
+      fenv_t envp;
+      int x = feholdexcept(&envp);
+      r = a_.f64[0] > b_.f64[0];
+      if (HEDLEY_LIKELY(x == 0))
+        fesetenv(&envp);
+    #else
+      r = a_.f64[0] > b_.f64[0];
+    #endif
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_ucomigt_sd(a, b) simde_mm_ucomigt_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_ucomile_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_ucomile_sd(a, b);
+  #else
+    simde__m128d_private
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+    int r;
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      uint64x2_t a_not_nan = vceqq_f64(a_.neon_f64, a_.neon_f64);
+      uint64x2_t b_not_nan = vceqq_f64(b_.neon_f64, b_.neon_f64);
+      uint64x2_t a_or_b_nan = vreinterpretq_u64_u32(vmvnq_u32(vreinterpretq_u32_u64(vandq_u64(a_not_nan, b_not_nan))));
+      uint64x2_t a_le_b = vcleq_f64(a_.neon_f64, b_.neon_f64);
+      r = !!(vgetq_lane_u64(vorrq_u64(a_or_b_nan, a_le_b), 0) != 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      return wasm_f64x2_extract_lane(a_.wasm_v128, 0) <= wasm_f64x2_extract_lane(b_.wasm_v128, 0);
+    #elif defined(SIMDE_HAVE_FENV_H)
+      fenv_t envp;
+      int x = feholdexcept(&envp);
+      r = a_.f64[0] <= b_.f64[0];
+      if (HEDLEY_LIKELY(x == 0))
+        fesetenv(&envp);
+    #else
+      r = a_.f64[0] <= b_.f64[0];
+    #endif
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_ucomile_sd(a, b) simde_mm_ucomile_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_ucomilt_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_ucomilt_sd(a, b);
+  #else
+    simde__m128d_private
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+    int r;
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      uint64x2_t a_not_nan = vceqq_f64(a_.neon_f64, a_.neon_f64);
+      uint64x2_t b_not_nan = vceqq_f64(b_.neon_f64, b_.neon_f64);
+      uint64x2_t a_or_b_nan = vreinterpretq_u64_u32(vmvnq_u32(vreinterpretq_u32_u64(vandq_u64(a_not_nan, b_not_nan))));
+      uint64x2_t a_lt_b = vcltq_f64(a_.neon_f64, b_.neon_f64);
+      r = !!(vgetq_lane_u64(vorrq_u64(a_or_b_nan, a_lt_b), 0) != 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      return wasm_f64x2_extract_lane(a_.wasm_v128, 0) < wasm_f64x2_extract_lane(b_.wasm_v128, 0);
+    #elif defined(SIMDE_HAVE_FENV_H)
+      fenv_t envp;
+      int x = feholdexcept(&envp);
+      r = a_.f64[0] < b_.f64[0];
+      if (HEDLEY_LIKELY(x == 0))
+        fesetenv(&envp);
+    #else
+      r = a_.f64[0] < b_.f64[0];
+    #endif
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_ucomilt_sd(a, b) simde_mm_ucomilt_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_ucomineq_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_ucomineq_sd(a, b);
+  #else
+    simde__m128d_private
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+    int r;
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      uint64x2_t a_not_nan = vceqq_f64(a_.neon_f64, a_.neon_f64);
+      uint64x2_t b_not_nan = vceqq_f64(b_.neon_f64, b_.neon_f64);
+      uint64x2_t a_and_b_not_nan = vandq_u64(a_not_nan, b_not_nan);
+      uint64x2_t a_neq_b = vreinterpretq_u64_u32(vmvnq_u32(vreinterpretq_u32_u64(vceqq_f64(a_.neon_f64, b_.neon_f64))));
+      r = !!(vgetq_lane_u64(vandq_u64(a_and_b_not_nan, a_neq_b), 0) != 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      return wasm_f64x2_extract_lane(a_.wasm_v128, 0) != wasm_f64x2_extract_lane(b_.wasm_v128, 0);
+    #elif defined(SIMDE_HAVE_FENV_H)
+      fenv_t envp;
+      int x = feholdexcept(&envp);
+      r = a_.f64[0] != b_.f64[0];
+      if (HEDLEY_LIKELY(x == 0))
+        fesetenv(&envp);
+    #else
+      r = a_.f64[0] != b_.f64[0];
+    #endif
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_ucomineq_sd(a, b) simde_mm_ucomineq_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_lfence (void) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    _mm_lfence();
+  #else
+    simde_mm_sfence();
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_lfence() simde_mm_lfence()
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_mm_mfence (void) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    _mm_mfence();
+  #else
+    simde_mm_sfence();
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_mfence() simde_mm_mfence()
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_unpackhi_epi8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_unpackhi_epi8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_i8 = vzip2q_s8(a_.neon_i8, b_.neon_i8);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      int8x8_t a1 = vreinterpret_s8_s16(vget_high_s16(a_.neon_i16));
+      int8x8_t b1 = vreinterpret_s8_s16(vget_high_s16(b_.neon_i16));
+      int8x8x2_t result = vzip_s8(a1, b1);
+      r_.neon_i8 = vcombine_s8(result.val[0], result.val[1]);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i8x16_shuffle(a_.wasm_v128, b_.wasm_v128, 8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.i8 = SIMDE_SHUFFLE_VECTOR_(8, 16, a_.i8, b_.i8, 8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < ((sizeof(r_) / sizeof(r_.i8[0])) / 2) ; i++) {
+        r_.i8[(i * 2)]     = a_.i8[i + ((sizeof(r_) / sizeof(r_.i8[0])) / 2)];
+        r_.i8[(i * 2) + 1] = b_.i8[i + ((sizeof(r_) / sizeof(r_.i8[0])) / 2)];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_unpackhi_epi8(a, b) simde_mm_unpackhi_epi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_unpackhi_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_unpackhi_epi16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_i16 = vzip2q_s16(a_.neon_i16, b_.neon_i16);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      int16x4_t a1 = vget_high_s16(a_.neon_i16);
+      int16x4_t b1 = vget_high_s16(b_.neon_i16);
+      int16x4x2_t result = vzip_s16(a1, b1);
+      r_.neon_i16 = vcombine_s16(result.val[0], result.val[1]);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i16x8_shuffle(a_.wasm_v128, b_.wasm_v128, 4, 12, 5, 13, 6, 14, 7, 15);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.i16 = SIMDE_SHUFFLE_VECTOR_(16, 16, a_.i16, b_.i16, 4, 12, 5, 13, 6, 14, 7, 15);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < ((sizeof(r_) / sizeof(r_.i16[0])) / 2) ; i++) {
+        r_.i16[(i * 2)]     = a_.i16[i + ((sizeof(r_) / sizeof(r_.i16[0])) / 2)];
+        r_.i16[(i * 2) + 1] = b_.i16[i + ((sizeof(r_) / sizeof(r_.i16[0])) / 2)];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_unpackhi_epi16(a, b) simde_mm_unpackhi_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_unpackhi_epi32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_unpackhi_epi32(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_i32 = vzip2q_s32(a_.neon_i32, b_.neon_i32);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      int32x2_t a1 = vget_high_s32(a_.neon_i32);
+      int32x2_t b1 = vget_high_s32(b_.neon_i32);
+      int32x2x2_t result = vzip_s32(a1, b1);
+      r_.neon_i32 = vcombine_s32(result.val[0], result.val[1]);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i32x4_shuffle(a_.wasm_v128, b_.wasm_v128, 2, 6, 3, 7);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.i32 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.i32, b_.i32, 2, 6, 3, 7);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < ((sizeof(r_) / sizeof(r_.i32[0])) / 2) ; i++) {
+        r_.i32[(i * 2)]     = a_.i32[i + ((sizeof(r_) / sizeof(r_.i32[0])) / 2)];
+        r_.i32[(i * 2) + 1] = b_.i32[i + ((sizeof(r_) / sizeof(r_.i32[0])) / 2)];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_unpackhi_epi32(a, b) simde_mm_unpackhi_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_unpackhi_epi64 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_unpackhi_epi64(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      int64x1_t a_h = vget_high_s64(a_.neon_i64);
+      int64x1_t b_h = vget_high_s64(b_.neon_i64);
+      r_.neon_i64 = vcombine_s64(a_h, b_h);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i64x2_shuffle(a_.wasm_v128, b_.wasm_v128, 1, 3);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.i64 = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.i64, b_.i64, 1, 3);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < ((sizeof(r_) / sizeof(r_.i64[0])) / 2) ; i++) {
+        r_.i64[(i * 2)]     = a_.i64[i + ((sizeof(r_) / sizeof(r_.i64[0])) / 2)];
+        r_.i64[(i * 2) + 1] = b_.i64[i + ((sizeof(r_) / sizeof(r_.i64[0])) / 2)];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_unpackhi_epi64(a, b) simde_mm_unpackhi_epi64(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_unpackhi_pd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_unpackhi_pd(a, b);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f64 = vzip2q_f64(a_.neon_f64, b_.neon_f64);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i64x2_shuffle(a_.wasm_v128, b_.wasm_v128, 1, 3);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.f64 = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.f64, b_.f64, 1, 3);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < ((sizeof(r_) / sizeof(r_.f64[0])) / 2) ; i++) {
+        r_.f64[(i * 2)]     = a_.f64[i + ((sizeof(r_) / sizeof(r_.f64[0])) / 2)];
+        r_.f64[(i * 2) + 1] = b_.f64[i + ((sizeof(r_) / sizeof(r_.f64[0])) / 2)];
+      }
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_unpackhi_pd(a, b) simde_mm_unpackhi_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_unpacklo_epi8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_unpacklo_epi8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_i8 = vzip1q_s8(a_.neon_i8, b_.neon_i8);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      int8x8_t a1 = vreinterpret_s8_s16(vget_low_s16(a_.neon_i16));
+      int8x8_t b1 = vreinterpret_s8_s16(vget_low_s16(b_.neon_i16));
+      int8x8x2_t result = vzip_s8(a1, b1);
+      r_.neon_i8 = vcombine_s8(result.val[0], result.val[1]);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i8x16_shuffle(a_.wasm_v128, b_.wasm_v128, 0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.i8 = SIMDE_SHUFFLE_VECTOR_(8, 16, a_.i8, b_.i8, 0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < ((sizeof(r_) / sizeof(r_.i8[0])) / 2) ; i++) {
+        r_.i8[(i * 2)]     = a_.i8[i];
+        r_.i8[(i * 2) + 1] = b_.i8[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_unpacklo_epi8(a, b) simde_mm_unpacklo_epi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_unpacklo_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_unpacklo_epi16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_i16 = vzip1q_s16(a_.neon_i16, b_.neon_i16);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      int16x4_t a1 = vget_low_s16(a_.neon_i16);
+      int16x4_t b1 = vget_low_s16(b_.neon_i16);
+      int16x4x2_t result = vzip_s16(a1, b1);
+      r_.neon_i16 = vcombine_s16(result.val[0], result.val[1]);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i16x8_shuffle(a_.wasm_v128, b_.wasm_v128, 0, 8, 1, 9, 2, 10, 3, 11);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.i16 = SIMDE_SHUFFLE_VECTOR_(16, 16, a_.i16, b_.i16, 0, 8, 1, 9, 2, 10, 3, 11);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < ((sizeof(r_) / sizeof(r_.i16[0])) / 2) ; i++) {
+        r_.i16[(i * 2)]     = a_.i16[i];
+        r_.i16[(i * 2) + 1] = b_.i16[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_unpacklo_epi16(a, b) simde_mm_unpacklo_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_unpacklo_epi32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_unpacklo_epi32(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_i32 = vzip1q_s32(a_.neon_i32, b_.neon_i32);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      int32x2_t a1 = vget_low_s32(a_.neon_i32);
+      int32x2_t b1 = vget_low_s32(b_.neon_i32);
+      int32x2x2_t result = vzip_s32(a1, b1);
+      r_.neon_i32 = vcombine_s32(result.val[0], result.val[1]);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i32x4_shuffle(a_.wasm_v128, b_.wasm_v128, 0, 4, 1, 5);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.i32 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.i32, b_.i32, 0, 4, 1, 5);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < ((sizeof(r_) / sizeof(r_.i32[0])) / 2) ; i++) {
+        r_.i32[(i * 2)]     = a_.i32[i];
+        r_.i32[(i * 2) + 1] = b_.i32[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_unpacklo_epi32(a, b) simde_mm_unpacklo_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_unpacklo_epi64 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_unpacklo_epi64(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      int64x1_t a_l = vget_low_s64(a_.neon_i64);
+      int64x1_t b_l = vget_low_s64(b_.neon_i64);
+      r_.neon_i64 = vcombine_s64(a_l, b_l);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i64x2_shuffle(a_.wasm_v128, b_.wasm_v128, 0, 2);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.i64 = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.i64, b_.i64, 0, 2);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < ((sizeof(r_) / sizeof(r_.i64[0])) / 2) ; i++) {
+        r_.i64[(i * 2)]     = a_.i64[i];
+        r_.i64[(i * 2) + 1] = b_.i64[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_unpacklo_epi64(a, b) simde_mm_unpacklo_epi64(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_unpacklo_pd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_unpacklo_pd(a, b);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f64 = vzip1q_f64(a_.neon_f64, b_.neon_f64);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i64x2_shuffle(a_.wasm_v128, b_.wasm_v128, 0, 2);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.f64 = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.f64, b_.f64, 0, 2);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < ((sizeof(r_) / sizeof(r_.f64[0])) / 2) ; i++) {
+        r_.f64[(i * 2)]     = a_.f64[i];
+        r_.f64[(i * 2) + 1] = b_.f64[i];
+      }
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_unpacklo_pd(a, b) simde_mm_unpacklo_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_x_mm_negate_pd(simde__m128d a) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return simde_mm_xor_pd(a, _mm_set1_pd(SIMDE_FLOAT64_C(-0.0)));
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    #if defined(SIMDE_POWER_ALTIVEC_P8_NATIVE) && \
+        (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,1,0))
+      r_.altivec_f64 = vec_neg(a_.altivec_f64);
+    #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f64 = vnegq_f64(a_.neon_f64);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_f64x2_neg(a_.wasm_v128);
+    #elif defined(SIMDE_VECTOR_NEGATE)
+      r_.f64 = -a_.f64;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = -a_.f64[i];
+      }
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_xor_si128 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_xor_si128(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = veorq_s32(a_.neon_i32, b_.neon_i32);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_i32 = vec_xor(a_.altivec_i32, b_.altivec_i32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_v128_xor(b_.wasm_v128, a_.wasm_v128);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32f = a_.i32f ^ b_.i32f;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) {
+        r_.i32f[i] = a_.i32f[i] ^ b_.i32f[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _mm_xor_si128(a, b) simde_mm_xor_si128(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_x_mm_not_si128 (simde__m128i a) {
+  #if defined(SIMDE_X86_AVX512VL_NATIVE)
+    return _mm_ternarylogic_epi32(a, a, a, 0x55);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vmvnq_s32(a_.neon_i32);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_i32 = vec_nor(a_.altivec_i32, a_.altivec_i32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_v128_not(a_.wasm_v128);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32f = ~a_.i32f;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) {
+        r_.i32f[i] = ~(a_.i32f[i]);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+
+#define SIMDE_MM_SHUFFLE2(x, y) (((x) << 1) | (y))
+#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
+  #define _MM_SHUFFLE2(x, y) SIMDE_MM_SHUFFLE2(x, y)
+#endif
+
+SIMDE_END_DECLS_
+
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_X86_SSE2_H) */
diff --git a/external_libs/pgenlib/simde/x86/sse3.h b/external_libs/pgenlib/simde/x86/sse3.h
new file mode 100644
index 0000000..db2683c
--- /dev/null
+++ b/external_libs/pgenlib/simde/x86/sse3.h
@@ -0,0 +1,515 @@
+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2017-2020 Evan Nemerson <evan@nemerson.com>
+ */
+
+#if !defined(SIMDE_X86_SSE3_H)
+#define SIMDE_X86_SSE3_H
+
+#include "sse2.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_x_mm_deinterleaveeven_epi16 (simde__m128i a, simde__m128i b) {
+  simde__m128i_private
+    r_,
+    a_ = simde__m128i_to_private(a),
+    b_ = simde__m128i_to_private(b);
+
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    r_.neon_i16 = vuzp1q_s16(a_.neon_i16, b_.neon_i16);
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    int16x8x2_t t = vuzpq_s16(a_.neon_i16, b_.neon_i16);
+    r_.neon_i16 = t.val[0];
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    r_.wasm_v128 = wasm_i16x8_shuffle(a_.wasm_v128, b_.wasm_v128, 0, 2, 4, 6, 8, 10, 12, 14);
+  #elif defined(SIMDE_SHUFFLE_VECTOR_)
+    r_.i16 = SIMDE_SHUFFLE_VECTOR_(16, 16, a_.i16, b_.i16, 0, 2, 4, 6, 8, 10, 12, 14);
+  #else
+    const size_t halfway_point = (sizeof(r_.i16) / sizeof(r_.i16[0])) / 2;
+    for(size_t i = 0 ; i < halfway_point ; i++) {
+      r_.i16[i] = a_.i16[2 * i];
+      r_.i16[i + halfway_point] = b_.i16[2 * i];
+    }
+  #endif
+
+  return simde__m128i_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_x_mm_deinterleaveodd_epi16 (simde__m128i a, simde__m128i b) {
+  simde__m128i_private
+    r_,
+    a_ = simde__m128i_to_private(a),
+    b_ = simde__m128i_to_private(b);
+
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    r_.neon_i16 = vuzp2q_s16(a_.neon_i16, b_.neon_i16);
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    int16x8x2_t t = vuzpq_s16(a_.neon_i16, b_.neon_i16);
+    r_.neon_i16 = t.val[1];
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    r_.wasm_v128 = wasm_i16x8_shuffle(a_.wasm_v128, b_.wasm_v128, 1, 3, 5, 7, 9, 11, 13, 15);
+  #elif defined(SIMDE_SHUFFLE_VECTOR_)
+    r_.i16 = SIMDE_SHUFFLE_VECTOR_(16, 16, a_.i16, b_.i16, 1, 3, 5, 7, 9, 11, 13, 15);
+  #else
+    const size_t halfway_point = (sizeof(r_.i16) / sizeof(r_.i16[0])) / 2;
+    for(size_t i = 0 ; i < halfway_point ; i++) {
+      r_.i16[i] = a_.i16[2 * i + 1];
+      r_.i16[i + halfway_point] = b_.i16[2 * i + 1];
+    }
+  #endif
+
+  return simde__m128i_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_x_mm_deinterleaveeven_epi32 (simde__m128i a, simde__m128i b) {
+  simde__m128i_private
+    r_,
+    a_ = simde__m128i_to_private(a),
+    b_ = simde__m128i_to_private(b);
+
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    r_.neon_i32 = vuzp1q_s32(a_.neon_i32, b_.neon_i32);
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    int32x4x2_t t = vuzpq_s32(a_.neon_i32, b_.neon_i32);
+    r_.neon_i32 = t.val[0];
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    r_.wasm_v128 = wasm_i32x4_shuffle(a_.wasm_v128, b_.wasm_v128, 0, 2, 4, 6);
+  #elif defined(SIMDE_SHUFFLE_VECTOR_)
+    r_.i32 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.i32, b_.i32, 0, 2, 4, 6);
+  #else
+    const size_t halfway_point = (sizeof(r_.i32) / sizeof(r_.i32[0])) / 2;
+    for(size_t i = 0 ; i < halfway_point ; i++) {
+      r_.i32[i] = a_.i32[2 * i];
+      r_.i32[i + halfway_point] = b_.i32[2 * i];
+    }
+  #endif
+
+  return simde__m128i_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_x_mm_deinterleaveodd_epi32 (simde__m128i a, simde__m128i b) {
+  simde__m128i_private
+    r_,
+    a_ = simde__m128i_to_private(a),
+    b_ = simde__m128i_to_private(b);
+
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    r_.neon_i32 = vuzp2q_s32(a_.neon_i32, b_.neon_i32);
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    int32x4x2_t t = vuzpq_s32(a_.neon_i32, b_.neon_i32);
+    r_.neon_i32 = t.val[1];
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    r_.wasm_v128 = wasm_i32x4_shuffle(a_.wasm_v128, b_.wasm_v128, 1, 3, 5, 7);
+  #elif defined(SIMDE_SHUFFLE_VECTOR_)
+    r_.i32 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.i32, b_.i32, 1, 3, 5, 7);
+  #else
+    const size_t halfway_point = (sizeof(r_.i32) / sizeof(r_.i32[0])) / 2;
+    for(size_t i = 0 ; i < halfway_point ; i++) {
+      r_.i32[i] = a_.i32[2 * i + 1];
+      r_.i32[i + halfway_point] = b_.i32[2 * i + 1];
+    }
+  #endif
+
+  return simde__m128i_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_x_mm_deinterleaveeven_ps (simde__m128 a, simde__m128 b) {
+  simde__m128_private
+    r_,
+    a_ = simde__m128_to_private(a),
+    b_ = simde__m128_to_private(b);
+
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    r_.neon_f32 = vuzp1q_f32(a_.neon_f32, b_.neon_f32);
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    float32x4x2_t t = vuzpq_f32(a_.neon_f32, b_.neon_f32);
+    r_.neon_f32 = t.val[0];
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    r_.wasm_v128 = wasm_i32x4_shuffle(a_.wasm_v128, b_.wasm_v128, 0, 2, 4, 6);
+  #elif defined(SIMDE_SHUFFLE_VECTOR_)
+    r_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.f32, b_.f32, 0, 2, 4, 6);
+  #else
+    const size_t halfway_point = (sizeof(r_.f32) / sizeof(r_.f32[0])) / 2;
+    for(size_t i = 0 ; i < halfway_point ; i++) {
+      r_.f32[i] = a_.f32[2 * i];
+      r_.f32[i + halfway_point] = b_.f32[2 * i];
+    }
+  #endif
+
+  return simde__m128_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_x_mm_deinterleaveodd_ps (simde__m128 a, simde__m128 b) {
+  simde__m128_private
+    r_,
+    a_ = simde__m128_to_private(a),
+    b_ = simde__m128_to_private(b);
+
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    r_.neon_f32 = vuzp2q_f32(a_.neon_f32, b_.neon_f32);
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    float32x4x2_t t = vuzpq_f32(a_.neon_f32, b_.neon_f32);
+    r_.neon_f32 = t.val[1];
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    r_.wasm_v128 = wasm_i32x4_shuffle(a_.wasm_v128, b_.wasm_v128, 1, 3, 5, 7);
+  #elif defined(SIMDE_SHUFFLE_VECTOR_)
+    r_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.f32, b_.f32, 1, 3, 5, 7);
+  #else
+    const size_t halfway_point = (sizeof(r_.f32) / sizeof(r_.f32[0])) / 2;
+    for(size_t i = 0 ; i < halfway_point ; i++) {
+      r_.f32[i] = a_.f32[2 * i + 1];
+      r_.f32[i + halfway_point] = b_.f32[2 * i + 1];
+    }
+  #endif
+
+  return simde__m128_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_x_mm_deinterleaveeven_pd (simde__m128d a, simde__m128d b) {
+  simde__m128d_private
+    r_,
+    a_ = simde__m128d_to_private(a),
+    b_ = simde__m128d_to_private(b);
+
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    r_.neon_f64 = vuzp1q_f64(a_.neon_f64, b_.neon_f64);
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    r_.wasm_v128 = wasm_i64x2_shuffle(a_.wasm_v128, b_.wasm_v128, 0, 2);
+  #elif defined(SIMDE_SHUFFLE_VECTOR_)
+    r_.f64 = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.f64, b_.f64, 0, 2);
+  #else
+    const size_t halfway_point = (sizeof(r_.f64) / sizeof(r_.f64[0])) / 2;
+    for(size_t i = 0 ; i < halfway_point ; i++) {
+      r_.f64[i] = a_.f64[2 * i];
+      r_.f64[i + halfway_point] = b_.f64[2 * i];
+    }
+  #endif
+
+  return simde__m128d_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_x_mm_deinterleaveodd_pd (simde__m128d a, simde__m128d b) {
+  simde__m128d_private
+    r_,
+    a_ = simde__m128d_to_private(a),
+    b_ = simde__m128d_to_private(b);
+
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    r_.neon_f64 = vuzp2q_f64(a_.neon_f64, b_.neon_f64);
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    r_.wasm_v128 = wasm_i64x2_shuffle(a_.wasm_v128, b_.wasm_v128, 1, 3);
+  #elif defined(SIMDE_SHUFFLE_VECTOR_)
+    r_.f64 = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.f64, b_.f64, 1, 3);
+  #else
+    const size_t halfway_point = (sizeof(r_.f64) / sizeof(r_.f64[0])) / 2;
+    for(size_t i = 0 ; i < halfway_point ; i++) {
+      r_.f64[i] = a_.f64[2 * i + 1];
+      r_.f64[i + halfway_point] = b_.f64[2 * i + 1];
+    }
+  #endif
+
+  return simde__m128d_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_addsub_pd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE3_NATIVE)
+    return _mm_addsub_pd(a, b);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      float64x2_t rs = vsubq_f64(a_.neon_f64, b_.neon_f64);
+      float64x2_t ra = vaddq_f64(a_.neon_f64, b_.neon_f64);
+      return vcombine_f64(vget_low_f64(rs), vget_high_f64(ra));
+    #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.f64 = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.f64 - b_.f64, a_.f64 + b_.f64, 0, 3);
+    #else
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i += 2) {
+        r_.f64[  i  ] = a_.f64[  i  ] - b_.f64[  i  ];
+        r_.f64[1 + i] = a_.f64[1 + i] + b_.f64[1 + i];
+      }
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_addsub_pd(a, b) simde_mm_addsub_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_addsub_ps (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE3_NATIVE)
+    return _mm_addsub_ps(a, b);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      float32x4_t rs = vsubq_f32(a_.neon_f32, b_.neon_f32);
+      float32x4_t ra = vaddq_f32(a_.neon_f32, b_.neon_f32);
+      return vtrn2q_f32(vreinterpretq_f32_s32(vrev64q_s32(vreinterpretq_s32_f32(rs))), ra);
+    #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.f32 - b_.f32, a_.f32 + b_.f32, 0, 5, 2, 7);
+    #else
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i += 2) {
+        r_.f32[  i  ] = a_.f32[  i  ] - b_.f32[  i  ];
+        r_.f32[1 + i] = a_.f32[1 + i] + b_.f32[1 + i];
+      }
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_addsub_ps(a, b) simde_mm_addsub_ps((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_hadd_pd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE3_NATIVE)
+    return _mm_hadd_pd(a, b);
+  #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return simde__m128d_from_neon_f64(vpaddq_f64(simde__m128d_to_neon_f64(a), simde__m128d_to_neon_f64(b)));
+  #else
+    return simde_mm_add_pd(simde_x_mm_deinterleaveeven_pd(a, b), simde_x_mm_deinterleaveodd_pd(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_SSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_hadd_pd(a, b) simde_mm_hadd_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_hadd_ps (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE3_NATIVE)
+    return _mm_hadd_ps(a, b);
+  #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return simde__m128_from_neon_f32(vpaddq_f32(simde__m128_to_neon_f32(a), simde__m128_to_neon_f32(b)));
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    float32x4x2_t t = vuzpq_f32(simde__m128_to_neon_f32(a), simde__m128_to_neon_f32(b));
+    return simde__m128_from_neon_f32(vaddq_f32(t.val[0], t.val[1]));
+  #else
+    return simde_mm_add_ps(simde_x_mm_deinterleaveeven_ps(a, b), simde_x_mm_deinterleaveodd_ps(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_SSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_hadd_ps(a, b) simde_mm_hadd_ps(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_hsub_pd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE3_NATIVE)
+    return _mm_hsub_pd(a, b);
+  #else
+    return simde_mm_sub_pd(simde_x_mm_deinterleaveeven_pd(a, b), simde_x_mm_deinterleaveodd_pd(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_SSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_hsub_pd(a, b) simde_mm_hsub_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_hsub_ps (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE3_NATIVE)
+    return _mm_hsub_ps(a, b);
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    float32x4x2_t t = vuzpq_f32(simde__m128_to_neon_f32(a), simde__m128_to_neon_f32(b));
+    return simde__m128_from_neon_f32(vaddq_f32(t.val[0], vnegq_f32(t.val[1])));
+  #else
+    return simde_mm_sub_ps(simde_x_mm_deinterleaveeven_ps(a, b), simde_x_mm_deinterleaveodd_ps(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_SSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_hsub_ps(a, b) simde_mm_hsub_ps(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_lddqu_si128 (simde__m128i const* mem_addr) {
+  #if defined(SIMDE_X86_SSE3_NATIVE)
+    return _mm_lddqu_si128(mem_addr);
+  #else
+    simde__m128i_private r_;
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vld1q_s32(HEDLEY_REINTERPRET_CAST(int32_t const*, mem_addr));
+    #else
+      simde_memcpy(&r_, mem_addr, sizeof(r_));
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_lddqu_si128(mem_addr) simde_mm_lddqu_si128(mem_addr)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_loaddup_pd (simde_float64 const* mem_addr) {
+  #if defined(SIMDE_X86_SSE3_NATIVE)
+    return _mm_loaddup_pd(mem_addr);
+  #else
+    simde__m128d_private r_;
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f64 = vdupq_n_f64(*mem_addr);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i64 = vdupq_n_s64(*HEDLEY_REINTERPRET_CAST(int64_t const*, mem_addr));
+    #else
+      r_.f64[0] = *mem_addr;
+      r_.f64[1] = *mem_addr;
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_loaddup_pd(mem_addr) simde_mm_loaddup_pd(mem_addr)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_movedup_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SSE3_NATIVE)
+    return _mm_movedup_pd(a);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f64 = vdupq_laneq_f64(a_.neon_f64, 0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i64x2_shuffle(a_.wasm_v128, a_.wasm_v128, 0, 0);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.f64 = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.f64, a_.f64, 0, 0);
+    #else
+      r_.f64[0] = a_.f64[0];
+      r_.f64[1] = a_.f64[0];
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_movedup_pd(a) simde_mm_movedup_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_movehdup_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SSE3_NATIVE)
+    return _mm_movehdup_ps(a);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f32 = vtrn2q_f32(a_.neon_f32, a_.neon_f32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i32x4_shuffle(a_.wasm_v128, a_.wasm_v128, 1, 1, 3, 3);
+    #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.f32, a_.f32, 1, 1, 3, 3);
+    #else
+      r_.f32[0] = a_.f32[1];
+      r_.f32[1] = a_.f32[1];
+      r_.f32[2] = a_.f32[3];
+      r_.f32[3] = a_.f32[3];
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_movehdup_ps(a) simde_mm_movehdup_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_moveldup_ps (simde__m128 a) {
+  #if defined(SIMDE__SSE3_NATIVE)
+    return _mm_moveldup_ps(a);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f32 = vtrn1q_f32(a_.neon_f32, a_.neon_f32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i32x4_shuffle(a_.wasm_v128, a_.wasm_v128, 0, 0, 2, 2);
+    #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.f32, a_.f32, 0, 0, 2, 2);
+    #else
+      r_.f32[0] = a_.f32[0];
+      r_.f32[1] = a_.f32[0];
+      r_.f32[2] = a_.f32[2];
+      r_.f32[3] = a_.f32[2];
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_moveldup_ps(a) simde_mm_moveldup_ps(a)
+#endif
+
+SIMDE_END_DECLS_
+
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_X86_SSE3_H) */
diff --git a/external_libs/pgenlib/simde/x86/sse4.1.h b/external_libs/pgenlib/simde/x86/sse4.1.h
new file mode 100644
index 0000000..15a197b
--- /dev/null
+++ b/external_libs/pgenlib/simde/x86/sse4.1.h
@@ -0,0 +1,2367 @@
+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2017-2020 Evan Nemerson <evan@nemerson.com>
+ */
+
+#include "sse.h"
+#if !defined(SIMDE_X86_SSE4_1_H)
+#define SIMDE_X86_SSE4_1_H
+
+#include "ssse3.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+#if !defined(SIMDE_X86_SSE4_1_NATIVE) && defined(SIMDE_ENABLE_NATIVE_ALIASES)
+#  define SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_blend_epi16 (simde__m128i a, simde__m128i b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255)  {
+  simde__m128i_private
+    r_,
+    a_ = simde__m128i_to_private(a),
+    b_ = simde__m128i_to_private(b);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+    r_.u16[i] = ((imm8 >> i) & 1) ? b_.u16[i] : a_.u16[i];
+  }
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_SSE4_1_NATIVE)
+  #define simde_mm_blend_epi16(a, b, imm8) _mm_blend_epi16(a, b, imm8)
+#elif defined(SIMDE_SHUFFLE_VECTOR_)
+  #define simde_mm_blend_epi16(a, b, imm8) \
+    (__extension__ ({ \
+      simde__m128i_private \
+        simde_mm_blend_epi16_a_ = simde__m128i_to_private(a), \
+        simde_mm_blend_epi16_b_ = simde__m128i_to_private(b), \
+        simde_mm_blend_epi16_r_; \
+      \
+      simde_mm_blend_epi16_r_.i16 = \
+        SIMDE_SHUFFLE_VECTOR_( \
+          16, 16, \
+          simde_mm_blend_epi16_a_.i16, \
+          simde_mm_blend_epi16_b_.i16, \
+          ((imm8) & (1 << 0)) ?  8 : 0, \
+          ((imm8) & (1 << 1)) ?  9 : 1, \
+          ((imm8) & (1 << 2)) ? 10 : 2, \
+          ((imm8) & (1 << 3)) ? 11 : 3, \
+          ((imm8) & (1 << 4)) ? 12 : 4, \
+          ((imm8) & (1 << 5)) ? 13 : 5, \
+          ((imm8) & (1 << 6)) ? 14 : 6, \
+          ((imm8) & (1 << 7)) ? 15 : 7  \
+        ); \
+      \
+      simde__m128i_from_private(simde_mm_blend_epi16_r_); \
+    }))
+#endif
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_blend_epi16
+  #define _mm_blend_epi16(a, b, imm8) simde_mm_blend_epi16(a, b, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_blend_pd (simde__m128d a, simde__m128d b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 3)  {
+  simde__m128d_private
+    r_,
+    a_ = simde__m128d_to_private(a),
+    b_ = simde__m128d_to_private(b);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+    r_.f64[i] = ((imm8 >> i) & 1) ? b_.f64[i] : a_.f64[i];
+  }
+  return simde__m128d_from_private(r_);
+}
+#if defined(SIMDE_X86_SSE4_1_NATIVE)
+  #define simde_mm_blend_pd(a, b, imm8) _mm_blend_pd(a, b, imm8)
+#elif defined(SIMDE_SHUFFLE_VECTOR_)
+  #define simde_mm_blend_pd(a, b, imm8) \
+    (__extension__ ({ \
+      simde__m128d_private \
+        simde_mm_blend_pd_a_ = simde__m128d_to_private(a), \
+        simde_mm_blend_pd_b_ = simde__m128d_to_private(b), \
+        simde_mm_blend_pd_r_; \
+      \
+      simde_mm_blend_pd_r_.f64 = \
+        SIMDE_SHUFFLE_VECTOR_( \
+          64, 16, \
+          simde_mm_blend_pd_a_.f64, \
+          simde_mm_blend_pd_b_.f64, \
+          ((imm8) & (1 << 0)) ?  2 : 0, \
+          ((imm8) & (1 << 1)) ?  3 : 1  \
+        ); \
+      \
+      simde__m128d_from_private(simde_mm_blend_pd_r_); \
+    }))
+#endif
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_blend_pd
+  #define _mm_blend_pd(a, b, imm8) simde_mm_blend_pd(a, b, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_blend_ps (simde__m128 a, simde__m128 b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 15)  {
+  simde__m128_private
+    r_,
+    a_ = simde__m128_to_private(a),
+    b_ = simde__m128_to_private(b);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+    r_.f32[i] = ((imm8 >> i) & 1) ? b_.f32[i] : a_.f32[i];
+  }
+  return simde__m128_from_private(r_);
+}
+#if defined(SIMDE_X86_SSE4_1_NATIVE)
+#  define simde_mm_blend_ps(a, b, imm8) _mm_blend_ps(a, b, imm8)
+#elif defined(SIMDE_SHUFFLE_VECTOR_)
+  #define simde_mm_blend_ps(a, b, imm8) \
+    (__extension__ ({ \
+      simde__m128_private \
+        simde_mm_blend_ps_a_ = simde__m128_to_private(a), \
+        simde_mm_blend_ps_b_ = simde__m128_to_private(b), \
+        simde_mm_blend_ps_r_; \
+      \
+      simde_mm_blend_ps_r_.f32 = \
+        SIMDE_SHUFFLE_VECTOR_( \
+          32, 16, \
+          simde_mm_blend_ps_a_.f32, \
+          simde_mm_blend_ps_b_.f32, \
+          ((imm8) & (1 << 0)) ? 4 : 0, \
+          ((imm8) & (1 << 1)) ? 5 : 1, \
+          ((imm8) & (1 << 2)) ? 6 : 2, \
+          ((imm8) & (1 << 3)) ? 7 : 3  \
+        ); \
+      \
+      simde__m128_from_private(simde_mm_blend_ps_r_); \
+    }))
+#endif
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_blend_ps
+  #define _mm_blend_ps(a, b, imm8) simde_mm_blend_ps(a, b, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_blendv_epi8 (simde__m128i a, simde__m128i b, simde__m128i mask) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_blendv_epi8(a, b, mask);
+  #elif defined(SIMDE_X86_SSE2_NATIVE)
+    __m128i m = _mm_cmpgt_epi8(_mm_setzero_si128(), mask);
+    return _mm_xor_si128(_mm_subs_epu8(_mm_xor_si128(a, b), m), b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b),
+      mask_ = simde__m128i_to_private(mask);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      /* Use a signed shift right to create a mask with the sign bit */
+      mask_.neon_i8 = vshrq_n_s8(mask_.neon_i8, 7);
+      r_.neon_i8 = vbslq_s8(mask_.neon_u8, b_.neon_i8, a_.neon_i8);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      v128_t m = wasm_i8x16_shr(mask_.wasm_v128, 7);
+      r_.wasm_v128 = wasm_v128_bitselect(b_.wasm_v128, a_.wasm_v128, m);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_i8 = vec_sel(a_.altivec_i8, b_.altivec_i8, vec_cmplt(mask_.altivec_i8, vec_splat_s8(0)));
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      /* https://software.intel.com/en-us/forums/intel-c-compiler/topic/850087 */
+      #if defined(HEDLEY_INTEL_VERSION_CHECK)
+        __typeof__(mask_.i8) z = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
+        mask_.i8 = HEDLEY_REINTERPRET_CAST(__typeof__(mask_.i8), mask_.i8 < z);
+      #else
+        mask_.i8 >>= (CHAR_BIT * sizeof(mask_.i8[0])) - 1;
+      #endif
+
+      r_.i8 = (mask_.i8 & b_.i8) | (~mask_.i8 & a_.i8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        int8_t m = mask_.i8[i] >> 7;
+        r_.i8[i] = (m & b_.i8[i]) | (~m & a_.i8[i]);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_blendv_epi8
+  #define _mm_blendv_epi8(a, b, mask) simde_mm_blendv_epi8(a, b, mask)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_x_mm_blendv_epi16 (simde__m128i a, simde__m128i b, simde__m128i mask) {
+  #if defined(SIMDE_X86_SSE2_NATIVE)
+    mask = simde_mm_srai_epi16(mask, 15);
+    return simde_mm_or_si128(simde_mm_and_si128(mask, b), simde_mm_andnot_si128(mask, a));
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b),
+      mask_ = simde__m128i_to_private(mask);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      mask_ = simde__m128i_to_private(simde_mm_cmplt_epi16(mask, simde_mm_setzero_si128()));
+      r_.neon_i16 = vbslq_s16(mask_.neon_u16, b_.neon_i16, a_.neon_i16);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_i16 = vec_sel(a_.altivec_i16, b_.altivec_i16, vec_cmplt(mask_.altivec_i16, vec_splat_s16(0)));
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      #if defined(HEDLEY_INTEL_VERSION_CHECK)
+        __typeof__(mask_.i16) z = { 0, 0, 0, 0, 0, 0, 0, 0 };
+        mask_.i16 = mask_.i16 < z;
+      #else
+        mask_.i16 >>= (CHAR_BIT * sizeof(mask_.i16[0])) - 1;
+      #endif
+
+      r_.i16 = (mask_.i16 & b_.i16) | (~mask_.i16 & a_.i16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        int16_t m = mask_.i16[i] >> 15;
+        r_.i16[i] = (m & b_.i16[i]) | (~m & a_.i16[i]);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_x_mm_blendv_epi32 (simde__m128i a, simde__m128i b, simde__m128i mask) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_castps_si128(_mm_blendv_ps(_mm_castsi128_ps(a), _mm_castsi128_ps(b), _mm_castsi128_ps(mask)));
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b),
+      mask_ = simde__m128i_to_private(mask);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      mask_ = simde__m128i_to_private(simde_mm_cmplt_epi32(mask, simde_mm_setzero_si128()));
+      r_.neon_i32 = vbslq_s32(mask_.neon_u32, b_.neon_i32, a_.neon_i32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      v128_t m = wasm_i32x4_shr(mask_.wasm_v128, 31);
+      r_.wasm_v128 = wasm_v128_or(wasm_v128_and(b_.wasm_v128, m), wasm_v128_andnot(a_.wasm_v128, m));
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_i32 = vec_sel(a_.altivec_i32, b_.altivec_i32, vec_cmplt(mask_.altivec_i32, vec_splat_s32(0)));
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      #if defined(HEDLEY_INTEL_VERSION_CHECK)
+        __typeof__(mask_.i32) z = { 0, 0, 0, 0 };
+        mask_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(mask_.i32), mask_.i32 < z);
+      #else
+        mask_.i32 >>= (CHAR_BIT * sizeof(mask_.i32[0])) - 1;
+      #endif
+
+      r_.i32 = (mask_.i32 & b_.i32) | (~mask_.i32 & a_.i32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        int32_t m = mask_.i32[i] >> 31;
+        r_.i32[i] = (m & b_.i32[i]) | (~m & a_.i32[i]);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_x_mm_blendv_epi64 (simde__m128i a, simde__m128i b, simde__m128i mask) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_castpd_si128(_mm_blendv_pd(_mm_castsi128_pd(a), _mm_castsi128_pd(b), _mm_castsi128_pd(mask)));
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b),
+      mask_ = simde__m128i_to_private(mask);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      mask_.neon_u64 = vcltq_s64(mask_.neon_i64, vdupq_n_s64(UINT64_C(0)));
+      r_.neon_i64 = vbslq_s64(mask_.neon_u64, b_.neon_i64, a_.neon_i64);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      v128_t m = wasm_i64x2_shr(mask_.wasm_v128, 63);
+      r_.wasm_v128 = wasm_v128_or(wasm_v128_and(b_.wasm_v128, m), wasm_v128_andnot(a_.wasm_v128, m));
+    #elif (defined(SIMDE_POWER_ALTIVEC_P8_NATIVE) && !defined(SIMDE_BUG_CLANG_46770)) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_i64 = vec_sel(a_.altivec_i64, b_.altivec_i64, vec_cmplt(mask_.altivec_i64, vec_splats(HEDLEY_STATIC_CAST(signed long long, 0))));
+    #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE)
+      SIMDE_POWER_ALTIVEC_VECTOR(signed long long) selector = vec_sra(mask_.altivec_i64, vec_splats(HEDLEY_STATIC_CAST(unsigned long long, 63)));
+      r_.altivec_i32 = vec_sel(a_.altivec_i32, b_.altivec_i32, HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned int), selector));
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      #if defined(HEDLEY_INTEL_VERSION_CHECK)
+        __typeof__(mask_.i64) z = { 0, 0 };
+        mask_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(mask_.i64), mask_.i64 < z);
+      #else
+        mask_.i64 >>= (CHAR_BIT * sizeof(mask_.i64[0])) - 1;
+      #endif
+
+    r_.i64 = (mask_.i64 & b_.i64) | (~mask_.i64 & a_.i64);
+  #else
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+      int64_t m = mask_.i64[i] >> 63;
+      r_.i64[i] = (m & b_.i64[i]) | (~m & a_.i64[i]);
+    }
+  #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_blendv_pd (simde__m128d a, simde__m128d b, simde__m128d mask) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_blendv_pd(a, b, mask);
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    v128_t m_ = wasm_i64x2_shr(HEDLEY_REINTERPRET_CAST(v128_t, mask), 63);
+    return simde__m128d_from_wasm_v128(wasm_v128_bitselect(simde__m128d_to_wasm_v128(b), simde__m128d_to_wasm_v128(a), m_));
+  #else
+    return simde_mm_castsi128_pd(simde_x_mm_blendv_epi64(simde_mm_castpd_si128(a), simde_mm_castpd_si128(b), simde_mm_castpd_si128(mask)));
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_blendv_pd
+  #define _mm_blendv_pd(a, b, mask) simde_mm_blendv_pd(a, b, mask)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_blendv_ps (simde__m128 a, simde__m128 b, simde__m128 mask) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_blendv_ps(a, b, mask);
+  #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    v128_t m_ = wasm_i32x4_shr(HEDLEY_REINTERPRET_CAST(v128_t, mask), 31);
+    return simde__m128d_from_wasm_v128(wasm_v128_bitselect(simde__m128d_to_wasm_v128(b), simde__m128d_to_wasm_v128(a), m_));
+  #else
+    return simde_mm_castsi128_ps(simde_x_mm_blendv_epi32(simde_mm_castps_si128(a), simde_mm_castps_si128(b), simde_mm_castps_si128(mask)));
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_blendv_ps
+  #define _mm_blendv_ps(a, b, mask) simde_mm_blendv_ps(a, b, mask)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_round_pd (simde__m128d a, int rounding)
+    SIMDE_REQUIRE_CONSTANT_RANGE(rounding, 0, 15) {
+  simde__m128d_private
+    r_,
+    a_ = simde__m128d_to_private(a);
+
+  /* For architectures which lack a current direction SIMD instruction. */
+  #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+    if ((rounding & 7) == SIMDE_MM_FROUND_CUR_DIRECTION)
+      rounding = HEDLEY_STATIC_CAST(int, SIMDE_MM_GET_ROUNDING_MODE()) << 13;
+  #endif
+
+  switch (rounding & ~SIMDE_MM_FROUND_NO_EXC) {
+    case SIMDE_MM_FROUND_CUR_DIRECTION:
+      #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+        r_.altivec_f64 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(double), vec_round(a_.altivec_f64));
+      #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+        r_.neon_f64 = vrndiq_f64(a_.neon_f64);
+      #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+        r_.wasm_v128 = wasm_f64x2_nearest(a_.wasm_v128);
+      #elif defined(simde_math_nearbyint)
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+          r_.f64[i] = simde_math_nearbyint(a_.f64[i]);
+        }
+      #else
+        HEDLEY_UNREACHABLE_RETURN(simde_mm_undefined_pd());
+      #endif
+      break;
+
+    case SIMDE_MM_FROUND_TO_NEAREST_INT:
+      #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+        r_.altivec_f64 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(double), vec_round(a_.altivec_f64));
+      #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+        r_.neon_f64 = vrndaq_f64(a_.neon_f64);
+      #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+        r_.wasm_v128 = wasm_f64x2_nearest(a_.wasm_v128);
+      #elif defined(simde_math_roundeven)
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+          r_.f64[i] = simde_math_roundeven(a_.f64[i]);
+        }
+      #else
+        HEDLEY_UNREACHABLE_RETURN(simde_mm_undefined_pd());
+      #endif
+      break;
+
+    case SIMDE_MM_FROUND_TO_NEG_INF:
+      #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+        r_.altivec_f64 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(double), vec_floor(a_.altivec_f64));
+      #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+        r_.neon_f64 = vrndmq_f64(a_.neon_f64);
+      #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+        r_.wasm_v128 = wasm_f64x2_floor(a_.wasm_v128);
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+          r_.f64[i] = simde_math_floor(a_.f64[i]);
+        }
+      #endif
+      break;
+
+    case SIMDE_MM_FROUND_TO_POS_INF:
+      #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+        r_.altivec_f64 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(double), vec_ceil(a_.altivec_f64));
+      #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+        r_.neon_f64 = vrndpq_f64(a_.neon_f64);
+      #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+        r_.wasm_v128 = wasm_f64x2_ceil(a_.wasm_v128);
+      #elif defined(simde_math_ceil)
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+          r_.f64[i] = simde_math_ceil(a_.f64[i]);
+        }
+      #else
+        HEDLEY_UNREACHABLE_RETURN(simde_mm_undefined_pd());
+      #endif
+      break;
+
+    case SIMDE_MM_FROUND_TO_ZERO:
+      #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+        r_.altivec_f64 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(double), vec_trunc(a_.altivec_f64));
+      #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+        r_.neon_f64 = vrndq_f64(a_.neon_f64);
+      #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+        r_.wasm_v128 = wasm_f64x2_trunc(a_.wasm_v128);
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+          r_.f64[i] = simde_math_trunc(a_.f64[i]);
+        }
+      #endif
+      break;
+
+    default:
+      HEDLEY_UNREACHABLE_RETURN(simde_mm_undefined_pd());
+  }
+
+  return simde__m128d_from_private(r_);
+}
+#if defined(SIMDE_X86_SSE4_1_NATIVE)
+  #define simde_mm_round_pd(a, rounding) _mm_round_pd(a, rounding)
+#endif
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_round_pd
+  #define _mm_round_pd(a, rounding) simde_mm_round_pd(a, rounding)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_ceil_pd (simde__m128d a) {
+  #if defined(SIMDE_WASM_SIMD128_NATIVE)
+    return simde__m128d_from_wasm_v128(wasm_f64x2_ceil(simde__m128d_to_wasm_v128(a)));
+  #endif
+  return simde_mm_round_pd(a, SIMDE_MM_FROUND_TO_POS_INF);
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_ceil_pd
+  #define _mm_ceil_pd(a) simde_mm_ceil_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_ceil_ps (simde__m128 a) {
+  #if defined(SIMDE_WASM_SIMD128_NATIVE)
+    return simde__m128_from_wasm_v128(wasm_f32x4_ceil(simde__m128_to_wasm_v128(a)));
+  #endif
+  return simde_mm_round_ps(a, SIMDE_MM_FROUND_TO_POS_INF);
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_ceil_ps
+  #define _mm_ceil_ps(a) simde_mm_ceil_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_ceil_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_ceil_sd(a, b);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(simde_math_ceilf)
+      r_ = simde__m128d_to_private(simde_mm_set_pd(a_.f64[1], simde_math_ceil(b_.f64[0])));
+    #else
+      HEDLEY_UNREACHABLE();
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_ceil_sd
+  #define _mm_ceil_sd(a, b) simde_mm_ceil_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_ceil_ss (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_ceil_ss(a, b);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+    return simde_mm_move_ss(a, simde_mm_ceil_ps(b));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_ss(a, simde_mm_ceil_ps(simde_x_mm_broadcastlow_ps(b)));
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(simde_math_ceilf)
+      r_ = simde__m128_to_private(simde_mm_set_ps(a_.f32[3], a_.f32[2], a_.f32[1], simde_math_ceilf(b_.f32[0])));
+    #else
+      HEDLEY_UNREACHABLE();
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_ceil_ss
+  #define _mm_ceil_ss(a, b) simde_mm_ceil_ss(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_cmpeq_epi64 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_cmpeq_epi64(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_u64 = vceqq_u64(a_.neon_u64, b_.neon_u64);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      /* (a == b) -> (a_lo == b_lo) && (a_hi == b_hi) */
+      uint32x4_t cmp = vceqq_u32(a_.neon_u32, b_.neon_u32);
+      uint32x4_t swapped = vrev64q_u32(cmp);
+      r_.neon_u32 = vandq_u32(cmp, swapped);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), a_.i64 == b_.i64);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_i64 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed long long), vec_cmpeq(a_.altivec_i64, b_.altivec_i64));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
+        r_.u64[i] = (a_.u64[i] == b_.u64[i]) ? ~UINT64_C(0) : UINT64_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cmpeq_epi64
+  #define _mm_cmpeq_epi64(a, b) simde_mm_cmpeq_epi64(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_cvtepi8_epi16 (simde__m128i a) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_cvtepi8_epi16(a);
+  #elif defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_srai_epi16(_mm_unpacklo_epi8(a, a), 8);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      int8x16_t s8x16 = a_.neon_i8;                   /* xxxx xxxx xxxx DCBA */
+      int16x8_t s16x8 = vmovl_s8(vget_low_s8(s8x16)); /* 0x0x 0x0x 0D0C 0B0A */
+      r_.neon_i16 = s16x8;
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i16x8_extend_low_i8x16(a_.wasm_v128);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_) && defined(SIMDE_VECTOR_SCALAR) && (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE)
+      r_.i16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i16), SIMDE_SHUFFLE_VECTOR_(8, 16, a_.i8, a_.i8,
+          -1,  0, -1,  1, -1,  2,  -1,  3,
+          -1,  4, -1,  5, -1,  6,  -1,  7));
+      r_.i16 >>= 8;
+    #elif defined(SIMDE_CONVERT_VECTOR_)
+      SIMDE_CONVERT_VECTOR_(r_.i16, a_.m64_private[0].i8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = a_.i8[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cvtepi8_epi16
+  #define _mm_cvtepi8_epi16(a) simde_mm_cvtepi8_epi16(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_cvtepi8_epi32 (simde__m128i a) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_cvtepi8_epi32(a);
+  #elif defined(SIMDE_X86_SSE2_NATIVE)
+    __m128i tmp = _mm_unpacklo_epi8(a, a);
+    tmp = _mm_unpacklo_epi16(tmp, tmp);
+    return _mm_srai_epi32(tmp, 24);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      int8x16_t s8x16 = a_.neon_i8;                     /* xxxx xxxx xxxx DCBA */
+      int16x8_t s16x8 = vmovl_s8(vget_low_s8(s8x16));   /* 0x0x 0x0x 0D0C 0B0A */
+      int32x4_t s32x4 = vmovl_s16(vget_low_s16(s16x8)); /* 000D 000C 000B 000A */
+      r_.neon_i32 = s32x4;
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i32x4_extend_low_i16x8(wasm_i16x8_extend_low_i8x16(a_.wasm_v128));
+    #elif defined(SIMDE_SHUFFLE_VECTOR_) && defined(SIMDE_VECTOR_SCALAR) && (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE)
+      r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), SIMDE_SHUFFLE_VECTOR_(8, 16, a_.i8, a_.i8,
+          -1, -1, -1,  0, -1, -1,  -1,  1,
+          -1, -1, -1,  2, -1, -1,  -1,  3));
+      r_.i32 >>= 24;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = a_.i8[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cvtepi8_epi32
+  #define _mm_cvtepi8_epi32(a) simde_mm_cvtepi8_epi32(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_cvtepi8_epi64 (simde__m128i a) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_cvtepi8_epi64(a);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      int8x16_t s8x16 = a_.neon_i8;                     /* xxxx xxxx xxxx xxBA */
+      int16x8_t s16x8 = vmovl_s8(vget_low_s8(s8x16));   /* 0x0x 0x0x 0x0x 0B0A */
+      int32x4_t s32x4 = vmovl_s16(vget_low_s16(s16x8)); /* 000x 000x 000B 000A */
+      int64x2_t s64x2 = vmovl_s32(vget_low_s32(s32x4)); /* 0000 000B 0000 000A */
+      r_.neon_i64 = s64x2;
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      v128_t extra = wasm_i32x4_extend_low_i16x8(wasm_i16x8_extend_low_i8x16(a_.wasm_v128));
+      v128_t sign = wasm_i32x4_gt(wasm_i64x2_const(0, 0), extra);
+      r_.wasm_v128 = wasm_i32x4_shuffle(extra, sign, 0, 4, 1, 5);
+    #elif (!defined(SIMDE_ARCH_X86) && !defined(SIMDE_ARCH_AMD64)) && defined(SIMDE_SHUFFLE_VECTOR_) && defined(SIMDE_VECTOR_SCALAR) && (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE)
+      /* Disabled on x86 due to lack of 64-bit arithmetic shift until
+       * until AVX-512 (at which point we would be using the native
+       * _mm_cvtepi_epi64 anyways). */
+      r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), SIMDE_SHUFFLE_VECTOR_(8, 16, a_.i8, a_.i8,
+          -1, -1, -1, -1, -1, -1,  -1,  0,
+          -1, -1, -1, -1, -1, -1,  -1,  1));
+      r_.i64 >>= 56;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = a_.i8[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cvtepi8_epi64
+  #define _mm_cvtepi8_epi64(a) simde_mm_cvtepi8_epi64(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_cvtepu8_epi16 (simde__m128i a) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_cvtepu8_epi16(a);
+  #elif defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_unpacklo_epi8(a, _mm_setzero_si128());
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      uint8x16_t u8x16 = a_.neon_u8;                   /* xxxx xxxx xxxx DCBA */
+      uint16x8_t u16x8 = vmovl_u8(vget_low_u8(u8x16)); /* 0x0x 0x0x 0D0C 0B0A */
+      r_.neon_u16 = u16x8;
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_u16x8_extend_low_u8x16(a_.wasm_v128);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_) && (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE)
+      __typeof__(r_.i8) z = { 0, };
+      r_.i16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i16), SIMDE_SHUFFLE_VECTOR_(8, 16, a_.i8, z,
+          0, 16, 1, 17, 2, 18, 3, 19,
+          4, 20, 5, 21, 6, 22, 7, 23));
+    #elif defined(SIMDE_CONVERT_VECTOR_) && !defined(SIMDE_BUG_CLANG_45541) && (!defined(SIMDE_ARCH_POWER) || !defined(__clang__))
+      SIMDE_CONVERT_VECTOR_(r_.i16, a_.m64_private[0].u8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = a_.u8[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cvtepu8_epi16
+  #define _mm_cvtepu8_epi16(a) simde_mm_cvtepu8_epi16(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_cvtepu8_epi32 (simde__m128i a) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_cvtepu8_epi32(a);
+  #elif defined(SIMDE_X86_SSSE3_NATIVE)
+    __m128i s = _mm_set_epi8(
+        HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x03),
+        HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x02),
+        HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x01),
+        HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x00));
+    return _mm_shuffle_epi8(a, s);
+  #elif defined(SIMDE_X86_SSE2_NATIVE)
+    __m128i z = _mm_setzero_si128();
+    return _mm_unpacklo_epi16(_mm_unpacklo_epi8(a, z), z);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      uint8x16_t u8x16 = a_.neon_u8;                     /* xxxx xxxx xxxx DCBA */
+      uint16x8_t u16x8 = vmovl_u8(vget_low_u8(u8x16));   /* 0x0x 0x0x 0D0C 0B0A */
+      uint32x4_t u32x4 = vmovl_u16(vget_low_u16(u16x8)); /* 000D 000C 000B 000A */
+      r_.neon_u32 = u32x4;
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_u32x4_extend_low_u16x8(wasm_u16x8_extend_low_u8x16(a_.wasm_v128));
+    #elif defined(SIMDE_SHUFFLE_VECTOR_) && (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE)
+      __typeof__(r_.i8) z = { 0, };
+      r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), SIMDE_SHUFFLE_VECTOR_(8, 16, a_.i8, z,
+          0, 17, 18, 19, 1, 21, 22, 23,
+          2, 25, 26, 27, 3, 29, 30, 31));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = a_.u8[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cvtepu8_epi32
+  #define _mm_cvtepu8_epi32(a) simde_mm_cvtepu8_epi32(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_cvtepu8_epi64 (simde__m128i a) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_cvtepu8_epi64(a);
+  #elif defined(SIMDE_X86_SSSE3_NATIVE)
+    __m128i s = _mm_set_epi8(
+        HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80),
+        HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x01),
+        HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80),
+        HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x00));
+    return _mm_shuffle_epi8(a, s);
+  #elif defined(SIMDE_X86_SSE2_NATIVE)
+    __m128i z = _mm_setzero_si128();
+    return _mm_unpacklo_epi32(_mm_unpacklo_epi16(_mm_unpacklo_epi8(a, z), z), z);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      uint8x16_t u8x16 = a_.neon_u8;                     /* xxxx xxxx xxxx xxBA */
+      uint16x8_t u16x8 = vmovl_u8(vget_low_u8(u8x16));   /* 0x0x 0x0x 0x0x 0B0A */
+      uint32x4_t u32x4 = vmovl_u16(vget_low_u16(u16x8)); /* 000x 000x 000B 000A */
+      uint64x2_t u64x2 = vmovl_u32(vget_low_u32(u32x4)); /* 0000 000B 0000 000A */
+      r_.neon_u64 = u64x2;
+    #elif defined(SIMDE_SHUFFLE_VECTOR_) && (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE)
+      __typeof__(r_.i8) z = { 0, };
+      r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), SIMDE_SHUFFLE_VECTOR_(8, 16, a_.i8, z,
+          0, 17, 18, 19, 20, 21, 22, 23,
+          1, 25, 26, 27, 28, 29, 30, 31));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = a_.u8[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cvtepu8_epi64
+  #define _mm_cvtepu8_epi64(a) simde_mm_cvtepu8_epi64(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_cvtepi16_epi32 (simde__m128i a) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_cvtepi16_epi32(a);
+  #elif defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_srai_epi32(_mm_unpacklo_epi16(a, a), 16);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vmovl_s16(vget_low_s16(a_.neon_i16));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i32x4_extend_low_i16x8(a_.wasm_v128);
+    #elif !defined(SIMDE_ARCH_X86) && defined(SIMDE_SHUFFLE_VECTOR_) && defined(SIMDE_VECTOR_SCALAR) && (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE)
+      r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), SIMDE_SHUFFLE_VECTOR_(16, 16, a_.i16, a_.i16, 8, 0, 10, 1, 12, 2, 14, 3));
+      r_.i32 >>= 16;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = a_.i16[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cvtepi16_epi32
+  #define _mm_cvtepi16_epi32(a) simde_mm_cvtepi16_epi32(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_cvtepu16_epi32 (simde__m128i a) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_cvtepu16_epi32(a);
+  #elif defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_unpacklo_epi16(a, _mm_setzero_si128());
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vmovl_u16(vget_low_u16(a_.neon_u16));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_u32x4_extend_low_u16x8(a_.wasm_v128);
+    #elif defined(SIMDE_SHUFFLE_VECTOR_) && (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE)
+      __typeof__(r_.u16) z = { 0, };
+      r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), SIMDE_SHUFFLE_VECTOR_(16, 16, a_.u16, z,
+          0, 9, 1, 11, 2, 13, 3, 15));
+    #elif defined(SIMDE_CONVERT_VECTOR_) && !defined(SIMDE_BUG_CLANG_45541) && (!defined(SIMDE_ARCH_POWER) || !defined(__clang__))
+      SIMDE_CONVERT_VECTOR_(r_.i32, a_.m64_private[0].u16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = a_.u16[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cvtepu16_epi32
+  #define _mm_cvtepu16_epi32(a) simde_mm_cvtepu16_epi32(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_cvtepu16_epi64 (simde__m128i a) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_cvtepu16_epi64(a);
+  #elif defined(SIMDE_X86_SSE2_NATIVE)
+    __m128i z = _mm_setzero_si128();
+    return _mm_unpacklo_epi32(_mm_unpacklo_epi16(a, z), z);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      uint16x8_t u16x8 = a_.neon_u16;                    /* xxxx xxxx xxxx 0B0A */
+      uint32x4_t u32x4 = vmovl_u16(vget_low_u16(u16x8)); /* 000x 000x 000B 000A */
+      uint64x2_t u64x2 = vmovl_u32(vget_low_u32(u32x4)); /* 0000 000B 0000 000A */
+      r_.neon_u64 = u64x2;
+    #elif defined(SIMDE_SHUFFLE_VECTOR_) && (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE)
+      __typeof__(r_.u16) z = { 0, };
+      r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), SIMDE_SHUFFLE_VECTOR_(16, 16, a_.u16, z,
+          0,  9, 10, 11,
+          1, 13, 14, 15));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = a_.u16[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cvtepu16_epi64
+  #define _mm_cvtepu16_epi64(a) simde_mm_cvtepu16_epi64(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_cvtepi16_epi64 (simde__m128i a) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_cvtepi16_epi64(a);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      int16x8_t s16x8 = a_.neon_i16;                    /* xxxx xxxx xxxx 0B0A */
+      int32x4_t s32x4 = vmovl_s16(vget_low_s16(s16x8)); /* 000x 000x 000B 000A */
+      int64x2_t s64x2 = vmovl_s32(vget_low_s32(s32x4)); /* 0000 000B 0000 000A */
+      r_.neon_i64 = s64x2;
+    #elif (!defined(SIMDE_ARCH_X86) && !defined(SIMDE_ARCH_AMD64)) && defined(SIMDE_SHUFFLE_VECTOR_) && defined(SIMDE_VECTOR_SCALAR) && (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE)
+      r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), SIMDE_SHUFFLE_VECTOR_(16, 16, a_.i16, a_.i16,
+           8,  9, 10, 0,
+          12, 13, 14, 1));
+      r_.i64 >>= 48;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = a_.i16[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cvtepi16_epi64
+  #define _mm_cvtepi16_epi64(a) simde_mm_cvtepi16_epi64(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_cvtepi32_epi64 (simde__m128i a) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_cvtepi32_epi64(a);
+  #elif defined(SIMDE_X86_SSE2_NATIVE)
+    __m128i tmp = _mm_shuffle_epi32(a, 0x50);
+    tmp = _mm_srai_epi32(tmp, 31);
+    tmp = _mm_shuffle_epi32(tmp, 0xed);
+    return _mm_unpacklo_epi32(a, tmp);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i64 = vmovl_s32(vget_low_s32(a_.neon_i32));
+    #elif !defined(SIMDE_ARCH_X86) && defined(SIMDE_SHUFFLE_VECTOR_) && defined(SIMDE_VECTOR_SCALAR) && (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE)
+      r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), SIMDE_SHUFFLE_VECTOR_(32, 16, a_.i32, a_.i32, -1, 0, -1, 1));
+      r_.i64 >>= 32;
+    #elif defined(SIMDE_CONVERT_VECTOR_)
+      SIMDE_CONVERT_VECTOR_(r_.i64, a_.m64_private[0].i32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = a_.i32[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cvtepi32_epi64
+  #define _mm_cvtepi32_epi64(a) simde_mm_cvtepi32_epi64(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_cvtepu32_epi64 (simde__m128i a) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_cvtepu32_epi64(a);
+  #elif defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_unpacklo_epi32(a, _mm_setzero_si128());
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u64 = vmovl_u32(vget_low_u32(a_.neon_u32));
+    #elif defined(SIMDE_VECTOR_SCALAR) && defined(SIMDE_SHUFFLE_VECTOR_) && (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE)
+      __typeof__(r_.u32) z = { 0, };
+      r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), SIMDE_SHUFFLE_VECTOR_(32, 16, a_.u32, z, 0, 4, 1, 6));
+    #elif defined(SIMDE_CONVERT_VECTOR_)
+      SIMDE_CONVERT_VECTOR_(r_.i64, a_.m64_private[0].u32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = a_.u32[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cvtepu32_epi64
+  #define _mm_cvtepu32_epi64(a) simde_mm_cvtepu32_epi64(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_dp_pd (simde__m128d a, simde__m128d b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255)  {
+  simde__m128d_private
+    r_,
+    a_ = simde__m128d_to_private(a),
+    b_ = simde__m128d_to_private(b);
+
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    r_.neon_f64 = vmulq_f64(a_.neon_f64, b_.neon_f64);
+
+    switch (imm8) {
+      case 0xff:
+        r_.neon_f64 = vaddq_f64(r_.neon_f64, vextq_f64(r_.neon_f64, r_.neon_f64, 1));
+        break;
+      case 0x13:
+        r_.neon_f64 = vdupq_lane_f64(vget_low_f64(r_.neon_f64), 0);
+        break;
+      default:
+        { /* imm8 is a compile-time constant, so this all becomes just a load */
+          uint64_t mask_data[] = {
+            (imm8 & (1 << 4)) ? ~UINT64_C(0) : UINT64_C(0),
+            (imm8 & (1 << 5)) ? ~UINT64_C(0) : UINT64_C(0),
+          };
+          r_.neon_f64 = vreinterpretq_f64_u64(vandq_u64(vld1q_u64(mask_data), vreinterpretq_u64_f64(r_.neon_f64)));
+        }
+
+        r_.neon_f64 = vdupq_n_f64(vaddvq_f64(r_.neon_f64));
+
+        {
+          uint64_t mask_data[] = {
+            (imm8 & 1) ? ~UINT64_C(0) : UINT64_C(0),
+            (imm8 & 2) ? ~UINT64_C(0) : UINT64_C(0)
+          };
+          r_.neon_f64 = vreinterpretq_f64_u64(vandq_u64(vld1q_u64(mask_data), vreinterpretq_u64_f64(r_.neon_f64)));
+        }
+        break;
+    }
+  #else
+    simde_float64 sum = SIMDE_FLOAT64_C(0.0);
+
+    SIMDE_VECTORIZE_REDUCTION(+:sum)
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      sum += ((imm8 >> (i + 4)) & 1) ? (a_.f64[i] * b_.f64[i]) : 0.0;
+    }
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = ((imm8 >> i) & 1) ? sum : 0.0;
+    }
+  #endif
+
+  return simde__m128d_from_private(r_);
+}
+#if defined(SIMDE_X86_SSE4_1_NATIVE)
+#  define simde_mm_dp_pd(a, b, imm8) _mm_dp_pd(a, b, imm8)
+#endif
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_dp_pd
+  #define _mm_dp_pd(a, b, imm8) simde_mm_dp_pd(a, b, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_dp_ps (simde__m128 a, simde__m128 b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255)  {
+  simde__m128_private
+    r_,
+    a_ = simde__m128_to_private(a),
+    b_ = simde__m128_to_private(b);
+
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    r_.neon_f32 = vmulq_f32(a_.neon_f32, b_.neon_f32);
+
+    switch (imm8) {
+      case 0xff:
+        r_.neon_f32 = vdupq_n_f32(vaddvq_f32(r_.neon_f32));
+        break;
+      case 0x7f:
+        r_.neon_f32 = vsetq_lane_f32(0, r_.neon_f32, 3);
+        r_.neon_f32 = vdupq_n_f32(vaddvq_f32(r_.neon_f32));
+        break;
+      default:
+        {
+          {
+            uint32_t mask_data[] = {
+              (imm8 & (1 << 4)) ? ~UINT32_C(0) : UINT32_C(0),
+              (imm8 & (1 << 5)) ? ~UINT32_C(0) : UINT32_C(0),
+              (imm8 & (1 << 6)) ? ~UINT32_C(0) : UINT32_C(0),
+              (imm8 & (1 << 7)) ? ~UINT32_C(0) : UINT32_C(0)
+            };
+            r_.neon_f32 = vreinterpretq_f32_u32(vandq_u32(vld1q_u32(mask_data), vreinterpretq_u32_f32(r_.neon_f32)));
+          }
+
+          r_.neon_f32 = vdupq_n_f32(vaddvq_f32(r_.neon_f32));
+
+          {
+            uint32_t mask_data[] = {
+              (imm8 & 1) ? ~UINT32_C(0) : UINT32_C(0),
+              (imm8 & 2) ? ~UINT32_C(0) : UINT32_C(0),
+              (imm8 & 4) ? ~UINT32_C(0) : UINT32_C(0),
+              (imm8 & 8) ? ~UINT32_C(0) : UINT32_C(0)
+            };
+            r_.neon_f32 = vreinterpretq_f32_u32(vandq_u32(vld1q_u32(mask_data), vreinterpretq_u32_f32(r_.neon_f32)));
+          }
+        }
+        break;
+    }
+  #else
+    simde_float32 sum = SIMDE_FLOAT32_C(0.0);
+
+    SIMDE_VECTORIZE_REDUCTION(+:sum)
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      sum += ((imm8 >> (i + 4)) & 1) ? (a_.f32[i] * b_.f32[i]) : SIMDE_FLOAT32_C(0.0);
+    }
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = ((imm8 >> i) & 1) ? sum : SIMDE_FLOAT32_C(0.0);
+    }
+  #endif
+
+  return simde__m128_from_private(r_);
+}
+#if defined(SIMDE_X86_SSE4_1_NATIVE)
+  #if defined(HEDLEY_MCST_LCC_VERSION)
+    #define simde_mm_dp_ps(a, b, imm8) (__extension__ ({ \
+      SIMDE_LCC_DISABLE_DEPRECATED_WARNINGS \
+      _mm_dp_ps((a), (b), (imm8)); \
+      SIMDE_LCC_REVERT_DEPRECATED_WARNINGS \
+    }))
+  #else
+    #define simde_mm_dp_ps(a, b, imm8) _mm_dp_ps(a, b, imm8)
+  #endif
+#endif
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_dp_ps
+  #define _mm_dp_ps(a, b, imm8) simde_mm_dp_ps(a, b, imm8)
+#endif
+
+#if defined(simde_mm_extract_epi8)
+#  undef simde_mm_extract_epi8
+#endif
+SIMDE_FUNCTION_ATTRIBUTES
+int8_t
+simde_mm_extract_epi8 (simde__m128i a, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 15)  {
+  simde__m128i_private
+    a_ = simde__m128i_to_private(a);
+
+  #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+    #if defined(SIMDE_BUG_GCC_95227)
+      (void) a_;
+      (void) imm8;
+    #endif
+    return vec_extract(a_.altivec_i8, imm8);
+  #else
+    return a_.i8[imm8 & 15];
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_NATIVE) && !defined(SIMDE_BUG_GCC_BAD_MM_EXTRACT_EPI8)
+#  define simde_mm_extract_epi8(a, imm8) HEDLEY_STATIC_CAST(int8_t, _mm_extract_epi8(a, imm8))
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+#  define simde_mm_extract_epi8(a, imm8) vgetq_lane_s8(simde__m128i_to_neon_i8(a), imm8)
+#elif defined(SIMDE_WASM_SIMD128_NATIVE)
+#  define simde_mm_extract_epi8(a, imm8) wasm_u8x16_extract_lane(simde__m128i_to_wasm_v128((a)), (imm8) & 15)
+#endif
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_extract_epi8
+  #define _mm_extract_epi8(a, imm8) HEDLEY_STATIC_CAST(int, simde_mm_extract_epi8(a, imm8))
+#endif
+
+#if defined(simde_mm_extract_epi32)
+#  undef simde_mm_extract_epi32
+#endif
+SIMDE_FUNCTION_ATTRIBUTES
+int32_t
+simde_mm_extract_epi32 (simde__m128i a, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 3)  {
+  simde__m128i_private
+    a_ = simde__m128i_to_private(a);
+
+  #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+    #if defined(SIMDE_BUG_GCC_95227)
+      (void) a_;
+      (void) imm8;
+    #endif
+    return vec_extract(a_.altivec_i32, imm8);
+  #else
+    return a_.i32[imm8 & 3];
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_NATIVE)
+#  define simde_mm_extract_epi32(a, imm8) _mm_extract_epi32(a, imm8)
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+#  define simde_mm_extract_epi32(a, imm8) vgetq_lane_s32(simde__m128i_to_neon_i32(a), imm8)
+#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+#  define simde_mm_extract_epi32(a, imm8) HEDLEY_STATIC_CAST(int32_t, vec_extract(simde__m128i_to_altivec_i32(a), imm8))
+#elif defined(SIMDE_WASM_SIMD128_NATIVE)
+#  define simde_mm_extract_epi32(a, imm8) wasm_i32x4_extract_lane(simde__m128i_to_wasm_v128((a)), (imm8) & 3)
+#endif
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_extract_epi32
+  #define _mm_extract_epi32(a, imm8) simde_mm_extract_epi32(a, imm8)
+#endif
+
+#if defined(simde_mm_extract_epi64)
+#  undef simde_mm_extract_epi64
+#endif
+SIMDE_FUNCTION_ATTRIBUTES
+int64_t
+simde_mm_extract_epi64 (simde__m128i a, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 1)  {
+  simde__m128i_private
+    a_ = simde__m128i_to_private(a);
+
+  #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
+    #if defined(SIMDE_BUG_GCC_95227)
+      (void) a_;
+      (void) imm8;
+    #endif
+    return vec_extract(a_.altivec_i64, imm8);
+  #else
+    return a_.i64[imm8 & 1];
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_NATIVE) && defined(SIMDE_ARCH_AMD64)
+#  define simde_mm_extract_epi64(a, imm8) _mm_extract_epi64(a, imm8)
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+#  define simde_mm_extract_epi64(a, imm8) vgetq_lane_s64(simde__m128i_to_neon_i64(a), imm8)
+#elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
+#  define simde_mm_extract_epi64(a, imm8) HEDLEY_STATIC_CAST(int64_t, vec_extract(simde__m128i_to_altivec_i64(a), imm8))
+#endif
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARCH_AMD64))
+  #undef _mm_extract_epi64
+  #define _mm_extract_epi64(a, imm8) simde_mm_extract_epi64(a, imm8)
+#endif
+
+#if defined(simde_mm_extract_ps)
+#  undef simde_mm_extract_ps
+#endif
+SIMDE_FUNCTION_ATTRIBUTES
+int32_t
+simde_mm_extract_ps (simde__m128 a, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 3)  {
+  simde__m128_private
+    a_ = simde__m128_to_private(a);
+
+  return a_.i32[imm8 & 3];
+}
+#if defined(SIMDE_X86_SSE4_1_NATIVE)
+  #define simde_mm_extract_ps(a, imm8) _mm_extract_ps(a, imm8)
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_mm_extract_ps(a, imm8) vgetq_lane_s32(simde__m128_to_neon_i32(a), imm8)
+#elif defined(SIMDE_WASM_SIMD128_NATIVE)
+  #define simde_mm_extract_ps(a, imm8) wasm_i32x4_extract_lane(simde__m128_to_wasm_v128((a)), (imm8) & 3)
+#endif
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_extract_ps
+  #define _mm_extract_ps(a, imm8) simde_mm_extract_ps(a, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_floor_pd (simde__m128d a) {
+  #if defined(SIMDE_WASM_SIMD128_NATIVE)
+    return simde__m128d_from_wasm_v128(wasm_f64x2_floor(simde__m128d_to_wasm_v128(a)));
+  #endif
+  return simde_mm_round_pd(a, SIMDE_MM_FROUND_TO_NEG_INF);
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_floor_pd
+  #define _mm_floor_pd(a) simde_mm_floor_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_floor_ps (simde__m128 a) {
+  #if defined(SIMDE_WASM_SIMD128_NATIVE)
+    return simde__m128_from_wasm_v128(wasm_f32x4_floor(simde__m128_to_wasm_v128(a)));
+  #endif
+  return simde_mm_round_ps(a, SIMDE_MM_FROUND_TO_NEG_INF);
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_floor_ps
+  #define _mm_floor_ps(a) simde_mm_floor_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_floor_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_floor_sd(a, b);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(simde_math_floor)
+      r_.f64[0] = simde_math_floor(b_.f64[0]);
+      r_.f64[1] = a_.f64[1];
+    #else
+      HEDLEY_UNREACHABLE();
+    #endif
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_floor_sd
+  #define _mm_floor_sd(a, b) simde_mm_floor_sd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_floor_ss (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_floor_ss(a, b);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS)
+      return simde_mm_move_ss(a, simde_mm_floor_ps(b));
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    return simde_mm_move_ss(a, simde_mm_floor_ps(simde_x_mm_broadcastlow_ps(b)));
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(simde_math_floorf)
+      r_.f32[0] = simde_math_floorf(b_.f32[0]);
+      for (size_t i = 1 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = a_.f32[i];
+      }
+    #else
+      HEDLEY_UNREACHABLE();
+    #endif
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_floor_ss
+  #define _mm_floor_ss(a, b) simde_mm_floor_ss(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_insert_epi8 (simde__m128i a, int i, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 15)  {
+  simde__m128i_private
+    r_ = simde__m128i_to_private(a);
+
+  r_.i8[imm8] = HEDLEY_STATIC_CAST(int8_t, i);
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_SSE4_1_NATIVE)
+  /* clang-3.8 returns an incompatible type, so we need the cast.  MSVC
+   * can't handle the cast ("error C2440: 'type cast': cannot convert
+   * from '__m128i' to '__m128i'").  */
+  #if defined(__clang__)
+    #define simde_mm_insert_epi8(a, i, imm8) HEDLEY_REINTERPRET_CAST(__m128i, _mm_insert_epi8(a, i, imm8))
+  #else
+    #define simde_mm_insert_epi8(a, i, imm8) _mm_insert_epi8(a, i, imm8)
+  #endif
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+#  define simde_mm_insert_epi8(a, i, imm8) simde__m128i_from_neon_i8(vsetq_lane_s8(i, simde__m128i_to_neon_i8(a), imm8))
+#elif defined(SIMDE_WASM_SIMD128_NATIVE)
+#  define simde_mm_insert_epi8(a, i, imm8) simde__m128i_from_wasm_v128(wasm_i8x16_replace_lane(simde__m128i_to_wasm_v128((a)), (imm8) & 15, HEDLEY_STATIC_CAST(int8_t, (i))))
+#endif
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_insert_epi8
+  #define _mm_insert_epi8(a, i, imm8) simde_mm_insert_epi8(a, i, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_insert_epi32 (simde__m128i a, int i, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 3)  {
+  simde__m128i_private
+    r_ = simde__m128i_to_private(a);
+
+  r_.i32[imm8] = HEDLEY_STATIC_CAST(int32_t, i);
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_SSE4_1_NATIVE)
+  #if defined(__clang__)
+    #define simde_mm_insert_epi32(a, i, imm8) HEDLEY_REINTERPRET_CAST(__m128i, _mm_insert_epi32(a, i, imm8))
+  #else
+    #define simde_mm_insert_epi32(a, i, imm8) _mm_insert_epi32(a, i, imm8)
+  #endif
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+#  define simde_mm_insert_epi32(a, i, imm8) simde__m128i_from_neon_i32(vsetq_lane_s32(i, simde__m128i_to_neon_i32(a), imm8))
+#elif defined(SIMDE_WASM_SIMD128_NATIVE)
+#  define simde_mm_insert_epi32(a, i, imm8) simde__m128i_from_wasm_v128(wasm_i32x4_replace_lane(simde__m128i_to_wasm_v128((a)), (imm8) & 3, (i)))
+#endif
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_insert_epi32
+  #define _mm_insert_epi32(a, i, imm8) simde_mm_insert_epi32(a, i, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_insert_epi64 (simde__m128i a, int64_t i, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 1)  {
+  #if defined(SIMDE_BUG_GCC_94482)
+    simde__m128i_private
+      a_ = simde__m128i_to_private(a);
+
+    switch(imm8) {
+      case 0:
+        return simde_mm_set_epi64x(a_.i64[1], i);
+        break;
+      case 1:
+        return simde_mm_set_epi64x(i, a_.i64[0]);
+        break;
+      default:
+        HEDLEY_UNREACHABLE();
+        break;
+    }
+  #else
+    simde__m128i_private
+      r_ = simde__m128i_to_private(a);
+
+    r_.i64[imm8] = i;
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_NATIVE) && defined(SIMDE_ARCH_AMD64)
+#  define simde_mm_insert_epi64(a, i, imm8) _mm_insert_epi64(a, i, imm8)
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+#  define simde_mm_insert_epi64(a, i, imm8) simde__m128i_from_neon_i64(vsetq_lane_s64(i, simde__m128i_to_neon_i64(a), imm8))
+#elif defined(SIMDE_WASM_SIMD128_NATIVE)
+#  define simde_mm_insert_epi64(a, i, imm8) simde__m128i_from_wasm_v128(wasm_i64x2_replace_lane(simde__m128i_to_wasm_v128((a)), (imm8) & 1, (i)))
+#endif
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARCH_AMD64))
+  #undef _mm_insert_epi64
+  #define _mm_insert_epi64(a, i, imm8) simde_mm_insert_epi64(a, i, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_insert_ps (simde__m128 a, simde__m128 b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255)  {
+  simde__m128_private
+    r_,
+    a_ = simde__m128_to_private(a),
+    b_ = simde__m128_to_private(b);
+
+  float tmp1_ = b_.f32[(imm8 >> 6) & 3];
+  a_.f32[(imm8 >> 4) & 3] = tmp1_;
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+    r_.f32[i] = ((imm8 >> i) & 1 ) ? SIMDE_FLOAT32_C(0.0) : a_.f32[i];
+  }
+
+  return simde__m128_from_private(r_);
+}
+#if defined(SIMDE_X86_SSE4_1_NATIVE)
+#  define simde_mm_insert_ps(a, b, imm8) _mm_insert_ps(a, b, imm8)
+#endif
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_insert_ps
+  #define _mm_insert_ps(a, b, imm8) simde_mm_insert_ps(a, b, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_max_epi8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE) && !defined(__PGI)
+    return _mm_max_epi8(a, b);
+  #elif defined(SIMDE_X86_SSE2_NATIVE)
+    __m128i m = _mm_cmpgt_epi8(a, b);
+    return _mm_or_si128(_mm_and_si128(m, a), _mm_andnot_si128(m, b));
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i8 = vmaxq_s8(a_.neon_i8, b_.neon_i8);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i8x16_max(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_i8 = vec_max(a_.altivec_i8, b_.altivec_i8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = a_.i8[i] > b_.i8[i] ? a_.i8[i] : b_.i8[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_max_epi8
+  #define _mm_max_epi8(a, b) simde_mm_max_epi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_max_epi32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE) && !defined(__PGI)
+    return _mm_max_epi32(a, b);
+  #elif defined(SIMDE_X86_SSE2_NATIVE)
+    __m128i m = _mm_cmpgt_epi32(a, b);
+    return _mm_or_si128(_mm_and_si128(m, a), _mm_andnot_si128(m, b));
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vmaxq_s32(a_.neon_i32, b_.neon_i32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i32x4_max(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_i32 = vec_max(a_.altivec_i32, b_.altivec_i32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = a_.i32[i] > b_.i32[i] ? a_.i32[i] : b_.i32[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_max_epi32
+  #define _mm_max_epi32(a, b) simde_mm_max_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_max_epu16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_max_epu16(a, b);
+  #elif defined(SIMDE_X86_SSE2_NATIVE)
+    /* https://github.com/simd-everywhere/simde/issues/855#issuecomment-881656284 */
+    return _mm_add_epi16(b, _mm_subs_epu16(a, b));
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u16 = vmaxq_u16(a_.neon_u16, b_.neon_u16);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_u16x8_max(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_u16 = vec_max(a_.altivec_u16, b_.altivec_u16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+        r_.u16[i] = a_.u16[i] > b_.u16[i] ? a_.u16[i] : b_.u16[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_max_epu16
+  #define _mm_max_epu16(a, b) simde_mm_max_epu16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_max_epu32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_max_epu32(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vmaxq_u32(a_.neon_u32, b_.neon_u32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_u32x4_max(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_u32 = vec_max(a_.altivec_u32, b_.altivec_u32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+        r_.u32[i] = a_.u32[i] > b_.u32[i] ? a_.u32[i] : b_.u32[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_max_epu32
+  #define _mm_max_epu32(a, b) simde_mm_max_epu32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_min_epi8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE) && !defined(__PGI)
+    return _mm_min_epi8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i8 = vminq_s8(a_.neon_i8, b_.neon_i8);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i8x16_min(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_i8 = vec_min(a_.altivec_i8, b_.altivec_i8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = a_.i8[i] < b_.i8[i] ? a_.i8[i] : b_.i8[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_min_epi8
+  #define _mm_min_epi8(a, b) simde_mm_min_epi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_min_epi32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE) && !defined(__PGI)
+    return _mm_min_epi32(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vminq_s32(a_.neon_i32, b_.neon_i32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i32x4_min(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_i32 = vec_min(a_.altivec_i32, b_.altivec_i32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = a_.i32[i] < b_.i32[i] ? a_.i32[i] : b_.i32[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_min_epi32
+  #define _mm_min_epi32(a, b) simde_mm_min_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_min_epu16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_min_epu16(a, b);
+  #elif defined(SIMDE_X86_SSE2_NATIVE)
+    /* https://github.com/simd-everywhere/simde/issues/855#issuecomment-881656284 */
+    return _mm_sub_epi16(a, _mm_subs_epu16(a, b));
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u16 = vminq_u16(a_.neon_u16, b_.neon_u16);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_u16x8_min(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_u16 = vec_min(a_.altivec_u16, b_.altivec_u16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+        r_.u16[i] = a_.u16[i] < b_.u16[i] ? a_.u16[i] : b_.u16[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_min_epu16
+  #define _mm_min_epu16(a, b) simde_mm_min_epu16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_min_epu32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_min_epu32(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vminq_u32(a_.neon_u32, b_.neon_u32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_u32x4_min(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_u32 = vec_min(a_.altivec_u32, b_.altivec_u32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+        r_.u32[i] = a_.u32[i] < b_.u32[i] ? a_.u32[i] : b_.u32[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_min_epu32
+  #define _mm_min_epu32(a, b) simde_mm_min_epu32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_minpos_epu16 (simde__m128i a) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_minpos_epu16(a);
+  #else
+    simde__m128i_private
+      r_ = simde__m128i_to_private(simde_mm_setzero_si128()),
+      a_ = simde__m128i_to_private(a);
+
+    r_.u16[0] = UINT16_MAX;
+    for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+      if (a_.u16[i] < r_.u16[0]) {
+        r_.u16[0] = a_.u16[i];
+        r_.u16[1] = HEDLEY_STATIC_CAST(uint16_t, i);
+      }
+    }
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_minpos_epu16
+  #define _mm_minpos_epu16(a) simde_mm_minpos_epu16(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_mpsadbw_epu8 (simde__m128i a, simde__m128i b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255)  {
+  simde__m128i_private
+    r_,
+    a_ = simde__m128i_to_private(a),
+    b_ = simde__m128i_to_private(b);
+
+  const int a_offset = imm8 & 4;
+  const int b_offset = (imm8 & 3) << 2;
+
+#if defined(simde_math_abs)
+  for (int i = 0 ; i < HEDLEY_STATIC_CAST(int, (sizeof(r_.u16) / sizeof(r_.u16[0]))) ; i++) {
+    r_.u16[i] =
+      HEDLEY_STATIC_CAST(uint16_t, simde_math_abs(HEDLEY_STATIC_CAST(int, a_.u8[a_offset + i + 0] - b_.u8[b_offset + 0]))) +
+      HEDLEY_STATIC_CAST(uint16_t, simde_math_abs(HEDLEY_STATIC_CAST(int, a_.u8[a_offset + i + 1] - b_.u8[b_offset + 1]))) +
+      HEDLEY_STATIC_CAST(uint16_t, simde_math_abs(HEDLEY_STATIC_CAST(int, a_.u8[a_offset + i + 2] - b_.u8[b_offset + 2]))) +
+      HEDLEY_STATIC_CAST(uint16_t, simde_math_abs(HEDLEY_STATIC_CAST(int, a_.u8[a_offset + i + 3] - b_.u8[b_offset + 3])));
+  }
+#else
+  HEDLEY_UNREACHABLE();
+#endif
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_SSE4_1_NATIVE) && !defined(SIMDE_BUG_PGI_30107)
+#  define simde_mm_mpsadbw_epu8(a, b, imm8) _mm_mpsadbw_epu8(a, b, imm8)
+#endif
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_mpsadbw_epu8
+  #define _mm_mpsadbw_epu8(a, b, imm8) simde_mm_mpsadbw_epu8(a, b, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_mul_epi32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_mul_epi32(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      // vmull_s32 upcasts instead of masking, so we downcast.
+      int32x2_t a_lo = vmovn_s64(a_.neon_i64);
+      int32x2_t b_lo = vmovn_s64(b_.neon_i64);
+      r_.neon_i64 = vmull_s32(a_lo, b_lo);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i64x2_make(
+        wasm_i32x4_extract_lane(a_.wasm_v128, 0) * HEDLEY_STATIC_CAST(int64_t, wasm_i32x4_extract_lane(b_.wasm_v128, 0)),
+        wasm_i32x4_extract_lane(a_.wasm_v128, 2) * HEDLEY_STATIC_CAST(int64_t, wasm_i32x4_extract_lane(b_.wasm_v128, 2)));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] =
+          HEDLEY_STATIC_CAST(int64_t, a_.i32[i * 2]) *
+          HEDLEY_STATIC_CAST(int64_t, b_.i32[i * 2]);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_mul_epi32
+  #define _mm_mul_epi32(a, b) simde_mm_mul_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_mullo_epi32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_mullo_epi32(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vmulq_s32(a_.neon_i32, b_.neon_i32);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      (void) a_;
+      (void) b_;
+      r_.altivec_i32 = vec_mul(a_.altivec_i32, b_.altivec_i32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i32x4_mul(a_.wasm_v128, b_.wasm_v128);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.u32[i] = HEDLEY_STATIC_CAST(uint32_t, (HEDLEY_STATIC_CAST(uint64_t, (HEDLEY_STATIC_CAST(int64_t, a_.i32[i]) * HEDLEY_STATIC_CAST(int64_t, b_.i32[i]))) & 0xffffffff));
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_mullo_epi32
+  #define _mm_mullo_epi32(a, b) simde_mm_mullo_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_x_mm_mullo_epu32 (simde__m128i a, simde__m128i b) {
+  simde__m128i_private
+    r_,
+    a_ = simde__m128i_to_private(a),
+    b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vmulq_u32(a_.neon_u32, b_.neon_u32);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u32 = a_.u32 * b_.u32;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+        r_.u32[i] = a_.u32[i] * b_.u32[i];
+      }
+    #endif
+
+  return simde__m128i_from_private(r_);
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_packus_epi32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_packus_epi32(a, b);
+  #elif defined(SIMDE_X86_SSE2_NATIVE)
+    const __m128i max = _mm_set1_epi32(UINT16_MAX);
+    const __m128i tmpa = _mm_andnot_si128(_mm_srai_epi32(a, 31), a);
+    const __m128i tmpb = _mm_andnot_si128(_mm_srai_epi32(b, 31), b);
+    return
+      _mm_packs_epi32(
+        _mm_srai_epi32(_mm_slli_epi32(_mm_or_si128(tmpa, _mm_cmpgt_epi32(tmpa, max)), 16), 16),
+        _mm_srai_epi32(_mm_slli_epi32(_mm_or_si128(tmpb, _mm_cmpgt_epi32(tmpb, max)), 16), 16)
+      );
+  #else
+    simde__m128i_private
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b),
+      r_;
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      #if defined(SIMDE_BUG_CLANG_46840)
+        r_.neon_u16 = vqmovun_high_s32(vreinterpret_s16_u16(vqmovun_s32(a_.neon_i32)), b_.neon_i32);
+      #else
+        r_.neon_u16 = vqmovun_high_s32(vqmovun_s32(a_.neon_i32), b_.neon_i32);
+      #endif
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u16 =
+        vcombine_u16(
+          vqmovun_s32(a_.neon_i32),
+          vqmovun_s32(b_.neon_i32)
+        );
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r_.altivec_u16 = vec_packsu(a_.altivec_i32, b_.altivec_i32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_u16x8_narrow_i32x4(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_CONVERT_VECTOR_) && HEDLEY_HAS_BUILTIN(__builtin_shufflevector) && defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+      int32_t v SIMDE_VECTOR(32) = SIMDE_SHUFFLE_VECTOR_(32, 32, a_.i32, b_.i32, 0, 1, 2, 3, 4, 5, 6, 7);
+
+      v &= ~(v >> 31);
+      v |= HEDLEY_REINTERPRET_CAST(__typeof__(v), v > UINT16_MAX);
+
+      SIMDE_CONVERT_VECTOR_(r_.i16, v);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        int32_t v = (i < (sizeof(a_.i32) / sizeof(a_.i32[0]))) ? a_.i32[i] : b_.i32[i & 3];
+        r_.u16[i] = (v < 0) ? UINT16_C(0) : ((v > UINT16_MAX) ? UINT16_MAX : HEDLEY_STATIC_CAST(uint16_t, v));
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_packus_epi32
+  #define _mm_packus_epi32(a, b) simde_mm_packus_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_round_sd (simde__m128d a, simde__m128d b, int rounding)
+    SIMDE_REQUIRE_CONSTANT_RANGE(rounding, 0, 15) {
+  simde__m128d_private
+    r_ = simde__m128d_to_private(a),
+    b_ = simde__m128d_to_private(b);
+
+  switch (rounding & ~SIMDE_MM_FROUND_NO_EXC) {
+    #if defined(simde_math_nearbyint)
+      case SIMDE_MM_FROUND_TO_NEAREST_INT:
+      case SIMDE_MM_FROUND_CUR_DIRECTION:
+        r_.f64[0] = simde_math_nearbyint(b_.f64[0]);
+        break;
+    #endif
+
+    #if defined(simde_math_floor)
+      case SIMDE_MM_FROUND_TO_NEG_INF:
+        r_.f64[0] = simde_math_floor(b_.f64[0]);
+        break;
+    #endif
+
+    #if defined(simde_math_ceil)
+      case SIMDE_MM_FROUND_TO_POS_INF:
+        r_.f64[0] = simde_math_ceil(b_.f64[0]);
+        break;
+    #endif
+
+    #if defined(simde_math_trunc)
+      case SIMDE_MM_FROUND_TO_ZERO:
+        r_.f64[0] = simde_math_trunc(b_.f64[0]);
+        break;
+    #endif
+
+    default:
+      HEDLEY_UNREACHABLE_RETURN(simde_mm_undefined_pd());
+  }
+
+  return simde__m128d_from_private(r_);
+}
+#if defined(SIMDE_X86_SSE4_1_NATIVE)
+#  define simde_mm_round_sd(a, b, rounding) _mm_round_sd(a, b, rounding)
+#elif SIMDE_NATURAL_VECTOR_SIZE_GE(128) && defined(SIMDE_FAST_EXCEPTIONS)
+#  define simde_mm_round_sd(a, b, rounding) simde_mm_move_sd(a, simde_mm_round_pd(b, rounding))
+#elif SIMDE_NATURAL_VECTOR_SIZE_GE(128)
+  #define simde_mm_round_sd(a, b, rounding) simde_mm_move_sd(a, simde_mm_round_pd(simde_x_mm_broadcastlow_pd(b), rounding))
+#endif
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_round_sd
+  #define _mm_round_sd(a, b, rounding) simde_mm_round_sd(a, b, rounding)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_round_ss (simde__m128 a, simde__m128 b, int rounding)
+    SIMDE_REQUIRE_CONSTANT_RANGE(rounding, 0, 15) {
+  simde__m128_private
+    r_ = simde__m128_to_private(a),
+    b_ = simde__m128_to_private(b);
+
+  switch (rounding & ~SIMDE_MM_FROUND_NO_EXC) {
+    #if defined(simde_math_nearbyintf)
+      case SIMDE_MM_FROUND_TO_NEAREST_INT:
+      case SIMDE_MM_FROUND_CUR_DIRECTION:
+        r_.f32[0] = simde_math_nearbyintf(b_.f32[0]);
+        break;
+    #endif
+
+    #if defined(simde_math_floorf)
+      case SIMDE_MM_FROUND_TO_NEG_INF:
+        r_.f32[0] = simde_math_floorf(b_.f32[0]);
+        break;
+    #endif
+
+    #if defined(simde_math_ceilf)
+      case SIMDE_MM_FROUND_TO_POS_INF:
+        r_.f32[0] = simde_math_ceilf(b_.f32[0]);
+        break;
+    #endif
+
+    #if defined(simde_math_truncf)
+      case SIMDE_MM_FROUND_TO_ZERO:
+        r_.f32[0] = simde_math_truncf(b_.f32[0]);
+        break;
+    #endif
+
+    default:
+      HEDLEY_UNREACHABLE_RETURN(simde_mm_undefined_pd());
+  }
+
+  return simde__m128_from_private(r_);
+}
+#if defined(SIMDE_X86_SSE4_1_NATIVE)
+  #define simde_mm_round_ss(a, b, rounding) _mm_round_ss(a, b, rounding)
+#elif SIMDE_NATURAL_VECTOR_SIZE > 0 && defined(SIMDE_FAST_EXCEPTIONS)
+  #define simde_mm_round_ss(a, b, rounding) simde_mm_move_ss((a), simde_mm_round_ps((b), (rounding)))
+#elif SIMDE_NATURAL_VECTOR_SIZE > 0
+  #define simde_mm_round_ss(a, b, rounding) simde_mm_move_ss((a), simde_mm_round_ps(simde_x_mm_broadcastlow_ps(b), (rounding)))
+#endif
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_round_ss
+  #define _mm_round_ss(a, b, rounding) simde_mm_round_ss(a, b, rounding)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_stream_load_si128 (const simde__m128i* mem_addr) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_stream_load_si128(HEDLEY_CONST_CAST(simde__m128i*, mem_addr));
+  #elif HEDLEY_HAS_BUILTIN(__builtin_nontemporal_load) && ( \
+      defined(SIMDE_ARM_NEON_A32V7_NATIVE) || defined(SIMDE_VECTOR_SUBSCRIPT) || \
+      defined(SIMDE_WASM_SIMD128_NATIVE) || defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || \
+      defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE))
+    return __builtin_nontemporal_load(mem_addr);
+  #else
+    return simde_mm_load_si128(mem_addr);
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_stream_load_si128
+  #define _mm_stream_load_si128(mem_addr) simde_mm_stream_load_si128(mem_addr)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_test_all_ones (simde__m128i a) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_test_all_ones(a);
+  #else
+    simde__m128i_private a_ = simde__m128i_to_private(a);
+    int r;
+
+    #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r = vec_all_eq(a_.altivec_i32, vec_splats(~0));
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r = ((vgetq_lane_s64(a_.neon_i64, 0) & vgetq_lane_s64(a_.neon_i64, 1)) == ~HEDLEY_STATIC_CAST(int64_t, 0));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r = HEDLEY_STATIC_CAST(unsigned long long, wasm_i64x2_extract_lane(a_.wasm_v128, 0) & wasm_i64x2_extract_lane(a_.wasm_v128, 1)) == 0xFFFFFFFFFFFFFFFFull;
+    #else
+      int_fast32_t r_ = ~HEDLEY_STATIC_CAST(int_fast32_t, 0);
+
+      SIMDE_VECTORIZE_REDUCTION(&:r_)
+      for (size_t i = 0 ; i < (sizeof(a_.i32f) / sizeof(a_.i32f[0])) ; i++) {
+        r_ &= a_.i32f[i];
+      }
+
+      r = (r_ == ~HEDLEY_STATIC_CAST(int_fast32_t, 0));
+    #endif
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_test_all_ones
+  #define _mm_test_all_ones(a) simde_mm_test_all_ones(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_test_all_zeros (simde__m128i a, simde__m128i mask) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_test_all_zeros(a, mask);
+  #else
+    simde__m128i_private tmp_ = simde__m128i_to_private(simde_mm_and_si128(a, mask));
+    int r;
+
+    #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      r = vec_all_eq(tmp_.altivec_i32, vec_splats(0));
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r = !(vgetq_lane_s64(tmp_.neon_i64, 0) | vgetq_lane_s64(tmp_.neon_i64, 1));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r = (wasm_i64x2_extract_lane(tmp_.wasm_v128, 0) | wasm_i64x2_extract_lane(tmp_.wasm_v128, 1)) == 0;
+    #else
+      int_fast32_t r_ = HEDLEY_STATIC_CAST(int_fast32_t, 0);
+
+      SIMDE_VECTORIZE_REDUCTION(|:r_)
+      for (size_t i = 0 ; i < (sizeof(tmp_.i32f) / sizeof(tmp_.i32f[0])) ; i++) {
+        r_ |= tmp_.i32f[i];
+      }
+
+      r = !r_;
+    #endif
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_test_all_zeros
+  #define _mm_test_all_zeros(a, mask) simde_mm_test_all_zeros(a, mask)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_test_mix_ones_zeros (simde__m128i a, simde__m128i mask) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_test_mix_ones_zeros(a, mask);
+  #else
+    simde__m128i_private
+      a_ = simde__m128i_to_private(a),
+      mask_ = simde__m128i_to_private(mask);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      int64x2_t s640 = vandq_s64(a_.neon_i64, mask_.neon_i64);
+      int64x2_t s641 = vandq_s64(vreinterpretq_s64_s32(vmvnq_s32(vreinterpretq_s32_s64(a_.neon_i64))), mask_.neon_i64);
+      return (((vgetq_lane_s64(s640, 0) | vgetq_lane_s64(s640, 1)) & (vgetq_lane_s64(s641, 0) | vgetq_lane_s64(s641, 1)))!=0);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      v128_t m = wasm_v128_and(a_.wasm_v128, mask_.wasm_v128);
+      long long c0 = wasm_i64x2_extract_lane(m, 0);
+      long long c1 = wasm_i64x2_extract_lane(m, 1);
+      long long ones = c0 | c1;
+      long long zeros = ~(c0 & c1);
+      return ones && zeros;
+    #else
+      for (size_t i = 0 ; i < (sizeof(a_.u64) / sizeof(a_.u64[0])) ; i++)
+        if (((a_.u64[i] & mask_.u64[i]) != 0) && ((~a_.u64[i] & mask_.u64[i]) != 0))
+          return 1;
+
+      return 0;
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_test_mix_ones_zeros
+  #define _mm_test_mix_ones_zeros(a, mask) simde_mm_test_mix_ones_zeros(a, mask)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_testc_si128 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_testc_si128(a, b);
+  #else
+    simde__m128i_private
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      int64x2_t s64 = vbicq_s64(b_.neon_i64, a_.neon_i64);
+      return !(vgetq_lane_s64(s64, 0) | vgetq_lane_s64(s64, 1));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      v128_t m = wasm_v128_andnot(b_.wasm_v128, a_.wasm_v128);
+      return (wasm_i64x2_extract_lane(m, 0) | wasm_i64x2_extract_lane(m, 1)) == 0;
+    #else
+      int_fast32_t r = 0;
+
+      SIMDE_VECTORIZE_REDUCTION(|:r)
+      for (size_t i = 0 ; i < (sizeof(a_.i32f) / sizeof(a_.i32f[0])) ; i++) {
+        r |= ~a_.i32f[i] & b_.i32f[i];
+      }
+
+      return HEDLEY_STATIC_CAST(int, !r);
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_testc_si128
+  #define _mm_testc_si128(a, b) simde_mm_testc_si128(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_testnzc_si128 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_testnzc_si128(a, b);
+  #else
+    simde__m128i_private
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      int64x2_t s640 = vandq_s64(b_.neon_i64, a_.neon_i64);
+      int64x2_t s641 = vbicq_s64(b_.neon_i64, a_.neon_i64);
+      return !( !(vgetq_lane_s64(s641, 0) || vgetq_lane_s64(s641, 1)) \
+             || !(vgetq_lane_s64(s640, 0) || vgetq_lane_s64(s640, 1)) );
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      v128_t m1 = wasm_v128_and(a_.wasm_v128, b_.wasm_v128);
+      v128_t m2 = wasm_v128_andnot(b_.wasm_v128, a_.wasm_v128);
+      return (wasm_i64x2_extract_lane(m1, 0) | wasm_i64x2_extract_lane(m1, 1)) \
+        && (wasm_i64x2_extract_lane(m2, 0) | wasm_i64x2_extract_lane(m2, 1));
+    #else
+      for (size_t i = 0 ; i < (sizeof(a_.u64) / sizeof(a_.u64[0])) ; i++) {
+        if (((a_.u64[i] & b_.u64[i]) != 0) && ((~a_.u64[i] & b_.u64[i]) != 0))
+          return 1;
+      }
+
+      return 0;
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_testnzc_si128
+  #define _mm_testnzc_si128(a, b) simde_mm_testnzc_si128(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_testz_si128 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE4_1_NATIVE)
+    return _mm_testz_si128(a, b);
+  #else
+    simde__m128i_private
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      int64x2_t s64 = vandq_s64(a_.neon_i64, b_.neon_i64);
+      return !(vgetq_lane_s64(s64, 0) | vgetq_lane_s64(s64, 1));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      v128_t m = wasm_v128_and(a_.wasm_v128, b_.wasm_v128);
+      return (wasm_i64x2_extract_lane(m, 0) | wasm_i64x2_extract_lane(m, 1)) == 0;
+    #elif defined(SIMDE_HAVE_INT128_)
+      if ((a_.u128[0] & b_.u128[0]) == 0) {
+        return 1;
+      }
+      return 0;
+    #else
+      for (size_t i = 0 ; i < (sizeof(a_.u64) / sizeof(a_.u64[0])) ; i++) {
+        if ((a_.u64[i] & b_.u64[i]) > 0)
+          return 0;
+      }
+    #endif
+
+    return 1;
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES)
+  #undef _mm_testz_si128
+  #define _mm_testz_si128(a, b) simde_mm_testz_si128(a, b)
+#endif
+
+SIMDE_END_DECLS_
+
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_X86_SSE4_1_H) */
diff --git a/external_libs/pgenlib/simde/x86/sse4.2.h b/external_libs/pgenlib/simde/x86/sse4.2.h
new file mode 100644
index 0000000..ae9e756
--- /dev/null
+++ b/external_libs/pgenlib/simde/x86/sse4.2.h
@@ -0,0 +1,381 @@
+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2017      Evan Nemerson <evan@nemerson.com>
+ *   2020      Hidayat Khan <huk2209@gmail.com>
+ */
+
+#if !defined(SIMDE_X86_SSE4_2_H)
+#define SIMDE_X86_SSE4_2_H
+
+#include "sse4.1.h"
+
+#if defined(__ARM_ACLE) || (defined(__GNUC__) && defined(__ARM_FEATURE_CRC32))
+  #include <arm_acle.h>
+#endif
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+#if defined(SIMDE_X86_SSE4_2_NATIVE)
+  #define SIMDE_SIDD_UBYTE_OPS _SIDD_UBYTE_OPS
+  #define SIMDE_SIDD_UWORD_OPS _SIDD_UWORD_OPS
+  #define SIMDE_SIDD_SBYTE_OPS _SIDD_SBYTE_OPS
+  #define SIMDE_SIDD_SWORD_OPS _SIDD_SWORD_OPS
+  #define SIMDE_SIDD_CMP_EQUAL_ANY _SIDD_CMP_EQUAL_ANY
+  #define SIMDE_SIDD_CMP_RANGES _SIDD_CMP_RANGES
+  #define SIMDE_SIDD_CMP_EQUAL_EACH _SIDD_CMP_EQUAL_EACH
+  #define SIMDE_SIDD_CMP_EQUAL_ORDERED _SIDD_CMP_EQUAL_ORDERED
+  #define SIMDE_SIDD_POSITIVE_POLARITY _SIDD_POSITIVE_POLARITY
+  #define SIMDE_SIDD_NEGATIVE_POLARITY _SIDD_NEGATIVE_POLARITY
+  #define SIMDE_SIDD_MASKED_POSITIVE_POLARITY _SIDD_MASKED_POSITIVE_POLARITY
+  #define SIMDE_SIDD_MASKED_NEGATIVE_POLARITY _SIDD_MASKED_NEGATIVE_POLARITY
+  #define SIMDE_SIDD_LEAST_SIGNIFICANT _SIDD_LEAST_SIGNIFICANT
+  #define SIMDE_SIDD_MOST_SIGNIFICANT _SIDD_MOST_SIGNIFICANT
+  #define SIMDE_SIDD_BIT_MASK _SIDD_BIT_MASK
+  #define SIMDE_SIDD_UNIT_MASK _SIDD_UNIT_MASK
+#else
+  #define SIMDE_SIDD_UBYTE_OPS 0x00
+  #define SIMDE_SIDD_UWORD_OPS 0x01
+  #define SIMDE_SIDD_SBYTE_OPS 0x02
+  #define SIMDE_SIDD_SWORD_OPS 0x03
+  #define SIMDE_SIDD_CMP_EQUAL_ANY 0x00
+  #define SIMDE_SIDD_CMP_RANGES 0x04
+  #define SIMDE_SIDD_CMP_EQUAL_EACH 0x08
+  #define SIMDE_SIDD_CMP_EQUAL_ORDERED 0x0c
+  #define SIMDE_SIDD_POSITIVE_POLARITY 0x00
+  #define SIMDE_SIDD_NEGATIVE_POLARITY 0x10
+  #define SIMDE_SIDD_MASKED_POSITIVE_POLARITY 0x20
+  #define SIMDE_SIDD_MASKED_NEGATIVE_POLARITY 0x30
+  #define SIMDE_SIDD_LEAST_SIGNIFICANT 0x00
+  #define SIMDE_SIDD_MOST_SIGNIFICANT 0x40
+  #define SIMDE_SIDD_BIT_MASK 0x00
+  #define SIMDE_SIDD_UNIT_MASK 0x40
+#endif
+
+#if defined(SIMDE_X86_SSE4_2_ENABLE_NATIVE_ALIASES) && !defined(_SIDD_UBYTE_OPS)
+  #define _SIDD_UBYTE_OPS SIMDE_SIDD_UBYTE_OPS
+  #define _SIDD_UWORD_OPS SIMDE_SIDD_UWORD_OPS
+  #define _SIDD_SBYTE_OPS SIMDE_SIDD_SBYTE_OPS
+  #define _SIDD_SWORD_OPS SIMDE_SIDD_SWORD_OPS
+  #define _SIDD_CMP_EQUAL_ANY SIMDE_SIDD_CMP_EQUAL_ANY
+  #define _SIDD_CMP_RANGES SIMDE_SIDD_CMP_RANGES
+  #define _SIDD_CMP_EQUAL_EACH SIMDE_SIDD_CMP_EQUAL_EACH
+  #define _SIDD_CMP_EQUAL_ORDERED SIMDE_SIDD_CMP_EQUAL_ORDERED
+  #define _SIDD_POSITIVE_POLARITY SIMDE_SIDD_POSITIVE_POLARITY
+  #define _SIDD_NEGATIVE_POLARITY SIMDE_SIDD_NEGATIVE_POLARITY
+  #define _SIDD_MASKED_POSITIVE_POLARITY SIMDE_SIDD_MASKED_POSITIVE_POLARITY
+  #define _SIDD_MASKED_NEGATIVE_POLARITY SIMDE_SIDD_MASKED_NEGATIVE_POLARITY
+  #define _SIDD_LEAST_SIGNIFICANT SIMDE_SIDD_LEAST_SIGNIFICANT
+  #define _SIDD_MOST_SIGNIFICANT SIMDE_SIDD_MOST_SIGNIFICANT
+  #define _SIDD_BIT_MASK SIMDE_SIDD_BIT_MASK
+  #define _SIDD_UNIT_MASK SIMDE_SIDD_UNIT_MASK
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int simde_mm_cmpestrs (simde__m128i a, int la, simde__m128i b, int lb, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) {
+  #if !defined(HEDLEY_PGI_VERSION)
+    /* https://www.pgroup.com/userforum/viewtopic.php?f=4&p=27590&sid=cf89f8bf30be801831fe4a2ff0a2fa6c */
+    (void) a;
+    (void) b;
+  #endif
+  (void) la;
+  (void) lb;
+  return la <= ((128 / ((imm8 & SIMDE_SIDD_UWORD_OPS) ? 16 : 8)) - 1);
+}
+#if defined(SIMDE_X86_SSE4_2_NATIVE)
+  #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0)
+    #define simde_mm_cmpestrs(a, la, b, lb, imm8) \
+      _mm_cmpestrs( \
+        HEDLEY_REINTERPRET_CAST(__v16qi, a), la, \
+        HEDLEY_REINTERPRET_CAST(__v16qi, b), lb, \
+        imm8)
+  #else
+    #define simde_mm_cmpestrs(a, la, b, lb, imm8) _mm_cmpestrs(a, la, b, lb, imm8)
+  #endif
+#endif
+#if defined(SIMDE_X86_SSE4_2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cmpestrs
+  #define _mm_cmpestrs(a, la, b, lb, imm8) simde_mm_cmpestrs(a, la, b, lb, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int simde_mm_cmpestrz (simde__m128i a, int la, simde__m128i b, int lb, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) {
+  #if !defined(HEDLEY_PGI_VERSION)
+    /* https://www.pgroup.com/userforum/viewtopic.php?f=4&p=27590&sid=cf89f8bf30be801831fe4a2ff0a2fa6c */
+    (void) a;
+    (void) b;
+  #endif
+  (void) la;
+  (void) lb;
+  return lb <= ((128 / ((imm8 & SIMDE_SIDD_UWORD_OPS) ? 16 : 8)) - 1);
+}
+#if defined(SIMDE_X86_SSE4_2_NATIVE)
+  #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0)
+    #define simde_mm_cmpestrz(a, la, b, lb, imm8) \
+      _mm_cmpestrz( \
+        HEDLEY_REINTERPRET_CAST(__v16qi, a), la, \
+        HEDLEY_REINTERPRET_CAST(__v16qi, b), lb, \
+        imm8)
+  #else
+    #define simde_mm_cmpestrz(a, la, b, lb, imm8) _mm_cmpestrz(a, la, b, lb, imm8)
+  #endif
+#endif
+#if defined(SIMDE_X86_SSE4_2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cmpestrz
+  #define _mm_cmpestrz(a, la, b, lb, imm8) simde_mm_cmpestrz(a, la, b, lb, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_cmpgt_epi64 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSE4_2_NATIVE)
+    return _mm_cmpgt_epi64(a, b);
+  #elif defined(SIMDE_X86_SSE2_NATIVE)
+    /* https://stackoverflow.com/a/65175746/501126 */
+    __m128i r = _mm_and_si128(_mm_cmpeq_epi32(a, b), _mm_sub_epi64(b, a));
+    r = _mm_or_si128(r, _mm_cmpgt_epi32(a, b));
+    return _mm_shuffle_epi32(r, _MM_SHUFFLE(3, 3, 1, 1));
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_u64 = vcgtq_s64(a_.neon_i64, b_.neon_i64);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      /* https://stackoverflow.com/a/65223269/501126 */
+      r_.neon_i64 = vshrq_n_s64(vqsubq_s64(b_.neon_i64, a_.neon_i64), 63);
+    #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE)
+      r_.altivec_u64 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long), vec_cmpgt(a_.altivec_i64, b_.altivec_i64));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i64x2_gt(a_.wasm_v128, b_.wasm_v128);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), a_.i64 > b_.i64);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = (a_.i64[i] > b_.i64[i]) ? ~INT64_C(0) : INT64_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cmpgt_epi64
+  #define _mm_cmpgt_epi64(a, b) simde_mm_cmpgt_epi64(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_cmpistrs_8_(simde__m128i a) {
+  simde__m128i_private a_= simde__m128i_to_private(a);
+  const int upper_bound = (128 / 8) - 1;
+  int a_invalid = 0;
+  SIMDE_VECTORIZE
+  for (int i = 0 ; i <= upper_bound ; i++) {
+    if(!a_.i8[i])
+      a_invalid = 1;
+  }
+  return a_invalid;
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_cmpistrs_16_(simde__m128i a) {
+  simde__m128i_private a_= simde__m128i_to_private(a);
+  const int upper_bound = (128 / 16) - 1;
+  int a_invalid = 0;
+  SIMDE_VECTORIZE
+  for (int i = 0 ; i <= upper_bound ; i++) {
+    if(!a_.i16[i])
+      a_invalid = 1;
+  }
+  return a_invalid;
+}
+
+#if defined(SIMDE_X86_SSE4_2_NATIVE)
+  #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0)
+    #define simde_mm_cmpistrs(a, b, imm8) \
+      _mm_cmpistrs( \
+        HEDLEY_REINTERPRET_CAST(__v16qi, a), \
+        HEDLEY_REINTERPRET_CAST(__v16qi, b), \
+        imm8)
+  #else
+    #define simde_mm_cmpistrs(a, b, imm8) _mm_cmpistrs(a, b, imm8)
+  #endif
+#else
+  #define simde_mm_cmpistrs(a, b, imm8) \
+     (((imm8) & SIMDE_SIDD_UWORD_OPS) \
+       ? simde_mm_cmpistrs_16_((a)) \
+       : simde_mm_cmpistrs_8_((a)))
+#endif
+#if defined(SIMDE_X86_SSE4_2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cmpistrs
+  #define _mm_cmpistrs(a, b, imm8) simde_mm_cmpistrs(a, b, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_cmpistrz_8_(simde__m128i b) {
+  simde__m128i_private b_= simde__m128i_to_private(b);
+  const int upper_bound = (128 / 8) - 1;
+  int b_invalid = 0;
+  SIMDE_VECTORIZE
+  for (int i = 0 ; i <= upper_bound ; i++) {
+    if(!b_.i8[i])
+      b_invalid = 1;
+  }
+  return b_invalid;
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+int
+simde_mm_cmpistrz_16_(simde__m128i b) {
+  simde__m128i_private b_= simde__m128i_to_private(b);
+  const int upper_bound = (128 / 16) - 1;
+  int b_invalid = 0;
+  SIMDE_VECTORIZE
+  for (int i = 0 ; i <= upper_bound ; i++) {
+    if(!b_.i16[i])
+      b_invalid = 1;
+  }
+  return b_invalid;
+}
+
+#if defined(SIMDE_X86_SSE4_2_NATIVE)
+  #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0)
+    #define simde_mm_cmpistrz(a, b, imm8) \
+      _mm_cmpistrz( \
+        HEDLEY_REINTERPRET_CAST(__v16qi, a), \
+        HEDLEY_REINTERPRET_CAST(__v16qi, b), \
+        imm8)
+  #else
+    #define simde_mm_cmpistrz(a, b, imm8) _mm_cmpistrz(a, b, imm8)
+  #endif
+#else
+  #define simde_mm_cmpistrz(a, b, imm8) \
+     (((imm8) & SIMDE_SIDD_UWORD_OPS) \
+       ? simde_mm_cmpistrz_16_((b)) \
+       : simde_mm_cmpistrz_8_((b)))
+#endif
+#if defined(SIMDE_X86_SSE4_2_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cmpistrz
+  #define _mm_cmpistrz(a, b, imm8) simde_mm_cmpistrz(a, b, imm8)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+uint32_t
+simde_mm_crc32_u8(uint32_t prevcrc, uint8_t v) {
+  #if defined(SIMDE_X86_SSE4_2_NATIVE)
+    return _mm_crc32_u8(prevcrc, v);
+  #else
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(__ARM_FEATURE_CRC32)
+      return __crc32cb(prevcrc, v);
+    #else
+      uint32_t crc = prevcrc;
+      crc ^= v;
+      for(int bit = 0 ; bit < 8 ; bit++) {
+        if (crc & 1)
+          crc = (crc >> 1) ^ UINT32_C(0x82f63b78);
+        else
+          crc = (crc >> 1);
+      }
+      return crc;
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_2_ENABLE_NATIVE_ALIASES)
+  #define _mm_crc32_u8(prevcrc, v) simde_mm_crc32_u8(prevcrc, v)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+uint32_t
+simde_mm_crc32_u16(uint32_t prevcrc, uint16_t v) {
+  #if defined(SIMDE_X86_SSE4_2_NATIVE)
+    return _mm_crc32_u16(prevcrc, v);
+  #else
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(__ARM_FEATURE_CRC32)
+      return __crc32ch(prevcrc, v);
+    #else
+      uint32_t crc = prevcrc;
+      crc = simde_mm_crc32_u8(crc, v & 0xff);
+      crc = simde_mm_crc32_u8(crc, (v >> 8) & 0xff);
+      return crc;
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_2_ENABLE_NATIVE_ALIASES)
+  #define _mm_crc32_u16(prevcrc, v) simde_mm_crc32_u16(prevcrc, v)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+uint32_t
+simde_mm_crc32_u32(uint32_t prevcrc, uint32_t v) {
+  #if defined(SIMDE_X86_SSE4_2_NATIVE)
+    return _mm_crc32_u32(prevcrc, v);
+  #else
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(__ARM_FEATURE_CRC32)
+      return __crc32cw(prevcrc, v);
+    #else
+      uint32_t crc = prevcrc;
+      crc = simde_mm_crc32_u16(crc, v & 0xffff);
+      crc = simde_mm_crc32_u16(crc, (v >> 16) & 0xffff);
+      return crc;
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_2_ENABLE_NATIVE_ALIASES)
+  #define _mm_crc32_u32(prevcrc, v) simde_mm_crc32_u32(prevcrc, v)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+uint64_t
+simde_mm_crc32_u64(uint64_t prevcrc, uint64_t v) {
+  #if defined(SIMDE_X86_SSE4_2_NATIVE) && defined(SIMDE_ARCH_AMD64)
+    return _mm_crc32_u64(prevcrc, v);
+  #else
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(__ARM_FEATURE_CRC32)
+      return __crc32cd(HEDLEY_STATIC_CAST(uint32_t, prevcrc), v);
+    #else
+      uint64_t crc = prevcrc;
+      crc = simde_mm_crc32_u32(HEDLEY_STATIC_CAST(uint32_t, crc), v & 0xffffffff);
+      crc = simde_mm_crc32_u32(HEDLEY_STATIC_CAST(uint32_t, crc), (v >> 32) & 0xffffffff);
+      return crc;
+    #endif
+  #endif
+}
+#if defined(SIMDE_X86_SSE4_2_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARCH_AMD64))
+  #define _mm_crc32_u64(prevcrc, v) simde_mm_crc32_u64(prevcrc, v)
+#endif
+
+SIMDE_END_DECLS_
+
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_X86_SSE4_2_H) */
diff --git a/external_libs/pgenlib/simde/x86/ssse3.h b/external_libs/pgenlib/simde/x86/ssse3.h
new file mode 100644
index 0000000..6c4c12d
--- /dev/null
+++ b/external_libs/pgenlib/simde/x86/ssse3.h
@@ -0,0 +1,1057 @@
+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2017-2020 Evan Nemerson <evan@nemerson.com>
+ */
+
+#if !defined(SIMDE_X86_SSSE3_H)
+#define SIMDE_X86_SSSE3_H
+
+#include "sse3.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_abs_epi8 (simde__m128i a) {
+  #if defined(SIMDE_X86_SSSE3_NATIVE)
+    return _mm_abs_epi8(a);
+  #elif defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_min_epu8(a, _mm_sub_epi8(_mm_setzero_si128(), a));
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i8 = vabsq_s8(a_.neon_i8);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_i8 = vec_abs(a_.altivec_i8);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i8x16_abs(a_.wasm_v128);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.u8[i] = HEDLEY_STATIC_CAST(uint8_t, (a_.i8[i] < 0) ? (- a_.i8[i]) : a_.i8[i]);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_abs_epi8(a) simde_mm_abs_epi8(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_abs_epi16 (simde__m128i a) {
+  #if defined(SIMDE_X86_SSSE3_NATIVE)
+    return _mm_abs_epi16(a);
+  #elif defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_max_epi16(a, _mm_sub_epi16(_mm_setzero_si128(), a));
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i16 = vabsq_s16(a_.neon_i16);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_i16 = vec_abs(a_.altivec_i16);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i16x8_abs(a_.wasm_v128);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.u16[i] = HEDLEY_STATIC_CAST(uint16_t, (a_.i16[i] < 0) ? (- a_.i16[i]) : a_.i16[i]);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_abs_epi16(a) simde_mm_abs_epi16(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_abs_epi32 (simde__m128i a) {
+  #if defined(SIMDE_X86_SSSE3_NATIVE)
+    return _mm_abs_epi32(a);
+  #elif defined(SIMDE_X86_SSE2_NATIVE)
+    const __m128i m = _mm_cmpgt_epi32(_mm_setzero_si128(), a);
+    return _mm_sub_epi32(_mm_xor_si128(a, m), m);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vabsq_s32(a_.neon_i32);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
+      r_.altivec_i32 = vec_abs(a_.altivec_i32);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i32x4_abs(a_.wasm_v128);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        #if defined(_MSC_VER)
+          HEDLEY_DIAGNOSTIC_PUSH
+          #pragma warning(disable:4146)
+        #endif
+        r_.u32[i] = (a_.i32[i] < 0) ? (- HEDLEY_STATIC_CAST(uint32_t, a_.i32[i])) : HEDLEY_STATIC_CAST(uint32_t, a_.i32[i]);
+        #if defined(_MSC_VER)
+          HEDLEY_DIAGNOSTIC_POP
+        #endif
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_abs_epi32(a) simde_mm_abs_epi32(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_abs_pi8 (simde__m64 a) {
+  #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_abs_pi8(a);
+  #else
+    simde__m64_private
+      r_,
+      a_ = simde__m64_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i8 = vabs_s8(a_.neon_i8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.u8[i] = HEDLEY_STATIC_CAST(uint8_t, (a_.i8[i] < 0) ? (- a_.i8[i]) : a_.i8[i]);
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_abs_pi8(a) simde_mm_abs_pi8(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_abs_pi16 (simde__m64 a) {
+  #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_abs_pi16(a);
+  #else
+    simde__m64_private
+      r_,
+      a_ = simde__m64_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i16 = vabs_s16(a_.neon_i16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.u16[i] = HEDLEY_STATIC_CAST(uint16_t, (a_.i16[i] < 0) ? (- a_.i16[i]) : a_.i16[i]);
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_abs_pi16(a) simde_mm_abs_pi16(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_abs_pi32 (simde__m64 a) {
+  #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_abs_pi32(a);
+  #else
+    simde__m64_private
+      r_,
+      a_ = simde__m64_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vabs_s32(a_.neon_i32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.u32[i] = HEDLEY_STATIC_CAST(uint32_t, (a_.i32[i] < 0) ? (- a_.i32[i]) : a_.i32[i]);
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_abs_pi32(a) simde_mm_abs_pi32(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_alignr_epi8 (simde__m128i a, simde__m128i b, int count)
+    SIMDE_REQUIRE_CONSTANT_RANGE(count, 0, 255) {
+  simde__m128i_private
+    r_,
+    a_ = simde__m128i_to_private(a),
+    b_ = simde__m128i_to_private(b);
+
+  if (HEDLEY_UNLIKELY(count > 31))
+    return simde_mm_setzero_si128();
+
+  for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+    const int srcpos = count + HEDLEY_STATIC_CAST(int, i);
+    if (srcpos > 31) {
+      r_.i8[i] = 0;
+    } else if (srcpos > 15) {
+      r_.i8[i] = a_.i8[(srcpos) & 15];
+    } else {
+      r_.i8[i] = b_.i8[srcpos];
+    }
+  }
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_SSSE3_NATIVE)
+  #define simde_mm_alignr_epi8(a, b, count) _mm_alignr_epi8(a, b, count)
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_mm_alignr_epi8(a, b, count) \
+    ( \
+      ((count) > 31) \
+        ? simde__m128i_from_neon_i8(vdupq_n_s8(0)) \
+        : ( \
+          ((count) > 15) \
+            ? (simde__m128i_from_neon_i8(vextq_s8(simde__m128i_to_neon_i8(a), vdupq_n_s8(0), (count) & 15))) \
+            : (simde__m128i_from_neon_i8(vextq_s8(simde__m128i_to_neon_i8(b), simde__m128i_to_neon_i8(a), ((count) & 15))))))
+#endif
+#if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES)
+  #define _mm_alignr_epi8(a, b, count) simde_mm_alignr_epi8(a, b, count)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_alignr_pi8 (simde__m64 a, simde__m64 b, const int count)
+    SIMDE_REQUIRE_CONSTANT(count) {
+  simde__m64_private
+    r_,
+    a_ = simde__m64_to_private(a),
+    b_ = simde__m64_to_private(b);
+
+  if (HEDLEY_UNLIKELY(count > 15))
+    return simde_mm_setzero_si64();
+
+  for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+    const int srcpos = count + HEDLEY_STATIC_CAST(int, i);
+    if (srcpos > 15) {
+      r_.i8[i] = 0;
+    } else if (srcpos > 7) {
+      r_.i8[i] = a_.i8[(srcpos) & 7];
+    } else {
+      r_.i8[i] = b_.i8[srcpos];
+    }
+  }
+
+  return simde__m64_from_private(r_);
+}
+#if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+#  define simde_mm_alignr_pi8(a, b, count) _mm_alignr_pi8(a, b, count)
+#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_mm_alignr_pi8(a, b, count) \
+    ( \
+      ((count) > 15) \
+        ? simde__m64_from_neon_i8(vdup_n_s8(0)) \
+        : ( \
+          ((count) > 7) \
+            ? (simde__m64_from_neon_i8(vext_s8(simde__m64_to_neon_i8(a), vdup_n_s8(0), (count) & 7))) \
+            : (simde__m64_from_neon_i8(vext_s8(simde__m64_to_neon_i8(b), simde__m64_to_neon_i8(a), ((count) & 7))))))
+#endif
+#if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_alignr_pi8(a, b, count) simde_mm_alignr_pi8(a, b, count)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_shuffle_epi8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSSE3_NATIVE)
+    return _mm_shuffle_epi8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_i8 = vqtbl1q_s8(a_.neon_i8, vandq_u8(b_.neon_u8, vdupq_n_u8(0x8F)));
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      /* Mask out the bits we're not interested in.  vtbl will result in 0
+       * for any values outside of [0, 15], so if the high bit is set it
+       * will return 0, just like in SSSE3. */
+      b_.neon_i8 = vandq_s8(b_.neon_i8, vdupq_n_s8(HEDLEY_STATIC_CAST(int8_t, (1 << 7) | 15)));
+
+      /* Convert a from an int8x16_t to an int8x8x2_t */
+      int8x8x2_t i;
+      i.val[0] = vget_low_s8(a_.neon_i8);
+      i.val[1] = vget_high_s8(a_.neon_i8);
+
+      /* Table lookups */
+      int8x8_t l = vtbl2_s8(i, vget_low_s8(b_.neon_i8));
+      int8x8_t h = vtbl2_s8(i, vget_high_s8(b_.neon_i8));
+
+      r_.neon_i8 = vcombine_s8(l, h);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      /* This is a bit ugly because of the casts and the awful type
+       * macros (SIMDE_POWER_ALTIVEC_VECTOR), but it's really just
+       * vec_sel(vec_perm(a, a, b), 0, vec_cmplt(b, 0)) */
+      SIMDE_POWER_ALTIVEC_VECTOR(signed char) z = { 0, };
+      SIMDE_POWER_ALTIVEC_VECTOR(signed char) msb_mask = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed char), vec_cmplt(b_.altivec_i8, z));
+      SIMDE_POWER_ALTIVEC_VECTOR(signed char) c = vec_perm(a_.altivec_i8, a_.altivec_i8, HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned char), b_.altivec_i8));
+      r_.altivec_i8 = vec_sel(c, z, HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned char), msb_mask));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i8x16_swizzle(
+        a_.wasm_v128, wasm_v128_and(b_.wasm_v128, wasm_i8x16_splat(0x8F)));
+    #else
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = a_.i8[b_.i8[i] & 15] & (~(b_.i8[i]) >> 7);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+#endif
+}
+#if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_shuffle_epi8(a, b) simde_mm_shuffle_epi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_shuffle_pi8 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_shuffle_pi8(a, b);
+  #else
+    simde__m64_private
+      r_,
+      a_ = simde__m64_to_private(a),
+      b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      b_.neon_i8 = vand_s8(b_.neon_i8, vdup_n_s8(HEDLEY_STATIC_CAST(int8_t, (1 << 7) | 7)));
+      r_.neon_i8 = vtbl1_s8(a_.neon_i8, b_.neon_i8);
+    #else
+      for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+        r_.i8[i] = a_.i8[b_.i8[i] & 7] & (~(b_.i8[i]) >> 7);
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_shuffle_pi8(a, b) simde_mm_shuffle_pi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_hadd_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSSE3_NATIVE)
+    return _mm_hadd_epi16(a, b);
+  #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return simde__m128i_from_neon_i16(vpaddq_s16(simde__m128i_to_neon_i16(a), simde__m128i_to_neon_i16(b)));
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    int16x8x2_t t = vuzpq_s16(simde__m128i_to_neon_i16(a), simde__m128i_to_neon_i16(b));
+    return simde__m128i_from_neon_i16(vaddq_s16(t.val[0], t.val[1]));
+  #else
+    return simde_mm_add_epi16(simde_x_mm_deinterleaveeven_epi16(a, b), simde_x_mm_deinterleaveodd_epi16(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_hadd_epi16(a, b) simde_mm_hadd_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_hadd_epi32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSSE3_NATIVE)
+    return _mm_hadd_epi32(a, b);
+  #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return simde__m128i_from_neon_i32(vpaddq_s32(simde__m128i_to_neon_i32(a), simde__m128i_to_neon_i32(b)));
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    int32x4x2_t t = vuzpq_s32(simde__m128i_to_neon_i32(a), simde__m128i_to_neon_i32(b));
+    return simde__m128i_from_neon_i32(vaddq_s32(t.val[0], t.val[1]));
+  #else
+    return simde_mm_add_epi32(simde_x_mm_deinterleaveeven_epi32(a, b), simde_x_mm_deinterleaveodd_epi32(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_hadd_epi32(a, b) simde_mm_hadd_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_hadd_pi16 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_hadd_pi16(a, b);
+  #else
+    simde__m64_private
+      r_,
+      a_ = simde__m64_to_private(a),
+      b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_i16 = vpadd_s16(a_.neon_i16, b_.neon_i16);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      int16x4x2_t t = vuzp_s16(a_.neon_i16, b_.neon_i16);
+      r_.neon_i16 = vadd_s16(t.val[0], t.val[1]);
+    #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.i16 =
+        SIMDE_SHUFFLE_VECTOR_(16, 8, a_.i16, b_.i16, 0, 2, 4, 6) +
+        SIMDE_SHUFFLE_VECTOR_(16, 8, a_.i16, b_.i16, 1, 3, 5, 7);
+    #else
+      r_.i16[0] = a_.i16[0] + a_.i16[1];
+      r_.i16[1] = a_.i16[2] + a_.i16[3];
+      r_.i16[2] = b_.i16[0] + b_.i16[1];
+      r_.i16[3] = b_.i16[2] + b_.i16[3];
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_hadd_pi16(a, b) simde_mm_hadd_pi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_hadd_pi32 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_hadd_pi32(a, b);
+  #else
+    simde__m64_private
+      r_,
+      a_ = simde__m64_to_private(a),
+      b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_i32 = vpadd_s32(a_.neon_i32, b_.neon_i32);
+    #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      int32x2x2_t t = vuzp_s32(a_.neon_i32, b_.neon_i32);
+      r_.neon_i32 = vadd_s32(t.val[0], t.val[1]);
+    #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.i32 =
+        SIMDE_SHUFFLE_VECTOR_(32, 8, a_.i32, b_.i32, 0, 2) +
+        SIMDE_SHUFFLE_VECTOR_(32, 8, a_.i32, b_.i32, 1, 3);
+    #else
+      r_.i32[0] = a_.i32[0] + a_.i32[1];
+      r_.i32[1] = b_.i32[0] + b_.i32[1];
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_hadd_pi32(a, b) simde_mm_hadd_pi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_hadds_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSSE3_NATIVE)
+    return _mm_hadds_epi16(a, b);
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    int16x8x2_t t = vuzpq_s16(simde__m128i_to_neon_i16(a), simde__m128i_to_neon_i16(b));
+    return simde__m128i_from_neon_i16(vqaddq_s16(t.val[0], t.val[1]));
+  #else
+    return simde_mm_adds_epi16(simde_x_mm_deinterleaveeven_epi16(a, b), simde_x_mm_deinterleaveodd_epi16(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_hadds_epi16(a, b) simde_mm_hadds_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_hadds_pi16 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_hadds_pi16(a, b);
+  #else
+    simde__m64_private
+      r_,
+      a_ = simde__m64_to_private(a),
+      b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      int16x4x2_t t = vuzp_s16(a_.neon_i16, b_.neon_i16);
+      r_.neon_i16 = vqadd_s16(t.val[0], t.val[1]);
+    #else
+      for (size_t i = 0 ; i < ((sizeof(r_.i16) / sizeof(r_.i16[0])) / 2) ; i++) {
+        int32_t ta = HEDLEY_STATIC_CAST(int32_t, a_.i16[i * 2]) + HEDLEY_STATIC_CAST(int32_t, a_.i16[(i * 2) + 1]);
+        r_.i16[  i  ] = HEDLEY_LIKELY(ta > INT16_MIN) ? (HEDLEY_LIKELY(ta < INT16_MAX) ? HEDLEY_STATIC_CAST(int16_t, ta) : INT16_MAX) : INT16_MIN;
+        int32_t tb = HEDLEY_STATIC_CAST(int32_t, b_.i16[i * 2]) + HEDLEY_STATIC_CAST(int32_t, b_.i16[(i * 2) + 1]);
+        r_.i16[i + 2] = HEDLEY_LIKELY(tb > INT16_MIN) ? (HEDLEY_LIKELY(tb < INT16_MAX) ? HEDLEY_STATIC_CAST(int16_t, tb) : INT16_MAX) : INT16_MIN;
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_hadds_pi16(a, b) simde_mm_hadds_pi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_hsub_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSSE3_NATIVE)
+    return _mm_hsub_epi16(a, b);
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    int16x8x2_t t = vuzpq_s16(simde__m128i_to_neon_i16(a), simde__m128i_to_neon_i16(b));
+    return simde__m128i_from_neon_i16(vsubq_s16(t.val[0], t.val[1]));
+  #else
+    return simde_mm_sub_epi16(simde_x_mm_deinterleaveeven_epi16(a, b), simde_x_mm_deinterleaveodd_epi16(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_hsub_epi16(a, b) simde_mm_hsub_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_hsub_epi32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSSE3_NATIVE)
+    return _mm_hsub_epi32(a, b);
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    int32x4x2_t t = vuzpq_s32(simde__m128i_to_neon_i32(a), simde__m128i_to_neon_i32(b));
+    return simde__m128i_from_neon_i32(vsubq_s32(t.val[0], t.val[1]));
+  #else
+    return simde_mm_sub_epi32(simde_x_mm_deinterleaveeven_epi32(a, b), simde_x_mm_deinterleaveodd_epi32(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_hsub_epi32(a, b) simde_mm_hsub_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_hsub_pi16 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_hsub_pi16(a, b);
+  #else
+    simde__m64_private
+      r_,
+      a_ = simde__m64_to_private(a),
+      b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      int16x4x2_t t = vuzp_s16(a_.neon_i16, b_.neon_i16);
+      r_.neon_i16 = vsub_s16(t.val[0], t.val[1]);
+    #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.i16 =
+        SIMDE_SHUFFLE_VECTOR_(16, 8, a_.i16, b_.i16, 0, 2, 4, 6) -
+        SIMDE_SHUFFLE_VECTOR_(16, 8, a_.i16, b_.i16, 1, 3, 5, 7);
+    #else
+      r_.i16[0] = a_.i16[0] - a_.i16[1];
+      r_.i16[1] = a_.i16[2] - a_.i16[3];
+      r_.i16[2] = b_.i16[0] - b_.i16[1];
+      r_.i16[3] = b_.i16[2] - b_.i16[3];
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_hsub_pi16(a, b) simde_mm_hsub_pi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_hsub_pi32 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_hsub_pi32(a, b);
+  #else
+    simde__m64_private
+      r_,
+      a_ = simde__m64_to_private(a),
+      b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      int32x2x2_t t = vuzp_s32(a_.neon_i32, b_.neon_i32);
+      r_.neon_i32 = vsub_s32(t.val[0], t.val[1]);
+    #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_SHUFFLE_VECTOR_)
+      r_.i32 =
+        SIMDE_SHUFFLE_VECTOR_(32, 8, a_.i32, b_.i32, 0, 2) -
+        SIMDE_SHUFFLE_VECTOR_(32, 8, a_.i32, b_.i32, 1, 3);
+    #else
+      r_.i32[0] = a_.i32[0] - a_.i32[1];
+      r_.i32[1] = b_.i32[0] - b_.i32[1];
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_hsub_pi32(a, b) simde_mm_hsub_pi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_hsubs_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSSE3_NATIVE)
+    return _mm_hsubs_epi16(a, b);
+  #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    int16x8x2_t t = vuzpq_s16(simde__m128i_to_neon_i16(a), simde__m128i_to_neon_i16(b));
+    return simde__m128i_from_neon_i16(vqsubq_s16(t.val[0], t.val[1]));
+  #else
+    return simde_mm_subs_epi16(simde_x_mm_deinterleaveeven_epi16(a, b), simde_x_mm_deinterleaveodd_epi16(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_hsubs_epi16(a, b) simde_mm_hsubs_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_hsubs_pi16 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_hsubs_pi16(a, b);
+  #else
+    simde__m64_private
+      r_,
+      a_ = simde__m64_to_private(a),
+      b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      int16x4x2_t t = vuzp_s16(a_.neon_i16, b_.neon_i16);
+      r_.neon_i16 = vqsub_s16(t.val[0], t.val[1]);
+    #else
+      for (size_t i = 0 ; i < ((sizeof(r_.i16) / sizeof(r_.i16[0])) / 2) ; i++) {
+        r_.i16[  i  ] = simde_math_subs_i16(a_.i16[i * 2], a_.i16[(i * 2) + 1]);
+        r_.i16[i + 2] = simde_math_subs_i16(b_.i16[i * 2], b_.i16[(i * 2) + 1]);
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_hsubs_pi16(a, b) simde_mm_hsubs_pi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_maddubs_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSSE3_NATIVE)
+    return _mm_maddubs_epi16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      /* Zero extend a */
+      int16x8_t a_odd = vreinterpretq_s16_u16(vshrq_n_u16(a_.neon_u16, 8));
+      int16x8_t a_even = vreinterpretq_s16_u16(vbicq_u16(a_.neon_u16, vdupq_n_u16(0xff00)));
+
+      /* Sign extend by shifting left then shifting right. */
+      int16x8_t b_even = vshrq_n_s16(vshlq_n_s16(b_.neon_i16, 8), 8);
+      int16x8_t b_odd = vshrq_n_s16(b_.neon_i16, 8);
+
+      /* multiply */
+      int16x8_t prod1 = vmulq_s16(a_even, b_even);
+      int16x8_t prod2 = vmulq_s16(a_odd, b_odd);
+
+      /* saturated add */
+      r_.neon_i16 = vqaddq_s16(prod1, prod2);
+    #else
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        const int idx = HEDLEY_STATIC_CAST(int, i) << 1;
+        int32_t ts =
+          (HEDLEY_STATIC_CAST(int16_t, a_.u8[  idx  ]) * HEDLEY_STATIC_CAST(int16_t, b_.i8[  idx  ])) +
+          (HEDLEY_STATIC_CAST(int16_t, a_.u8[idx + 1]) * HEDLEY_STATIC_CAST(int16_t, b_.i8[idx + 1]));
+        r_.i16[i] = (ts > INT16_MIN) ? ((ts < INT16_MAX) ? HEDLEY_STATIC_CAST(int16_t, ts) : INT16_MAX) : INT16_MIN;
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_maddubs_epi16(a, b) simde_mm_maddubs_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_maddubs_pi16 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_maddubs_pi16(a, b);
+  #else
+    simde__m64_private
+      r_,
+      a_ = simde__m64_to_private(a),
+      b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      int16x8_t ai = vreinterpretq_s16_u16(vmovl_u8(a_.neon_u8));
+      int16x8_t bi = vmovl_s8(b_.neon_i8);
+      int16x8_t p = vmulq_s16(ai, bi);
+      int16x4_t l = vget_low_s16(p);
+      int16x4_t h = vget_high_s16(p);
+      r_.neon_i16 = vqadd_s16(vuzp1_s16(l, h), vuzp2_s16(l, h));
+    #else
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        const int idx = HEDLEY_STATIC_CAST(int, i) << 1;
+        int32_t ts =
+          (HEDLEY_STATIC_CAST(int16_t, a_.u8[  idx  ]) * HEDLEY_STATIC_CAST(int16_t, b_.i8[  idx  ])) +
+          (HEDLEY_STATIC_CAST(int16_t, a_.u8[idx + 1]) * HEDLEY_STATIC_CAST(int16_t, b_.i8[idx + 1]));
+        r_.i16[i] = (ts > INT16_MIN) ? ((ts < INT16_MAX) ? HEDLEY_STATIC_CAST(int16_t, ts) : INT16_MAX) : INT16_MIN;
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_maddubs_pi16(a, b) simde_mm_maddubs_pi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_mulhrs_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSSE3_NATIVE)
+    return _mm_mulhrs_epi16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      /* Multiply */
+      int32x4_t mul_lo = vmull_s16(vget_low_s16(a_.neon_i16),
+                                  vget_low_s16(b_.neon_i16));
+      int32x4_t mul_hi = vmull_s16(vget_high_s16(a_.neon_i16),
+                                  vget_high_s16(b_.neon_i16));
+
+      /* Rounding narrowing shift right
+       * narrow = (int16_t)((mul + 16384) >> 15); */
+      int16x4_t narrow_lo = vrshrn_n_s32(mul_lo, 15);
+      int16x4_t narrow_hi = vrshrn_n_s32(mul_hi, 15);
+
+      /* Join together */
+      r_.neon_i16 = vcombine_s16(narrow_lo, narrow_hi);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+        v128_t __lo = wasm_i32x4_mul(wasm_i32x4_extend_low_i16x8(a_.wasm_v128), wasm_i32x4_extend_low_i16x8(b_.wasm_v128));
+        v128_t __hi = wasm_i32x4_mul(wasm_i32x4_extend_high_i16x8(a_.wasm_v128), wasm_i32x4_extend_high_i16x8(b_.wasm_v128));
+        const v128_t __inc = wasm_i32x4_splat(0x4000);
+        __lo = wasm_i32x4_add(__lo, __inc);
+        __hi = wasm_i32x4_add(__hi, __inc);
+        __lo = wasm_i32x4_add(__lo, __lo);
+        __hi = wasm_i32x4_add(__hi, __hi);
+        r_.wasm_v128 = wasm_i16x8_shuffle(__lo, __hi, 1, 3, 5, 7, 9, 11, 13, 15);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = HEDLEY_STATIC_CAST(int16_t, (((HEDLEY_STATIC_CAST(int32_t, a_.i16[i]) * HEDLEY_STATIC_CAST(int32_t, b_.i16[i])) + 0x4000) >> 15));
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_mulhrs_epi16(a, b) simde_mm_mulhrs_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_mulhrs_pi16 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_mulhrs_pi16(a, b);
+  #else
+    simde__m64_private
+      r_,
+      a_ = simde__m64_to_private(a),
+      b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      /* Multiply */
+      int32x4_t mul = vmull_s16(a_.neon_i16, b_.neon_i16);
+
+      /* Rounding narrowing shift right
+       * narrow = (int16_t)((mul + 16384) >> 15); */
+      int16x4_t narrow = vrshrn_n_s32(mul, 15);
+
+      /* Join together */
+      r_.neon_i16 = narrow;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = HEDLEY_STATIC_CAST(int16_t, (((HEDLEY_STATIC_CAST(int32_t, a_.i16[i]) * HEDLEY_STATIC_CAST(int32_t, b_.i16[i])) + 0x4000) >> 15));
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_mulhrs_pi16(a, b) simde_mm_mulhrs_pi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_sign_epi8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSSE3_NATIVE)
+    return _mm_sign_epi8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      uint8x16_t aneg_mask = vreinterpretq_u8_s8(vshrq_n_s8(b_.neon_i8, 7));
+      uint8x16_t bnz_mask;
+      #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+        bnz_mask = vceqzq_s8(b_.neon_i8);
+      #else
+        bnz_mask = vceqq_s8(b_.neon_i8, vdupq_n_s8(0));
+      #endif
+      bnz_mask = vmvnq_u8(bnz_mask);
+
+      r_.neon_i8 = vbslq_s8(aneg_mask, vnegq_s8(a_.neon_i8), vandq_s8(a_.neon_i8, vreinterpretq_s8_u8(bnz_mask)));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      simde__m128i mask = wasm_i8x16_shr(b_.wasm_v128, 7);
+      simde__m128i zeromask = simde_mm_cmpeq_epi8(b_.wasm_v128, simde_mm_setzero_si128());
+      r_.wasm_v128 = simde_mm_andnot_si128(zeromask, simde_mm_xor_si128(simde_mm_add_epi8(a_.wasm_v128, mask), mask));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = (b_.i8[i] < 0) ? (- a_.i8[i]) : ((b_.i8[i] != 0) ? (a_.i8[i]) : INT8_C(0));
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_sign_epi8(a, b) simde_mm_sign_epi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_sign_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSSE3_NATIVE)
+    return _mm_sign_epi16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      uint16x8_t aneg_mask = vreinterpretq_u16_s16(vshrq_n_s16(b_.neon_i16, 15));
+      uint16x8_t bnz_mask;
+      #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+        bnz_mask = vceqzq_s16(b_.neon_i16);
+      #else
+        bnz_mask = vceqq_s16(b_.neon_i16, vdupq_n_s16(0));
+      #endif
+      bnz_mask = vmvnq_u16(bnz_mask);
+
+      r_.neon_i16 = vbslq_s16(aneg_mask, vnegq_s16(a_.neon_i16), vandq_s16(a_.neon_i16, vreinterpretq_s16_u16(bnz_mask)));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      simde__m128i mask = simde_mm_srai_epi16(b_.wasm_v128, 15);
+      simde__m128i zeromask = simde_mm_cmpeq_epi16(b_.wasm_v128, simde_mm_setzero_si128());
+      r_.wasm_v128 = simde_mm_andnot_si128(zeromask, simde_mm_xor_si128(simde_mm_add_epi16(a_.wasm_v128, mask), mask));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = (b_.i16[i] < 0) ? (- a_.i16[i]) : ((b_.i16[i] != 0) ? (a_.i16[i]) : INT16_C(0));
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_sign_epi16(a, b) simde_mm_sign_epi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_sign_epi32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SSSE3_NATIVE)
+    return _mm_sign_epi32(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      uint32x4_t aneg_mask = vreinterpretq_u32_s32(vshrq_n_s32(b_.neon_i32, 31));
+      uint32x4_t bnz_mask;
+      #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+        bnz_mask = vceqzq_s32(b_.neon_i32);
+      #else
+        bnz_mask = vceqq_s32(b_.neon_i32, vdupq_n_s32(0));
+      #endif
+      bnz_mask = vmvnq_u32(bnz_mask);
+
+      r_.neon_i32 = vbslq_s32(aneg_mask, vnegq_s32(a_.neon_i32), vandq_s32(a_.neon_i32, vreinterpretq_s32_u32(bnz_mask)));
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      simde__m128i mask = simde_mm_srai_epi32(b_.wasm_v128, 31);
+      simde__m128i zeromask = simde_mm_cmpeq_epi32(b_.wasm_v128, simde_mm_setzero_si128());
+      r_.wasm_v128 = simde_mm_andnot_si128(zeromask, simde_mm_xor_si128(simde_mm_add_epi32(a_.wasm_v128, mask), mask));
+    #else
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = (b_.i32[i] < 0) ? (- a_.i32[i]) : ((b_.i32[i] != 0) ? (a_.i32[i]) : INT32_C(0));
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_sign_epi32(a, b) simde_mm_sign_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_sign_pi8 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_sign_pi8(a, b);
+  #else
+    simde__m64_private
+      r_,
+      a_ = simde__m64_to_private(a),
+      b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      uint8x8_t aneg_mask = vreinterpret_u8_s8(vshr_n_s8(b_.neon_i8, 7));
+      uint8x8_t bnz_mask;
+      #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+        bnz_mask = vceqz_s8(b_.neon_i8);
+      #else
+        bnz_mask = vceq_s8(b_.neon_i8, vdup_n_s8(0));
+      #endif
+      bnz_mask = vmvn_u8(bnz_mask);
+
+      r_.neon_i8 = vbsl_s8(aneg_mask, vneg_s8(a_.neon_i8), vand_s8(a_.neon_i8, vreinterpret_s8_u8(bnz_mask)));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = (b_.i8[i] < 0) ? (- a_.i8[i]) : ((b_.i8[i] != 0) ? (a_.i8[i]) : INT8_C(0));
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_sign_pi8(a, b) simde_mm_sign_pi8(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_sign_pi16 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_sign_pi16(a, b);
+  #else
+    simde__m64_private
+      r_,
+      a_ = simde__m64_to_private(a),
+      b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      uint16x4_t aneg_mask = vreinterpret_u16_s16(vshr_n_s16(b_.neon_i16, 15));
+      uint16x4_t bnz_mask;
+      #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+        bnz_mask = vceqz_s16(b_.neon_i16);
+      #else
+        bnz_mask = vceq_s16(b_.neon_i16, vdup_n_s16(0));
+      #endif
+      bnz_mask = vmvn_u16(bnz_mask);
+
+      r_.neon_i16 = vbsl_s16(aneg_mask, vneg_s16(a_.neon_i16), vand_s16(a_.neon_i16, vreinterpret_s16_u16(bnz_mask)));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = (b_.i16[i] < 0) ? (- a_.i16[i]) : ((b_.i16[i] > 0) ? (a_.i16[i]) : INT16_C(0));
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_sign_pi16(a, b) simde_mm_sign_pi16(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m64
+simde_mm_sign_pi32 (simde__m64 a, simde__m64 b) {
+  #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
+    return _mm_sign_pi32(a, b);
+  #else
+    simde__m64_private
+      r_,
+      a_ = simde__m64_to_private(a),
+      b_ = simde__m64_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      uint32x2_t aneg_mask = vreinterpret_u32_s32(vshr_n_s32(b_.neon_i32, 31));
+      uint32x2_t bnz_mask;
+      #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+        bnz_mask = vceqz_s32(b_.neon_i32);
+      #else
+        bnz_mask = vceq_s32(b_.neon_i32, vdup_n_s32(0));
+      #endif
+      bnz_mask = vmvn_u32(bnz_mask);
+
+      r_.neon_i32 = vbsl_s32(aneg_mask, vneg_s32(a_.neon_i32), vand_s32(a_.neon_i32, vreinterpret_s32_u32(bnz_mask)));
+    #else
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = (b_.i32[i] < 0) ? (- a_.i32[i]) : ((b_.i32[i] > 0) ? (a_.i32[i]) : INT32_C(0));
+      }
+    #endif
+
+    return simde__m64_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES)
+#  define _mm_sign_pi32(a, b) simde_mm_sign_pi32(a, b)
+#endif
+
+SIMDE_END_DECLS_
+
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_X86_SSE2_H) */
diff --git a/external_libs/pgenlib/simde/x86/svml.h b/external_libs/pgenlib/simde/x86/svml.h
new file mode 100644
index 0000000..40fe0cd
--- /dev/null
+++ b/external_libs/pgenlib/simde/x86/svml.h
@@ -0,0 +1,12129 @@
+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2020      Evan Nemerson <evan@nemerson.com>
+ *   2020      Himanshi Mathur <himanshi18037@iiitd.ac.in>
+ */
+
+#if !defined(SIMDE_X86_SVML_H)
+#define SIMDE_X86_SVML_H
+
+#include "fma.h"
+#include "avx2.h"
+#include "avx512/abs.h"
+#include "avx512/add.h"
+#include "avx512/cmp.h"
+#include "avx512/copysign.h"
+#include "avx512/xorsign.h"
+#include "avx512/div.h"
+#include "avx512/fmadd.h"
+#include "avx512/mov.h"
+#include "avx512/mul.h"
+#include "avx512/negate.h"
+#include "avx512/or.h"
+#include "avx512/set1.h"
+#include "avx512/setone.h"
+#include "avx512/setzero.h"
+#include "avx512/sqrt.h"
+#include "avx512/sub.h"
+
+#include "../simde-complex.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_acos_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_acos_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_acosf4_u10(a);
+    #else
+      return Sleef_acosf4_u35(a);
+    #endif
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_acosf(a_.f32[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_acos_ps
+  #define _mm_acos_ps(a) simde_mm_acos_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_acos_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_acos_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_acosd2_u10(a);
+    #else
+      return Sleef_acosd2_u35(a);
+    #endif
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_acos(a_.f64[i]);
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_acos_pd
+  #define _mm_acos_pd(a) simde_mm_acos_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_acos_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_acos_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_acosf8_u10(a);
+    #else
+      return Sleef_acosf8_u35(a);
+    #endif
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_acos_ps(a_.m128[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_acosf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_acos_ps
+  #define _mm256_acos_ps(a) simde_mm256_acos_ps(a)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_acos_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_acos_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_acosd4_u10(a);
+    #else
+      return Sleef_acosd4_u35(a);
+    #endif
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_acos_pd(a_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_acos(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_acos_pd
+  #define _mm256_acos_pd(a) simde_mm256_acos_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_acos_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_acos_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_acosf16_u10(a);
+    #else
+      return Sleef_acosf16_u35(a);
+    #endif
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_mm256_acos_ps(a_.m256[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_acosf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_acos_ps
+  #define _mm512_acos_ps(a) simde_mm512_acos_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_acos_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_acos_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_acosd8_u10(a);
+    #else
+      return Sleef_acosd8_u35(a);
+    #endif
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_acos_pd(a_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_acos(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_acos_pd
+  #define _mm512_acos_pd(a) simde_mm512_acos_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_acos_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_acos_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_acos_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_acos_ps
+  #define _mm512_mask_acos_ps(src, k, a) simde_mm512_mask_acos_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_acos_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_acos_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_acos_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_acos_pd
+  #define _mm512_mask_acos_pd(src, k, a) simde_mm512_mask_acos_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_acosh_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_acosh_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_acoshf4_u10(a);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_acoshf(a_.f32[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_acosh_ps
+  #define _mm_acosh_ps(a) simde_mm_acosh_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_acosh_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_acosh_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_acoshd2_u10(a);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_acosh(a_.f64[i]);
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_acosh_pd
+  #define _mm_acosh_pd(a) simde_mm_acosh_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_acosh_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_acosh_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_acoshf8_u10(a);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_acosh_ps(a_.m128[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_acoshf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_acosh_ps
+  #define _mm256_acosh_ps(a) simde_mm256_acosh_ps(a)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_acosh_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_acosh_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_acoshd4_u10(a);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_acosh_pd(a_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_acosh(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_acosh_pd
+  #define _mm256_acosh_pd(a) simde_mm256_acosh_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_acosh_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_acosh_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_acoshf16_u10(a);
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_mm256_acosh_ps(a_.m256[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_acoshf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_acosh_ps
+  #define _mm512_acosh_ps(a) simde_mm512_acosh_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_acosh_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_acosh_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_acoshd8_u10(a);
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_acosh_pd(a_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_acosh(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_acosh_pd
+  #define _mm512_acosh_pd(a) simde_mm512_acosh_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_acosh_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_acosh_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_acosh_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_acosh_ps
+  #define _mm512_mask_acosh_ps(src, k, a) simde_mm512_mask_acosh_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_acosh_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_acosh_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_acosh_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_acosh_pd
+  #define _mm512_mask_acosh_pd(src, k, a) simde_mm512_mask_acosh_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_asin_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_asin_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_asinf4_u10(a);
+    #else
+      return Sleef_asinf4_u35(a);
+    #endif
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_asinf(a_.f32[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_asin_ps
+  #define _mm_asin_ps(a) simde_mm_asin_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_asin_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_asin_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_asind2_u10(a);
+    #else
+      return Sleef_asind2_u35(a);
+    #endif
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_asin(a_.f64[i]);
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_asin_pd
+  #define _mm_asin_pd(a) simde_mm_asin_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_asin_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_asin_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_asinf8_u10(a);
+    #else
+      return Sleef_asinf8_u35(a);
+    #endif
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_asin_ps(a_.m128[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_asinf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_asin_ps
+  #define _mm256_asin_ps(a) simde_mm256_asin_ps(a)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_asin_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_asin_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_asind4_u10(a);
+    #else
+      return Sleef_asind4_u35(a);
+    #endif
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_asin_pd(a_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_asin(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_asin_pd
+  #define _mm256_asin_pd(a) simde_mm256_asin_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_asin_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_asin_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_asinf16_u10(a);
+    #else
+      return Sleef_asinf16_u35(a);
+    #endif
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_mm256_asin_ps(a_.m256[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_asinf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_asin_ps
+  #define _mm512_asin_ps(a) simde_mm512_asin_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_asin_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_asin_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_asind8_u10(a);
+    #else
+      return Sleef_asind8_u35(a);
+    #endif
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_asin_pd(a_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_asin(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_asin_pd
+  #define _mm512_asin_pd(a) simde_mm512_asin_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_asin_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_asin_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_asin_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_asin_ps
+  #define _mm512_mask_asin_ps(src, k, a) simde_mm512_mask_asin_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_asin_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_asin_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_asin_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_asin_pd
+  #define _mm512_mask_asin_pd(src, k, a) simde_mm512_mask_asin_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_asinh_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_asinh_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_asinhf4_u10(a);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_asinhf(a_.f32[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_asinh_ps
+  #define _mm_asinh_ps(a) simde_mm_asinh_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_asinh_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_asinh_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_asinhd2_u10(a);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_asinh(a_.f64[i]);
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_asinh_pd
+  #define _mm_asinh_pd(a) simde_mm_asinh_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_asinh_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_asinh_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_asinhf8_u10(a);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_asinh_ps(a_.m128[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_asinhf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_asinh_ps
+  #define _mm256_asinh_ps(a) simde_mm256_asinh_ps(a)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_asinh_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_asinh_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_asinhd4_u10(a);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_asinh_pd(a_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_asinh(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_asinh_pd
+  #define _mm256_asinh_pd(a) simde_mm256_asinh_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_asinh_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_asinh_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_asinhf16_u10(a);
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_mm256_asinh_ps(a_.m256[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_asinhf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_asinh_ps
+  #define _mm512_asinh_ps(a) simde_mm512_asinh_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_asinh_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_asinh_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_asinhd8_u10(a);
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_asinh_pd(a_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_asinh(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_asinh_pd
+  #define _mm512_asinh_pd(a) simde_mm512_asinh_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_asinh_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_asinh_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_asinh_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_asinh_ps
+  #define _mm512_mask_asinh_ps(src, k, a) simde_mm512_mask_asinh_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_asinh_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_asinh_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_asinh_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_asinh_pd
+  #define _mm512_mask_asinh_pd(src, k, a) simde_mm512_mask_asinh_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_atan_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_atan_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_atanf4_u10(a);
+    #else
+      return Sleef_atanf4_u35(a);
+    #endif
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_atanf(a_.f32[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_atan_ps
+  #define _mm_atan_ps(a) simde_mm_atan_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_atan_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_atan_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_atand2_u10(a);
+    #else
+      return Sleef_atand2_u35(a);
+    #endif
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_atan(a_.f64[i]);
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_atan_pd
+  #define _mm_atan_pd(a) simde_mm_atan_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_atan_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_atan_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_atanf8_u10(a);
+    #else
+      return Sleef_atanf8_u35(a);
+    #endif
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_atan_ps(a_.m128[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_atanf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_atan_ps
+  #define _mm256_atan_ps(a) simde_mm256_atan_ps(a)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_atan_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_atan_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_atand4_u10(a);
+    #else
+      return Sleef_atand4_u35(a);
+    #endif
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_atan_pd(a_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_atan(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_atan_pd
+  #define _mm256_atan_pd(a) simde_mm256_atan_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_atan_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_atan_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_atanf16_u10(a);
+    #else
+      return Sleef_atanf16_u35(a);
+    #endif
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_mm256_atan_ps(a_.m256[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_atanf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_atan_ps
+  #define _mm512_atan_ps(a) simde_mm512_atan_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_atan_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_atan_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_atand8_u10(a);
+    #else
+      return Sleef_atand8_u35(a);
+    #endif
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_atan_pd(a_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_atan(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_atan_pd
+  #define _mm512_atan_pd(a) simde_mm512_atan_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_atan_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_atan_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_atan_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_atan_ps
+  #define _mm512_mask_atan_ps(src, k, a) simde_mm512_mask_atan_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_atan_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_atan_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_atan_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_atan_pd
+  #define _mm512_mask_atan_pd(src, k, a) simde_mm512_mask_atan_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_atan2_ps (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_atan2_ps(a, b);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_atan2f4_u10(a, b);
+    #else
+      return Sleef_atan2f4_u35(a, b);
+    #endif
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_atan2f(a_.f32[i], b_.f32[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_atan2_ps
+  #define _mm_atan2_ps(a, b) simde_mm_atan2_ps(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_atan2_pd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_atan2_pd(a, b);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_atan2d2_u10(a, b);
+    #else
+      return Sleef_atan2d2_u35(a, b);
+    #endif
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_atan2(a_.f64[i], b_.f64[i]);
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_atan2_pd
+  #define _mm_atan2_pd(a, b) simde_mm_atan2_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_atan2_ps (simde__m256 a, simde__m256 b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_atan2_ps(a, b);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_atan2f8_u10(a, b);
+    #else
+      return Sleef_atan2f8_u35(a, b);
+    #endif
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a),
+      b_ = simde__m256_to_private(b);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_atan2_ps(a_.m128[i], b_.m128[i]);
+    }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_atan2f(a_.f32[i], b_.f32[i]);
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_atan2_ps
+  #define _mm256_atan2_ps(a, b) simde_mm256_atan2_ps(a, b)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_atan2_pd (simde__m256d a, simde__m256d b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_atan2_pd(a, b);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_atan2d4_u10(a, b);
+    #else
+      return Sleef_atan2d4_u35(a, b);
+    #endif
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a),
+      b_ = simde__m256d_to_private(b);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_atan2_pd(a_.m128d[i], b_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_atan2(a_.f64[i], b_.f64[i]);
+      }
+  #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_atan2_pd
+  #define _mm256_atan2_pd(a, b) simde_mm256_atan2_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_atan2_ps (simde__m512 a, simde__m512 b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_atan2_ps(a, b);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_atan2f16_u10(a, b);
+    #else
+      return Sleef_atan2f16_u35(a, b);
+    #endif
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a),
+      b_ = simde__m512_to_private(b);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_mm256_atan2_ps(a_.m256[i], b_.m256[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_atan2f(a_.f32[i], b_.f32[i]);
+      }
+    #endif
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_atan2_ps
+  #define _mm512_atan2_ps(a, b) simde_mm512_atan2_ps(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_atan2_pd (simde__m512d a, simde__m512d b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_atan2_pd(a, b);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_atan2d8_u10(a, b);
+    #else
+      return Sleef_atan2d8_u35(a, b);
+    #endif
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a),
+      b_ = simde__m512d_to_private(b);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_atan2_pd(a_.m256d[i], b_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_atan2(a_.f64[i], b_.f64[i]);
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_atan2_pd
+  #define _mm512_atan2_pd(a, b) simde_mm512_atan2_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_atan2_ps(simde__m512 src, simde__mmask16 k, simde__m512 a, simde__m512 b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_atan2_ps(src, k, a, b);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_atan2_ps(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_atan2_ps
+  #define _mm512_mask_atan2_ps(src, k, a, b) simde_mm512_mask_atan2_ps(src, k, a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_atan2_pd(simde__m512d src, simde__mmask8 k, simde__m512d a, simde__m512d b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_atan2_pd(src, k, a, b);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_atan2_pd(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_atan2_pd
+  #define _mm512_mask_atan2_pd(src, k, a, b) simde_mm512_mask_atan2_pd(src, k, a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_atanh_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_atanh_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_atanhf4_u10(a);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_atanhf(a_.f32[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_atanh_ps
+  #define _mm_atanh_ps(a) simde_mm_atanh_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_atanh_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_atanh_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_atanhd2_u10(a);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_atanh(a_.f64[i]);
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_atanh_pd
+  #define _mm_atanh_pd(a) simde_mm_atanh_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_atanh_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_atanh_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_atanhf8_u10(a);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_atanh_ps(a_.m128[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_atanhf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_atanh_ps
+  #define _mm256_atanh_ps(a) simde_mm256_atanh_ps(a)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_atanh_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_atanh_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_atanhd4_u10(a);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_atanh_pd(a_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_atanh(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_atanh_pd
+  #define _mm256_atanh_pd(a) simde_mm256_atanh_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_atanh_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_atanh_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_atanhf16_u10(a);
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_mm256_atanh_ps(a_.m256[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_atanhf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_atanh_ps
+  #define _mm512_atanh_ps(a) simde_mm512_atanh_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_atanh_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_atanh_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_atanhd8_u10(a);
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_atanh_pd(a_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_atanh(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_atanh_pd
+  #define _mm512_atanh_pd(a) simde_mm512_atanh_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_atanh_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_atanh_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_atanh_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_atanh_ps
+  #define _mm512_mask_atanh_ps(src, k, a) simde_mm512_mask_atanh_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_atanh_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_atanh_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_atanh_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_atanh_pd
+  #define _mm512_mask_atanh_pd(src, k, a) simde_mm512_mask_atanh_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cbrt_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_cbrt_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_cbrtf4_u10(a);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_cbrtf(a_.f32[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cbrt_ps
+  #define _mm_cbrt_ps(a) simde_mm_cbrt_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cbrt_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_cbrt_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_cbrtd2_u10(a);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_cbrt(a_.f64[i]);
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cbrt_pd
+  #define _mm_cbrt_pd(a) simde_mm_cbrt_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_cbrt_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_cbrt_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_cbrtf8_u10(a);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_cbrt_ps(a_.m128[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_cbrtf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cbrt_ps
+  #define _mm256_cbrt_ps(a) simde_mm256_cbrt_ps(a)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_cbrt_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_cbrt_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_cbrtd4_u10(a);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_cbrt_pd(a_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_cbrt(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cbrt_pd
+  #define _mm256_cbrt_pd(a) simde_mm256_cbrt_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_cbrt_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_cbrt_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_cbrtf16_u10(a);
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_mm256_cbrt_ps(a_.m256[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_cbrtf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_cbrt_ps
+  #define _mm512_cbrt_ps(a) simde_mm512_cbrt_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_cbrt_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_cbrt_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_cbrtd8_u10(a);
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_cbrt_pd(a_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_cbrt(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_cbrt_pd
+  #define _mm512_cbrt_pd(a) simde_mm512_cbrt_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_cbrt_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_cbrt_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_cbrt_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_cbrt_ps
+  #define _mm512_mask_cbrt_ps(src, k, a) simde_mm512_mask_cbrt_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_cbrt_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_cbrt_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_cbrt_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_cbrt_pd
+  #define _mm512_mask_cbrt_pd(src, k, a) simde_mm512_mask_cbrt_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cexp_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_cexp_ps(a);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i+=2) {
+      simde_cfloat32 val = simde_math_cexpf(SIMDE_MATH_CMPLXF(a_.f32[i], a_.f32[i+1]));
+      r_.f32[  i  ] = simde_math_crealf(val);
+      r_.f32[i + 1] = simde_math_cimagf(val);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cexp_ps
+  #define _mm_cexp_ps(a) simde_mm_cexp_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_cexp_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_cexp_ps(a);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i+=2) {
+      simde_cfloat32 val = simde_math_cexpf(SIMDE_MATH_CMPLXF(a_.f32[i], a_.f32[i+1]));
+      r_.f32[  i  ] = simde_math_crealf(val);
+      r_.f32[i + 1] = simde_math_cimagf(val);
+    }
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cexp_ps
+  #define _mm256_cexp_ps(a) simde_mm256_cexp_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cos_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_cos_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_cosf4_u10(a);
+    #else
+      return Sleef_cosf4_u35(a);
+    #endif
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_cosf(a_.f32[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cos_ps
+  #define _mm_cos_ps(a) simde_mm_cos_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cos_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_cos_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_cosd2_u10(a);
+    #else
+      return Sleef_cosd2_u35(a);
+    #endif
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_cos(a_.f64[i]);
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cos_pd
+  #define _mm_cos_pd(a) simde_mm_cos_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_cos_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_cos_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_cosf8_u10(a);
+    #else
+      return Sleef_cosf8_u35(a);
+    #endif
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_cos_ps(a_.m128[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_cosf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cos_ps
+  #define _mm256_cos_ps(a) simde_mm256_cos_ps(a)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_cos_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_cos_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_cosd4_u10(a);
+    #else
+      return Sleef_cosd4_u35(a);
+    #endif
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_cos_pd(a_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_cos(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cos_pd
+  #define _mm256_cos_pd(a) simde_mm256_cos_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_cos_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_cos_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_cosf16_u10(a);
+    #else
+      return Sleef_cosf16_u35(a);
+    #endif
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_mm256_cos_ps(a_.m256[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_cosf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_cos_ps
+  #define _mm512_cos_ps(a) simde_mm512_cos_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_cos_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_cos_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_cosd8_u10(a);
+    #else
+      return Sleef_cosd8_u35(a);
+    #endif
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_cos_pd(a_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_cos(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_cos_pd
+  #define _mm512_cos_pd(a) simde_mm512_cos_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_cos_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_cos_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_cos_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_cos_ps
+  #define _mm512_mask_cos_ps(src, k, a) simde_mm512_mask_cos_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_cos_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_cos_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_cos_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_cos_pd
+  #define _mm512_mask_cos_pd(src, k, a) simde_mm512_mask_cos_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_x_mm_deg2rad_ps(simde__m128 a) {
+  #if SIMDE_NATURAL_VECTOR_SIZE_GE(128)
+    return simde_mm_mul_ps(a, simde_mm_set1_ps(SIMDE_MATH_PI_OVER_180F));
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_f32 = vmulq_n_f32(a_.neon_i32, SIMDE_MATH_PI_OVER_180F);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && !defined(SIMDE_BUG_GCC_53784)
+      r_.f32 = a_.f32 * SIMDE_MATH_PI_OVER_180F;
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+    const __typeof__(r_.f32) tmp = { SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F };
+      r_.f32 = a_.f32 * tmp;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_deg2radf(a_.f32[i]);
+      }
+
+    #endif
+    return simde__m128_from_private(r_);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_x_mm_deg2rad_pd(simde__m128d a) {
+  #if SIMDE_NATURAL_VECTOR_SIZE_GE(128)
+      return simde_mm_mul_pd(a, simde_mm_set1_pd(SIMDE_MATH_PI_OVER_180));
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_f64 = vmulq_n_f64(a_.neon_i64, SIMDE_MATH_PI_OVER_180);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && !defined(SIMDE_BUG_GCC_53784)
+    r_.f64 = a_.f64 * SIMDE_MATH_PI_OVER_180;
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+    const __typeof__(r_.f64) tmp = { SIMDE_MATH_PI_OVER_180, SIMDE_MATH_PI_OVER_180 };
+      r_.f64 = a_.f64 * tmp;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_deg2rad(a_.f64[i]);
+      }
+
+    #endif
+    return simde__m128d_from_private(r_);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_x_mm256_deg2rad_ps(simde__m256 a) {
+  #if SIMDE_NATURAL_VECTOR_SIZE_GE(256)
+    return simde_mm256_mul_ps(a, simde_mm256_set1_ps(SIMDE_MATH_PI_OVER_180F));
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_x_mm_deg2rad_ps(a_.m128[i]);
+      }
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && !defined(SIMDE_BUG_GCC_53784)
+    r_.f32 = a_.f32 * SIMDE_MATH_PI_OVER_180F;
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+    const __typeof__(r_.f32) tmp = {
+        SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F,
+        SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F
+      };
+      r_.f32 = a_.f32 * tmp;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_deg2radf(a_.f32[i]);
+      }
+
+    #endif
+    return simde__m256_from_private(r_);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_x_mm256_deg2rad_pd(simde__m256d a) {
+  #if SIMDE_NATURAL_VECTOR_SIZE_GE(256)
+    return simde_mm256_mul_pd(a, simde_mm256_set1_pd(SIMDE_MATH_PI_OVER_180));
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_x_mm_deg2rad_pd(a_.m128d[i]);
+      }
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && !defined(SIMDE_BUG_GCC_53784)
+    r_.f64 = a_.f64 * SIMDE_MATH_PI_OVER_180;
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+    const __typeof__(r_.f64) tmp = { SIMDE_MATH_PI_OVER_180, SIMDE_MATH_PI_OVER_180, SIMDE_MATH_PI_OVER_180, SIMDE_MATH_PI_OVER_180 };
+      r_.f64 = a_.f64 * tmp;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_deg2rad(a_.f64[i]);
+      }
+
+    #endif
+    return simde__m256d_from_private(r_);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_x_mm512_deg2rad_ps(simde__m512 a) {
+  #if SIMDE_NATURAL_VECTOR_SIZE_GE(512)
+      return simde_mm512_mul_ps(a, simde_mm512_set1_ps(SIMDE_MATH_PI_OVER_180F));
+  #else
+    simde__m512_private
+        r_,
+        a_ = simde__m512_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_x_mm256_deg2rad_ps(a_.m256[i]);
+      }
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && !defined(SIMDE_BUG_GCC_53784)
+    r_.f32 = a_.f32 * SIMDE_MATH_PI_OVER_180F;
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+    const __typeof__(r_.f32) tmp = {
+        SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F,
+        SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F,
+        SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F,
+        SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F, SIMDE_MATH_PI_OVER_180F
+      };
+      r_.f32 = a_.f32 * tmp;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_deg2radf(a_.f32[i]);
+      }
+
+    #endif
+    return simde__m512_from_private(r_);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_x_mm512_deg2rad_pd(simde__m512d a) {
+  #if SIMDE_NATURAL_VECTOR_SIZE_GE(512)
+      return simde_mm512_mul_pd(a, simde_mm512_set1_pd(SIMDE_MATH_PI_OVER_180));
+  #else
+    simde__m512d_private
+        r_,
+        a_ = simde__m512d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_x_mm256_deg2rad_pd(a_.m256d[i]);
+      }
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && !defined(SIMDE_BUG_GCC_53784)
+    r_.f64 = a_.f64 * SIMDE_MATH_PI_OVER_180;
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+    const __typeof__(r_.f64) tmp = {
+        SIMDE_MATH_PI_OVER_180, SIMDE_MATH_PI_OVER_180, SIMDE_MATH_PI_OVER_180, SIMDE_MATH_PI_OVER_180,
+        SIMDE_MATH_PI_OVER_180, SIMDE_MATH_PI_OVER_180, SIMDE_MATH_PI_OVER_180, SIMDE_MATH_PI_OVER_180
+      };
+      r_.f64 = a_.f64 * tmp;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_deg2rad(a_.f64[i]);
+      }
+
+    #endif
+    return simde__m512d_from_private(r_);
+  #endif
+}
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cosd_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_cosd_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_cosf4_u10(simde_x_mm_deg2rad_ps(a));
+    #else
+      return Sleef_cosf4_u35(simde_x_mm_deg2rad_ps(a));
+    #endif
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_cosf(simde_math_deg2radf(a_.f32[i]));
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cosd_ps
+  #define _mm_cosd_ps(a) simde_mm_cosd_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cosd_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_cosd_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_cosd2_u10(simde_x_mm_deg2rad_pd(a));
+    #else
+      return Sleef_cosd2_u35(simde_x_mm_deg2rad_pd(a));
+    #endif
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_cos(simde_math_deg2rad(a_.f64[i]));
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cosd_pd
+  #define _mm_cosd_pd(a) simde_mm_cosd_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_cosd_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_cosd_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_cosf8_u10(simde_x_mm256_deg2rad_ps(a));
+    #else
+      return Sleef_cosf8_u35(simde_x_mm256_deg2rad_ps(a));
+    #endif
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_cosd_ps(a_.m128[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_cosf(simde_math_deg2radf(a_.f32[i]));
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cosd_ps
+  #define _mm256_cosd_ps(a) simde_mm256_cosd_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_cosd_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_cosd_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_cosd4_u10(simde_x_mm256_deg2rad_pd(a));
+    #else
+      return Sleef_cosd4_u35(simde_x_mm256_deg2rad_pd(a));
+    #endif
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_cosd_pd(a_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_cos(simde_math_deg2rad(a_.f64[i]));
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cosd_pd
+  #define _mm256_cosd_pd(a) simde_mm256_cosd_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_cosd_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_cosd_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_cosf16_u10(simde_x_mm512_deg2rad_ps(a));
+    #else
+      return Sleef_cosf16_u35(simde_x_mm512_deg2rad_ps(a));
+    #endif
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_mm256_cosd_ps(a_.m256[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_cosf(simde_math_deg2radf(a_.f32[i]));
+      }
+    #endif
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_cosd_ps
+  #define _mm512_cosd_ps(a) simde_mm512_cosd_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_cosd_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_cosd_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_cosd8_u10(simde_x_mm512_deg2rad_pd(a));
+    #else
+      return Sleef_cosd8_u35(simde_x_mm512_deg2rad_pd(a));
+    #endif
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+  #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_cosd_pd(a_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_cos(simde_math_deg2rad(a_.f64[i]));
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_cosd_pd
+  #define _mm512_cosd_pd(a) simde_mm512_cosd_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_cosd_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_cosd_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_cosd_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_cosd_ps
+  #define _mm512_mask_cosd_ps(src, k, a) simde_mm512_mask_cosd_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_cosd_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_cosd_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_cosd_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_cosd_pd
+  #define _mm512_mask_cosd_pd(src, k, a) simde_mm512_mask_cosd_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cosh_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_cosh_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_coshf4_u10(a);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_coshf(a_.f32[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cosh_ps
+  #define _mm_cosh_ps(a) simde_mm_cosh_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cosh_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_cosh_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_coshd2_u10(a);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_cosh(a_.f64[i]);
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cosh_pd
+  #define _mm_cosh_pd(a) simde_mm_cosh_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_cosh_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_cosh_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_coshf8_u10(a);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_cosh_ps(a_.m128[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_coshf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cosh_ps
+  #define _mm256_cosh_ps(a) simde_mm256_cosh_ps(a)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_cosh_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_cosh_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_coshd4_u10(a);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_cosh_pd(a_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_cosh(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cosh_pd
+  #define _mm256_cosh_pd(a) simde_mm256_cosh_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_cosh_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_cosh_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_coshf16_u10(a);
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_mm256_cosh_ps(a_.m256[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_coshf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_cosh_ps
+  #define _mm512_cosh_ps(a) simde_mm512_cosh_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_cosh_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_cosh_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_coshd8_u10(a);
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_cosh_pd(a_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_cosh(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_cosh_pd
+  #define _mm512_cosh_pd(a) simde_mm512_cosh_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_cosh_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_cosh_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_cosh_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_cosh_ps
+  #define _mm512_mask_cosh_ps(src, k, a) simde_mm512_mask_cosh_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_cosh_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_cosh_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_cosh_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_cosh_pd
+  #define _mm512_mask_cosh_pd(src, k, a) simde_mm512_mask_cosh_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_div_epi8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_div_epi8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i8 = a_.i8 / b_.i8;
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    r_.wasm_v128 = wasm_i8x4_div(a_.wasm_v128, b_.wasm_v128);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = a_.i8[i] / b_.i8[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_div_epi8
+  #define _mm_div_epi8(a, b) simde_mm_div_epi8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_div_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_div_epi16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i16 = a_.i16 / b_.i16;
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    r_.wasm_v128 = wasm_i16x4_div(a_.wasm_v128, b_.wasm_v128);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = a_.i16[i] / b_.i16[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_div_epi16
+  #define _mm_div_epi16(a, b) simde_mm_div_epi16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_div_epi32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_div_epi32(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32 = a_.i32 / b_.i32;
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    r_.wasm_v128 = wasm_i32x4_div(a_.wasm_v128, b_.wasm_v128);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = a_.i32[i] / b_.i32[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#define simde_mm_idiv_epi32(a, b) simde_mm_div_epi32(a, b)
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_div_epi32
+  #define _mm_div_epi32(a, b) simde_mm_div_epi32(a, b)
+  #undef _mm_idiv_epi32
+  #define _mm_idiv_epi32(a, b) simde_mm_div_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_div_epi64 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_div_epi64(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i64 = a_.i64 / b_.i64;
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    r_.wasm_v128 = wasm_i64x4_div(a_.wasm_v128, b_.wasm_v128);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = a_.i64[i] / b_.i64[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_div_epi64
+  #define _mm_div_epi64(a, b) simde_mm_div_epi64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_div_epu8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_div_epu8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u8 = a_.u8 / b_.u8;
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    r_.wasm_v128 = wasm_u8x16_div(a_.wasm_v128, b_.wasm_v128);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+        r_.u8[i] = a_.u8[i] / b_.u8[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_div_epu8
+  #define _mm_div_epu8(a, b) simde_mm_div_epu8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_div_epu16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_div_epu16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u16 = a_.u16 / b_.u16;
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    r_.wasm_v128 = wasm_u16x16_div(a_.wasm_v128, b_.wasm_v128);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+        r_.u16[i] = a_.u16[i] / b_.u16[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_div_epu16
+  #define _mm_div_epu16(a, b) simde_mm_div_epu16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_div_epu32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_div_epu32(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u32 = a_.u32 / b_.u32;
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    r_.wasm_v128 = wasm_u32x16_div(a_.wasm_v128, b_.wasm_v128);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+        r_.u32[i] = a_.u32[i] / b_.u32[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#define simde_mm_udiv_epi32(a, b) simde_mm_div_epu32(a, b)
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_div_epu32
+  #define _mm_div_epu32(a, b) simde_mm_div_epu32(a, b)
+  #undef _mm_udiv_epi32
+  #define _mm_udiv_epi32(a, b) simde_mm_div_epu32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_div_epu64 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_div_epu64(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u64 = a_.u64 / b_.u64;
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+    r_.wasm_v128 = wasm_u64x16_div(a_.wasm_v128, b_.wasm_v128);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
+        r_.u64[i] = a_.u64[i] / b_.u64[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_div_epu64
+  #define _mm_div_epu64(a, b) simde_mm_div_epu64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_div_epi8 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_div_epi8(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i8 = a_.i8 / b_.i8;
+    #else
+      #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+        for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
+          r_.m128i[i] = simde_mm_div_epi8(a_.m128i[i], b_.m128i[i]);
+        }
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+          r_.i8[i] = a_.i8[i] / b_.i8[i];
+        }
+      #endif
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_div_epi8
+  #define _mm256_div_epi8(a, b) simde_mm256_div_epi8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_div_epi16 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_div_epi16(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i16 = a_.i16 / b_.i16;
+    #else
+      #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+        for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
+          r_.m128i[i] = simde_mm_div_epi16(a_.m128i[i], b_.m128i[i]);
+        }
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+          r_.i16[i] = a_.i16[i] / b_.i16[i];
+        }
+       #endif
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_div_epi16
+  #define _mm256_div_epi16(a, b) simde_mm256_div_epi16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_div_epi32 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_div_epi32(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32 = a_.i32 / b_.i32;
+    #else
+      #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+        for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
+          r_.m128i[i] = simde_mm_div_epi32(a_.m128i[i], b_.m128i[i]);
+        }
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+          r_.i32[i] = a_.i32[i] / b_.i32[i];
+        }
+       #endif
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#define simde_mm256_idiv_epi32(a, b) simde_mm256_div_epi32(a, b)
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_div_epi32
+  #define _mm256_div_epi32(a, b) simde_mm256_div_epi32(a, b)
+  #undef _mm256_idiv_epi32
+  #define _mm256_idiv_epi32(a, b) simde_mm256_div_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_div_epi64 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_div_epi64(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i64 = a_.i64 / b_.i64;
+    #else
+      #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+        for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
+          r_.m128i[i] = simde_mm_div_epi64(a_.m128i[i], b_.m128i[i]);
+        }
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+          r_.i64[i] = a_.i64[i] / b_.i64[i];
+        }
+        #endif
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_div_epi64
+  #define _mm256_div_epi64(a, b) simde_mm256_div_epi64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_div_epu8 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_div_epu8(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u8 = a_.u8 / b_.u8;
+    #else
+      #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+        for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
+          r_.m128i[i] = simde_mm_div_epu8(a_.m128i[i], b_.m128i[i]);
+        }
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+          r_.u8[i] = a_.u8[i] / b_.u8[i];
+        }
+      #endif
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_div_epu8
+  #define _mm256_div_epu8(a, b) simde_mm256_div_epu8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_div_epu16 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_div_epu16(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u16 = a_.u16 / b_.u16;
+    #else
+      #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+        for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
+          r_.m128i[i] = simde_mm_div_epu16(a_.m128i[i], b_.m128i[i]);
+        }
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+          r_.u16[i] = a_.u16[i] / b_.u16[i];
+        }
+      #endif
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_div_epu16
+  #define _mm256_div_epu16(a, b) simde_mm256_div_epu16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_div_epu32 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_div_epu32(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u32 = a_.u32 / b_.u32;
+    #else
+      #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+        for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
+          r_.m128i[i] = simde_mm_div_epu32(a_.m128i[i], b_.m128i[i]);
+        }
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+          r_.u32[i] = a_.u32[i] / b_.u32[i];
+        }
+      #endif
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#define simde_mm256_udiv_epi32(a, b) simde_mm256_div_epu32(a, b)
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_div_epu32
+  #define _mm256_div_epu32(a, b) simde_mm256_div_epu32(a, b)
+  #undef _mm256_udiv_epi32
+  #define _mm256_udiv_epi32(a, b) simde_mm256_div_epu32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_div_epu64 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_div_epu64(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u64 = a_.u64 / b_.u64;
+    #else
+      #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+        for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
+          r_.m128i[i] = simde_mm_div_epu64(a_.m128i[i], b_.m128i[i]);
+        }
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
+          r_.u64[i] = a_.u64[i] / b_.u64[i];
+        }
+      #endif
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_div_epu64
+  #define _mm256_div_epu64(a, b) simde_mm256_div_epu64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512i
+simde_mm512_div_epi8 (simde__m512i a, simde__m512i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_div_epi8(a, b);
+  #else
+    simde__m512i_private
+      r_,
+      a_ = simde__m512i_to_private(a),
+      b_ = simde__m512i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i8 = a_.i8 / b_.i8;
+    #else
+      #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+        for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
+          r_.m256i[i] = simde_mm256_div_epi8(a_.m256i[i], b_.m256i[i]);
+        }
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+          r_.i8[i] = a_.i8[i] / b_.i8[i];
+        }
+      #endif
+    #endif
+
+    return simde__m512i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_div_epi8
+  #define _mm512_div_epi8(a, b) simde_mm512_div_epi8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512i
+simde_mm512_div_epi16 (simde__m512i a, simde__m512i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_div_epi16(a, b);
+  #else
+    simde__m512i_private
+      r_,
+      a_ = simde__m512i_to_private(a),
+      b_ = simde__m512i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i16 = a_.i16 / b_.i16;
+    #else
+      #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+        for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
+          r_.m256i[i] = simde_mm256_div_epi16(a_.m256i[i], b_.m256i[i]);
+        }
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+          r_.i16[i] = a_.i16[i] / b_.i16[i];
+        }
+      #endif
+    #endif
+
+    return simde__m512i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_div_epi16
+  #define _mm512_div_epi16(a, b) simde_mm512_div_epi16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512i
+simde_mm512_div_epi32 (simde__m512i a, simde__m512i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_div_epi32(a, b);
+  #else
+    simde__m512i_private
+      r_,
+      a_ = simde__m512i_to_private(a),
+      b_ = simde__m512i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32 = a_.i32 / b_.i32;
+    #else
+      #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+        for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
+          r_.m256i[i] = simde_mm256_div_epi32(a_.m256i[i], b_.m256i[i]);
+        }
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+          r_.i32[i] = a_.i32[i] / b_.i32[i];
+        }
+        #endif
+    #endif
+
+    return simde__m512i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_div_epi32
+  #define _mm512_div_epi32(a, b) simde_mm512_div_epi32((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512i
+simde_mm512_mask_div_epi32(simde__m512i src, simde__mmask16 k, simde__m512i a, simde__m512i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_div_epi32(src, k, a, b);
+  #else
+    return simde_mm512_mask_mov_epi32(src, k, simde_mm512_div_epi32(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_div_epi32
+  #define _mm512_mask_div_epi32(src, k, a, b) simde_mm512_mask_div_epi32(src, k, a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512i
+simde_mm512_div_epi64 (simde__m512i a, simde__m512i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_div_epi64(a, b);
+  #else
+    simde__m512i_private
+      r_,
+      a_ = simde__m512i_to_private(a),
+      b_ = simde__m512i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i64 = a_.i64 / b_.i64;
+    #else
+      #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+        for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
+          r_.m256i[i] = simde_mm256_div_epi64(a_.m256i[i], b_.m256i[i]);
+        }
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+          r_.i64[i] = a_.i64[i] / b_.i64[i];
+        }
+      #endif
+    #endif
+
+    return simde__m512i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_div_epi64
+  #define _mm512_div_epi64(a, b) simde_mm512_div_epi64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512i
+simde_mm512_div_epu8 (simde__m512i a, simde__m512i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_div_epu8(a, b);
+  #else
+    simde__m512i_private
+      r_,
+      a_ = simde__m512i_to_private(a),
+      b_ = simde__m512i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u8 = a_.u8 / b_.u8;
+    #else
+      #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+        for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
+          r_.m256i[i] = simde_mm256_div_epu8(a_.m256i[i], b_.m256i[i]);
+        }
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+          r_.u8[i] = a_.u8[i] / b_.u8[i];
+        }
+      #endif
+    #endif
+
+    return simde__m512i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_div_epu8
+  #define _mm512_div_epu8(a, b) simde_mm512_div_epu8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512i
+simde_mm512_div_epu16 (simde__m512i a, simde__m512i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_div_epu16(a, b);
+  #else
+    simde__m512i_private
+      r_,
+      a_ = simde__m512i_to_private(a),
+      b_ = simde__m512i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u16 = a_.u16 / b_.u16;
+    #else
+      #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+        for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
+          r_.m256i[i] = simde_mm256_div_epu16(a_.m256i[i], b_.m256i[i]);
+        }
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+          r_.u16[i] = a_.u16[i] / b_.u16[i];
+        }
+      #endif
+    #endif
+
+    return simde__m512i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_div_epu16
+  #define _mm512_div_epu16(a, b) simde_mm512_div_epu16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512i
+simde_mm512_div_epu32 (simde__m512i a, simde__m512i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_div_epu32(a, b);
+  #else
+    simde__m512i_private
+      r_,
+      a_ = simde__m512i_to_private(a),
+      b_ = simde__m512i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u32 = a_.u32 / b_.u32;
+    #else
+      #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+        for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
+          r_.m256i[i] = simde_mm256_div_epu32(a_.m256i[i], b_.m256i[i]);
+        }
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+          r_.u32[i] = a_.u32[i] / b_.u32[i];
+        }
+      #endif
+    #endif
+
+    return simde__m512i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_div_epu32
+  #define _mm512_div_epu32(a, b) simde_mm512_div_epu32((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512i
+simde_mm512_mask_div_epu32(simde__m512i src, simde__mmask16 k, simde__m512i a, simde__m512i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_div_epu32(src, k, a, b);
+  #else
+    return simde_mm512_mask_mov_epi32(src, k, simde_mm512_div_epu32(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_div_epu32
+  #define _mm512_mask_div_epu32(src, k, a, b) simde_mm512_mask_div_epu32(src, k, a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512i
+simde_mm512_div_epu64 (simde__m512i a, simde__m512i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_div_epu64(a, b);
+  #else
+    simde__m512i_private
+      r_,
+      a_ = simde__m512i_to_private(a),
+      b_ = simde__m512i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u64 = a_.u64 / b_.u64;
+    #else
+      #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+        for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
+          r_.m256i[i] = simde_mm256_div_epu64(a_.m256i[i], b_.m256i[i]);
+        }
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
+          r_.u64[i] = a_.u64[i] / b_.u64[i];
+        }
+      #endif
+    #endif
+
+    return simde__m512i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_div_epu64
+  #define _mm512_div_epu64(a, b) simde_mm512_div_epu64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_erf_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_erf_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_erff4_u10(a);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_erff(a_.f32[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_erf_ps
+  #define _mm_erf_ps(a) simde_mm_erf_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_erf_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_erf_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_erfd2_u10(a);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_erf(a_.f64[i]);
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_erf_pd
+  #define _mm_erf_pd(a) simde_mm_erf_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_erf_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_erf_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_erff8_u10(a);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_erf_ps(a_.m128[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_erff(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_erf_ps
+  #define _mm256_erf_ps(a) simde_mm256_erf_ps(a)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_erf_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_erf_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_erfd4_u10(a);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_erf_pd(a_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_erf(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_erf_pd
+  #define _mm256_erf_pd(a) simde_mm256_erf_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_erf_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_erf_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_erff16_u10(a);
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_mm256_erf_ps(a_.m256[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_erff(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_erf_ps
+  #define _mm512_erf_ps(a) simde_mm512_erf_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_erf_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_erf_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_erfd8_u10(a);
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_erf_pd(a_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_erf(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_erf_pd
+  #define _mm512_erf_pd(a) simde_mm512_erf_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_erf_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_erf_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_erf_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_erf_ps
+  #define _mm512_mask_erf_ps(src, k, a) simde_mm512_mask_erf_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_erf_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_erf_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_erf_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_erf_pd
+  #define _mm512_mask_erf_pd(src, k, a) simde_mm512_mask_erf_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_erfc_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_erfc_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_erfcf4_u15(a);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_erfcf(a_.f32[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_erfc_ps
+  #define _mm_erfc_ps(a) simde_mm_erfc_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_erfc_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_erfc_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_erfcd2_u15(a);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_erfc(a_.f64[i]);
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_erfc_pd
+  #define _mm_erfc_pd(a) simde_mm_erfc_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_erfc_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_erfc_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_erfcf8_u15(a);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_erfc_ps(a_.m128[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_erfcf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_erfc_ps
+  #define _mm256_erfc_ps(a) simde_mm256_erfc_ps(a)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_erfc_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_erfc_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_erfcd4_u15(a);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_erfc_pd(a_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_erfc(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_erfc_pd
+  #define _mm256_erfc_pd(a) simde_mm256_erfc_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_erfc_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_erfc_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_erfcf16_u15(a);
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_mm256_erfc_ps(a_.m256[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_erfcf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_erfc_ps
+  #define _mm512_erfc_ps(a) simde_mm512_erfc_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_erfc_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_erfc_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_erfcd8_u15(a);
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_erfc_pd(a_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_erfc(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_erfc_pd
+  #define _mm512_erfc_pd(a) simde_mm512_erfc_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_erfc_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_erfc_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_erfc_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_erfc_ps
+  #define _mm512_mask_erfc_ps(src, k, a) simde_mm512_mask_erfc_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_erfc_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_erfc_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_erfc_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_erfc_pd
+  #define _mm512_mask_erfc_pd(src, k, a) simde_mm512_mask_erfc_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_exp_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_exp_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_expf4_u10(a);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_expf(a_.f32[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_exp_ps
+  #define _mm_exp_ps(a) simde_mm_exp_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_exp_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_exp_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_expd2_u10(a);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_exp(a_.f64[i]);
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_exp_pd
+  #define _mm_exp_pd(a) simde_mm_exp_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_exp_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_exp_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_expf8_u10(a);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_exp_ps(a_.m128[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_expf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_exp_ps
+  #define _mm256_exp_ps(a) simde_mm256_exp_ps(a)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_exp_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_exp_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_expd4_u10(a);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_exp_pd(a_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_exp(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_exp_pd
+  #define _mm256_exp_pd(a) simde_mm256_exp_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_exp_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_exp_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_expf16_u10(a);
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_mm256_exp_ps(a_.m256[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_expf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_exp_ps
+  #define _mm512_exp_ps(a) simde_mm512_exp_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_exp_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_exp_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_expd8_u10(a);
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_exp_pd(a_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_exp(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_exp_pd
+  #define _mm512_exp_pd(a) simde_mm512_exp_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_exp_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_exp_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_exp_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_exp_ps
+  #define _mm512_mask_exp_ps(src, k, a) simde_mm512_mask_exp_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_exp_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_exp_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_exp_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_exp_pd
+  #define _mm512_mask_exp_pd(src, k, a) simde_mm512_mask_exp_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_expm1_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_expm1_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_expm1f4_u10(a);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_expm1f(a_.f32[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_expm1_ps
+  #define _mm_expm1_ps(a) simde_mm_expm1_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_expm1_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_expm1_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_expm1d2_u10(a);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_expm1(a_.f64[i]);
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_expm1_pd
+  #define _mm_expm1_pd(a) simde_mm_expm1_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_expm1_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_expm1_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_expm1f8_u10(a);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_expm1_ps(a_.m128[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_expm1f(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_expm1_ps
+  #define _mm256_expm1_ps(a) simde_mm256_expm1_ps(a)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_expm1_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_expm1_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_expm1d4_u10(a);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_expm1_pd(a_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_expm1(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_expm1_pd
+  #define _mm256_expm1_pd(a) simde_mm256_expm1_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_expm1_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_expm1_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_expm1f16_u10(a);
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_mm256_expm1_ps(a_.m256[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_expm1f(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_expm1_ps
+  #define _mm512_expm1_ps(a) simde_mm512_expm1_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_expm1_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_expm1_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_expm1d8_u10(a);
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_expm1_pd(a_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_expm1(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_expm1_pd
+  #define _mm512_expm1_pd(a) simde_mm512_expm1_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_expm1_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_expm1_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_expm1_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_expm1_ps
+  #define _mm512_mask_expm1_ps(src, k, a) simde_mm512_mask_expm1_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_expm1_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_expm1_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_expm1_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_expm1_pd
+  #define _mm512_mask_expm1_pd(src, k, a) simde_mm512_mask_expm1_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_exp2_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_exp2_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_exp2f4_u10(a);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_exp2f(a_.f32[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_exp2_ps
+  #define _mm_exp2_ps(a) simde_mm_exp2_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_exp2_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_exp2_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_exp2d2_u10(a);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_exp2(a_.f64[i]);
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_exp2_pd
+  #define _mm_exp2_pd(a) simde_mm_exp2_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_exp2_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_exp2_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_exp2f8_u10(a);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_exp2_ps(a_.m128[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_exp2f(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_exp2_ps
+  #define _mm256_exp2_ps(a) simde_mm256_exp2_ps(a)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_exp2_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_exp2_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_exp2d4_u10(a);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_exp2_pd(a_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_exp2(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_exp2_pd
+  #define _mm256_exp2_pd(a) simde_mm256_exp2_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_exp2_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_exp2_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_exp2f16_u10(a);
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_mm256_exp2_ps(a_.m256[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_exp2f(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_exp2_ps
+  #define _mm512_exp2_ps(a) simde_mm512_exp2_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_exp2_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_exp2_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_exp2d8_u10(a);
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_exp2_pd(a_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_exp2(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_exp2_pd
+  #define _mm512_exp2_pd(a) simde_mm512_exp2_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_exp2_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_exp2_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_exp2_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_exp2_ps
+  #define _mm512_mask_exp2_ps(src, k, a) simde_mm512_mask_exp2_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_exp2_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_exp2_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_exp2_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_exp2_pd
+  #define _mm512_mask_exp2_pd(src, k, a) simde_mm512_mask_exp2_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_exp10_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_exp10_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_exp10f4_u10(a);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_exp10f(a_.f32[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_exp10_ps
+  #define _mm_exp10_ps(a) simde_mm_exp10_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_exp10_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_exp10_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_exp10d2_u10(a);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_exp10(a_.f64[i]);
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_exp10_pd
+  #define _mm_exp10_pd(a) simde_mm_exp10_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_exp10_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_exp10_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_exp10f8_u10(a);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_exp10_ps(a_.m128[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_exp10f(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_exp10_ps
+  #define _mm256_exp10_ps(a) simde_mm256_exp10_ps(a)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_exp10_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_exp10_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_exp10d4_u10(a);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_exp10_pd(a_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_exp10(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_exp10_pd
+  #define _mm256_exp10_pd(a) simde_mm256_exp10_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_exp10_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_exp10_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_exp10f16_u10(a);
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_mm256_exp10_ps(a_.m256[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_exp10f(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_exp10_ps
+  #define _mm512_exp10_ps(a) simde_mm512_exp10_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_exp10_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_exp10_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_exp10d8_u10(a);
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_exp10_pd(a_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_exp10(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_exp10_pd
+  #define _mm512_exp10_pd(a) simde_mm512_exp10_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_exp10_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_exp10_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_exp10_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_exp10_ps
+  #define _mm512_mask_exp10_ps(src, k, a) simde_mm512_mask_exp10_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_exp10_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_exp10_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_exp10_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_exp10_pd
+  #define _mm512_mask_exp10_pd(src, k, a) simde_mm512_mask_exp10_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cdfnorm_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_cdfnorm_ps(a);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    /* https://www.johndcook.com/blog/cpp_phi/ */
+    const simde__m128 a1 = simde_mm_set1_ps(SIMDE_FLOAT32_C( 0.254829592));
+    const simde__m128 a2 = simde_mm_set1_ps(SIMDE_FLOAT32_C(-0.284496736));
+    const simde__m128 a3 = simde_mm_set1_ps(SIMDE_FLOAT32_C(1.421413741));
+    const simde__m128 a4 = simde_mm_set1_ps(SIMDE_FLOAT32_C(-1.453152027));
+    const simde__m128 a5 = simde_mm_set1_ps(SIMDE_FLOAT32_C(1.061405429));
+    const simde__m128 p = simde_mm_set1_ps(SIMDE_FLOAT32_C(0.3275911));
+    const simde__m128 one = simde_mm_set1_ps(SIMDE_FLOAT32_C(1.0));
+
+    /* simde_math_fabsf(x) / sqrtf(2.0) */
+    const simde__m128 x = simde_mm_div_ps(simde_x_mm_abs_ps(a), simde_mm_sqrt_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C(2.0))));
+
+    /* 1.0 / (1.0 + p * x) */
+    const simde__m128 t = simde_mm_div_ps(one, simde_mm_add_ps(one, simde_mm_mul_ps(p, x)));
+
+    /* 1.0 - (((((a5 * t + a4) * t) + a3) * t + a2) * t + a1) * t * exp(-x * x) */
+    simde__m128 y = simde_mm_mul_ps(a5, t);
+    y = simde_mm_add_ps(y, a4);
+    y = simde_mm_mul_ps(y, t);
+    y = simde_mm_add_ps(y, a3);
+    y = simde_mm_mul_ps(y, t);
+    y = simde_mm_add_ps(y, a2);
+    y = simde_mm_mul_ps(y, t);
+    y = simde_mm_add_ps(y, a1);
+    y = simde_mm_mul_ps(y, t);
+    y = simde_mm_mul_ps(y, simde_mm_exp_ps(simde_mm_mul_ps(x, simde_x_mm_negate_ps(x))));
+    y = simde_mm_sub_ps(one, y);
+
+    /* 0.5 * (1.0 + ((a < 0.0) ? -y : y)) */
+    return simde_mm_mul_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C(0.5)), simde_mm_add_ps(one, simde_x_mm_xorsign_ps(y, a)));
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_cdfnormf(a_.f32[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cdfnorm_ps
+  #define _mm_cdfnorm_ps(a) simde_mm_cdfnorm_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cdfnorm_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_cdfnorm_pd(a);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    /* https://www.johndcook.com/blog/cpp_phi/ */
+    const simde__m128d a1 = simde_mm_set1_pd(SIMDE_FLOAT64_C( 0.254829592));
+    const simde__m128d a2 = simde_mm_set1_pd(SIMDE_FLOAT64_C(-0.284496736));
+    const simde__m128d a3 = simde_mm_set1_pd(SIMDE_FLOAT64_C(1.421413741));
+    const simde__m128d a4 = simde_mm_set1_pd(SIMDE_FLOAT64_C(-1.453152027));
+    const simde__m128d a5 = simde_mm_set1_pd(SIMDE_FLOAT64_C(1.061405429));
+    const simde__m128d p = simde_mm_set1_pd(SIMDE_FLOAT64_C(0.6475911));
+    const simde__m128d one = simde_mm_set1_pd(SIMDE_FLOAT64_C(1.0));
+
+    /* simde_math_fabs(x) / sqrt(2.0) */
+    const simde__m128d x = simde_mm_div_pd(simde_x_mm_abs_pd(a), simde_mm_sqrt_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C(2.0))));
+
+    /* 1.0 / (1.0 + p * x) */
+    const simde__m128d t = simde_mm_div_pd(one, simde_mm_add_pd(one, simde_mm_mul_pd(p, x)));
+
+    /* 1.0 - (((((a5 * t + a4) * t) + a3) * t + a2) * t + a1) * t * exp(-x * x) */
+    simde__m128d y = simde_mm_mul_pd(a5, t);
+    y = simde_mm_add_pd(y, a4);
+    y = simde_mm_mul_pd(y, t);
+    y = simde_mm_add_pd(y, a3);
+    y = simde_mm_mul_pd(y, t);
+    y = simde_mm_add_pd(y, a2);
+    y = simde_mm_mul_pd(y, t);
+    y = simde_mm_add_pd(y, a1);
+    y = simde_mm_mul_pd(y, t);
+    y = simde_mm_mul_pd(y, simde_mm_exp_pd(simde_mm_mul_pd(x, simde_x_mm_negate_pd(x))));
+    y = simde_mm_sub_pd(one, y);
+
+    /* 0.5 * (1.0 + ((a < 0.0) ? -y : y)) */
+    return simde_mm_mul_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C(0.5)), simde_mm_add_pd(one, simde_x_mm_xorsign_pd(y, a)));
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_cdfnorm(a_.f64[i]);
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cdfnorm_pd
+  #define _mm_cdfnorm_pd(a) simde_mm_cdfnorm_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_cdfnorm_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_cdfnorm_ps(a);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    /* https://www.johndcook.com/blog/cpp_phi/ */
+    const simde__m256 a1 = simde_mm256_set1_ps(SIMDE_FLOAT32_C( 0.254829592));
+    const simde__m256 a2 = simde_mm256_set1_ps(SIMDE_FLOAT32_C(-0.284496736));
+    const simde__m256 a3 = simde_mm256_set1_ps(SIMDE_FLOAT32_C(1.421413741));
+    const simde__m256 a4 = simde_mm256_set1_ps(SIMDE_FLOAT32_C(-1.453152027));
+    const simde__m256 a5 = simde_mm256_set1_ps(SIMDE_FLOAT32_C(1.061405429));
+    const simde__m256 p = simde_mm256_set1_ps(SIMDE_FLOAT32_C(0.3275911));
+    const simde__m256 one = simde_mm256_set1_ps(SIMDE_FLOAT32_C(1.0));
+
+    /* simde_math_fabsf(x) / sqrtf(2.0) */
+    const simde__m256 x = simde_mm256_div_ps(simde_x_mm256_abs_ps(a), simde_mm256_sqrt_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C(2.0))));
+
+    /* 1.0 / (1.0 + p * x) */
+    const simde__m256 t = simde_mm256_div_ps(one, simde_mm256_add_ps(one, simde_mm256_mul_ps(p, x)));
+
+    /* 1.0 - (((((a5 * t + a4) * t) + a3) * t + a2) * t + a1) * t * exp(-x * x) */
+    simde__m256 y = simde_mm256_mul_ps(a5, t);
+    y = simde_mm256_add_ps(y, a4);
+    y = simde_mm256_mul_ps(y, t);
+    y = simde_mm256_add_ps(y, a3);
+    y = simde_mm256_mul_ps(y, t);
+    y = simde_mm256_add_ps(y, a2);
+    y = simde_mm256_mul_ps(y, t);
+    y = simde_mm256_add_ps(y, a1);
+    y = simde_mm256_mul_ps(y, t);
+    y = simde_mm256_mul_ps(y, simde_mm256_exp_ps(simde_mm256_mul_ps(x, simde_x_mm256_negate_ps(x))));
+    y = simde_mm256_sub_ps(one, y);
+
+    /* 0.5 * (1.0 + ((a < 0.0) ? -y : y)) */
+    return simde_mm256_mul_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C(0.5)), simde_mm256_add_ps(one, simde_x_mm256_xorsign_ps(y, a)));
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_cdfnorm_ps(a_.m128[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_cdfnormf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cdfnorm_ps
+  #define _mm256_cdfnorm_ps(a) simde_mm256_cdfnorm_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_cdfnorm_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_cdfnorm_pd(a);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    /* https://www.johndcook.com/blog/cpp_phi/ */
+    const simde__m256d a1 = simde_mm256_set1_pd(SIMDE_FLOAT64_C( 0.254829592));
+    const simde__m256d a2 = simde_mm256_set1_pd(SIMDE_FLOAT64_C(-0.284496736));
+    const simde__m256d a3 = simde_mm256_set1_pd(SIMDE_FLOAT64_C(1.421413741));
+    const simde__m256d a4 = simde_mm256_set1_pd(SIMDE_FLOAT64_C(-1.453152027));
+    const simde__m256d a5 = simde_mm256_set1_pd(SIMDE_FLOAT64_C(1.061405429));
+    const simde__m256d p = simde_mm256_set1_pd(SIMDE_FLOAT64_C(0.6475911));
+    const simde__m256d one = simde_mm256_set1_pd(SIMDE_FLOAT64_C(1.0));
+
+    /* simde_math_fabs(x) / sqrt(2.0) */
+    const simde__m256d x = simde_mm256_div_pd(simde_x_mm256_abs_pd(a), simde_mm256_sqrt_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C(2.0))));
+
+    /* 1.0 / (1.0 + p * x) */
+    const simde__m256d t = simde_mm256_div_pd(one, simde_mm256_add_pd(one, simde_mm256_mul_pd(p, x)));
+
+    /* 1.0 - (((((a5 * t + a4) * t) + a3) * t + a2) * t + a1) * t * exp(-x * x) */
+    simde__m256d y = simde_mm256_mul_pd(a5, t);
+    y = simde_mm256_add_pd(y, a4);
+    y = simde_mm256_mul_pd(y, t);
+    y = simde_mm256_add_pd(y, a3);
+    y = simde_mm256_mul_pd(y, t);
+    y = simde_mm256_add_pd(y, a2);
+    y = simde_mm256_mul_pd(y, t);
+    y = simde_mm256_add_pd(y, a1);
+    y = simde_mm256_mul_pd(y, t);
+    y = simde_mm256_mul_pd(y, simde_mm256_exp_pd(simde_mm256_mul_pd(x, simde_x_mm256_negate_pd(x))));
+    y = simde_mm256_sub_pd(one, y);
+
+    /* 0.5 * (1.0 + ((a < 0.0) ? -y : y)) */
+    return simde_mm256_mul_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C(0.5)), simde_mm256_add_pd(one, simde_x_mm256_xorsign_pd(y, a)));
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_cdfnorm_pd(a_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_cdfnorm(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cdfnorm_pd
+  #define _mm256_cdfnorm_pd(a) simde_mm256_cdfnorm_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_cdfnorm_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_cdfnorm_ps(a);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    /* https://www.johndcook.com/blog/cpp_phi/ */
+    const simde__m512 a1 = simde_mm512_set1_ps(SIMDE_FLOAT32_C( 0.254829592));
+    const simde__m512 a2 = simde_mm512_set1_ps(SIMDE_FLOAT32_C(-0.284496736));
+    const simde__m512 a3 = simde_mm512_set1_ps(SIMDE_FLOAT32_C(1.421413741));
+    const simde__m512 a4 = simde_mm512_set1_ps(SIMDE_FLOAT32_C(-1.453152027));
+    const simde__m512 a5 = simde_mm512_set1_ps(SIMDE_FLOAT32_C(1.061405429));
+    const simde__m512 p = simde_mm512_set1_ps(SIMDE_FLOAT32_C(0.3275911));
+    const simde__m512 one = simde_mm512_set1_ps(SIMDE_FLOAT32_C(1.0));
+
+    /* simde_math_fabsf(x) / sqrtf(2.0) */
+    const simde__m512 x = simde_mm512_div_ps(simde_mm512_abs_ps(a), simde_mm512_sqrt_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C(2.0))));
+
+    /* 1.0 / (1.0 + p * x) */
+    const simde__m512 t = simde_mm512_div_ps(one, simde_mm512_add_ps(one, simde_mm512_mul_ps(p, x)));
+
+    /* 1.0 - (((((a5 * t + a4) * t) + a3) * t + a2) * t + a1) * t * exp(-x * x) */
+    simde__m512 y = simde_mm512_mul_ps(a5, t);
+    y = simde_mm512_add_ps(y, a4);
+    y = simde_mm512_mul_ps(y, t);
+    y = simde_mm512_add_ps(y, a3);
+    y = simde_mm512_mul_ps(y, t);
+    y = simde_mm512_add_ps(y, a2);
+    y = simde_mm512_mul_ps(y, t);
+    y = simde_mm512_add_ps(y, a1);
+    y = simde_mm512_mul_ps(y, t);
+    y = simde_mm512_mul_ps(y, simde_mm512_exp_ps(simde_mm512_mul_ps(x, simde_x_mm512_negate_ps(x))));
+    y = simde_mm512_sub_ps(one, y);
+
+    /* 0.5 * (1.0 + ((a < 0.0) ? -y : y)) */
+    return simde_mm512_mul_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C(0.5)), simde_mm512_add_ps(one, simde_x_mm512_xorsign_ps(y, a)));
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_mm256_cdfnorm_ps(a_.m256[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_cdfnormf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_cdfnorm_ps
+  #define _mm512_cdfnorm_ps(a) simde_mm512_cdfnorm_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_cdfnorm_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_cdfnorm_pd(a);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    /* https://www.johndcook.com/blog/cpp_phi/ */
+    const simde__m512d a1 = simde_mm512_set1_pd(SIMDE_FLOAT64_C( 0.254829592));
+    const simde__m512d a2 = simde_mm512_set1_pd(SIMDE_FLOAT64_C(-0.284496736));
+    const simde__m512d a3 = simde_mm512_set1_pd(SIMDE_FLOAT64_C(1.421413741));
+    const simde__m512d a4 = simde_mm512_set1_pd(SIMDE_FLOAT64_C(-1.453152027));
+    const simde__m512d a5 = simde_mm512_set1_pd(SIMDE_FLOAT64_C(1.061405429));
+    const simde__m512d p = simde_mm512_set1_pd(SIMDE_FLOAT64_C(0.6475911));
+    const simde__m512d one = simde_mm512_set1_pd(SIMDE_FLOAT64_C(1.0));
+
+    /* simde_math_fabs(x) / sqrt(2.0) */
+    const simde__m512d x = simde_mm512_div_pd(simde_mm512_abs_pd(a), simde_mm512_sqrt_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C(2.0))));
+
+    /* 1.0 / (1.0 + p * x) */
+    const simde__m512d t = simde_mm512_div_pd(one, simde_mm512_add_pd(one, simde_mm512_mul_pd(p, x)));
+
+    /* 1.0 - (((((a5 * t + a4) * t) + a3) * t + a2) * t + a1) * t * exp(-x * x) */
+    simde__m512d y = simde_mm512_mul_pd(a5, t);
+    y = simde_mm512_add_pd(y, a4);
+    y = simde_mm512_mul_pd(y, t);
+    y = simde_mm512_add_pd(y, a3);
+    y = simde_mm512_mul_pd(y, t);
+    y = simde_mm512_add_pd(y, a2);
+    y = simde_mm512_mul_pd(y, t);
+    y = simde_mm512_add_pd(y, a1);
+    y = simde_mm512_mul_pd(y, t);
+    y = simde_mm512_mul_pd(y, simde_mm512_exp_pd(simde_mm512_mul_pd(x, simde_x_mm512_negate_pd(x))));
+    y = simde_mm512_sub_pd(one, y);
+
+    /* 0.5 * (1.0 + ((a < 0.0) ? -y : y)) */
+    return simde_mm512_mul_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C(0.5)), simde_mm512_add_pd(one, simde_x_mm512_xorsign_pd(y, a)));
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_cdfnorm_pd(a_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_cdfnorm(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_cdfnorm_pd
+  #define _mm512_cdfnorm_pd(a) simde_mm512_cdfnorm_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_cdfnorm_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_cdfnorm_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_cdfnorm_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_cdfnorm_ps
+  #define _mm512_mask_cdfnorm_ps(src, k, a) simde_mm512_mask_cdfnorm_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_cdfnorm_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_cdfnorm_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_cdfnorm_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_cdfnorm_pd
+  #define _mm512_mask_cdfnorm_pd(src, k, a) simde_mm512_mask_cdfnorm_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_idivrem_epi32 (simde__m128i* mem_addr, simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_idivrem_epi32(HEDLEY_REINTERPRET_CAST(__m128i*, mem_addr), a, b);
+  #else
+    simde__m128i r;
+
+    r = simde_mm_div_epi32(a, b);
+    *mem_addr = simde_mm_sub_epi32(a, simde_mm_mullo_epi32(r, b));
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_idivrem_epi32
+  #define _mm_idivrem_epi32(mem_addr, a, b) simde_mm_idivrem_epi32((mem_addr),(a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_idivrem_epi32 (simde__m256i* mem_addr, simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_idivrem_epi32(HEDLEY_REINTERPRET_CAST(__m256i*, mem_addr), a, b);
+  #else
+    simde__m256i r;
+
+    r = simde_mm256_div_epi32(a, b);
+    *mem_addr = simde_mm256_sub_epi32(a, simde_mm256_mullo_epi32(r, b));
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_idivrem_epi32
+  #define _mm256_idivrem_epi32(mem_addr, a, b) simde_mm256_idivrem_epi32((mem_addr),(a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_hypot_ps (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_hypot_ps(a, b);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_hypotf4_u05(a, b);
+    #else
+      return Sleef_hypotf4_u35(a, b);
+    #endif
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_hypotf(a_.f32[i], b_.f32[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_hypot_ps
+  #define _mm_hypot_ps(a, b) simde_mm_hypot_ps(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_hypot_pd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_hypot_pd(a, b);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_hypotd2_u05(a, b);
+    #else
+      return Sleef_hypotd2_u35(a, b);
+    #endif
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_hypot(a_.f64[i], b_.f64[i]);
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_hypot_pd
+  #define _mm_hypot_pd(a, b) simde_mm_hypot_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_hypot_ps (simde__m256 a, simde__m256 b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_hypot_ps(a, b);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_hypotf8_u05(a, b);
+    #else
+      return Sleef_hypotf8_u35(a, b);
+    #endif
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a),
+      b_ = simde__m256_to_private(b);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_hypot_ps(a_.m128[i], b_.m128[i]);
+    }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_hypotf(a_.f32[i], b_.f32[i]);
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_hypot_ps
+  #define _mm256_hypot_ps(a, b) simde_mm256_hypot_ps(a, b)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_hypot_pd (simde__m256d a, simde__m256d b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_hypot_pd(a, b);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_hypotd4_u05(a, b);
+    #else
+      return Sleef_hypotd4_u35(a, b);
+    #endif
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a),
+      b_ = simde__m256d_to_private(b);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_hypot_pd(a_.m128d[i], b_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_hypot(a_.f64[i], b_.f64[i]);
+      }
+  #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_hypot_pd
+  #define _mm256_hypot_pd(a, b) simde_mm256_hypot_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_hypot_ps (simde__m512 a, simde__m512 b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_hypot_ps(a, b);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_hypotf16_u05(a, b);
+    #else
+      return Sleef_hypotf16_u35(a, b);
+    #endif
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a),
+      b_ = simde__m512_to_private(b);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_mm256_hypot_ps(a_.m256[i], b_.m256[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_hypotf(a_.f32[i], b_.f32[i]);
+      }
+    #endif
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_hypot_ps
+  #define _mm512_hypot_ps(a, b) simde_mm512_hypot_ps(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_hypot_pd (simde__m512d a, simde__m512d b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_hypot_pd(a, b);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_hypotd8_u05(a, b);
+    #else
+      return Sleef_hypotd8_u35(a, b);
+    #endif
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a),
+      b_ = simde__m512d_to_private(b);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_hypot_pd(a_.m256d[i], b_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_hypot(a_.f64[i], b_.f64[i]);
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_hypot_pd
+  #define _mm512_hypot_pd(a, b) simde_mm512_hypot_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_hypot_ps(simde__m512 src, simde__mmask16 k, simde__m512 a, simde__m512 b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_hypot_ps(src, k, a, b);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_hypot_ps(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_hypot_ps
+  #define _mm512_mask_hypot_ps(src, k, a, b) simde_mm512_mask_hypot_ps(src, k, a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_hypot_pd(simde__m512d src, simde__mmask8 k, simde__m512d a, simde__m512d b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_hypot_pd(src, k, a, b);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_hypot_pd(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_hypot_pd
+  #define _mm512_mask_hypot_pd(src, k, a, b) simde_mm512_mask_hypot_pd(src, k, a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_invcbrt_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_invcbrt_ps(a);
+  #else
+    return simde_mm_rcp_ps(simde_mm_cbrt_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_invcbrt_ps
+  #define _mm_invcbrt_ps(a) simde_mm_invcbrt_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_invcbrt_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_invcbrt_pd(a);
+  #else
+    return simde_mm_div_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C(1.0)), simde_mm_cbrt_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_invcbrt_pd
+  #define _mm_invcbrt_pd(a) simde_mm_invcbrt_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_invcbrt_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_invcbrt_ps(a);
+  #else
+    return simde_mm256_rcp_ps(simde_mm256_cbrt_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_invcbrt_ps
+  #define _mm256_invcbrt_ps(a) simde_mm256_invcbrt_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_invcbrt_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_invcbrt_pd(a);
+  #else
+    return simde_mm256_div_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C(1.0)), simde_mm256_cbrt_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_invcbrt_pd
+  #define _mm256_invcbrt_pd(a) simde_mm256_invcbrt_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_invsqrt_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_invsqrt_ps(a);
+  #else
+    return simde_mm_rcp_ps(simde_mm_sqrt_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_invsqrt_ps
+  #define _mm_invsqrt_ps(a) simde_mm_invsqrt_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_invsqrt_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_invsqrt_pd(a);
+  #else
+    return simde_mm_div_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C(1.0)), simde_mm_sqrt_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_invsqrt_pd
+  #define _mm_invsqrt_pd(a) simde_mm_invsqrt_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_invsqrt_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_invsqrt_ps(a);
+  #else
+    return simde_mm256_rcp_ps(simde_mm256_sqrt_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_invsqrt_ps
+  #define _mm256_invsqrt_ps(a) simde_mm256_invsqrt_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_invsqrt_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_invsqrt_pd(a);
+  #else
+    return simde_mm256_div_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C(1.0)), simde_mm256_sqrt_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_invsqrt_pd
+  #define _mm256_invsqrt_pd(a) simde_mm256_invsqrt_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_invsqrt_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_invsqrt_ps(a);
+  #else
+    return simde_mm512_div_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C(1.0)), simde_mm512_sqrt_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_invsqrt_ps
+  #define _mm512_invsqrt_ps(a) simde_mm512_invsqrt_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_invsqrt_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_invsqrt_pd(a);
+  #else
+    return simde_mm512_div_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C(1.0)), simde_mm512_sqrt_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_invsqrt_pd
+  #define _mm512_invsqrt_pd(a) simde_mm512_invsqrt_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_invsqrt_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_invsqrt_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_invsqrt_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_invsqrt_ps
+  #define _mm512_mask_invsqrt_ps(src, k, a) simde_mm512_mask_invsqrt_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_invsqrt_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_invsqrt_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_invsqrt_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_invsqrt_pd
+  #define _mm512_mask_invsqrt_pd(src, k, a) simde_mm512_mask_invsqrt_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_log_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_log_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_logf4_u10(a);
+    #else
+      return Sleef_logf4_u35(a);
+    #endif
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_logf(a_.f32[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_log_ps
+  #define _mm_log_ps(a) simde_mm_log_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_log_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_log_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_logd2_u10(a);
+    #else
+      return Sleef_logd2_u35(a);
+    #endif
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_log(a_.f64[i]);
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_log_pd
+  #define _mm_log_pd(a) simde_mm_log_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_log_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_log_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_logf8_u10(a);
+    #else
+      return Sleef_logf8_u35(a);
+    #endif
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_log_ps(a_.m128[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_logf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_log_ps
+  #define _mm256_log_ps(a) simde_mm256_log_ps(a)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_log_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_log_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_logd4_u10(a);
+    #else
+      return Sleef_logd4_u35(a);
+    #endif
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_log_pd(a_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_log(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_log_pd
+  #define _mm256_log_pd(a) simde_mm256_log_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_log_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_log_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_logf16_u10(a);
+    #else
+      return Sleef_logf16_u35(a);
+    #endif
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_mm256_log_ps(a_.m256[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_logf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_log_ps
+  #define _mm512_log_ps(a) simde_mm512_log_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_log_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_log_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_logd8_u10(a);
+    #else
+      return Sleef_logd8_u35(a);
+    #endif
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_log_pd(a_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_log(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_log_pd
+  #define _mm512_log_pd(a) simde_mm512_log_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_log_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_log_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_log_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_log_ps
+  #define _mm512_mask_log_ps(src, k, a) simde_mm512_mask_log_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_log_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_log_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_log_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_log_pd
+  #define _mm512_mask_log_pd(src, k, a) simde_mm512_mask_log_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_cdfnorminv_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_cdfnorminv_ps(a);
+  #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128)
+    simde__m128 matched, retval = simde_mm_setzero_ps();
+
+    { /* if (a < 0 || a > 1) */
+      matched = simde_mm_or_ps(simde_mm_cmplt_ps(a, simde_mm_set1_ps(SIMDE_FLOAT32_C(0.0))), simde_mm_cmpgt_ps(a, simde_mm_set1_ps(SIMDE_FLOAT32_C(1.0))));
+
+      /* We don't actually need to do anything here since we initialize
+       * retval to 0.0. */
+    }
+
+    { /* else if (a == 0) */
+      simde__m128 mask = simde_mm_cmpeq_ps(a, simde_mm_set1_ps(SIMDE_FLOAT32_C(0.0)));
+      mask = simde_mm_andnot_ps(matched, mask);
+      matched = simde_mm_or_ps(matched, mask);
+
+      simde__m128 res = simde_mm_set1_ps(-SIMDE_MATH_INFINITYF);
+
+      retval = simde_mm_or_ps(retval, simde_mm_and_ps(mask, res));
+    }
+
+    { /* else if (a == 1) */
+      simde__m128 mask = simde_mm_cmpeq_ps(a, simde_mm_set1_ps(SIMDE_FLOAT32_C(1.0)));
+      mask = simde_mm_andnot_ps(matched, mask);
+      matched = simde_mm_or_ps(matched, mask);
+
+      simde__m128 res = simde_mm_set1_ps(SIMDE_MATH_INFINITYF);
+
+      retval = simde_mm_or_ps(retval, simde_mm_and_ps(mask, res));
+    }
+
+    { /* Remaining conditions.
+       *
+       * Including the else case in this complicates things a lot, but
+       * we're using cheap operations to get rid of expensive multiply
+       * and add functions.  This should be a small improvement on SSE
+       * prior to 4.1.  On SSE 4.1 we can use _mm_blendv_ps which is
+       * very fast and this becomes a huge win.  NEON, AltiVec, and
+       * WASM also have blend operations, so this should be a big win
+       * there, too. */
+
+      /* else if (a < 0.02425) */
+      simde__m128 mask_lo = simde_mm_cmplt_ps(a, simde_mm_set1_ps(SIMDE_FLOAT32_C(0.02425)));
+      /* else if (a > 0.97575) */
+      simde__m128 mask_hi = simde_mm_cmpgt_ps(a, simde_mm_set1_ps(SIMDE_FLOAT32_C(0.97575)));
+
+      simde__m128 mask = simde_mm_or_ps(mask_lo, mask_hi);
+      matched = simde_mm_or_ps(matched, mask);
+
+      /* else */
+      simde__m128 mask_el = simde_x_mm_not_ps(matched);
+      mask = simde_mm_or_ps(mask, mask_el);
+
+      /* r = a - 0.5f */
+      simde__m128 r = simde_mm_sub_ps(a, simde_mm_set1_ps(SIMDE_FLOAT32_C(0.5)));
+
+      /* lo: q = a
+       * hi: q = (1.0 - a) */
+      simde__m128 q = simde_mm_and_ps(mask_lo, a);
+      q = simde_mm_or_ps(q, simde_mm_and_ps(mask_hi, simde_mm_sub_ps(simde_mm_set1_ps(1.0f), a)));
+
+      /* q = simde_math_sqrtf(-2.0f * simde_math_logf(q)) */
+      q = simde_mm_log_ps(q);
+      q = simde_mm_mul_ps(q, simde_mm_set1_ps(SIMDE_FLOAT32_C(-2.0)));
+      q = simde_mm_sqrt_ps(q);
+
+      /* el: q = r * r */
+      q = simde_x_mm_select_ps(q, simde_mm_mul_ps(r, r), mask_el);
+
+      /* lo: float numerator = ((((((c_c[0] * q + c_c[1]) * q + c_c[2]) * q + c_c[3]) * q + c_c[4]) * q + c_c[5]) *  1.0f); */
+      /* hi: float numerator = ((((((c_c[0] * q + c_c[1]) * q + c_c[2]) * q + c_c[3]) * q + c_c[4]) * q + c_c[5]) * -1.0f); */
+      /* el: float numerator = ((((((c_a[0] * q + c_a[1]) * q + c_a[2]) * q + c_a[3]) * q + c_a[4]) * q + c_a[5]) *  r); */
+      simde__m128 numerator = simde_x_mm_select_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C(-7.784894002430293e-03)), simde_mm_set1_ps(SIMDE_FLOAT32_C(-3.969683028665376e+01)), mask_el);
+      numerator = simde_mm_fmadd_ps(numerator, q, simde_x_mm_select_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C(-3.223964580411365e-01)), simde_mm_set1_ps(SIMDE_FLOAT32_C( 2.209460984245205e+02)), mask_el));
+      numerator = simde_mm_fmadd_ps(numerator, q, simde_x_mm_select_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C(-2.400758277161838e+00)), simde_mm_set1_ps(SIMDE_FLOAT32_C(-2.759285104469687e+02)), mask_el));
+      numerator = simde_mm_fmadd_ps(numerator, q, simde_x_mm_select_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C(-2.549732539343734e+00)), simde_mm_set1_ps(SIMDE_FLOAT32_C( 1.383577518672690e+02)), mask_el));
+      numerator = simde_mm_fmadd_ps(numerator, q, simde_x_mm_select_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C( 4.374664141464968e+00)), simde_mm_set1_ps(SIMDE_FLOAT32_C(-3.066479806614716e+01)), mask_el));
+      numerator = simde_mm_fmadd_ps(numerator, q, simde_x_mm_select_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C( 2.938163982698783e+00)), simde_mm_set1_ps(SIMDE_FLOAT32_C( 2.506628277459239e+00)), mask_el));
+      {
+        simde__m128 multiplier;
+        multiplier =                            simde_mm_and_ps(mask_lo, simde_mm_set1_ps(SIMDE_FLOAT32_C( 1.0)));
+        multiplier = simde_mm_or_ps(multiplier, simde_mm_and_ps(mask_hi, simde_mm_set1_ps(SIMDE_FLOAT32_C(-1.0))));
+        multiplier = simde_mm_or_ps(multiplier, simde_mm_and_ps(mask_el, r));
+        numerator = simde_mm_mul_ps(numerator, multiplier);
+      }
+
+      /* lo/hi: float denominator = (((((c_d[0] * q + c_d[1]) * q + c_d[2]) * q + c_d[3]) * 1 +   0.0f) * q + 1); */
+      /*    el: float denominator = (((((c_b[0] * q + c_b[1]) * q + c_b[2]) * q + c_b[3]) * q + c_b[4]) * q + 1); */
+      simde__m128 denominator = simde_x_mm_select_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C( 7.784695709041462e-03)), simde_mm_set1_ps(SIMDE_FLOAT32_C(-5.447609879822406e+01)), mask_el);
+      denominator = simde_mm_fmadd_ps(denominator, q, simde_x_mm_select_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C( 3.224671290700398e-01)), simde_mm_set1_ps(SIMDE_FLOAT32_C( 1.615858368580409e+02)), mask_el));
+      denominator = simde_mm_fmadd_ps(denominator, q, simde_x_mm_select_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C( 2.445134137142996e+00)), simde_mm_set1_ps(SIMDE_FLOAT32_C(-1.556989798598866e+02)), mask_el));
+      denominator = simde_mm_fmadd_ps(denominator, q, simde_x_mm_select_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C( 3.754408661907416e+00)), simde_mm_set1_ps(SIMDE_FLOAT32_C( 6.680131188771972e+01)), mask_el));
+      denominator = simde_mm_fmadd_ps(denominator, simde_x_mm_select_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C( 1.0)), q, mask_el),
+                                                   simde_x_mm_select_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C( 0.0)), simde_mm_set1_ps(SIMDE_FLOAT32_C(-1.328068155288572e+01)), mask_el));
+      denominator = simde_mm_fmadd_ps(denominator, q, simde_mm_set1_ps(SIMDE_FLOAT32_C(1.0)));
+
+      /* res = numerator / denominator; */
+      simde__m128 res = simde_mm_div_ps(numerator, denominator);
+
+      retval = simde_mm_or_ps(retval, simde_mm_and_ps(mask, res));
+    }
+
+    return retval;
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_cdfnorminvf(a_.f32[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cdfnorminv_ps
+  #define _mm_cdfnorminv_ps(a) simde_mm_cdfnorminv_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_cdfnorminv_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_cdfnorminv_pd(a);
+   #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128)
+    simde__m128d matched, retval = simde_mm_setzero_pd();
+
+    { /* if (a < 0 || a > 1) */
+      matched = simde_mm_or_pd(simde_mm_cmplt_pd(a, simde_mm_set1_pd(SIMDE_FLOAT64_C(0.0))), simde_mm_cmpgt_pd(a, simde_mm_set1_pd(SIMDE_FLOAT64_C(1.0))));
+
+      /* We don't actually need to do anything here since we initialize
+       * retval to 0.0. */
+    }
+
+    { /* else if (a == 0) */
+      simde__m128d mask = simde_mm_cmpeq_pd(a, simde_mm_set1_pd(SIMDE_FLOAT64_C(0.0)));
+      mask = simde_mm_andnot_pd(matched, mask);
+      matched = simde_mm_or_pd(matched, mask);
+
+      simde__m128d res = simde_mm_set1_pd(-SIMDE_MATH_INFINITY);
+
+      retval = simde_mm_or_pd(retval, simde_mm_and_pd(mask, res));
+    }
+
+    { /* else if (a == 1) */
+      simde__m128d mask = simde_mm_cmpeq_pd(a, simde_mm_set1_pd(SIMDE_FLOAT64_C(1.0)));
+      mask = simde_mm_andnot_pd(matched, mask);
+      matched = simde_mm_or_pd(matched, mask);
+
+      simde__m128d res = simde_mm_set1_pd(SIMDE_MATH_INFINITY);
+
+      retval = simde_mm_or_pd(retval, simde_mm_and_pd(mask, res));
+    }
+
+    { /* Remaining conditions.
+       *
+       * Including the else case in this complicates things a lot, but
+       * we're using cheap operations to get rid of expensive multiply
+       * and add functions.  This should be a small improvement on SSE
+       * prior to 4.1.  On SSE 4.1 we can use _mm_blendv_pd which is
+       * very fast and this becomes a huge win.  NEON, AltiVec, and
+       * WASM also have blend operations, so this should be a big win
+       * there, too. */
+
+      /* else if (a < 0.02425) */
+      simde__m128d mask_lo = simde_mm_cmplt_pd(a, simde_mm_set1_pd(SIMDE_FLOAT64_C(0.02425)));
+      /* else if (a > 0.97575) */
+      simde__m128d mask_hi = simde_mm_cmpgt_pd(a, simde_mm_set1_pd(SIMDE_FLOAT64_C(0.97575)));
+
+      simde__m128d mask = simde_mm_or_pd(mask_lo, mask_hi);
+      matched = simde_mm_or_pd(matched, mask);
+
+      /* else */
+      simde__m128d mask_el = simde_x_mm_not_pd(matched);
+      mask = simde_mm_or_pd(mask, mask_el);
+
+      /* r = a - 0.5 */
+      simde__m128d r = simde_mm_sub_pd(a, simde_mm_set1_pd(SIMDE_FLOAT64_C(0.5)));
+
+      /* lo: q = a
+       * hi: q = (1.0 - a) */
+      simde__m128d q = simde_mm_and_pd(mask_lo, a);
+      q = simde_mm_or_pd(q, simde_mm_and_pd(mask_hi, simde_mm_sub_pd(simde_mm_set1_pd(1.0), a)));
+
+      /* q = simde_math_sqrt(-2.0 * simde_math_log(q)) */
+      q = simde_mm_log_pd(q);
+      q = simde_mm_mul_pd(q, simde_mm_set1_pd(SIMDE_FLOAT64_C(-2.0)));
+      q = simde_mm_sqrt_pd(q);
+
+      /* el: q = r * r */
+      q = simde_x_mm_select_pd(q, simde_mm_mul_pd(r, r), mask_el);
+
+      /* lo: double numerator = ((((((c_c[0] * q + c_c[1]) * q + c_c[2]) * q + c_c[3]) * q + c_c[4]) * q + c_c[5]) *  1.0); */
+      /* hi: double numerator = ((((((c_c[0] * q + c_c[1]) * q + c_c[2]) * q + c_c[3]) * q + c_c[4]) * q + c_c[5]) * -1.0); */
+      /* el: double numerator = ((((((c_a[0] * q + c_a[1]) * q + c_a[2]) * q + c_a[3]) * q + c_a[4]) * q + c_a[5]) *  r); */
+      simde__m128d numerator = simde_x_mm_select_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C(-7.784894002430293e-03)), simde_mm_set1_pd(SIMDE_FLOAT64_C(-3.969683028665376e+01)), mask_el);
+      numerator = simde_mm_fmadd_pd(numerator, q, simde_x_mm_select_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C(-3.223964580411365e-01)), simde_mm_set1_pd(SIMDE_FLOAT64_C( 2.209460984245205e+02)), mask_el));
+      numerator = simde_mm_fmadd_pd(numerator, q, simde_x_mm_select_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C(-2.400758277161838e+00)), simde_mm_set1_pd(SIMDE_FLOAT64_C(-2.759285104469687e+02)), mask_el));
+      numerator = simde_mm_fmadd_pd(numerator, q, simde_x_mm_select_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C(-2.549732539343734e+00)), simde_mm_set1_pd(SIMDE_FLOAT64_C( 1.383577518672690e+02)), mask_el));
+      numerator = simde_mm_fmadd_pd(numerator, q, simde_x_mm_select_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C( 4.374664141464968e+00)), simde_mm_set1_pd(SIMDE_FLOAT64_C(-3.066479806614716e+01)), mask_el));
+      numerator = simde_mm_fmadd_pd(numerator, q, simde_x_mm_select_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C( 2.938163982698783e+00)), simde_mm_set1_pd(SIMDE_FLOAT64_C( 2.506628277459239e+00)), mask_el));
+      {
+        simde__m128d multiplier;
+        multiplier =                            simde_mm_and_pd(mask_lo, simde_mm_set1_pd(SIMDE_FLOAT64_C( 1.0)));
+        multiplier = simde_mm_or_pd(multiplier, simde_mm_and_pd(mask_hi, simde_mm_set1_pd(SIMDE_FLOAT64_C(-1.0))));
+        multiplier = simde_mm_or_pd(multiplier, simde_mm_and_pd(mask_el, r));
+        numerator = simde_mm_mul_pd(numerator, multiplier);
+      }
+
+      /* lo/hi: double denominator = (((((c_d[0] * q + c_d[1]) * q + c_d[2]) * q + c_d[3]) * 1 +   0.0f) * q + 1); */
+      /*    el: double denominator = (((((c_b[0] * q + c_b[1]) * q + c_b[2]) * q + c_b[3]) * q + c_b[4]) * q + 1); */
+      simde__m128d denominator = simde_x_mm_select_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C( 7.784695709041462e-03)), simde_mm_set1_pd(SIMDE_FLOAT64_C(-5.447609879822406e+01)), mask_el);
+      denominator = simde_mm_fmadd_pd(denominator, q, simde_x_mm_select_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C( 3.224671290700398e-01)), simde_mm_set1_pd(SIMDE_FLOAT64_C( 1.615858368580409e+02)), mask_el));
+      denominator = simde_mm_fmadd_pd(denominator, q, simde_x_mm_select_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C( 2.445134137142996e+00)), simde_mm_set1_pd(SIMDE_FLOAT64_C(-1.556989798598866e+02)), mask_el));
+      denominator = simde_mm_fmadd_pd(denominator, q, simde_x_mm_select_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C( 3.754408661907416e+00)), simde_mm_set1_pd(SIMDE_FLOAT64_C( 6.680131188771972e+01)), mask_el));
+      denominator = simde_mm_fmadd_pd(denominator, simde_x_mm_select_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C( 1.0)), q, mask_el),
+                                                   simde_x_mm_select_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C( 0.0)), simde_mm_set1_pd(SIMDE_FLOAT64_C(-1.328068155288572e+01)), mask_el));
+      denominator = simde_mm_fmadd_pd(denominator, q, simde_mm_set1_pd(SIMDE_FLOAT64_C(1.0)));
+
+      /* res = numerator / denominator; */
+      simde__m128d res = simde_mm_div_pd(numerator, denominator);
+
+      retval = simde_mm_or_pd(retval, simde_mm_and_pd(mask, res));
+    }
+
+    return retval;
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_cdfnorminv(a_.f64[i]);
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_cdfnorminv_pd
+  #define _mm_cdfnorminv_pd(a) simde_mm_cdfnorminv_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_cdfnorminv_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_cdfnorminv_ps(a);
+  #elif SIMDE_NATURAL_VECTOR_SIZE_GE(256)
+    simde__m256 matched, retval = simde_mm256_setzero_ps();
+
+    { /* if (a < 0 || a > 1) */
+      matched = simde_mm256_or_ps(simde_mm256_cmp_ps(a, simde_mm256_set1_ps(SIMDE_FLOAT32_C(0.0)), SIMDE_CMP_LT_OQ), simde_mm256_cmp_ps(a, simde_mm256_set1_ps(SIMDE_FLOAT32_C(1.0)), SIMDE_CMP_GT_OQ));
+
+      /* We don't actually need to do anything here since we initialize
+       * retval to 0.0. */
+    }
+
+    { /* else if (a == 0) */
+      simde__m256 mask = simde_mm256_cmp_ps(a, simde_mm256_set1_ps(SIMDE_FLOAT32_C(0.0)), SIMDE_CMP_EQ_OQ);
+      mask = simde_mm256_andnot_ps(matched, mask);
+      matched = simde_mm256_or_ps(matched, mask);
+
+      simde__m256 res = simde_mm256_set1_ps(-SIMDE_MATH_INFINITYF);
+
+      retval = simde_mm256_or_ps(retval, simde_mm256_and_ps(mask, res));
+    }
+
+    { /* else if (a == 1) */
+      simde__m256 mask = simde_mm256_cmp_ps(a, simde_mm256_set1_ps(SIMDE_FLOAT32_C(1.0)), SIMDE_CMP_EQ_OQ);
+      mask = simde_mm256_andnot_ps(matched, mask);
+      matched = simde_mm256_or_ps(matched, mask);
+
+      simde__m256 res = simde_mm256_set1_ps(SIMDE_MATH_INFINITYF);
+
+      retval = simde_mm256_or_ps(retval, simde_mm256_and_ps(mask, res));
+    }
+
+    { /* Remaining conditions.
+       *
+       * Including the else case in this complicates things a lot, but
+       * we're using cheap operations to get rid of expensive multiply
+       * and add functions.  This should be a small improvement on SSE
+       * prior to 4.1.  On SSE 4.1 we can use _mm256_blendv_ps which is
+       * very fast and this becomes a huge win.  NEON, AltiVec, and
+       * WASM also have blend operations, so this should be a big win
+       * there, too. */
+
+      /* else if (a < 0.02425) */
+      simde__m256 mask_lo = simde_mm256_cmp_ps(a, simde_mm256_set1_ps(SIMDE_FLOAT32_C(0.02425)), SIMDE_CMP_LT_OQ);
+      /* else if (a > 0.97575) */
+      simde__m256 mask_hi = simde_mm256_cmp_ps(a, simde_mm256_set1_ps(SIMDE_FLOAT32_C(0.97575)), SIMDE_CMP_GT_OQ);
+
+      simde__m256 mask = simde_mm256_or_ps(mask_lo, mask_hi);
+      matched = simde_mm256_or_ps(matched, mask);
+
+      /* else */
+      simde__m256 mask_el = simde_x_mm256_not_ps(matched);
+      mask = simde_mm256_or_ps(mask, mask_el);
+
+      /* r = a - 0.5f */
+      simde__m256 r = simde_mm256_sub_ps(a, simde_mm256_set1_ps(SIMDE_FLOAT32_C(0.5)));
+
+      /* lo: q = a
+       * hi: q = (1.0 - a) */
+      simde__m256 q = simde_mm256_and_ps(mask_lo, a);
+      q = simde_mm256_or_ps(q, simde_mm256_and_ps(mask_hi, simde_mm256_sub_ps(simde_mm256_set1_ps(1.0f), a)));
+
+      /* q = simde_math_sqrtf(-2.0f * simde_math_logf(q)) */
+      q = simde_mm256_log_ps(q);
+      q = simde_mm256_mul_ps(q, simde_mm256_set1_ps(SIMDE_FLOAT32_C(-2.0)));
+      q = simde_mm256_sqrt_ps(q);
+
+      /* el: q = r * r */
+      q = simde_x_mm256_select_ps(q, simde_mm256_mul_ps(r, r), mask_el);
+
+      /* lo: float numerator = ((((((c_c[0] * q + c_c[1]) * q + c_c[2]) * q + c_c[3]) * q + c_c[4]) * q + c_c[5]) *  1.0f); */
+      /* hi: float numerator = ((((((c_c[0] * q + c_c[1]) * q + c_c[2]) * q + c_c[3]) * q + c_c[4]) * q + c_c[5]) * -1.0f); */
+      /* el: float numerator = ((((((c_a[0] * q + c_a[1]) * q + c_a[2]) * q + c_a[3]) * q + c_a[4]) * q + c_a[5]) *  r); */
+      simde__m256 numerator = simde_x_mm256_select_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C(-7.784894002430293e-03)), simde_mm256_set1_ps(SIMDE_FLOAT32_C(-3.969683028665376e+01)), mask_el);
+      numerator = simde_mm256_fmadd_ps(numerator, q, simde_x_mm256_select_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C(-3.223964580411365e-01)), simde_mm256_set1_ps(SIMDE_FLOAT32_C( 2.209460984245205e+02)), mask_el));
+      numerator = simde_mm256_fmadd_ps(numerator, q, simde_x_mm256_select_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C(-2.400758277161838e+00)), simde_mm256_set1_ps(SIMDE_FLOAT32_C(-2.759285104469687e+02)), mask_el));
+      numerator = simde_mm256_fmadd_ps(numerator, q, simde_x_mm256_select_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C(-2.549732539343734e+00)), simde_mm256_set1_ps(SIMDE_FLOAT32_C( 1.383577518672690e+02)), mask_el));
+      numerator = simde_mm256_fmadd_ps(numerator, q, simde_x_mm256_select_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C( 4.374664141464968e+00)), simde_mm256_set1_ps(SIMDE_FLOAT32_C(-3.066479806614716e+01)), mask_el));
+      numerator = simde_mm256_fmadd_ps(numerator, q, simde_x_mm256_select_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C( 2.938163982698783e+00)), simde_mm256_set1_ps(SIMDE_FLOAT32_C( 2.506628277459239e+00)), mask_el));
+      {
+        simde__m256 multiplier;
+        multiplier =                            simde_mm256_and_ps(mask_lo, simde_mm256_set1_ps(SIMDE_FLOAT32_C( 1.0)));
+        multiplier = simde_mm256_or_ps(multiplier, simde_mm256_and_ps(mask_hi, simde_mm256_set1_ps(SIMDE_FLOAT32_C(-1.0))));
+        multiplier = simde_mm256_or_ps(multiplier, simde_mm256_and_ps(mask_el, r));
+        numerator = simde_mm256_mul_ps(numerator, multiplier);
+      }
+
+      /* lo/hi: float denominator = (((((c_d[0] * q + c_d[1]) * q + c_d[2]) * q + c_d[3]) * 1 +   0.0f) * q + 1); */
+      /*    el: float denominator = (((((c_b[0] * q + c_b[1]) * q + c_b[2]) * q + c_b[3]) * q + c_b[4]) * q + 1); */
+      simde__m256 denominator = simde_x_mm256_select_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C( 7.784695709041462e-03)), simde_mm256_set1_ps(SIMDE_FLOAT32_C(-5.447609879822406e+01)), mask_el);
+      denominator = simde_mm256_fmadd_ps(denominator, q, simde_x_mm256_select_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C( 3.224671290700398e-01)), simde_mm256_set1_ps(SIMDE_FLOAT32_C( 1.615858368580409e+02)), mask_el));
+      denominator = simde_mm256_fmadd_ps(denominator, q, simde_x_mm256_select_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C( 2.445134137142996e+00)), simde_mm256_set1_ps(SIMDE_FLOAT32_C(-1.556989798598866e+02)), mask_el));
+      denominator = simde_mm256_fmadd_ps(denominator, q, simde_x_mm256_select_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C( 3.754408661907416e+00)), simde_mm256_set1_ps(SIMDE_FLOAT32_C( 6.680131188771972e+01)), mask_el));
+      denominator = simde_mm256_fmadd_ps(denominator, simde_x_mm256_select_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C( 1.0)), q, mask_el),
+                                                   simde_x_mm256_select_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C( 0.0)), simde_mm256_set1_ps(SIMDE_FLOAT32_C(-1.328068155288572e+01)), mask_el));
+      denominator = simde_mm256_fmadd_ps(denominator, q, simde_mm256_set1_ps(SIMDE_FLOAT32_C(1.0)));
+
+      /* res = numerator / denominator; */
+      simde__m256 res = simde_mm256_div_ps(numerator, denominator);
+
+      retval = simde_mm256_or_ps(retval, simde_mm256_and_ps(mask, res));
+    }
+
+    return retval;
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_cdfnorminv_ps(a_.m128[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_cdfnorminvf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cdfnorminv_ps
+  #define _mm256_cdfnorminv_ps(a) simde_mm256_cdfnorminv_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_cdfnorminv_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_cdfnorminv_pd(a);
+   #elif SIMDE_NATURAL_VECTOR_SIZE_GE(256)
+    simde__m256d matched, retval = simde_mm256_setzero_pd();
+
+    { /* if (a < 0 || a > 1) */
+      matched = simde_mm256_or_pd(simde_mm256_cmp_pd(a, simde_mm256_set1_pd(SIMDE_FLOAT64_C(0.0)), SIMDE_CMP_LT_OQ), simde_mm256_cmp_pd(a, simde_mm256_set1_pd(SIMDE_FLOAT64_C(1.0)), SIMDE_CMP_GT_OQ));
+
+      /* We don't actually need to do anything here since we initialize
+       * retval to 0.0. */
+    }
+
+    { /* else if (a == 0) */
+      simde__m256d mask = simde_mm256_cmp_pd(a, simde_mm256_set1_pd(SIMDE_FLOAT64_C(0.0)), SIMDE_CMP_EQ_OQ);
+      mask = simde_mm256_andnot_pd(matched, mask);
+      matched = simde_mm256_or_pd(matched, mask);
+
+      simde__m256d res = simde_mm256_set1_pd(-SIMDE_MATH_INFINITY);
+
+      retval = simde_mm256_or_pd(retval, simde_mm256_and_pd(mask, res));
+    }
+
+    { /* else if (a == 1) */
+      simde__m256d mask = simde_mm256_cmp_pd(a, simde_mm256_set1_pd(SIMDE_FLOAT64_C(1.0)), SIMDE_CMP_EQ_OQ);
+      mask = simde_mm256_andnot_pd(matched, mask);
+      matched = simde_mm256_or_pd(matched, mask);
+
+      simde__m256d res = simde_mm256_set1_pd(SIMDE_MATH_INFINITY);
+
+      retval = simde_mm256_or_pd(retval, simde_mm256_and_pd(mask, res));
+    }
+
+    { /* Remaining conditions.
+       *
+       * Including the else case in this complicates things a lot, but
+       * we're using cheap operations to get rid of expensive multiply
+       * and add functions.  This should be a small improvement on SSE
+       * prior to 4.1.  On SSE 4.1 we can use _mm256_blendv_pd which is
+       * very fast and this becomes a huge win.  NEON, AltiVec, and
+       * WASM also have blend operations, so this should be a big win
+       * there, too. */
+
+      /* else if (a < 0.02425) */
+      simde__m256d mask_lo = simde_mm256_cmp_pd(a, simde_mm256_set1_pd(SIMDE_FLOAT64_C(0.02425)), SIMDE_CMP_LT_OQ);
+      /* else if (a > 0.97575) */
+      simde__m256d mask_hi = simde_mm256_cmp_pd(a, simde_mm256_set1_pd(SIMDE_FLOAT64_C(0.97575)), SIMDE_CMP_GT_OQ);
+
+      simde__m256d mask = simde_mm256_or_pd(mask_lo, mask_hi);
+      matched = simde_mm256_or_pd(matched, mask);
+
+      /* else */
+      simde__m256d mask_el = simde_x_mm256_not_pd(matched);
+      mask = simde_mm256_or_pd(mask, mask_el);
+
+      /* r = a - 0.5 */
+      simde__m256d r = simde_mm256_sub_pd(a, simde_mm256_set1_pd(SIMDE_FLOAT64_C(0.5)));
+
+      /* lo: q = a
+       * hi: q = (1.0 - a) */
+      simde__m256d q = simde_mm256_and_pd(mask_lo, a);
+      q = simde_mm256_or_pd(q, simde_mm256_and_pd(mask_hi, simde_mm256_sub_pd(simde_mm256_set1_pd(1.0), a)));
+
+      /* q = simde_math_sqrt(-2.0 * simde_math_log(q)) */
+      q = simde_mm256_log_pd(q);
+      q = simde_mm256_mul_pd(q, simde_mm256_set1_pd(SIMDE_FLOAT64_C(-2.0)));
+      q = simde_mm256_sqrt_pd(q);
+
+      /* el: q = r * r */
+      q = simde_x_mm256_select_pd(q, simde_mm256_mul_pd(r, r), mask_el);
+
+      /* lo: double numerator = ((((((c_c[0] * q + c_c[1]) * q + c_c[2]) * q + c_c[3]) * q + c_c[4]) * q + c_c[5]) *  1.0); */
+      /* hi: double numerator = ((((((c_c[0] * q + c_c[1]) * q + c_c[2]) * q + c_c[3]) * q + c_c[4]) * q + c_c[5]) * -1.0); */
+      /* el: double numerator = ((((((c_a[0] * q + c_a[1]) * q + c_a[2]) * q + c_a[3]) * q + c_a[4]) * q + c_a[5]) *  r); */
+      simde__m256d numerator = simde_x_mm256_select_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C(-7.784894002430293e-03)), simde_mm256_set1_pd(SIMDE_FLOAT64_C(-3.969683028665376e+01)), mask_el);
+      numerator = simde_mm256_fmadd_pd(numerator, q, simde_x_mm256_select_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C(-3.223964580411365e-01)), simde_mm256_set1_pd(SIMDE_FLOAT64_C( 2.209460984245205e+02)), mask_el));
+      numerator = simde_mm256_fmadd_pd(numerator, q, simde_x_mm256_select_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C(-2.400758277161838e+00)), simde_mm256_set1_pd(SIMDE_FLOAT64_C(-2.759285104469687e+02)), mask_el));
+      numerator = simde_mm256_fmadd_pd(numerator, q, simde_x_mm256_select_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C(-2.549732539343734e+00)), simde_mm256_set1_pd(SIMDE_FLOAT64_C( 1.383577518672690e+02)), mask_el));
+      numerator = simde_mm256_fmadd_pd(numerator, q, simde_x_mm256_select_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C( 4.374664141464968e+00)), simde_mm256_set1_pd(SIMDE_FLOAT64_C(-3.066479806614716e+01)), mask_el));
+      numerator = simde_mm256_fmadd_pd(numerator, q, simde_x_mm256_select_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C( 2.938163982698783e+00)), simde_mm256_set1_pd(SIMDE_FLOAT64_C( 2.506628277459239e+00)), mask_el));
+      {
+        simde__m256d multiplier;
+        multiplier =                            simde_mm256_and_pd(mask_lo, simde_mm256_set1_pd(SIMDE_FLOAT64_C( 1.0)));
+        multiplier = simde_mm256_or_pd(multiplier, simde_mm256_and_pd(mask_hi, simde_mm256_set1_pd(SIMDE_FLOAT64_C(-1.0))));
+        multiplier = simde_mm256_or_pd(multiplier, simde_mm256_and_pd(mask_el, r));
+        numerator = simde_mm256_mul_pd(numerator, multiplier);
+      }
+
+      /* lo/hi: double denominator = (((((c_d[0] * q + c_d[1]) * q + c_d[2]) * q + c_d[3]) * 1 +   0.0f) * q + 1); */
+      /*    el: double denominator = (((((c_b[0] * q + c_b[1]) * q + c_b[2]) * q + c_b[3]) * q + c_b[4]) * q + 1); */
+      simde__m256d denominator = simde_x_mm256_select_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C( 7.784695709041462e-03)), simde_mm256_set1_pd(SIMDE_FLOAT64_C(-5.447609879822406e+01)), mask_el);
+      denominator = simde_mm256_fmadd_pd(denominator, q, simde_x_mm256_select_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C( 3.224671290700398e-01)), simde_mm256_set1_pd(SIMDE_FLOAT64_C( 1.615858368580409e+02)), mask_el));
+      denominator = simde_mm256_fmadd_pd(denominator, q, simde_x_mm256_select_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C( 2.445134137142996e+00)), simde_mm256_set1_pd(SIMDE_FLOAT64_C(-1.556989798598866e+02)), mask_el));
+      denominator = simde_mm256_fmadd_pd(denominator, q, simde_x_mm256_select_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C( 3.754408661907416e+00)), simde_mm256_set1_pd(SIMDE_FLOAT64_C( 6.680131188771972e+01)), mask_el));
+      denominator = simde_mm256_fmadd_pd(denominator, simde_x_mm256_select_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C( 1.0)), q, mask_el),
+                                                   simde_x_mm256_select_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C( 0.0)), simde_mm256_set1_pd(SIMDE_FLOAT64_C(-1.328068155288572e+01)), mask_el));
+      denominator = simde_mm256_fmadd_pd(denominator, q, simde_mm256_set1_pd(SIMDE_FLOAT64_C(1.0)));
+
+      /* res = numerator / denominator; */
+      simde__m256d res = simde_mm256_div_pd(numerator, denominator);
+
+      retval = simde_mm256_or_pd(retval, simde_mm256_and_pd(mask, res));
+    }
+
+    return retval;
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_cdfnorminv_pd(a_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_cdfnorminv(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_cdfnorminv_pd
+  #define _mm256_cdfnorminv_pd(a) simde_mm256_cdfnorminv_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_cdfnorminv_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_cdfnorminv_ps(a);
+  #elif SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+      r_.m256[i] = simde_mm256_cdfnorminv_ps(a_.m256[i]);
+    }
+
+    return simde__m512_from_private(r_);
+  #else
+
+    simde__m512 retval = simde_mm512_setzero_ps();
+    simde__mmask16 matched;
+
+    { /* if (a < 0 || a > 1) */
+      matched  = simde_mm512_cmp_ps_mask(a, simde_mm512_set1_ps(SIMDE_FLOAT32_C(0.0)), SIMDE_CMP_LT_OQ);
+      matched |= simde_mm512_cmp_ps_mask(a, simde_mm512_set1_ps(SIMDE_FLOAT32_C(1.0)), SIMDE_CMP_GT_OQ);
+
+      /* We don't actually need to do anything here since we initialize
+       * retval to 0.0. */
+    }
+
+    { /* else if (a == 0) */
+      simde__mmask16 mask = simde_mm512_cmp_ps_mask(a, simde_mm512_set1_ps(SIMDE_FLOAT32_C(0.0)), SIMDE_CMP_EQ_OQ);
+      matched |= mask;
+
+      retval = simde_mm512_mask_mov_ps(retval, mask, simde_mm512_set1_ps(-SIMDE_MATH_INFINITYF));
+    }
+
+    { /* else if (a == 1) */
+      simde__mmask16 mask = simde_mm512_cmp_ps_mask(a, simde_mm512_set1_ps(SIMDE_FLOAT32_C(0.0)), SIMDE_CMP_EQ_OQ);
+      matched |= mask;
+
+      retval = simde_mm512_mask_mov_ps(retval, mask, simde_mm512_set1_ps(SIMDE_MATH_INFINITYF));
+    }
+
+    { /* else if (a < 0.02425) */
+      simde__mmask16 mask_lo = simde_mm512_cmp_ps_mask(a, simde_mm512_set1_ps(SIMDE_FLOAT32_C(0.02425)), SIMDE_CMP_LT_OQ);
+      /* else if (a > 0.97575) */
+      simde__mmask16 mask_hi = simde_mm512_cmp_ps_mask(a, simde_mm512_set1_ps(SIMDE_FLOAT32_C(0.97575)), SIMDE_CMP_GT_OQ);
+
+      simde__mmask16 mask = mask_lo | mask_hi;
+      matched = matched | mask;
+
+      /* else */
+      simde__mmask16 mask_el = ~matched;
+
+      /* r = a - 0.5f */
+      simde__m512 r = simde_mm512_sub_ps(a, simde_mm512_set1_ps(SIMDE_FLOAT32_C(0.5)));
+
+      /* lo: q = a
+       * hi: q = (1.0 - a) */
+      simde__m512 q = simde_mm512_maskz_mov_ps(mask_lo, a);
+      q = simde_mm512_mask_sub_ps(q, mask_hi, simde_mm512_set1_ps(SIMDE_FLOAT32_C(1.0)), a);
+
+      /* q = simde_math_sqrtf(-2.0f * simde_math_logf(q)) */
+      q = simde_mm512_log_ps(q);
+      q = simde_mm512_mul_ps(q, simde_mm512_set1_ps(SIMDE_FLOAT32_C(-2.0)));
+      q = simde_mm512_sqrt_ps(q);
+
+      /* el: q = r * r */
+      q = simde_mm512_mask_mul_ps(q, mask_el, r, r);
+
+      /* lo: float numerator = ((((((c_c[0] * q + c_c[1]) * q + c_c[2]) * q + c_c[3]) * q + c_c[4]) * q + c_c[5]) *  1.0f); */
+      /* hi: float numerator = ((((((c_c[0] * q + c_c[1]) * q + c_c[2]) * q + c_c[3]) * q + c_c[4]) * q + c_c[5]) * -1.0f); */
+      /* el: float numerator = ((((((c_a[0] * q + c_a[1]) * q + c_a[2]) * q + c_a[3]) * q + c_a[4]) * q + c_a[5]) *  r); */
+      simde__m512 numerator = simde_mm512_mask_mov_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C(-7.784894002430293e-03)), mask_el, simde_mm512_set1_ps(SIMDE_FLOAT32_C(-3.969683028665376e+01)));
+      numerator = simde_mm512_fmadd_ps(numerator, q, simde_mm512_mask_mov_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C(-3.223964580411365e-01)), mask_el, simde_mm512_set1_ps(SIMDE_FLOAT32_C( 2.209460984245205e+02))));
+      numerator = simde_mm512_fmadd_ps(numerator, q, simde_mm512_mask_mov_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C(-2.400758277161838e+00)), mask_el, simde_mm512_set1_ps(SIMDE_FLOAT32_C(-2.759285104469687e+02))));
+      numerator = simde_mm512_fmadd_ps(numerator, q, simde_mm512_mask_mov_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C(-2.549732539343734e+00)), mask_el, simde_mm512_set1_ps(SIMDE_FLOAT32_C( 1.383577518672690e+02))));
+      numerator = simde_mm512_fmadd_ps(numerator, q, simde_mm512_mask_mov_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C( 4.374664141464968e+00)), mask_el, simde_mm512_set1_ps(SIMDE_FLOAT32_C(-3.066479806614716e+01))));
+      numerator = simde_mm512_fmadd_ps(numerator, q, simde_mm512_mask_mov_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C( 2.938163982698783e+00)), mask_el, simde_mm512_set1_ps(SIMDE_FLOAT32_C( 2.506628277459239e+00))));
+      {
+        simde__m512 multiplier;
+        multiplier =                                              simde_mm512_set1_ps(SIMDE_FLOAT32_C( 1.0));
+        multiplier = simde_mm512_mask_mov_ps(multiplier, mask_hi, simde_mm512_set1_ps(SIMDE_FLOAT32_C(-1.0)));
+        multiplier = simde_mm512_mask_mov_ps(multiplier, mask_el, r);
+        numerator = simde_mm512_mul_ps(numerator, multiplier);
+      }
+
+      /* lo/hi: float denominator = (((((c_d[0] * q + c_d[1]) * q + c_d[2]) * q + c_d[3]) * 1 +   0.0f) * q + 1); */
+      /*    el: float denominator = (((((c_b[0] * q + c_b[1]) * q + c_b[2]) * q + c_b[3]) * q + c_b[4]) * q + 1); */
+      simde__m512 denominator = simde_mm512_mask_mov_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C( 7.784695709041462e-03)), mask_el, simde_mm512_set1_ps(SIMDE_FLOAT32_C(-5.447609879822406e+01)));
+      denominator = simde_mm512_fmadd_ps(denominator, q, simde_mm512_mask_mov_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C( 3.224671290700398e-01)), mask_el, simde_mm512_set1_ps(SIMDE_FLOAT32_C( 1.615858368580409e+02))));
+      denominator = simde_mm512_fmadd_ps(denominator, q, simde_mm512_mask_mov_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C( 2.445134137142996e+00)), mask_el, simde_mm512_set1_ps(SIMDE_FLOAT32_C(-1.556989798598866e+02))));
+      denominator = simde_mm512_fmadd_ps(denominator, q, simde_mm512_mask_mov_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C( 3.754408661907416e+00)), mask_el, simde_mm512_set1_ps(SIMDE_FLOAT32_C( 6.680131188771972e+01))));
+      denominator = simde_mm512_fmadd_ps(denominator, simde_mm512_mask_mov_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C( 1.0)), mask_el, q),
+                                                      simde_mm512_mask_mov_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C( 0.0)), mask_el, simde_mm512_set1_ps(SIMDE_FLOAT32_C(-1.328068155288572e+01))));
+      denominator = simde_mm512_fmadd_ps(denominator, q, simde_mm512_set1_ps(SIMDE_FLOAT32_C(1.0)));
+
+      /* res = numerator / denominator; */
+      retval = simde_mm512_mask_div_ps(retval, mask_lo | mask_hi | mask_el, numerator, denominator);
+    }
+
+    return retval;
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_cdfnorminv_ps
+  #define _mm512_cdfnorminv_ps(a) simde_mm512_cdfnorminv_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_cdfnorminv_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_cdfnorminv_pd(a);
+  #elif SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+      r_.m256d[i] = simde_mm256_cdfnorminv_pd(a_.m256d[i]);
+    }
+
+    return simde__m512d_from_private(r_);
+  #else
+
+    simde__m512d retval = simde_mm512_setzero_pd();
+    simde__mmask8 matched;
+
+    { /* if (a < 0 || a > 1) */
+      matched  = simde_mm512_cmp_pd_mask(a, simde_mm512_set1_pd(SIMDE_FLOAT64_C(0.0)), SIMDE_CMP_LT_OQ);
+      matched |= simde_mm512_cmp_pd_mask(a, simde_mm512_set1_pd(SIMDE_FLOAT64_C(1.0)), SIMDE_CMP_GT_OQ);
+
+      /* We don't actually need to do anything here since we initialize
+       * retval to 0.0. */
+    }
+
+    { /* else if (a == 0) */
+      simde__mmask8 mask = simde_mm512_cmp_pd_mask(a, simde_mm512_set1_pd(SIMDE_FLOAT64_C(0.0)), SIMDE_CMP_EQ_OQ);
+      matched |= mask;
+
+      retval = simde_mm512_mask_mov_pd(retval, mask, simde_mm512_set1_pd(-SIMDE_MATH_INFINITY));
+    }
+
+    { /* else if (a == 1) */
+      simde__mmask8 mask = simde_mm512_cmp_pd_mask(a, simde_mm512_set1_pd(SIMDE_FLOAT64_C(0.0)), SIMDE_CMP_EQ_OQ);
+      matched |= mask;
+
+      retval = simde_mm512_mask_mov_pd(retval, mask, simde_mm512_set1_pd(SIMDE_MATH_INFINITY));
+    }
+
+    { /* else if (a < 0.02425) */
+      simde__mmask8 mask_lo = simde_mm512_cmp_pd_mask(a, simde_mm512_set1_pd(SIMDE_FLOAT64_C(0.02425)), SIMDE_CMP_LT_OQ);
+      /* else if (a > 0.97575) */
+      simde__mmask8 mask_hi = simde_mm512_cmp_pd_mask(a, simde_mm512_set1_pd(SIMDE_FLOAT64_C(0.97575)), SIMDE_CMP_GT_OQ);
+
+      simde__mmask8 mask = mask_lo | mask_hi;
+      matched = matched | mask;
+
+      /* else */
+      simde__mmask8 mask_el = ~matched;
+
+      /* r = a - 0.5f */
+      simde__m512d r = simde_mm512_sub_pd(a, simde_mm512_set1_pd(SIMDE_FLOAT64_C(0.5)));
+
+      /* lo: q = a
+       * hi: q = (1.0 - a) */
+      simde__m512d q = a;
+      q = simde_mm512_mask_sub_pd(q, mask_hi, simde_mm512_set1_pd(SIMDE_FLOAT64_C(1.0)), a);
+
+      /* q = simde_math_sqrtf(-2.0f * simde_math_logf(q)) */
+      q = simde_mm512_log_pd(q);
+      q = simde_mm512_mul_pd(q, simde_mm512_set1_pd(SIMDE_FLOAT64_C(-2.0)));
+      q = simde_mm512_sqrt_pd(q);
+
+      /* el: q = r * r */
+      q = simde_mm512_mask_mul_pd(q, mask_el, r, r);
+
+      /* lo: float numerator = ((((((c_c[0] * q + c_c[1]) * q + c_c[2]) * q + c_c[3]) * q + c_c[4]) * q + c_c[5]) *  1.0f); */
+      /* hi: float numerator = ((((((c_c[0] * q + c_c[1]) * q + c_c[2]) * q + c_c[3]) * q + c_c[4]) * q + c_c[5]) * -1.0f); */
+      /* el: float numerator = ((((((c_a[0] * q + c_a[1]) * q + c_a[2]) * q + c_a[3]) * q + c_a[4]) * q + c_a[5]) *  r); */
+      simde__m512d numerator = simde_mm512_mask_mov_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C(-7.784894002430293e-03)), mask_el, simde_mm512_set1_pd(SIMDE_FLOAT64_C(-3.969683028665376e+01)));
+      numerator = simde_mm512_fmadd_pd(numerator, q, simde_mm512_mask_mov_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C(-3.223964580411365e-01)), mask_el, simde_mm512_set1_pd(SIMDE_FLOAT64_C( 2.209460984245205e+02))));
+      numerator = simde_mm512_fmadd_pd(numerator, q, simde_mm512_mask_mov_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C(-2.400758277161838e+00)), mask_el, simde_mm512_set1_pd(SIMDE_FLOAT64_C(-2.759285104469687e+02))));
+      numerator = simde_mm512_fmadd_pd(numerator, q, simde_mm512_mask_mov_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C(-2.549732539343734e+00)), mask_el, simde_mm512_set1_pd(SIMDE_FLOAT64_C( 1.383577518672690e+02))));
+      numerator = simde_mm512_fmadd_pd(numerator, q, simde_mm512_mask_mov_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C( 4.374664141464968e+00)), mask_el, simde_mm512_set1_pd(SIMDE_FLOAT64_C(-3.066479806614716e+01))));
+      numerator = simde_mm512_fmadd_pd(numerator, q, simde_mm512_mask_mov_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C( 2.938163982698783e+00)), mask_el, simde_mm512_set1_pd(SIMDE_FLOAT64_C( 2.506628277459239e+00))));
+      {
+        simde__m512d multiplier;
+        multiplier =                                              simde_mm512_set1_pd(SIMDE_FLOAT64_C( 1.0));
+        multiplier = simde_mm512_mask_mov_pd(multiplier, mask_hi, simde_mm512_set1_pd(SIMDE_FLOAT64_C(-1.0)));
+        multiplier = simde_mm512_mask_mov_pd(multiplier, mask_el, r);
+        numerator = simde_mm512_mul_pd(numerator, multiplier);
+      }
+
+      /* lo/hi: float denominator = (((((c_d[0] * q + c_d[1]) * q + c_d[2]) * q + c_d[3]) * 1 +   0.0f) * q + 1); */
+      /*    el: float denominator = (((((c_b[0] * q + c_b[1]) * q + c_b[2]) * q + c_b[3]) * q + c_b[4]) * q + 1); */
+      simde__m512d denominator = simde_mm512_mask_mov_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C( 7.784695709041462e-03)), mask_el, simde_mm512_set1_pd(SIMDE_FLOAT64_C(-5.447609879822406e+01)));
+      denominator = simde_mm512_fmadd_pd(denominator, q, simde_mm512_mask_mov_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C( 3.224671290700398e-01)), mask_el, simde_mm512_set1_pd(SIMDE_FLOAT64_C( 1.615858368580409e+02))));
+      denominator = simde_mm512_fmadd_pd(denominator, q, simde_mm512_mask_mov_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C( 2.445134137142996e+00)), mask_el, simde_mm512_set1_pd(SIMDE_FLOAT64_C(-1.556989798598866e+02))));
+      denominator = simde_mm512_fmadd_pd(denominator, q, simde_mm512_mask_mov_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C( 3.754408661907416e+00)), mask_el, simde_mm512_set1_pd(SIMDE_FLOAT64_C( 6.680131188771972e+01))));
+      denominator = simde_mm512_fmadd_pd(denominator, simde_mm512_mask_mov_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C( 1.0)), mask_el, q),
+                                                      simde_mm512_mask_mov_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C( 0.0)), mask_el, simde_mm512_set1_pd(SIMDE_FLOAT64_C(-1.328068155288572e+01))));
+      denominator = simde_mm512_fmadd_pd(denominator, q, simde_mm512_set1_pd(SIMDE_FLOAT64_C(1.0)));
+
+      /* res = numerator / denominator; */
+      retval = simde_mm512_mask_div_pd(retval, mask_lo | mask_hi | mask_el, numerator, denominator);
+    }
+
+    return retval;
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_cdfnorminv_pd
+  #define _mm512_cdfnorminv_pd(a) simde_mm512_cdfnorminv_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_cdfnorminv_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_cdfnorminv_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_cdfnorminv_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_cdfnorminv_ps
+  #define _mm512_mask_cdfnorminv_ps(src, k, a) simde_mm512_mask_cdfnorminv_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_cdfnorminv_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_cdfnorminv_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_cdfnorminv_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_cdfnorminv_pd
+  #define _mm512_mask_cdfnorminv_pd(src, k, a) simde_mm512_mask_cdfnorminv_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_erfinv_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_erfinv_ps(a);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    /* https://stackoverflow.com/questions/27229371/inverse-error-function-in-c */
+    simde__m128 one = simde_mm_set1_ps(SIMDE_FLOAT32_C(1.0));
+
+    simde__m128 lnx = simde_mm_log_ps(simde_mm_mul_ps(simde_mm_sub_ps(one, a), simde_mm_add_ps(one, a)));
+
+    simde__m128 tt1 = simde_mm_mul_ps(simde_mm_set1_ps(HEDLEY_STATIC_CAST(simde_float32, SIMDE_MATH_PI)), simde_mm_set1_ps(SIMDE_FLOAT32_C(0.147)));
+    tt1 = simde_mm_div_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C(2.0)), tt1);
+    tt1 = simde_mm_add_ps(tt1, simde_mm_mul_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C(0.5)), lnx));
+
+    simde__m128 tt2 = simde_mm_set1_ps(SIMDE_FLOAT32_C(1.0) / SIMDE_FLOAT32_C(0.147));
+    tt2 = simde_mm_mul_ps(tt2, lnx);
+
+    simde__m128 r = simde_mm_mul_ps(tt1, tt1);
+    r = simde_mm_sub_ps(r, tt2);
+    r = simde_mm_sqrt_ps(r);
+    r = simde_mm_add_ps(simde_x_mm_negate_ps(tt1), r);
+    r = simde_mm_sqrt_ps(r);
+
+    return simde_x_mm_xorsign_ps(r, a);
+  #else
+    simde__m128_private
+      a_ = simde__m128_to_private(a),
+      r_;
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_erfinvf(a_.f32[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_erfinv_ps
+  #define _mm_erfinv_ps(a) simde_mm_erfinv_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_erfinv_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_erfinv_pd(a);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    simde__m128d one = simde_mm_set1_pd(SIMDE_FLOAT64_C(1.0));
+
+    simde__m128d lnx = simde_mm_log_pd(simde_mm_mul_pd(simde_mm_sub_pd(one, a), simde_mm_add_pd(one, a)));
+
+    simde__m128d tt1 = simde_mm_mul_pd(simde_mm_set1_pd(SIMDE_MATH_PI), simde_mm_set1_pd(SIMDE_FLOAT64_C(0.147)));
+    tt1 = simde_mm_div_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C(2.0)), tt1);
+    tt1 = simde_mm_add_pd(tt1, simde_mm_mul_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C(0.5)), lnx));
+
+    simde__m128d tt2 = simde_mm_set1_pd(SIMDE_FLOAT64_C(1.0) / SIMDE_FLOAT64_C(0.147));
+    tt2 = simde_mm_mul_pd(tt2, lnx);
+
+    simde__m128d r = simde_mm_mul_pd(tt1, tt1);
+    r = simde_mm_sub_pd(r, tt2);
+    r = simde_mm_sqrt_pd(r);
+    r = simde_mm_add_pd(simde_x_mm_negate_pd(tt1), r);
+    r = simde_mm_sqrt_pd(r);
+
+    return simde_x_mm_xorsign_pd(r, a);
+  #else
+    simde__m128d_private
+      a_ = simde__m128d_to_private(a),
+      r_;
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_erfinv(a_.f64[i]);
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_erfinv_pd
+  #define _mm_erfinv_pd(a) simde_mm_erfinv_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_erfinv_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_erfinv_ps(a);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    simde__m256 one = simde_mm256_set1_ps(SIMDE_FLOAT32_C(1.0));
+    simde__m256 sgn = simde_x_mm256_copysign_ps(one, a);
+
+    a = simde_mm256_mul_ps(simde_mm256_sub_ps(one, a), simde_mm256_add_ps(one, a));
+    simde__m256 lnx = simde_mm256_log_ps(a);
+
+    simde__m256 tt1 = simde_mm256_mul_ps(simde_mm256_set1_ps(HEDLEY_STATIC_CAST(simde_float32, SIMDE_MATH_PI)), simde_mm256_set1_ps(SIMDE_FLOAT32_C(0.147)));
+    tt1 = simde_mm256_div_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C(2.0)), tt1);
+    tt1 = simde_mm256_add_ps(tt1, simde_mm256_mul_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C(0.5)), lnx));
+
+    simde__m256 tt2 = simde_mm256_set1_ps(SIMDE_FLOAT32_C(1.0) / SIMDE_FLOAT32_C(0.147));
+    tt2 = simde_mm256_mul_ps(tt2, lnx);
+
+    simde__m256 r = simde_mm256_mul_ps(tt1, tt1);
+    r = simde_mm256_sub_ps(r, tt2);
+    r = simde_mm256_sqrt_ps(r);
+    r = simde_mm256_add_ps(simde_x_mm256_negate_ps(tt1), r);
+    r = simde_mm256_sqrt_ps(r);
+
+    return simde_mm256_mul_ps(sgn, r);
+  #else
+    simde__m256_private
+      a_ = simde__m256_to_private(a),
+      r_;
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_erfinvf(a_.f32[i]);
+    }
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_erfinv_ps
+  #define _mm256_erfinv_ps(a) simde_mm256_erfinv_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_erfinv_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_erfinv_pd(a);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    simde__m256d one = simde_mm256_set1_pd(SIMDE_FLOAT64_C(1.0));
+    simde__m256d sgn = simde_x_mm256_copysign_pd(one, a);
+
+    a = simde_mm256_mul_pd(simde_mm256_sub_pd(one, a), simde_mm256_add_pd(one, a));
+    simde__m256d lnx = simde_mm256_log_pd(a);
+
+    simde__m256d tt1 = simde_mm256_mul_pd(simde_mm256_set1_pd(SIMDE_MATH_PI), simde_mm256_set1_pd(SIMDE_FLOAT64_C(0.147)));
+    tt1 = simde_mm256_div_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C(2.0)), tt1);
+    tt1 = simde_mm256_add_pd(tt1, simde_mm256_mul_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C(0.5)), lnx));
+
+    simde__m256d tt2 = simde_mm256_set1_pd(SIMDE_FLOAT64_C(1.0) / SIMDE_FLOAT64_C(0.147));
+    tt2 = simde_mm256_mul_pd(tt2, lnx);
+
+    simde__m256d r = simde_mm256_mul_pd(tt1, tt1);
+    r = simde_mm256_sub_pd(r, tt2);
+    r = simde_mm256_sqrt_pd(r);
+    r = simde_mm256_add_pd(simde_x_mm256_negate_pd(tt1), r);
+    r = simde_mm256_sqrt_pd(r);
+
+    return simde_mm256_mul_pd(sgn, r);
+  #else
+    simde__m256d_private
+      a_ = simde__m256d_to_private(a),
+      r_;
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_erfinv(a_.f64[i]);
+    }
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_erfinv_pd
+  #define _mm256_erfinv_pd(a) simde_mm256_erfinv_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_erfinv_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_erfinv_ps(a);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    simde__m512 one = simde_mm512_set1_ps(SIMDE_FLOAT32_C(1.0));
+    simde__m512 sgn = simde_x_mm512_copysign_ps(one, a);
+
+    a = simde_mm512_mul_ps(simde_mm512_sub_ps(one, a), simde_mm512_add_ps(one, a));
+    simde__m512 lnx = simde_mm512_log_ps(a);
+
+    simde__m512 tt1 = simde_mm512_mul_ps(simde_mm512_set1_ps(HEDLEY_STATIC_CAST(simde_float32, SIMDE_MATH_PI)), simde_mm512_set1_ps(SIMDE_FLOAT32_C(0.147)));
+    tt1 = simde_mm512_div_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C(2.0)), tt1);
+    tt1 = simde_mm512_add_ps(tt1, simde_mm512_mul_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C(0.5)), lnx));
+
+    simde__m512 tt2 = simde_mm512_set1_ps(SIMDE_FLOAT32_C(1.0) / SIMDE_FLOAT32_C(0.147));
+    tt2 = simde_mm512_mul_ps(tt2, lnx);
+
+    simde__m512 r = simde_mm512_mul_ps(tt1, tt1);
+    r = simde_mm512_sub_ps(r, tt2);
+    r = simde_mm512_sqrt_ps(r);
+    r = simde_mm512_add_ps(simde_x_mm512_negate_ps(tt1), r);
+    r = simde_mm512_sqrt_ps(r);
+
+    return simde_mm512_mul_ps(sgn, r);
+  #else
+    simde__m512_private
+      a_ = simde__m512_to_private(a),
+      r_;
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_erfinvf(a_.f32[i]);
+    }
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_erfinv_ps
+  #define _mm512_erfinv_ps(a) simde_mm512_erfinv_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_erfinv_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_erfinv_pd(a);
+  #elif (SIMDE_NATURAL_VECTOR_SIZE > 0)
+    simde__m512d one = simde_mm512_set1_pd(SIMDE_FLOAT64_C(1.0));
+    simde__m512d sgn = simde_x_mm512_copysign_pd(one, a);
+
+    a = simde_mm512_mul_pd(simde_mm512_sub_pd(one, a), simde_mm512_add_pd(one, a));
+    simde__m512d lnx = simde_mm512_log_pd(a);
+
+    simde__m512d tt1 = simde_mm512_mul_pd(simde_mm512_set1_pd(SIMDE_MATH_PI), simde_mm512_set1_pd(SIMDE_FLOAT64_C(0.147)));
+    tt1 = simde_mm512_div_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C(2.0)), tt1);
+    tt1 = simde_mm512_add_pd(tt1, simde_mm512_mul_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C(0.5)), lnx));
+
+    simde__m512d tt2 = simde_mm512_set1_pd(SIMDE_FLOAT64_C(1.0) / SIMDE_FLOAT64_C(0.147));
+    tt2 = simde_mm512_mul_pd(tt2, lnx);
+
+    simde__m512d r = simde_mm512_mul_pd(tt1, tt1);
+    r = simde_mm512_sub_pd(r, tt2);
+    r = simde_mm512_sqrt_pd(r);
+    r = simde_mm512_add_pd(simde_x_mm512_negate_pd(tt1), r);
+    r = simde_mm512_sqrt_pd(r);
+
+    return simde_mm512_mul_pd(sgn, r);
+  #else
+    simde__m512d_private
+      a_ = simde__m512d_to_private(a),
+      r_;
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_erfinv(a_.f64[i]);
+    }
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_erfinv_pd
+  #define _mm512_erfinv_pd(a) simde_mm512_erfinv_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_erfinv_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_erfinv_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_erfinv_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_erfinv_ps
+  #define _mm512_mask_erfinv_ps(src, k, a) simde_mm512_mask_erfinv_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_erfinv_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_erfinv_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_erfinv_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_erfinv_pd
+  #define _mm512_mask_erfinv_pd(src, k, a) simde_mm512_mask_erfinv_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_erfcinv_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_erfcinv_ps(a);
+  #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128)
+    simde__m128 matched, retval = simde_mm_setzero_ps();
+
+    { /* if (a < 2.0f && a > 0.0625f) */
+      matched = simde_mm_cmplt_ps(a, simde_mm_set1_ps(SIMDE_FLOAT32_C(2.0)));
+      matched = simde_mm_and_ps(matched, simde_mm_cmpgt_ps(a, simde_mm_set1_ps(SIMDE_FLOAT32_C(0.0625))));
+
+      if (!simde_mm_test_all_zeros(simde_mm_castps_si128(matched), simde_x_mm_setone_si128())) {
+        retval = simde_mm_erfinv_ps(simde_mm_sub_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C(1.0)), a));
+      }
+
+      if (simde_mm_test_all_ones(simde_mm_castps_si128(matched))) {
+        return retval;
+      }
+    }
+
+    { /* else if (a < 0.0625f && a > 0.0f) */
+      simde__m128 mask = simde_mm_cmplt_ps(a, simde_mm_set1_ps(SIMDE_FLOAT32_C(0.0625)));
+      mask = simde_mm_and_ps(mask, simde_mm_cmpgt_ps(a, simde_mm_set1_ps(SIMDE_FLOAT32_C(0.0))));
+      mask = simde_mm_andnot_ps(matched, mask);
+
+      if (!simde_mm_test_all_zeros(simde_mm_castps_si128(mask), simde_x_mm_setone_si128())) {
+        matched = simde_mm_or_ps(matched, mask);
+
+        /* t =  1/(sqrt(-log(a))) */
+        simde__m128 t = simde_x_mm_negate_ps(simde_mm_log_ps(a));
+        t = simde_mm_sqrt_ps(t);
+        t = simde_mm_div_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C(1.0)), t);
+
+        const simde__m128 p[] = {
+          simde_mm_set1_ps(SIMDE_FLOAT32_C( 0.1550470003116)),
+          simde_mm_set1_ps(SIMDE_FLOAT32_C( 1.382719649631)),
+          simde_mm_set1_ps(SIMDE_FLOAT32_C( 0.690969348887)),
+          simde_mm_set1_ps(SIMDE_FLOAT32_C(-1.128081391617)),
+          simde_mm_set1_ps(SIMDE_FLOAT32_C( 0.680544246825)),
+          simde_mm_set1_ps(SIMDE_FLOAT32_C(-0.164441567910))
+        };
+
+        const simde__m128 q[] = {
+          simde_mm_set1_ps(SIMDE_FLOAT32_C( 0.155024849822)),
+          simde_mm_set1_ps(SIMDE_FLOAT32_C( 1.385228141995)),
+          simde_mm_set1_ps(SIMDE_FLOAT32_C( 1.000000000000))
+        };
+
+        /* float numerator = p[0] / t + p[1] + t * (p[2] + t * (p[3] + t * (p[4] + t * p[5])))) */
+        simde__m128 numerator = simde_mm_fmadd_ps(p[5], t, p[4]);
+        numerator = simde_mm_fmadd_ps(numerator, t, p[3]);
+        numerator = simde_mm_fmadd_ps(numerator, t, p[2]);
+        numerator = simde_mm_fmadd_ps(numerator, t, p[1]);
+        numerator = simde_mm_add_ps(numerator, simde_mm_div_ps(p[0], t));
+
+        /* float denominator = (q[0] + t * (q[1] + t * (q[2]))) */
+        simde__m128 denominator = simde_mm_fmadd_ps(q[2], t, q[1]);
+        denominator = simde_mm_fmadd_ps(denominator, t, q[0]);
+
+        simde__m128 res = simde_mm_div_ps(numerator, denominator);
+
+        retval = simde_mm_or_ps(retval, simde_mm_and_ps(mask, res));
+      }
+    }
+
+    { /* else if (a < 0.0f) */
+      simde__m128 mask = simde_mm_cmplt_ps(a, simde_mm_set1_ps(SIMDE_FLOAT32_C(0.0)));
+      mask = simde_mm_andnot_ps(matched, mask);
+
+      if (!simde_mm_test_all_zeros(simde_mm_castps_si128(mask), simde_x_mm_setone_si128())) {
+        matched = simde_mm_or_ps(matched, mask);
+
+        /* t =  1/(sqrt(-log(a))) */
+        simde__m128 t = simde_x_mm_negate_ps(simde_mm_log_ps(a));
+        t = simde_mm_sqrt_ps(t);
+        t = simde_mm_div_ps(simde_mm_set1_ps(SIMDE_FLOAT32_C(1.0)), t);
+
+        const simde__m128 p[] = {
+          simde_mm_set1_ps(SIMDE_FLOAT32_C( 0.00980456202915)),
+          simde_mm_set1_ps(SIMDE_FLOAT32_C( 0.36366788917100)),
+          simde_mm_set1_ps(SIMDE_FLOAT32_C( 0.97302949837000)),
+          simde_mm_set1_ps(SIMDE_FLOAT32_C( -0.5374947401000))
+        };
+
+        const simde__m128 q[] = {
+          simde_mm_set1_ps(SIMDE_FLOAT32_C( 0.00980451277802)),
+          simde_mm_set1_ps(SIMDE_FLOAT32_C( 0.36369997154400)),
+          simde_mm_set1_ps(SIMDE_FLOAT32_C( 1.00000000000000))
+        };
+
+        /* float numerator = (p[0] / t + p[1] + t * (p[2] + t * p[3])) */
+        simde__m128 numerator = simde_mm_fmadd_ps(p[3], t, p[2]);
+        numerator = simde_mm_fmadd_ps(numerator, t, p[1]);
+        numerator = simde_mm_add_ps(numerator, simde_mm_div_ps(p[0], t));
+
+        /* float denominator = (q[0] + t * (q[1] + t * (q[2]))) */
+        simde__m128 denominator = simde_mm_fmadd_ps(q[2], t, q[1]);
+        denominator = simde_mm_fmadd_ps(denominator, t, q[0]);
+
+        simde__m128 res = simde_mm_div_ps(numerator, denominator);
+
+        retval = simde_mm_or_ps(retval, simde_mm_and_ps(mask, res));
+
+        if (simde_mm_test_all_ones(simde_mm_castps_si128(matched))) {
+          return retval;
+        }
+      }
+    }
+
+    { /* else if (a == 0.0f) */
+      simde__m128 mask = simde_mm_cmpeq_ps(a, simde_mm_set1_ps(SIMDE_FLOAT32_C(0.0)));
+      mask = simde_mm_andnot_ps(matched, mask);
+      matched = simde_mm_or_ps(matched, mask);
+
+      simde__m128 res = simde_mm_set1_ps(SIMDE_MATH_INFINITYF);
+
+      retval = simde_mm_or_ps(retval, simde_mm_and_ps(mask, res));
+    }
+
+    { /* else */
+      /* (a >= 2.0f) */
+      retval = simde_mm_or_ps(retval, simde_mm_andnot_ps(matched, simde_mm_set1_ps(-SIMDE_MATH_INFINITYF)));
+    }
+
+    return retval;
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_erfcinvf(a_.f32[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_erfcinv_ps
+  #define _mm_erfcinv_ps(a) simde_mm_erfcinv_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_erfcinv_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_erfcinv_pd(a);
+  #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128)
+    simde__m128d matched, retval = simde_mm_setzero_pd();
+
+    { /* if (a < 2.0 && a > 0.0625) */
+      matched = simde_mm_cmplt_pd(a, simde_mm_set1_pd(SIMDE_FLOAT64_C(2.0)));
+      matched = simde_mm_and_pd(matched, simde_mm_cmpgt_pd(a, simde_mm_set1_pd(SIMDE_FLOAT64_C(0.0625))));
+
+      if (!simde_mm_test_all_zeros(simde_mm_castpd_si128(matched), simde_x_mm_setone_si128())) {
+        retval = simde_mm_erfinv_pd(simde_mm_sub_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C(1.0)), a));
+      }
+
+      if (simde_mm_test_all_ones(simde_mm_castpd_si128(matched))) {
+        return retval;
+      }
+    }
+
+    { /* else if (a < 0.0625 && a > 0.0) */
+      simde__m128d mask = simde_mm_cmplt_pd(a, simde_mm_set1_pd(SIMDE_FLOAT64_C(0.0625)));
+      mask = simde_mm_and_pd(mask, simde_mm_cmpgt_pd(a, simde_mm_set1_pd(SIMDE_FLOAT64_C(0.0))));
+      mask = simde_mm_andnot_pd(matched, mask);
+
+      if (!simde_mm_test_all_zeros(simde_mm_castpd_si128(mask), simde_x_mm_setone_si128())) {
+        matched = simde_mm_or_pd(matched, mask);
+
+        /* t =  1/(sqrt(-log(a))) */
+        simde__m128d t = simde_x_mm_negate_pd(simde_mm_log_pd(a));
+        t = simde_mm_sqrt_pd(t);
+        t = simde_mm_div_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C(1.0)), t);
+
+        const simde__m128d p[] = {
+          simde_mm_set1_pd(SIMDE_FLOAT64_C( 0.1550470003116)),
+          simde_mm_set1_pd(SIMDE_FLOAT64_C( 1.382719649631)),
+          simde_mm_set1_pd(SIMDE_FLOAT64_C( 0.690969348887)),
+          simde_mm_set1_pd(SIMDE_FLOAT64_C(-1.128081391617)),
+          simde_mm_set1_pd(SIMDE_FLOAT64_C( 0.680544246825)),
+          simde_mm_set1_pd(SIMDE_FLOAT64_C(-0.164441567910))
+        };
+
+        const simde__m128d q[] = {
+          simde_mm_set1_pd(SIMDE_FLOAT64_C( 0.155024849822)),
+          simde_mm_set1_pd(SIMDE_FLOAT64_C( 1.385228141995)),
+          simde_mm_set1_pd(SIMDE_FLOAT64_C( 1.000000000000))
+        };
+
+        /* float numerator = p[0] / t + p[1] + t * (p[2] + t * (p[3] + t * (p[4] + t * p[5])))) */
+        simde__m128d numerator = simde_mm_fmadd_pd(p[5], t, p[4]);
+        numerator = simde_mm_fmadd_pd(numerator, t, p[3]);
+        numerator = simde_mm_fmadd_pd(numerator, t, p[2]);
+        numerator = simde_mm_fmadd_pd(numerator, t, p[1]);
+        numerator = simde_mm_add_pd(numerator, simde_mm_div_pd(p[0], t));
+
+        /* float denominator = (q[0] + t * (q[1] + t * (q[2]))) */
+        simde__m128d denominator = simde_mm_fmadd_pd(q[2], t, q[1]);
+        denominator = simde_mm_fmadd_pd(denominator, t, q[0]);
+
+        simde__m128d res = simde_mm_div_pd(numerator, denominator);
+
+        retval = simde_mm_or_pd(retval, simde_mm_and_pd(mask, res));
+      }
+    }
+
+    { /* else if (a < 0.0) */
+      simde__m128d mask = simde_mm_cmplt_pd(a, simde_mm_set1_pd(SIMDE_FLOAT64_C(0.0)));
+      mask = simde_mm_andnot_pd(matched, mask);
+
+      if (!simde_mm_test_all_zeros(simde_mm_castpd_si128(mask), simde_x_mm_setone_si128())) {
+        matched = simde_mm_or_pd(matched, mask);
+
+        /* t =  1/(sqrt(-log(a))) */
+        simde__m128d t = simde_x_mm_negate_pd(simde_mm_log_pd(a));
+        t = simde_mm_sqrt_pd(t);
+        t = simde_mm_div_pd(simde_mm_set1_pd(SIMDE_FLOAT64_C(1.0)), t);
+
+        const simde__m128d p[] = {
+          simde_mm_set1_pd(SIMDE_FLOAT64_C( 0.00980456202915)),
+          simde_mm_set1_pd(SIMDE_FLOAT64_C( 0.36366788917100)),
+          simde_mm_set1_pd(SIMDE_FLOAT64_C( 0.97302949837000)),
+          simde_mm_set1_pd(SIMDE_FLOAT64_C( -0.5374947401000))
+        };
+
+        const simde__m128d q[] = {
+          simde_mm_set1_pd(SIMDE_FLOAT64_C( 0.00980451277802)),
+          simde_mm_set1_pd(SIMDE_FLOAT64_C( 0.36369997154400)),
+          simde_mm_set1_pd(SIMDE_FLOAT64_C( 1.00000000000000))
+        };
+
+        /* float numerator = (p[0] / t + p[1] + t * (p[2] + t * p[3])) */
+        simde__m128d numerator = simde_mm_fmadd_pd(p[3], t, p[2]);
+        numerator = simde_mm_fmadd_pd(numerator, t, p[1]);
+        numerator = simde_mm_add_pd(numerator, simde_mm_div_pd(p[0], t));
+
+        /* float denominator = (q[0] + t * (q[1] + t * (q[2]))) */
+        simde__m128d denominator = simde_mm_fmadd_pd(q[2], t, q[1]);
+        denominator = simde_mm_fmadd_pd(denominator, t, q[0]);
+
+        simde__m128d res = simde_mm_div_pd(numerator, denominator);
+
+        retval = simde_mm_or_pd(retval, simde_mm_and_pd(mask, res));
+
+        if (simde_mm_test_all_ones(simde_mm_castpd_si128(matched))) {
+          return retval;
+        }
+      }
+    }
+
+    { /* else if (a == 0.0) */
+      simde__m128d mask = simde_mm_cmpeq_pd(a, simde_mm_set1_pd(SIMDE_FLOAT64_C(0.0)));
+      mask = simde_mm_andnot_pd(matched, mask);
+      matched = simde_mm_or_pd(matched, mask);
+
+      simde__m128d res = simde_mm_set1_pd(SIMDE_MATH_INFINITY);
+
+      retval = simde_mm_or_pd(retval, simde_mm_and_pd(mask, res));
+    }
+
+    { /* else */
+      /* (a >= 2.0) */
+      retval = simde_mm_or_pd(retval, simde_mm_andnot_pd(matched, simde_mm_set1_pd(-SIMDE_MATH_INFINITY)));
+    }
+
+    return retval;
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_erfcinv(a_.f64[i]);
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_erfcinv_pd
+  #define _mm_erfcinv_pd(a) simde_mm_erfcinv_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_erfcinv_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_erfcinv_ps(a);
+  #elif SIMDE_NATURAL_VECTOR_SIZE_GE(256)
+    simde__m256 matched, retval = simde_mm256_setzero_ps();
+
+    { /* if (a < 2.0f && a > 0.0625f) */
+      matched = simde_mm256_cmp_ps(a, simde_mm256_set1_ps(SIMDE_FLOAT32_C(2.0)), SIMDE_CMP_LT_OQ);
+      matched = simde_mm256_and_ps(matched, simde_mm256_cmp_ps(a, simde_mm256_set1_ps(SIMDE_FLOAT32_C(0.0625)), SIMDE_CMP_GT_OQ));
+
+      if (!simde_mm256_testz_ps(matched, matched)) {
+        retval = simde_mm256_erfinv_ps(simde_mm256_sub_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C(1.0)), a));
+      }
+
+      if (simde_x_mm256_test_all_ones(simde_mm256_castps_si256(matched))) {
+        return retval;
+      }
+    }
+
+    { /* else if (a < 0.0625f && a > 0.0f) */
+      simde__m256 mask = simde_mm256_cmp_ps(a, simde_mm256_set1_ps(SIMDE_FLOAT32_C(0.0625)), SIMDE_CMP_LT_OQ);
+      mask = simde_mm256_and_ps(mask, simde_mm256_cmp_ps(a, simde_mm256_set1_ps(SIMDE_FLOAT32_C(0.0)), SIMDE_CMP_GT_OQ));
+      mask = simde_mm256_andnot_ps(matched, mask);
+
+      if (!simde_mm256_testz_ps(mask, mask)) {
+        matched = simde_mm256_or_ps(matched, mask);
+
+        /* t =  1/(sqrt(-log(a))) */
+        simde__m256 t = simde_x_mm256_negate_ps(simde_mm256_log_ps(a));
+        t = simde_mm256_sqrt_ps(t);
+        t = simde_mm256_div_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C(1.0)), t);
+
+        const simde__m256 p[] = {
+          simde_mm256_set1_ps(SIMDE_FLOAT32_C( 0.1550470003116)),
+          simde_mm256_set1_ps(SIMDE_FLOAT32_C( 1.382719649631)),
+          simde_mm256_set1_ps(SIMDE_FLOAT32_C( 0.690969348887)),
+          simde_mm256_set1_ps(SIMDE_FLOAT32_C(-1.128081391617)),
+          simde_mm256_set1_ps(SIMDE_FLOAT32_C( 0.680544246825)),
+          simde_mm256_set1_ps(SIMDE_FLOAT32_C(-0.16444156791))
+        };
+
+        const simde__m256 q[] = {
+          simde_mm256_set1_ps(SIMDE_FLOAT32_C( 0.155024849822)),
+          simde_mm256_set1_ps(SIMDE_FLOAT32_C( 1.385228141995)),
+          simde_mm256_set1_ps(SIMDE_FLOAT32_C( 1.000000000000))
+        };
+
+        /* float numerator = p[0] / t + p[1] + t * (p[2] + t * (p[3] + t * (p[4] + t * p[5])))) */
+        simde__m256 numerator = simde_mm256_fmadd_ps(p[5], t, p[4]);
+        numerator = simde_mm256_fmadd_ps(numerator, t, p[3]);
+        numerator = simde_mm256_fmadd_ps(numerator, t, p[2]);
+        numerator = simde_mm256_fmadd_ps(numerator, t, p[1]);
+        numerator = simde_mm256_add_ps(numerator, simde_mm256_div_ps(p[0], t));
+
+        /* float denominator = (q[0] + t * (q[1] + t * (q[2]))) */
+        simde__m256 denominator = simde_mm256_fmadd_ps(q[2], t, q[1]);
+        denominator = simde_mm256_fmadd_ps(denominator, t, q[0]);
+
+        simde__m256 res = simde_mm256_div_ps(numerator, denominator);
+
+        retval = simde_mm256_or_ps(retval, simde_mm256_and_ps(mask, res));
+      }
+    }
+
+    { /* else if (a < 0.0f) */
+      simde__m256 mask = simde_mm256_cmp_ps(a, simde_mm256_set1_ps(SIMDE_FLOAT32_C(0.0)), SIMDE_CMP_LT_OQ);
+      mask = simde_mm256_andnot_ps(matched, mask);
+
+      if (!simde_mm256_testz_ps(mask, mask)) {
+        matched = simde_mm256_or_ps(matched, mask);
+
+        /* t =  1/(sqrt(-log(a))) */
+        simde__m256 t = simde_x_mm256_negate_ps(simde_mm256_log_ps(a));
+        t = simde_mm256_sqrt_ps(t);
+        t = simde_mm256_div_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C(1.0)), t);
+
+        const simde__m256 p[] = {
+          simde_mm256_set1_ps(SIMDE_FLOAT32_C( 0.00980456202915)),
+          simde_mm256_set1_ps(SIMDE_FLOAT32_C( 0.36366788917100)),
+          simde_mm256_set1_ps(SIMDE_FLOAT32_C( 0.97302949837000)),
+          simde_mm256_set1_ps(SIMDE_FLOAT32_C(-0.5374947401000))
+        };
+
+        const simde__m256 q[] = {
+          simde_mm256_set1_ps(SIMDE_FLOAT32_C( 0.00980451277802)),
+          simde_mm256_set1_ps(SIMDE_FLOAT32_C( 0.36369997154400)),
+          simde_mm256_set1_ps(SIMDE_FLOAT32_C( 1.00000000000000))
+        };
+
+        /* float numerator = (p[0] / t + p[1] + t * (p[2] + t * p[3])) */
+        simde__m256 numerator = simde_mm256_fmadd_ps(p[3], t, p[2]);
+        numerator = simde_mm256_fmadd_ps(numerator, t, p[1]);
+        numerator = simde_mm256_add_ps(numerator, simde_mm256_div_ps(p[0], t));
+
+        /* float denominator = (q[0] + t * (q[1] + t * (q[2]))) */
+        simde__m256 denominator = simde_mm256_fmadd_ps(q[2], t, q[1]);
+        denominator = simde_mm256_fmadd_ps(denominator, t, q[0]);
+
+        simde__m256 res = simde_mm256_div_ps(numerator, denominator);
+
+        retval = simde_mm256_or_ps(retval, simde_mm256_and_ps(mask, res));
+
+        if (simde_x_mm256_test_all_ones(simde_mm256_castps_si256(matched))) {
+          return retval;
+        }
+      }
+    }
+
+    { /* else if (a == 0.0f) */
+      simde__m256 mask = simde_mm256_cmp_ps(a, simde_mm256_set1_ps(SIMDE_FLOAT32_C(0.0)), SIMDE_CMP_EQ_OQ);
+      mask = simde_mm256_andnot_ps(matched, mask);
+      matched = simde_mm256_or_ps(matched, mask);
+
+      simde__m256 res = simde_mm256_set1_ps(SIMDE_MATH_INFINITYF);
+
+      retval = simde_mm256_or_ps(retval, simde_mm256_and_ps(mask, res));
+    }
+
+    { /* else */
+      /* (a >= 2.0f) */
+      retval = simde_mm256_or_ps(retval, simde_mm256_andnot_ps(matched, simde_mm256_set1_ps(-SIMDE_MATH_INFINITYF)));
+    }
+
+    return retval;
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_erfcinv_ps(a_.m128[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_erfcinvf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_erfcinv_ps
+  #define _mm256_erfcinv_ps(a) simde_mm256_erfcinv_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_erfcinv_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_erfcinv_pd(a);
+  #elif SIMDE_NATURAL_VECTOR_SIZE_GE(256)
+    simde__m256d matched, retval = simde_mm256_setzero_pd();
+
+    { /* if (a < 2.0 && a > 0.0625) */
+      matched = simde_mm256_cmp_pd(a, simde_mm256_set1_pd(SIMDE_FLOAT64_C(2.0)), SIMDE_CMP_LT_OQ);
+      matched = simde_mm256_and_pd(matched, simde_mm256_cmp_pd(a, simde_mm256_set1_pd(SIMDE_FLOAT64_C(0.0625)), SIMDE_CMP_GT_OQ));
+
+      if (!simde_mm256_testz_pd(matched, matched)) {
+        retval = simde_mm256_erfinv_pd(simde_mm256_sub_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C(1.0)), a));
+      }
+
+      if (simde_x_mm256_test_all_ones(simde_mm256_castpd_si256(matched))) {
+        return retval;
+      }
+    }
+
+    { /* else if (a < 0.0625 && a > 0.0) */
+      simde__m256d mask = simde_mm256_cmp_pd(a, simde_mm256_set1_pd(SIMDE_FLOAT64_C(0.0625)), SIMDE_CMP_LT_OQ);
+      mask = simde_mm256_and_pd(mask, simde_mm256_cmp_pd(a, simde_mm256_set1_pd(SIMDE_FLOAT64_C(0.0)), SIMDE_CMP_GT_OQ));
+      mask = simde_mm256_andnot_pd(matched, mask);
+
+      if (!simde_mm256_testz_pd(mask, mask)) {
+        matched = simde_mm256_or_pd(matched, mask);
+
+        /* t =  1/(sqrt(-log(a))) */
+        simde__m256d t = simde_x_mm256_negate_pd(simde_mm256_log_pd(a));
+        t = simde_mm256_sqrt_pd(t);
+        t = simde_mm256_div_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C(1.0)), t);
+
+        const simde__m256d p[] = {
+          simde_mm256_set1_pd(SIMDE_FLOAT64_C( 0.1550470003116)),
+          simde_mm256_set1_pd(SIMDE_FLOAT64_C( 1.382719649631)),
+          simde_mm256_set1_pd(SIMDE_FLOAT64_C( 0.690969348887)),
+          simde_mm256_set1_pd(SIMDE_FLOAT64_C(-1.128081391617)),
+          simde_mm256_set1_pd(SIMDE_FLOAT64_C( 0.680544246825)),
+          simde_mm256_set1_pd(SIMDE_FLOAT64_C(-0.16444156791))
+        };
+
+        const simde__m256d q[] = {
+          simde_mm256_set1_pd(SIMDE_FLOAT64_C( 0.155024849822)),
+          simde_mm256_set1_pd(SIMDE_FLOAT64_C( 1.385228141995)),
+          simde_mm256_set1_pd(SIMDE_FLOAT64_C( 1.000000000000))
+        };
+
+        /* float numerator = p[0] / t + p[1] + t * (p[2] + t * (p[3] + t * (p[4] + t * p[5])))) */
+        simde__m256d numerator = simde_mm256_fmadd_pd(p[5], t, p[4]);
+        numerator = simde_mm256_fmadd_pd(numerator, t, p[3]);
+        numerator = simde_mm256_fmadd_pd(numerator, t, p[2]);
+        numerator = simde_mm256_fmadd_pd(numerator, t, p[1]);
+        numerator = simde_mm256_add_pd(numerator, simde_mm256_div_pd(p[0], t));
+
+        /* float denominator = (q[0] + t * (q[1] + t * (q[2]))) */
+        simde__m256d denominator = simde_mm256_fmadd_pd(q[2], t, q[1]);
+        denominator = simde_mm256_fmadd_pd(denominator, t, q[0]);
+
+        simde__m256d res = simde_mm256_div_pd(numerator, denominator);
+
+        retval = simde_mm256_or_pd(retval, simde_mm256_and_pd(mask, res));
+      }
+    }
+
+    { /* else if (a < 0.0) */
+      simde__m256d mask = simde_mm256_cmp_pd(a, simde_mm256_set1_pd(SIMDE_FLOAT64_C(0.0)), SIMDE_CMP_LT_OQ);
+      mask = simde_mm256_andnot_pd(matched, mask);
+
+      if (!simde_mm256_testz_pd(mask, mask)) {
+        matched = simde_mm256_or_pd(matched, mask);
+
+        /* t =  1/(sqrt(-log(a))) */
+        simde__m256d t = simde_x_mm256_negate_pd(simde_mm256_log_pd(a));
+        t = simde_mm256_sqrt_pd(t);
+        t = simde_mm256_div_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C(1.0)), t);
+
+        const simde__m256d p[] = {
+          simde_mm256_set1_pd(SIMDE_FLOAT64_C( 0.00980456202915)),
+          simde_mm256_set1_pd(SIMDE_FLOAT64_C( 0.36366788917100)),
+          simde_mm256_set1_pd(SIMDE_FLOAT64_C( 0.97302949837000)),
+          simde_mm256_set1_pd(SIMDE_FLOAT64_C(-0.5374947401000))
+        };
+
+        const simde__m256d q[] = {
+          simde_mm256_set1_pd(SIMDE_FLOAT64_C( 0.00980451277802)),
+          simde_mm256_set1_pd(SIMDE_FLOAT64_C( 0.36369997154400)),
+          simde_mm256_set1_pd(SIMDE_FLOAT64_C( 1.00000000000000))
+        };
+
+        /* float numerator = (p[0] / t + p[1] + t * (p[2] + t * p[3])) */
+        simde__m256d numerator = simde_mm256_fmadd_pd(p[3], t, p[2]);
+        numerator = simde_mm256_fmadd_pd(numerator, t, p[1]);
+        numerator = simde_mm256_add_pd(numerator, simde_mm256_div_pd(p[0], t));
+
+        /* float denominator = (q[0] + t * (q[1] + t * (q[2]))) */
+        simde__m256d denominator = simde_mm256_fmadd_pd(q[2], t, q[1]);
+        denominator = simde_mm256_fmadd_pd(denominator, t, q[0]);
+
+        simde__m256d res = simde_mm256_div_pd(numerator, denominator);
+
+        retval = simde_mm256_or_pd(retval, simde_mm256_and_pd(mask, res));
+
+        if (simde_x_mm256_test_all_ones(simde_mm256_castpd_si256(matched))) {
+          return retval;
+        }
+      }
+    }
+
+    { /* else if (a == 0.0) */
+      simde__m256d mask = simde_mm256_cmp_pd(a, simde_mm256_set1_pd(SIMDE_FLOAT64_C(0.0)), SIMDE_CMP_EQ_OQ);
+      mask = simde_mm256_andnot_pd(matched, mask);
+      matched = simde_mm256_or_pd(matched, mask);
+
+      simde__m256d res = simde_mm256_set1_pd(SIMDE_MATH_INFINITY);
+
+      retval = simde_mm256_or_pd(retval, simde_mm256_and_pd(mask, res));
+    }
+
+    { /* else */
+      /* (a >= 2.0) */
+      retval = simde_mm256_or_pd(retval, simde_mm256_andnot_pd(matched, simde_mm256_set1_pd(-SIMDE_MATH_INFINITY)));
+    }
+
+    return retval;
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_erfcinv_pd(a_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_erfcinv(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_erfcinv_pd
+  #define _mm256_erfcinv_pd(a) simde_mm256_erfcinv_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_erfcinv_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_erfcinv_ps(a);
+  #elif SIMDE_NATURAL_VECTOR_SIZE_LE(256) && (!defined(SIMDE_ARCH_ARM) || defined(SIMDE_ARCH_AARCH64))
+    /* The results on Arm are *slightly* off, which causes problems for
+     * the edge cases; for example, if you pass 2.0 sqrt will be called
+     * with a value of -0.0 instead of 0.0, resulting in a NaN. */
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+      r_.m256[i] = simde_mm256_erfcinv_ps(a_.m256[i]);
+    }
+    return simde__m512_from_private(r_);
+  #else
+    simde__m512 retval = simde_mm512_setzero_ps();
+    simde__mmask16 matched;
+
+    { /* if (a < 2.0f && a > 0.0625f) */
+      matched =  simde_mm512_cmp_ps_mask(a, simde_mm512_set1_ps(SIMDE_FLOAT32_C(2.0)), SIMDE_CMP_LT_OQ);
+      matched &= simde_mm512_cmp_ps_mask(a, simde_mm512_set1_ps(SIMDE_FLOAT32_C(0.0625)), SIMDE_CMP_GT_OQ);
+
+      if (matched != 0) {
+        retval = simde_mm512_erfinv_ps(simde_mm512_sub_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C(1.0)), a));
+      }
+
+      if (matched == 1) {
+        return retval;
+      }
+    }
+
+    { /* else if (a < 0.0625f && a > 0.0f) */
+      simde__mmask16 mask = simde_mm512_cmp_ps_mask(a, simde_mm512_set1_ps(SIMDE_FLOAT32_C(0.0625)), SIMDE_CMP_LT_OQ);
+      mask &= simde_mm512_cmp_ps_mask(a, simde_mm512_set1_ps(SIMDE_FLOAT32_C(0.0)), SIMDE_CMP_GT_OQ);
+      mask = ~matched & mask;
+
+      if (mask != 0) {
+        matched = matched | mask;
+
+        /* t =  1/(sqrt(-log(a))) */
+        simde__m512 t = simde_x_mm512_negate_ps(simde_mm512_log_ps(a));
+        t = simde_mm512_sqrt_ps(t);
+        t = simde_mm512_div_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C(1.0)), t);
+
+        const simde__m512 p[] = {
+          simde_mm512_set1_ps(SIMDE_FLOAT32_C( 0.1550470003116)),
+          simde_mm512_set1_ps(SIMDE_FLOAT32_C( 1.382719649631)),
+          simde_mm512_set1_ps(SIMDE_FLOAT32_C( 0.690969348887)),
+          simde_mm512_set1_ps(SIMDE_FLOAT32_C(-1.128081391617)),
+          simde_mm512_set1_ps(SIMDE_FLOAT32_C( 0.680544246825)),
+          simde_mm512_set1_ps(SIMDE_FLOAT32_C(-0.16444156791))
+        };
+
+        const simde__m512 q[] = {
+          simde_mm512_set1_ps(SIMDE_FLOAT32_C( 0.155024849822)),
+          simde_mm512_set1_ps(SIMDE_FLOAT32_C( 1.385228141995)),
+          simde_mm512_set1_ps(SIMDE_FLOAT32_C( 1.000000000000))
+        };
+
+        /* float numerator = p[0] / t + p[1] + t * (p[2] + t * (p[3] + t * (p[4] + t * p[5])))) */
+        simde__m512 numerator = simde_mm512_fmadd_ps(p[5], t, p[4]);
+        numerator = simde_mm512_fmadd_ps(numerator, t, p[3]);
+        numerator = simde_mm512_fmadd_ps(numerator, t, p[2]);
+        numerator = simde_mm512_fmadd_ps(numerator, t, p[1]);
+        numerator = simde_mm512_add_ps(numerator, simde_mm512_div_ps(p[0], t));
+
+        /* float denominator = (q[0] + t * (q[1] + t * (q[2]))) */
+        simde__m512 denominator = simde_mm512_fmadd_ps(q[2], t, q[1]);
+        denominator = simde_mm512_fmadd_ps(denominator, t, q[0]);
+
+        simde__m512 res = simde_mm512_div_ps(numerator, denominator);
+
+        retval = simde_mm512_or_ps(retval, simde_mm512_maskz_mov_ps(mask, res));
+      }
+    }
+
+    { /* else if (a < 0.0f) */
+      simde__mmask16 mask = simde_mm512_cmp_ps_mask(a, simde_mm512_set1_ps(SIMDE_FLOAT32_C(0.0)), SIMDE_CMP_LT_OQ);
+      mask = ~matched & mask;
+
+      if (mask != 0) {
+        matched = matched | mask;
+
+        /* t =  1/(sqrt(-log(a))) */
+        simde__m512 t = simde_x_mm512_negate_ps(simde_mm512_log_ps(a));
+        t = simde_mm512_sqrt_ps(t);
+        t = simde_mm512_div_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C(1.0)), t);
+
+        const simde__m512 p[] = {
+          simde_mm512_set1_ps(SIMDE_FLOAT32_C( 0.00980456202915)),
+          simde_mm512_set1_ps(SIMDE_FLOAT32_C( 0.36366788917100)),
+          simde_mm512_set1_ps(SIMDE_FLOAT32_C( 0.97302949837000)),
+          simde_mm512_set1_ps(SIMDE_FLOAT32_C( -0.5374947401000))
+        };
+
+        const simde__m512 q[] = {
+          simde_mm512_set1_ps(SIMDE_FLOAT32_C( 0.00980451277802)),
+          simde_mm512_set1_ps(SIMDE_FLOAT32_C( 0.36369997154400)),
+          simde_mm512_set1_ps(SIMDE_FLOAT32_C( 1.00000000000000))
+        };
+
+        /* float numerator = (p[0] / t + p[1] + t * (p[2] + t * p[3])) */
+        simde__m512 numerator = simde_mm512_fmadd_ps(p[3], t, p[2]);
+        numerator = simde_mm512_fmadd_ps(numerator, t, p[1]);
+        numerator = simde_mm512_add_ps(numerator, simde_mm512_div_ps(p[0], t));
+
+        /* float denominator = (q[0] + t * (q[1] + t * (q[2]))) */
+        simde__m512 denominator = simde_mm512_fmadd_ps(q[2], t, q[1]);
+        denominator = simde_mm512_fmadd_ps(denominator, t, q[0]);
+
+        simde__m512 res = simde_mm512_div_ps(numerator, denominator);
+
+        retval = simde_mm512_or_ps(retval, simde_mm512_maskz_mov_ps(mask, res));
+
+        if (matched == 1) {
+          return retval;
+        }
+      }
+    }
+
+    { /* else if (a == 0.0f) */
+      simde__mmask16 mask = simde_mm512_cmp_ps_mask(a, simde_mm512_set1_ps(SIMDE_FLOAT32_C(0.0)), SIMDE_CMP_EQ_OQ);
+      mask = ~matched & mask;
+      matched = matched | mask;
+
+      simde__m512 res = simde_mm512_set1_ps(SIMDE_MATH_INFINITYF);
+
+      retval = simde_mm512_or_ps(retval, simde_mm512_maskz_mov_ps(mask, res));
+    }
+
+    { /* else */
+      /* (a >= 2.0f) */
+      retval = simde_mm512_or_ps(retval, simde_mm512_maskz_mov_ps(~matched, simde_mm512_set1_ps(-SIMDE_MATH_INFINITYF)));
+    }
+
+    return retval;
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_erfcinv_ps
+  #define _mm512_erfcinv_ps(a) simde_mm512_erfcinv_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_erfcinv_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_erfcinv_pd(a);
+  #elif SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+      r_.m256d[i] = simde_mm256_erfcinv_pd(a_.m256d[i]);
+    }
+    return simde__m512d_from_private(r_);
+  #else
+    simde__m512d retval = simde_mm512_setzero_pd();
+    simde__mmask8 matched;
+
+    { /* if (a < 2.0f && a > 0.0625f) */
+      matched =  simde_mm512_cmp_pd_mask(a, simde_mm512_set1_pd(SIMDE_FLOAT64_C(2.0)), SIMDE_CMP_LT_OQ);
+      matched &= simde_mm512_cmp_pd_mask(a, simde_mm512_set1_pd(SIMDE_FLOAT64_C(0.0625)), SIMDE_CMP_GT_OQ);
+
+      if (matched != 0) {
+        retval = simde_mm512_erfinv_pd(simde_mm512_sub_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C(1.0)), a));
+      }
+
+      if (matched == 1) {
+        return retval;
+      }
+    }
+
+    { /* else if (a < 0.0625f && a > 0.0f) */
+      simde__mmask8 mask = simde_mm512_cmp_pd_mask(a, simde_mm512_set1_pd(SIMDE_FLOAT64_C(0.0625)), SIMDE_CMP_LT_OQ);
+      mask &= simde_mm512_cmp_pd_mask(a, simde_mm512_set1_pd(SIMDE_FLOAT64_C(0.0)), SIMDE_CMP_GT_OQ);
+      mask = ~matched & mask;
+
+      if (mask != 0) {
+        matched = matched | mask;
+
+        /* t =  1/(sqrt(-log(a))) */
+        simde__m512d t = simde_x_mm512_negate_pd(simde_mm512_log_pd(a));
+        t = simde_mm512_sqrt_pd(t);
+        t = simde_mm512_div_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C(1.0)), t);
+
+        const simde__m512d p[] = {
+          simde_mm512_set1_pd(SIMDE_FLOAT64_C( 0.1550470003116)),
+          simde_mm512_set1_pd(SIMDE_FLOAT64_C( 1.382719649631)),
+          simde_mm512_set1_pd(SIMDE_FLOAT64_C( 0.690969348887)),
+          simde_mm512_set1_pd(SIMDE_FLOAT64_C(-1.128081391617)),
+          simde_mm512_set1_pd(SIMDE_FLOAT64_C( 0.680544246825)),
+          simde_mm512_set1_pd(SIMDE_FLOAT64_C(-0.16444156791))
+        };
+
+        const simde__m512d q[] = {
+          simde_mm512_set1_pd(SIMDE_FLOAT64_C( 0.155024849822)),
+          simde_mm512_set1_pd(SIMDE_FLOAT64_C( 1.385228141995)),
+          simde_mm512_set1_pd(SIMDE_FLOAT64_C( 1.000000000000))
+        };
+
+        /* float numerator = p[0] / t + p[1] + t * (p[2] + t * (p[3] + t * (p[4] + t * p[5])))) */
+        simde__m512d numerator = simde_mm512_fmadd_pd(p[5], t, p[4]);
+        numerator = simde_mm512_fmadd_pd(numerator, t, p[3]);
+        numerator = simde_mm512_fmadd_pd(numerator, t, p[2]);
+        numerator = simde_mm512_fmadd_pd(numerator, t, p[1]);
+        numerator = simde_mm512_add_pd(numerator, simde_mm512_div_pd(p[0], t));
+
+        /* float denominator = (q[0] + t * (q[1] + t * (q[2]))) */
+        simde__m512d denominator = simde_mm512_fmadd_pd(q[2], t, q[1]);
+        denominator = simde_mm512_fmadd_pd(denominator, t, q[0]);
+
+        simde__m512d res = simde_mm512_div_pd(numerator, denominator);
+
+        retval = simde_mm512_or_pd(retval, simde_mm512_maskz_mov_pd(mask, res));
+      }
+    }
+
+    { /* else if (a < 0.0f) */
+      simde__mmask8 mask = simde_mm512_cmp_pd_mask(a, simde_mm512_set1_pd(SIMDE_FLOAT64_C(0.0)), SIMDE_CMP_LT_OQ);
+      mask = ~matched & mask;
+
+      if (mask != 0) {
+        matched = matched | mask;
+
+        /* t =  1/(sqrt(-log(a))) */
+        simde__m512d t = simde_x_mm512_negate_pd(simde_mm512_log_pd(a));
+        t = simde_mm512_sqrt_pd(t);
+        t = simde_mm512_div_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C(1.0)), t);
+
+        const simde__m512d p[] = {
+          simde_mm512_set1_pd(SIMDE_FLOAT64_C( 0.00980456202915)),
+          simde_mm512_set1_pd(SIMDE_FLOAT64_C( 0.36366788917100)),
+          simde_mm512_set1_pd(SIMDE_FLOAT64_C( 0.97302949837000)),
+          simde_mm512_set1_pd(SIMDE_FLOAT64_C( -0.5374947401000))
+        };
+
+        const simde__m512d q[] = {
+          simde_mm512_set1_pd(SIMDE_FLOAT64_C( 0.00980451277802)),
+          simde_mm512_set1_pd(SIMDE_FLOAT64_C( 0.36369997154400)),
+          simde_mm512_set1_pd(SIMDE_FLOAT64_C( 1.00000000000000))
+        };
+
+        /* float numerator = (p[0] / t + p[1] + t * (p[2] + t * p[3])) */
+        simde__m512d numerator = simde_mm512_fmadd_pd(p[3], t, p[2]);
+        numerator = simde_mm512_fmadd_pd(numerator, t, p[1]);
+        numerator = simde_mm512_add_pd(numerator, simde_mm512_div_pd(p[0], t));
+
+        /* float denominator = (q[0] + t * (q[1] + t * (q[2]))) */
+        simde__m512d denominator = simde_mm512_fmadd_pd(q[2], t, q[1]);
+        denominator = simde_mm512_fmadd_pd(denominator, t, q[0]);
+
+        simde__m512d res = simde_mm512_div_pd(numerator, denominator);
+
+        retval = simde_mm512_or_pd(retval, simde_mm512_maskz_mov_pd(mask, res));
+
+        if (matched == 1) {
+          return retval;
+        }
+      }
+    }
+
+    { /* else if (a == 0.0f) */
+      simde__mmask8 mask = simde_mm512_cmp_pd_mask(a, simde_mm512_set1_pd(SIMDE_FLOAT64_C(0.0)), SIMDE_CMP_EQ_OQ);
+      mask = ~matched & mask;
+      matched = matched | mask;
+
+      simde__m512d res = simde_mm512_set1_pd(SIMDE_MATH_INFINITY);
+
+      retval = simde_mm512_or_pd(retval, simde_mm512_maskz_mov_pd(mask, res));
+    }
+
+    { /* else */
+      /* (a >= 2.0f) */
+      retval = simde_mm512_or_pd(retval, simde_mm512_maskz_mov_pd(~matched, simde_mm512_set1_pd(-SIMDE_MATH_INFINITY)));
+    }
+
+    return retval;
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_erfcinv_pd
+  #define _mm512_erfcinv_pd(a) simde_mm512_erfcinv_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_erfcinv_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_erfcinv_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_erfcinv_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_erfcinv_ps
+  #define _mm512_mask_erfcinv_ps(src, k, a) simde_mm512_mask_erfcinv_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_erfcinv_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_erfcinv_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_erfcinv_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_erfcinv_pd
+  #define _mm512_mask_erfcinv_pd(src, k, a) simde_mm512_mask_erfcinv_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_logb_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_logb_ps(a);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_logbf(a_.f32[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_logb_ps
+  #define _mm_logb_ps(a) simde_mm_logb_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_logb_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_logb_pd(a);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_logb(a_.f64[i]);
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_logb_pd
+  #define _mm_logb_pd(a) simde_mm_logb_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_logb_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_logb_ps(a);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_logb_ps(a_.m128[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_logbf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_logb_ps
+  #define _mm256_logb_ps(a) simde_mm256_logb_ps(a)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_logb_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_logb_pd(a);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_logb_pd(a_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_logb(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_logb_pd
+  #define _mm256_logb_pd(a) simde_mm256_logb_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_logb_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_logb_ps(a);
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_mm256_logb_ps(a_.m256[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_logbf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_logb_ps
+  #define _mm512_logb_ps(a) simde_mm512_logb_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_logb_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_logb_pd(a);
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_logb_pd(a_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_logb(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_logb_pd
+  #define _mm512_logb_pd(a) simde_mm512_logb_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_logb_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_logb_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_logb_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_logb_ps
+  #define _mm512_mask_logb_ps(src, k, a) simde_mm512_mask_logb_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_logb_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_logb_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_logb_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_logb_pd
+  #define _mm512_mask_logb_pd(src, k, a) simde_mm512_mask_logb_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_log2_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_log2_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    #if SIMDE_MATH_SLEEF_VERSION_CHECK(3,4,0) && (SIMDE_ACCURACY_PREFERENCE <= 1)
+      return Sleef_log2f4_u35(a);
+    #else
+      return Sleef_log2f4_u10(a);
+    #endif
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_log2f(a_.f32[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_log2_ps
+  #define _mm_log2_ps(a) simde_mm_log2_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_log2_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_log2_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    #if SIMDE_MATH_SLEEF_VERSION_CHECK(3,4,0) && (SIMDE_ACCURACY_PREFERENCE <= 1)
+      return Sleef_log2d2_u35(a);
+    #else
+      return Sleef_log2d2_u10(a);
+    #endif
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_log2(a_.f64[i]);
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_log2_pd
+  #define _mm_log2_pd(a) simde_mm_log2_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_log2_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_log2_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    #if SIMDE_MATH_SLEEF_VERSION_CHECK(3,4,0) && (SIMDE_ACCURACY_PREFERENCE <= 1)
+      return Sleef_log2f8_u35(a);
+    #else
+      return Sleef_log2f8_u10(a);
+    #endif
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_log2_ps(a_.m128[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_log2f(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_log2_ps
+  #define _mm256_log2_ps(a) simde_mm256_log2_ps(a)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_log2_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_log2_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    #if SIMDE_MATH_SLEEF_VERSION_CHECK(3,4,0) && (SIMDE_ACCURACY_PREFERENCE <= 1)
+      return Sleef_log2d4_u35(a);
+    #else
+      return Sleef_log2d4_u10(a);
+    #endif
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_log2_pd(a_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_log2(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_log2_pd
+  #define _mm256_log2_pd(a) simde_mm256_log2_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_log2_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_log2_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    #if SIMDE_MATH_SLEEF_VERSION_CHECK(3,4,0) && (SIMDE_ACCURACY_PREFERENCE <= 1)
+      return Sleef_log2f16_u35(a);
+    #else
+      return Sleef_log2f16_u10(a);
+    #endif
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_mm256_log2_ps(a_.m256[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_log2f(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_log2_ps
+  #define _mm512_log2_ps(a) simde_mm512_log2_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_log2_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_log2_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    #if SIMDE_MATH_SLEEF_VERSION_CHECK(3,4,0) && (SIMDE_ACCURACY_PREFERENCE <= 1)
+      return Sleef_log2d8_u35(a);
+    #else
+      return Sleef_log2d8_u10(a);
+    #endif
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_log2_pd(a_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_log2(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_log2_pd
+  #define _mm512_log2_pd(a) simde_mm512_log2_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_log2_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_log2_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_log2_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_log2_ps
+  #define _mm512_mask_log2_ps(src, k, a) simde_mm512_mask_log2_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_log2_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_log2_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_log2_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_log2_pd
+  #define _mm512_mask_log2_pd(src, k, a) simde_mm512_mask_log2_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_log1p_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_log1p_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_log1pf4_u10(a);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_log1pf(a_.f32[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_log1p_ps
+  #define _mm_log1p_ps(a) simde_mm_log1p_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_log1p_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_log1p_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_log1pd2_u10(a);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_log1p(a_.f64[i]);
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_log1p_pd
+  #define _mm_log1p_pd(a) simde_mm_log1p_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_log1p_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_log1p_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_log1pf8_u10(a);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_log1p_ps(a_.m128[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_log1pf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_log1p_ps
+  #define _mm256_log1p_ps(a) simde_mm256_log1p_ps(a)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_log1p_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_log1p_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_log1pd4_u10(a);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_log1p_pd(a_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_log1p(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_log1p_pd
+  #define _mm256_log1p_pd(a) simde_mm256_log1p_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_log1p_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_log1p_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_log1pf16_u10(a);
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_mm256_log1p_ps(a_.m256[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_log1pf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_log1p_ps
+  #define _mm512_log1p_ps(a) simde_mm512_log1p_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_log1p_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_log1p_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_log1pd8_u10(a);
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_log1p_pd(a_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_log1p(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_log1p_pd
+  #define _mm512_log1p_pd(a) simde_mm512_log1p_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_log1p_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_log1p_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_log1p_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_log1p_ps
+  #define _mm512_mask_log1p_ps(src, k, a) simde_mm512_mask_log1p_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_log1p_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_log1p_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_log1p_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_log1p_pd
+  #define _mm512_mask_log1p_pd(src, k, a) simde_mm512_mask_log1p_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_log10_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_log10_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_log10f4_u10(a);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_log10f(a_.f32[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_log10_ps
+  #define _mm_log10_ps(a) simde_mm_log10_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_log10_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_log10_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_log10d2_u10(a);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_log10(a_.f64[i]);
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_log10_pd
+  #define _mm_log10_pd(a) simde_mm_log10_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_log10_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_log10_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_log10f8_u10(a);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_log10_ps(a_.m128[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_log10f(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_log10_ps
+  #define _mm256_log10_ps(a) simde_mm256_log10_ps(a)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_log10_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_log10_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_log10d4_u10(a);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_log10_pd(a_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_log10(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_log10_pd
+  #define _mm256_log10_pd(a) simde_mm256_log10_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_log10_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_log10_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_log10f16_u10(a);
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_mm256_log10_ps(a_.m256[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_log10f(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_log10_ps
+  #define _mm512_log10_ps(a) simde_mm512_log10_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_log10_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_log10_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_log10d8_u10(a);
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_log10_pd(a_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_log10(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_log10_pd
+  #define _mm512_log10_pd(a) simde_mm512_log10_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_log10_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_log10_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_log10_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_log10_ps
+  #define _mm512_mask_log10_ps(src, k, a) simde_mm512_mask_log10_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_log10_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_log10_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_log10_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_log10_pd
+  #define _mm512_mask_log10_pd(src, k, a) simde_mm512_mask_log10_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_nearbyint_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_nearbyint_ps(a);
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_nearbyintf(a_.f32[i]);
+    }
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_nearbyint_ps
+  #define _mm512_nearbyint_ps(a) simde_mm512_nearbyint_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_nearbyint_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_nearbyint_pd(a);
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_nearbyint(a_.f64[i]);
+    }
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_nearbyint_pd
+  #define _mm512_nearbyint_pd(a) simde_mm512_nearbyint_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_nearbyint_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_nearbyint_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_nearbyint_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_nearbyint_ps
+  #define _mm512_mask_nearbyint_ps(src, k, a) simde_mm512_mask_nearbyint_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_nearbyint_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_nearbyint_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_nearbyint_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_nearbyint_pd
+  #define _mm512_mask_nearbyint_pd(src, k, a) simde_mm512_mask_nearbyint_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_pow_ps (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_pow_ps(a, b);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_powf4_u10(a, b);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_powf(a_.f32[i], b_.f32[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_pow_ps
+  #define _mm_pow_ps(a, b) simde_mm_pow_ps(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_pow_pd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_pow_pd(a, b);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_powd2_u10(a, b);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_pow(a_.f64[i], b_.f64[i]);
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_pow_pd
+  #define _mm_pow_pd(a, b) simde_mm_pow_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_pow_ps (simde__m256 a, simde__m256 b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_pow_ps(a, b);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_powf8_u10(a, b);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a),
+      b_ = simde__m256_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_powf(a_.f32[i], b_.f32[i]);
+    }
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_pow_ps
+  #define _mm256_pow_ps(a, b) simde_mm256_pow_ps(a, b)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_pow_pd (simde__m256d a, simde__m256d b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_pow_pd(a, b);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_powd4_u10(a, b);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a),
+      b_ = simde__m256d_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_pow(a_.f64[i], b_.f64[i]);
+    }
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_pow_pd
+  #define _mm256_pow_pd(a, b) simde_mm256_pow_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_pow_ps (simde__m512 a, simde__m512 b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_pow_ps(a, b);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_powf16_u10(a, b);
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a),
+      b_ = simde__m512_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_powf(a_.f32[i], b_.f32[i]);
+    }
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_pow_ps
+  #define _mm512_pow_ps(a, b) simde_mm512_pow_ps(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_pow_pd (simde__m512d a, simde__m512d b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_pow_pd(a, b);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_powd8_u10(a, b);
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a),
+      b_ = simde__m512d_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_pow(a_.f64[i], b_.f64[i]);
+    }
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_pow_pd
+  #define _mm512_pow_pd(a, b) simde_mm512_pow_pd(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_pow_ps(simde__m512 src, simde__mmask16 k, simde__m512 a, simde__m512 b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_pow_ps(src, k, a, b);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_pow_ps(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_pow_ps
+  #define _mm512_mask_pow_ps(src, k, a, b) simde_mm512_mask_pow_ps(src, k, a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_pow_pd(simde__m512d src, simde__mmask8 k, simde__m512d a, simde__m512d b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_pow_pd(src, k, a, b);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_pow_pd(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_pow_pd
+  #define _mm512_mask_pow_pd(src, k, a, b) simde_mm512_mask_pow_pd(src, k, a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_clog_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_clog_ps(a);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    simde__m128_private pow_res_ = simde__m128_to_private(simde_mm_pow_ps(a, simde_mm_set1_ps(SIMDE_FLOAT32_C(2.0))));
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i += 2) {
+      r_.f32[  i  ] = simde_math_logf(simde_math_sqrtf(pow_res_.f32[i] + pow_res_.f32[i+1]));
+      r_.f32[i + 1] = simde_math_atan2f(a_.f32[i + 1], a_.f32[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_clog_ps
+  #define _mm_clog_ps(a) simde_mm_clog_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_clog_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_clog_ps(a);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    simde__m256_private pow_res_ = simde__m256_to_private(simde_mm256_pow_ps(a, simde_mm256_set1_ps(SIMDE_FLOAT32_C(2.0))));
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i += 2) {
+      r_.f32[  i  ] = simde_math_logf(simde_math_sqrtf(pow_res_.f32[i] + pow_res_.f32[i + 1]));
+      r_.f32[i + 1] = simde_math_atan2f(a_.f32[i + 1], a_.f32[i]);
+    }
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_clog_ps
+  #define _mm256_clog_ps(a) simde_mm256_clog_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_csqrt_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_csqrt_ps(a);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    simde__m128 pow_res= simde_mm_pow_ps(a,simde_mm_set1_ps(SIMDE_FLOAT32_C(2.0)));
+    simde__m128_private pow_res_=simde__m128_to_private(pow_res);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i+=2) {
+      simde_float32 sign = simde_math_copysignf(SIMDE_FLOAT32_C(1.0), a_.f32[i + 1]);
+      simde_float32 temp = simde_math_sqrtf(pow_res_.f32[i] + pow_res_.f32[i+1]);
+
+      r_.f32[  i  ] =       simde_math_sqrtf(( a_.f32[i] + temp) / SIMDE_FLOAT32_C(2.0));
+      r_.f32[i + 1] = sign * simde_math_sqrtf((-a_.f32[i] + temp) / SIMDE_FLOAT32_C(2.0));
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_csqrt_ps
+  #define _mm_csqrt_ps(a) simde_mm_csqrt_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_csqrt_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_csqrt_ps(a);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    simde__m256 pow_res= simde_mm256_pow_ps(a,simde_mm256_set1_ps(SIMDE_FLOAT32_C(2.0)));
+    simde__m256_private pow_res_=simde__m256_to_private(pow_res);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i+=2) {
+      simde_float32 sign = simde_math_copysignf(SIMDE_FLOAT32_C(1.0), a_.f32[i + 1]);
+      simde_float32 temp = simde_math_sqrtf(pow_res_.f32[i] + pow_res_.f32[i+1]);
+
+      r_.f32[  i  ] =       simde_math_sqrtf(( a_.f32[i] + temp) / SIMDE_FLOAT32_C(2.0));
+      r_.f32[i + 1] = sign * simde_math_sqrtf((-a_.f32[i] + temp) / SIMDE_FLOAT32_C(2.0));
+    }
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_csqrt_ps
+  #define _mm256_csqrt_ps(a) simde_mm256_csqrt_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_rem_epi8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_rem_epi8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
+      r_.i8 = a_.i8 % b_.i8;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = a_.i8[i] % b_.i8[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_rem_epi8
+  #define _mm_rem_epi8(a, b) simde_mm_rem_epi8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_rem_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_rem_epi16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
+      r_.i16 = a_.i16 % b_.i16;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = a_.i16[i] % b_.i16[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_rem_epi16
+  #define _mm_rem_epi16(a, b) simde_mm_rem_epi16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_rem_epi32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_rem_epi32(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
+      r_.i32 = a_.i32 % b_.i32;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = a_.i32[i] % b_.i32[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#define simde_mm_irem_epi32(a, b) simde_mm_rem_epi32(a, b)
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_rem_epi32
+  #define _mm_rem_epi32(a, b) simde_mm_rem_epi32(a, b)
+  #undef _mm_irem_epi32
+  #define _mm_irem_epi32(a, b) simde_mm_rem_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_rem_epi64 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_rem_epi64(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
+      r_.i64 = a_.i64 % b_.i64;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = a_.i64[i] % b_.i64[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_rem_epi64
+  #define _mm_rem_epi64(a, b) simde_mm_rem_epi64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_rem_epu8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_rem_epu8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
+      r_.u8 = a_.u8 % b_.u8;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+        r_.u8[i] = a_.u8[i] % b_.u8[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_rem_epu8
+  #define _mm_rem_epu8(a, b) simde_mm_rem_epu8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_rem_epu16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_rem_epu16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
+      r_.u16 = a_.u16 % b_.u16;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+        r_.u16[i] = a_.u16[i] % b_.u16[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_rem_epu16
+  #define _mm_rem_epu16(a, b) simde_mm_rem_epu16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_rem_epu32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_rem_epu32(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
+      r_.u32 = a_.u32 % b_.u32;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+        r_.u32[i] = a_.u32[i] % b_.u32[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#define simde_mm_urem_epi32(a, b) simde_mm_rem_epu32(a, b)
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_rem_epu32
+  #define _mm_rem_epu32(a, b) simde_mm_rem_epu32(a, b)
+  #undef _mm_urem_epi32
+  #define _mm_urem_epi32(a, b) simde_mm_rem_epu32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_rem_epu64 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_rem_epu64(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
+      r_.u64 = a_.u64 % b_.u64;
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
+        r_.u64[i] = a_.u64[i] % b_.u64[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_rem_epu64
+  #define _mm_rem_epu64(a, b) simde_mm_rem_epu64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_rem_epi8 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_rem_epi8(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
+      r_.i8 = a_.i8 % b_.i8;
+    #else
+      #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+        for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
+          r_.m128i[i] = simde_mm_rem_epi8(a_.m128i[i], b_.m128i[i]);
+        }
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+          r_.i8[i] = a_.i8[i] % b_.i8[i];
+        }
+      #endif
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_rem_epi8
+  #define _mm256_rem_epi8(a, b) simde_mm256_rem_epi8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_rem_epi16 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_rem_epi16(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
+      r_.i16 = a_.i16 % b_.i16;
+    #else
+      #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+        for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
+          r_.m128i[i] = simde_mm_rem_epi16(a_.m128i[i], b_.m128i[i]);
+        }
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+          r_.i16[i] = a_.i16[i] % b_.i16[i];
+        }
+       #endif
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_rem_epi16
+  #define _mm256_rem_epi16(a, b) simde_mm256_rem_epi16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_rem_epi32 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_rem_epi32(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
+      r_.i32 = a_.i32 % b_.i32;
+    #else
+      #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+        for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
+          r_.m128i[i] = simde_mm_rem_epi32(a_.m128i[i], b_.m128i[i]);
+        }
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+          r_.i32[i] = a_.i32[i] % b_.i32[i];
+        }
+       #endif
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#define simde_mm256_irem_epi32(a, b) simde_mm256_rem_epi32(a, b)
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_rem_epi32
+  #define _mm256_rem_epi32(a, b) simde_mm256_rem_epi32(a, b)
+  #undef _mm256_irem_epi32
+  #define _mm256_irem_epi32(a, b) simde_mm256_rem_epi32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_rem_epi64 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_rem_epi64(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
+      r_.i64 = a_.i64 % b_.i64;
+    #else
+      #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+        for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
+          r_.m128i[i] = simde_mm_rem_epi64(a_.m128i[i], b_.m128i[i]);
+        }
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+          r_.i64[i] = a_.i64[i] % b_.i64[i];
+        }
+        #endif
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_rem_epi64
+  #define _mm256_rem_epi64(a, b) simde_mm256_rem_epi64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_rem_epu8 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_rem_epu8(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
+      r_.u8 = a_.u8 % b_.u8;
+    #else
+      #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+        for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
+          r_.m128i[i] = simde_mm_rem_epu8(a_.m128i[i], b_.m128i[i]);
+        }
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+          r_.u8[i] = a_.u8[i] % b_.u8[i];
+        }
+      #endif
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_rem_epu8
+  #define _mm256_rem_epu8(a, b) simde_mm256_rem_epu8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_rem_epu16 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_rem_epu16(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
+      r_.u16 = a_.u16 % b_.u16;
+    #else
+      #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+        for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
+          r_.m128i[i] = simde_mm_rem_epu16(a_.m128i[i], b_.m128i[i]);
+        }
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+          r_.u16[i] = a_.u16[i] % b_.u16[i];
+        }
+      #endif
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_rem_epu16
+  #define _mm256_rem_epu16(a, b) simde_mm256_rem_epu16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_rem_epu32 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_rem_epu32(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
+      r_.u32 = a_.u32 % b_.u32;
+    #else
+      #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+        for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
+          r_.m128i[i] = simde_mm_rem_epu32(a_.m128i[i], b_.m128i[i]);
+        }
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+          r_.u32[i] = a_.u32[i] % b_.u32[i];
+        }
+      #endif
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#define simde_mm256_urem_epi32(a, b) simde_mm256_rem_epu32(a, b)
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_rem_epu32
+  #define _mm256_rem_epu32(a, b) simde_mm256_rem_epu32(a, b)
+  #undef _mm256_urem_epi32
+  #define _mm256_urem_epi32(a, b) simde_mm256_rem_epu32(a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_rem_epu64 (simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_rem_epu64(a, b);
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
+      r_.u64 = a_.u64 % b_.u64;
+    #else
+      #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+        for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
+          r_.m128i[i] = simde_mm_rem_epu64(a_.m128i[i], b_.m128i[i]);
+        }
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
+          r_.u64[i] = a_.u64[i] % b_.u64[i];
+        }
+      #endif
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_rem_epu64
+  #define _mm256_rem_epu64(a, b) simde_mm256_rem_epu64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512i
+simde_mm512_rem_epi8 (simde__m512i a, simde__m512i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_rem_epi8(a, b);
+  #else
+    simde__m512i_private
+      r_,
+      a_ = simde__m512i_to_private(a),
+      b_ = simde__m512i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
+      r_.i8 = a_.i8 % b_.i8;
+    #else
+      #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+        for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
+          r_.m256i[i] = simde_mm256_rem_epi8(a_.m256i[i], b_.m256i[i]);
+        }
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+          r_.i8[i] = a_.i8[i] % b_.i8[i];
+        }
+      #endif
+    #endif
+
+    return simde__m512i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_rem_epi8
+  #define _mm512_rem_epi8(a, b) simde_mm512_rem_epi8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512i
+simde_mm512_rem_epi16 (simde__m512i a, simde__m512i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_rem_epi16(a, b);
+  #else
+    simde__m512i_private
+      r_,
+      a_ = simde__m512i_to_private(a),
+      b_ = simde__m512i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
+      r_.i16 = a_.i16 % b_.i16;
+    #else
+      #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+        for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
+          r_.m256i[i] = simde_mm256_rem_epi16(a_.m256i[i], b_.m256i[i]);
+        }
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+          r_.i16[i] = a_.i16[i] % b_.i16[i];
+        }
+      #endif
+    #endif
+
+    return simde__m512i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_rem_epi16
+  #define _mm512_rem_epi16(a, b) simde_mm512_rem_epi16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512i
+simde_mm512_rem_epi32 (simde__m512i a, simde__m512i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_rem_epi32(a, b);
+  #else
+    simde__m512i_private
+      r_,
+      a_ = simde__m512i_to_private(a),
+      b_ = simde__m512i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
+      r_.i32 = a_.i32 % b_.i32;
+    #else
+      #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+        for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
+          r_.m256i[i] = simde_mm256_rem_epi32(a_.m256i[i], b_.m256i[i]);
+        }
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+          r_.i32[i] = a_.i32[i] % b_.i32[i];
+        }
+        #endif
+    #endif
+
+    return simde__m512i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_rem_epi32
+  #define _mm512_rem_epi32(a, b) simde_mm512_rem_epi32((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512i
+simde_mm512_mask_rem_epi32(simde__m512i src, simde__mmask16 k, simde__m512i a, simde__m512i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_rem_epi32(src, k, a, b);
+  #else
+    return simde_mm512_mask_mov_epi32(src, k, simde_mm512_rem_epi32(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_rem_epi32
+  #define _mm512_mask_rem_epi32(src, k, a, b) simde_mm512_mask_rem_epi32(src, k, a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512i
+simde_mm512_rem_epi64 (simde__m512i a, simde__m512i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_rem_epi64(a, b);
+  #else
+    simde__m512i_private
+      r_,
+      a_ = simde__m512i_to_private(a),
+      b_ = simde__m512i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
+      r_.i64 = a_.i64 % b_.i64;
+    #else
+      #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+        for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
+          r_.m256i[i] = simde_mm256_rem_epi64(a_.m256i[i], b_.m256i[i]);
+        }
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+          r_.i64[i] = a_.i64[i] % b_.i64[i];
+        }
+      #endif
+    #endif
+
+    return simde__m512i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_rem_epi64
+  #define _mm512_rem_epi64(a, b) simde_mm512_rem_epi64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512i
+simde_mm512_rem_epu8 (simde__m512i a, simde__m512i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_rem_epu8(a, b);
+  #else
+    simde__m512i_private
+      r_,
+      a_ = simde__m512i_to_private(a),
+      b_ = simde__m512i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
+      r_.u8 = a_.u8 % b_.u8;
+    #else
+      #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+        for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
+          r_.m256i[i] = simde_mm256_rem_epu8(a_.m256i[i], b_.m256i[i]);
+        }
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+          r_.u8[i] = a_.u8[i] % b_.u8[i];
+        }
+      #endif
+    #endif
+
+    return simde__m512i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_rem_epu8
+  #define _mm512_rem_epu8(a, b) simde_mm512_rem_epu8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512i
+simde_mm512_rem_epu16 (simde__m512i a, simde__m512i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_rem_epu16(a, b);
+  #else
+    simde__m512i_private
+      r_,
+      a_ = simde__m512i_to_private(a),
+      b_ = simde__m512i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
+      r_.u16 = a_.u16 % b_.u16;
+    #else
+      #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+        for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
+          r_.m256i[i] = simde_mm256_rem_epu16(a_.m256i[i], b_.m256i[i]);
+        }
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+          r_.u16[i] = a_.u16[i] % b_.u16[i];
+        }
+      #endif
+    #endif
+
+    return simde__m512i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_rem_epu16
+  #define _mm512_rem_epu16(a, b) simde_mm512_rem_epu16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512i
+simde_mm512_rem_epu32 (simde__m512i a, simde__m512i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_rem_epu32(a, b);
+  #else
+    simde__m512i_private
+      r_,
+      a_ = simde__m512i_to_private(a),
+      b_ = simde__m512i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
+      r_.u32 = a_.u32 % b_.u32;
+    #else
+      #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+        for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
+          r_.m256i[i] = simde_mm256_rem_epu32(a_.m256i[i], b_.m256i[i]);
+        }
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+          r_.u32[i] = a_.u32[i] % b_.u32[i];
+        }
+      #endif
+    #endif
+
+    return simde__m512i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_rem_epu32
+  #define _mm512_rem_epu32(a, b) simde_mm512_rem_epu32((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512i
+simde_mm512_mask_rem_epu32(simde__m512i src, simde__mmask16 k, simde__m512i a, simde__m512i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_rem_epu32(src, k, a, b);
+  #else
+    return simde_mm512_mask_mov_epi32(src, k, simde_mm512_rem_epu32(a, b));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_rem_epu32
+  #define _mm512_mask_rem_epu32(src, k, a, b) simde_mm512_mask_rem_epu32(src, k, a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512i
+simde_mm512_rem_epu64 (simde__m512i a, simde__m512i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_rem_epu64(a, b);
+  #else
+    simde__m512i_private
+      r_,
+      a_ = simde__m512i_to_private(a),
+      b_ = simde__m512i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104)
+      r_.u64 = a_.u64 % b_.u64;
+    #else
+      #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+        for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
+          r_.m256i[i] = simde_mm256_rem_epu64(a_.m256i[i], b_.m256i[i]);
+        }
+      #else
+        SIMDE_VECTORIZE
+        for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
+          r_.u64[i] = a_.u64[i] % b_.u64[i];
+        }
+      #endif
+    #endif
+
+    return simde__m512i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_rem_epu64
+  #define _mm512_rem_epu64(a, b) simde_mm512_rem_epu64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_recip_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_recip_ps(a);
+  #else
+    return simde_mm512_div_ps(simde_mm512_set1_ps(SIMDE_FLOAT32_C(1.0)), a);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_recip_ps
+  #define _mm512_recip_ps(a) simde_mm512_recip_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_recip_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_recip_pd(a);
+  #else
+    return simde_mm512_div_pd(simde_mm512_set1_pd(SIMDE_FLOAT64_C(1.0)), a);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_recip_pd
+  #define _mm512_recip_pd(a) simde_mm512_recip_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_recip_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_recip_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_recip_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_recip_ps
+  #define _mm512_mask_recip_ps(src, k, a) simde_mm512_mask_recip_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_recip_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_recip_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_recip_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_recip_pd
+  #define _mm512_mask_recip_pd(src, k, a) simde_mm512_mask_recip_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_rint_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_rint_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_rintf16(a);
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_rintf(a_.f32[i]);
+    }
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_rint_ps
+  #define _mm512_rint_ps(a) simde_mm512_rint_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_rint_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_rint_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_rintd8(a);
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_rint(a_.f64[i]);
+    }
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_rint_pd
+  #define _mm512_rint_pd(a) simde_mm512_rint_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_rint_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_rint_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_rint_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_rint_ps
+  #define _mm512_mask_rint_ps(src, k, a) simde_mm512_mask_rint_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_rint_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_rint_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_rint_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_rint_pd
+  #define _mm512_mask_rint_pd(src, k, a) simde_mm512_mask_rint_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_sin_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_sin_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_sinf4_u10(a);
+    #else
+      return Sleef_sinf4_u35(a);
+    #endif
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_sinf(a_.f32[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_sin_ps
+  #define _mm_sin_ps(a) simde_mm_sin_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_sin_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_sin_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_sind2_u10(a);
+    #else
+      return Sleef_sind2_u35(a);
+    #endif
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_sin(a_.f64[i]);
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_sin_pd
+  #define _mm_sin_pd(a) simde_mm_sin_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_sin_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_sin_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_sinf8_u10(a);
+    #else
+      return Sleef_sinf8_u35(a);
+    #endif
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_sin_ps(a_.m128[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_sinf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_sin_ps
+  #define _mm256_sin_ps(a) simde_mm256_sin_ps(a)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_sin_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_sin_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_sind4_u10(a);
+    #else
+      return Sleef_sind4_u35(a);
+    #endif
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_sin_pd(a_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_sin(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_sin_pd
+  #define _mm256_sin_pd(a) simde_mm256_sin_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_sin_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_sin_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_sinf16_u10(a);
+    #else
+      return Sleef_sinf16_u35(a);
+    #endif
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_mm256_sin_ps(a_.m256[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_sinf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_sin_ps
+  #define _mm512_sin_ps(a) simde_mm512_sin_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_sin_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_sin_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_sind8_u10(a);
+    #else
+      return Sleef_sind8_u35(a);
+    #endif
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_sin_pd(a_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_sin(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_sin_pd
+  #define _mm512_sin_pd(a) simde_mm512_sin_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_sin_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_sin_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_sin_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_sin_ps
+  #define _mm512_mask_sin_ps(src, k, a) simde_mm512_mask_sin_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_sin_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_sin_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_sin_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_sin_pd
+  #define _mm512_mask_sin_pd(src, k, a) simde_mm512_mask_sin_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_sincos_ps (simde__m128* mem_addr, simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_sincos_ps(HEDLEY_REINTERPRET_CAST(__m128*, mem_addr), a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    Sleef___m128_2 temp;
+
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      temp = Sleef_sincosf4_u10(a);
+    #else
+      temp = Sleef_sincosf4_u35(a);
+    #endif
+
+    *mem_addr = temp.y;
+    return temp.x;
+  #else
+    simde__m128 r;
+
+    r = simde_mm_sin_ps(a);
+    *mem_addr = simde_mm_cos_ps(a);
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_sincos_ps
+  #define _mm_sincos_ps(mem_addr, a) simde_mm_sincos_ps((mem_addr),(a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_sincos_pd (simde__m128d* mem_addr, simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_sincos_pd(HEDLEY_REINTERPRET_CAST(__m128d*, mem_addr), a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    Sleef___m128d_2 temp;
+
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      temp = Sleef_sincosd2_u10(a);
+    #else
+      temp = Sleef_sincosd2_u35(a);
+    #endif
+
+    *mem_addr = temp.y;
+    return temp.x;
+  #else
+    simde__m128d r;
+
+    r = simde_mm_sin_pd(a);
+    *mem_addr = simde_mm_cos_pd(a);
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_sincos_pd
+  #define _mm_sincos_pd(mem_addr, a) simde_mm_sincos_pd((mem_addr),(a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_sincos_ps (simde__m256* mem_addr, simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_sincos_ps(HEDLEY_REINTERPRET_CAST(__m256*, mem_addr), a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    Sleef___m256_2 temp;
+
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      temp = Sleef_sincosf8_u10(a);
+    #else
+      temp = Sleef_sincosf8_u35(a);
+    #endif
+
+    *mem_addr = temp.y;
+    return temp.x;
+  #else
+    simde__m256 r;
+
+    r = simde_mm256_sin_ps(a);
+    *mem_addr = simde_mm256_cos_ps(a);
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_sincos_ps
+  #define _mm256_sincos_ps(mem_addr, a) simde_mm256_sincos_ps((mem_addr),(a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_sincos_pd (simde__m256d* mem_addr, simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_sincos_pd(HEDLEY_REINTERPRET_CAST(__m256d*, mem_addr), a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    Sleef___m256d_2 temp;
+
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      temp = Sleef_sincosd4_u10(a);
+    #else
+      temp = Sleef_sincosd4_u35(a);
+    #endif
+
+    *mem_addr = temp.y;
+    return temp.x;
+  #else
+    simde__m256d r;
+
+    r = simde_mm256_sin_pd(a);
+    *mem_addr = simde_mm256_cos_pd(a);
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_sincos_pd
+  #define _mm256_sincos_pd(mem_addr, a) simde_mm256_sincos_pd((mem_addr),(a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_sincos_ps (simde__m512* mem_addr, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_sincos_ps(HEDLEY_REINTERPRET_CAST(__m512*, mem_addr), a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    Sleef___m512_2 temp;
+
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      temp = Sleef_sincosf16_u10(a);
+    #else
+      temp = Sleef_sincosf16_u35(a);
+    #endif
+
+    *mem_addr = temp.y;
+    return temp.x;
+  #else
+    simde__m512 r;
+
+    r = simde_mm512_sin_ps(a);
+    *mem_addr = simde_mm512_cos_ps(a);
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_sincos_ps
+  #define _mm512_sincos_ps(mem_addr, a) simde_mm512_sincos_ps((mem_addr),(a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_sincos_pd (simde__m512d* mem_addr, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_sincos_pd(HEDLEY_REINTERPRET_CAST(__m512d*, mem_addr), a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    Sleef___m512d_2 temp;
+
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      temp = Sleef_sincosd8_u10(a);
+    #else
+      temp = Sleef_sincosd8_u35(a);
+    #endif
+
+    *mem_addr = temp.y;
+    return temp.x;
+  #else
+    simde__m512d r;
+
+    r = simde_mm512_sin_pd(a);
+    *mem_addr = simde_mm512_cos_pd(a);
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_sincos_pd
+  #define _mm512_sincos_pd(mem_addr, a) simde_mm512_sincos_pd((mem_addr),(a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_sincos_ps(simde__m512* mem_addr, simde__m512 sin_src, simde__m512 cos_src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_sincos_ps(mem_addr, sin_src, cos_src, k, a);
+  #else
+    simde__m512 cos_res, sin_res;
+    sin_res = simde_mm512_sincos_ps(&cos_res, a);
+    *mem_addr = simde_mm512_mask_mov_ps(cos_src, k, cos_res);
+    return simde_mm512_mask_mov_ps(sin_src, k, sin_res);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_sincos_ps
+  #define _mm512_mask_sincos_ps(mem_addr, sin_src, cos_src, k, a) simde_mm512_mask_sincos_ps(mem_addr, sin_src, cos_src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_sincos_pd(simde__m512d* mem_addr, simde__m512d sin_src, simde__m512d cos_src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_sincos_pd(mem_addr, sin_src, cos_src, k, a);
+  #else
+    simde__m512d cos_res, sin_res;
+    sin_res = simde_mm512_sincos_pd(&cos_res, a);
+    *mem_addr = simde_mm512_mask_mov_pd(cos_src, k, cos_res);
+    return simde_mm512_mask_mov_pd(sin_src, k, sin_res);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_sincos_pd
+  #define _mm512_mask_sincos_pd(mem_addr, sin_src, cos_src, k, a) simde_mm512_mask_sincos_pd(mem_addr, sin_src, cos_src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_sind_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_sind_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_sinf4_u10(simde_x_mm_deg2rad_ps(a));
+    #else
+      return Sleef_sinf4_u35(simde_x_mm_deg2rad_ps(a));
+    #endif
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_sinf(simde_math_deg2radf(a_.f32[i]));
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_sind_ps
+  #define _mm_sind_ps(a) simde_mm_sind_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_sind_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_sind_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_sind2_u10(simde_x_mm_deg2rad_pd(a));
+    #else
+      return Sleef_sind2_u35(simde_x_mm_deg2rad_pd(a));
+    #endif
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_sin(simde_math_deg2rad(a_.f64[i]));
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_sind_pd
+  #define _mm_sind_pd(a) simde_mm_sind_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_sind_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_sind_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_sinf8_u10(simde_x_mm256_deg2rad_ps(a));
+    #else
+      return Sleef_sinf8_u35(simde_x_mm256_deg2rad_ps(a));
+    #endif
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_sind_ps(a_.m128[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_sinf(simde_math_deg2radf(a_.f32[i]));
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_sind_ps
+  #define _mm256_sind_ps(a) simde_mm256_sind_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_sind_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_sind_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_sind4_u10(simde_x_mm256_deg2rad_pd(a));
+    #else
+      return Sleef_sind4_u35(simde_x_mm256_deg2rad_pd(a));
+    #endif
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_sind_pd(a_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_sin(simde_math_deg2rad(a_.f64[i]));
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_sind_pd
+  #define _mm256_sind_pd(a) simde_mm256_sind_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_sind_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_sind_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_sinf16_u10(simde_x_mm512_deg2rad_ps(a));
+    #else
+      return Sleef_sinf16_u35(simde_x_mm512_deg2rad_ps(a));
+    #endif
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_mm256_sind_ps(a_.m256[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_sinf(simde_math_deg2radf(a_.f32[i]));
+      }
+    #endif
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_sind_ps
+  #define _mm512_sind_ps(a) simde_mm512_sind_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_sind_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_sind_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_sind8_u10(simde_x_mm512_deg2rad_pd(a));
+    #else
+      return Sleef_sind8_u35(simde_x_mm512_deg2rad_pd(a));
+    #endif
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_sind_pd(a_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_sin(simde_math_deg2rad(a_.f64[i]));
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_sind_pd
+  #define _mm512_sind_pd(a) simde_mm512_sind_pd(a)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_sind_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_sind_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_sind_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_sind_ps
+  #define _mm512_mask_sind_ps(src, k, a) simde_mm512_mask_sind_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_sind_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_sind_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_sind_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_sind_pd
+  #define _mm512_mask_sind_pd(src, k, a) simde_mm512_mask_sind_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_sinh_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_sinh_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_sinhf4_u10(a);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_sinhf(a_.f32[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_sinh_ps
+  #define _mm_sinh_ps(a) simde_mm_sinh_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_sinh_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_sinh_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_sinhd2_u10(a);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_sinh(a_.f64[i]);
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_sinh_pd
+  #define _mm_sinh_pd(a) simde_mm_sinh_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_sinh_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_sinh_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_sinhf8_u10(a);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_sinh_ps(a_.m128[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_sinhf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_sinh_ps
+  #define _mm256_sinh_ps(a) simde_mm256_sinh_ps(a)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_sinh_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_sinh_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_sinhd4_u10(a);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_sinh_pd(a_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_sinh(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_sinh_pd
+  #define _mm256_sinh_pd(a) simde_mm256_sinh_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_sinh_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_sinh_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_sinhf16_u10(a);
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_mm256_sinh_ps(a_.m256[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_sinhf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_sinh_ps
+  #define _mm512_sinh_ps(a) simde_mm512_sinh_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_sinh_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_sinh_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_sinhd8_u10(a);
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_sinh_pd(a_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_sinh(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_sinh_pd
+  #define _mm512_sinh_pd(a) simde_mm512_sinh_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_sinh_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_sinh_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_sinh_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_sinh_ps
+  #define _mm512_mask_sinh_ps(src, k, a) simde_mm512_mask_sinh_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_sinh_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_sinh_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_sinh_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_sinh_pd
+  #define _mm512_mask_sinh_pd(src, k, a) simde_mm512_mask_sinh_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_svml_ceil_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_svml_ceil_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_ceilf4(a);
+  #else
+    return simde_mm_round_ps(a, SIMDE_MM_FROUND_TO_POS_INF);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_svml_ceil_ps
+  #define _mm_svml_ceil_ps(a) simde_mm_svml_ceil_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_svml_ceil_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_svml_ceil_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_ceild2(a);
+  #else
+    return simde_mm_round_pd(a, SIMDE_MM_FROUND_TO_POS_INF);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_svml_ceil_pd
+  #define _mm_svml_ceil_pd(a) simde_mm_svml_ceil_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_svml_ceil_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_svml_ceil_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_ceilf8(a);
+  #else
+    return simde_mm256_round_ps(a, SIMDE_MM_FROUND_TO_POS_INF);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_svml_ceil_ps
+  #define _mm256_svml_ceil_ps(a) simde_mm256_svml_ceil_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_svml_ceil_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_svml_ceil_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_ceild4(a);
+  #else
+    return simde_mm256_round_pd(a, SIMDE_MM_FROUND_TO_POS_INF);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_svml_ceil_pd
+  #define _mm256_svml_ceil_pd(a) simde_mm256_svml_ceil_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_ceil_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_ceil_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_ceilf16(a);
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_mm256_ceil_ps(a_.m256[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_ceilf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_ceil_ps
+  #define _mm512_ceil_ps(a) simde_mm512_ceil_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_ceil_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_ceil_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_ceild8(a);
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_ceil_pd(a_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_ceil(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_ceil_pd
+  #define _mm512_ceil_pd(a) simde_mm512_ceil_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_ceil_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_ceil_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_ceil_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_ceil_ps
+  #define _mm512_mask_ceil_ps(src, k, a) simde_mm512_mask_ceil_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_ceil_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_ceil_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_ceil_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_ceil_pd
+  #define _mm512_mask_ceil_pd(src, k, a) simde_mm512_mask_ceil_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_svml_floor_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_svml_floor_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_floorf4(a);
+  #else
+    return simde_mm_round_ps(a, SIMDE_MM_FROUND_TO_NEG_INF);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_svml_floor_ps
+  #define _mm_svml_floor_ps(a) simde_mm_svml_floor_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_svml_floor_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_svml_floor_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_floord2(a);
+  #else
+    return simde_mm_round_pd(a, SIMDE_MM_FROUND_TO_NEG_INF);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_svml_floor_pd
+  #define _mm_svml_floor_pd(a) simde_mm_svml_floor_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_svml_floor_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_svml_floor_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_floorf8(a);
+  #else
+    return simde_mm256_round_ps(a, SIMDE_MM_FROUND_TO_NEG_INF);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_svml_floor_ps
+  #define _mm256_svml_floor_ps(a) simde_mm256_svml_floor_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_svml_floor_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_svml_floor_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_floord4(a);
+  #else
+    return simde_mm256_round_pd(a, SIMDE_MM_FROUND_TO_NEG_INF);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_svml_floor_pd
+  #define _mm256_svml_floor_pd(a) simde_mm256_svml_floor_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_floor_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_floor_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_floorf16(a);
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_mm256_floor_ps(a_.m256[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_floorf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_floor_ps
+  #define _mm512_floor_ps(a) simde_mm512_floor_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_floor_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_floor_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_floord8(a);
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_floor_pd(a_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_floor(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_floor_pd
+  #define _mm512_floor_pd(a) simde_mm512_floor_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_floor_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_floor_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_floor_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_floor_ps
+  #define _mm512_mask_floor_ps(src, k, a) simde_mm512_mask_floor_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_floor_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_floor_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_floor_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_floor_pd
+  #define _mm512_mask_floor_pd(src, k, a) simde_mm512_mask_floor_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_svml_round_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_svml_round_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_roundf4(a);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_roundf(a_.f32[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_svml_round_ps
+  #define _mm_svml_round_ps(a) simde_mm_svml_round_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_svml_round_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_svml_round_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_roundd2(a);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_round(a_.f64[i]);
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_svml_round_pd
+  #define _mm_svml_round_pd(a) simde_mm_svml_round_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_svml_round_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_svml_round_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_roundf8(a);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_svml_round_ps(a_.m128[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_roundf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_svml_round_ps
+  #define _mm256_svml_round_ps(a) simde_mm256_svml_round_ps(a)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_svml_round_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_svml_round_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_roundd4(a);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_svml_round_pd(a_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_round(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_svml_round_pd
+  #define _mm256_svml_round_pd(a) simde_mm256_svml_round_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_svml_round_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_svml_round_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_roundd8(a);
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_svml_round_pd(a_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_round(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_svml_round_pd
+  #define _mm512_svml_round_pd(a) simde_mm512_svml_round_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_svml_round_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_svml_round_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_svml_round_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_svml_round_pd
+  #define _mm512_mask_svml_round_pd(src, k, a) simde_mm512_mask_svml_round_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_svml_sqrt_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_svml_sqrt_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_sqrtf4(a);
+  #else
+    return simde_mm_sqrt_ps(a);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_svml_sqrt_ps
+  #define _mm_svml_sqrt_ps(a) simde_mm_svml_sqrt_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_svml_sqrt_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_svml_sqrt_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_sqrtd2(a);
+  #else
+    return simde_mm_sqrt_pd(a);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_svml_sqrt_pd
+  #define _mm_svml_sqrt_pd(a) simde_mm_svml_sqrt_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_svml_sqrt_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_svml_sqrt_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_sqrtf8(a);
+  #else
+    return simde_mm256_sqrt_ps(a);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_svml_sqrt_ps
+  #define _mm256_svml_sqrt_ps(a) simde_mm256_svml_sqrt_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_svml_sqrt_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_svml_sqrt_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_sqrtd4(a);
+  #else
+    return simde_mm256_sqrt_pd(a);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_svml_sqrt_pd
+  #define _mm256_svml_sqrt_pd(a) simde_mm256_svml_sqrt_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_svml_sqrt_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_svml_sqrt_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_sqrtf16(a);
+  #else
+    return simde_mm512_sqrt_ps(a);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_svml_sqrt_ps
+  #define _mm512_svml_sqrt_ps(a) simde_mm512_svml_sqrt_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_svml_sqrt_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_svml_sqrt_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_sqrtd8(a);
+  #else
+    return simde_mm512_sqrt_pd(a);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_svml_sqrt_pd
+  #define _mm512_svml_sqrt_pd(a) simde_mm512_svml_sqrt_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_tan_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_tan_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_tanf4_u10(a);
+    #else
+      return Sleef_tanf4_u35(a);
+    #endif
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_tanf(a_.f32[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_tan_ps
+  #define _mm_tan_ps(a) simde_mm_tan_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_tan_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_tan_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_tand2_u10(a);
+    #else
+      return Sleef_tand2_u35(a);
+    #endif
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_tan(a_.f64[i]);
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_tan_pd
+  #define _mm_tan_pd(a) simde_mm_tan_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_tan_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_tan_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_tanf8_u10(a);
+    #else
+      return Sleef_tanf8_u35(a);
+    #endif
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_tan_ps(a_.m128[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_tanf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_tan_ps
+  #define _mm256_tan_ps(a) simde_mm256_tan_ps(a)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_tan_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_tan_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_tand4_u10(a);
+    #else
+      return Sleef_tand4_u35(a);
+    #endif
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_tan_pd(a_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_tan(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_tan_pd
+  #define _mm256_tan_pd(a) simde_mm256_tan_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_tan_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_tan_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_tanf16_u10(a);
+    #else
+      return Sleef_tanf16_u35(a);
+    #endif
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_mm256_tan_ps(a_.m256[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_tanf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_tan_ps
+  #define _mm512_tan_ps(a) simde_mm512_tan_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_tan_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_tan_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_tand8_u10(a);
+    #else
+      return Sleef_tand8_u35(a);
+    #endif
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_tan_pd(a_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_tan(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_tan_pd
+  #define _mm512_tan_pd(a) simde_mm512_tan_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_tan_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_tan_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_tan_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_tan_ps
+  #define _mm512_mask_tan_ps(src, k, a) simde_mm512_mask_tan_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_tan_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_tan_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_tan_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_tan_pd
+  #define _mm512_mask_tan_pd(src, k, a) simde_mm512_mask_tan_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_tand_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_tand_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_tanf4_u10(simde_x_mm_deg2rad_ps(a));
+    #else
+      return Sleef_tanf4_u35(simde_x_mm_deg2rad_ps(a));
+    #endif
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_tanf(simde_math_deg2radf(a_.f32[i]));
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_tand_ps
+  #define _mm_tand_ps(a) simde_mm_tand_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_tand_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_tand_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_tand2_u10(simde_x_mm_deg2rad_pd(a));
+    #else
+      return Sleef_tand2_u35(simde_x_mm_deg2rad_pd(a));
+    #endif
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_tan(simde_math_deg2rad(a_.f64[i]));
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_tand_pd
+  #define _mm_tand_pd(a) simde_mm_tand_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_tand_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_tand_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_tanf8_u10(simde_x_mm256_deg2rad_ps(a));
+    #else
+      return Sleef_tanf8_u35(simde_x_mm256_deg2rad_ps(a));
+    #endif
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_tand_ps(a_.m128[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_tanf(simde_math_deg2radf(a_.f32[i]));
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_tand_ps
+  #define _mm256_tand_ps(a) simde_mm256_tand_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_tand_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_tand_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_tand4_u10(simde_x_mm256_deg2rad_pd(a));
+    #else
+      return Sleef_tand4_u35(simde_x_mm256_deg2rad_pd(a));
+    #endif
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_tand_pd(a_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_tan(simde_math_deg2rad(a_.f64[i]));
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_tand_pd
+  #define _mm256_tand_pd(a) simde_mm256_tand_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_tand_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_tand_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_tanf16_u10(simde_x_mm512_deg2rad_ps(a));
+    #else
+      return Sleef_tanf16_u35(simde_x_mm512_deg2rad_ps(a));
+    #endif
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_mm256_tand_ps(a_.m256[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_tanf(simde_math_deg2radf(a_.f32[i]));
+      }
+    #endif
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_tand_ps
+  #define _mm512_tand_ps(a) simde_mm512_tand_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_tand_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_tand_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    #if SIMDE_ACCURACY_PREFERENCE > 1
+      return Sleef_tand8_u10(simde_x_mm512_deg2rad_pd(a));
+    #else
+      return Sleef_tand8_u35(simde_x_mm512_deg2rad_pd(a));
+    #endif
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+  #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_tand_pd(a_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_tan(simde_math_deg2rad(a_.f64[i]));
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_tand_pd
+  #define _mm512_tand_pd(a) simde_mm512_tand_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_tand_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_tand_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_tand_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_tand_ps
+  #define _mm512_mask_tand_ps(src, k, a) simde_mm512_mask_tand_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_tand_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_tand_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_tand_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_tand_pd
+  #define _mm512_mask_tand_pd(src, k, a) simde_mm512_mask_tand_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_tanh_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_tanh_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_tanhf4_u10(a);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      r_.f32[i] = simde_math_tanhf(a_.f32[i]);
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_tanh_ps
+  #define _mm_tanh_ps(a) simde_mm_tanh_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_tanh_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_tanh_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_tanhd2_u10(a);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      r_.f64[i] = simde_math_tanh(a_.f64[i]);
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_tanh_pd
+  #define _mm_tanh_pd(a) simde_mm_tanh_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_tanh_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_tanh_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_tanhf8_u10(a);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_tanh_ps(a_.m128[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_tanhf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_tanh_ps
+  #define _mm256_tanh_ps(a) simde_mm256_tanh_ps(a)
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_tanh_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_tanh_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_tanhd4_u10(a);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_tanh_pd(a_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_tanh(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_tanh_pd
+  #define _mm256_tanh_pd(a) simde_mm256_tanh_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_tanh_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_tanh_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_tanhf16_u10(a);
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_mm256_tanh_ps(a_.m256[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_tanhf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_tanh_ps
+  #define _mm512_tanh_ps(a) simde_mm512_tanh_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_tanh_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_tanh_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_tanhd8_u10(a);
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_tanh_pd(a_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_tanh(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_tanh_pd
+  #define _mm512_tanh_pd(a) simde_mm512_tanh_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_tanh_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_tanh_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_tanh_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_tanh_ps
+  #define _mm512_mask_tanh_ps(src, k, a) simde_mm512_mask_tanh_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_tanh_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_tanh_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_tanh_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_tanh_pd
+  #define _mm512_mask_tanh_pd(src, k, a) simde_mm512_mask_tanh_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_trunc_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_trunc_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_truncf4(a);
+  #else
+    return simde_mm_round_ps(a, SIMDE_MM_FROUND_TO_ZERO);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_trunc_ps
+  #define _mm_trunc_ps(a) simde_mm_trunc_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_trunc_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_trunc_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_SSE_NATIVE)
+    return Sleef_truncd2(a);
+  #else
+    return simde_mm_round_pd(a, SIMDE_MM_FROUND_TO_ZERO);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_trunc_pd
+  #define _mm_trunc_pd(a) simde_mm_trunc_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_trunc_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_trunc_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_truncf8(a);
+  #else
+    return simde_mm256_round_ps(a, SIMDE_MM_FROUND_TO_ZERO);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_trunc_ps
+  #define _mm256_trunc_ps(a) simde_mm256_trunc_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_trunc_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_trunc_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX_NATIVE)
+    return Sleef_truncd4(a);
+  #else
+    return simde_mm256_round_pd(a, SIMDE_MM_FROUND_TO_ZERO);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_trunc_pd
+  #define _mm256_trunc_pd(a) simde_mm256_trunc_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_trunc_ps (simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_trunc_ps(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_truncf16(a);
+  #else
+    simde__m512_private
+      r_,
+      a_ = simde__m512_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
+        r_.m256[i] = simde_mm256_trunc_ps(a_.m256[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        r_.f32[i] = simde_math_truncf(a_.f32[i]);
+      }
+    #endif
+
+    return simde__m512_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_trunc_ps
+  #define _mm512_trunc_ps(a) simde_mm512_trunc_ps(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_trunc_pd (simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_trunc_pd(a);
+  #elif defined(SIMDE_MATH_SLEEF_ENABLE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return Sleef_truncd8(a);
+  #else
+    simde__m512d_private
+      r_,
+      a_ = simde__m512d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
+      for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
+        r_.m256d[i] = simde_mm256_trunc_pd(a_.m256d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        r_.f64[i] = simde_math_trunc(a_.f64[i]);
+      }
+    #endif
+
+    return simde__m512d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_trunc_pd
+  #define _mm512_trunc_pd(a) simde_mm512_trunc_pd(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512
+simde_mm512_mask_trunc_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_trunc_ps(src, k, a);
+  #else
+    return simde_mm512_mask_mov_ps(src, k, simde_mm512_trunc_ps(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_trunc_ps
+  #define _mm512_mask_trunc_ps(src, k, a) simde_mm512_mask_trunc_ps(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m512d
+simde_mm512_mask_trunc_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
+    return _mm512_mask_trunc_pd(src, k, a);
+  #else
+    return simde_mm512_mask_mov_pd(src, k, simde_mm512_trunc_pd(a));
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm512_mask_trunc_pd
+  #define _mm512_mask_trunc_pd(src, k, a) simde_mm512_mask_trunc_pd(src, k, a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_udivrem_epi32 (simde__m128i * mem_addr, simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE)
+    return _mm_udivrem_epi32(mem_addr, a, b);
+  #else
+    simde__m128i r;
+
+    r = simde_mm_div_epu32(a, b);
+    *mem_addr = simde_x_mm_sub_epu32(a, simde_x_mm_mullo_epu32(r, b));
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm_udivrem_epi32
+  #define _mm_udivrem_epi32(mem_addr, a, b) simde_mm_udivrem_epi32((mem_addr),(a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_udivrem_epi32 (simde__m256i* mem_addr, simde__m256i a, simde__m256i b) {
+  #if defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
+    return _mm256_udivrem_epi32(HEDLEY_REINTERPRET_CAST(__m256i*, mem_addr), a, b);
+  #else
+    simde__m256i r;
+
+    r = simde_mm256_div_epu32(a, b);
+    *mem_addr = simde_x_mm256_sub_epu32(a, simde_x_mm256_mullo_epu32(r, b));
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES)
+  #undef _mm256_udivrem_epi32
+  #define _mm256_udivrem_epi32(mem_addr, a, b) simde_mm256_udivrem_epi32((mem_addr),(a), (b))
+#endif
+
+SIMDE_END_DECLS_
+
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_X86_SVML_H) */
diff --git a/external_libs/pgenlib/simde/x86/xop.h b/external_libs/pgenlib/simde/x86/xop.h
new file mode 100644
index 0000000..5249f06
--- /dev/null
+++ b/external_libs/pgenlib/simde/x86/xop.h
@@ -0,0 +1,3740 @@
+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2020      Evan Nemerson <evan@nemerson.com>
+ */
+
+#if !defined(SIMDE_X86_XOP_H)
+#define SIMDE_X86_XOP_H
+
+#include "avx2.h"
+
+#if !defined(SIMDE_X86_XOP_NATIVE) && defined(SIMDE_ENABLE_NATIVE_ALIASES)
+#  define SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES
+#endif
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_cmov_si128 (simde__m128i a, simde__m128i b, simde__m128i c) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_cmov_si128(a, b, c);
+  #elif defined(SIMDE_X86_AVX512VL_NATIVE)
+    return _mm_ternarylogic_epi32(a, b, c, 0xe4);
+  #elif defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_or_si128(_mm_and_si128(c, a), _mm_andnot_si128(c, b));
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b),
+      c_ = simde__m128i_to_private(c);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i8 = vbslq_s8(c_.neon_u8, a_.neon_i8, b_.neon_i8);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_v128_bitselect(a_.wasm_v128, b_.wasm_v128, c_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
+      r_.altivec_i32 = vec_sel(b_.altivec_i32, a_.altivec_i32, c_.altivec_u32);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32f = (c_.i32f & a_.i32f) | (~c_.i32f & b_.i32f);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) {
+        r_.i32f[i] = (c_.i32f[i] & a_.i32f[i]) | (~c_.i32f[i] & b_.i32f[i]);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_cmov_si128(a, b, c) simde_mm_cmov_si128((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256i
+simde_mm256_cmov_si256 (simde__m256i a, simde__m256i b, simde__m256i c) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(SIMDE_X86_AVX_NATIVE) && !defined(SIMDE_BUG_GCC_98521) && !defined(SIMDE_BUG_MCST_LCC_MISSING_CMOV_M256)
+    return _mm256_cmov_si256(a, b, c);
+  #elif defined(SIMDE_X86_AVX512VL_NATIVE)
+    return _mm256_ternarylogic_epi32(a, b, c, 0xe4);
+  #elif defined(SIMDE_X86_AVX2_NATIVE)
+    return _mm256_or_si256(_mm256_and_si256(c, a), _mm256_andnot_si256(c, b));
+  #else
+    simde__m256i_private
+      r_,
+      a_ = simde__m256i_to_private(a),
+      b_ = simde__m256i_to_private(b),
+      c_ = simde__m256i_to_private(c);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128i) / sizeof(r_.m128i[0])) ; i++) {
+        r_.m128i[i] = simde_mm_cmov_si128(a_.m128i[i], b_.m128i[i], c_.m128i[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) {
+        r_.i32f[i] = (c_.i32f[i] & a_.i32f[i]) | (~c_.i32f[i] & b_.i32f[i]);
+      }
+    #endif
+
+    return simde__m256i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm256_cmov_si256(a, b, c) simde_mm256_cmov_si256((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comeq_epi8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_EQ)
+    return _mm_com_epi8(a, b, _MM_PCOMCTRL_EQ);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comeq_epi8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u8 = vceqq_s8(a_.neon_i8, b_.neon_i8);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i8 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i8), a_.i8 == b_.i8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = (a_.i8[i] == b_.i8[i]) ? ~INT8_C(0) : INT8_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comeq_epi8(a, b) simde_mm_comeq_epi8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comeq_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_EQ)
+    return _mm_com_epi16(a, b, _MM_PCOMCTRL_EQ);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comeq_epi16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u16 = vceqq_s16(a_.neon_i16, b_.neon_i16);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i16), a_.i16 == b_.i16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = (a_.i16[i] == b_.i16[i]) ? ~INT16_C(0) : INT16_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comeq_epi16(a, b) simde_mm_comeq_epi16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comeq_epi32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_EQ)
+    return _mm_com_epi32(a, b, _MM_PCOMCTRL_EQ);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comeq_epi32(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vceqq_s32(a_.neon_i32, b_.neon_i32);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), a_.i32 == b_.i32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = (a_.i32[i] == b_.i32[i]) ? ~INT32_C(0) : INT32_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comeq_epi32(a, b) simde_mm_comeq_epi32((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comeq_epi64 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_EQ)
+    return _mm_com_epi64(a, b, _MM_PCOMCTRL_EQ);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comeq_epi64(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_u64 = vceqq_s64(a_.neon_i64, b_.neon_i64);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), a_.i64 == b_.i64);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = (a_.i64[i] == b_.i64[i]) ? ~INT64_C(0) : INT64_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comeq_epi64(a, b) simde_mm_comeq_epi64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comeq_epu8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_EQ)
+    return _mm_com_epu8(a, b, _MM_PCOMCTRL_EQ);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comeq_epu8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u8 = vceqq_u8(a_.neon_u8, b_.neon_u8);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u8 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u8), a_.u8 == b_.u8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+        r_.u8[i] = (a_.u8[i] == b_.u8[i]) ? ~INT8_C(0) : INT8_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comeq_epu8(a, b) simde_mm_comeq_epu8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comeq_epu16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_EQ)
+    return _mm_com_epu16(a, b, _MM_PCOMCTRL_EQ);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comeq_epu16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u16 = vceqq_u16(a_.neon_u16, b_.neon_u16);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u16), a_.u16 == b_.u16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+        r_.u16[i] = (a_.u16[i] == b_.u16[i]) ? ~INT16_C(0) : INT16_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comeq_epu16(a, b) simde_mm_comeq_epu16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comeq_epu32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_EQ)
+    return _mm_com_epu32(a, b, _MM_PCOMCTRL_EQ);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comeq_epu32(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vceqq_u32(a_.neon_u32, b_.neon_u32);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u32), a_.u32 == b_.u32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+        r_.u32[i] = (a_.u32[i] == b_.u32[i]) ? ~INT32_C(0) : INT32_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comeq_epu32(a, b) simde_mm_comeq_epu32((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comeq_epu64 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_EQ)
+    return _mm_com_epu64(a, b, _MM_PCOMCTRL_EQ);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comeq_epu64(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_u64 = vceqq_u64(a_.neon_u64, b_.neon_u64);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u64), a_.u64 == b_.u64);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
+        r_.u64[i] = (a_.u64[i] == b_.u64[i]) ? ~INT64_C(0) : INT64_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comeq_epu64(a, b) simde_mm_comeq_epu64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comge_epi8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_GE)
+    return _mm_com_epi8(a, b, _MM_PCOMCTRL_GE);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comge_epi8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u8 = vcgeq_s8(a_.neon_i8, b_.neon_i8);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i8 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i8), a_.i8 >= b_.i8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = (a_.i8[i] >= b_.i8[i]) ? ~INT8_C(0) : INT8_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comge_epi8(a, b) simde_mm_comge_epi8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comge_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_GE)
+    return _mm_com_epi16(a, b, _MM_PCOMCTRL_GE);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comge_epi16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u16 = vcgeq_s16(a_.neon_i16, b_.neon_i16);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i16), a_.i16 >= b_.i16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = (a_.i16[i] >= b_.i16[i]) ? ~INT16_C(0) : INT16_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comge_epi16(a, b) simde_mm_comge_epi16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comge_epi32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_GE)
+    return _mm_com_epi32(a, b, _MM_PCOMCTRL_GE);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comge_epi32(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vcgeq_s32(a_.neon_i32, b_.neon_i32);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), a_.i32 >= b_.i32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = (a_.i32[i] >= b_.i32[i]) ? ~INT32_C(0) : INT32_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comge_epi32(a, b) simde_mm_comge_epi32((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comge_epi64 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_GE)
+    return _mm_com_epi64(a, b, _MM_PCOMCTRL_GE);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comge_epi64(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_u64 = vcgeq_s64(a_.neon_i64, b_.neon_i64);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), a_.i64 >= b_.i64);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = (a_.i64[i] >= b_.i64[i]) ? ~INT64_C(0) : INT64_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comge_epi64(a, b) simde_mm_comge_epi64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comge_epu8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_GE)
+    return _mm_com_epu8(a, b, _MM_PCOMCTRL_GE);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comge_epu8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u8 = vcgeq_u8(a_.neon_u8, b_.neon_u8);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u8 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u8), a_.u8 >= b_.u8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+        r_.u8[i] = (a_.u8[i] >= b_.u8[i]) ? ~INT8_C(0) : INT8_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comge_epu8(a, b) simde_mm_comge_epu8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comge_epu16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_GE)
+    return _mm_com_epu16(a, b, _MM_PCOMCTRL_GE);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comge_epu16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u16 = vcgeq_u16(a_.neon_u16, b_.neon_u16);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u16), a_.u16 >= b_.u16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+        r_.u16[i] = (a_.u16[i] >= b_.u16[i]) ? ~INT16_C(0) : INT16_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comge_epu16(a, b) simde_mm_comge_epu16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comge_epu32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_GE)
+    return _mm_com_epu32(a, b, _MM_PCOMCTRL_GE);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comge_epu32(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vcgeq_u32(a_.neon_u32, b_.neon_u32);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u32), a_.u32 >= b_.u32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+        r_.u32[i] = (a_.u32[i] >= b_.u32[i]) ? ~INT32_C(0) : INT32_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comge_epu32(a, b) simde_mm_comge_epu32((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comge_epu64 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_GE)
+    return _mm_com_epu64(a, b, _MM_PCOMCTRL_GE);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comge_epu64(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_u64 = vcgeq_u64(a_.neon_u64, b_.neon_u64);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u64), a_.u64 >= b_.u64);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
+        r_.u64[i] = (a_.u64[i] >= b_.u64[i]) ? ~INT64_C(0) : INT64_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comge_epu64(a, b) simde_mm_comge_epu64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comgt_epi8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_GT)
+    return _mm_com_epi8(a, b, _MM_PCOMCTRL_GT);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comgt_epi8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u8 = vcgtq_s8(a_.neon_i8, b_.neon_i8);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i8 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i8), a_.i8 > b_.i8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = (a_.i8[i] > b_.i8[i]) ? ~INT8_C(0) : INT8_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comgt_epi8(a, b) simde_mm_comgt_epi8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comgt_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_GT)
+    return _mm_com_epi16(a, b, _MM_PCOMCTRL_GT);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comgt_epi16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u16 = vcgtq_s16(a_.neon_i16, b_.neon_i16);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i16), a_.i16 > b_.i16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = (a_.i16[i] > b_.i16[i]) ? ~INT16_C(0) : INT16_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comgt_epi16(a, b) simde_mm_comgt_epi16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comgt_epi32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_GT)
+    return _mm_com_epi32(a, b, _MM_PCOMCTRL_GT);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comgt_epi32(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vcgtq_s32(a_.neon_i32, b_.neon_i32);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), a_.i32 > b_.i32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = (a_.i32[i] > b_.i32[i]) ? ~INT32_C(0) : INT32_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comgt_epi32(a, b) simde_mm_comgt_epi32((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comgt_epi64 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_GT)
+    return _mm_com_epi64(a, b, _MM_PCOMCTRL_GT);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comgt_epi64(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_u64 = vcgtq_s64(a_.neon_i64, b_.neon_i64);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), a_.i64 > b_.i64);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = (a_.i64[i] > b_.i64[i]) ? ~INT64_C(0) : INT64_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comgt_epi64(a, b) simde_mm_comgt_epi64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comgt_epu8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_GT)
+    return _mm_com_epu8(a, b, _MM_PCOMCTRL_GT);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comgt_epu8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u8 = vcgtq_u8(a_.neon_u8, b_.neon_u8);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u8 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u8), a_.u8 > b_.u8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+        r_.u8[i] = (a_.u8[i] > b_.u8[i]) ? ~INT8_C(0) : INT8_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comgt_epu8(a, b) simde_mm_comgt_epu8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comgt_epu16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_GT)
+    return _mm_com_epu16(a, b, _MM_PCOMCTRL_GT);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comgt_epu16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u16 = vcgtq_u16(a_.neon_u16, b_.neon_u16);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u16), a_.u16 > b_.u16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+        r_.u16[i] = (a_.u16[i] > b_.u16[i]) ? ~INT16_C(0) : INT16_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comgt_epu16(a, b) simde_mm_comgt_epu16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comgt_epu32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_GT)
+    return _mm_com_epu32(a, b, _MM_PCOMCTRL_GT);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comgt_epu32(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vcgtq_u32(a_.neon_u32, b_.neon_u32);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u32), a_.u32 > b_.u32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+        r_.u32[i] = (a_.u32[i] > b_.u32[i]) ? ~INT32_C(0) : INT32_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comgt_epu32(a, b) simde_mm_comgt_epu32((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comgt_epu64 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_GT)
+    return _mm_com_epu64(a, b, _MM_PCOMCTRL_GT);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comgt_epu64(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_u64 = vcgtq_u64(a_.neon_u64, b_.neon_u64);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u64), a_.u64 > b_.u64);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
+        r_.u64[i] = (a_.u64[i] > b_.u64[i]) ? ~INT64_C(0) : INT64_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comgt_epu64(a, b) simde_mm_comgt_epu64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comle_epi8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_LE)
+    return _mm_com_epi8(a, b, _MM_PCOMCTRL_LE);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comle_epi8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u8 = vcleq_s8(a_.neon_i8, b_.neon_i8);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i8 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i8), a_.i8 <= b_.i8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = (a_.i8[i] <= b_.i8[i]) ? ~INT8_C(0) : INT8_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comle_epi8(a, b) simde_mm_comle_epi8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comle_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_LE)
+    return _mm_com_epi16(a, b, _MM_PCOMCTRL_LE);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comle_epi16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i16), a_.i16 <= b_.i16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = (a_.i16[i] <= b_.i16[i]) ? ~INT16_C(0) : INT16_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comle_epi16(a, b) simde_mm_comle_epi16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comle_epi32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_LE)
+    return _mm_com_epi32(a, b, _MM_PCOMCTRL_LE);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comle_epi32(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vcleq_s32(a_.neon_i32, b_.neon_i32);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), a_.i32 <= b_.i32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = (a_.i32[i] <= b_.i32[i]) ? ~INT32_C(0) : INT32_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comle_epi32(a, b) simde_mm_comle_epi32((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comle_epi64 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_LE)
+    return _mm_com_epi64(a, b, _MM_PCOMCTRL_LE);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comle_epi64(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_u64 = vcleq_s64(a_.neon_i64, b_.neon_i64);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), a_.i64 <= b_.i64);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = (a_.i64[i] <= b_.i64[i]) ? ~INT64_C(0) : INT64_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comle_epi64(a, b) simde_mm_comle_epi64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comle_epu8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_LE)
+    return _mm_com_epu8(a, b, _MM_PCOMCTRL_LE);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comle_epu8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u8 = vcleq_u8(a_.neon_u8, b_.neon_u8);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u8 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u8), a_.u8 <= b_.u8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+        r_.u8[i] = (a_.u8[i] <= b_.u8[i]) ? ~INT8_C(0) : INT8_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comle_epu8(a, b) simde_mm_comle_epu8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comle_epu16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_LE)
+    return _mm_com_epu16(a, b, _MM_PCOMCTRL_LE);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comle_epu16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u16 = vcleq_u16(a_.neon_u16, b_.neon_u16);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u16), a_.u16 <= b_.u16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+        r_.u16[i] = (a_.u16[i] <= b_.u16[i]) ? ~INT16_C(0) : INT16_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comle_epu16(a, b) simde_mm_comle_epu16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comle_epu32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_LE)
+    return _mm_com_epu32(a, b, _MM_PCOMCTRL_LE);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comle_epu32(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vcleq_u32(a_.neon_u32, b_.neon_u32);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u32), a_.u32 <= b_.u32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+        r_.u32[i] = (a_.u32[i] <= b_.u32[i]) ? ~INT32_C(0) : INT32_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comle_epu32(a, b) simde_mm_comle_epu32((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comle_epu64 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_LE)
+    return _mm_com_epu64(a, b, _MM_PCOMCTRL_LE);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comle_epu64(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_u64 = vcleq_u64(a_.neon_u64, b_.neon_u64);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u64), a_.u64 <= b_.u64);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
+        r_.u64[i] = (a_.u64[i] <= b_.u64[i]) ? ~INT64_C(0) : INT64_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comle_epu64(a, b) simde_mm_comle_epu64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comlt_epi8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_LT)
+    return _mm_com_epi8(a, b, _MM_PCOMCTRL_LT);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comlt_epi8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u8 = vcltq_s8(a_.neon_i8, b_.neon_i8);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i8 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i8), a_.i8 < b_.i8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = (a_.i8[i] < b_.i8[i]) ? ~INT8_C(0) : INT8_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comlt_epi8(a, b) simde_mm_comlt_epi8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comlt_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_LT)
+    return _mm_com_epi16(a, b, _MM_PCOMCTRL_LT);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comlt_epi16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u16 = vcltq_s16(a_.neon_i16, b_.neon_i16);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i16), a_.i16 < b_.i16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = (a_.i16[i] < b_.i16[i]) ? ~INT16_C(0) : INT16_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comlt_epi16(a, b) simde_mm_comlt_epi16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comlt_epi32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_LT)
+    return _mm_com_epi32(a, b, _MM_PCOMCTRL_LT);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comlt_epi32(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vcltq_s32(a_.neon_i32, b_.neon_i32);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), a_.i32 < b_.i32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = (a_.i32[i] < b_.i32[i]) ? ~INT32_C(0) : INT32_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comlt_epi32(a, b) simde_mm_comlt_epi32((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comlt_epi64 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_LT)
+    return _mm_com_epi64(a, b, _MM_PCOMCTRL_LT);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comlt_epi64(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_u64 = vcltq_s64(a_.neon_i64, b_.neon_i64);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), a_.i64 < b_.i64);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = (a_.i64[i] < b_.i64[i]) ? ~INT64_C(0) : INT64_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comlt_epi64(a, b) simde_mm_comlt_epi64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comlt_epu8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_LT)
+    return _mm_com_epu8(a, b, _MM_PCOMCTRL_LT);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comlt_epu8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u8 = vcltq_u8(a_.neon_u8, b_.neon_u8);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u8 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u8), a_.u8 < b_.u8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+        r_.u8[i] = (a_.u8[i] < b_.u8[i]) ? ~INT8_C(0) : INT8_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comlt_epu8(a, b) simde_mm_comlt_epu8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comlt_epu16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_LT)
+    return _mm_com_epu16(a, b, _MM_PCOMCTRL_LT);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comlt_epu16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u16 = vcltq_u16(a_.neon_u16, b_.neon_u16);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u16), a_.u16 < b_.u16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+        r_.u16[i] = (a_.u16[i] < b_.u16[i]) ? ~INT16_C(0) : INT16_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comlt_epu16(a, b) simde_mm_comlt_epu16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comlt_epu32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_LT)
+    return _mm_com_epu32(a, b, _MM_PCOMCTRL_LT);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comlt_epu32(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vcltq_u32(a_.neon_u32, b_.neon_u32);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u32), a_.u32 < b_.u32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+        r_.u32[i] = (a_.u32[i] < b_.u32[i]) ? ~INT32_C(0) : INT32_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comlt_epu32(a, b) simde_mm_comlt_epu32((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comlt_epu64 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_LT)
+    return _mm_com_epu64(a, b, _MM_PCOMCTRL_LT);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comlt_epu64(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_u64 = vcltq_u64(a_.neon_u64, b_.neon_u64);
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u64), a_.u64 < b_.u64);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
+        r_.u64[i] = (a_.u64[i] < b_.u64[i]) ? ~INT64_C(0) : INT64_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comlt_epu64(a, b) simde_mm_comlt_epu64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comneq_epi8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_NEQ)
+    return _mm_com_epi8(a, b, _MM_PCOMCTRL_NEQ);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comneq_epi8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u8 = vmvnq_u8(vceqq_s8(a_.neon_i8, b_.neon_i8));
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i8 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i8), a_.i8 != b_.i8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        r_.i8[i] = (a_.i8[i] != b_.i8[i]) ? ~INT8_C(0) : INT8_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comneq_epi8(a, b) simde_mm_comneq_epi8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comneq_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_NEQ)
+    return _mm_com_epi16(a, b, _MM_PCOMCTRL_NEQ);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comneq_epi16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u16 = vmvnq_u16(vceqq_s16(a_.neon_i16, b_.neon_i16));
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i16), a_.i16 != b_.i16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = (a_.i16[i] != b_.i16[i]) ? ~INT16_C(0) : INT16_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comneq_epi16(a, b) simde_mm_comneq_epi16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comneq_epi32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_NEQ)
+    return _mm_com_epi32(a, b, _MM_PCOMCTRL_NEQ);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comneq_epi32(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vmvnq_u32(vceqq_s32(a_.neon_i32, b_.neon_i32));
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), a_.i32 != b_.i32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = (a_.i32[i] != b_.i32[i]) ? ~INT32_C(0) : INT32_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comneq_epi32(a, b) simde_mm_comneq_epi32((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comneq_epi64 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_NEQ)
+    return _mm_com_epi64(a, b, _MM_PCOMCTRL_NEQ);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comneq_epi64(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_u32 = vmvnq_u32(vreinterpretq_u32_u64(vceqq_s64(a_.neon_i64, b_.neon_i64)));
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), a_.i64 != b_.i64);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = (a_.i64[i] != b_.i64[i]) ? ~INT64_C(0) : INT64_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comneq_epi64(a, b) simde_mm_comneq_epi64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comneq_epu8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_NEQ)
+    return _mm_com_epu8(a, b, _MM_PCOMCTRL_NEQ);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comneq_epu8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u8 = vmvnq_u8(vceqq_u8(a_.neon_u8, b_.neon_u8));
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u8 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u8), a_.u8 != b_.u8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+        r_.u8[i] = (a_.u8[i] != b_.u8[i]) ? ~INT8_C(0) : INT8_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comneq_epu8(a, b) simde_mm_comneq_epu8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comneq_epu16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_NEQ)
+    return _mm_com_epu16(a, b, _MM_PCOMCTRL_NEQ);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comneq_epu16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u16 = vmvnq_u16(vceqq_u16(a_.neon_u16, b_.neon_u16));
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u16), a_.u16 != b_.u16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+        r_.u16[i] = (a_.u16[i] != b_.u16[i]) ? ~INT16_C(0) : INT16_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comneq_epu16(a, b) simde_mm_comneq_epu16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comneq_epu32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_NEQ)
+    return _mm_com_epu32(a, b, _MM_PCOMCTRL_NEQ);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comneq_epu32(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vmvnq_u32(vceqq_u32(a_.neon_u32, b_.neon_u32));
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u32), a_.u32 != b_.u32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+        r_.u32[i] = (a_.u32[i] != b_.u32[i]) ? ~INT32_C(0) : INT32_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comneq_epu32(a, b) simde_mm_comneq_epu32((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comneq_epu64 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_NEQ)
+    return _mm_com_epu64(a, b, _MM_PCOMCTRL_NEQ);
+  #elif defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_comneq_epu64(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      r_.neon_u32 = vmvnq_u32(vreinterpretq_u32_u64(vceqq_u64(a_.neon_u64, b_.neon_u64)));
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
+      r_.u64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u64), a_.u64 != b_.u64);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
+        r_.u64[i] = (a_.u64[i] != b_.u64[i]) ? ~INT64_C(0) : INT64_C(0);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comneq_epu64(a, b) simde_mm_comneq_epu64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comfalse_epi8 (simde__m128i a, simde__m128i b) {
+  (void) a;
+  (void) b;
+  return simde_mm_setzero_si128();
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comfalse_epi8(a, b) simde_mm_comfalse_epi8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comfalse_epi16 (simde__m128i a, simde__m128i b) {
+  (void) a;
+  (void) b;
+  return simde_mm_setzero_si128();
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comfalse_epi16(a, b) simde_mm_comfalse_epi16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comfalse_epi32 (simde__m128i a, simde__m128i b) {
+  (void) a;
+  (void) b;
+  return simde_mm_setzero_si128();
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comfalse_epi32(a, b) simde_mm_comfalse_epi32((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comfalse_epi64 (simde__m128i a, simde__m128i b) {
+  (void) a;
+  (void) b;
+  return simde_mm_setzero_si128();
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comfalse_epi64(a, b) simde_mm_comfalse_epi64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comfalse_epu8 (simde__m128i a, simde__m128i b) {
+  (void) a;
+  (void) b;
+  return simde_mm_setzero_si128();
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comfalse_epu8(a, b) simde_mm_comfalse_epu8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comfalse_epu16 (simde__m128i a, simde__m128i b) {
+  (void) a;
+  (void) b;
+  return simde_mm_setzero_si128();
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comfalse_epu16(a, b) simde_mm_comfalse_epu16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comfalse_epu32 (simde__m128i a, simde__m128i b) {
+  (void) a;
+  (void) b;
+  return simde_mm_setzero_si128();
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comfalse_epu32(a, b) simde_mm_comfalse_epu32((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comfalse_epu64 (simde__m128i a, simde__m128i b) {
+  (void) a;
+  (void) b;
+  return simde_mm_setzero_si128();
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comfalse_epu64(a, b) simde_mm_comfalse_epu64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comtrue_epi8 (simde__m128i a, simde__m128i b) {
+  (void) a;
+  (void) b;
+  return simde_x_mm_setone_si128();
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comtrue_epi8(a, b) simde_mm_comtrue_epi8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comtrue_epi16 (simde__m128i a, simde__m128i b) {
+  (void) a;
+  (void) b;
+  return simde_x_mm_setone_si128();
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comtrue_epi16(a, b) simde_mm_comtrue_epi16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comtrue_epi32 (simde__m128i a, simde__m128i b) {
+  (void) a;
+  (void) b;
+  return simde_x_mm_setone_si128();
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comtrue_epi32(a, b) simde_mm_comtrue_epi32((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comtrue_epi64 (simde__m128i a, simde__m128i b) {
+  (void) a;
+  (void) b;
+  return simde_x_mm_setone_si128();
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comtrue_epi64(a, b) simde_mm_comtrue_epi64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comtrue_epu8 (simde__m128i a, simde__m128i b) {
+  (void) a;
+  (void) b;
+  return simde_x_mm_setone_si128();
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comtrue_epu8(a, b) simde_mm_comtrue_epu8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comtrue_epu16 (simde__m128i a, simde__m128i b) {
+  (void) a;
+  (void) b;
+  return simde_x_mm_setone_si128();
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comtrue_epu16(a, b) simde_mm_comtrue_epu16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comtrue_epu32 (simde__m128i a, simde__m128i b) {
+  (void) a;
+  (void) b;
+  return simde_x_mm_setone_si128();
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comtrue_epu32(a, b) simde_mm_comtrue_epu32((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_comtrue_epu64 (simde__m128i a, simde__m128i b) {
+  (void) a;
+  (void) b;
+  return simde_x_mm_setone_si128();
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_comtrue_epu64(a, b) simde_mm_comtrue_epu64((a), (b))
+#endif
+
+#if defined(SIMDE_X86_XOP_NATIVE) && defined(_MM_PCOMCTRL_LT)
+  #define SIMDE_X86_XOP_HAVE_COM_ 1
+  #define SIMDE_MM_PCOMCTRL_LT    _MM_PCOMCTRL_LT
+  #define SIMDE_MM_PCOMCTRL_LE    _MM_PCOMCTRL_LE
+  #define SIMDE_MM_PCOMCTRL_GT    _MM_PCOMCTRL_GT
+  #define SIMDE_MM_PCOMCTRL_GE    _MM_PCOMCTRL_GE
+  #define SIMDE_MM_PCOMCTRL_EQ    _MM_PCOMCTRL_EQ
+  #define SIMDE_MM_PCOMCTRL_NEQ   _MM_PCOMCTRL_NEQ
+  #define SIMDE_MM_PCOMCTRL_FALSE _MM_PCOMCTRL_FALSE
+  #define SIMDE_MM_PCOMCTRL_TRUE  _MM_PCOMCTRL_TRUE
+#else
+  #define SIMDE_MM_PCOMCTRL_LT    0
+  #define SIMDE_MM_PCOMCTRL_LE    1
+  #define SIMDE_MM_PCOMCTRL_GT    2
+  #define SIMDE_MM_PCOMCTRL_GE    3
+  #define SIMDE_MM_PCOMCTRL_EQ    4
+  #define SIMDE_MM_PCOMCTRL_NEQ   5
+  #define SIMDE_MM_PCOMCTRL_FALSE 6
+  #define SIMDE_MM_PCOMCTRL_TRUE  7
+
+  #if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+    #define _MM_PCOMCTRL_LT    SIMDE_MM_PCOMCTRL_LT
+    #define _MM_PCOMCTRL_LE    SIMDE_MM_PCOMCTRL_LE
+    #define _MM_PCOMCTRL_GT    SIMDE_MM_PCOMCTRL_GT
+    #define _MM_PCOMCTRL_GE    SIMDE_MM_PCOMCTRL_GE
+    #define _MM_PCOMCTRL_EQ    SIMDE_MM_PCOMCTRL_EQ
+    #define _MM_PCOMCTRL_NEQ   SIMDE_MM_PCOMCTRL_NEQ
+    #define _MM_PCOMCTRL_FALSE SIMDE_MM_PCOMCTRL_FALSE
+    #define _MM_PCOMCTRL_TRUE  SIMDE_MM_PCOMCTRL_TRUE
+  #endif
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_com_epi8 (simde__m128i a, simde__m128i b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 7) {
+  switch (imm8) {
+    case SIMDE_MM_PCOMCTRL_LT:
+      return simde_mm_comlt_epi8(a, b);
+    case SIMDE_MM_PCOMCTRL_LE:
+      return simde_mm_comle_epi8(a, b);
+    case SIMDE_MM_PCOMCTRL_GT:
+      return simde_mm_comgt_epi8(a, b);
+    case SIMDE_MM_PCOMCTRL_GE:
+      return simde_mm_comge_epi8(a, b);
+    case SIMDE_MM_PCOMCTRL_EQ:
+      return simde_mm_comeq_epi8(a, b);
+    case SIMDE_MM_PCOMCTRL_NEQ:
+      return simde_mm_comneq_epi8(a, b);
+    case SIMDE_MM_PCOMCTRL_FALSE:
+      return simde_mm_comfalse_epi8(a, b);
+    case SIMDE_MM_PCOMCTRL_TRUE:
+      return simde_mm_comtrue_epi8(a, b);
+    default:
+      HEDLEY_UNREACHABLE_RETURN(simde_mm_setzero_si128());
+  }
+}
+#if defined(SIMDE_X86_XOP_NATIVE) && defined(SIMDE_X86_XOP_HAVE_COM_)
+  #define simde_mm_com_epi8(a, b, imm8) _mm_com_epi8((a), (b), (imm8))
+#endif
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_com_epi8(a, b, imm8) simde_mm_com_epi8((a), (b), (imm8))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_com_epi16 (simde__m128i a, simde__m128i b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 7) {
+  switch (imm8) {
+    case SIMDE_MM_PCOMCTRL_LT:
+      return simde_mm_comlt_epi16(a, b);
+    case SIMDE_MM_PCOMCTRL_LE:
+      return simde_mm_comle_epi16(a, b);
+    case SIMDE_MM_PCOMCTRL_GT:
+      return simde_mm_comgt_epi16(a, b);
+    case SIMDE_MM_PCOMCTRL_GE:
+      return simde_mm_comge_epi16(a, b);
+    case SIMDE_MM_PCOMCTRL_EQ:
+      return simde_mm_comeq_epi16(a, b);
+    case SIMDE_MM_PCOMCTRL_NEQ:
+      return simde_mm_comneq_epi16(a, b);
+    case SIMDE_MM_PCOMCTRL_FALSE:
+      return simde_mm_comfalse_epi16(a, b);
+    case SIMDE_MM_PCOMCTRL_TRUE:
+      return simde_mm_comtrue_epi16(a, b);
+    default:
+      HEDLEY_UNREACHABLE_RETURN(simde_mm_setzero_si128());
+  }
+}
+#if defined(SIMDE_X86_XOP_NATIVE) && defined(SIMDE_X86_XOP_HAVE_COM_)
+  #define simde_mm_com_epi16(a, b, imm8) _mm_com_epi16((a), (b), (imm8))
+#endif
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_com_epi16(a, b, imm8) simde_mm_com_epi16((a), (b), (imm8))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_com_epi32 (simde__m128i a, simde__m128i b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 7) {
+  switch (imm8) {
+    case SIMDE_MM_PCOMCTRL_LT:
+      return simde_mm_comlt_epi32(a, b);
+    case SIMDE_MM_PCOMCTRL_LE:
+      return simde_mm_comle_epi32(a, b);
+    case SIMDE_MM_PCOMCTRL_GT:
+      return simde_mm_comgt_epi32(a, b);
+    case SIMDE_MM_PCOMCTRL_GE:
+      return simde_mm_comge_epi32(a, b);
+    case SIMDE_MM_PCOMCTRL_EQ:
+      return simde_mm_comeq_epi32(a, b);
+    case SIMDE_MM_PCOMCTRL_NEQ:
+      return simde_mm_comneq_epi32(a, b);
+    case SIMDE_MM_PCOMCTRL_FALSE:
+      return simde_mm_comfalse_epi32(a, b);
+    case SIMDE_MM_PCOMCTRL_TRUE:
+      return simde_mm_comtrue_epi32(a, b);
+    default:
+      HEDLEY_UNREACHABLE_RETURN(simde_mm_setzero_si128());
+  }
+}
+#if defined(SIMDE_X86_XOP_NATIVE) && defined(SIMDE_X86_XOP_HAVE_COM_)
+  #define simde_mm_com_epi32(a, b, imm8) _mm_com_epi32((a), (b), (imm8))
+#endif
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_com_epi32(a, b, imm8) simde_mm_com_epi32((a), (b), (imm8))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_com_epi64 (simde__m128i a, simde__m128i b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 7) {
+  switch (imm8) {
+    case SIMDE_MM_PCOMCTRL_LT:
+      return simde_mm_comlt_epi64(a, b);
+    case SIMDE_MM_PCOMCTRL_LE:
+      return simde_mm_comle_epi64(a, b);
+    case SIMDE_MM_PCOMCTRL_GT:
+      return simde_mm_comgt_epi64(a, b);
+    case SIMDE_MM_PCOMCTRL_GE:
+      return simde_mm_comge_epi64(a, b);
+    case SIMDE_MM_PCOMCTRL_EQ:
+      return simde_mm_comeq_epi64(a, b);
+    case SIMDE_MM_PCOMCTRL_NEQ:
+      return simde_mm_comneq_epi64(a, b);
+    case SIMDE_MM_PCOMCTRL_FALSE:
+      return simde_mm_comfalse_epi64(a, b);
+    case SIMDE_MM_PCOMCTRL_TRUE:
+      return simde_mm_comtrue_epi64(a, b);
+    default:
+      HEDLEY_UNREACHABLE_RETURN(simde_mm_setzero_si128());
+  }
+}
+#if defined(SIMDE_X86_XOP_NATIVE) && defined(SIMDE_X86_XOP_HAVE_COM_)
+  #define simde_mm_com_epi64(a, b, imm8) _mm_com_epi64((a), (b), (imm8))
+#endif
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_com_epi64(a, b, imm8) simde_mm_com_epi64((a), (b), (imm8))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_com_epu8 (simde__m128i a, simde__m128i b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 7) {
+  switch (imm8) {
+    case SIMDE_MM_PCOMCTRL_LT:
+      return simde_mm_comlt_epu8(a, b);
+    case SIMDE_MM_PCOMCTRL_LE:
+      return simde_mm_comle_epu8(a, b);
+    case SIMDE_MM_PCOMCTRL_GT:
+      return simde_mm_comgt_epu8(a, b);
+    case SIMDE_MM_PCOMCTRL_GE:
+      return simde_mm_comge_epu8(a, b);
+    case SIMDE_MM_PCOMCTRL_EQ:
+      return simde_mm_comeq_epu8(a, b);
+    case SIMDE_MM_PCOMCTRL_NEQ:
+      return simde_mm_comneq_epu8(a, b);
+    case SIMDE_MM_PCOMCTRL_FALSE:
+      return simde_mm_comfalse_epu8(a, b);
+    case SIMDE_MM_PCOMCTRL_TRUE:
+      return simde_mm_comtrue_epu8(a, b);
+    default:
+      HEDLEY_UNREACHABLE_RETURN(simde_mm_setzero_si128());
+  }
+}
+#if defined(SIMDE_X86_XOP_NATIVE) && defined(SIMDE_X86_XOP_HAVE_COM_)
+  #define simde_mm_com_epu8(a, b, imm8) _mm_com_epu8((a), (b), (imm8))
+#endif
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_com_epu8(a, b, imm8) simde_mm_com_epu8((a), (b), (imm8))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_com_epu16 (simde__m128i a, simde__m128i b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 7) {
+  switch (imm8) {
+    case SIMDE_MM_PCOMCTRL_LT:
+      return simde_mm_comlt_epu16(a, b);
+    case SIMDE_MM_PCOMCTRL_LE:
+      return simde_mm_comle_epu16(a, b);
+    case SIMDE_MM_PCOMCTRL_GT:
+      return simde_mm_comgt_epu16(a, b);
+    case SIMDE_MM_PCOMCTRL_GE:
+      return simde_mm_comge_epu16(a, b);
+    case SIMDE_MM_PCOMCTRL_EQ:
+      return simde_mm_comeq_epu16(a, b);
+    case SIMDE_MM_PCOMCTRL_NEQ:
+      return simde_mm_comneq_epu16(a, b);
+    case SIMDE_MM_PCOMCTRL_FALSE:
+      return simde_mm_comfalse_epu16(a, b);
+    case SIMDE_MM_PCOMCTRL_TRUE:
+      return simde_mm_comtrue_epu16(a, b);
+    default:
+      HEDLEY_UNREACHABLE_RETURN(simde_mm_setzero_si128());
+  }
+}
+#if defined(SIMDE_X86_XOP_NATIVE) && defined(SIMDE_X86_XOP_HAVE_COM_)
+  #define simde_mm_com_epu16(a, b, imm8) _mm_com_epu16((a), (b), (imm8))
+#endif
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_com_epu16(a, b, imm8) simde_mm_com_epu16((a), (b), (imm8))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_com_epu32 (simde__m128i a, simde__m128i b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 7) {
+  switch (imm8) {
+    case SIMDE_MM_PCOMCTRL_LT:
+      return simde_mm_comlt_epu32(a, b);
+    case SIMDE_MM_PCOMCTRL_LE:
+      return simde_mm_comle_epu32(a, b);
+    case SIMDE_MM_PCOMCTRL_GT:
+      return simde_mm_comgt_epu32(a, b);
+    case SIMDE_MM_PCOMCTRL_GE:
+      return simde_mm_comge_epu32(a, b);
+    case SIMDE_MM_PCOMCTRL_EQ:
+      return simde_mm_comeq_epu32(a, b);
+    case SIMDE_MM_PCOMCTRL_NEQ:
+      return simde_mm_comneq_epu32(a, b);
+    case SIMDE_MM_PCOMCTRL_FALSE:
+      return simde_mm_comfalse_epu32(a, b);
+    case SIMDE_MM_PCOMCTRL_TRUE:
+      return simde_mm_comtrue_epu32(a, b);
+    default:
+      HEDLEY_UNREACHABLE_RETURN(simde_mm_setzero_si128());
+  }
+}
+#if defined(SIMDE_X86_XOP_NATIVE) && defined(SIMDE_X86_XOP_HAVE_COM_)
+  #define simde_mm_com_epu32(a, b, imm8) _mm_com_epu32((a), (b), (imm8))
+#endif
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_com_epu32(a, b, imm8) simde_mm_com_epu32((a), (b), (imm8))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_com_epu64 (simde__m128i a, simde__m128i b, const int imm8)
+    SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 7) {
+  switch (imm8) {
+    case SIMDE_MM_PCOMCTRL_LT:
+      return simde_mm_comlt_epu64(a, b);
+    case SIMDE_MM_PCOMCTRL_LE:
+      return simde_mm_comle_epu64(a, b);
+    case SIMDE_MM_PCOMCTRL_GT:
+      return simde_mm_comgt_epu64(a, b);
+    case SIMDE_MM_PCOMCTRL_GE:
+      return simde_mm_comge_epu64(a, b);
+    case SIMDE_MM_PCOMCTRL_EQ:
+      return simde_mm_comeq_epu64(a, b);
+    case SIMDE_MM_PCOMCTRL_NEQ:
+      return simde_mm_comneq_epu64(a, b);
+    case SIMDE_MM_PCOMCTRL_FALSE:
+      return simde_mm_comfalse_epu64(a, b);
+    case SIMDE_MM_PCOMCTRL_TRUE:
+      return simde_mm_comtrue_epu64(a, b);
+    default:
+      HEDLEY_UNREACHABLE_RETURN(simde_mm_setzero_si128());
+  }
+}
+#if defined(SIMDE_X86_XOP_NATIVE) && defined(SIMDE_X86_XOP_HAVE_COM_)
+  #define simde_mm_com_epu64(a, b, imm8) _mm_com_epu64((a), (b), (imm8))
+#endif
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_com_epu64(a, b, imm8) simde_mm_com_epu64((a), (b), (imm8))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_frcz_ps (simde__m128 a) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_frcz_ps(a);
+  #else
+    simde__m128_private
+      r_,
+      a_ = simde__m128_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      #if defined(simde_math_modff)
+        simde_float32 integral;
+        r_.f32[i] = simde_math_modff(a_.f32[i], &integral);
+      #else
+        r_.f32[i] = (a_.f32[i] / 1.0f);
+      #endif
+    }
+
+    return simde__m128_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_frcz_ps(a) simde_mm_frcz_ps((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_frcz_pd (simde__m128d a) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_frcz_pd(a);
+  #else
+    simde__m128d_private
+      r_,
+      a_ = simde__m128d_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      #if defined(simde_math_modf)
+        simde_float64 integral;
+        r_.f64[i] = simde_math_modf(a_.f64[i], &integral);
+      #else
+        r_.f64[i] = (a_.f64[i] / 1.0f);
+      #endif
+    }
+
+    return simde__m128d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_frcz_ps(a) simde_mm_frcz_ps((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_frcz_ss (simde__m128 a, simde__m128 b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && !defined(SIMDE_BUG_CLANG_48673)
+    return _mm_frcz_ss(a, b);
+  #else
+    simde__m128_private
+      a_ = simde__m128_to_private(a),
+      b_ = simde__m128_to_private(b);
+
+    #if defined(simde_math_modff)
+      simde_float32 integral;
+      a_.f32[0] = simde_math_modff(b_.f32[0], &integral);
+    #else
+      a_.f32[0] = (b_.f32[0] / 1.0f);
+    #endif
+
+    return simde__m128_from_private(a_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_frcz_ss(a, b) simde_mm_frcz_ss((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_frcz_sd (simde__m128d a, simde__m128d b) {
+  #if defined(SIMDE_X86_XOP_NATIVE) && !defined(SIMDE_BUG_CLANG_48673)
+    return _mm_frcz_sd(a, b);
+  #else
+    simde__m128d_private
+      a_ = simde__m128d_to_private(a),
+      b_ = simde__m128d_to_private(b);
+
+    #if defined(simde_math_modf)
+      simde_float64 integral;
+      a_.f64[0] = simde_math_modf(b_.f64[0], &integral);
+    #else
+      a_.f64[0] = (b_.f64[0] / 1.0f);
+    #endif
+
+    return simde__m128d_from_private(a_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_frcz_sd(a, b) simde_mm_frcz_sd((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_frcz_ps (simde__m256 a) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm256_frcz_ps(a);
+  #else
+    simde__m256_private
+      r_,
+      a_ = simde__m256_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+        r_.m128[i] = simde_mm_frcz_ps(a_.m128[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+        #if defined(simde_math_modff)
+          simde_float32 integral;
+          r_.f32[i] = simde_math_modff(a_.f32[i], &integral);
+        #else
+          r_.f32[i] = (a_.f32[i] / 1.0f);
+        #endif
+      }
+    #endif
+
+    return simde__m256_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm256_frcz_ps(a) simde_mm256_frcz_ps((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_frcz_pd (simde__m256d a) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm256_frcz_pd(a);
+  #else
+    simde__m256d_private
+      r_,
+      a_ = simde__m256d_to_private(a);
+
+    #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+      for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+        r_.m128d[i] = simde_mm_frcz_pd(a_.m128d[i]);
+      }
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+        #if defined(simde_math_modf)
+          simde_float64 integral;
+          r_.f64[i] = simde_math_modf(a_.f64[i], &integral);
+        #else
+          r_.f64[i] = (a_.f64[i] / 1.0f);
+        #endif
+      }
+    #endif
+
+    return simde__m256d_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm256_frcz_ps(a) simde_mm256_frcz_ps((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_haddw_epi8 (simde__m128i a) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_haddw_epi8(a);
+  #elif defined(SIMDE_X86_SSSE3_NATIVE)
+      return _mm_maddubs_epi16(_mm_set1_epi8(INT8_C(1)), a);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i16 = vpaddlq_s8(a_.neon_i8);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i16x8_extadd_pairwise_i8x16(a_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      SIMDE_POWER_ALTIVEC_VECTOR(signed char) one = vec_splat_s8(1);
+      r_.altivec_i16 =
+        vec_add(
+          vec_mule(a_.altivec_i8, one),
+          vec_mulo(a_.altivec_i8, one)
+        );
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+      r_.i16 =
+        ((a_.i16 << 8) >> 8) +
+        ((a_.i16 >> 8)     );
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = HEDLEY_STATIC_CAST(int16_t, a_.i8[(i * 2)]) + HEDLEY_STATIC_CAST(int16_t, a_.i8[(i * 2) + 1]);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_haddw_epi8(a) simde_mm_haddw_epi8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_haddw_epu8 (simde__m128i a) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_haddw_epu8(a);
+  #elif defined(SIMDE_X86_SSSE3_NATIVE)
+    return _mm_maddubs_epi16(a, _mm_set1_epi8(INT8_C(1)));
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u16 = vpaddlq_u8(a_.neon_u8);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_u16x8_extadd_pairwise_u8x16(a_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) one = vec_splat_u8(1);
+      r_.altivec_u16 =
+        vec_add(
+          vec_mule(a_.altivec_u8, one),
+          vec_mulo(a_.altivec_u8, one)
+        );
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+      r_.u16 =
+        ((a_.u16 << 8) >> 8) +
+        ((a_.u16 >> 8)     );
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+        r_.u16[i] = HEDLEY_STATIC_CAST(uint16_t, a_.u8[(i * 2)]) + HEDLEY_STATIC_CAST(uint16_t, a_.u8[(i * 2) + 1]);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_haddw_epu8(a) simde_mm_haddw_epu8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_haddd_epi8 (simde__m128i a) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_haddd_epi8(a);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vpaddlq_s16(vpaddlq_s8(a_.neon_i8));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] =
+          HEDLEY_STATIC_CAST(int32_t, a_.i8[(i * 4)    ]) + HEDLEY_STATIC_CAST(int32_t, a_.i8[(i * 4) + 1]) +
+          HEDLEY_STATIC_CAST(int32_t, a_.i8[(i * 4) + 2]) + HEDLEY_STATIC_CAST(int32_t, a_.i8[(i * 4) + 3]);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_haddd_epi8(a) simde_mm_haddd_epi8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_haddd_epi16 (simde__m128i a) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_haddd_epi16(a);
+  #elif defined(SIMDE_X86_SSE2_NATIVE)
+    return _mm_madd_epi16(a, _mm_set1_epi16(INT8_C(1)));
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vpaddlq_s16(a_.neon_i16);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_i32x4_extadd_pairwise_i16x8(a_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      SIMDE_POWER_ALTIVEC_VECTOR(signed short) one = vec_splat_s16(1);
+      r_.altivec_i32 =
+        vec_add(
+          vec_mule(a_.altivec_i16, one),
+          vec_mulo(a_.altivec_i16, one)
+        );
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+      r_.i32 =
+        ((a_.i32 << 16) >> 16) +
+        ((a_.i32 >> 16)      );
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = HEDLEY_STATIC_CAST(int32_t, a_.i16[(i * 2)]) + HEDLEY_STATIC_CAST(int32_t, a_.i16[(i * 2) + 1]);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_haddd_epi8(a) simde_mm_haddd_epi8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_haddd_epu8 (simde__m128i a) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_haddd_epu8(a);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vpaddlq_u16(vpaddlq_u8(a_.neon_u8));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+        r_.u32[i] =
+          HEDLEY_STATIC_CAST(uint32_t, a_.u8[(i * 4)    ]) + HEDLEY_STATIC_CAST(uint32_t, a_.u8[(i * 4) + 1]) +
+          HEDLEY_STATIC_CAST(uint32_t, a_.u8[(i * 4) + 2]) + HEDLEY_STATIC_CAST(uint32_t, a_.u8[(i * 4) + 3]);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_haddd_epu8(a) simde_mm_haddd_epu8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_haddd_epu16 (simde__m128i a) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_haddd_epu16(a);
+  #elif defined(SIMDE_X86_SSE2_NATIVE)
+    return
+      _mm_add_epi32(
+        _mm_srli_epi32(a, 16),
+        _mm_and_si128(a, _mm_set1_epi32(INT32_C(0x0000ffff)))
+      );
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vpaddlq_u16(a_.neon_u16);
+    #elif defined(SIMDE_WASM_SIMD128_NATIVE)
+      r_.wasm_v128 = wasm_u32x4_extadd_pairwise_u16x8(a_.wasm_v128);
+    #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
+      SIMDE_POWER_ALTIVEC_VECTOR(unsigned short) one = vec_splat_u16(1);
+      r_.altivec_u32 =
+        vec_add(
+          vec_mule(a_.altivec_u16, one),
+          vec_mulo(a_.altivec_u16, one)
+        );
+    #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
+      r_.u32 =
+        ((a_.u32 << 16) >> 16) +
+        ((a_.u32 >> 16)      );
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+        r_.u32[i] = HEDLEY_STATIC_CAST(uint32_t, a_.u16[(i * 2)]) + HEDLEY_STATIC_CAST(uint32_t, a_.u16[(i * 2) + 1]);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_haddd_epu8(a) simde_mm_haddd_epu8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_haddq_epi8 (simde__m128i a) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_haddq_epi8(a);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i64 = vpaddlq_s32(vpaddlq_s16(vpaddlq_s8(a_.neon_i8)));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] =
+          HEDLEY_STATIC_CAST(int64_t, a_.i8[(i * 8)    ]) + HEDLEY_STATIC_CAST(int64_t, a_.i8[(i * 8) + 1]) +
+          HEDLEY_STATIC_CAST(int64_t, a_.i8[(i * 8) + 2]) + HEDLEY_STATIC_CAST(int64_t, a_.i8[(i * 8) + 3]) +
+          HEDLEY_STATIC_CAST(int64_t, a_.i8[(i * 8) + 4]) + HEDLEY_STATIC_CAST(int64_t, a_.i8[(i * 8) + 5]) +
+          HEDLEY_STATIC_CAST(int64_t, a_.i8[(i * 8) + 6]) + HEDLEY_STATIC_CAST(int64_t, a_.i8[(i * 8) + 7]);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_haddq_epi8(a) simde_mm_haddq_epi8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_haddq_epi16 (simde__m128i a) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_haddq_epi16(a);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i64 = vpaddlq_s32(vpaddlq_s16(a_.neon_i16));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] =
+          HEDLEY_STATIC_CAST(int64_t, a_.i16[(i * 4)    ]) + HEDLEY_STATIC_CAST(int64_t, a_.i16[(i * 4) + 1]) +
+          HEDLEY_STATIC_CAST(int64_t, a_.i16[(i * 4) + 2]) + HEDLEY_STATIC_CAST(int64_t, a_.i16[(i * 4) + 3]);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_haddq_epi16(a) simde_mm_haddq_epi16((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_haddq_epi32 (simde__m128i a) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_haddq_epi32(a);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i64 = vpaddlq_s32(a_.neon_i32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = HEDLEY_STATIC_CAST(int64_t, a_.i32[(i * 2)    ]) + HEDLEY_STATIC_CAST(int64_t, a_.i32[(i * 2) + 1]);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_haddq_epi32(a) simde_mm_haddq_epi32((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_haddq_epu8 (simde__m128i a) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_haddq_epu8(a);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u64 = vpaddlq_u32(vpaddlq_u16(vpaddlq_u8(a_.neon_u8)));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.u64[i] =
+          HEDLEY_STATIC_CAST(uint64_t, a_.u8[(i * 8)    ]) + HEDLEY_STATIC_CAST(uint64_t, a_.u8[(i * 8) + 1]) +
+          HEDLEY_STATIC_CAST(uint64_t, a_.u8[(i * 8) + 2]) + HEDLEY_STATIC_CAST(uint64_t, a_.u8[(i * 8) + 3]) +
+          HEDLEY_STATIC_CAST(uint64_t, a_.u8[(i * 8) + 4]) + HEDLEY_STATIC_CAST(uint64_t, a_.u8[(i * 8) + 5]) +
+          HEDLEY_STATIC_CAST(uint64_t, a_.u8[(i * 8) + 6]) + HEDLEY_STATIC_CAST(uint64_t, a_.u8[(i * 8) + 7]);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_haddq_epu8(a) simde_mm_haddq_epu8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_haddq_epu16 (simde__m128i a) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_haddq_epu16(a);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u64 = vpaddlq_u32(vpaddlq_u16(a_.neon_u16));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.u64[i] =
+          HEDLEY_STATIC_CAST(uint64_t, a_.u16[(i * 4)    ]) + HEDLEY_STATIC_CAST(uint64_t, a_.u16[(i * 4) + 1]) +
+          HEDLEY_STATIC_CAST(uint64_t, a_.u16[(i * 4) + 2]) + HEDLEY_STATIC_CAST(uint64_t, a_.u16[(i * 4) + 3]);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_haddq_epu16(a) simde_mm_haddq_epu16((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_haddq_epu32 (simde__m128i a) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_haddq_epu32(a);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u64 = vpaddlq_u32(a_.neon_u32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.u64[i] = HEDLEY_STATIC_CAST(uint64_t, a_.u32[(i * 2)    ]) + HEDLEY_STATIC_CAST(uint64_t, a_.u32[(i * 2) + 1]);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_haddq_epu32(a) simde_mm_haddq_epu32((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_hsubw_epi8 (simde__m128i a) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_hsubw_epi8(a);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+      r_.i16[i] = HEDLEY_STATIC_CAST(int16_t, a_.i8[i * 2]) - HEDLEY_STATIC_CAST(int16_t, a_.i8[(i * 2) + 1]);
+    }
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_hsubw_epi8(a) simde_mm_hsubw_epi8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_hsubd_epi16 (simde__m128i a) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_hsubd_epi16(a);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+      r_.i32[i] =
+        HEDLEY_STATIC_CAST(int32_t, a_.i16[(i * 2)    ]) - HEDLEY_STATIC_CAST(int32_t, a_.i16[(i * 2) + 1]);
+    }
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_hsubd_epi8(a) simde_mm_hsubd_epi8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_hsubq_epi32 (simde__m128i a) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_hsubq_epi32(a);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+      r_.i64[i] = HEDLEY_STATIC_CAST(int64_t, a_.i32[(i * 2)    ]) - HEDLEY_STATIC_CAST(int64_t, a_.i32[(i * 2) + 1]);
+    }
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_hsubq_epi32(a) simde_mm_hsubq_epi32((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_macc_epi16 (simde__m128i a, simde__m128i b, simde__m128i c) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_macc_epi16(a, b, c);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b),
+      c_ = simde__m128i_to_private(c);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i16 = vmlaq_s16(c_.neon_i16, a_.neon_i16, b_.neon_i16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        r_.i16[i] = (a_.i16[i] * b_.i16[i]) + c_.i16[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_macc_epi16(a, b, c) simde_mm_macc_epi16((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_macc_epi32 (simde__m128i a, simde__m128i b, simde__m128i c) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_macc_epi32(a, b, c);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b),
+      c_ = simde__m128i_to_private(c);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vmlaq_s32(c_.neon_i32, a_.neon_i32, b_.neon_i32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = (a_.i32[i] * b_.i32[i]) + c_.i32[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_macc_epi32(a, b, c) simde_mm_macc_epi32((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_maccd_epi16 (simde__m128i a, simde__m128i b, simde__m128i c) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_maccd_epi16(a, b, c);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b),
+      c_ = simde__m128i_to_private(c);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      int16x8_t even = vuzp1q_s16(a_.neon_i16, b_.neon_i16);
+      int32x4_t a_even = vmovl_s16(vget_low_s16(even));
+      int32x4_t b_even = vmovl_high_s16(even);
+      r_.neon_i32 = vmlaq_s32(c_.neon_i32, a_even, b_even);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        r_.i32[i] = (HEDLEY_STATIC_CAST(int32_t, a_.i16[i * 2]) * HEDLEY_STATIC_CAST(int32_t, b_.i16[i * 2])) + c_.i32[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_maccd_epi16(a, b, c) simde_mm_maccd_epi16((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_macclo_epi32 (simde__m128i a, simde__m128i b, simde__m128i c) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_macclo_epi32(a, b, c);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b),
+      c_ = simde__m128i_to_private(c);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      int32x4_t even = vuzp1q_s32(a_.neon_i32, b_.neon_i32);
+      r_.neon_i64 = vaddq_s64(vmull_s32(vget_low_s32(even), vget_high_s32(even)), c_.neon_i64);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = (HEDLEY_STATIC_CAST(int64_t, a_.i32[(i * 2) + 0]) * HEDLEY_STATIC_CAST(int64_t, b_.i32[(i * 2) + 0])) + c_.i64[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_macclo_epi16(a, b, c) simde_mm_macclo_epi16((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_macchi_epi32 (simde__m128i a, simde__m128i b, simde__m128i c) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_macchi_epi32(a, b, c);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b),
+      c_ = simde__m128i_to_private(c);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      int32x4_t even = vuzp2q_s32(a_.neon_i32, b_.neon_i32);
+      r_.neon_i64 = vaddq_s64(vmull_s32(vget_low_s32(even), vget_high_s32(even)), c_.neon_i64);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        r_.i64[i] = (HEDLEY_STATIC_CAST(int64_t, a_.i32[(i * 2) + 1]) * HEDLEY_STATIC_CAST(int64_t, b_.i32[(i * 2) + 1])) + c_.i64[i];
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_macchi_epi16(a, b, c) simde_mm_macchi_epi16((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_maccs_epi16 (simde__m128i a, simde__m128i b, simde__m128i c) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_maccs_epi16(a, b, c);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b),
+      c_ = simde__m128i_to_private(c);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      int32x4_t c_lo = vmovl_s16(vget_low_s16(c_.neon_i16));
+      int32x4_t c_hi = vmovl_high_s16(c_.neon_i16);
+      int32x4_t lo = vmlal_s16(c_lo, vget_low_s16(a_.neon_i16), vget_low_s16(b_.neon_i16));
+      int32x4_t hi = vmlal_high_s16(c_hi, a_.neon_i16, b_.neon_i16);
+      r_.neon_i16 = vcombine_s16(vqmovn_s32(lo), vqmovn_s32(hi));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        int32_t tmp = HEDLEY_STATIC_CAST(int32_t, a_.i16[i]) * HEDLEY_STATIC_CAST(int32_t, b_.i16[i]);
+        tmp += c_.i16[i];
+        if (tmp > INT16_MAX)
+          r_.i16[i] = INT16_MAX;
+        else if (tmp < INT16_MIN)
+          r_.i16[i] = INT16_MIN;
+        else
+          r_.i16[i] = HEDLEY_STATIC_CAST(int16_t, tmp);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_maccs_epi16(a, b, c) simde_mm_maccs_epi16((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_maccs_epi32 (simde__m128i a, simde__m128i b, simde__m128i c) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_maccs_epi32(a, b, c);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b),
+      c_ = simde__m128i_to_private(c);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      int64x2_t c_lo = vmovl_s32(vget_low_s32(c_.neon_i32));
+      int64x2_t c_hi = vmovl_high_s32(c_.neon_i32);
+      int64x2_t lo = vmlal_s32(c_lo, vget_low_s32(a_.neon_i32), vget_low_s32(b_.neon_i32));
+      int64x2_t hi = vmlal_high_s32(c_hi, a_.neon_i32, b_.neon_i32);
+      r_.neon_i32 = vcombine_s32(vqmovn_s64(lo), vqmovn_s64(hi));
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        int64_t tmp = HEDLEY_STATIC_CAST(int64_t, a_.i32[i]) * HEDLEY_STATIC_CAST(int64_t, b_.i32[i]);
+        tmp += HEDLEY_STATIC_CAST(int64_t, c_.i32[i]);
+        if (tmp > INT32_MAX)
+          r_.i32[i] = INT32_MAX;
+        else if (tmp < INT32_MIN)
+          r_.i32[i] = INT32_MIN;
+        else
+          r_.i32[i] = HEDLEY_STATIC_CAST(int32_t, tmp);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_maccs_epi32(a, b, c) simde_mm_maccs_epi32((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_maccsd_epi16 (simde__m128i a, simde__m128i b, simde__m128i c) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_maccsd_epi16(a, b, c);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b),
+      c_ = simde__m128i_to_private(c);
+
+    #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+      int16x8_t even = vuzp1q_s16(a_.neon_i16, b_.neon_i16);
+      r_.neon_i32 = vqaddq_s32(vmull_s16(vget_low_s16(even), vget_high_s16(even)), c_.neon_i32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        int32_t prod = HEDLEY_STATIC_CAST(int32_t, a_.i16[i * 2]) * HEDLEY_STATIC_CAST(int32_t, b_.i16[i * 2]);
+        r_.i32[i] = simde_math_adds_i32(prod, c_.i32[i]);
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_maccsd_epi16(a, b, c) simde_mm_maccsd_epi16((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_maccslo_epi32 (simde__m128i a, simde__m128i b, simde__m128i c) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_maccslo_epi32(a, b, c);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b),
+      c_ = simde__m128i_to_private(c);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+      int64_t tmp = HEDLEY_STATIC_CAST(int64_t, a_.i32[(i * 2) + 0]) * HEDLEY_STATIC_CAST(int64_t, b_.i32[(i * 2) + 0]);
+      r_.i64[i] = simde_math_adds_i64(tmp, c_.i64[i]);
+    }
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_maccslo_epi16(a, b, c) simde_mm_maccslo_epi16((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_maccshi_epi32 (simde__m128i a, simde__m128i b, simde__m128i c) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_maccshi_epi32(a, b, c);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b),
+      c_ = simde__m128i_to_private(c);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+      int64_t tmp = HEDLEY_STATIC_CAST(int64_t, a_.i32[(i * 2) + 1]) * HEDLEY_STATIC_CAST(int64_t, b_.i32[(i * 2) + 1]);
+      r_.i64[i] = simde_math_adds_i64(tmp, c_.i64[i]);
+    }
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_maccshi_epi16(a, b, c) simde_mm_maccshi_epi16((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_maddd_epi16 (simde__m128i a, simde__m128i b, simde__m128i c) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_maddd_epi16(a, b, c);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b),
+      c_ = simde__m128i_to_private(c);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+      r_.i32[i] =
+        (a_.i16[(i * 2) + 0] * b_.i16[(i * 2) + 0]) +
+        (a_.i16[(i * 2) + 1] * b_.i16[(i * 2) + 1]);
+      r_.i32[i] += c_.i32[i];
+    }
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_maddd_epi16(a, b, c) simde_mm_maddd_epi16((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_maddsd_epi16 (simde__m128i a, simde__m128i b, simde__m128i c) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_maddsd_epi16(a, b, c);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b),
+      c_ = simde__m128i_to_private(c);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+      /* The AMD64 Architecture Programmer's Manual says that "the"
+       * addition is saturated; I'm not sure whether that means
+       * the pairwise addition or the accumulate, or both. */
+      r_.i32[i] =
+        (a_.i16[(i * 2) + 0] * b_.i16[(i * 2) + 0]) +
+        (a_.i16[(i * 2) + 1] * b_.i16[(i * 2) + 1]);
+      r_.i32[i] = simde_math_adds_i32(r_.i32[i], c_.i32[i]);
+    }
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_maddsd_epi16(a, b, c) simde_mm_maddsd_epi16((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_sha_epi8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_sha_epi8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i8 = vshlq_s8(a_.neon_i8, b_.neon_i8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+        if (b_.i8[i] < 0) {
+          r_.i8[i] = HEDLEY_STATIC_CAST(int8_t, a_.i8[i] >> -b_.i8[i]);
+        } else {
+          r_.i8[i] = HEDLEY_STATIC_CAST(int8_t, a_.i8[i] <<  b_.i8[i]);
+        }
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_sha_epi8(a, b) simde_mm_sha_epi8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_sha_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_sha_epi16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i16 = vshlq_s16(a_.neon_i16, b_.neon_i16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
+        if (b_.i16[i] < 0) {
+          r_.i16[i] = HEDLEY_STATIC_CAST(int16_t, a_.i16[i] >> -b_.i16[i]);
+        } else {
+          r_.i16[i] = HEDLEY_STATIC_CAST(int16_t, a_.i16[i] <<  b_.i16[i]);
+        }
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_sha_epi16(a, b) simde_mm_sha_epi16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_sha_epi32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_sha_epi32(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i32 = vshlq_s32(a_.neon_i32, b_.neon_i32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
+        if (b_.i32[i] < 0) {
+          r_.i32[i] = HEDLEY_STATIC_CAST(int32_t, a_.i32[i] >> -b_.i32[i]);
+        } else {
+          r_.i32[i] = HEDLEY_STATIC_CAST(int32_t, a_.i32[i] <<  b_.i32[i]);
+        }
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_sha_epi32(a, b) simde_mm_sha_epi32((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_sha_epi64 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_sha_epi64(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_i64 = vshlq_s64(a_.neon_i64, b_.neon_i64);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
+        if (b_.i64[i] < 0) {
+          r_.i64[i] = HEDLEY_STATIC_CAST(int64_t, a_.i64[i] >> -b_.i64[i]);
+        } else {
+          r_.i64[i] = HEDLEY_STATIC_CAST(int64_t, a_.i64[i] <<  b_.i64[i]);
+        }
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_sha_epi64(a, b) simde_mm_sha_epi64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_shl_epi8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_shl_epi8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u8 = vshlq_u8(a_.neon_u8, b_.neon_i8);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+        if (HEDLEY_UNLIKELY(b_.i8[i] < -7 || b_.i8[i] > 7)) {
+          r_.u8[i] = 0;
+        } else {
+          if (b_.i8[i] < 0) {
+            r_.u8[i] = HEDLEY_STATIC_CAST(uint8_t, a_.u8[i] >> -b_.i8[i]);
+          } else {
+            r_.u8[i] = HEDLEY_STATIC_CAST(uint8_t, a_.u8[i] <<  b_.i8[i]);
+          }
+        }
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_shl_epi8(a, b) simde_mm_shl_epi8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_shl_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_shl_epi16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u16 = vshlq_u16(a_.neon_u16, b_.neon_i16);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+        if (HEDLEY_UNLIKELY(b_.i16[i] < -15 || b_.i16[i] > 15)) {
+          r_.u16[i] = 0;
+        } else {
+          if (b_.i16[i] < 0) {
+            r_.u16[i] = HEDLEY_STATIC_CAST(uint16_t, a_.u16[i] >> -b_.i16[i]);
+          } else {
+            r_.u16[i] = HEDLEY_STATIC_CAST(uint16_t, a_.u16[i] <<  b_.i16[i]);
+          }
+        }
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_shl_epi16(a, b) simde_mm_shl_epi16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_shl_epi32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_shl_epi32(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u32 = vshlq_u32(a_.neon_u32, b_.neon_i32);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+        if (HEDLEY_UNLIKELY(b_.i32[i] < -31 || b_.i32[i] > 31)) {
+          r_.u32[i] = 0;
+        } else {
+          if (b_.i32[i] < 0) {
+            r_.u32[i] = HEDLEY_STATIC_CAST(uint32_t, a_.u32[i] >> -b_.i32[i]);
+          } else {
+            r_.u32[i] = HEDLEY_STATIC_CAST(uint32_t, a_.u32[i] <<  b_.i32[i]);
+          }
+        }
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_shl_epi32(a, b) simde_mm_shl_epi32((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_shl_epi64 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_shl_epi64(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+      r_.neon_u64 = vshlq_u64(a_.neon_u64, b_.neon_i64);
+    #else
+      SIMDE_VECTORIZE
+      for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
+        if (HEDLEY_UNLIKELY(b_.i64[i] < -63 || b_.i64[i] > 63)) {
+          r_.u64[i] = 0;
+        } else {
+          if (b_.i64[i] < 0) {
+            r_.u64[i] = HEDLEY_STATIC_CAST(uint64_t, a_.u64[i] >> -b_.i64[i]);
+          } else {
+            r_.u64[i] = HEDLEY_STATIC_CAST(uint64_t, a_.u64[i] <<  b_.i64[i]);
+          }
+        }
+      }
+    #endif
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_shl_epi64(a, b) simde_mm_shl_epi64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_rot_epi8 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_rot_epi8(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+      r_.u8[i] = (b_.i8[i] < 0) ?
+        HEDLEY_STATIC_CAST(uint8_t, ((a_.u8[i] >> -b_.i8[i]) | (a_.u8[i] << ( b_.i8[i] & 7)))) :
+        HEDLEY_STATIC_CAST(uint8_t, ((a_.u8[i] <<  b_.i8[i]) | (a_.u8[i] >> (-b_.i8[i] & 7))));
+    }
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_rot_epi8(a, b) simde_mm_rot_epi8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_rot_epi16 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_rot_epi16(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+      r_.u16[i] = (b_.i16[i] < 0) ?
+        HEDLEY_STATIC_CAST(uint16_t, ((a_.u16[i] >> -b_.i16[i]) | (a_.u16[i] << ( b_.i16[i] & 15)))) :
+        HEDLEY_STATIC_CAST(uint16_t, ((a_.u16[i] <<  b_.i16[i]) | (a_.u16[i] >> (-b_.i16[i] & 15))));
+    }
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_rot_epi16(a, b) simde_mm_rot_epi16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_rot_epi32 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_rot_epi32(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+      r_.u32[i] = (b_.i32[i] < 0) ?
+        HEDLEY_STATIC_CAST(uint32_t, ((a_.u32[i] >> -b_.i32[i]) | (a_.u32[i] << ( b_.i32[i] & 31)))) :
+        HEDLEY_STATIC_CAST(uint32_t, ((a_.u32[i] <<  b_.i32[i]) | (a_.u32[i] >> (-b_.i32[i] & 31))));
+    }
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_rot_epi32(a, b) simde_mm_rot_epi32((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_rot_epi64 (simde__m128i a, simde__m128i b) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_rot_epi64(a, b);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
+      r_.u64[i] = (b_.i64[i] < 0) ?
+        HEDLEY_STATIC_CAST(uint64_t, ((a_.u64[i] >> -b_.i64[i]) | (a_.u64[i] << ( b_.i64[i] & 63)))) :
+        HEDLEY_STATIC_CAST(uint64_t, ((a_.u64[i] <<  b_.i64[i]) | (a_.u64[i] >> (-b_.i64[i] & 63))));
+    }
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_rot_epi64(a, b) simde_mm_rot_epi64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_roti_epi8 (simde__m128i a, const int count) {
+  simde__m128i_private
+    r_,
+    a_ = simde__m128i_to_private(a);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
+    r_.u8[i] = (count < 0) ?
+      HEDLEY_STATIC_CAST(uint8_t, ((a_.u8[i] >> -count) | (a_.u8[i] << ( count & 7)))) :
+      HEDLEY_STATIC_CAST(uint8_t, ((a_.u8[i] <<  count) | (a_.u8[i] >> (-count & 7))));
+  }
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_XOP_NATIVE)
+  #define simde_mm_roti_epi8(a, count) _mm_roti_epi8((a), (count))
+#endif
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_roti_epi8(a, b) simde_mm_roti_epi8((a), (count))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_roti_epi16 (simde__m128i a, const int count) {
+  simde__m128i_private
+    r_,
+    a_ = simde__m128i_to_private(a);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) {
+    r_.u16[i] = (count < 0) ?
+      HEDLEY_STATIC_CAST(uint16_t, ((a_.u16[i] >> -count) | (a_.u16[i] << ( count & 15)))) :
+      HEDLEY_STATIC_CAST(uint16_t, ((a_.u16[i] <<  count) | (a_.u16[i] >> (-count & 15))));
+  }
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_XOP_NATIVE)
+  #define simde_mm_roti_epi16(a, count) _mm_roti_epi16((a), (count))
+#endif
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_roti_epi16(a, count) simde_mm_roti_epi16((a), (count))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_roti_epi32 (simde__m128i a, const int count) {
+  simde__m128i_private
+    r_,
+    a_ = simde__m128i_to_private(a);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+    r_.u32[i] = (count < 0) ?
+      HEDLEY_STATIC_CAST(uint32_t, ((a_.u32[i] >> -count) | (a_.u32[i] << ( count & 31)))) :
+      HEDLEY_STATIC_CAST(uint32_t, ((a_.u32[i] <<  count) | (a_.u32[i] >> (-count & 31))));
+  }
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_XOP_NATIVE)
+  #define simde_mm_roti_epi32(a, count) _mm_roti_epi32((a), (count))
+#endif
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_roti_epi32(a, count) simde_mm_roti_epi32((a), (count))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_roti_epi64 (simde__m128i a, const int count) {
+  simde__m128i_private
+    r_,
+    a_ = simde__m128i_to_private(a);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
+    r_.u64[i] = (count < 0) ?
+      HEDLEY_STATIC_CAST(uint64_t, ((a_.u64[i] >> -count) | (a_.u64[i] << ( count & 63)))) :
+      HEDLEY_STATIC_CAST(uint64_t, ((a_.u64[i] <<  count) | (a_.u64[i] >> (-count & 63))));
+  }
+
+  return simde__m128i_from_private(r_);
+}
+#if defined(SIMDE_X86_XOP_NATIVE)
+  #define simde_mm_roti_epi64(a, count) _mm_roti_epi64((a), (count))
+#endif
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_roti_epi64(a, count) simde_mm_roti_epi64((a), (count))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128i
+simde_mm_perm_epi8 (simde__m128i a, simde__m128i b, simde__m128i c) {
+  #if defined(SIMDE_X86_XOP_NATIVE)
+    return _mm_perm_epi8(a, b, c);
+  #else
+    simde__m128i_private
+      r_,
+      a_ = simde__m128i_to_private(a),
+      b_ = simde__m128i_to_private(b),
+      c_ = simde__m128i_to_private(c);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
+      int8_t src = (c_.u8[i] & 0x10) ? b_.i8[c_.u8[i] & 0xf] : a_.i8[c_.u8[i] & 0xf];
+
+      switch (c_.u8[i] & 0xc0) {
+        case 0x40:
+          #if HEDLEY_HAS_BUILTIN(__builtin_bitreverse8) && !defined(HEDLEY_IBM_VERSION)
+            src = HEDLEY_STATIC_CAST(int8_t, __builtin_bitreverse8(HEDLEY_STATIC_CAST(uint8_t, src)));
+          #else
+            src = HEDLEY_STATIC_CAST(int8_t, ((HEDLEY_STATIC_CAST(uint8_t, src) * UINT64_C(0x80200802)) & UINT64_C(0x0884422110)) * UINT64_C(0x0101010101) >> 32);
+          #endif
+          break;
+        case 0x80:
+          src = 0;
+          break;
+        case 0xc0:
+          src >>= 7;
+          break;
+      }
+
+      r_.i8[i] = (c_.u8[i] & 0x20) ? ~src : src;
+    }
+
+    return simde__m128i_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_perm_epi8(a, b, c) simde_mm_perm_epi8((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128
+simde_mm_permute2_ps (simde__m128 a, simde__m128 b, simde__m128i c, const int imm8) {
+  simde__m128_private
+    r_,
+    a_ = simde__m128_to_private(a),
+    b_ = simde__m128_to_private(b);
+  simde__m128i_private c_ = simde__m128i_to_private(c);
+
+  const int m2z = imm8 & 0x03;
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+    const int sel = c_.i32[i] & 0x07;
+    const int   m = c_.i32[i] & 0x08;
+
+    switch (m | m2z) {
+      case 0xa:
+      case 0x3:
+        r_.i32[i] = 0;
+        break;
+      default:
+        r_.i32[i] = (sel > 3) ? b_.i32[sel - 4] : a_.i32[sel];
+        break;
+    }
+  }
+
+  return simde__m128_from_private(r_);
+}
+#if defined(SIMDE_X86_XOP_NATIVE)
+  #if defined(HEDLEY_MCST_LCC_VERSION)
+    #define simde_mm_permute2_ps(a, b, c, imm8) (__extension__ ({ \
+      SIMDE_LCC_DISABLE_DEPRECATED_WARNINGS \
+      _mm_permute2_ps((a), (b), (c), (imm8)); \
+      SIMDE_LCC_REVERT_DEPRECATED_WARNINGS \
+    }))
+  #else
+    #define simde_mm_permute2_ps(a, b, c, imm8) _mm_permute2_ps((a), (b), (c), (imm8))
+  #endif
+#endif
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_permute2_ps(a, b, c, imm8) simde_mm_permute2_ps((a), (b), (c), (imm8))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m128d
+simde_mm_permute2_pd (simde__m128d a, simde__m128d b, simde__m128i c, const int imm8) {
+  simde__m128d_private
+    r_,
+    a_ = simde__m128d_to_private(a),
+    b_ = simde__m128d_to_private(b);
+  simde__m128i_private c_ = simde__m128i_to_private(c);
+
+  const int m2z = imm8 & 0x03;
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+    const int sel = (c_.i64[i] & 0x06) >> 1;
+    const int   m = c_.i64[i] & 0x08;
+
+    switch (m | m2z) {
+      case 0x0a:
+      case 0x03:
+        r_.i64[i] = 0;
+        break;
+      default:
+        r_.i64[i] = (sel > 1) ? b_.i64[sel - 2] : a_.i64[sel];
+        break;
+    }
+  }
+
+  return simde__m128d_from_private(r_);
+}
+
+#if defined(SIMDE_X86_XOP_NATIVE)
+  #if defined(HEDLEY_MCST_LCC_VERSION)
+    #define simde_mm_permute2_pd(a, b, c, imm8) (__extension__ ({ \
+      SIMDE_LCC_DISABLE_DEPRECATED_WARNINGS \
+      _mm_permute2_pd((a), (b), (c), (imm8)); \
+      SIMDE_LCC_REVERT_DEPRECATED_WARNINGS \
+    }))
+  #else
+    #define simde_mm_permute2_pd(a, b, c, imm8) _mm_permute2_pd((a), (b), (c), (imm8))
+  #endif
+#endif
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm_permute2_pd(a, b, c, imm8) simde_mm_permute2_pd((a), (b), (c), (imm8))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256
+simde_mm256_permute2_ps (simde__m256 a, simde__m256 b, simde__m256i c, const int imm8) {
+  simde__m256_private
+    r_,
+    a_ = simde__m256_to_private(a),
+    b_ = simde__m256_to_private(b);
+  simde__m256i_private c_ = simde__m256i_to_private(c);
+
+  #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+    for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
+      r_.m128[i] = simde_mm_permute2_ps(a_.m128[i], b_.m128[i], c_.m128i[i], imm8);
+    }
+  #else
+    const int m2z = imm8 & 0x03;
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
+      const int sel = c_.i32[i] & 0x07;
+      const int   m = c_.i32[i] & 0x08;
+
+      switch (m | m2z) {
+        case 0xa:
+        case 0x3:
+          r_.i32[i] = 0;
+          break;
+        default:
+          r_.i32[i] = (sel > 3) ? b_.i32[sel + (HEDLEY_STATIC_CAST(int, i) & 4) - 4] : a_.i32[sel + (HEDLEY_STATIC_CAST(int, i) & 4)];
+          break;
+      }
+    }
+  #endif
+
+  return simde__m256_from_private(r_);
+}
+
+#if defined(SIMDE_X86_XOP_NATIVE)
+  #if defined(HEDLEY_MCST_LCC_VERSION)
+    #define simde_mm256_permute2_ps(a, b, c, imm8) (__extension__ ({ \
+      SIMDE_LCC_DISABLE_DEPRECATED_WARNINGS \
+      _mm256_permute2_ps((a), (b), (c), (imm8)); \
+      SIMDE_LCC_REVERT_DEPRECATED_WARNINGS \
+    }))
+  #else
+    #define simde_mm256_permute2_ps(a, b, c, imm8) _mm256_permute2_ps((a), (b), (c), (imm8))
+  #endif
+#endif
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm256_permute2_ps(a, b, c, imm8) simde_mm256_permute2_ps((a), (b), (c), (imm8))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde__m256d
+simde_mm256_permute2_pd (simde__m256d a, simde__m256d b, simde__m256i c, const int imm8) {
+  simde__m256d_private
+    r_,
+    a_ = simde__m256d_to_private(a),
+    b_ = simde__m256d_to_private(b);
+  simde__m256i_private c_ = simde__m256i_to_private(c);
+
+  #if SIMDE_NATURAL_VECTOR_SIZE_LE(128)
+    for (size_t i = 0 ; i < (sizeof(r_.m128d) / sizeof(r_.m128d[0])) ; i++) {
+      r_.m128d[i] = simde_mm_permute2_pd(a_.m128d[i], b_.m128d[i], c_.m128i[i], imm8);
+    }
+  #else
+    const int m2z = imm8 & 0x03;
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
+      const int sel = (c_.i64[i] & 0x06) >> 1;
+      const int   m = c_.i64[i] & 0x08;
+
+      switch (m | m2z) {
+        case 0x0a:
+        case 0x03:
+          r_.i64[i] = 0;
+          break;
+        default:
+          r_.i64[i] = (sel > 1) ? b_.i64[sel + (HEDLEY_STATIC_CAST(int, i) & 2) - 2] : a_.i64[sel + (HEDLEY_STATIC_CAST(int, i) & 2)];
+          break;
+      }
+    }
+  #endif
+
+  return simde__m256d_from_private(r_);
+}
+#if defined(SIMDE_X86_XOP_NATIVE)
+  #if defined(HEDLEY_MCST_LCC_VERSION)
+    #define simde_mm256_permute2_pd(a, b, c, imm8) (__extension__ ({ \
+      SIMDE_LCC_DISABLE_DEPRECATED_WARNINGS \
+      _mm256_permute2_pd((a), (b), (c), (imm8)); \
+      SIMDE_LCC_REVERT_DEPRECATED_WARNINGS \
+    }))
+  #else
+    #define simde_mm256_permute2_pd(a, b, c, imm8) _mm256_permute2_pd((a), (b), (c), (imm8))
+  #endif
+#endif
+#if defined(SIMDE_X86_XOP_ENABLE_NATIVE_ALIASES)
+  #define _mm256_permute2_pd(a, b, c, imm8) simde_mm256_permute2_pd((a), (b), (c), (imm8))
+#endif
+
+HEDLEY_DIAGNOSTIC_POP
+SIMDE_END_DECLS_
+
+#endif /* !defined(SIMDE_X86_XOP_H) */
diff --git a/src/Geno.cpp b/src/Geno.cpp
index 017e30c..f4e5e88 100644
--- a/src/Geno.cpp
+++ b/src/Geno.cpp
@@ -25,7 +25,7 @@
 
 void GenoData::read_bim_file() {
 
-    std::string bim_file = bed_prefix + ".bim";
+    std::string bim_file = geno_prefix + ".bim";
     std::ifstream file(bim_file);
     if (!file.is_open()) {
         std::cerr << "Error: Unable to open BIM file " << bim_file << std::endl;
@@ -61,8 +61,8 @@ void GenoData::read_bim_file() {
     }
 
     n_snps = index;
-    std::cout << "Number of SNPs: " << n_snps << std::endl;
-    std::cout << "SNPs on chromosome(s): ";
+    std::cout << "Read " << format_with_commas(n_snps) << " SNPs from .bim file,";
+    std::cout << " on chromosome(s): ";
     std::vector<int> unique_chrom = chrom;
     std::sort(unique_chrom.begin(), unique_chrom.end());
     unique_chrom.erase(std::unique(unique_chrom.begin(), unique_chrom.end()), unique_chrom.end());
@@ -79,7 +79,7 @@ void GenoData::read_bim_file() {
 
 void GenoData::read_fam_file() {
 
-    std::string fam_file = bed_prefix + ".fam";
+    std::string fam_file = geno_prefix + ".fam";
     std::ifstream file(fam_file);
     if (!file.is_open()) {
         std::cerr << "Error: Unable to open FAM file " << fam_file << std::endl;
@@ -99,13 +99,13 @@ void GenoData::read_fam_file() {
     }
     n_samples = sample_ids.size();
 
-    std::cout << "Number of samples: " << n_samples << std::endl;
+    std::cout << "Read information for " << n_samples << " samples from .fam file." << std::endl;
 
     file.close();
 }
 
 void GenoData::prepare_bed_file() {
-    std::string bed_file = bed_prefix + ".bed";
+    std::string bed_file = geno_prefix + ".bed";
     std::ifstream file(bed_file, std::ios::binary);
     if (!file.is_open()) {
         std::cerr << "Error: Unable to open BED file " << bed_file << std::endl;
@@ -127,7 +127,7 @@ void GenoData::prepare_bed_file() {
 }
 
 void GenoData::read_bed_file() {
-    std::string bed_file = bed_prefix + ".bed";
+    std::string bed_file = geno_prefix + ".bed";
     std::ifstream file(bed_file, std::ios::binary);
     if (!file.is_open()) {
         std::cerr << "Error: Unable to open BED file " << bed_file << std::endl;
@@ -254,3 +254,156 @@ void GenoData::slice_samples(std::vector<std::string>& sample_ids) {
     this->sample_ids = sample_ids;
     n_samples = sample_ids.size();
 }
+
+// PLINK2 format readers
+
+void GenoData::read_pvar_file() {
+    std::string pvar_file = geno_prefix + ".pvar";
+    std::ifstream file(pvar_file);
+    if (!file.is_open()) {
+        std::cerr << "Error: Unable to open pvar file " << pvar_file << std::endl;
+        exit(1);
+    }
+
+    std::string line;
+    std::vector<std::string> tokens;
+    size_t idx = 0;
+    
+    // Find column indices from header
+    int chrom_col = -1, pos_col = -1, id_col = -1, ref_col = -1, alt_col = -1;
+    
+    while (std::getline(file, line)) {
+        remove_carriage_return(line);
+        
+        // Skip comment lines but parse the header
+        if (line[0] == '#') {
+            if (line.substr(0, 6) == "#CHROM") {
+                tokens = string_split(line, "\t");
+                for (size_t i = 0; i < tokens.size(); ++i) {
+                    if (tokens[i] == "#CHROM") chrom_col = i;
+                    else if (tokens[i] == "POS") pos_col = i;
+                    else if (tokens[i] == "ID") id_col = i;
+                    else if (tokens[i] == "REF") ref_col = i;
+                    else if (tokens[i] == "ALT") alt_col = i;
+                }
+            }
+            continue;
+        }
+        
+        tokens = string_split(line, "\t");
+        
+        // Parse chromosome.
+        try {
+            chrom.push_back(std::stoi(tokens[chrom_col]));
+        } catch (const std::invalid_argument& e) {
+            std::cerr << "Error: Invalid chromosome detected: " << tokens[chrom_col] << std::endl;
+            std::cerr << "quasar currently only supports autosomal chromosomes." << std::endl;
+            std::cerr << "Data can be filtered with plink2: " << std::endl;
+            std::cerr << "plink2 --pfile {data} --autosome --make-pgen --out {autosome_data}" << std::endl;
+            exit(1);
+        }
+        
+        pos.push_back(std::stoul(tokens[pos_col]));
+        id.push_back(tokens[id_col]);
+        ref.push_back(tokens[ref_col]);
+        alt.push_back(tokens[alt_col]);
+        snp_id.push_back(tokens[chrom_col] + ":" + tokens[pos_col] + tokens[ref_col] + "-" + tokens[alt_col]);
+        this->index.push_back(idx);
+        idx++;
+    }
+
+    n_snps = idx;
+    std::cout << "Read " << format_with_commas(n_snps) << " SNPs from .pvar file,";
+    std::cout << " on chromosome(s): ";
+    std::vector<int> unique_chrom = chrom;
+    std::sort(unique_chrom.begin(), unique_chrom.end());
+    unique_chrom.erase(std::unique(unique_chrom.begin(), unique_chrom.end()), unique_chrom.end());
+    for (size_t i = 0; i < unique_chrom.size(); ++i) {
+        std::cout << unique_chrom[i];
+        if (i < unique_chrom.size() - 1) {
+            std::cout << ", ";
+        }
+    }
+    std::cout << std::endl;
+
+    file.close();
+}
+
+void GenoData::read_psam_file() {
+    std::string psam_file = geno_prefix + ".psam";
+    std::ifstream file(psam_file);
+    if (!file.is_open()) {
+        std::cerr << "Error: Unable to open PSAM file " << psam_file << std::endl;
+        exit(1);
+    }
+
+    std::string line;
+    std::vector<std::string> tokens;
+    int iid_col = -1;
+    
+    while (std::getline(file, line)) {
+        remove_carriage_return(line);
+        
+        // Parse header to find IID column.
+        if (line[0] == '#') {
+            tokens = string_split(line, "\t");
+            for (size_t i = 0; i < tokens.size(); ++i) {
+                if (tokens[i] == "IID" || tokens[i] == "#IID") {
+                    iid_col = i;
+                    break;
+                }
+            }
+            // If no IID column, assume FID is first and IID is second.
+            if (iid_col == -1 && tokens.size() >= 2) {
+                iid_col = 1;
+            }
+            continue;
+        }
+        
+        tokens = string_split(line, "\t");
+        if (iid_col >= 0 && iid_col < (int)tokens.size()) {
+            sample_ids.push_back(tokens[iid_col]);
+        } else if (tokens.size() >= 2) {
+            // Fallback: assume IID is second column
+            sample_ids.push_back(tokens[1]);
+        } else {
+            sample_ids.push_back(tokens[0]);
+        }
+    }
+    
+    n_samples = sample_ids.size();
+    std::cout << "Read information for " << n_samples << " samples from .psam file." << std::endl;
+
+    file.close();
+}
+
+void GenoData::read_pgen_file() {
+    std::string pgen_file = geno_prefix + ".pgen";
+    
+    PgenReader pgen_reader;
+    std::vector<int> empty_subset;
+    pgen_reader.Load(pgen_file, n_samples, empty_subset, 1);
+    
+    uint32_t variant_ct = pgen_reader.GetVariantCt();
+    if (variant_ct != n_snps) {
+        std::cerr << "Error: Variant count mismatch between .pvar (" << n_snps 
+                  << ") and .pgen (" << variant_ct << ")" << std::endl;
+        exit(1);
+    }
+    
+    // Allocate genotype matrix (samples x variants)
+    genotype_matrix.resize(n_samples, n_snps);
+    
+    // Read each variant
+    std::vector<double> buf(n_samples);
+    for (size_t i = 0; i < n_snps; ++i) {
+        pgen_reader.Read(buf.data(), n_samples, 0, i, 1);
+        for (size_t j = 0; j < n_samples; ++j) {
+            genotype_matrix(j, i) = buf[j];
+        }
+    }
+    
+    pgen_reader.Close();
+    
+    std::cout << "Genotype matrix read successfully." << std::endl;
+}
\ No newline at end of file
diff --git a/src/Geno.hpp b/src/Geno.hpp
index a460585..390882a 100644
--- a/src/Geno.hpp
+++ b/src/Geno.hpp
@@ -24,11 +24,13 @@
 #include <map>
 
 #include "Eigen/Dense"
+#include "pgenlibr.h"
 
 class GenoData {
   public:
-    std::string bed_prefix;
-    
+    std::string geno_prefix;
+    std::string genotype_foramt;
+  
     Eigen::MatrixXd genotype_matrix;
     
     size_t n_samples;
@@ -45,15 +47,23 @@ class GenoData {
     std::vector<size_t> index;
     std::vector<double> maf;
 
-    GenoData(std::string bed_prefix) {
-      this->bed_prefix = bed_prefix;
+    GenoData(std::string geno_prefix, std::string genotype_format) {
+        this->geno_prefix = geno_prefix;
+        this->genotype_foramt = genotype_format;
     }
 
-    void read_bim_file();
-    void read_fam_file();
-    void prepare_bed_file();
+     // PLINK1 format (.bed, .bim, .fam)
+     void read_bim_file();
+     void read_fam_file();
+     void prepare_bed_file();
+     void read_bed_file();
+     
+     // PLINK2 format (.pgen, .pvar, .psam)
+     void read_pvar_file();
+     void read_psam_file();
+     void read_pgen_file();
+
     void run_mean_imputation();
-    void read_bed_file();
     void compute_maf();
     void compute_maf_problems();
     void maf_warning();
diff --git a/src/Quasar.cpp b/src/Quasar.cpp
index 5309db1..ade4d71 100644
--- a/src/Quasar.cpp
+++ b/src/Quasar.cpp
@@ -35,6 +35,7 @@ int main(int argc, char* argv[]) {
         ("v,version", "Display version information")
         // Data arguments.
         ("p,plink", "Prefix to PLINK files (.bed, .bim, .fam)", cxxopts::value<std::string>(params.plink_prefix))
+        ("pgen", "Prefix to PLINK2 files (.pgen, .pvar, .psam)", cxxopts::value<std::string>(params.pgen_prefix))
         ("b,bed", "Bed file holding phenotype informaton", cxxopts::value<std::string>(params.bed_file)->default_value("no-bed"))
         ("c,cov", "Covariate file", cxxopts::value<std::string>(params.cov_file))
         ("r,resid", "Residualised phenotype bed file", cxxopts::value<std::string>(params.resid_file)->default_value("no-resid"))
@@ -84,9 +85,29 @@ int main(int argc, char* argv[]) {
         std::cerr << "Invalid mode specified. Please use one of 'cis', 'trans', 'gwas', 'residualise'" << std::endl;
         exit(1);
     }
+
+     // Check genotype input.
+     if (params.plink_prefix.empty() && params.pgen_prefix.empty()) {
+        std::cerr << "Error: genotype data must be provided via --plink or --pgen." << std::endl;
+        exit(1);
+    }
+    if (!params.plink_prefix.empty() && !params.pgen_prefix.empty()) {
+        std::cerr << "Error: only one of --plink or --pgen can be specified." << std::endl;
+        exit(1);
+    }
+
+    std::string geno_prefix;
+    if (!params.plink_prefix.empty()) {
+        params.genotype_format = "bed";
+        geno_prefix = params.plink_prefix;
+    } else if (!params.pgen_prefix.empty()) {
+        params.genotype_format = "pgen";
+        geno_prefix = params.pgen_prefix;
+    }
     
     std::cout << "\nmode: " << params.mode << std::endl;
     std::cout << "model: " << params.model << std::endl;
+    std::cout << "genotype format: " << params.genotype_format << std::endl;
 
     if (params.model == "p_glm") {
         std::cout << "Warning: using the Poisson GLM is not recommended due to its high rate of false positives." << std::endl;
@@ -136,9 +157,14 @@ int main(int argc, char* argv[]) {
         grm.read_grm();
     }
     
-    GenoData geno_data(params.plink_prefix);
-    geno_data.read_fam_file();
-    geno_data.read_bim_file();
+    GenoData geno_data(geno_prefix, params.genotype_format);
+    if (params.genotype_format == "pgen") {
+        geno_data.read_psam_file();
+        geno_data.read_pvar_file();
+    } else if (params.genotype_format == "bed") {
+        geno_data.read_fam_file();
+        geno_data.read_bim_file();
+    }
 
     std::cout << "\nComputing sample intersection and filtering data..." << std::endl;
     std::vector<std::vector<std::string>> sample_ids_vecs = {
@@ -213,8 +239,12 @@ int main(int argc, char* argv[]) {
     }
 
     std::cout << "\nReading genotype data..." << std::endl;
-    geno_data.prepare_bed_file();
-    geno_data.read_bed_file();
+    if (params.genotype_format == "pgen") {
+        geno_data.read_pgen_file();
+    } else if (params.genotype_format == "bed") {
+        geno_data.prepare_bed_file();
+        geno_data.read_bed_file();
+    }
     geno_data.run_mean_imputation();
     geno_data.slice_samples(int_sample_ids);
     geno_data.compute_maf();
diff --git a/src/Quasar.hpp b/src/Quasar.hpp
index 72b11b3..3f02579 100644
--- a/src/Quasar.hpp
+++ b/src/Quasar.hpp
@@ -34,6 +34,7 @@
 struct Params {
 
     std::string plink_prefix;
+    std::string pgen_prefix;
     std::string grm_file;
     std::string cov_file;
     std::string bed_file;
@@ -42,6 +43,7 @@ struct Params {
 
     std::string mode; 
     std::string model;
+    std::string genotype_format;
     int window_size = 1000000;
     bool use_apl;