Wrong instruction decoding in disasm and cpu status

[adrian4096]

st
	J a
	RESB 0x1000
a	J st
	END 0

When this program is assembled the J 1003 doesn't fit into 11 bits, and so Sic.asm is forced to pick another addressing mode other than PC-rel.

When simple mode also fails (0x1003) doesn't fit into 12 bits, it picks sic mode.

00000  3C1003    st   J       a    
00003  00....00       RESB    4096    
01003  3F0000    a    J       st    
01006                 END     0    

which Sic.sim incorrectly disassembles to:

[Kljunas2]

The issue happens at the time when the flags are constructed from data in memory, the second byte is passed even if the ni bits are 00.
There are multiple ways to solve this (quite simple), you can check the Flags.java class or where the constructor is used