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Merge tag 'pull-aspeed-20250704' of https://github.com/legoater/qemu into staging
aspeed queue: * Improved AST2700 SoC modeling (SDMC, SCU) * Fixed hardware strapping of 'bletchley-bmc' machine * Added new Meta 'catalina-bmc' machine and functional test using OpenBMC * Improved AST2600 SCU protection key modeling * Introduced AST2600 SCU unit tests * Deprecated 'ast2700a0-evb' machine * Added new NVIDIA 'gb200-bmc' machine and functional test using OpenBMC # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmhnknUACgkQUaNDx8/7 # 7KFPDBAAiHW7cu64JszAPk3SBHR8b021JpOrnF9Xp/UHMjNt0Kuazm6jkc/FeOJf # yOKGfvuZUiLLcTrN8iCrVjjxIMKlzQP4KQEFaAPyxvKZo6j4czFZQ7AHS3G28w8l # qrF4UsOhgQ6TL6fXMyqzDSLDEf5o/1ZCn1t+wkuDeVR7YVoAFj/si/A+qmIGQODJ # egVmBopUzGrnGCcZREcKfJKmx1JOfVGFpm5HHPlazCaNTyKynd4rm2qP2St1eDEQ # vOvSBZXKUHmpV9ckdY+Hp0VHvO2oIifDTN+Zbd2XT9RxO36VMnQxiSxOZOj/aRWa # dc87OprPKjjS7Tbg7SZF7ySgfOShXWtNOwLuyrlw6BFsaHtwU2VP/mYR/Tfz/1Lw # 57ufAj04nh8bWp7LApXyui53/1X431oBFji6agWnonMut+e5Xv0JKdBeCu2y8Fj4 # wPpiNcaa8AgHUuJ8T/WXrogeAYXYPI7z1iCY5tX9xffvcL6B3cVLGlI+mXoCIK7O # MTuS5d8CB0gQondLS0Y86ls5pM3RkW6izragH38ukuubKIRq1hjxFDBnF8AQJl7A # pUWTTxhxNZaJie0F5grD7aCVPCSSr1ck1V3zbW/ffVX+7kEtCBW/Zk4qfw9/SGxd # 2QKbstRPNgTl78EKquYwipFVNyHTP/W8iXfxwpFALKBJFkmzAjQ= # =i7wx # -----END PGP SIGNATURE----- # gpg: Signature made Fri 04 Jul 2025 04:36:05 EDT # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@redhat.com>" [full] # gpg: aka "Cédric Le Goater <clg@kaod.org>" [full] # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * tag 'pull-aspeed-20250704' of https://github.com/legoater/qemu: tests/functional: Add gb200 tests hw/arm/aspeed: Add GB200 BMC target docs: add support for gb200-bmc hw/arm/aspeed: Add second SPI chip to Aspeed model aspeed: Deprecate the ast2700a0-evb machine tests/qtest: Add test for ASPEED SCU hw/misc/aspeed_scu: Handle AST2600 protection key registers correctly hw/arm/aspeed: add Catalina machine type hw/arm/aspeed: bletchley: update hw strap values hw/misc/aspeed_scu: Support the Frequency Counter Control register for AST2700 hw/misc/aspeed_sdmc: Skipping dram_init in u-boot for AST2700 Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2 parents c77283d + 3a34dad commit a876b05

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‎docs/about/deprecated.rst‎

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Original file line numberDiff line numberDiff line change
@@ -315,6 +315,14 @@ deprecated; use the new name ``dtb-randomness`` instead. The new name
315315
better reflects the way this property affects all random data within
316316
the device tree blob, not just the ``kaslr-seed`` node.
317317

318+
Arm ``ast2700a0-evb`` machine (since 10.1)
319+
''''''''''''''''''''''''''''''''''''''''''
320+
321+
The ``ast2700a0-evb`` machine represents the first revision of the AST2700
322+
and serves as the initial engineering sample rather than a production version.
323+
A newer revision, A1, is now supported, and the ``ast2700a1-evb`` should
324+
replace the older A0 version.
325+
318326
Mips ``mipssim`` machine (since 10.0)
319327
'''''''''''''''''''''''''''''''''''''
320328

‎docs/system/arm/aspeed.rst‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,4 @@
1-
Aspeed family boards (``ast2500-evb``, ``ast2600-evb``, ``ast2700-evb``, ``bletchley-bmc``, ``fuji-bmc``, ``fby35-bmc``, ``fp5280g2-bmc``, ``g220a-bmc``, ``palmetto-bmc``, ``qcom-dc-scm-v1-bmc``, ``qcom-firework-bmc``, ``quanta-q71l-bmc``, ``rainier-bmc``, ``romulus-bmc``, ``sonorapass-bmc``, ``supermicrox11-bmc``, ``supermicrox11spi-bmc``, ``tiogapass-bmc``, ``witherspoon-bmc``, ``yosemitev2-bmc``)
2-
=================================================================================================================================================================================================================================================================================================================================================================================================================================
1+
Aspeed family boards (``ast2500-evb``, ``ast2600-evb``, ``ast2700-evb``, ``bletchley-bmc``, ``fuji-bmc``, ``gb200nvl-bmc``, ``fby35-bmc``, ``fp5280g2-bmc``, ``g220a-bmc``, ``palmetto-bmc``, ``qcom-dc-scm-v1-bmc``, ``qcom-firework-bmc``, ``quanta-q71l-bmc``, ``rainier-bmc``, ``romulus-bmc``, ``sonorapass-bmc``, ``supermicrox11-bmc``, ``supermicrox11spi-bmc``, ``tiogapass-bmc``, ``witherspoon-bmc``, ``yosemitev2-bmc``)
32

43
The QEMU Aspeed machines model BMCs of various OpenPOWER systems and
54
Aspeed evaluation boards. They are based on different releases of the
@@ -35,6 +34,7 @@ AST2600 SoC based machines :
3534
- ``fuji-bmc`` Facebook Fuji BMC
3635
- ``bletchley-bmc`` Facebook Bletchley BMC
3736
- ``fby35-bmc`` Facebook fby35 BMC
37+
- ``gb200nvl-bmc`` Nvidia GB200nvl BMC
3838
- ``qcom-dc-scm-v1-bmc`` Qualcomm DC-SCM V1 BMC
3939
- ``qcom-firework-bmc`` Qualcomm Firework BMC
4040

‎hw/arm/Kconfig‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -532,6 +532,7 @@ config ASPEED_SOC
532532
select I2C
533533
select DPS310
534534
select PCA9552
535+
select PCA9554
535536
select SERIAL_MM
536537
select SMBUS_EEPROM
537538
select PCA954X

‎hw/arm/aspeed.c‎

Lines changed: 282 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,7 @@
1919
#include "hw/i2c/i2c_mux_pca954x.h"
2020
#include "hw/i2c/smbus_eeprom.h"
2121
#include "hw/gpio/pca9552.h"
22+
#include "hw/gpio/pca9554.h"
2223
#include "hw/nvram/eeprom_at24c.h"
2324
#include "hw/sensor/tmp105.h"
2425
#include "hw/misc/led.h"
@@ -197,9 +198,12 @@ struct AspeedMachineState {
197198
#define FUJI_BMC_HW_STRAP2 0x00000000
198199

199200
/* Bletchley hardware value */
200-
/* TODO: Leave same as EVB for now. */
201-
#define BLETCHLEY_BMC_HW_STRAP1 AST2600_EVB_HW_STRAP1
202-
#define BLETCHLEY_BMC_HW_STRAP2 AST2600_EVB_HW_STRAP2
201+
#define BLETCHLEY_BMC_HW_STRAP1 0x00002000
202+
#define BLETCHLEY_BMC_HW_STRAP2 0x00000801
203+
204+
/* GB200NVL hardware value */
205+
#define GB200NVL_BMC_HW_STRAP1 AST2600_EVB_HW_STRAP1
206+
#define GB200NVL_BMC_HW_STRAP2 AST2600_EVB_HW_STRAP2
203207

204208
/* Qualcomm DC-SCM hardware value */
205209
#define QCOM_DC_SCM_V1_BMC_HW_STRAP1 0x00000000
@@ -465,6 +469,8 @@ static void aspeed_machine_init(MachineState *machine)
465469
aspeed_board_init_flashes(&bmc->soc->spi[0],
466470
bmc->spi_model ? bmc->spi_model : amc->spi_model,
467471
1, amc->num_cs);
472+
aspeed_board_init_flashes(&bmc->soc->spi[1],
473+
amc->spi2_model, 1, amc->num_cs2);
468474
}
469475

470476
if (machine->kernel_filename && sc->num_cpus > 1) {
@@ -645,6 +651,12 @@ static void create_pca9552(AspeedSoCState *soc, int bus_id, int addr)
645651
TYPE_PCA9552, addr);
646652
}
647653

654+
static I2CSlave *create_pca9554(AspeedSoCState *soc, int bus_id, int addr)
655+
{
656+
return i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, bus_id),
657+
TYPE_PCA9554, addr);
658+
}
659+
648660
static void sonorapass_bmc_i2c_init(AspeedMachineState *bmc)
649661
{
650662
AspeedSoCState *soc = bmc->soc;
@@ -1003,6 +1015,180 @@ static void fuji_bmc_i2c_init(AspeedMachineState *bmc)
10031015
}
10041016

10051017
#define TYPE_TMP421 "tmp421"
1018+
#define TYPE_DS1338 "ds1338"
1019+
1020+
/* Catalina hardware value */
1021+
#define CATALINA_BMC_HW_STRAP1 0x00002002
1022+
#define CATALINA_BMC_HW_STRAP2 0x00000800
1023+
1024+
#define CATALINA_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB)
1025+
1026+
static void catalina_bmc_i2c_init(AspeedMachineState *bmc)
1027+
{
1028+
/* Reference from v6.16-rc2 aspeed-bmc-facebook-catalina.dts */
1029+
1030+
AspeedSoCState *soc = bmc->soc;
1031+
I2CBus *i2c[16] = {};
1032+
I2CSlave *i2c_mux;
1033+
1034+
/* busses 0-15 are all used. */
1035+
for (int i = 0; i < ARRAY_SIZE(i2c); i++) {
1036+
i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i);
1037+
}
1038+
1039+
/* &i2c0 */
1040+
/* i2c-mux@71 (PCA9546) on i2c0 */
1041+
i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x71);
1042+
1043+
/* i2c-mux@72 (PCA9546) on i2c0 */
1044+
i2c_mux = i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x72);
1045+
1046+
/* i2c0mux1ch1 */
1047+
/* io_expander7 - pca9535@20 */
1048+
i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 1),
1049+
TYPE_PCA9552, 0x20);
1050+
/* eeprom@50 */
1051+
at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x50, 8 * KiB);
1052+
1053+
/* i2c-mux@73 (PCA9546) on i2c0 */
1054+
i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x73);
1055+
1056+
/* i2c-mux@75 (PCA9546) on i2c0 */
1057+
i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x75);
1058+
1059+
/* i2c-mux@76 (PCA9546) on i2c0 */
1060+
i2c_mux = i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x76);
1061+
1062+
/* i2c0mux4ch1 */
1063+
/* io_expander8 - pca9535@21 */
1064+
i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 1),
1065+
TYPE_PCA9552, 0x21);
1066+
/* eeprom@50 */
1067+
at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x50, 8 * KiB);
1068+
1069+
/* i2c-mux@77 (PCA9546) on i2c0 */
1070+
i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x77);
1071+
1072+
1073+
/* &i2c1 */
1074+
/* i2c-mux@70 (PCA9548) on i2c1 */
1075+
i2c_mux = i2c_slave_create_simple(i2c[1], TYPE_PCA9548, 0x70);
1076+
/* i2c1mux0ch0 */
1077+
/* ina238@41 - no model */
1078+
/* ina238@42 - no model */
1079+
/* ina238@44 - no model */
1080+
/* i2c1mux0ch1 */
1081+
/* ina238@41 - no model */
1082+
/* ina238@43 - no model */
1083+
/* i2c1mux0ch4 */
1084+
/* ltc4287@42 - no model */
1085+
/* ltc4287@43 - no model */
1086+
1087+
/* i2c1mux0ch5 */
1088+
/* eeprom@54 */
1089+
at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 5), 0x54, 8 * KiB);
1090+
/* tpm75@4f */
1091+
i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 5), TYPE_TMP75, 0x4f);
1092+
1093+
/* i2c1mux0ch6 */
1094+
/* io_expander5 - pca9554@27 */
1095+
i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 6),
1096+
TYPE_PCA9554, 0x27);
1097+
/* io_expander6 - pca9555@25 */
1098+
i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 6),
1099+
TYPE_PCA9552, 0x25);
1100+
/* eeprom@51 */
1101+
at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 6), 0x51, 8 * KiB);
1102+
1103+
/* i2c1mux0ch7 */
1104+
/* eeprom@53 */
1105+
at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 7), 0x53, 8 * KiB);
1106+
/* temperature-sensor@4b - tmp75 */
1107+
i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 7), TYPE_TMP75, 0x4b);
1108+
1109+
/* &i2c2 */
1110+
/* io_expander0 - pca9555@20 */
1111+
i2c_slave_create_simple(i2c[2], TYPE_PCA9552, 0x20);
1112+
/* io_expander0 - pca9555@21 */
1113+
i2c_slave_create_simple(i2c[2], TYPE_PCA9552, 0x21);
1114+
/* io_expander0 - pca9555@27 */
1115+
i2c_slave_create_simple(i2c[2], TYPE_PCA9552, 0x27);
1116+
/* eeprom@50 */
1117+
at24c_eeprom_init(i2c[2], 0x50, 8 * KiB);
1118+
/* eeprom@51 */
1119+
at24c_eeprom_init(i2c[2], 0x51, 8 * KiB);
1120+
1121+
/* &i2c5 */
1122+
/* i2c-mux@70 (PCA9548) on i2c5 */
1123+
i2c_mux = i2c_slave_create_simple(i2c[5], TYPE_PCA9548, 0x70);
1124+
/* i2c5mux0ch6 */
1125+
/* eeprom@52 */
1126+
at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 6), 0x52, 8 * KiB);
1127+
/* i2c5mux0ch7 */
1128+
/* ina230@40 - no model */
1129+
/* ina230@41 - no model */
1130+
/* ina230@44 - no model */
1131+
/* ina230@45 - no model */
1132+
1133+
/* &i2c6 */
1134+
/* io_expander3 - pca9555@21 */
1135+
i2c_slave_create_simple(i2c[6], TYPE_PCA9552, 0x21);
1136+
/* rtc@6f - nct3018y */
1137+
i2c_slave_create_simple(i2c[6], TYPE_DS1338, 0x6f);
1138+
1139+
/* &i2c9 */
1140+
/* io_expander4 - pca9555@4f */
1141+
i2c_slave_create_simple(i2c[9], TYPE_PCA9552, 0x4f);
1142+
/* temperature-sensor@4b - tpm75 */
1143+
i2c_slave_create_simple(i2c[9], TYPE_TMP75, 0x4b);
1144+
/* eeprom@50 */
1145+
at24c_eeprom_init(i2c[9], 0x50, 8 * KiB);
1146+
/* eeprom@56 */
1147+
at24c_eeprom_init(i2c[9], 0x56, 8 * KiB);
1148+
1149+
/* &i2c10 */
1150+
/* temperature-sensor@1f - tpm421 */
1151+
i2c_slave_create_simple(i2c[10], TYPE_TMP421, 0x1f);
1152+
/* eeprom@50 */
1153+
at24c_eeprom_init(i2c[10], 0x50, 8 * KiB);
1154+
1155+
/* &i2c11 */
1156+
/* ssif-bmc@10 - no model */
1157+
1158+
/* &i2c12 */
1159+
/* eeprom@50 */
1160+
at24c_eeprom_init(i2c[12], 0x50, 8 * KiB);
1161+
1162+
/* &i2c13 */
1163+
/* eeprom@50 */
1164+
at24c_eeprom_init(i2c[13], 0x50, 8 * KiB);
1165+
/* eeprom@54 */
1166+
at24c_eeprom_init(i2c[13], 0x54, 256);
1167+
/* eeprom@55 */
1168+
at24c_eeprom_init(i2c[13], 0x55, 256);
1169+
/* eeprom@57 */
1170+
at24c_eeprom_init(i2c[13], 0x57, 256);
1171+
1172+
/* &i2c14 */
1173+
/* io_expander9 - pca9555@10 */
1174+
i2c_slave_create_simple(i2c[14], TYPE_PCA9552, 0x10);
1175+
/* io_expander10 - pca9555@11 */
1176+
i2c_slave_create_simple(i2c[14], TYPE_PCA9552, 0x11);
1177+
/* io_expander11 - pca9555@12 */
1178+
i2c_slave_create_simple(i2c[14], TYPE_PCA9552, 0x12);
1179+
/* io_expander12 - pca9555@13 */
1180+
i2c_slave_create_simple(i2c[14], TYPE_PCA9552, 0x13);
1181+
/* io_expander13 - pca9555@14 */
1182+
i2c_slave_create_simple(i2c[14], TYPE_PCA9552, 0x14);
1183+
/* io_expander14 - pca9555@15 */
1184+
i2c_slave_create_simple(i2c[14], TYPE_PCA9552, 0x15);
1185+
1186+
/* &i2c15 */
1187+
/* temperature-sensor@1f - tmp421 */
1188+
i2c_slave_create_simple(i2c[15], TYPE_TMP421, 0x1f);
1189+
/* eeprom@52 */
1190+
at24c_eeprom_init(i2c[15], 0x52, 8 * KiB);
1191+
}
10061192

10071193
static void bletchley_bmc_i2c_init(AspeedMachineState *bmc)
10081194
{
@@ -1050,6 +1236,45 @@ static void bletchley_bmc_i2c_init(AspeedMachineState *bmc)
10501236
i2c_slave_create_simple(i2c[12], TYPE_PCA9552, 0x67);
10511237
}
10521238

1239+
1240+
static void gb200nvl_bmc_i2c_init(AspeedMachineState *bmc)
1241+
{
1242+
AspeedSoCState *soc = bmc->soc;
1243+
I2CBus *i2c[15] = {};
1244+
DeviceState *dev;
1245+
for (int i = 0; i < sizeof(i2c) / sizeof(i2c[0]); i++) {
1246+
if ((i == 11) || (i == 12) || (i == 13)) {
1247+
continue;
1248+
}
1249+
i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i);
1250+
}
1251+
1252+
/* Bus 5 Expander */
1253+
create_pca9554(soc, 4, 0x21);
1254+
1255+
/* Mux I2c Expanders */
1256+
i2c_slave_create_simple(i2c[5], "pca9546", 0x71);
1257+
i2c_slave_create_simple(i2c[5], "pca9546", 0x72);
1258+
i2c_slave_create_simple(i2c[5], "pca9546", 0x73);
1259+
i2c_slave_create_simple(i2c[5], "pca9546", 0x75);
1260+
i2c_slave_create_simple(i2c[5], "pca9546", 0x76);
1261+
i2c_slave_create_simple(i2c[5], "pca9546", 0x77);
1262+
1263+
/* Bus 10 */
1264+
dev = DEVICE(create_pca9554(soc, 9, 0x20));
1265+
1266+
/* Set FPGA_READY */
1267+
object_property_set_str(OBJECT(dev), "pin1", "high", &error_fatal);
1268+
1269+
create_pca9554(soc, 9, 0x21);
1270+
at24c_eeprom_init(i2c[9], 0x50, 64 * KiB);
1271+
at24c_eeprom_init(i2c[9], 0x51, 64 * KiB);
1272+
1273+
/* Bus 11 */
1274+
at24c_eeprom_init_rom(i2c[10], 0x50, 256, gb200nvl_bmc_fruid,
1275+
gb200nvl_bmc_fruid_len);
1276+
}
1277+
10531278
static void fby35_i2c_init(AspeedMachineState *bmc)
10541279
{
10551280
AspeedSoCState *soc = bmc->soc;
@@ -1585,6 +1810,52 @@ static void aspeed_machine_bletchley_class_init(ObjectClass *oc,
15851810
aspeed_machine_class_init_cpus_defaults(mc);
15861811
}
15871812

1813+
static void aspeed_machine_catalina_class_init(ObjectClass *oc,
1814+
const void *data)
1815+
{
1816+
MachineClass *mc = MACHINE_CLASS(oc);
1817+
AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1818+
1819+
mc->desc = "Facebook Catalina BMC (Cortex-A7)";
1820+
amc->soc_name = "ast2600-a3";
1821+
amc->hw_strap1 = CATALINA_BMC_HW_STRAP1;
1822+
amc->hw_strap2 = CATALINA_BMC_HW_STRAP2;
1823+
amc->fmc_model = "w25q01jvq";
1824+
amc->spi_model = NULL;
1825+
amc->num_cs = 2;
1826+
amc->macs_mask = ASPEED_MAC2_ON;
1827+
amc->i2c_init = catalina_bmc_i2c_init;
1828+
mc->auto_create_sdcard = true;
1829+
mc->default_ram_size = CATALINA_BMC_RAM_SIZE;
1830+
aspeed_machine_class_init_cpus_defaults(mc);
1831+
aspeed_machine_ast2600_class_emmc_init(oc);
1832+
}
1833+
1834+
#define GB200NVL_BMC_RAM_SIZE ASPEED_RAM_SIZE(1 * GiB)
1835+
1836+
static void aspeed_machine_gb200nvl_class_init(ObjectClass *oc,
1837+
const void *data)
1838+
{
1839+
MachineClass *mc = MACHINE_CLASS(oc);
1840+
AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1841+
1842+
mc->desc = "Nvidia GB200NVL BMC (Cortex-A7)";
1843+
amc->soc_name = "ast2600-a3";
1844+
amc->hw_strap1 = GB200NVL_BMC_HW_STRAP1;
1845+
amc->hw_strap2 = GB200NVL_BMC_HW_STRAP2;
1846+
amc->fmc_model = "mx66u51235f";
1847+
amc->spi_model = "mx66u51235f";
1848+
amc->num_cs = 2;
1849+
1850+
amc->spi2_model = "mx66u51235f";
1851+
amc->num_cs2 = 1;
1852+
amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON;
1853+
amc->i2c_init = gb200nvl_bmc_i2c_init;
1854+
mc->default_ram_size = GB200NVL_BMC_RAM_SIZE;
1855+
aspeed_machine_class_init_cpus_defaults(mc);
1856+
aspeed_machine_ast2600_class_emmc_init(oc);
1857+
}
1858+
15881859
static void fby35_reset(MachineState *state, ResetType type)
15891860
{
15901861
AspeedMachineState *bmc = ASPEED_MACHINE(state);
@@ -1877,6 +2148,14 @@ static const TypeInfo aspeed_machine_types[] = {
18772148
.name = MACHINE_TYPE_NAME("bletchley-bmc"),
18782149
.parent = TYPE_ASPEED_MACHINE,
18792150
.class_init = aspeed_machine_bletchley_class_init,
2151+
}, {
2152+
.name = MACHINE_TYPE_NAME("gb200nvl-bmc"),
2153+
.parent = TYPE_ASPEED_MACHINE,
2154+
.class_init = aspeed_machine_gb200nvl_class_init,
2155+
}, {
2156+
.name = MACHINE_TYPE_NAME("catalina-bmc"),
2157+
.parent = TYPE_ASPEED_MACHINE,
2158+
.class_init = aspeed_machine_catalina_class_init,
18802159
}, {
18812160
.name = MACHINE_TYPE_NAME("fby35-bmc"),
18822161
.parent = MACHINE_TYPE_NAME("ast2600-evb"),

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