Skip to content

Commit 09072f9

Browse files
committed
sim: Add PSOC Edge E8x device with the new "max-align-16" feature
- Add simulator support for Infineon PSOC Edge E81–E84 silicon, enforce a minimum write size of 16 bytes - Add the "max-align-16" feature to the simulator and CI/CD test workflows Signed-off-by: Taras <Taras.B@infineon.com>
1 parent c11e845 commit 09072f9

File tree

6 files changed

+40
-5
lines changed

6 files changed

+40
-5
lines changed

.github/workflows/sim.yaml

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,7 @@ jobs:
2020
- "sig-rsa,sig-rsa3072,overwrite-only,validate-primary-slot,swap-move,swap-offset"
2121
- "enc-rsa,enc-rsa max-align-32"
2222
- "enc-aes256-rsa,enc-aes256-rsa max-align-32"
23-
- "enc-ec256,enc-ec256 max-align-32"
23+
- "enc-ec256,enc-ec256 overwrite-only validate-primary-slot max-align-16,enc-ec256 max-align-32"
2424
- "enc-aes256-ec256,enc-aes256-ec256 max-align-32"
2525
- "enc-x25519,enc-x25519 max-align-32"
2626
- "enc-aes256-x25519,enc-aes256-x25519 max-align-32"
@@ -44,7 +44,8 @@ jobs:
4444
- "sig-rsa validate-primary-slot ram-load multiimage"
4545
- "sig-rsa validate-primary-slot direct-xip multiimage"
4646
- "sig-ecdsa hw-rollback-protection multiimage"
47-
- "sig-ecdsa-psa,sig-ecdsa-psa sig-p384"
47+
- "sig-ecdsa-psa,sig-ecdsa-psa sig-p384,sig-ecdsa-psa swap-move bootstrap max-align-16"
48+
- "sig-ecdsa-psa enc-ec256 max-align-16, sig-ecdsa-psa enc-ec256 swap-offset validate-primary-slot max-align-16"
4849
- "ram-load enc-aes256-kw multiimage"
4950
- "ram-load enc-aes256-kw sig-ecdsa-mbedtls multiimage"
5051
runs-on: ubuntu-latest

sim/Cargo.toml

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -32,6 +32,7 @@ multiimage = ["mcuboot-sys/multiimage"]
3232
ram-load = ["mcuboot-sys/ram-load"]
3333
direct-xip = ["mcuboot-sys/direct-xip"]
3434
downgrade-prevention = ["mcuboot-sys/downgrade-prevention"]
35+
max-align-16 = ["mcuboot-sys/max-align-16"]
3536
max-align-32 = ["mcuboot-sys/max-align-32"]
3637
hw-rollback-protection = ["mcuboot-sys/hw-rollback-protection"]
3738
check-load-addr = ["mcuboot-sys/check-load-addr"]

sim/mcuboot-sys/Cargo.toml

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -90,6 +90,9 @@ direct-xip = []
9090
# Check (in software) against version downgrades.
9191
downgrade-prevention = []
9292

93+
# Support images with 16-byte maximum write alignment value.
94+
max-align-16 = []
95+
9396
# Support images with 32-byte maximum write alignment value.
9497
max-align-32 = []
9598

sim/mcuboot-sys/build.rs

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -37,6 +37,7 @@ fn main() {
3737
let downgrade_prevention = env::var("CARGO_FEATURE_DOWNGRADE_PREVENTION").is_ok();
3838
let ram_load = env::var("CARGO_FEATURE_RAM_LOAD").is_ok();
3939
let direct_xip = env::var("CARGO_FEATURE_DIRECT_XIP").is_ok();
40+
let max_align_16 = env::var("CARGO_FEATURE_MAX_ALIGN_16").is_ok();
4041
let max_align_32 = env::var("CARGO_FEATURE_MAX_ALIGN_32").is_ok();
4142
let hw_rollback_protection = env::var("CARGO_FEATURE_HW_ROLLBACK_PROTECTION").is_ok();
4243
let check_load_addr = env::var("CARGO_FEATURE_CHECK_LOAD_ADDR").is_ok();
@@ -50,6 +51,8 @@ fn main() {
5051

5152
if max_align_32 {
5253
conf.conf.define("MCUBOOT_BOOT_MAX_ALIGN", Some("32"));
54+
} else if max_align_16 {
55+
conf.conf.define("MCUBOOT_BOOT_MAX_ALIGN", Some("16"));
5356
} else {
5457
conf.conf.define("MCUBOOT_BOOT_MAX_ALIGN", Some("8"));
5558
}

sim/src/image.rs

Lines changed: 27 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -589,6 +589,20 @@ impl ImagesBuilder {
589589
flash.insert(dev_id, dev);
590590
(flash, Rc::new(areadesc), &[])
591591
}
592+
DeviceName::PSOCEdgeE8x => {
593+
let dev = SimFlash::new(vec![4096; 96], align as usize, erased_val);
594+
595+
let dev_id = 0;
596+
let mut areadesc = AreaDesc::new();
597+
areadesc.add_flash_sectors(dev_id, &dev);
598+
areadesc.add_image(0x020000, 0x010000, FlashId::Image0, dev_id);
599+
areadesc.add_image(0x030000, 0x010000, FlashId::Image1, dev_id);
600+
areadesc.add_image(0x040000, 0x002000, FlashId::ImageScratch, dev_id);
601+
602+
let mut flash = SimMultiFlash::new();
603+
flash.insert(dev_id, dev);
604+
(flash, Rc::new(areadesc), &[Caps::SwapUsingScratch, Caps::OverwriteUpgrade, Caps::SwapUsingMove, Caps::RamLoad, Caps::DirectXip])
605+
}
592606
}
593607
}
594608

@@ -2386,12 +2400,18 @@ pub struct SlotInfo {
23862400
pub dev_id: u8,
23872401
}
23882402

2389-
#[cfg(not(feature = "max-align-32"))]
2403+
#[cfg(all(not(feature = "max-align-16"), not(feature = "max-align-32")))]
23902404
const MAGIC: &[u8] = &[0x77, 0xc2, 0x95, 0xf3,
23912405
0x60, 0xd2, 0xef, 0x7f,
23922406
0x35, 0x52, 0x50, 0x0f,
23932407
0x2c, 0xb6, 0x79, 0x80];
23942408

2409+
#[cfg(feature = "max-align-16")]
2410+
const MAGIC: &[u8] = &[0x10, 0x00, 0x2d, 0xe1,
2411+
0x5d, 0x29, 0x41, 0x0b,
2412+
0x8d, 0x77, 0x67, 0x9c,
2413+
0x11, 0x0f, 0x1f, 0x8a];
2414+
23952415
#[cfg(feature = "max-align-32")]
23962416
const MAGIC: &[u8] = &[0x20, 0x00, 0x2d, 0xe1,
23972417
0x5d, 0x29, 0x41, 0x0b,
@@ -2475,11 +2495,16 @@ pub fn show_sizes() {
24752495
}
24762496
}
24772497

2478-
#[cfg(not(feature = "max-align-32"))]
2498+
#[cfg(all(not(feature = "max-align-16"), not(feature = "max-align-32")))]
24792499
fn test_alignments() -> &'static [usize] {
24802500
&[1, 2, 4, 8]
24812501
}
24822502

2503+
#[cfg(feature = "max-align-16")]
2504+
fn test_alignments() -> &'static [usize] {
2505+
&[16]
2506+
}
2507+
24832508
#[cfg(feature = "max-align-32")]
24842509
fn test_alignments() -> &'static [usize] {
24852510
&[32]

sim/src/lib.rs

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -64,7 +64,7 @@ struct Args {
6464
#[derive(Copy, Clone, Debug, Deserialize)]
6565
pub enum DeviceName {
6666
Stm32f4, Stm32f4SpiFlash, K64f, K64fBig, K64fMulti, Nrf52840, Nrf52840SpiFlash,
67-
Nrf52840UnequalSlots, Nrf52840UnequalSlotsLargerSlot1,
67+
Nrf52840UnequalSlots, Nrf52840UnequalSlotsLargerSlot1,PSOCEdgeE8x,
6868
}
6969

7070
pub static ALL_DEVICES: &[DeviceName] = &[
@@ -77,6 +77,7 @@ pub static ALL_DEVICES: &[DeviceName] = &[
7777
DeviceName::Nrf52840SpiFlash,
7878
DeviceName::Nrf52840UnequalSlots,
7979
DeviceName::Nrf52840UnequalSlotsLargerSlot1,
80+
DeviceName::PSOCEdgeE8x,
8081
];
8182

8283
impl fmt::Display for DeviceName {
@@ -91,6 +92,7 @@ impl fmt::Display for DeviceName {
9192
DeviceName::Nrf52840SpiFlash => "Nrf52840SpiFlash",
9293
DeviceName::Nrf52840UnequalSlots => "Nrf52840UnequalSlots",
9394
DeviceName::Nrf52840UnequalSlotsLargerSlot1 => "Nrf52840UnequalSlotsLargerSlot1",
95+
DeviceName::PSOCEdgeE8x => "PSOCEdgeE8x",
9496
};
9597
f.write_str(name)
9698
}

0 commit comments

Comments
 (0)