From 3a2546c2f2233ec0e1428f2482598f930b1c122a Mon Sep 17 00:00:00 2001 From: Taras Date: Wed, 26 Nov 2025 17:41:47 +0000 Subject: [PATCH] sim: Add PSOC Edge E8x device with the new max-align-16 feature Signed-off-by: Taras --- .github/workflows/sim.yaml | 5 +++-- sim/Cargo.toml | 1 + sim/mcuboot-sys/Cargo.toml | 3 +++ sim/mcuboot-sys/build.rs | 3 +++ sim/src/image.rs | 29 +++++++++++++++++++++++++++-- sim/src/lib.rs | 4 +++- 6 files changed, 40 insertions(+), 5 deletions(-) diff --git a/.github/workflows/sim.yaml b/.github/workflows/sim.yaml index 36d890d4fe..851fef52d2 100644 --- a/.github/workflows/sim.yaml +++ b/.github/workflows/sim.yaml @@ -20,7 +20,7 @@ jobs: - "sig-rsa,sig-rsa3072,overwrite-only,validate-primary-slot,swap-move,swap-offset" - "enc-rsa,enc-rsa max-align-32" - "enc-aes256-rsa,enc-aes256-rsa max-align-32" - - "enc-ec256,enc-ec256 max-align-32" + - "enc-ec256,enc-ec256 overwrite-only validate-primary-slot max-align-16,enc-ec256 max-align-32" - "enc-aes256-ec256,enc-aes256-ec256 max-align-32" - "enc-x25519,enc-x25519 max-align-32" - "enc-aes256-x25519,enc-aes256-x25519 max-align-32" @@ -44,7 +44,8 @@ jobs: - "sig-rsa validate-primary-slot ram-load multiimage" - "sig-rsa validate-primary-slot direct-xip multiimage" - "sig-ecdsa hw-rollback-protection multiimage" - - "sig-ecdsa-psa,sig-ecdsa-psa sig-p384" + - "sig-ecdsa-psa,sig-ecdsa-psa sig-p384,sig-ecdsa-psa swap-move bootstrap max-align-16" + - "sig-ecdsa-psa enc-ec256 max-align-16, sig-ecdsa-psa enc-ec256 swap-offset validate-primary-slot max-align-16" - "ram-load enc-aes256-kw multiimage" - "ram-load enc-aes256-kw sig-ecdsa-mbedtls multiimage" runs-on: ubuntu-latest diff --git a/sim/Cargo.toml b/sim/Cargo.toml index f7d3505a52..31ef527bf9 100644 --- a/sim/Cargo.toml +++ b/sim/Cargo.toml @@ -32,6 +32,7 @@ multiimage = ["mcuboot-sys/multiimage"] ram-load = ["mcuboot-sys/ram-load"] direct-xip = ["mcuboot-sys/direct-xip"] downgrade-prevention = ["mcuboot-sys/downgrade-prevention"] +max-align-16 = ["mcuboot-sys/max-align-16"] max-align-32 = ["mcuboot-sys/max-align-32"] hw-rollback-protection = ["mcuboot-sys/hw-rollback-protection"] check-load-addr = ["mcuboot-sys/check-load-addr"] diff --git a/sim/mcuboot-sys/Cargo.toml b/sim/mcuboot-sys/Cargo.toml index b3e46082f4..08971a7660 100644 --- a/sim/mcuboot-sys/Cargo.toml +++ b/sim/mcuboot-sys/Cargo.toml @@ -90,6 +90,9 @@ direct-xip = [] # Check (in software) against version downgrades. downgrade-prevention = [] +# Support images with 16-byte maximum write alignment value. +max-align-16 = [] + # Support images with 32-byte maximum write alignment value. max-align-32 = [] diff --git a/sim/mcuboot-sys/build.rs b/sim/mcuboot-sys/build.rs index 5276fbeb73..727f44f4b8 100644 --- a/sim/mcuboot-sys/build.rs +++ b/sim/mcuboot-sys/build.rs @@ -37,6 +37,7 @@ fn main() { let downgrade_prevention = env::var("CARGO_FEATURE_DOWNGRADE_PREVENTION").is_ok(); let ram_load = env::var("CARGO_FEATURE_RAM_LOAD").is_ok(); let direct_xip = env::var("CARGO_FEATURE_DIRECT_XIP").is_ok(); + let max_align_16 = env::var("CARGO_FEATURE_MAX_ALIGN_16").is_ok(); let max_align_32 = env::var("CARGO_FEATURE_MAX_ALIGN_32").is_ok(); let hw_rollback_protection = env::var("CARGO_FEATURE_HW_ROLLBACK_PROTECTION").is_ok(); let check_load_addr = env::var("CARGO_FEATURE_CHECK_LOAD_ADDR").is_ok(); @@ -50,6 +51,8 @@ fn main() { if max_align_32 { conf.conf.define("MCUBOOT_BOOT_MAX_ALIGN", Some("32")); + } else if max_align_16 { + conf.conf.define("MCUBOOT_BOOT_MAX_ALIGN", Some("16")); } else { conf.conf.define("MCUBOOT_BOOT_MAX_ALIGN", Some("8")); } diff --git a/sim/src/image.rs b/sim/src/image.rs index 227617d7d8..286c1c3e17 100644 --- a/sim/src/image.rs +++ b/sim/src/image.rs @@ -589,6 +589,20 @@ impl ImagesBuilder { flash.insert(dev_id, dev); (flash, Rc::new(areadesc), &[]) } + DeviceName::PSOCEdgeE8x => { + let dev = SimFlash::new(vec![4096; 96], align as usize, erased_val); + + let dev_id = 0; + let mut areadesc = AreaDesc::new(); + areadesc.add_flash_sectors(dev_id, &dev); + areadesc.add_image(0x020000, 0x010000, FlashId::Image0, dev_id); + areadesc.add_image(0x030000, 0x010000, FlashId::Image1, dev_id); + areadesc.add_image(0x040000, 0x002000, FlashId::ImageScratch, dev_id); + + let mut flash = SimMultiFlash::new(); + flash.insert(dev_id, dev); + (flash, Rc::new(areadesc), &[Caps::SwapUsingScratch, Caps::OverwriteUpgrade, Caps::SwapUsingMove, Caps::RamLoad, Caps::DirectXip]) + } } } @@ -2386,12 +2400,18 @@ pub struct SlotInfo { pub dev_id: u8, } -#[cfg(not(feature = "max-align-32"))] +#[cfg(all(not(feature = "max-align-16"), not(feature = "max-align-32")))] const MAGIC: &[u8] = &[0x77, 0xc2, 0x95, 0xf3, 0x60, 0xd2, 0xef, 0x7f, 0x35, 0x52, 0x50, 0x0f, 0x2c, 0xb6, 0x79, 0x80]; +#[cfg(feature = "max-align-16")] +const MAGIC: &[u8] = &[0x10, 0x00, 0x2d, 0xe1, + 0x5d, 0x29, 0x41, 0x0b, + 0x8d, 0x77, 0x67, 0x9c, + 0x11, 0x0f, 0x1f, 0x8a]; + #[cfg(feature = "max-align-32")] const MAGIC: &[u8] = &[0x20, 0x00, 0x2d, 0xe1, 0x5d, 0x29, 0x41, 0x0b, @@ -2475,11 +2495,16 @@ pub fn show_sizes() { } } -#[cfg(not(feature = "max-align-32"))] +#[cfg(all(not(feature = "max-align-16"), not(feature = "max-align-32")))] fn test_alignments() -> &'static [usize] { &[1, 2, 4, 8] } +#[cfg(feature = "max-align-16")] +fn test_alignments() -> &'static [usize] { + &[16] +} + #[cfg(feature = "max-align-32")] fn test_alignments() -> &'static [usize] { &[32] diff --git a/sim/src/lib.rs b/sim/src/lib.rs index a496db9dbe..34fd6fc3c2 100644 --- a/sim/src/lib.rs +++ b/sim/src/lib.rs @@ -64,7 +64,7 @@ struct Args { #[derive(Copy, Clone, Debug, Deserialize)] pub enum DeviceName { Stm32f4, Stm32f4SpiFlash, K64f, K64fBig, K64fMulti, Nrf52840, Nrf52840SpiFlash, - Nrf52840UnequalSlots, Nrf52840UnequalSlotsLargerSlot1, + Nrf52840UnequalSlots, Nrf52840UnequalSlotsLargerSlot1,PSOCEdgeE8x, } pub static ALL_DEVICES: &[DeviceName] = &[ @@ -77,6 +77,7 @@ pub static ALL_DEVICES: &[DeviceName] = &[ DeviceName::Nrf52840SpiFlash, DeviceName::Nrf52840UnequalSlots, DeviceName::Nrf52840UnequalSlotsLargerSlot1, + DeviceName::PSOCEdgeE8x, ]; impl fmt::Display for DeviceName { @@ -91,6 +92,7 @@ impl fmt::Display for DeviceName { DeviceName::Nrf52840SpiFlash => "Nrf52840SpiFlash", DeviceName::Nrf52840UnequalSlots => "Nrf52840UnequalSlots", DeviceName::Nrf52840UnequalSlotsLargerSlot1 => "Nrf52840UnequalSlotsLargerSlot1", + DeviceName::PSOCEdgeE8x => "PSOCEdgeE8x", }; f.write_str(name) }