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Simulation doesn't propogate latches.
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aiger/aig.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -222,7 +222,7 @@ def simulator(self, latches=None):
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inputs = yield outputs, latches
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def simulate(self, input_seq, latches=None):
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sim = self.simulator()
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sim = self.simulator(latches)
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next(sim)
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return [sim.send(inputs) for inputs in input_seq]
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