Signal handler does not handle DDC register properly

[nerdbugg]

In the multi-thread snapshot scenario, we need signal to synchronous multiple threads in CVM. What we currently use is the signal mechanism.
But the current CheriBSD signal mechanism does not change the DDC register during signal handler execution period.
This will cause some issues when accessing global variable(like erron).

[nerdbugg]

A possible solution is to change the DDC register during the signal handler execution period (done in c41c6b0).
But this will cause a new problem: the register value is not correct now, especially the sp register. Because the correct value is sp+DDC, but the the current DDC base is change to 0x0(for accessing global data and code).

[nerdbugg]

An attempt to change sp register in thr_sighandler(which will call before real handler under multi-thread config) is done in a4c3bd4. But the code that changes the sp register still need correct sp register to get the base of DDC register. So, it does not work. (And we need copy the lib_thr.a out, because the obj-libcheri target does not compile successfully)

[nerdbugg]

A possible solution is to change register before calling the signal handler, which is exactly the same time we change the DDC register.
This solution is still under implementation.

[nerdbugg]

And we attempt to use alternate stack in signal delivery process (The alternate stack address is an absolute address, not ddc-relative).
There is a copyoutcap call in the process of signal delivery, which copies the cap registers stored in kernel out to the alternate stack. And this work is protected by capability. The destination pointer on the user stack is a capability derived from the user DDC(tf->tf_ddc).
So, it seems that changing the user DDC before copying to user stack is a solution here (If we use alternate stack).

[nerdbugg]

All the register affected should be relocated at new DDC value. I get an error caused by incorrect value of $tp register.