From 5074422a991519fc3f98c973f52c180e3d521117 Mon Sep 17 00:00:00 2001 From: Brandon Streiff Date: Wed, 7 Nov 2018 15:55:22 -0600 Subject: [PATCH 1/3] ni-coralreef: add device tree Copied largely from ni-bluefin.dts, but with more DSA ports and USB gone. Updated port order such that "sw0" lines up with "Port 0" etc. Updated status LED to be a bicolour blue and yellow LED, not green. Signed-off-by: Brandon Streiff Acked-by: Kyle Roeschley Acked-by: Erik Hons Acked-by: Haris Okanovic Natinst-ReviewBoard-ID: 310589 (cherry picked from commit 3b0fa2ef78f243388422be91088b40aaf54737ab) Natinst-ReviewBoard-ID: 320599 (cherry picked from commit ff0acb430ba683dfc81e28671a936a80dbb10c3e) Natinst-ReviewBoard-ID: 325354 (cherry picked from commit 83855f3a30b90a5f7a1f2be025f447a24a32822f) Signed-off-by: deooi --- arch/arm/boot/dts/ni-coralreef.dts | 129 +++++++++++++++++++++++++++++ 1 file changed, 129 insertions(+) create mode 100644 arch/arm/boot/dts/ni-coralreef.dts diff --git a/arch/arm/boot/dts/ni-coralreef.dts b/arch/arm/boot/dts/ni-coralreef.dts new file mode 100644 index 0000000000000..64ebf0175fd5b --- /dev/null +++ b/arch/arm/boot/dts/ni-coralreef.dts @@ -0,0 +1,129 @@ +/dts-v1/; +/include/ "ni-zynq.dtsi" + +/* NIDEVCODE 7A4B */ + +/ { + model = "NI Coral Reef"; + compatible = "ni,zynq", "xlnx,zynq-7000"; + + amba@0 { + i2c0: i2c@e0004000 { + /* Override ni-zynq.dtsi; we do not have a CPLD at 0x40. */ + nicpld@40 { + status = "disabled"; + }; + + tmp451@4C { + compatible = "ti,tmp451"; + reg = <0x4C>; + vcc-supply = <®ulator_vccpint>; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + /* LED_STATUSy on GPIO46 */ + status { + label = "nilrt:status:yellow"; + gpios = <&gpio 46 0>; + default-state = "on"; + }; + + /* LED_POWERb on GPIO47 */ + active { + label = "nilrt:status:blue"; + gpios = <&gpio 47 0>; + default-state = "off"; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + + /* Reset switch is on GPIO48 */ + reset_sw@0 { + label = "reset_sw"; + gpios = <&gpio 48 1 /* GPIO_ACTIVE_LOW */>; + linux,code = <408>; /* KEY_RESTART */ + gpio-key,wakeup; + }; + }; + + gpio_restart { + compatible = "gpio-restart"; + + /* ~PS_FORCE_RESET is on GPIO44 */ + gpios = <&gpio 44 1 /* GPIO_ACTIVE_LOW */>; + priority = <200>; + }; + + dsa@0 { + compatible = "marvell,dsa"; + #address-cells = <2>; + #size-cells = <0>; + + dsa,ethernet = <&gem0>; + dsa,mii-bus = <&gem0>; + + switch@0 { + #address-cells = <1>; + #size-cells = <0>; + /* MDIO addr 0x0 (single-chip addressing), switch 0 */ + reg = <0 0>; + + port@0 { + reg = <0x0>; + label = "cpu"; + }; + + port@1 { + reg = <0x1>; + label = "sw3"; + }; + + port@2 { + reg = <0x2>; + label = "sw2"; + }; + + port@3 { + reg = <0x3>; + label = "sw1"; + }; + + port@4 { + reg = <0x4>; + label = "sw0"; + }; + }; + }; +}; + +&gem0 { + status = "okay"; + emio-speed-gpios = <0>, + <&gpio 54 0>; + + #address-cells = <0x1>; + #size-cells = <0x0>; + + fixed-link { + speed = <1000>; + full-duplex; + reg = <0>; + }; +}; + +&uart1 { + status = "okay"; +}; + +&watchdog0 { + status = "okay"; + reset-on-timeout; +}; From c55aebf0a424fe88518ff3b44acea1d5d0e17ff6 Mon Sep 17 00:00:00 2001 From: deooi Date: Thu, 13 Mar 2025 15:25:28 +0800 Subject: [PATCH 2/3] ni-coralreef: Move device tree to xilinx folder Move ni-coralreef.dts to the xilinx folder together with the other xilinx devices. Signed-off-by: deooi --- arch/arm/boot/dts/{ => xilinx}/ni-coralreef.dts | 0 1 file changed, 0 insertions(+), 0 deletions(-) rename arch/arm/boot/dts/{ => xilinx}/ni-coralreef.dts (100%) diff --git a/arch/arm/boot/dts/ni-coralreef.dts b/arch/arm/boot/dts/xilinx/ni-coralreef.dts similarity index 100% rename from arch/arm/boot/dts/ni-coralreef.dts rename to arch/arm/boot/dts/xilinx/ni-coralreef.dts From 3b25e6f141c60bf18b2f642eae0c5e572cc95f87 Mon Sep 17 00:00:00 2001 From: deooi Date: Thu, 13 Mar 2025 16:16:14 +0800 Subject: [PATCH 3/3] ARM: dts: ni-coralreef: Update AMBA and GPIO bindings zynq-7000.dtsi contains updated AMBA and GPIO device tree node phandles. Adopt these changes by referencing i2c0 phandle instead of amba node for overriding i2c bindings, and refer to gpio0 phandle instead of gpio. Signed-off-by: deooi --- arch/arm/boot/dts/xilinx/ni-coralreef.dts | 38 +++++++++++------------ 1 file changed, 18 insertions(+), 20 deletions(-) diff --git a/arch/arm/boot/dts/xilinx/ni-coralreef.dts b/arch/arm/boot/dts/xilinx/ni-coralreef.dts index 64ebf0175fd5b..e38a307f11d1c 100644 --- a/arch/arm/boot/dts/xilinx/ni-coralreef.dts +++ b/arch/arm/boot/dts/xilinx/ni-coralreef.dts @@ -7,35 +7,20 @@ model = "NI Coral Reef"; compatible = "ni,zynq", "xlnx,zynq-7000"; - amba@0 { - i2c0: i2c@e0004000 { - /* Override ni-zynq.dtsi; we do not have a CPLD at 0x40. */ - nicpld@40 { - status = "disabled"; - }; - - tmp451@4C { - compatible = "ti,tmp451"; - reg = <0x4C>; - vcc-supply = <®ulator_vccpint>; - }; - }; - }; - leds { compatible = "gpio-leds"; /* LED_STATUSy on GPIO46 */ status { label = "nilrt:status:yellow"; - gpios = <&gpio 46 0>; + gpios = <&gpio0 46 0>; default-state = "on"; }; /* LED_POWERb on GPIO47 */ active { label = "nilrt:status:blue"; - gpios = <&gpio 47 0>; + gpios = <&gpio0 47 0>; default-state = "off"; }; }; @@ -48,7 +33,7 @@ /* Reset switch is on GPIO48 */ reset_sw@0 { label = "reset_sw"; - gpios = <&gpio 48 1 /* GPIO_ACTIVE_LOW */>; + gpios = <&gpio0 48 1 /* GPIO_ACTIVE_LOW */>; linux,code = <408>; /* KEY_RESTART */ gpio-key,wakeup; }; @@ -58,7 +43,7 @@ compatible = "gpio-restart"; /* ~PS_FORCE_RESET is on GPIO44 */ - gpios = <&gpio 44 1 /* GPIO_ACTIVE_LOW */>; + gpios = <&gpio0 44 1 /* GPIO_ACTIVE_LOW */>; priority = <200>; }; @@ -104,10 +89,23 @@ }; }; +&i2c0 { + /* Override ni-zynq.dtsi; we do not have a CPLD at 0x40. */ + nicpld@40 { + status = "disabled"; + }; + + tmp451@4C { + compatible = "ti,tmp451"; + reg = <0x4C>; + vcc-supply = <®ulator_vccpint>; + }; +}; + &gem0 { status = "okay"; emio-speed-gpios = <0>, - <&gpio 54 0>; + <&gpio0 54 0>; #address-cells = <0x1>; #size-cells = <0x0>;