@@ -213,15 +213,17 @@ void radio_reset(void)
213213 hal_radio_sw_switch_ppi_group_setup ();
214214#endif
215215
216- #if defined(CONFIG_SOC_COMPATIBLE_NRF54LX )
216+ #if defined(CONFIG_SOC_COMPATIBLE_NRF54LX ) || defined( CONFIG_SOC_SERIES_NRF54HX )
217217#if defined(CONFIG_BT_CTLR_TIFS_HW )
218218 NRF_RADIO -> TIMING = (RADIO_TIMING_RU_Legacy << RADIO_TIMING_RU_Pos ) &
219219 RADIO_TIMING_RU_Msk ;
220220#else /* !CONFIG_BT_CTLR_TIFS_HW */
221221 NRF_RADIO -> TIMING = (RADIO_TIMING_RU_Fast << RADIO_TIMING_RU_Pos ) &
222222 RADIO_TIMING_RU_Msk ;
223223#endif /* !CONFIG_BT_CTLR_TIFS_HW */
224+ #endif /* CONFIG_SOC_COMPATIBLE_NRF54LX || CONFIG_SOC_SERIES_NRF54HX */
224225
226+ #if defined(CONFIG_SOC_COMPATIBLE_NRF54LX )
225227#if defined(CONFIG_NRF_SYS_EVENT )
226228 (void )nrf_sys_event_request_global_constlat ();
227229#else /* !CONFIG_NRF_SYS_EVENT */
@@ -293,7 +295,8 @@ void radio_phy_set(uint8_t phy, uint8_t flags)
293295
294296 NRF_RADIO -> MODE = (mode << RADIO_MODE_MODE_Pos ) & RADIO_MODE_MODE_Msk ;
295297
296- #if !defined(CONFIG_SOC_SERIES_NRF51X ) && !defined(CONFIG_SOC_COMPATIBLE_NRF54LX )
298+ #if !defined(CONFIG_SOC_SERIES_NRF51X ) && !defined(CONFIG_SOC_COMPATIBLE_NRF54LX ) && \
299+ !defined(CONFIG_SOC_SERIES_NRF54HX )
297300#if defined(CONFIG_BT_CTLR_RADIO_ENABLE_FAST )
298301 NRF_RADIO -> MODECNF0 = ((RADIO_MODECNF0_DTX_Center <<
299302 RADIO_MODECNF0_DTX_Pos ) &
@@ -311,7 +314,7 @@ void radio_phy_set(uint8_t phy, uint8_t flags)
311314
312315void radio_tx_power_set (int8_t power )
313316{
314- #if defined(CONFIG_SOC_COMPATIBLE_NRF54LX )
317+ #if defined(CONFIG_SOC_COMPATIBLE_NRF54LX ) || defined( CONFIG_SOC_SERIES_NRF54HX )
315318 uint32_t value ;
316319
317320 value = hal_radio_tx_power_value (power );
@@ -381,7 +384,7 @@ void radio_freq_chan_set(uint32_t chan)
381384
382385void radio_whiten_iv_set (uint32_t iv )
383386{
384- #if defined(CONFIG_SOC_COMPATIBLE_NRF54LX )
387+ #if defined(CONFIG_SOC_COMPATIBLE_NRF54LX ) || defined( CONFIG_SOC_SERIES_NRF54HX )
385388#if defined(RADIO_DATAWHITEIV_DATAWHITEIV_Msk )
386389 NRF_RADIO -> DATAWHITEIV = HAL_RADIO_RESET_VALUE_DATAWHITE | iv ;
387390#else /* !RADIO_DATAWHITEIV_DATAWHITEIV_Msk */
@@ -428,7 +431,8 @@ void radio_pkt_configure(uint8_t bits_len, uint8_t max_len, uint8_t flags)
428431
429432#elif defined(CONFIG_SOC_COMPATIBLE_NRF52X ) || \
430433 defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET ) || \
431- defined(CONFIG_SOC_COMPATIBLE_NRF54LX )
434+ defined(CONFIG_SOC_COMPATIBLE_NRF54LX ) || \
435+ defined(CONFIG_SOC_SERIES_NRF54HX )
432436 extra = 0U ;
433437
434438 phy = RADIO_PKT_CONF_PHY_GET (flags );
@@ -525,7 +529,8 @@ uint32_t radio_rx_chain_delay_get(uint8_t phy, uint8_t flags)
525529void radio_rx_enable (void )
526530{
527531#if !defined(CONFIG_BT_CTLR_TIFS_HW )
528- #if defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET ) || defined(CONFIG_SOC_COMPATIBLE_NRF54LX )
532+ #if defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET ) || defined(CONFIG_SOC_COMPATIBLE_NRF54LX ) || \
533+ defined(CONFIG_SOC_SERIES_NRF54HX )
529534 /* NOTE: Timer clear DPPI configuration is needed only for nRF53
530535 * because of calls to radio_disable() and
531536 * radio_switch_complete_and_disable() inside a radio event call
@@ -547,7 +552,8 @@ void radio_rx_enable(void)
547552void radio_tx_enable (void )
548553{
549554#if !defined(CONFIG_BT_CTLR_TIFS_HW )
550- #if defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET ) || defined(CONFIG_SOC_COMPATIBLE_NRF54LX )
555+ #if defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET ) || defined(CONFIG_SOC_COMPATIBLE_NRF54LX ) || \
556+ defined(CONFIG_SOC_SERIES_NRF54HX )
551557 /* NOTE: Timer clear DPPI configuration is needed only for nRF53
552558 * because of calls to radio_disable() and
553559 * radio_switch_complete_and_disable() inside a radio event call
@@ -939,7 +945,8 @@ void sw_switch(uint8_t dir_curr, uint8_t dir_next, uint8_t phy_curr, uint8_t fla
939945 * time-stamp.
940946 */
941947 hal_radio_end_time_capture_ppi_config ();
942- #if !defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET ) && !defined(CONFIG_SOC_COMPATIBLE_NRF54LX )
948+ #if !defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET ) && !defined(CONFIG_SOC_COMPATIBLE_NRF54LX ) && \
949+ !defined(CONFIG_SOC_SERIES_NRF54HX )
943950 /* The function is not called for nRF5340 single timer configuration because
944951 * HAL_SW_SWITCH_TIMER_CLEAR_PPI is equal to HAL_RADIO_END_TIME_CAPTURE_PPI,
945952 * so channel is already enabled.
@@ -1360,7 +1367,8 @@ void radio_tmr_rx_status_reset(void)
13601367
13611368void radio_tmr_tx_enable (void )
13621369{
1363- #if defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET ) || defined(CONFIG_SOC_COMPATIBLE_NRF54LX )
1370+ #if defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET ) || defined(CONFIG_SOC_COMPATIBLE_NRF54LX ) || \
1371+ defined(CONFIG_SOC_SERIES_NRF54HX )
13641372#else /* !CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET && !CONFIG_SOC_COMPATIBLE_NRF54LX */
13651373#if (HAL_RADIO_ENABLE_TX_ON_TICK_PPI == HAL_RADIO_ENABLE_RX_ON_TICK_PPI )
13661374 hal_radio_enable_on_tick_ppi_config_and_enable (1U );
@@ -1370,7 +1378,8 @@ void radio_tmr_tx_enable(void)
13701378
13711379void radio_tmr_rx_enable (void )
13721380{
1373- #if defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET ) || defined(CONFIG_SOC_COMPATIBLE_NRF54LX )
1381+ #if defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET ) || defined(CONFIG_SOC_COMPATIBLE_NRF54LX ) || \
1382+ defined(CONFIG_SOC_SERIES_NRF54HX )
13741383#else /* !CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET && !CONFIG_SOC_COMPATIBLE_NRF54LX */
13751384#if (HAL_RADIO_ENABLE_TX_ON_TICK_PPI == HAL_RADIO_ENABLE_RX_ON_TICK_PPI )
13761385 hal_radio_enable_on_tick_ppi_config_and_enable (0U );
@@ -1380,15 +1389,17 @@ void radio_tmr_rx_enable(void)
13801389
13811390void radio_tmr_tx_disable (void )
13821391{
1383- #if defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET ) || defined(CONFIG_SOC_COMPATIBLE_NRF54LX )
1392+ #if defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET ) || defined(CONFIG_SOC_COMPATIBLE_NRF54LX ) || \
1393+ defined(CONFIG_SOC_SERIES_NRF54HX )
13841394 nrf_radio_subscribe_clear (NRF_RADIO , NRF_RADIO_TASK_TXEN );
13851395#else /* !CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET && !CONFIG_SOC_COMPATIBLE_NRF54LX */
13861396#endif /* !CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET && !CONFIG_SOC_COMPATIBLE_NRF54LX */
13871397}
13881398
13891399void radio_tmr_rx_disable (void )
13901400{
1391- #if defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET ) || defined(CONFIG_SOC_COMPATIBLE_NRF54LX )
1401+ #if defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET ) || defined(CONFIG_SOC_COMPATIBLE_NRF54LX ) || \
1402+ defined(CONFIG_SOC_SERIES_NRF54HX )
13921403 nrf_radio_subscribe_clear (NRF_RADIO , NRF_RADIO_TASK_RXEN );
13931404#else /* !CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET && !CONFIG_SOC_COMPATIBLE_NRF54LX */
13941405#endif /* !CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET && !CONFIG_SOC_COMPATIBLE_NRF54LX */
@@ -1627,7 +1638,8 @@ uint32_t radio_tmr_start_tick(uint8_t trx, uint32_t ticks_start)
16271638#if defined(CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER )
16281639 last_pdu_end_us_init (latency_us );
16291640#endif /* CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER */
1630- #if defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET ) || defined(CONFIG_SOC_COMPATIBLE_NRF54LX )
1641+ #if defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET ) || defined(CONFIG_SOC_COMPATIBLE_NRF54LX ) || \
1642+ defined(CONFIG_SOC_SERIES_NRF54HX )
16311643 /* NOTE: Timer clear DPPI configuration is needed only for nRF53
16321644 * because of calls to radio_disable() and
16331645 * radio_switch_complete_and_disable() inside a radio event call
@@ -1657,7 +1669,8 @@ uint32_t radio_tmr_start_us(uint8_t trx, uint32_t start_us)
16571669 */
16581670 start_us -= last_pdu_end_us ;
16591671#endif /* CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER */
1660- #if defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET ) || defined(CONFIG_SOC_COMPATIBLE_NRF54LX )
1672+ #if defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET ) || defined(CONFIG_SOC_COMPATIBLE_NRF54LX ) || \
1673+ defined(CONFIG_SOC_SERIES_NRF54HX )
16611674 /* NOTE: Timer clear DPPI configuration is needed only for nRF53
16621675 * because of calls to radio_disable() and
16631676 * radio_switch_complete_and_disable() inside a radio event call
@@ -1792,6 +1805,7 @@ void radio_tmr_stop(void)
17921805#endif /* !CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER */
17931806#endif /* !CONFIG_BT_CTLR_TIFS_HW */
17941807
1808+ /* TODO: Check if this is needed for other SoCs like nRF54H20 */
17951809#if defined(CONFIG_SOC_COMPATIBLE_NRF54LX )
17961810#if defined(CONFIG_NRF_SYS_EVENT )
17971811 (void )nrf_sys_event_release_global_constlat ();
@@ -1876,9 +1890,12 @@ void radio_tmr_end_capture(void)
18761890 * hal_sw_switch_timer_clear_ppi_config() and sw_switch(). There is no need to
18771891 * configure the channel again in this function.
18781892 */
1879- #if (!defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET ) && !defined(CONFIG_SOC_COMPATIBLE_NRF54LX )) || \
1893+ #if (!defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET ) && \
1894+ !defined(CONFIG_SOC_COMPATIBLE_NRF54LX ) && \
1895+ !defined(CONFIG_SOC_SERIES_NRF54HX )) || \
18801896 ((defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET ) || \
1881- defined(CONFIG_SOC_COMPATIBLE_NRF54LX )) && \
1897+ defined(CONFIG_SOC_COMPATIBLE_NRF54LX ) || \
1898+ defined(CONFIG_SOC_SERIES_NRF54HX )) && \
18821899 !defined(CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER ))
18831900 hal_radio_end_time_capture_ppi_config ();
18841901 hal_radio_nrf_ppi_channels_enable (BIT (HAL_RADIO_END_TIME_CAPTURE_PPI ));
@@ -2073,7 +2090,7 @@ void radio_gpio_pa_lna_disable(void)
20732090#endif /* HAL_RADIO_GPIO_HAVE_PA_PIN || HAL_RADIO_GPIO_HAVE_LNA_PIN */
20742091
20752092#if defined(CONFIG_BT_CTLR_LE_ENC ) || defined(CONFIG_BT_CTLR_BROADCAST_ISO_ENC )
2076- #if defined(CONFIG_SOC_COMPATIBLE_NRF54LX )
2093+ #if defined(CONFIG_SOC_COMPATIBLE_NRF54LX ) || defined( CONFIG_SOC_SERIES_NRF54HX )
20772094struct ccm_job_ptr {
20782095 void * ptr ;
20792096 struct {
@@ -2115,7 +2132,7 @@ static void *radio_ccm_ext_rx_pkt_set(struct ccm *cnf, uint8_t phy, uint8_t pdu_
21152132 NRF_CCM -> ENABLE = CCM_ENABLE_ENABLE_Enabled ;
21162133
21172134 /* Select the CCM decryption mode for the SoC */
2118- #if defined(CONFIG_SOC_COMPATIBLE_NRF54LX )
2135+ #if defined(CONFIG_SOC_COMPATIBLE_NRF54LX ) || defined( CONFIG_SOC_SERIES_NRF54HX )
21192136 /* NOTE: Use fast decryption as rx data is decrypt after payload is received, compared to
21202137 * decrypting in parallel with radio reception of address in nRF51/nRF52/nRF53.
21212138 */
@@ -2214,7 +2231,8 @@ static void *radio_ccm_ext_rx_pkt_set(struct ccm *cnf, uint8_t phy, uint8_t pdu_
22142231 NRF_CCM -> MODE = mode ;
22152232
22162233#if defined(CONFIG_HAS_HW_NRF_CCM_HEADERMASK ) || \
2217- defined(CONFIG_SOC_COMPATIBLE_NRF54LX )
2234+ defined(CONFIG_SOC_COMPATIBLE_NRF54LX ) || \
2235+ defined(CONFIG_SOC_SERIES_NRF54HX )
22182236#if defined(CONFIG_HAS_HW_NRF_CCM_HEADERMASK )
22192237#define ADATAMASK HEADERMASK
22202238#endif /* CONFIG_HAS_HW_NRF_CCM_HEADERMASK */
@@ -2240,6 +2258,7 @@ static void *radio_ccm_ext_rx_pkt_set(struct ccm *cnf, uint8_t phy, uint8_t pdu_
22402258#if !defined(CONFIG_SOC_SERIES_NRF51X ) && \
22412259 !defined(CONFIG_SOC_NRF52832 ) && \
22422260 !defined(CONFIG_SOC_COMPATIBLE_NRF54LX ) && \
2261+ !defined(CONFIG_SOC_SERIES_NRF54HX ) && \
22432262 (!defined(CONFIG_BT_CTLR_DATA_LENGTH_MAX ) || \
22442263 (CONFIG_BT_CTLR_DATA_LENGTH_MAX < ((HAL_RADIO_PDU_LEN_MAX ) - 4U )))
22452264 const uint8_t max_len = (NRF_RADIO -> PCNF1 & RADIO_PCNF1_MAXLEN_Msk ) >>
@@ -2249,7 +2268,7 @@ static void *radio_ccm_ext_rx_pkt_set(struct ccm *cnf, uint8_t phy, uint8_t pdu_
22492268 NRF_CCM -> MAXPACKETSIZE = CLAMP ((max_len - PDU_MIC_SIZE ), 0x001B , 0x00FB );
22502269#endif
22512270
2252- #if defined(CONFIG_SOC_COMPATIBLE_NRF54LX )
2271+ #if defined(CONFIG_SOC_COMPATIBLE_NRF54LX ) || defined( CONFIG_SOC_SERIES_NRF54HX )
22532272 /* Configure the CCM key, nonce and pointers */
22542273 NRF_CCM -> KEY .VALUE [3 ] = sys_get_be32 (& cnf -> key [0 ]);
22552274 NRF_CCM -> KEY .VALUE [2 ] = sys_get_be32 (& cnf -> key [4 ]);
@@ -2360,7 +2379,7 @@ static void *radio_ccm_ext_tx_pkt_set(struct ccm *cnf, uint8_t pdu_type, void *p
23602379 NRF_CCM -> ENABLE = CCM_ENABLE_ENABLE_Enabled ;
23612380
23622381 /* Select the CCM encryption mode for the SoC */
2363- #if defined(CONFIG_SOC_COMPATIBLE_NRF54LX )
2382+ #if defined(CONFIG_SOC_COMPATIBLE_NRF54LX ) || defined( CONFIG_SOC_SERIES_NRF54HX )
23642383 mode = (CCM_MODE_MODE_Encryption << CCM_MODE_MODE_Pos ) &
23652384 CCM_MODE_MODE_Msk ;
23662385
@@ -2403,7 +2422,8 @@ static void *radio_ccm_ext_tx_pkt_set(struct ccm *cnf, uint8_t pdu_type, void *p
24032422 NRF_CCM -> MODE = mode ;
24042423
24052424#if defined(CONFIG_HAS_HW_NRF_CCM_HEADERMASK ) || \
2406- defined(CONFIG_SOC_COMPATIBLE_NRF54LX )
2425+ defined(CONFIG_SOC_COMPATIBLE_NRF54LX ) || \
2426+ defined(CONFIG_SOC_SERIES_NRF54HX )
24072427#if defined(CONFIG_HAS_HW_NRF_CCM_HEADERMASK )
24082428#define ADATAMASK HEADERMASK
24092429#endif /* CONFIG_HAS_HW_NRF_CCM_HEADERMASK */
@@ -2429,6 +2449,7 @@ static void *radio_ccm_ext_tx_pkt_set(struct ccm *cnf, uint8_t pdu_type, void *p
24292449#if !defined(CONFIG_SOC_SERIES_NRF51X ) && \
24302450 !defined(CONFIG_SOC_NRF52832 ) && \
24312451 !defined(CONFIG_SOC_COMPATIBLE_NRF54LX ) && \
2452+ !defined(CONFIG_SOC_SERIES_NRF54HX ) && \
24322453 (!defined(CONFIG_BT_CTLR_DATA_LENGTH_MAX ) || \
24332454 (CONFIG_BT_CTLR_DATA_LENGTH_MAX < ((HAL_RADIO_PDU_LEN_MAX ) - 4U )))
24342455 const uint8_t max_len = (NRF_RADIO -> PCNF1 & RADIO_PCNF1_MAXLEN_Msk ) >>
@@ -2438,7 +2459,7 @@ static void *radio_ccm_ext_tx_pkt_set(struct ccm *cnf, uint8_t pdu_type, void *p
24382459 NRF_CCM -> MAXPACKETSIZE = CLAMP ((max_len - PDU_MIC_SIZE ), 0x001B , 0x00FB );
24392460#endif
24402461
2441- #if defined(CONFIG_SOC_COMPATIBLE_NRF54LX )
2462+ #if defined(CONFIG_SOC_COMPATIBLE_NRF54LX ) || defined( CONFIG_SOC_SERIES_NRF54HX )
24422463 /* Configure the CCM key, nonce and pointers */
24432464 NRF_CCM -> KEY .VALUE [3 ] = sys_get_be32 (& cnf -> key [0 ]);
24442465 NRF_CCM -> KEY .VALUE [2 ] = sys_get_be32 (& cnf -> key [4 ]);
@@ -2562,7 +2583,7 @@ void radio_ccm_disable(void)
25622583#endif /* CONFIG_BT_CTLR_LE_ENC || CONFIG_BT_CTLR_BROADCAST_ISO_ENC */
25632584
25642585#if defined(CONFIG_BT_CTLR_PRIVACY )
2565- #if defined(CONFIG_SOC_COMPATIBLE_NRF54LX )
2586+ #if defined(CONFIG_SOC_COMPATIBLE_NRF54LX ) || defined( CONFIG_SOC_SERIES_NRF54HX )
25662587struct aar_job_ptr {
25672588 void * ptr ;
25682589 struct {
@@ -2641,7 +2662,7 @@ void radio_ar_configure(uint32_t nirk, void *irk, uint8_t flags)
26412662 NRF_AAR -> ENABLE = (AAR_ENABLE_ENABLE_Enabled << AAR_ENABLE_ENABLE_Pos ) &
26422663 AAR_ENABLE_ENABLE_Msk ;
26432664
2644- #if defined(CONFIG_SOC_COMPATIBLE_NRF54LX )
2665+ #if defined(CONFIG_SOC_COMPATIBLE_NRF54LX ) || defined( CONFIG_SOC_SERIES_NRF54HX )
26452666 /* Input, Resolvable Address Hash offset in the legacy or extended advertising PDU.
26462667 * Radio packet pointer offset by 3 compared to legacy AAR in nRF51/52/53 SoCs that took
26472668 * Radio packet pointer value.
@@ -2705,7 +2726,7 @@ void radio_ar_configure(uint32_t nirk, void *irk, uint8_t flags)
27052726
27062727uint32_t radio_ar_match_get (void )
27072728{
2708- #if defined(CONFIG_SOC_COMPATIBLE_NRF54LX )
2729+ #if defined(CONFIG_SOC_COMPATIBLE_NRF54LX ) || defined( CONFIG_SOC_SERIES_NRF54HX )
27092730 return aar_job .status ;
27102731#else /* !CONFIG_SOC_COMPATIBLE_NRF54LX */
27112732 return NRF_AAR -> STATUS ;
@@ -2752,7 +2773,7 @@ uint8_t radio_ar_resolve(const uint8_t *addr)
27522773 NRF_AAR -> ENABLE = (AAR_ENABLE_ENABLE_Enabled << AAR_ENABLE_ENABLE_Pos ) &
27532774 AAR_ENABLE_ENABLE_Msk ;
27542775
2755- #if defined(CONFIG_SOC_COMPATIBLE_NRF54LX )
2776+ #if defined(CONFIG_SOC_COMPATIBLE_NRF54LX ) || defined( CONFIG_SOC_SERIES_NRF54HX )
27562777 /* Input, Resolvable Address Hash offset in the supplied address buffer */
27572778 aar_job .in [0 ].ptr = (void * )& addr [BDADDR_HASH_OFFSET ];
27582779
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