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[nrf fromtree] soc: nordic: Gate FLASH_0 MPU region on CONFIG_XIP
Only include a flash MPU region if CONFIG_XIP is set, similar to arm/core/mpu/arm_mpu_regions.c. Signed-off-by: Josh DeWitt <josh.dewitt@garmin.com> (cherry picked from commit 0dc2e0c)
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soc/nordic/common/nrf54hx_nrf92x_mpu_regions.c

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@@ -22,10 +22,12 @@
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#define SOFTPERIPH_SIZE DT_REG_SIZE(DT_NODELABEL(softperiph_ram))
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static struct arm_mpu_region mpu_regions[] = {
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#ifdef CONFIG_XIP
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MPU_REGION_ENTRY("FLASH_0",
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CONFIG_FLASH_BASE_ADDRESS,
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REGION_FLASH_ATTR(CONFIG_FLASH_BASE_ADDRESS,
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CONFIG_FLASH_SIZE * 1024)),
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#endif
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MPU_REGION_ENTRY("SRAM_0",
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CONFIG_SRAM_BASE_ADDRESS,
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REGION_RAM_ATTR(CONFIG_SRAM_BASE_ADDRESS,

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