Implement OSD-GDB server bridge

[shivmgg]

We need an OSD-GDB server bridge to provide an interface between GDB and Open SoC Debug system.

It should implement GDB Remote Serial Protocol (RSP) which provides a high-level protocol allowing GDB to connect to any target remotely.

The current implementation should support OpenRISC 1000 architecture.
There are 2 data areas that are manipulated by the instruction set.

• Main memory. A uniform address space with 32 addressing. Provision for separate or unified instruction and data and instruction caches. Provision for separate or unified, 1 or 2-level data and instruction MMUs.
• Special Purpose Registers (SPRs). Up to 32 groups each with up to 2048 registers, up to 32 in length. These registers provide all the administrative functionality of the processor: program counter, processor status, saved exception registers, debug interface, MMU and cache interfaces, etc.

These features can be accessed using MAM and CDM module.