From 82fd85c29e39d7276444e85058649dfd7365df98 Mon Sep 17 00:00:00 2001 From: Philip Wiese Date: Tue, 24 Sep 2024 20:07:25 +0200 Subject: [PATCH 01/60] [feature] WIP Support arbitrary matrix shapes Important Changes: - Change scaling of Softmax from 2**7-1 to 2**8-1 Current Limitations: - Only works without biases - Only works with ReLU activation - FeedForward and MatMul do only work with one Tile --- .gitlab-ci.yml | 41 ++++++ .vscode/launch.json | 1 + PyITA/ITA.py | 88 +++++++++---- PyITA/ITA_onnx.py | 4 +- PyITA/softmax.py | 84 +++++++++++-- src/ita.sv | 22 +++- src/ita_controller.sv | 180 ++++++++++++++++++++++++--- src/ita_package.sv | 10 +- src/ita_requantization_controller.sv | 6 + src/ita_requantizer.sv | 11 +- src/ita_softmax.sv | 74 ++++++++--- src/ita_softmax_top.sv | 12 +- src/tb/ita_tb.sv | 10 +- 13 files changed, 454 insertions(+), 89 deletions(-) diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 7b4c3ce..2b214ff 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -29,6 +29,11 @@ generate_testvectors: - python testGenerator.py -H 1 -S 64 -E 64 -P 64 -F 64 --activation gelu - python testGenerator.py -H 1 -S 128 -E 192 -P 256 -F 256 --activation gelu - python testGenerator.py -H 1 -S 192 -E 256 -P 128 -F 128 --activation relu + # - python testGenerator.py -H 1 -S 1 -E 2 -P 3 -F 3 --activation gelu --no-bias + - python testGenerator.py -H 1 -S 1 -E 2 -P 3 -F 3 --activation relu --no-bias + - python testGenerator.py -H 1 -S 63 -E 62 -P 61 -F 61 --activation relu --no-bias + # - python testGenerator.py -H 1 -S 65 -E 130 -P 195 -F 195 --activation relu --no-bias + # - python testGenerator.py -H 1 -S 127 -E 190 -P 253 -F 253 --activation relu --no-bias artifacts: paths: - simvectors @@ -94,6 +99,42 @@ run_sim: - make sim VSIM_FLAGS=-c s=$S e=$E p=$P f=$F bias=1 activation=$activation no_stalls=$no_stalls single_attention=$single_attention - ./modelsim/return_status.sh modelsim/build/transcript $S $E $P $F ita_tb +run_sim_padding: + stage: sim + needs: + - generate_testvectors + parallel: + matrix: + # - S: 1 + # E: 2 + # P: 3 + # F: 3 + # activation: gelu + - S: 1 + E: 2 + P: 3 + F: 3 + activation: relu + - S: 63 + E: 62 + P: 61 + F: 61 + activation: relu + # - S: 65 + # E: 130 + # P: 195 + # F: 195 + # activation: relu + # - S: 127 + # E: 190 + # P: 253 + # F: 253 + # activation: relu + script: + - make bender + - make sim VSIM_FLAGS=-c s=$S e=$E p=$P f=$F bias=0 activation=$activation + - ./modelsim/return_status.sh modelsim/build/transcript $S $E $P $F ita_tb + run_hwpe_sim: stage: sim needs: diff --git a/.vscode/launch.json b/.vscode/launch.json index 4e54398..42f08d8 100644 --- a/.vscode/launch.json +++ b/.vscode/launch.json @@ -17,6 +17,7 @@ "-S${input:seq_len}", "-E${input:emb_len}", "-P${input:prj_len}", + "--no-bias" ], } ], diff --git a/PyITA/ITA.py b/PyITA/ITA.py index 24f7b0b..19ff5a0 100644 --- a/PyITA/ITA.py +++ b/PyITA/ITA.py @@ -69,10 +69,10 @@ def __init__(self, self._init_paths(path) - self.S_ITA = max(64, S) - self.P_ITA = max(64, P) - self.E_ITA = max(64, E) - self.F_ITA = max(64, F) + self.S_ITA = ((S - 1) // self.ITA_M + 1) * self.ITA_M + self.P_ITA = ((P - 1) // self.ITA_M + 1) * self.ITA_M + self.E_ITA = ((E - 1) // self.ITA_M + 1) * self.ITA_M + self.F_ITA = ((F - 1) // self.ITA_M + 1) * self.ITA_M self.H_ITA = 4 self.split = self.ITA_M // self.ITA_N @@ -110,10 +110,10 @@ def _validate_matrix_constraints(self, K: ArrayLike, V: ArrayLike): assert (np.all(K == V)) # WIESEP: Current restrictions for ITA - assert (self.S % self.ITA_M == 0), "Sequence length must be divisible by ITA_M" - assert (self.P % self.ITA_M == 0), "Projection space must be divisible by ITA_M" - assert (self.E % self.ITA_M == 0), "Embedding size must be divisible by ITA_M" - assert (self.F % self.ITA_M == 0), "Feedforward size must be divisible by ITA_M" + # assert (self.S % self.ITA_M == 0), "Sequence length must be divisible by ITA_M" + # assert (self.P % self.ITA_M == 0), "Projection space must be divisible by ITA_M" + # assert (self.E % self.ITA_M == 0), "Embedding size must be divisible by ITA_M" + # assert (self.F % self.ITA_M == 0), "Feedforward size must be divisible by ITA_M" assert ( self.E <= 512 @@ -172,7 +172,8 @@ def _initialize_tensors(self, Q, V, Wq, Wk, Wv, Wo, Bq, Bk, Bv, Bo, FF_in, Wff, else: self.Bq_in = np.zeros((self.H, self.P), dtype = np.int8) self.Bq = np.pad(self.Bq_in, ((0, 0), (0, self.P_ITA - self.P))) - self.Bq_broadcast = np.reshape(np.repeat(self.Bq, self.S, axis = 0), (self.H, self.S, self.P)) + self.Bq_broadcast = np.reshape(np.repeat(self.Bq, self.S, axis = 0), (self.H, self.S, self.P_ITA)) + self.Bq_broadcast = np.pad(self.Bq_broadcast, ((0, 0), (0, self.S_ITA - self.S), (0, 0))) if self.bias: self.Bk_in = random_shuffled_tensor( @@ -180,7 +181,8 @@ def _initialize_tensors(self, Q, V, Wq, Wk, Wv, Wo, Bq, Bk, Bv, Bo, FF_in, Wff, else: self.Bk_in = np.zeros((self.H, self.P), dtype = np.int8) self.Bk = np.pad(self.Bk_in, ((0, 0), (0, self.P_ITA - self.P))) - self.Bk_broadcast = np.reshape(np.repeat(self.Bk, self.S, axis = 0), (self.H, self.S, self.P)) + self.Bk_broadcast = np.reshape(np.repeat(self.Bk, self.S, axis = 0), (self.H, self.S, self.P_ITA)) + self.Bk_broadcast = np.pad(self.Bk_broadcast, ((0, 0), (0, self.S_ITA - self.S), (0, 0))) if self.bias: self.Bv_in = random_shuffled_tensor( @@ -188,7 +190,8 @@ def _initialize_tensors(self, Q, V, Wq, Wk, Wv, Wo, Bq, Bk, Bv, Bo, FF_in, Wff, else: self.Bv_in = np.zeros((self.H, self.P), dtype = np.int8) self.Bv = np.pad(self.Bv_in, ((0, 0), (0, self.P_ITA - self.P))) - self.Bv_broadcast = np.reshape(np.repeat(self.Bv, self.S, axis = 0), (self.H, self.S, self.P)) + self.Bv_broadcast = np.reshape(np.repeat(self.Bv, self.S, axis = 0), (self.H, self.S, self.P_ITA)) + self.Bv_broadcast = np.pad(self.Bv_broadcast, ((0, 0), (0, self.S_ITA - self.S), (0, 0))) if self.bias: self.Bo_in = random_shuffled_tensor( @@ -196,7 +199,8 @@ def _initialize_tensors(self, Q, V, Wq, Wk, Wv, Wo, Bq, Bk, Bv, Bo, FF_in, Wff, else: self.Bo_in = np.zeros((self.H, self.E), dtype = np.int8) self.Bo = np.pad(self.Bo_in, ((0, 0), (0, self.E_ITA - self.E))) - self.Bo_broadcast = np.reshape(np.repeat(self.Bo, self.S, axis = 0), (self.H, self.S, self.E)) + self.Bo_broadcast = np.reshape(np.repeat(self.Bo, self.S, axis = 0), (self.H, self.S, self.E_ITA)) + self.Bo_broadcast = np.pad(self.Bo_broadcast, ((0, 0), (0, self.S_ITA - self.S), (0, 0))) if self.bias: self.Bff_in = random_shuffled_tensor( @@ -204,14 +208,16 @@ def _initialize_tensors(self, Q, V, Wq, Wk, Wv, Wo, Bq, Bk, Bv, Bo, FF_in, Wff, else: self.Bff_in = np.zeros((1, self.F), dtype = np.int8) self.Bff = np.pad(self.Bff_in, ((0, 0), (0, self.F_ITA - self.F))) - self.Bff_broadcast = np.reshape(np.repeat(self.Bff, self.S, axis = 0), (1, self.S, self.F)) + self.Bff_broadcast = np.reshape(np.repeat(self.Bff, self.S, axis = 0), (1, self.S, self.F_ITA)) + self.Bff_broadcast = np.pad(self.Bff_broadcast, ((0, 0), (0, self.S_ITA - self.S), (0, 0))) if self.bias: self.Bff2_in = random_shuffled_tensor( (1, self.E), int(np.log2(self.E)) + 8, type = np.int32) if Bff2 is None else Bff2 else: self.Bff2_in = np.zeros((1, self.E), dtype = np.int8) self.Bff2 = np.pad(self.Bff2_in, ((0, 0), (0, self.E_ITA - self.E))) - self.Bff2_broadcast = np.reshape(np.repeat(self.Bff2, self.S, axis = 0), (1, self.S, self.E)) + self.Bff2_broadcast = np.reshape(np.repeat(self.Bff2, self.S, axis = 0), (1, self.S, self.E_ITA)) + self.Bff2_broadcast = np.pad(self.Bff2_broadcast, ((0, 0), (0, self.S_ITA - self.S), (0, 0))) #### Intermediate tensors #### @@ -373,7 +379,7 @@ def tiler_QK(self, qk: np.ndarray, weight: np.ndarray, bias: np.ndarray, output: # Bias Bqk is H x P # Broadcast Bias Bqk to H x S x P - bias = np.tile(bias, [1, self.S, 1]) + bias = np.tile(bias, [1, self.S_ITA, 1]) for h in range(self.H): Bias = split_matrix(bias[h], (self.ITA_M, self.ITA_N)) write_matrix(Bias, f"{bias_file}_{h}", self.paths["standalone"]) @@ -416,7 +422,7 @@ def tiler_V(self, v, weight, bias, output, input_file, weight_file, bias_file, o # Bias Bv is H x P # Broadcast Bias Bv to H x S x P - bias = np.tile(bias, [1, self.S, 1]) + bias = np.tile(bias, [1, self.S_ITA, 1]) # Transpose Bias Bv to H x P x S bias = np.transpose(bias, (0, 2, 1)) for h in range(self.H): @@ -497,7 +503,7 @@ def tiler_Out(self, O, weight, bias, output, input_file, weight_file, bias_file, # Bias Bo is H x E # Broadcast Bias Bo to H x S x E - bias = np.tile(bias, [1, self.S, 1]) + bias = np.tile(bias, [1, self.S_ITA, 1]) for h in range(self.H): Bias = split_matrix(bias[h], (self.ITA_M, self.ITA_N)) write_matrix(Bias, f"{bias_file}_{h}", self.paths["standalone"]) @@ -513,6 +519,12 @@ def step1_Qp(self): self.Qp_requant = requantize(self.Qp, self.requant_eps_mult[0], self.requant_right_shift[0], self.requant_add[0]) + # Set padded values to zero + if (self.S_ITA - self.S) > 0: + self.Qp_requant[:, -(self.S_ITA - self.S):, :] = 0 + if (self.P_ITA - self.P) > 0: + self.Qp_requant[:, :, -(self.P_ITA - self.P):] = 0 + self.tiler_QK(self.Q, self.Wq, self.Bq, self.Qp_requant, "Q", "Wq", "Bq", "Qp") def step2_Kp(self): @@ -521,6 +533,11 @@ def step2_Kp(self): self.Kp_requant = requantize(self.Kp, self.requant_eps_mult[1], self.requant_right_shift[1], self.requant_add[1]) + if (self.S_ITA - self.S) > 0: + self.Kp_requant[:, -(self.S_ITA - self.S):, :] = 0 + if (self.P_ITA - self.P) > 0: + self.Kp_requant[:, :, -(self.P_ITA - self.P):] = 0 + self.tiler_QK(self.K, self.Wk, self.Bk, self.Kp_requant, "K", "Wk", "Bk", "Kp") def step3_Vp(self): @@ -529,6 +546,11 @@ def step3_Vp(self): self.Vp_requant = requantize(self.Vp, self.requant_eps_mult[2], self.requant_right_shift[2], self.requant_add[2]) + if (self.S_ITA - self.S) > 0: + self.Vp_requant[:, -(self.S_ITA - self.S):, :] = 0 + if (self.P_ITA - self.P) > 0: + self.Vp_requant[:, :, -(self.P_ITA - self.P):] = 0 + # Compute Vp in transposed form self.tiler_V(self.V, self.Wv, self.Bv, self.Vp_requant, "V", "Wv", "Bv", "Vp") @@ -537,16 +559,27 @@ def step4_QK(self, no_partial_softmax): [np.matmul(self.Qp_requant[i], np.transpose(self.Kp_requant[i]), dtype = np.int32) for i in range(self.H)]) self.A = np.clip(self.A, -2**(self.WO - 1), 2**(self.WO - 1) - 1) self.A_requant = requantize(self.A, self.requant_eps_mult[3], self.requant_right_shift[3], self.requant_add[3]) + + if (self.S_ITA - self.S) > 0: + self.A_requant[:, -(self.S_ITA - self.S):, :] = 0 + self.A_requant[:, :, -(self.S_ITA - self.S):] = 0 + self.soft(no_partial_softmax) self.tiler_AV(self.Qp_requant, self.Kp_requant, self.A_requant, "Qp_in", "Kp_in", "A") def soft(self, no_partial_softmax = False): - self.A_real_softmax = realSoftmax(self.A_requant) + self.A_real_softmax = realSoftmax(self.A_requant[:, :self.S, :self.S]) + self.A_real_softmax = np.pad(self.A_real_softmax, ((0, 0), (0, self.S_ITA - self.S), (0, self.S_ITA - self.S))) + if no_partial_softmax: - self.A_partial_softmax = fastSoftmax(self.A_requant) + self.A_partial_softmax = fastSoftmax(self.A_requant[:, :self.S, :self.S]) + self.A_partial_softmax = np.pad(self.A_partial_softmax, + ((0, 0), (0, self.S_ITA - self.S), (0, self.S_ITA - self.S))) else: - self.A_partial_softmax = streamingPartialSoftmax(self.A_requant) + self.A_partial_softmax = streamingPartialSoftmax(self.A_requant[:, :self.S, :self.S]) + self.A_partial_softmax = np.pad(self.A_partial_softmax, + ((0, 0), (0, self.S_ITA - self.S), (0, self.S_ITA - self.S))) if self.H == 1: A_save = [np.tile(self.A_partial_softmax[i], [self.split, 1]) for i in range(self.H)] @@ -564,6 +597,11 @@ def step5_AV(self): self.O_soft_requant = requantize(self.O_soft, self.requant_eps_mult[4], self.requant_right_shift[4], self.requant_add[4]) + if (self.S_ITA - self.S) > 0: + self.O_soft_requant[:, -(self.S_ITA - self.S):, :] = 0 + if (self.P_ITA - self.P) > 0: + self.O_soft_requant[:, :, -(self.P_ITA - self.P):] = 0 + self.tiler_AV(self.A_requant, np.transpose(self.Vp_requant, (0, 2, 1)), self.O_soft_requant, "A_stream_soft_in", "Vp_in", "O_soft") @@ -590,6 +628,12 @@ def step6_O(self): self.Out_soft = np.clip(self.Out_soft, -2**(self.WO - 1), 2**(self.WO - 1) - 1) self.Out_soft_requant = requantize(self.Out_soft, self.requant_eps_mult[5], self.requant_right_shift[5], self.requant_add[5]) + + if (self.S_ITA - self.S) > 0: + self.Out_soft_requant[:, -(self.S_ITA - self.S):, :] = 0 + if (self.E_ITA - self.E) > 0: + self.Out_soft_requant[:, :, -(self.E_ITA - self.E):] = 0 + self.tiler_Out(self.O_soft_requant, self.Wo, self.Bo, self.Out_soft_requant, "O_soft_in", "Wo", "Bo", "Out_soft") @@ -934,8 +978,8 @@ def export_mempool(self, path): def export_numpy(self): assert np.all(np.equal(self.K, self.V)), "For ITA, keys and values have to be equal" - q = self.Q - k = self.K + q = self.Q_in + k = self.K_in w1 = self.Wq_in b1 = self.Bq_in w2 = self.Wk_in diff --git a/PyITA/ITA_onnx.py b/PyITA/ITA_onnx.py index eda85f3..235cf00 100644 --- a/PyITA/ITA_onnx.py +++ b/PyITA/ITA_onnx.py @@ -259,8 +259,8 @@ def exportONNX(path, verbose = False, **kwargs): # Transform from MUL-DIV-ADD to MUL-ADD-DIV RQ_ADD = (RQ_ADD * 2**RQ_SHIFT.astype(np.float32)) - input0_values = np.expand_dims(inputs['q'][:(S * E // 64), :].reshape(S, E), axis = 0) - input1_values = np.expand_dims(inputs['k'][:(S * E // 64), :].reshape(S, E), axis = 0) + input0_values = np.expand_dims(inputs['q'].reshape(S, E), axis = 0) + input1_values = np.expand_dims(inputs['k'].reshape(S, E), axis = 0) np.savez(path + "inputs.npz", input0_values, input1_values) diff --git a/PyITA/softmax.py b/PyITA/softmax.py index 8cbc5cf..eabf432 100644 --- a/PyITA/softmax.py +++ b/PyITA/softmax.py @@ -14,6 +14,8 @@ # # ---------------------------------------------------------------------- +import argparse + import numpy as np @@ -71,10 +73,7 @@ def streamingPartialSoftmax(x, integerize = True): seq_length = x.shape[-1] n_heads = x.shape[-3] - width = 16 # 16 PE (processing units) - groups = seq_length // width - - assert seq_length % width == 0, f"Sequence length must be a multiple of width ({width})" + PE = 16 # 16 PE (processing units) # Number of bits B = 8 @@ -101,12 +100,14 @@ def streamingPartialSoftmax(x, integerize = True): global_max = np.full((n_heads, seq_length), -np.Infinity, dtype = np.float32) ## STAGE 1: Compute the denominator of the softmax - for i in range(groups): + for i in range((seq_length + PE - 1) // PE): + width = seq_length % PE if i * PE + PE > seq_length else PE + # Find the maximum for each row in the current column block (consisting of 16 columns) if integerize: - current_max = np.max(x[..., 0 + i * width:width + i * width].astype(np.int32), axis = -1) + current_max = np.max(x[..., 0 + i * PE:width + i * PE].astype(np.int32), axis = -1) else: - current_max = np.max(x[..., 0 + i * width:width + i * width].astype(np.float32), axis = -1) + current_max = np.max(x[..., 0 + i * PE:width + i * PE].astype(np.float32), axis = -1) # Initialize all shift values for each row to zero if integerize: @@ -129,11 +130,11 @@ def streamingPartialSoftmax(x, integerize = True): # Find the difference between the maximum and x in the current part of the row if integerize: - diff = np.repeat(global_max, width).reshape( - n_heads, seq_length, width) - x[..., 0 + i * width:width + i * width].astype(np.int32) + diff = np.repeat(global_max, width).reshape(n_heads, seq_length, + width) - x[..., 0 + i * PE:width + i * PE].astype(np.int32) else: - diff = np.repeat(global_max, width).reshape( - n_heads, seq_length, width) - x[..., 0 + i * width:width + i * width].astype(np.float32) + diff = np.repeat(global_max, width).reshape(n_heads, seq_length, + width) - x[..., 0 + i * PE:width + i * PE].astype(np.float32) # Shift the values by B-log2B -> multiply by B/2**B = log2e*eps_x # Make sure to do use round-half-up instead of round-half-to-even @@ -177,7 +178,7 @@ def streamingPartialSoftmax(x, integerize = True): # A_partial_softmax[0] = np.repeat(exp_partial_sum_inverse, seq_length).reshape(seq_length, seq_length) >> shift return np.floor( np.repeat(exp_partial_sum_inverse, seq_length).reshape(n_heads, seq_length, seq_length) / 2**shift).astype( - np.int8) + np.uint8) else: return np.repeat(exp_partial_sum_inverse, seq_length).reshape(n_heads, seq_length, seq_length) / 2**shift @@ -195,7 +196,66 @@ def realSoftmax(A_requant, integerize = True): x = A_requant.astype(np.float64) exp = np.exp(x - np.max(x, axis = 2).reshape(n_heads, -1, 1)) + + # Replace nan with zero + exp = np.nan_to_num(exp) + if integerize: return (exp / exp.sum(axis = 2).reshape(n_heads, -1, 1) * (2**7 - 1)).astype(A_requant.dtype) else: return exp / exp.sum(axis = 2).reshape(n_heads, -1, 1) + + +if __name__ == "__main__": + np.set_printoptions(linewidth = 120) + np.set_printoptions(precision = 4) + + # Always print whole array + np.set_printoptions(threshold = np.inf) + + parser = argparse.ArgumentParser(description = "Test Utility for Softmax.") + # Sequence length + parser.add_argument("-S", default = 64, type = int, help = "Sequence length") + + # ITA sequence length + parser.add_argument("-M", default = 64, type = int, help = "ITA sequence length") + + # Quantiztion (float or int) + parser.add_argument("--int", action = "store_true", help = "Quantize to int") + parser.add_argument('--seed', default = 0, type = int, help = 'Random seed') + + args = parser.parse_args() + + ITA_WI = 8 + WO = 26 + ITA_N = 16 + ITA_M = args.M + + if args.seed != -1: + np.random.seed(args.seed) + + if args.int: + x = np.random.randint(-128, 128, (1, 1, args.S, args.S)).astype(np.int8) + else: + x = np.random.randn(1, 1, 16, 16).astype(np.float32) + + print("Input:") + print(x) + + # Pad last two dimensions to be a multiple of ITA_M + pad_x = (ITA_M - x.shape[-1] % ITA_M) % ITA_M + pad_y = (ITA_M - x.shape[-2] % ITA_M) % ITA_M + pad_value = -2**(ITA_WI - 1) if args.int else -np.inf + + print(f"Padding x by ({pad_y}, {pad_x}) with {pad_value}") + x_pad = np.pad(x, ((0, 0), (0, 0), (0, pad_y), (0, pad_x)), mode = 'constant', constant_values = pad_value) + + res = realSoftmax(x, integerize = args.int) + res_pad = realSoftmax(x_pad, integerize = args.int) + + res_unpad = res_pad[:, :, :args.S, :args.S] + + # Compare results + print(f"Equal: {np.allclose(res, res_unpad, atol = 1e-3)}") + print(res) + print(res_unpad) diff --git a/src/ita.sv b/src/ita.sv index 2dad263..ceb302d 100644 --- a/src/ita.sv +++ b/src/ita.sv @@ -171,6 +171,12 @@ module ita assign oup_o = valid_o ? data_from_fifo : '0; + requant_oup_t requant_add_o; + + counter_t inner_tile; + counter_t tile_x; + counter_t tile_y; + ita_controller i_controller ( .clk_i (clk_i ), .rst_ni (rst_ni ), @@ -190,6 +196,11 @@ module ita .calc_en_o (calc_en ), .first_inner_tile_o (first_inner_tile ), .last_inner_tile_o (last_inner_tile ), + .tile_x_o (tile_x ), + .tile_y_o (tile_y ), + .inner_tile_o (inner_tile ), + .requant_add_i (requant_add ), + .requant_add_o (requant_add_o ), .busy_o (busy_o ) ); @@ -255,13 +266,16 @@ module ita .soft_addr_div_o (soft_addr_div ), .softmax_done_o (softmax_done ), .pop_softmax_fifo_o (pop_softmax_fifo ), - .inp_stream_soft_o (inp_stream_soft ) + .inp_stream_soft_o (inp_stream_soft ), + .tile_x_i (tile_x ), + .tile_y_i (tile_y ), + .inner_tile_i (inner_tile ) ); ita_requatization_controller i_requantization_controller ( .ctrl_i (ctrl_i ), - .requantizer_step_i (step_q4 ), + .requantizer_step_i (step_q4 ), .requant_mult_o (requant_mult ), .requant_shift_o (requant_shift ), .requant_add_o (requant_add ), @@ -282,8 +296,8 @@ module ita .calc_en_i ( calc_en_q4 && last_inner_tile_q4 ), .calc_en_q_i ( calc_en_q5 && last_inner_tile_q5 ), - .result_i ( accumulator_oup ), - .add_i ( {N {requant_add}} ), + .result_i ( accumulator_oup ), + .add_i ( requant_add_o ), .requant_oup_o( requant_oup ) ); diff --git a/src/ita_controller.sv b/src/ita_controller.sv index 0fa8034..0c6ebe4 100644 --- a/src/ita_controller.sv +++ b/src/ita_controller.sv @@ -10,24 +10,29 @@ module ita_controller import ita_package::*; ( - input logic clk_i , - input logic rst_ni , - input ctrl_t ctrl_i , - input logic inp_valid_i , - output logic inp_ready_o , - input logic weight_valid_i , - output logic weight_ready_o , - input logic bias_valid_i , - output logic bias_ready_o , - input logic oup_valid_i , - input logic oup_ready_i , - input logic pop_softmax_fifo_i , - output step_e step_o , - input counter_t soft_addr_div_i , - input logic softmax_done_i , - output logic calc_en_o , - output logic first_inner_tile_o , - output logic last_inner_tile_o , + input logic clk_i , + input logic rst_ni , + input ctrl_t ctrl_i , + input logic inp_valid_i , + output logic inp_ready_o , + input logic weight_valid_i , + output logic weight_ready_o , + input logic bias_valid_i , + output logic bias_ready_o , + input logic oup_valid_i , + input logic oup_ready_i , + input logic pop_softmax_fifo_i , + output step_e step_o , + input counter_t soft_addr_div_i , + input logic softmax_done_i , + output logic calc_en_o , + output logic first_inner_tile_o , + output logic last_inner_tile_o , + output counter_t tile_x_o , + output counter_t tile_y_o , + output counter_t inner_tile_o , + input requant_t requant_add_i , + output requant_oup_t requant_add_o , output logic busy_o ); @@ -35,19 +40,27 @@ module ita_controller counter_t count_d, count_q; counter_t tile_d, tile_q; counter_t inner_tile_d, inner_tile_q; + counter_t tile_x_d, tile_x_q; + counter_t tile_y_d, tile_y_q; counter_t softmax_tile_d, softmax_tile_q; ongoing_t ongoing_d, ongoing_q; ongoing_soft_t ongoing_soft_d, ongoing_soft_q; logic softmax_fifo, softmax_div, softmax_div_done_d, softmax_div_done_q, busy_d, busy_q; + requant_oup_t requant_add_d, requant_add_q; assign step_o = step_q; assign busy_o = busy_q; + assign tile_x_o = tile_x_q; + assign tile_y_o = tile_y_q; + assign inner_tile_o = inner_tile_q; always_comb begin count_d = count_q; tile_d = tile_q; inner_tile_d = inner_tile_q; + tile_x_d = tile_x_q; + tile_y_d = tile_y_q; first_inner_tile_o = (inner_tile_q == 0) ? 1'b1 : 1'b0; last_inner_tile_o = 1'b0; ongoing_d = ongoing_q; @@ -59,6 +72,8 @@ module ita_controller step_d = step_q; softmax_tile_d = softmax_tile_q; softmax_div_done_d = softmax_div_done_q; + requant_add_d = {N {requant_add_i}}; + requant_add_o = requant_add_q; busy_d = busy_q; softmax_fifo = 1'b0; @@ -108,6 +123,8 @@ module ita_controller case (step_q) Idle : begin inner_tile_d = '0; + tile_x_d = '0; + tile_y_d = '0; tile_d = '0; softmax_tile_d = '0; softmax_div_done_d = 1'b0; @@ -128,12 +145,33 @@ module ita_controller Q : begin if (inner_tile_q == ctrl_i.tile_e-1) begin last_inner_tile_o = 1'b1; + if ( ( ((count_q & (M-1)) + tile_y_q * M) > ( (ctrl_i.seq_length - 1) ) ) ) begin + requant_add_d = {N {1'b0}}; + end else begin + if ( (count_q + tile_x_q * M*M/N) >= (ctrl_i.proj_space / N) * M ) begin + if ( ((count_q / M ) * N + tile_x_q * M ) < ctrl_i.proj_space) begin + for (int i = (ctrl_i.proj_space & (N-1)); i < N; i++) begin + requant_add_d[i] = 1'b0; + end + end else begin + requant_add_d = {N {1'b0}}; + end + end + end end if (inner_tile_d == ctrl_i.tile_e) begin // end of inner tile inner_tile_d = '0; tile_d = tile_q + 1; + if (tile_x_q == (ctrl_i.tile_p-1)) begin // end of step Q + tile_x_d = '0; + tile_y_d = tile_y_q + 1; + end else begin + tile_x_d = tile_x_q + 1; + end if (tile_d == ctrl_i.tile_s*ctrl_i.tile_p) begin // end of step Q tile_d = '0; + tile_x_d = '0; + tile_y_d = '0; step_d = K; end end @@ -141,12 +179,33 @@ module ita_controller K: begin if (inner_tile_q == ctrl_i.tile_e-1) begin last_inner_tile_o = 1'b1; + if ( ( ((count_q & (M-1)) + tile_y_q * M) > ( (ctrl_i.seq_length - 1) ) ) ) begin + requant_add_d = {N {1'b0}}; + end else begin + if ( (count_q + tile_x_q * M*M/N) >= (ctrl_i.proj_space / N) * M ) begin + if ( ((count_q / M ) * N + tile_x_q * M ) < ctrl_i.proj_space) begin + for (int i = (ctrl_i.proj_space & (N-1)); i < N; i++) begin + requant_add_d[i] = 1'b0; + end + end else begin + requant_add_d = {N {1'b0}}; + end + end + end end if (inner_tile_d == ctrl_i.tile_e) begin // end of inner tile inner_tile_d = '0; tile_d = tile_q + 1; + if (tile_x_q == (ctrl_i.tile_p-1)) begin // end of step Q + tile_x_d = '0; + tile_y_d = tile_y_q + 1; + end else begin + tile_x_d = tile_x_q + 1; + end if (tile_d == ctrl_i.tile_s*ctrl_i.tile_p) begin // end of step K tile_d = '0; + tile_x_d = '0; + tile_y_d = '0; step_d = V; end end @@ -154,12 +213,33 @@ module ita_controller V: begin if (inner_tile_q == ctrl_i.tile_e-1) begin last_inner_tile_o = 1'b1; + if ( ( ((count_q & (M-1)) + tile_y_q * M) > ( (ctrl_i.proj_space - 1) ) ) ) begin + requant_add_d = {N {1'b0}}; + end else begin + if ( (count_q + tile_x_q * M*M/N) >= (ctrl_i.seq_length / N) * M ) begin + if ( ((count_q / M ) * N + tile_x_q * M ) < ctrl_i.seq_length) begin + for (int i = (ctrl_i.seq_length & (N-1)); i < N; i++) begin + requant_add_d[i] = 1'b0; + end + end else begin + requant_add_d = {N {1'b0}}; + end + end + end end if (inner_tile_d == ctrl_i.tile_e) begin // end of inner tile inner_tile_d = '0; tile_d = tile_q + 1; + if (tile_x_q == (ctrl_i.tile_s-1)) begin // end of step Q + tile_x_d = '0; + tile_y_d = tile_y_q + 1; + end else begin + tile_x_d = tile_x_q + 1; + end if (tile_d == ctrl_i.tile_s*ctrl_i.tile_p) begin // end of step V tile_d = '0; + tile_x_d = '0; + tile_y_d = '0; step_d = QK; end end @@ -167,10 +247,28 @@ module ita_controller QK : begin if (inner_tile_q == ctrl_i.tile_p-1) begin last_inner_tile_o = 1'b1; + if ( ( ((count_q & (M-1)) + tile_y_q * M) > ( (ctrl_i.seq_length - 1) ) ) ) begin + requant_add_d = {N {1'b0}}; + end else begin + if ( (count_q + tile_x_q * M*M/N) >= (ctrl_i.seq_length / N) * M ) begin + if ( ((count_q / M ) * N + tile_x_q * M ) < ctrl_i.seq_length) begin + for (int i = (ctrl_i.seq_length & (N-1)); i < N; i++) begin + requant_add_d[i] = 1'b0; + end + end else begin + requant_add_d = {N {1'b0}}; + end + end + end end if (inner_tile_d == ctrl_i.tile_p) begin // end of inner tile inner_tile_d = '0; tile_d = tile_q + 1; + if (tile_x_q == (ctrl_i.tile_s-1)) begin // end of step Q + tile_x_d = '0; + end else begin + tile_x_d = tile_x_q + 1; + end if (tile_d == ctrl_i.tile_s) begin // end of step QK tile_d = '0; step_d = AV; @@ -180,21 +278,42 @@ module ita_controller AV : begin if (inner_tile_q == ctrl_i.tile_s-1) begin last_inner_tile_o = 1'b1; + if ( ( ((count_q & (M-1)) + tile_y_q * M) > ( (ctrl_i.seq_length - 1) ) ) ) begin + requant_add_d = {N {1'b0}}; + end else begin + if ( (count_q + tile_x_q * M*M/N) >= (ctrl_i.proj_space / N) * M ) begin + if ( ((count_q / M ) * N + tile_x_q * M ) < ctrl_i.proj_space) begin + for (int i = (ctrl_i.proj_space & (N-1)); i < N; i++) begin + requant_add_d[i] = 1'b0; + end + end else begin + requant_add_d = {N {1'b0}}; + end + end + end end if (inner_tile_d == ctrl_i.tile_s) begin // end of inner tile inner_tile_d = '0; tile_d = tile_q + 1; + if (tile_x_q == (ctrl_i.tile_p-1)) begin // end of step Q + tile_x_d = '0; + end else begin + tile_x_d = tile_x_q + 1; + end if (tile_d == ctrl_i.tile_p) begin tile_d = '0; softmax_tile_d = softmax_tile_q + 1; if (softmax_tile_d == ctrl_i.tile_s) begin softmax_tile_d = '0; + tile_x_d = '0; + tile_y_d = '0; if (ctrl_i.layer == Attention) begin step_d = OW; end else if (ctrl_i.layer == SingleAttention) begin step_d = Idle; end end else begin + tile_y_d = tile_y_q + 1; step_d = QK; end end @@ -203,12 +322,33 @@ module ita_controller OW : begin if (inner_tile_q == ctrl_i.tile_p-1) begin last_inner_tile_o = 1'b1; + if ( ( ((count_q & (M-1)) + tile_y_q * M) > ( (ctrl_i.seq_length - 1) ) ) ) begin + requant_add_d = {N {1'b0}}; + end else begin + if ( (count_q + tile_x_q * M*M/N) >= (ctrl_i.embed_size / N) * M ) begin + if ( ((count_q / M ) * N + tile_x_q * M ) < ctrl_i.embed_size) begin + for (int i = (ctrl_i.embed_size & (N-1)); i < N; i++) begin + requant_add_d[i] = 1'b0; + end + end else begin + requant_add_d = {N {1'b0}}; + end + end + end end if (inner_tile_d == ctrl_i.tile_p) begin // end of inner tile inner_tile_d = '0; tile_d = tile_q + 1; + if (tile_x_q == (ctrl_i.tile_e-1)) begin // end of step Q + tile_x_d = '0; + tile_y_d = tile_y_q + 1; + end else begin + tile_x_d = tile_x_q + 1; + end if (tile_d == ctrl_i.tile_s*ctrl_i.tile_e) begin // end of step OW tile_d = '0; + tile_x_d = '0; + tile_y_d = '0; step_d = Idle; end end @@ -281,16 +421,20 @@ module ita_controller ongoing_q <= '0; ongoing_soft_q <= '0; softmax_div_done_q <= 1'b0; + requant_add_q <= '0; busy_q <= 1'b0; end else begin step_q <= step_d; count_q <= count_d; tile_q <= tile_d; + tile_x_q <= tile_x_d; + tile_y_q <= tile_y_d; inner_tile_q <= inner_tile_d; softmax_tile_q <= softmax_tile_d; ongoing_q <= ongoing_d; ongoing_soft_q <= ongoing_soft_d; softmax_div_done_q <= softmax_div_done_d; + requant_add_q <= requant_add_d; busy_q <= busy_d; end end diff --git a/src/ita_package.sv b/src/ita_package.sv index 335e173..04d0d53 100644 --- a/src/ita_package.sv +++ b/src/ita_package.sv @@ -45,13 +45,15 @@ package ita_package; typedef logic [N_REQUANT_CONSTS-1:0][EMS-1:0] requant_const_array_t; typedef logic signed [WI-1:0] requant_t; typedef logic signed [N_REQUANT_CONSTS-1:0][WI-1:0] requant_array_t; - typedef logic [idx_width(S+1)-1:0] seq_length_t; - typedef logic [idx_width(P+1)-1:0] proj_space_t; - typedef logic [idx_width(E+1)-1:0] embed_size_t; - typedef logic [idx_width(H+1)-1:0] n_heads_t; + typedef logic [WO-WI*2-2:0] seq_length_t; + typedef logic [WO-WI*2-2:0] proj_space_t; + typedef logic [WO-WI*2-2:0] embed_size_t; typedef logic [ 32-1:0] tile_t; typedef struct packed { logic start ; + seq_length_t seq_length ; + proj_space_t proj_space ; + embed_size_t embed_size ; layer_e layer ; activation_e activation ; requant_const_array_t eps_mult ; diff --git a/src/ita_requantization_controller.sv b/src/ita_requantization_controller.sv index 3b6c865..e844358 100644 --- a/src/ita_requantization_controller.sv +++ b/src/ita_requantization_controller.sv @@ -33,6 +33,12 @@ module ita_requatization_controller endcase end + // always_comb begin + // requant_mult = ctrl_i.eps_mult[step_q4]; + // requant_shift = ctrl_i.right_shift[step_q4]; + // requant_add = ctrl_i.add[step]; + // end + assign requant_mult_o = ctrl_i.eps_mult[constant_idx]; assign requant_shift_o = ctrl_i.right_shift[constant_idx]; assign requant_add_o = ctrl_i.add[constant_idx]; diff --git a/src/ita_requantizer.sv b/src/ita_requantizer.sv index 6033c09..c67b97c 100644 --- a/src/ita_requantizer.sv +++ b/src/ita_requantizer.sv @@ -22,7 +22,8 @@ module ita_requantizer logic signed [EMS+WO:0] product ; logic signed [EMS+WO:0] shifted_added; logic signed [ N-1:0][EMS+WO-1:0] shifted_d, shifted_q; - requant_oup_t add_q1, requant_oup_d, requant_oup_q; + requant_oup_t add_q1, add_q2, add_q3, add_q4; + requant_oup_t requant_oup_d, requant_oup_q; assign requant_oup_o = requant_oup_q; @@ -49,7 +50,7 @@ module ita_requantizer end end if (calc_en_q_i) begin - shifted_added = shifted_q[i] + (EMS+WO)'(signed'(add_q1[i])); + shifted_added = shifted_q[i] + (EMS+WO)'(signed'(add_q4[i])); requant_oup_d[i] = shifted_added[WI-1:0]; if (~shifted_added[EMS+WO-1] & (|(shifted_added[EMS+WO-2:WI-1]))) begin requant_oup_d[i] = '1; @@ -76,8 +77,14 @@ module ita_requantizer always_ff @(posedge clk_i, negedge rst_ni) begin if (!rst_ni) begin add_q1 <= '0; + add_q2 <= '0; + add_q3 <= '0; + add_q4 <= '0; end else begin add_q1 <= add_i; + add_q2 <= add_q1; + add_q3 <= add_q2; + add_q4 <= add_q3; end end endmodule diff --git a/src/ita_softmax.sv b/src/ita_softmax.sv index 675750c..ac61ed2 100644 --- a/src/ita_softmax.sv +++ b/src/ita_softmax.sv @@ -39,14 +39,19 @@ module ita_softmax input requant_t [1:0] read_max_data_i, output logic write_max_en_o, output logic [InputAddrWidth-1:0] write_max_addr_o, - output requant_t write_max_data_o + output requant_t write_max_data_o, + input counter_t tile_x_i, + input counter_t tile_y_i, + input counter_t inner_tile_i ); counter_t tile_d, tile_q1, tile_q2, tile_q3, tile_q4; counter_t count_d, count_q1, count_q2, count_q3, count_q4; + counter_t inner_tile_q; + counter_t tile_y_q; logic unsigned [SoftmaxAccDataWidth-1:0] exp_sum_d, exp_sum_q; - counter_t count_soft_d, count_soft_q; + counter_t count_soft_d, count_soft_q1, count_soft_q2; counter_t count_div_d, count_div_q, addr_div_d, addr_div_q; logic [NumDiv-1:0] div_read_d, div_read_q, div_write_d, div_write_q; @@ -69,13 +74,19 @@ module ita_softmax logic [SoftmaxAccDataWidth-1:0] data_to_fifo, data_from_fifo; soft_fifo_usage_t fifo_usage ; + logic [N-1:0] disable_shift; + logic disable_row; + logic [M-1:0]disable_col; + + assign disable_row = ((count_soft_q2 & (M-1)) + tile_y_q * M) > (ctrl_i.seq_length - 1); + assign pop_softmax_fifo_o = pop_from_fifo; assign soft_addr_div_o = addr_div_q; always_comb begin tile_d = tile_q1; count_d = count_q1; - count_soft_d = count_soft_q; + count_soft_d = count_soft_q1; count_div_d = count_div_q; div_read_d = div_read_q; div_write_d = div_write_q; @@ -135,13 +146,20 @@ module ita_softmax //************ Pipeline Stage 1 ************// if (calc_en_q1) begin // Find max and accumulate - max_o = requant_oup_q; max_d = max_i; for (int i = 0; i < N; i++) begin shift_diff[i] = max_i - requant_oup_q[i]; - shift_d[i] = unsigned'(shift_diff[i]) >> 5; - if (shift_diff[i][4]) - shift_d[i] = (unsigned'(shift_diff[i]) >> 5) + 1; + disable_shift[i] = ( (tile_q2*M+N*(count_q2 >> $clog2(M))+i ) >= ctrl_i.seq_length); + + if (disable_shift[i]) begin + max_o[i] = 8'h80; + shift_d[i] = 4'hF; + end else begin + max_o[i] = requant_oup_q[i]; + shift_d[i] = unsigned'(shift_diff[i]) >> 5; + if (shift_diff[i][4]) + shift_d[i] = (unsigned'(shift_diff[i]) >> 5) + 1; + end end if (tile_q2 != '0 || count_q2>=M) begin // If not first part of the first row, normalize previous sum read_acc_en_o[0] = 1; @@ -162,7 +180,8 @@ module ita_softmax write_max_addr_o = count_q3; write_max_data_o = max_q; for (int i = 0; i < N; i++) begin - exp_sum_d += unsigned'(9'h100)>>shift_q[i]; + if (shift_d[i] != 4'hF) + exp_sum_d += unsigned'(9'h100)>>shift_q[i]; end if (tile_q3 != '0 || count_q3>=M) begin // If not first part of the first row exp_sum_d += ( unsigned'(read_acc_data_i[0]) >> shift_sum_q); @@ -211,28 +230,39 @@ module ita_softmax //*********** Stream Softmax ***********// // Main controller checks if division is ready if (calc_stream_soft_en_i) begin - count_soft_d = count_soft_q + 1; + count_soft_d = count_soft_q1 + 1; read_acc_en_o[1] = 1; - read_acc_addr_o[1] = count_soft_q[5:0]; + read_acc_addr_o[1] = count_soft_q1[5:0]; read_max_en_o[1] = 1; - read_max_addr_o[1] = count_soft_q[5:0]; + read_max_addr_o[1] = count_soft_q1[5:0]; if (count_soft_d == M*M/N) begin count_soft_d = '0; end end if (calc_stream_soft_en_q) begin - for (int i = 0; i < M; i++) begin - shift_inp_diff[i] = read_max_data_i[1]-inp_i[i]; - shift_inp[i] = unsigned'(shift_inp_diff[i]) >> 5; - if (shift_inp_diff[i][4]) - shift_inp[i] = (unsigned'(shift_inp_diff[i]) >> 5) + 1; - inp_stream_soft_o[i] = read_acc_data_i[1] >> shift_inp[i]; + if (disable_row) begin + inp_stream_soft_o = { M { '0 } }; + end else begin + for (int i = 0; i < M; i++) begin + disable_col[i] = ((inner_tile_q*M + i) >= ctrl_i.seq_length); + if (disable_col[i]) begin + inp_stream_soft_o[i] = '0; + end else begin + shift_inp_diff[i] = read_max_data_i[1]-inp_i[i]; + shift_inp[i] = unsigned'(shift_inp_diff[i]) >> 5; + if (shift_inp_diff[i][4]) + shift_inp[i] = (unsigned'(shift_inp_diff[i]) >> 5) + 1; + inp_stream_soft_o[i] = read_acc_data_i[1] >> shift_inp[i]; + end + end end end end always_ff @(posedge clk_i or negedge rst_ni) begin if(~rst_ni) begin + inner_tile_q <= '0; + tile_y_q <= '0; tile_q4 <= '0; tile_q3 <= '0; tile_q2 <= '0; @@ -240,8 +270,9 @@ module ita_softmax count_q4 <= M*M/N; count_q3 <= M*M/N; count_q2 <= M*M/N; - count_q1 <= M*M/N; - count_soft_q <= '0; + count_q1 <= M*M/N; + count_soft_q1 <= '0; + count_soft_q2 <= '0; count_div_q <= '0; div_read_q <= '0; div_write_q <= '0; @@ -253,6 +284,8 @@ module ita_softmax shift_q <= '0; shift_sum_q <= '0; end else begin + inner_tile_q <= inner_tile_i; + tile_y_q <= tile_y_i; tile_q4 <= tile_q3; tile_q3 <= tile_q2; tile_q2 <= tile_q1; @@ -261,7 +294,8 @@ module ita_softmax count_q3 <= count_q2; count_q2 <= count_q1; count_q1 <= count_d; - count_soft_q <= count_soft_d; + count_soft_q1 <= count_soft_d; + count_soft_q2 <= count_soft_q1; count_div_q <= count_div_d; div_read_q <= div_read_d; div_write_q <= div_write_d; diff --git a/src/ita_softmax_top.sv b/src/ita_softmax_top.sv index e44fb4f..df2b421 100644 --- a/src/ita_softmax_top.sv +++ b/src/ita_softmax_top.sv @@ -19,7 +19,11 @@ module ita_softmax_top output counter_t soft_addr_div_o , output logic softmax_done_o , output logic pop_softmax_fifo_o , - output inp_t inp_stream_soft_o + output inp_t inp_stream_soft_o , + input counter_t tile_x_i , + input counter_t tile_y_i , + input counter_t inner_tile_i + ); logic [1:0] read_acc_en; @@ -113,7 +117,11 @@ module ita_softmax_top .write_max_en_o (write_max_en ), .write_max_addr_o (write_max_addr ), - .write_max_data_o (write_max_data ) + .write_max_data_o (write_max_data ), + + .tile_x_i (tile_x_i ), + .tile_y_i (tile_y_i ), + .inner_tile_i (inner_tile_i ) ); ita_register_file_1w_multi_port_read #( diff --git a/src/tb/ita_tb.sv b/src/tb/ita_tb.sv index e8f84a6..6d0f9fe 100644 --- a/src/tb/ita_tb.sv +++ b/src/tb/ita_tb.sv @@ -91,9 +91,10 @@ module ita_tb; "_", $sformatf( "%s", ACTIVATION) }; - N_TILES_SEQUENCE_DIM = SEQUENCE_LEN / M_TILE_LEN; - N_TILES_EMBEDDING_DIM = EMBEDDING_SIZE / M_TILE_LEN; - N_TILES_PROJECTION_DIM = PROJECTION_SPACE / M_TILE_LEN; + // Round up + N_TILES_SEQUENCE_DIM = (SEQUENCE_LEN + M_TILE_LEN -1 ) / M_TILE_LEN; + N_TILES_EMBEDDING_DIM = (EMBEDDING_SIZE+ M_TILE_LEN -1 ) / M_TILE_LEN; + N_TILES_PROJECTION_DIM = (PROJECTION_SPACE + M_TILE_LEN -1 ) / M_TILE_LEN; N_TILES_LINEAR_PROJECTION = N_TILES_SEQUENCE_DIM * N_TILES_EMBEDDING_DIM * N_TILES_PROJECTION_DIM; N_TILES_ATTENTION = N_TILES_SEQUENCE_DIM * N_TILES_PROJECTION_DIM; N_ENTRIES_PER_TILE = M_TILE_LEN * M_TILE_LEN / N_PE; @@ -489,6 +490,9 @@ task automatic apply_ITA_weights(input integer phase); ita_ctrl.tile_p = N_TILES_PROJECTION_DIM; ita_ctrl.tile_s = N_TILES_SEQUENCE_DIM; ita_ctrl.tile_f = N_TILES_FEEDFORWARD; + ita_ctrl.seq_length = SEQUENCE_LEN; + ita_ctrl.proj_space = PROJECTION_SPACE; + ita_ctrl.embed_size = EMBEDDING_SIZE; read_activation_constants(ita_ctrl.gelu_b, ita_ctrl.gelu_c, ita_ctrl.activation_requant_mult, ita_ctrl.activation_requant_shift, ita_ctrl.activation_requant_add); From 7d07f8436b0a97d6acffd13e8ec222ebc556b086 Mon Sep 17 00:00:00 2001 From: Philip Wiese Date: Tue, 24 Sep 2024 19:52:11 +0200 Subject: [PATCH 02/60] [change] Speedup CI by removing Python Dependencies --- README.md | 1 + requirements.dev.txt | 7 +++++++ requirements.txt | 3 --- 3 files changed, 8 insertions(+), 3 deletions(-) create mode 100644 requirements.dev.txt diff --git a/README.md b/README.md index 3a29e23..b58d20e 100644 --- a/README.md +++ b/README.md @@ -54,6 +54,7 @@ To install the required Python packages, create a virtual environment. Make sure $> python -m venv venv $> source venv/bin/activate $> pip install -r requirements.txt +$> pip install -r requirements.dev.txt # Only required for PyITA/test_gelu.py ``` If you want to enable pre-commit hooks, which perform code formatting and linting, run the following command: diff --git a/requirements.dev.txt b/requirements.dev.txt new file mode 100644 index 0000000..faa86d4 --- /dev/null +++ b/requirements.dev.txt @@ -0,0 +1,7 @@ +# Copyright 2023 ETH Zurich and University of Bologna. +# Licensed under the Apache License, Version 2.0, see LICENSE for details. +# SPDX-License-Identifier: Apache-2.0 + +torch +pytest +pytest-check diff --git a/requirements.txt b/requirements.txt index 4bfbc47..e8e03c9 100644 --- a/requirements.txt +++ b/requirements.txt @@ -8,7 +8,4 @@ onnxruntime netron seaborn matplotlib -torch -pytest -pytest-check pre-commit From 24015877882d8021b8e9d90defead7f3244fd75e Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Sun, 13 Oct 2024 14:09:55 +0200 Subject: [PATCH 03/60] Added debug.py to print matrices --- .gitlab-ci.yml | 13 ++++----- PyITA/debug.py | 52 ++++++++++++++++++++++++++++++++++++ modelsim/sim_ita_tb_wave.tcl | 1 + 3 files changed, 60 insertions(+), 6 deletions(-) create mode 100644 PyITA/debug.py diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 2b214ff..31832bc 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -26,11 +26,12 @@ generate_testvectors: stage: test script: - !reference [.setup_test, script] - - python testGenerator.py -H 1 -S 64 -E 64 -P 64 -F 64 --activation gelu - - python testGenerator.py -H 1 -S 128 -E 192 -P 256 -F 256 --activation gelu - - python testGenerator.py -H 1 -S 192 -E 256 -P 128 -F 128 --activation relu - # - python testGenerator.py -H 1 -S 1 -E 2 -P 3 -F 3 --activation gelu --no-bias - - python testGenerator.py -H 1 -S 1 -E 2 -P 3 -F 3 --activation relu --no-bias + - python testGenerator.py -H 1 -S 128 -E 128 -P 192 -F 256 --activation identity --no-bias + # - python testGenerator.py -H 1 -S 64 -E 128 -P 192 -F 256 --activation identity --no-bias + # - python testGenerator.py -H 1 -S 128 -E 192 -P 256 -F 256 --activation gelu + # - python testGenerator.py -H 1 -S 192 -E 256 -P 128 -F 128 --activation relu + - python testGenerator.py -H 1 -S 1 -E 2 -P 3 -F 3 --activation gelu --no-bias + # - python testGenerator.py -H 1 -S 1 -E 2 -P 3 -F 3 --activation relu --no-bias - python testGenerator.py -H 1 -S 63 -E 62 -P 61 -F 61 --activation relu --no-bias # - python testGenerator.py -H 1 -S 65 -E 130 -P 195 -F 195 --activation relu --no-bias # - python testGenerator.py -H 1 -S 127 -E 190 -P 253 -F 253 --activation relu --no-bias @@ -126,7 +127,7 @@ run_sim_padding: # F: 195 # activation: relu # - S: 127 - # E: 190 + # E: 190gelu # P: 253 # F: 253 # activation: relu diff --git a/PyITA/debug.py b/PyITA/debug.py new file mode 100644 index 0000000..b30b1ac --- /dev/null +++ b/PyITA/debug.py @@ -0,0 +1,52 @@ +import os +import numpy as np +import seaborn as sns +import matplotlib.pyplot as plt + + +def print_matrix(from_txt: bool, matrix: np.array = None, + txt_file: str = 'Out_soft_0.txt', + test_vector: str = 'data_S128_E128_P192_F256_H1_B0', + row: int = 128, col: int = 128): + if (from_txt): + current_dir = os.path.dirname(os.path.abspath(__file__)) + filepath = os.path.join(os.path.dirname(current_dir), + 'simvectors', + test_vector, + 'standalone', + txt_file) + + array = np.loadtxt(filepath) + matrix = array.reshape(row, col) + + sns.set_theme() + sns.heatmap(matrix, annot=False, linewidths=0, linecolor='white', cmap='crest', xticklabels=False, yticklabels=False) + plt.show() + +# row = 128 +# col = 128 + +# txt_file = 'Out_soft_0.txt' +# test_vector = 'data_S128_E128_P192_F256_H1_B0' + +# current_dir = os.path.dirname(os.path.abspath(__file__)) +# filepath = os.path.join(os.path.dirname(current_dir), +# 'simvectors', +# test_vector, +# 'standalone', +# txt_file) + +# print(filepath) +# print(os.path.exists(filepath)) + +# array = np.loadtxt(filepath) +# matrix = array.reshape(row, col) + +# sns.set_theme() +# sns.heatmap(matrix, annot=False, linewidths=0, linecolor='white', cmap='crest', xticklabels=False, yticklabels=False) +# plt.show() + + + + + diff --git a/modelsim/sim_ita_tb_wave.tcl b/modelsim/sim_ita_tb_wave.tcl index 4f29360..ded354f 100644 --- a/modelsim/sim_ita_tb_wave.tcl +++ b/modelsim/sim_ita_tb_wave.tcl @@ -11,6 +11,7 @@ add wave -noupdate /ita_tb/dut/i_inp2_mux/rst_ni add wave -noupdate /ita_tb/dut/i_inp2_mux/weight_i add wave -noupdate /ita_tb/dut/i_inp2_mux/inp2_o add wave -noupdate /ita_tb/dut/i_controller/ctrl_i +add wave -noupdate /ita_tb/dut/oup_o add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/* add wave -expand -group Controller /ita_tb/dut/i_controller/* add wave -group {Softmax Controller} ita_tb/dut/i_softmax_top/i_softmax/* From f6d1100cc181e9f733654101b7851dece0f12737 Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Sun, 13 Oct 2024 20:12:23 +0200 Subject: [PATCH 04/60] Small changes in the debug.py file --- PyITA/debug.py | 26 +++----------------------- 1 file changed, 3 insertions(+), 23 deletions(-) diff --git a/PyITA/debug.py b/PyITA/debug.py index b30b1ac..60b875e 100644 --- a/PyITA/debug.py +++ b/PyITA/debug.py @@ -6,8 +6,9 @@ def print_matrix(from_txt: bool, matrix: np.array = None, txt_file: str = 'Out_soft_0.txt', - test_vector: str = 'data_S128_E128_P192_F256_H1_B0', + test_vector: str = 'data_S30_E30_P50_F64_H1_B0', row: int = 128, col: int = 128): + if (from_txt): current_dir = os.path.dirname(os.path.abspath(__file__)) filepath = os.path.join(os.path.dirname(current_dir), @@ -23,28 +24,7 @@ def print_matrix(from_txt: bool, matrix: np.array = None, sns.heatmap(matrix, annot=False, linewidths=0, linecolor='white', cmap='crest', xticklabels=False, yticklabels=False) plt.show() -# row = 128 -# col = 128 - -# txt_file = 'Out_soft_0.txt' -# test_vector = 'data_S128_E128_P192_F256_H1_B0' - -# current_dir = os.path.dirname(os.path.abspath(__file__)) -# filepath = os.path.join(os.path.dirname(current_dir), -# 'simvectors', -# test_vector, -# 'standalone', -# txt_file) - -# print(filepath) -# print(os.path.exists(filepath)) - -# array = np.loadtxt(filepath) -# matrix = array.reshape(row, col) - -# sns.set_theme() -# sns.heatmap(matrix, annot=False, linewidths=0, linecolor='white', cmap='crest', xticklabels=False, yticklabels=False) -# plt.show() +# print_matrix(from_txt=True, txt_file="A_soft_0.txt") From c80f81f29bb011a65d884f07293cf4650aa15f18 Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Tue, 15 Oct 2024 18:55:05 +0200 Subject: [PATCH 05/60] Small changes in ita_controller.sv --- PyITA/debug.py | 15 +++-- src/ita_controller.sv | 136 +++++++++++++----------------------------- 2 files changed, 51 insertions(+), 100 deletions(-) diff --git a/PyITA/debug.py b/PyITA/debug.py index 60b875e..80d1e02 100644 --- a/PyITA/debug.py +++ b/PyITA/debug.py @@ -4,10 +4,12 @@ import matplotlib.pyplot as plt -def print_matrix(from_txt: bool, matrix: np.array = None, - txt_file: str = 'Out_soft_0.txt', - test_vector: str = 'data_S30_E30_P50_F64_H1_B0', - row: int = 128, col: int = 128): +def print_matrix(from_txt: bool, + cut: bool = False, + matrix: np.array = None, + txt_file: str = 'Qp_0.txt', + test_vector: str = 'data_S32_E32_P32_F64_H1_B1', + row: int = 64, col: int = 64): if (from_txt): current_dir = os.path.dirname(os.path.abspath(__file__)) @@ -18,10 +20,15 @@ def print_matrix(from_txt: bool, matrix: np.array = None, txt_file) array = np.loadtxt(filepath) + if (cut): + array = array[:4096] matrix = array.reshape(row, col) sns.set_theme() sns.heatmap(matrix, annot=False, linewidths=0, linecolor='white', cmap='crest', xticklabels=False, yticklabels=False) + plt.title(txt_file) + plt.xlabel(col) + plt.ylabel(row) plt.show() # print_matrix(from_txt=True, txt_file="A_soft_0.txt") diff --git a/src/ita_controller.sv b/src/ita_controller.sv index 0c6ebe4..fb3d534 100644 --- a/src/ita_controller.sv +++ b/src/ita_controller.sv @@ -46,6 +46,9 @@ module ita_controller ongoing_t ongoing_d, ongoing_q; ongoing_soft_t ongoing_soft_d, ongoing_soft_q; + tile_t inner_tile_dim; + logic [WO-WI*2-2:0] first_outer_dim, second_outer_dim; + logic softmax_fifo, softmax_div, softmax_div_done_d, softmax_div_done_q, busy_d, busy_q; requant_oup_t requant_add_d, requant_add_q; @@ -89,6 +92,25 @@ module ita_controller busy_d = 1'b1; end + if (step_q != Idle && step_q != F1 && step_q != F2 && step_q != MatMul) begin + if (inner_tile_q == inner_tile_dim) begin + last_inner_tile_o = 1'b1; + if ( ( ((count_q & (M-1)) + tile_y_q * M) > ( (first_outer_dim - 1) ) ) ) begin + requant_add_d = {N {1'b0}}; + end else begin + if ( (count_q + tile_x_q * M*M/N) >= (second_outer_dim / N) * M ) begin + if ( ((count_q / M ) * N + tile_x_q * M ) < second_outer_dim) begin + for (int i = (second_outer_dim & (N-1)); i < N; i++) begin + requant_add_d[i] = 1'b0; + end + end else begin + requant_add_d = {N {1'b0}}; + end + end + end + end + end + // default handshake if (step_q != Idle) begin // Check if division for softmax is going to FIFO @@ -143,22 +165,9 @@ module ita_controller end // Attention Q : begin - if (inner_tile_q == ctrl_i.tile_e-1) begin - last_inner_tile_o = 1'b1; - if ( ( ((count_q & (M-1)) + tile_y_q * M) > ( (ctrl_i.seq_length - 1) ) ) ) begin - requant_add_d = {N {1'b0}}; - end else begin - if ( (count_q + tile_x_q * M*M/N) >= (ctrl_i.proj_space / N) * M ) begin - if ( ((count_q / M ) * N + tile_x_q * M ) < ctrl_i.proj_space) begin - for (int i = (ctrl_i.proj_space & (N-1)); i < N; i++) begin - requant_add_d[i] = 1'b0; - end - end else begin - requant_add_d = {N {1'b0}}; - end - end - end - end + inner_tile_dim = ctrl_i.tile_e-1; + first_outer_dim = ctrl_i.seq_length; + second_outer_dim = ctrl_i.proj_space; if (inner_tile_d == ctrl_i.tile_e) begin // end of inner tile inner_tile_d = '0; tile_d = tile_q + 1; @@ -177,22 +186,9 @@ module ita_controller end end K: begin - if (inner_tile_q == ctrl_i.tile_e-1) begin - last_inner_tile_o = 1'b1; - if ( ( ((count_q & (M-1)) + tile_y_q * M) > ( (ctrl_i.seq_length - 1) ) ) ) begin - requant_add_d = {N {1'b0}}; - end else begin - if ( (count_q + tile_x_q * M*M/N) >= (ctrl_i.proj_space / N) * M ) begin - if ( ((count_q / M ) * N + tile_x_q * M ) < ctrl_i.proj_space) begin - for (int i = (ctrl_i.proj_space & (N-1)); i < N; i++) begin - requant_add_d[i] = 1'b0; - end - end else begin - requant_add_d = {N {1'b0}}; - end - end - end - end + inner_tile_dim = ctrl_i.tile_e-1; + first_outer_dim = ctrl_i.seq_length; + second_outer_dim = ctrl_i.proj_space; if (inner_tile_d == ctrl_i.tile_e) begin // end of inner tile inner_tile_d = '0; tile_d = tile_q + 1; @@ -211,22 +207,9 @@ module ita_controller end end V: begin - if (inner_tile_q == ctrl_i.tile_e-1) begin - last_inner_tile_o = 1'b1; - if ( ( ((count_q & (M-1)) + tile_y_q * M) > ( (ctrl_i.proj_space - 1) ) ) ) begin - requant_add_d = {N {1'b0}}; - end else begin - if ( (count_q + tile_x_q * M*M/N) >= (ctrl_i.seq_length / N) * M ) begin - if ( ((count_q / M ) * N + tile_x_q * M ) < ctrl_i.seq_length) begin - for (int i = (ctrl_i.seq_length & (N-1)); i < N; i++) begin - requant_add_d[i] = 1'b0; - end - end else begin - requant_add_d = {N {1'b0}}; - end - end - end - end + inner_tile_dim = ctrl_i.tile_e-1; + first_outer_dim = ctrl_i.proj_space; + second_outer_dim = ctrl_i.seq_length; if (inner_tile_d == ctrl_i.tile_e) begin // end of inner tile inner_tile_d = '0; tile_d = tile_q + 1; @@ -245,22 +228,9 @@ module ita_controller end end QK : begin - if (inner_tile_q == ctrl_i.tile_p-1) begin - last_inner_tile_o = 1'b1; - if ( ( ((count_q & (M-1)) + tile_y_q * M) > ( (ctrl_i.seq_length - 1) ) ) ) begin - requant_add_d = {N {1'b0}}; - end else begin - if ( (count_q + tile_x_q * M*M/N) >= (ctrl_i.seq_length / N) * M ) begin - if ( ((count_q / M ) * N + tile_x_q * M ) < ctrl_i.seq_length) begin - for (int i = (ctrl_i.seq_length & (N-1)); i < N; i++) begin - requant_add_d[i] = 1'b0; - end - end else begin - requant_add_d = {N {1'b0}}; - end - end - end - end + inner_tile_dim = ctrl_i.tile_p-1; + first_outer_dim = ctrl_i.seq_length; + second_outer_dim = ctrl_i.seq_length; if (inner_tile_d == ctrl_i.tile_p) begin // end of inner tile inner_tile_d = '0; tile_d = tile_q + 1; @@ -276,22 +246,9 @@ module ita_controller end end AV : begin - if (inner_tile_q == ctrl_i.tile_s-1) begin - last_inner_tile_o = 1'b1; - if ( ( ((count_q & (M-1)) + tile_y_q * M) > ( (ctrl_i.seq_length - 1) ) ) ) begin - requant_add_d = {N {1'b0}}; - end else begin - if ( (count_q + tile_x_q * M*M/N) >= (ctrl_i.proj_space / N) * M ) begin - if ( ((count_q / M ) * N + tile_x_q * M ) < ctrl_i.proj_space) begin - for (int i = (ctrl_i.proj_space & (N-1)); i < N; i++) begin - requant_add_d[i] = 1'b0; - end - end else begin - requant_add_d = {N {1'b0}}; - end - end - end - end + inner_tile_dim = ctrl_i.tile_s-1; + first_outer_dim = ctrl_i.seq_length; + second_outer_dim = ctrl_i.proj_space; if (inner_tile_d == ctrl_i.tile_s) begin // end of inner tile inner_tile_d = '0; tile_d = tile_q + 1; @@ -320,22 +277,9 @@ module ita_controller end end OW : begin - if (inner_tile_q == ctrl_i.tile_p-1) begin - last_inner_tile_o = 1'b1; - if ( ( ((count_q & (M-1)) + tile_y_q * M) > ( (ctrl_i.seq_length - 1) ) ) ) begin - requant_add_d = {N {1'b0}}; - end else begin - if ( (count_q + tile_x_q * M*M/N) >= (ctrl_i.embed_size / N) * M ) begin - if ( ((count_q / M ) * N + tile_x_q * M ) < ctrl_i.embed_size) begin - for (int i = (ctrl_i.embed_size & (N-1)); i < N; i++) begin - requant_add_d[i] = 1'b0; - end - end else begin - requant_add_d = {N {1'b0}}; - end - end - end - end + inner_tile_dim = ctrl_i.tile_p-1; + first_outer_dim = ctrl_i.seq_length; + second_outer_dim = ctrl_i.embed_size; if (inner_tile_d == ctrl_i.tile_p) begin // end of inner tile inner_tile_d = '0; tile_d = tile_q + 1; From d993c0402ea60629dbb52a27d23c9f8befd777ab Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Wed, 16 Oct 2024 14:01:06 +0200 Subject: [PATCH 06/60] Started with the bias padding not finished yet --- src/ita.sv | 6 ++++-- src/ita_controller.sv | 26 ++++++++++++++++++-------- 2 files changed, 22 insertions(+), 10 deletions(-) diff --git a/src/ita.sv b/src/ita.sv index ceb302d..0cee47e 100644 --- a/src/ita.sv +++ b/src/ita.sv @@ -40,7 +40,7 @@ module ita logic weight_valid, weight_ready; inp_t inp, inp_stream_soft; weight_t inp1, inp1_q, inp2, inp2_q; - bias_t inp_bias, inp_bias_q1, inp_bias_q2; + bias_t inp_bias, inp_bias_padded, inp_bias_q1, inp_bias_q2; oup_t oup, oup_q, accumulator_oup; requant_const_t requant_mult, requant_shift, activation_requant_mult, activation_requant_shift; requant_oup_t requant_oup; @@ -162,7 +162,7 @@ module ita oup_q <= oup; end if (calc_en_q1) begin - inp_bias_q1 <= inp_bias; + inp_bias_q1 <= inp_bias_padded; inp1_q <= inp1; inp2_q <= inp2; end @@ -201,6 +201,8 @@ module ita .inner_tile_o (inner_tile ), .requant_add_i (requant_add ), .requant_add_o (requant_add_o ), + .inp_bias_pad_i (inp_bias ), + .inp_bias_pad_o (inp_bias_padded ), .busy_o (busy_o ) ); diff --git a/src/ita_controller.sv b/src/ita_controller.sv index fb3d534..510ea6c 100644 --- a/src/ita_controller.sv +++ b/src/ita_controller.sv @@ -31,9 +31,11 @@ module ita_controller output counter_t tile_x_o , output counter_t tile_y_o , output counter_t inner_tile_o , - input requant_t requant_add_i , + input requant_t requant_add_i , output requant_oup_t requant_add_o , - output logic busy_o + input bias_t inp_bias_pad_i , + output bias_t inp_bias_pad_o , + output logic busy_o ); step_e step_d, step_q; @@ -46,17 +48,21 @@ module ita_controller ongoing_t ongoing_d, ongoing_q; ongoing_soft_t ongoing_soft_d, ongoing_soft_q; + bias_t inp_bias_padded; + tile_t inner_tile_dim; logic [WO-WI*2-2:0] first_outer_dim, second_outer_dim; logic softmax_fifo, softmax_div, softmax_div_done_d, softmax_div_done_q, busy_d, busy_q; requant_oup_t requant_add_d, requant_add_q; - assign step_o = step_q; - assign busy_o = busy_q; - assign tile_x_o = tile_x_q; - assign tile_y_o = tile_y_q; - assign inner_tile_o = inner_tile_q; + assign step_o = step_q; + assign busy_o = busy_q; + assign tile_x_o = tile_x_q; + assign tile_y_o = tile_y_q; + assign inner_tile_o = inner_tile_q; + assign requant_add_o = requant_add_q; + assign inp_bias_pad_o = inp_bias_padded; always_comb begin count_d = count_q; @@ -76,7 +82,8 @@ module ita_controller softmax_tile_d = softmax_tile_q; softmax_div_done_d = softmax_div_done_q; requant_add_d = {N {requant_add_i}}; - requant_add_o = requant_add_q; + inp_bias_padded = inp_bias_pad_i; + busy_d = busy_q; softmax_fifo = 1'b0; @@ -97,14 +104,17 @@ module ita_controller last_inner_tile_o = 1'b1; if ( ( ((count_q & (M-1)) + tile_y_q * M) > ( (first_outer_dim - 1) ) ) ) begin requant_add_d = {N {1'b0}}; + inp_bias_padded = {N {1'b0}}; end else begin if ( (count_q + tile_x_q * M*M/N) >= (second_outer_dim / N) * M ) begin if ( ((count_q / M ) * N + tile_x_q * M ) < second_outer_dim) begin for (int i = (second_outer_dim & (N-1)); i < N; i++) begin requant_add_d[i] = 1'b0; + inp_bias_padded[i] = 1'b0; end end else begin requant_add_d = {N {1'b0}}; + inp_bias_padded = {N {1'b0}}; end end end From 267850e7df53b6259cebb633a3efd8c3125c3021 Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Sun, 20 Oct 2024 15:20:54 +0200 Subject: [PATCH 07/60] Bias padding solution with exactly 8 errors for each phase --- PyITA/ITA.py | 8 +- PyITA/debug.py | 2 +- modelsim/sim_ita_tb_wave.tcl | 2 + modelsim/sim_ita_tb_wave_makant.tcl | 235 ++++++++++++++++++++++++++++ src/ita.sv | 9 +- src/ita_controller.sv | 29 ++-- 6 files changed, 269 insertions(+), 16 deletions(-) create mode 100644 modelsim/sim_ita_tb_wave_makant.tcl diff --git a/PyITA/ITA.py b/PyITA/ITA.py index 19ff5a0..d6fa0ca 100644 --- a/PyITA/ITA.py +++ b/PyITA/ITA.py @@ -22,6 +22,9 @@ import numpy as np from numpy.typing import ArrayLike, DTypeLike +import seaborn as sns +import matplotlib.pyplot as plt + from .softmax import fastSoftmax, realSoftmax, streamingPartialSoftmax from .gelu import gelu_requantize, i_gelu_requantized, get_i_gelu_constants, get_i_gelu_requantized_constants from .util import (generate_matrix_mem, pack_8b_to_word, pack_array_8b_to_word, pack_hex_24b, pack_multihead_8b_to_word, @@ -518,7 +521,10 @@ def step1_Qp(self): self.Qp = np.clip(self.Qp, -2**(self.WO - 1), 2**(self.WO - 1) - 1) self.Qp_requant = requantize(self.Qp, self.requant_eps_mult[0], self.requant_right_shift[0], self.requant_add[0]) - + print(self.Qp[0][0][16:32]) + sns.set_theme() + sns.heatmap(self.Qp[0], annot=False, linewidths=0, linecolor='white', cmap='crest', xticklabels=False, yticklabels=False) + plt.show() # Set padded values to zero if (self.S_ITA - self.S) > 0: self.Qp_requant[:, -(self.S_ITA - self.S):, :] = 0 diff --git a/PyITA/debug.py b/PyITA/debug.py index 80d1e02..3cb9d7a 100644 --- a/PyITA/debug.py +++ b/PyITA/debug.py @@ -8,7 +8,7 @@ def print_matrix(from_txt: bool, cut: bool = False, matrix: np.array = None, txt_file: str = 'Qp_0.txt', - test_vector: str = 'data_S32_E32_P32_F64_H1_B1', + test_vector: str = 'data_S30_E64_P64_F64_H1_B1', row: int = 64, col: int = 64): if (from_txt): diff --git a/modelsim/sim_ita_tb_wave.tcl b/modelsim/sim_ita_tb_wave.tcl index ded354f..a1e1697 100644 --- a/modelsim/sim_ita_tb_wave.tcl +++ b/modelsim/sim_ita_tb_wave.tcl @@ -12,6 +12,8 @@ add wave -noupdate /ita_tb/dut/i_inp2_mux/weight_i add wave -noupdate /ita_tb/dut/i_inp2_mux/inp2_o add wave -noupdate /ita_tb/dut/i_controller/ctrl_i add wave -noupdate /ita_tb/dut/oup_o +add wave -noupdate /ita_tb/dut/inp1_q +add wave -noupdate /ita_tb/dut/inp2_q add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/* add wave -expand -group Controller /ita_tb/dut/i_controller/* add wave -group {Softmax Controller} ita_tb/dut/i_softmax_top/i_softmax/* diff --git a/modelsim/sim_ita_tb_wave_makant.tcl b/modelsim/sim_ita_tb_wave_makant.tcl new file mode 100644 index 0000000..671f5e9 --- /dev/null +++ b/modelsim/sim_ita_tb_wave_makant.tcl @@ -0,0 +1,235 @@ +onerror {resume} +quietly WaveActivateNextPane {} 0 +add wave -noupdate /ita_tb/dut/i_inp1_mux/clk_i +add wave -noupdate /ita_tb/dut/i_inp1_mux/rst_ni +add wave -noupdate /ita_tb/dut/i_inp1_mux/inp_i +add wave -noupdate /ita_tb/dut/i_inp1_mux/inp1_o +add wave -noupdate /ita_tb/dut/i_inp2_mux/clk_i +add wave -noupdate /ita_tb/dut/i_inp2_mux/rst_ni +add wave -noupdate /ita_tb/dut/i_inp2_mux/weight_i +add wave -noupdate /ita_tb/dut/i_inp2_mux/inp2_o +add wave -noupdate /ita_tb/dut/i_controller/ctrl_i +add wave -noupdate /ita_tb/dut/oup_o +add wave -noupdate /ita_tb/dut/inp1_q +add wave -noupdate /ita_tb/dut/inp2_q +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/clk_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/rst_ni +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mode_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/eps_mult_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/right_shift_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_q_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/result_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_o +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mult_signed +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/product +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_added +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_d +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_q +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q1 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q2 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q3 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q4 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_d +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/clk_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/rst_ni +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ctrl_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_ready_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_ready_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_ready_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_ready_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/pop_softmax_fifo_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/soft_addr_div_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_done_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_inner_tile_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_inner_tile_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_o +add wave -noupdate -expand -group Controller -radix unsigned /ita_tb/dut/i_controller/count_q +add wave -noupdate -expand -group Controller -radix hexadecimal /ita_tb/dut/inp_bias_q1 +add wave -noupdate -expand -group Controller -radix hexadecimal -childformat {{{/ita_tb/dut/i_controller/inp_bias_pad_i[15]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_i[14]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_i[13]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_i[12]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_i[11]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_i[10]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_i[9]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_i[8]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_i[7]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_i[6]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_i[5]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_i[4]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_i[3]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_i[2]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_i[1]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_i[0]} -radix hexadecimal}} -subitemconfig {{/ita_tb/dut/i_controller/inp_bias_pad_i[15]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_i[14]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_i[13]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_i[12]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_i[11]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_i[10]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_i[9]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_i[8]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_i[7]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_i[6]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_i[5]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_i[4]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_i[3]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_i[2]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_i[1]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_i[0]} {-radix hexadecimal}} /ita_tb/dut/i_controller/inp_bias_pad_i +add wave -noupdate -expand -group Controller -radix hexadecimal -childformat {{{/ita_tb/dut/i_controller/inp_bias_pad_o[15]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_o[14]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_o[13]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_o[12]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_o[11]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_o[10]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_o[9]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_o[8]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_o[7]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_o[6]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_o[5]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_o[4]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_o[3]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_o[2]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_o[1]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_o[0]} -radix hexadecimal}} -subitemconfig {{/ita_tb/dut/i_controller/inp_bias_pad_o[15]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_o[14]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_o[13]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_o[12]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_o[11]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_o[10]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_o[9]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_o[8]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_o[7]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_o[6]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_o[5]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_o[4]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_o[3]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_o[2]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_o[1]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_o[0]} {-radix hexadecimal}} /ita_tb/dut/i_controller/inp_bias_pad_o +add wave -noupdate -expand -group Controller -radix hexadecimal /ita_tb/dut/inp_bias_q2 +add wave -noupdate -expand -group Controller /ita_tb/dut/calc_en_q1 +add wave -noupdate -expand -group Controller /ita_tb/dut/calc_en_q2 +add wave -noupdate -expand -group Controller /ita_tb/dut/calc_en_q3 +add wave -noupdate -expand -group Controller /ita_tb/dut/calc_en_q4 +add wave -noupdate -expand -group Controller /ita_tb/dut/calc_en_q5 +add wave -noupdate -expand -group Controller /ita_tb/dut/calc_en_q6 +add wave -noupdate -expand -group Controller /ita_tb/dut/calc_en_q7 +add wave -noupdate -expand -group Controller /ita_tb/dut/calc_en_q8 +add wave -noupdate -expand -group Controller /ita_tb/dut/calc_en_q9 +add wave -noupdate -expand -group Controller /ita_tb/dut/calc_en_q10 +add wave -noupdate -expand -group Controller /ita_tb/dut/last_inner_tile_q10 +add wave -noupdate -expand -group Controller -radix hexadecimal /ita_tb/dut/oup_o +add wave -noupdate -expand -group Controller /ita_tb/dut/valid_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_q +add wave -noupdate -expand -group Controller -radix unsigned /ita_tb/dut/i_controller/count_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_padded +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_dim +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_fifo +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/clk_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/rst_ni +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/ctrl_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/step_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/soft_addr_div_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/softmax_done_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_softmax_fifo_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_inp_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_oup_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_data_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_data_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/prev_max_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_data_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_data_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_x_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q3 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q4 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q3 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q4 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_diff +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_diff +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp_diff +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q3 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_full +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_empty +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/push_to_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_from_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_to_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_from_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_usage +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_row +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_col +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/clk_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/rst_ni +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_q_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_q_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_q_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/oup_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/inp_bias_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_o +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_en +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data_unused +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_en +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_data +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_d +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_q +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_d +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_q +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_d +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_q +TreeUpdate [SetDefaultTree] +WaveRestoreCursors {{Cursor 1} {414600 ps} 1} {{Cursor 2} {550600 ps} 1} {{Cursor 4} {400994 ps} 0} +quietly wave cursor active 1 +configure wave -namecolwidth 150 +configure wave -valuecolwidth 100 +configure wave -justifyvalue left +configure wave -signalnamewidth 1 +configure wave -snapdistance 10 +configure wave -datasetprefix 0 +configure wave -rowmargin 4 +configure wave -childrowmargin 2 +configure wave -gridoffset 0 +configure wave -gridperiod 1 +configure wave -griddelta 40 +configure wave -timeline 0 +configure wave -timelineunits ns +update +WaveRestoreZoom {394011 ps} {422576 ps} diff --git a/src/ita.sv b/src/ita.sv index 0cee47e..41120c0 100644 --- a/src/ita.sv +++ b/src/ita.sv @@ -40,7 +40,7 @@ module ita logic weight_valid, weight_ready; inp_t inp, inp_stream_soft; weight_t inp1, inp1_q, inp2, inp2_q; - bias_t inp_bias, inp_bias_padded, inp_bias_q1, inp_bias_q2; + bias_t inp_bias, inp_bias_pad_q1, inp_bias_q2; oup_t oup, oup_q, accumulator_oup; requant_const_t requant_mult, requant_shift, activation_requant_mult, activation_requant_shift; requant_oup_t requant_oup; @@ -154,15 +154,13 @@ module ita inp1_q <= '0; inp2_q <= '0; inp_bias_q2 <= '0; - inp_bias_q1 <= '0; oup_q <= '0; end else begin if (calc_en_q2) begin - inp_bias_q2 <= inp_bias_q1; + inp_bias_q2 <= inp_bias_pad_q1; oup_q <= oup; end if (calc_en_q1) begin - inp_bias_q1 <= inp_bias_padded; inp1_q <= inp1; inp2_q <= inp2; end @@ -202,7 +200,8 @@ module ita .requant_add_i (requant_add ), .requant_add_o (requant_add_o ), .inp_bias_pad_i (inp_bias ), - .inp_bias_pad_o (inp_bias_padded ), + .inp_bias_pad_o (inp_bias_pad_q1 ), + .calc_en_q1_i (calc_en_q1 ), .busy_o (busy_o ) ); diff --git a/src/ita_controller.sv b/src/ita_controller.sv index 510ea6c..5f05dea 100644 --- a/src/ita_controller.sv +++ b/src/ita_controller.sv @@ -35,6 +35,7 @@ module ita_controller output requant_oup_t requant_add_o , input bias_t inp_bias_pad_i , output bias_t inp_bias_pad_o , + input logic calc_en_q1_i , output logic busy_o ); @@ -48,7 +49,7 @@ module ita_controller ongoing_t ongoing_d, ongoing_q; ongoing_soft_t ongoing_soft_d, ongoing_soft_q; - bias_t inp_bias_padded; + bias_t inp_bias_pad_d, inp_bias_pad_q; tile_t inner_tile_dim; logic [WO-WI*2-2:0] first_outer_dim, second_outer_dim; @@ -62,7 +63,7 @@ module ita_controller assign tile_y_o = tile_y_q; assign inner_tile_o = inner_tile_q; assign requant_add_o = requant_add_q; - assign inp_bias_pad_o = inp_bias_padded; + assign inp_bias_pad_o = inp_bias_pad_q; always_comb begin count_d = count_q; @@ -82,7 +83,7 @@ module ita_controller softmax_tile_d = softmax_tile_q; softmax_div_done_d = softmax_div_done_q; requant_add_d = {N {requant_add_i}}; - inp_bias_padded = inp_bias_pad_i; + inp_bias_pad_d = inp_bias_pad_i; busy_d = busy_q; @@ -99,22 +100,22 @@ module ita_controller busy_d = 1'b1; end - if (step_q != Idle && step_q != F1 && step_q != F2 && step_q != MatMul) begin + if (step_q != Idle && step_q != MatMul) begin if (inner_tile_q == inner_tile_dim) begin last_inner_tile_o = 1'b1; - if ( ( ((count_q & (M-1)) + tile_y_q * M) > ( (first_outer_dim - 1) ) ) ) begin + if ( ( (((count_q & (M-1)) + tile_y_q * M)) > ( (first_outer_dim - 1) ) ) ) begin requant_add_d = {N {1'b0}}; - inp_bias_padded = {N {1'b0}}; + inp_bias_pad_d = {N {1'b0}}; end else begin if ( (count_q + tile_x_q * M*M/N) >= (second_outer_dim / N) * M ) begin - if ( ((count_q / M ) * N + tile_x_q * M ) < second_outer_dim) begin + if ( ((count_q / M) * N + tile_x_q * M ) < second_outer_dim) begin for (int i = (second_outer_dim & (N-1)); i < N; i++) begin requant_add_d[i] = 1'b0; - inp_bias_padded[i] = 1'b0; + inp_bias_pad_d[i] = 1'b0; end end else begin requant_add_d = {N {1'b0}}; - inp_bias_padded = {N {1'b0}}; + inp_bias_pad_d = {N {1'b0}}; end end end @@ -309,6 +310,9 @@ module ita_controller end // Feedforward F1: begin + inner_tile_dim = ctrl_i.tile_e-1; + first_outer_dim = ctrl_i.seq_length; + second_outer_dim = ctrl_i.embed_size; if (inner_tile_q == ctrl_i.tile_e-1) begin last_inner_tile_o = 1'b1; end @@ -322,6 +326,9 @@ module ita_controller end end F2: begin + inner_tile_dim = ctrl_i.tile_e-1; + first_outer_dim = ctrl_i.seq_length; + second_outer_dim = ctrl_i.embed_size; if (inner_tile_q == ctrl_i.tile_f-1) begin last_inner_tile_o = 1'b1; end @@ -376,6 +383,7 @@ module ita_controller ongoing_soft_q <= '0; softmax_div_done_q <= 1'b0; requant_add_q <= '0; + inp_bias_pad_q <= '0; busy_q <= 1'b0; end else begin step_q <= step_d; @@ -389,6 +397,9 @@ module ita_controller ongoing_soft_q <= ongoing_soft_d; softmax_div_done_q <= softmax_div_done_d; requant_add_q <= requant_add_d; + if (calc_en_q1_i) begin + inp_bias_pad_q <= inp_bias_pad_d; + end busy_q <= busy_d; end end From 85348502465df90a15772f9ba397a374429dc11c Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Mon, 21 Oct 2024 10:43:12 +0200 Subject: [PATCH 08/60] Added additional buffer for bias values --- PyITA/ITA.py | 5 +++++ src/ita.sv | 8 ++++++-- 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/PyITA/ITA.py b/PyITA/ITA.py index d6fa0ca..04a3979 100644 --- a/PyITA/ITA.py +++ b/PyITA/ITA.py @@ -178,6 +178,11 @@ def _initialize_tensors(self, Q, V, Wq, Wk, Wv, Wo, Bq, Bk, Bv, Bo, FF_in, Wff, self.Bq_broadcast = np.reshape(np.repeat(self.Bq, self.S, axis = 0), (self.H, self.S, self.P_ITA)) self.Bq_broadcast = np.pad(self.Bq_broadcast, ((0, 0), (0, self.S_ITA - self.S), (0, 0))) + print(self.Bq_broadcast[0][0][16:32]) + sns.set_theme() + sns.heatmap(self.Bq_broadcast[0], annot=False, linewidths=0, linecolor='white', cmap='crest', xticklabels=False, yticklabels=False) + plt.show() + if self.bias: self.Bk_in = random_shuffled_tensor( (self.H, self.P), int(np.log2(self.P)) + 8, type = np.int32) if Bk is None else Bk diff --git a/src/ita.sv b/src/ita.sv index 41120c0..000658a 100644 --- a/src/ita.sv +++ b/src/ita.sv @@ -40,7 +40,7 @@ module ita logic weight_valid, weight_ready; inp_t inp, inp_stream_soft; weight_t inp1, inp1_q, inp2, inp2_q; - bias_t inp_bias, inp_bias_pad_q1, inp_bias_q2; + bias_t inp_bias, inp_bias_pad_q1, inp_bias_q2, inp_bias_q3; oup_t oup, oup_q, accumulator_oup; requant_const_t requant_mult, requant_shift, activation_requant_mult, activation_requant_shift; requant_oup_t requant_oup; @@ -155,7 +155,11 @@ module ita inp2_q <= '0; inp_bias_q2 <= '0; oup_q <= '0; + inp_bias_q3 <= '0; end else begin + if (calc_en_q3) begin + inp_bias_q3 <= inp_bias_q2; + end if (calc_en_q2) begin inp_bias_q2 <= inp_bias_pad_q1; oup_q <= oup; @@ -251,7 +255,7 @@ module ita .last_tile_q_i (last_inner_tile_q3 ), .oup_i (oup_q ), - .inp_bias_i (inp_bias_q2 ), + .inp_bias_i (inp_bias_q3 ), .result_o (accumulator_oup ) ); From 08fa963c98373bbc3c103ed1a585b52945e85130 Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Mon, 21 Oct 2024 18:25:56 +0200 Subject: [PATCH 09/60] No buffering in the controller --- Makefile | 3 +- modelsim/Makefile | 2 +- modelsim/sim_ita_tb_wave_makant.tcl | 153 ++++++++++++++-------------- src/ita.sv | 17 ++-- src/ita_controller.sv | 60 +++++------ 5 files changed, 117 insertions(+), 118 deletions(-) diff --git a/Makefile b/Makefile index 3359ca7..f85f76b 100644 --- a/Makefile +++ b/Makefile @@ -12,7 +12,8 @@ BENDER_INSTALL_DIR = ${INSTALL_DIR}/bender VENV_BIN=venv/bin/ BENDER_VERSION = 0.28.1 -SIM_PATH ?= modelsim/build +SIM_FOLDER ?= build +SIM_PATH ?= modelsim/${SIM_FOLDER} SYNTH_PATH = synopsys BENDER_TARGETS = -t rtl -t test diff --git a/modelsim/Makefile b/modelsim/Makefile index 7d181aa..8aec4cf 100644 --- a/modelsim/Makefile +++ b/modelsim/Makefile @@ -6,7 +6,7 @@ all: lib build QUESTA_SEPP ?= questa-2023.4 -buildpath ?= build +buildpath ?= $(SIM_FOLDER) VOPT ?= $(QUESTA_SEPP) vopt VSIM ?= $(QUESTA_SEPP) vsim VLIB ?= $(QUESTA_SEPP) vlib diff --git a/modelsim/sim_ita_tb_wave_makant.tcl b/modelsim/sim_ita_tb_wave_makant.tcl index 671f5e9..d79b638 100644 --- a/modelsim/sim_ita_tb_wave_makant.tcl +++ b/modelsim/sim_ita_tb_wave_makant.tcl @@ -4,14 +4,30 @@ add wave -noupdate /ita_tb/dut/i_inp1_mux/clk_i add wave -noupdate /ita_tb/dut/i_inp1_mux/rst_ni add wave -noupdate /ita_tb/dut/i_inp1_mux/inp_i add wave -noupdate /ita_tb/dut/i_inp1_mux/inp1_o -add wave -noupdate /ita_tb/dut/i_inp2_mux/clk_i add wave -noupdate /ita_tb/dut/i_inp2_mux/rst_ni add wave -noupdate /ita_tb/dut/i_inp2_mux/weight_i add wave -noupdate /ita_tb/dut/i_inp2_mux/inp2_o add wave -noupdate /ita_tb/dut/i_controller/ctrl_i -add wave -noupdate /ita_tb/dut/oup_o add wave -noupdate /ita_tb/dut/inp1_q add wave -noupdate /ita_tb/dut/inp2_q +add wave -noupdate /ita_tb/dut/oup_o +add wave -noupdate /ita_tb/dut/inp_bias +add wave -noupdate /ita_tb/dut/inp_bias_pad_q1 +add wave -noupdate /ita_tb/dut/inp_bias_q2 +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/count_d +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/count_q +add wave -noupdate /ita_tb/dut/i_inp2_mux/clk_i +add wave -noupdate -expand -group Calc_en /ita_tb/dut/calc_en +add wave -noupdate -expand -group Calc_en /ita_tb/dut/calc_en_q1 +add wave -noupdate -expand -group Calc_en /ita_tb/dut/calc_en_q2 +add wave -noupdate -expand -group Calc_en /ita_tb/dut/calc_en_q3 +add wave -noupdate -expand -group Calc_en /ita_tb/dut/calc_en_q4 +add wave -noupdate -expand -group Calc_en /ita_tb/dut/calc_en_q5 +add wave -noupdate -expand -group Calc_en /ita_tb/dut/calc_en_q6 +add wave -noupdate -expand -group Calc_en /ita_tb/dut/calc_en_q7 +add wave -noupdate -expand -group Calc_en /ita_tb/dut/calc_en_q8 +add wave -noupdate -expand -group Calc_en /ita_tb/dut/calc_en_q9 +add wave -noupdate -expand -group Calc_en /ita_tb/dut/calc_en_q10 add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/clk_i add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/rst_ni add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mode_i @@ -33,77 +49,62 @@ add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q3 add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q4 add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_d add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/clk_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/rst_ni -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ctrl_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_ready_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_ready_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_ready_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_ready_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/pop_softmax_fifo_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/soft_addr_div_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_done_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_inner_tile_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_inner_tile_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_o -add wave -noupdate -expand -group Controller -radix unsigned /ita_tb/dut/i_controller/count_q -add wave -noupdate -expand -group Controller -radix hexadecimal /ita_tb/dut/inp_bias_q1 -add wave -noupdate -expand -group Controller -radix hexadecimal -childformat {{{/ita_tb/dut/i_controller/inp_bias_pad_i[15]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_i[14]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_i[13]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_i[12]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_i[11]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_i[10]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_i[9]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_i[8]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_i[7]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_i[6]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_i[5]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_i[4]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_i[3]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_i[2]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_i[1]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_i[0]} -radix hexadecimal}} -subitemconfig {{/ita_tb/dut/i_controller/inp_bias_pad_i[15]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_i[14]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_i[13]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_i[12]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_i[11]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_i[10]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_i[9]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_i[8]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_i[7]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_i[6]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_i[5]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_i[4]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_i[3]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_i[2]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_i[1]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_i[0]} {-radix hexadecimal}} /ita_tb/dut/i_controller/inp_bias_pad_i -add wave -noupdate -expand -group Controller -radix hexadecimal -childformat {{{/ita_tb/dut/i_controller/inp_bias_pad_o[15]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_o[14]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_o[13]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_o[12]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_o[11]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_o[10]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_o[9]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_o[8]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_o[7]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_o[6]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_o[5]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_o[4]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_o[3]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_o[2]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_o[1]} -radix hexadecimal} {{/ita_tb/dut/i_controller/inp_bias_pad_o[0]} -radix hexadecimal}} -subitemconfig {{/ita_tb/dut/i_controller/inp_bias_pad_o[15]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_o[14]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_o[13]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_o[12]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_o[11]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_o[10]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_o[9]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_o[8]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_o[7]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_o[6]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_o[5]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_o[4]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_o[3]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_o[2]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_o[1]} {-radix hexadecimal} {/ita_tb/dut/i_controller/inp_bias_pad_o[0]} {-radix hexadecimal}} /ita_tb/dut/i_controller/inp_bias_pad_o -add wave -noupdate -expand -group Controller -radix hexadecimal /ita_tb/dut/inp_bias_q2 -add wave -noupdate -expand -group Controller /ita_tb/dut/calc_en_q1 -add wave -noupdate -expand -group Controller /ita_tb/dut/calc_en_q2 -add wave -noupdate -expand -group Controller /ita_tb/dut/calc_en_q3 -add wave -noupdate -expand -group Controller /ita_tb/dut/calc_en_q4 -add wave -noupdate -expand -group Controller /ita_tb/dut/calc_en_q5 -add wave -noupdate -expand -group Controller /ita_tb/dut/calc_en_q6 -add wave -noupdate -expand -group Controller /ita_tb/dut/calc_en_q7 -add wave -noupdate -expand -group Controller /ita_tb/dut/calc_en_q8 -add wave -noupdate -expand -group Controller /ita_tb/dut/calc_en_q9 -add wave -noupdate -expand -group Controller /ita_tb/dut/calc_en_q10 -add wave -noupdate -expand -group Controller /ita_tb/dut/last_inner_tile_q10 -add wave -noupdate -expand -group Controller -radix hexadecimal /ita_tb/dut/oup_o -add wave -noupdate -expand -group Controller /ita_tb/dut/valid_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_q -add wave -noupdate -expand -group Controller -radix unsigned /ita_tb/dut/i_controller/count_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_padded -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_dim -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_fifo -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/clk_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/rst_ni +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ctrl_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_valid_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_ready_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/weight_valid_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/weight_ready_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_valid_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_ready_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/oup_valid_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/oup_ready_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/pop_softmax_fifo_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/soft_addr_div_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_done_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/calc_en_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_inner_tile_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/last_inner_tile_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_pad_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_pad_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/calc_en_q1_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_tile_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_tile_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_soft_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_soft_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_pad_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_pad_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_dim +add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_outer_dim +add wave -noupdate -group Controller /ita_tb/dut/i_controller/second_outer_dim +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_fifo +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div_done_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div_done_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_q add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/clk_i add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/rst_ni add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/ctrl_i @@ -216,8 +217,8 @@ add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_q add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_d add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_q TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {414600 ps} 1} {{Cursor 2} {550600 ps} 1} {{Cursor 4} {400994 ps} 0} -quietly wave cursor active 1 +WaveRestoreCursors {{Wrong Output} {2784600 ps} 1} {{Start of Calc} {2775007 ps} 1} {{Calc finish} {2783000 ps} 1} {{Cursor 4} {2783576 ps} 0} +quietly wave cursor active 4 configure wave -namecolwidth 150 configure wave -valuecolwidth 100 configure wave -justifyvalue left @@ -232,4 +233,4 @@ configure wave -griddelta 40 configure wave -timeline 0 configure wave -timelineunits ns update -WaveRestoreZoom {394011 ps} {422576 ps} +WaveRestoreZoom {2768202 ps} {2794772 ps} diff --git a/src/ita.sv b/src/ita.sv index 000658a..6a9c1a2 100644 --- a/src/ita.sv +++ b/src/ita.sv @@ -40,7 +40,7 @@ module ita logic weight_valid, weight_ready; inp_t inp, inp_stream_soft; weight_t inp1, inp1_q, inp2, inp2_q; - bias_t inp_bias, inp_bias_pad_q1, inp_bias_q2, inp_bias_q3; + bias_t inp_bias, inp_bias_padded, inp_bias_q1, inp_bias_q2; oup_t oup, oup_q, accumulator_oup; requant_const_t requant_mult, requant_shift, activation_requant_mult, activation_requant_shift; requant_oup_t requant_oup; @@ -153,18 +153,16 @@ module ita if (!rst_ni) begin inp1_q <= '0; inp2_q <= '0; + inp_bias_q1 <= '0; inp_bias_q2 <= '0; oup_q <= '0; - inp_bias_q3 <= '0; end else begin - if (calc_en_q3) begin - inp_bias_q3 <= inp_bias_q2; - end if (calc_en_q2) begin - inp_bias_q2 <= inp_bias_pad_q1; + inp_bias_q2 <= inp_bias_q1; oup_q <= oup; end if (calc_en_q1) begin + inp_bias_q1 <= inp_bias_padded; inp1_q <= inp1; inp2_q <= inp2; end @@ -203,9 +201,8 @@ module ita .inner_tile_o (inner_tile ), .requant_add_i (requant_add ), .requant_add_o (requant_add_o ), - .inp_bias_pad_i (inp_bias ), - .inp_bias_pad_o (inp_bias_pad_q1 ), - .calc_en_q1_i (calc_en_q1 ), + .inp_bias_i (inp_bias ), + .inp_bias_pad_o (inp_bias_padded ), .busy_o (busy_o ) ); @@ -255,7 +252,7 @@ module ita .last_tile_q_i (last_inner_tile_q3 ), .oup_i (oup_q ), - .inp_bias_i (inp_bias_q3 ), + .inp_bias_i (inp_bias_q2 ), .result_o (accumulator_oup ) ); diff --git a/src/ita_controller.sv b/src/ita_controller.sv index 5f05dea..de9e834 100644 --- a/src/ita_controller.sv +++ b/src/ita_controller.sv @@ -33,9 +33,8 @@ module ita_controller output counter_t inner_tile_o , input requant_t requant_add_i , output requant_oup_t requant_add_o , - input bias_t inp_bias_pad_i , + input bias_t inp_bias_i , output bias_t inp_bias_pad_o , - input logic calc_en_q1_i , output logic busy_o ); @@ -49,7 +48,7 @@ module ita_controller ongoing_t ongoing_d, ongoing_q; ongoing_soft_t ongoing_soft_d, ongoing_soft_q; - bias_t inp_bias_pad_d, inp_bias_pad_q; + bias_t inp_bias, inp_bias_padded; tile_t inner_tile_dim; logic [WO-WI*2-2:0] first_outer_dim, second_outer_dim; @@ -63,7 +62,7 @@ module ita_controller assign tile_y_o = tile_y_q; assign inner_tile_o = inner_tile_q; assign requant_add_o = requant_add_q; - assign inp_bias_pad_o = inp_bias_pad_q; + assign inp_bias_pad_o = inp_bias_padded; always_comb begin count_d = count_q; @@ -83,7 +82,7 @@ module ita_controller softmax_tile_d = softmax_tile_q; softmax_div_done_d = softmax_div_done_q; requant_add_d = {N {requant_add_i}}; - inp_bias_pad_d = inp_bias_pad_i; + inp_bias = inp_bias_i; busy_d = busy_q; @@ -100,27 +99,7 @@ module ita_controller busy_d = 1'b1; end - if (step_q != Idle && step_q != MatMul) begin - if (inner_tile_q == inner_tile_dim) begin - last_inner_tile_o = 1'b1; - if ( ( (((count_q & (M-1)) + tile_y_q * M)) > ( (first_outer_dim - 1) ) ) ) begin - requant_add_d = {N {1'b0}}; - inp_bias_pad_d = {N {1'b0}}; - end else begin - if ( (count_q + tile_x_q * M*M/N) >= (second_outer_dim / N) * M ) begin - if ( ((count_q / M) * N + tile_x_q * M ) < second_outer_dim) begin - for (int i = (second_outer_dim & (N-1)); i < N; i++) begin - requant_add_d[i] = 1'b0; - inp_bias_pad_d[i] = 1'b0; - end - end else begin - requant_add_d = {N {1'b0}}; - inp_bias_pad_d = {N {1'b0}}; - end - end - end - end - end + // default handshake if (step_q != Idle) begin @@ -356,6 +335,31 @@ module ita_controller end end endcase + + if (step_q != Idle && step_q != MatMul) begin + if (inner_tile_q == inner_tile_dim) begin + last_inner_tile_o = 1'b1; + if ( ( (((count_q & (M-1)) + tile_y_q * M)) > ( (first_outer_dim - 1) ) ) ) begin + requant_add_d = {N {1'b0}}; + inp_bias = {N {1'b0}}; + end else begin + if ( (count_q + tile_x_q * M*M/N) >= (second_outer_dim / N) * M ) begin + if ( ((count_q / M) * N + tile_x_q * M ) < second_outer_dim) begin + for (int i = (second_outer_dim & (N-1)); i < N; i++) begin + requant_add_d[i] = 1'b0; + inp_bias[i] = 1'b0; + end + end else begin + requant_add_d = {N {1'b0}}; + inp_bias = {N {1'b0}}; + end + end + end + end + end + + inp_bias_padded = inp_bias; + if (inp_valid_i && inp_ready_o && oup_valid_i && oup_ready_i && last_inner_tile_o) begin ongoing_d = ongoing_q; end else if (inp_valid_i && inp_ready_o && last_inner_tile_o) begin @@ -383,7 +387,6 @@ module ita_controller ongoing_soft_q <= '0; softmax_div_done_q <= 1'b0; requant_add_q <= '0; - inp_bias_pad_q <= '0; busy_q <= 1'b0; end else begin step_q <= step_d; @@ -397,9 +400,6 @@ module ita_controller ongoing_soft_q <= ongoing_soft_d; softmax_div_done_q <= softmax_div_done_d; requant_add_q <= requant_add_d; - if (calc_en_q1_i) begin - inp_bias_pad_q <= inp_bias_pad_d; - end busy_q <= busy_d; end end From abf4d184d6cf4d86dab97efa7985c65022b69829 Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Wed, 23 Oct 2024 15:31:21 +0200 Subject: [PATCH 10/60] Changed count_q foto (count_q-1) for the bias padding --- modelsim/sim_ita_tb_wave_important.tcl | 237 +++++++++++++++++++++++++ src/ita_controller.sv | 18 +- 2 files changed, 253 insertions(+), 2 deletions(-) create mode 100644 modelsim/sim_ita_tb_wave_important.tcl diff --git a/modelsim/sim_ita_tb_wave_important.tcl b/modelsim/sim_ita_tb_wave_important.tcl new file mode 100644 index 0000000..7ddab73 --- /dev/null +++ b/modelsim/sim_ita_tb_wave_important.tcl @@ -0,0 +1,237 @@ +onerror {resume} +quietly WaveActivateNextPane {} 0 +add wave -noupdate /ita_tb/dut/i_inp1_mux/clk_i +add wave -noupdate /ita_tb/dut/i_inp1_mux/rst_ni +add wave -noupdate /ita_tb/dut/i_inp1_mux/inp_i +add wave -noupdate /ita_tb/dut/i_inp1_mux/inp1_o +add wave -noupdate /ita_tb/dut/i_inp2_mux/rst_ni +add wave -noupdate /ita_tb/dut/i_inp2_mux/weight_i +add wave -noupdate /ita_tb/dut/i_inp2_mux/inp2_o +add wave -noupdate /ita_tb/dut/i_controller/ctrl_i +add wave -noupdate /ita_tb/dut/inp1_q +add wave -noupdate /ita_tb/dut/inp2_q +add wave -noupdate /ita_tb/dut/i_inp2_mux/clk_i +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/count_d +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/count_q +add wave -noupdate /ita_tb/dut/calc_en +add wave -noupdate /ita_tb/dut/calc_en_q1 +add wave -noupdate /ita_tb/dut/calc_en_q2 +add wave -noupdate /ita_tb/dut/calc_en_q3 +add wave -noupdate -expand -group Bias /ita_tb/dut/inp_bias +add wave -noupdate -expand -group Bias /ita_tb/dut/inp_bias_padded +add wave -noupdate -expand -group Bias /ita_tb/dut/inp_bias_q1 +add wave -noupdate -expand -group Bias /ita_tb/dut/inp_bias_q2 +add wave -noupdate /ita_tb/dut/i_accumulator/oup_i +add wave -noupdate /ita_tb/dut/i_accumulator/result_d +add wave -noupdate /ita_tb/dut/i_accumulator/result_o +add wave -noupdate /ita_tb/dut/i_requantizer/requant_oup_o +add wave -noupdate /ita_tb/dut/i_activation/data_i +add wave -noupdate /ita_tb/dut/i_activation/data_q1 +add wave -noupdate /ita_tb/dut/i_activation/data_q2 +add wave -noupdate /ita_tb/dut/i_activation/data_q3 +add wave -noupdate /ita_tb/dut/i_activation/data_q4 +add wave -noupdate /ita_tb/dut/i_activation/data_o +add wave -noupdate /ita_tb/dut/i_fifo/data_i +add wave -noupdate /ita_tb/dut/i_fifo/data_o +add wave -noupdate /ita_tb/dut/oup_o +add wave -noupdate -expand -group Softmax /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/clk_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/rst_ni +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mode_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/eps_mult_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/right_shift_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_q_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mult_signed +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/product +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_added +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_d +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_q +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q1 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q2 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q3 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q4 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_d +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_q +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/clk_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/rst_ni +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ctrl_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_valid_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_ready_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/weight_valid_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/weight_ready_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_valid_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_ready_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/oup_valid_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/oup_ready_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/pop_softmax_fifo_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/soft_addr_div_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_done_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/calc_en_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_inner_tile_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/last_inner_tile_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_pad_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_tile_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_tile_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_soft_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_soft_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_padded +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_dim +add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_outer_dim +add wave -noupdate -group Controller /ita_tb/dut/i_controller/second_outer_dim +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_fifo +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div_done_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div_done_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/clk_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/rst_ni +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/ctrl_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/step_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/soft_addr_div_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/softmax_done_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_softmax_fifo_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_inp_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_oup_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_data_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_data_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/prev_max_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_data_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_data_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_x_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q3 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q4 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q3 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q4 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_diff +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_diff +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp_diff +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q3 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_full +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_empty +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/push_to_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_from_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_to_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_from_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_usage +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_row +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_col +add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/clk_i +add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/rst_ni +add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/calc_en_i +add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/calc_en_q_i +add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/first_tile_i +add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/first_tile_q_i +add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/last_tile_i +add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/last_tile_q_i +add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/inp_bias_i +add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/read_en +add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/read_addr +add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/read_data +add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/read_data_unused +add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/write_en +add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/write_addr +add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/write_data +add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/read_addr_d +add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/read_addr_q +add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/write_addr_d +add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/write_addr_q +add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/result_q +TreeUpdate [SetDefaultTree] +WaveRestoreCursors {{Cursor 1} {414600 ps} 1} {{Cursor 2} {550600 ps} 1} {{Cursor 3} {710600 ps} 1} {{Cursor 4} {390540 ps} 0} +quietly wave cursor active 4 +configure wave -namecolwidth 176 +configure wave -valuecolwidth 100 +configure wave -justifyvalue left +configure wave -signalnamewidth 1 +configure wave -snapdistance 10 +configure wave -datasetprefix 0 +configure wave -rowmargin 4 +configure wave -childrowmargin 2 +configure wave -gridoffset 0 +configure wave -gridperiod 1 +configure wave -griddelta 40 +configure wave -timeline 0 +configure wave -timelineunits ns +update +WaveRestoreZoom {371422 ps} {416865 ps} diff --git a/src/ita_controller.sv b/src/ita_controller.sv index de9e834..c042ac1 100644 --- a/src/ita_controller.sv +++ b/src/ita_controller.sv @@ -341,16 +341,30 @@ module ita_controller last_inner_tile_o = 1'b1; if ( ( (((count_q & (M-1)) + tile_y_q * M)) > ( (first_outer_dim - 1) ) ) ) begin requant_add_d = {N {1'b0}}; - inp_bias = {N {1'b0}}; + //inp_bias = {N {1'b0}}; end else begin if ( (count_q + tile_x_q * M*M/N) >= (second_outer_dim / N) * M ) begin if ( ((count_q / M) * N + tile_x_q * M ) < second_outer_dim) begin for (int i = (second_outer_dim & (N-1)); i < N; i++) begin requant_add_d[i] = 1'b0; - inp_bias[i] = 1'b0; + //inp_bias[i] = 1'b0; end end else begin requant_add_d = {N {1'b0}}; + //inp_bias = {N {1'b0}}; + end + end + end + + if ( ( ((((count_q-1) & (M-1)) + tile_y_q * M)) > ( (first_outer_dim - 1) ) ) ) begin + inp_bias = {N {1'b0}}; + end else begin + if ( ((count_q-1) + tile_x_q * M*M/N) >= (second_outer_dim / N) * M ) begin + if ( (((count_q-1) / M) * N + tile_x_q * M ) < second_outer_dim) begin + for (int i = (second_outer_dim & (N-1)); i < N; i++) begin + inp_bias[i] = 1'b0; + end + end else begin inp_bias = {N {1'b0}}; end end From fd7ae8306e122d6b364308b658ae4596720f6404 Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Wed, 23 Oct 2024 17:13:13 +0200 Subject: [PATCH 11/60] Added waves --- modelsim/sim_ita_tb_wave.tcl | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/modelsim/sim_ita_tb_wave.tcl b/modelsim/sim_ita_tb_wave.tcl index a1e1697..500122e 100644 --- a/modelsim/sim_ita_tb_wave.tcl +++ b/modelsim/sim_ita_tb_wave.tcl @@ -14,6 +14,29 @@ add wave -noupdate /ita_tb/dut/i_controller/ctrl_i add wave -noupdate /ita_tb/dut/oup_o add wave -noupdate /ita_tb/dut/inp1_q add wave -noupdate /ita_tb/dut/inp2_q +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/count_d +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/count_q +add wave -noupdate /ita_tb/dut/calc_en +add wave -noupdate /ita_tb/dut/calc_en_q1 +add wave -noupdate /ita_tb/dut/calc_en_q2 +add wave -noupdate /ita_tb/dut/calc_en_q3 +add wave -noupdate -expand -group Bias /ita_tb/dut/inp_bias +add wave -noupdate -expand -group Bias /ita_tb/dut/inp_bias_padded +add wave -noupdate -expand -group Bias /ita_tb/dut/inp_bias_q1 +add wave -noupdate -expand -group Bias /ita_tb/dut/inp_bias_q2 +add wave -noupdate /ita_tb/dut/i_accumulator/oup_i +add wave -noupdate /ita_tb/dut/i_accumulator/result_d +add wave -noupdate /ita_tb/dut/i_accumulator/result_o +add wave -noupdate /ita_tb/dut/i_requantizer/requant_oup_o +add wave -noupdate /ita_tb/dut/i_activation/data_i +add wave -noupdate /ita_tb/dut/i_activation/data_q1 +add wave -noupdate /ita_tb/dut/i_activation/data_q2 +add wave -noupdate /ita_tb/dut/i_activation/data_q3 +add wave -noupdate /ita_tb/dut/i_activation/data_q4 +add wave -noupdate /ita_tb/dut/i_activation/data_o +add wave -noupdate /ita_tb/dut/i_fifo/data_i +add wave -noupdate /ita_tb/dut/i_fifo/data_o +add wave -noupdate /ita_tb/dut/oup_o add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/* add wave -expand -group Controller /ita_tb/dut/i_controller/* add wave -group {Softmax Controller} ita_tb/dut/i_softmax_top/i_softmax/* From 22e835ca994227a5b2f5035929db9c375b09392d Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Fri, 25 Oct 2024 14:31:05 +0200 Subject: [PATCH 12/60] Added ctrl.ff_size for feedforward layer --- src/ita_controller.sv | 5 +---- src/ita_package.sv | 2 ++ src/tb/ita_tb.sv | 1 + 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/ita_controller.sv b/src/ita_controller.sv index c042ac1..a31284e 100644 --- a/src/ita_controller.sv +++ b/src/ita_controller.sv @@ -291,7 +291,7 @@ module ita_controller F1: begin inner_tile_dim = ctrl_i.tile_e-1; first_outer_dim = ctrl_i.seq_length; - second_outer_dim = ctrl_i.embed_size; + second_outer_dim = ctrl_i.ff_size; if (inner_tile_q == ctrl_i.tile_e-1) begin last_inner_tile_o = 1'b1; end @@ -341,17 +341,14 @@ module ita_controller last_inner_tile_o = 1'b1; if ( ( (((count_q & (M-1)) + tile_y_q * M)) > ( (first_outer_dim - 1) ) ) ) begin requant_add_d = {N {1'b0}}; - //inp_bias = {N {1'b0}}; end else begin if ( (count_q + tile_x_q * M*M/N) >= (second_outer_dim / N) * M ) begin if ( ((count_q / M) * N + tile_x_q * M ) < second_outer_dim) begin for (int i = (second_outer_dim & (N-1)); i < N; i++) begin requant_add_d[i] = 1'b0; - //inp_bias[i] = 1'b0; end end else begin requant_add_d = {N {1'b0}}; - //inp_bias = {N {1'b0}}; end end end diff --git a/src/ita_package.sv b/src/ita_package.sv index 04d0d53..3a2c25f 100644 --- a/src/ita_package.sv +++ b/src/ita_package.sv @@ -48,12 +48,14 @@ package ita_package; typedef logic [WO-WI*2-2:0] seq_length_t; typedef logic [WO-WI*2-2:0] proj_space_t; typedef logic [WO-WI*2-2:0] embed_size_t; + typedef logic [WO-WI*2-2:0] ff_size_t; typedef logic [ 32-1:0] tile_t; typedef struct packed { logic start ; seq_length_t seq_length ; proj_space_t proj_space ; embed_size_t embed_size ; + ff_size_t ff_size ; layer_e layer ; activation_e activation ; requant_const_array_t eps_mult ; diff --git a/src/tb/ita_tb.sv b/src/tb/ita_tb.sv index 6d0f9fe..78280c0 100644 --- a/src/tb/ita_tb.sv +++ b/src/tb/ita_tb.sv @@ -493,6 +493,7 @@ task automatic apply_ITA_weights(input integer phase); ita_ctrl.seq_length = SEQUENCE_LEN; ita_ctrl.proj_space = PROJECTION_SPACE; ita_ctrl.embed_size = EMBEDDING_SIZE; + ita_ctrl.ff_size = FEEDFORWARD_SIZE; read_activation_constants(ita_ctrl.gelu_b, ita_ctrl.gelu_c, ita_ctrl.activation_requant_mult, ita_ctrl.activation_requant_shift, ita_ctrl.activation_requant_add); From 64732e4e0006899c1778b42df377a100a4f78fda Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Fri, 25 Oct 2024 20:09:07 +0200 Subject: [PATCH 13/60] Bias padding works now but with quick fix --- modelsim/sim_ita_tb_wave.tcl | 1 + src/ita_controller.sv | 25 ++++++++++++++++++------- 2 files changed, 19 insertions(+), 7 deletions(-) diff --git a/modelsim/sim_ita_tb_wave.tcl b/modelsim/sim_ita_tb_wave.tcl index 500122e..5a701ab 100644 --- a/modelsim/sim_ita_tb_wave.tcl +++ b/modelsim/sim_ita_tb_wave.tcl @@ -16,6 +16,7 @@ add wave -noupdate /ita_tb/dut/inp1_q add wave -noupdate /ita_tb/dut/inp2_q add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/count_d add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/count_q +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/count_q2 add wave -noupdate /ita_tb/dut/calc_en add wave -noupdate /ita_tb/dut/calc_en_q1 add wave -noupdate /ita_tb/dut/calc_en_q2 diff --git a/src/ita_controller.sv b/src/ita_controller.sv index a31284e..831d972 100644 --- a/src/ita_controller.sv +++ b/src/ita_controller.sv @@ -39,7 +39,7 @@ module ita_controller ); step_e step_d, step_q; - counter_t count_d, count_q; + counter_t count_d, count_q, count_d2, count_q2; counter_t tile_d, tile_q; counter_t inner_tile_d, inner_tile_q; counter_t tile_x_d, tile_x_q; @@ -49,6 +49,7 @@ module ita_controller ongoing_soft_t ongoing_soft_d, ongoing_soft_q; bias_t inp_bias, inp_bias_padded; + logic last_time; tile_t inner_tile_dim; logic [WO-WI*2-2:0] first_outer_dim, second_outer_dim; @@ -66,6 +67,7 @@ module ita_controller always_comb begin count_d = count_q; + count_d2 = count_q2; tile_d = tile_q; inner_tile_d = inner_tile_q; tile_x_d = tile_x_q; @@ -82,6 +84,7 @@ module ita_controller softmax_tile_d = softmax_tile_q; softmax_div_done_d = softmax_div_done_q; requant_add_d = {N {requant_add_i}}; + last_time = 1'b0; inp_bias = inp_bias_i; @@ -122,6 +125,7 @@ module ita_controller if (inp_valid_i && weight_valid_i && bias_valid_i) begin calc_en_o = 1; count_d = count_q + 1; + count_d2 = count_q; busy_d = 1'b1; if (count_d == M*M/N) begin // end of tile busy_d = 1'b0; // Generate done signal for current tile @@ -305,7 +309,7 @@ module ita_controller end end F2: begin - inner_tile_dim = ctrl_i.tile_e-1; + inner_tile_dim = ctrl_i.tile_f-1; first_outer_dim = ctrl_i.seq_length; second_outer_dim = ctrl_i.embed_size; if (inner_tile_q == ctrl_i.tile_f-1) begin @@ -335,11 +339,16 @@ module ita_controller end end endcase + + if (step_q == Idle && count_q2 == 8'd255) begin + last_time = 1'b1; + count_d2 = 1'b0; + end - if (step_q != Idle && step_q != MatMul) begin + if ((step_q != Idle && step_q != MatMul) || last_time) begin if (inner_tile_q == inner_tile_dim) begin last_inner_tile_o = 1'b1; - if ( ( (((count_q & (M-1)) + tile_y_q * M)) > ( (first_outer_dim - 1) ) ) ) begin + if (((((count_q & (M-1)) + tile_y_q * M)) > ((first_outer_dim - 1)))) begin requant_add_d = {N {1'b0}}; end else begin if ( (count_q + tile_x_q * M*M/N) >= (second_outer_dim / N) * M ) begin @@ -353,11 +362,11 @@ module ita_controller end end - if ( ( ((((count_q-1) & (M-1)) + tile_y_q * M)) > ( (first_outer_dim - 1) ) ) ) begin + if ((((((count_q2) & (M-1)) + tile_y_q * M)) > ((first_outer_dim - 1)))) begin inp_bias = {N {1'b0}}; end else begin - if ( ((count_q-1) + tile_x_q * M*M/N) >= (second_outer_dim / N) * M ) begin - if ( (((count_q-1) / M) * N + tile_x_q * M ) < second_outer_dim) begin + if ( ((count_q2) + tile_x_q * M*M/N) >= (second_outer_dim / N) * M ) begin + if ( (((count_q2) / M) * N + tile_x_q * M ) < second_outer_dim) begin for (int i = (second_outer_dim & (N-1)); i < N; i++) begin inp_bias[i] = 1'b0; end @@ -391,6 +400,7 @@ module ita_controller if(~rst_ni) begin step_q <= Idle; count_q <= '0; + count_q2 <= '0; tile_q <= '0; inner_tile_q <= '0; softmax_tile_q <= '0; @@ -402,6 +412,7 @@ module ita_controller end else begin step_q <= step_d; count_q <= count_d; + count_q2 <= count_d2; tile_q <= tile_d; tile_x_q <= tile_x_d; tile_y_q <= tile_y_d; From 8f0d19a62e56525157c7f4cc5552b1f5faf4eba5 Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Tue, 29 Oct 2024 14:35:48 +0100 Subject: [PATCH 14/60] count_q - 1 solution works for one tile --- modelsim/sim_ita_tb_wave.tcl | 1 - src/ita_controller.sv | 67 ++++++++++++++++++++---------------- 2 files changed, 38 insertions(+), 30 deletions(-) diff --git a/modelsim/sim_ita_tb_wave.tcl b/modelsim/sim_ita_tb_wave.tcl index 5a701ab..500122e 100644 --- a/modelsim/sim_ita_tb_wave.tcl +++ b/modelsim/sim_ita_tb_wave.tcl @@ -16,7 +16,6 @@ add wave -noupdate /ita_tb/dut/inp1_q add wave -noupdate /ita_tb/dut/inp2_q add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/count_d add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/count_q -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/count_q2 add wave -noupdate /ita_tb/dut/calc_en add wave -noupdate /ita_tb/dut/calc_en_q1 add wave -noupdate /ita_tb/dut/calc_en_q2 diff --git a/src/ita_controller.sv b/src/ita_controller.sv index 831d972..b594fee 100644 --- a/src/ita_controller.sv +++ b/src/ita_controller.sv @@ -39,7 +39,7 @@ module ita_controller ); step_e step_d, step_q; - counter_t count_d, count_q, count_d2, count_q2; + counter_t count_d, count_q, bias_count; counter_t tile_d, tile_q; counter_t inner_tile_d, inner_tile_q; counter_t tile_x_d, tile_x_q; @@ -67,7 +67,7 @@ module ita_controller always_comb begin count_d = count_q; - count_d2 = count_q2; + bias_count = count_q - 1; tile_d = tile_q; inner_tile_d = inner_tile_q; tile_x_d = tile_x_q; @@ -86,7 +86,6 @@ module ita_controller requant_add_d = {N {requant_add_i}}; last_time = 1'b0; inp_bias = inp_bias_i; - busy_d = busy_q; softmax_fifo = 1'b0; @@ -102,8 +101,6 @@ module ita_controller busy_d = 1'b1; end - - // default handshake if (step_q != Idle) begin // Check if division for softmax is going to FIFO @@ -114,6 +111,9 @@ module ita_controller if (softmax_div_done_q != 1'b1 && step_q == AV && inner_tile_q == 0 && tile_q == 0 && count_q < M && count_q >= soft_addr_div_i) begin softmax_div = 1'b1; end + // if (count_q == M*M/N) begin //Problem is that the counter does not go to 256 + // count_d = '0; + // end if (ongoing_q>=FifoDepth || (softmax_fifo && ongoing_soft_q>=SoftFifoDepth) || softmax_div) begin inp_ready_o = 1'b0; weight_ready_o = 1'b0; @@ -123,13 +123,17 @@ module ita_controller weight_ready_o = inp_valid_i; bias_ready_o = weight_valid_i; if (inp_valid_i && weight_valid_i && bias_valid_i) begin + // if (count_q == M*M/N) begin + // count_d = 1; + // end else begin + // count_d = count_q + 1; + // end calc_en_o = 1; count_d = count_q + 1; - count_d2 = count_q; busy_d = 1'b1; if (count_d == M*M/N) begin // end of tile busy_d = 1'b0; // Generate done signal for current tile - count_d = '0; + count_d = '0; inner_tile_d = inner_tile_q + 1; end end @@ -340,41 +344,48 @@ module ita_controller end endcase - if (step_q == Idle && count_q2 == 8'd255) begin - last_time = 1'b1; - count_d2 = 1'b0; + // if (step_q == Idle && count_q2 == 8'd255) begin + // last_time = 1'b1; + // count_d2 = 1'b0; + // end + + if (count_q == 0 && (tile_x_q > 0 || tile_y_q > 0)) begin + bias_count = 255; end - if ((step_q != Idle && step_q != MatMul) || last_time) begin + if ((step_q != Idle && step_q != MatMul)) begin if (inner_tile_q == inner_tile_dim) begin last_inner_tile_o = 1'b1; - if (((((count_q & (M-1)) + tile_y_q * M)) > ((first_outer_dim - 1)))) begin + if ((((((bias_count) & (M-1)) + tile_y_q * M)) > ((first_outer_dim - 1)))) begin requant_add_d = {N {1'b0}}; - end else begin - if ( (count_q + tile_x_q * M*M/N) >= (second_outer_dim / N) * M ) begin - if ( ((count_q / M) * N + tile_x_q * M ) < second_outer_dim) begin - for (int i = (second_outer_dim & (N-1)); i < N; i++) begin - requant_add_d[i] = 1'b0; - end - end else begin - requant_add_d = {N {1'b0}}; - end - end - end - - if ((((((count_q2) & (M-1)) + tile_y_q * M)) > ((first_outer_dim - 1)))) begin inp_bias = {N {1'b0}}; end else begin - if ( ((count_q2) + tile_x_q * M*M/N) >= (second_outer_dim / N) * M ) begin - if ( (((count_q2) / M) * N + tile_x_q * M ) < second_outer_dim) begin + if ( ((bias_count) + tile_x_q * M*M/N) >= (second_outer_dim / N) * M ) begin + if ( (((bias_count) / M) * N + tile_x_q * M ) < second_outer_dim) begin for (int i = (second_outer_dim & (N-1)); i < N; i++) begin + requant_add_d[i] = 1'b0; inp_bias[i] = 1'b0; end end else begin + requant_add_d = {N {1'b0}}; inp_bias = {N {1'b0}}; end end end + + // if ((((((count_q2) & (M-1)) + tile_y_q * M)) > ((first_outer_dim - 1)))) begin + // inp_bias = {N {1'b0}}; + // end else begin + // if ( ((count_q2) + tile_x_q * M*M/N) >= (second_outer_dim / N) * M ) begin + // if ( (((count_q2) / M) * N + tile_x_q * M ) < second_outer_dim) begin + // for (int i = (second_outer_dim & (N-1)); i < N; i++) begin + // inp_bias[i] = 1'b0; + // end + // end else begin + // inp_bias = {N {1'b0}}; + // end + // end + // end end end @@ -400,7 +411,6 @@ module ita_controller if(~rst_ni) begin step_q <= Idle; count_q <= '0; - count_q2 <= '0; tile_q <= '0; inner_tile_q <= '0; softmax_tile_q <= '0; @@ -412,7 +422,6 @@ module ita_controller end else begin step_q <= step_d; count_q <= count_d; - count_q2 <= count_d2; tile_q <= tile_d; tile_x_q <= tile_x_d; tile_y_q <= tile_y_d; From 3c6040c749a86f3006d87be320b9ef73908e10c1 Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Tue, 29 Oct 2024 19:15:39 +0100 Subject: [PATCH 15/60] This version works for data_S127_E50_P64_F64_H1_B1 but not for data_S63_E127_P64_F64_H1_B1 --- modelsim/sim_ita_tb_wave.tcl | 5 +++ src/ita_controller.sv | 59 ++++++++++++++++++++++++------------ 2 files changed, 45 insertions(+), 19 deletions(-) diff --git a/modelsim/sim_ita_tb_wave.tcl b/modelsim/sim_ita_tb_wave.tcl index 500122e..bc9fed6 100644 --- a/modelsim/sim_ita_tb_wave.tcl +++ b/modelsim/sim_ita_tb_wave.tcl @@ -16,6 +16,11 @@ add wave -noupdate /ita_tb/dut/inp1_q add wave -noupdate /ita_tb/dut/inp2_q add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/count_d add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/count_q +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/bias_count +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/bias_tile_x_d +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/bias_tile_x_q +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/bias_tile_y_d +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/bias_tile_y_q add wave -noupdate /ita_tb/dut/calc_en add wave -noupdate /ita_tb/dut/calc_en_q1 add wave -noupdate /ita_tb/dut/calc_en_q2 diff --git a/src/ita_controller.sv b/src/ita_controller.sv index b594fee..a081521 100644 --- a/src/ita_controller.sv +++ b/src/ita_controller.sv @@ -42,8 +42,8 @@ module ita_controller counter_t count_d, count_q, bias_count; counter_t tile_d, tile_q; counter_t inner_tile_d, inner_tile_q; - counter_t tile_x_d, tile_x_q; - counter_t tile_y_d, tile_y_q; + counter_t tile_x_d, tile_x_q, bias_tile_x_d, bias_tile_x_q; + counter_t tile_y_d, tile_y_q, bias_tile_y_d, bias_tile_y_q; counter_t softmax_tile_d, softmax_tile_q; ongoing_t ongoing_d, ongoing_q; ongoing_soft_t ongoing_soft_d, ongoing_soft_q; @@ -67,7 +67,6 @@ module ita_controller always_comb begin count_d = count_q; - bias_count = count_q - 1; tile_d = tile_q; inner_tile_d = inner_tile_q; tile_x_d = tile_x_q; @@ -300,14 +299,19 @@ module ita_controller inner_tile_dim = ctrl_i.tile_e-1; first_outer_dim = ctrl_i.seq_length; second_outer_dim = ctrl_i.ff_size; - if (inner_tile_q == ctrl_i.tile_e-1) begin - last_inner_tile_o = 1'b1; - end if (inner_tile_d == ctrl_i.tile_e) begin // end of inner tile inner_tile_d = '0; tile_d = tile_q + 1; - if (tile_d == ctrl_i.tile_s*ctrl_i.tile_f) begin + if (tile_x_q == (ctrl_i.tile_f-1)) begin // end of step Q + tile_x_d = '0; + tile_y_d = tile_y_q + 1; + end else begin + tile_x_d = tile_x_q + 1; + end + if (tile_d == ctrl_i.tile_s*ctrl_i.tile_f) begin // end of step Q tile_d = '0; + tile_x_d = '0; + tile_y_d = '0; step_d = F2; end end @@ -316,14 +320,19 @@ module ita_controller inner_tile_dim = ctrl_i.tile_f-1; first_outer_dim = ctrl_i.seq_length; second_outer_dim = ctrl_i.embed_size; - if (inner_tile_q == ctrl_i.tile_f-1) begin - last_inner_tile_o = 1'b1; - end if (inner_tile_d == ctrl_i.tile_f) begin // end of inner tile inner_tile_d = '0; tile_d = tile_q + 1; - if (tile_d == ctrl_i.tile_s*ctrl_i.tile_e) begin + if (tile_x_q == (ctrl_i.tile_f-1)) begin // end of step Q + tile_x_d = '0; + tile_y_d = tile_y_q + 1; + end else begin + tile_x_d = tile_x_q + 1; + end + if (tile_d == ctrl_i.tile_s*ctrl_i.tile_e) begin // end of step Q tile_d = '0; + tile_x_d = '0; + tile_y_d = '0; step_d = Idle; end end @@ -349,19 +358,25 @@ module ita_controller // count_d2 = 1'b0; // end - if (count_q == 0 && (tile_x_q > 0 || tile_y_q > 0)) begin - bias_count = 255; - end - - if ((step_q != Idle && step_q != MatMul)) begin + // if (count_q == 0 && (tile_x_q > 0 || tile_y_q > 0)) begin + // bias_count = 255; + // end + + + bias_count = (count_q == 0) ? 255 : count_q - 1; + // bias_count = (count_q == 0 && (tile_x_q > 0 || tile_y_q > 0)) ? 255 : count_q - 1; + bias_tile_x_d = (count_q == 0) ? bias_tile_x_q : tile_x_q; + bias_tile_y_d = (count_q == 0) ? bias_tile_y_q : tile_y_q; + + if ((step_q != Idle && step_q != MatMul) || (step_q == Idle && bias_count == 255)) begin if (inner_tile_q == inner_tile_dim) begin last_inner_tile_o = 1'b1; - if ((((((bias_count) & (M-1)) + tile_y_q * M)) > ((first_outer_dim - 1)))) begin + if ((((((bias_count) & (M-1)) + bias_tile_y_d * M)) > ((first_outer_dim - 1)))) begin requant_add_d = {N {1'b0}}; inp_bias = {N {1'b0}}; end else begin - if ( ((bias_count) + tile_x_q * M*M/N) >= (second_outer_dim / N) * M ) begin - if ( (((bias_count) / M) * N + tile_x_q * M ) < second_outer_dim) begin + if ( ((bias_count) + bias_tile_x_d * M*M/N) >= (second_outer_dim / N) * M ) begin + if ( (((bias_count) / M) * N + bias_tile_x_d * M ) < second_outer_dim) begin for (int i = (second_outer_dim & (N-1)); i < N; i++) begin requant_add_d[i] = 1'b0; inp_bias[i] = 1'b0; @@ -412,6 +427,8 @@ module ita_controller step_q <= Idle; count_q <= '0; tile_q <= '0; + tile_x_q <= '0; + tile_y_q <= '0; inner_tile_q <= '0; softmax_tile_q <= '0; ongoing_q <= '0; @@ -419,6 +436,8 @@ module ita_controller softmax_div_done_q <= 1'b0; requant_add_q <= '0; busy_q <= 1'b0; + bias_tile_x_q <= '0; + bias_tile_y_q <= '0; end else begin step_q <= step_d; count_q <= count_d; @@ -432,6 +451,8 @@ module ita_controller softmax_div_done_q <= softmax_div_done_d; requant_add_q <= requant_add_d; busy_q <= busy_d; + bias_tile_x_q <= bias_tile_x_d; + bias_tile_y_q <= bias_tile_y_d; end end endmodule From 0094c1148b8442ae79be23a98059249cb7714ec8 Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Wed, 30 Oct 2024 10:48:18 +0100 Subject: [PATCH 16/60] No ebugs for bias padding detected one bug without bias in phase 5 --- src/ita_controller.sv | 44 +++++++++++++++++++++++++------------------ 1 file changed, 26 insertions(+), 18 deletions(-) diff --git a/src/ita_controller.sv b/src/ita_controller.sv index a081521..b2b5d39 100644 --- a/src/ita_controller.sv +++ b/src/ita_controller.sv @@ -53,6 +53,8 @@ module ita_controller tile_t inner_tile_dim; logic [WO-WI*2-2:0] first_outer_dim, second_outer_dim; + logic [WO-WI*2-2:0] first_outer_dim_d, first_outer_dim_q; + logic [WO-WI*2-2:0] second_outer_dim_d, second_outer_dim_q; logic softmax_fifo, softmax_div, softmax_div_done_d, softmax_div_done_q, busy_d, busy_q; requant_oup_t requant_add_d, requant_add_q; @@ -302,13 +304,13 @@ module ita_controller if (inner_tile_d == ctrl_i.tile_e) begin // end of inner tile inner_tile_d = '0; tile_d = tile_q + 1; - if (tile_x_q == (ctrl_i.tile_f-1)) begin // end of step Q + if (tile_x_q == (ctrl_i.tile_f-1)) begin tile_x_d = '0; tile_y_d = tile_y_q + 1; end else begin tile_x_d = tile_x_q + 1; end - if (tile_d == ctrl_i.tile_s*ctrl_i.tile_f) begin // end of step Q + if (tile_d == ctrl_i.tile_s*ctrl_i.tile_f) begin tile_d = '0; tile_x_d = '0; tile_y_d = '0; @@ -323,13 +325,13 @@ module ita_controller if (inner_tile_d == ctrl_i.tile_f) begin // end of inner tile inner_tile_d = '0; tile_d = tile_q + 1; - if (tile_x_q == (ctrl_i.tile_f-1)) begin // end of step Q + if (tile_x_q == (ctrl_i.tile_e-1)) begin tile_x_d = '0; tile_y_d = tile_y_q + 1; end else begin tile_x_d = tile_x_q + 1; end - if (tile_d == ctrl_i.tile_s*ctrl_i.tile_e) begin // end of step Q + if (tile_d == ctrl_i.tile_s*ctrl_i.tile_e) begin tile_d = '0; tile_x_d = '0; tile_y_d = '0; @@ -367,26 +369,29 @@ module ita_controller // bias_count = (count_q == 0 && (tile_x_q > 0 || tile_y_q > 0)) ? 255 : count_q - 1; bias_tile_x_d = (count_q == 0) ? bias_tile_x_q : tile_x_q; bias_tile_y_d = (count_q == 0) ? bias_tile_y_q : tile_y_q; + first_outer_dim_d = (count_q == 0) ? first_outer_dim_q : first_outer_dim; + second_outer_dim_d = (count_q == 0) ? second_outer_dim_q : second_outer_dim; if ((step_q != Idle && step_q != MatMul) || (step_q == Idle && bias_count == 255)) begin if (inner_tile_q == inner_tile_dim) begin last_inner_tile_o = 1'b1; - if ((((((bias_count) & (M-1)) + bias_tile_y_d * M)) > ((first_outer_dim - 1)))) begin - requant_add_d = {N {1'b0}}; - inp_bias = {N {1'b0}}; - end else begin - if ( ((bias_count) + bias_tile_x_d * M*M/N) >= (second_outer_dim / N) * M ) begin - if ( (((bias_count) / M) * N + bias_tile_x_d * M ) < second_outer_dim) begin - for (int i = (second_outer_dim & (N-1)); i < N; i++) begin - requant_add_d[i] = 1'b0; - inp_bias[i] = 1'b0; - end - end else begin - requant_add_d = {N {1'b0}}; - inp_bias = {N {1'b0}}; + end + if ((((((bias_count) & (M-1)) + bias_tile_y_d * M)) > ((first_outer_dim_d - 1)))) begin + requant_add_d = {N {1'b0}}; + inp_bias = {N {1'b0}}; + end else begin + if ( ((bias_count) + bias_tile_x_d * M*M/N) >= (second_outer_dim_d / N) * M ) begin + if ( (((bias_count) / M) * N + bias_tile_x_d * M ) < second_outer_dim_d) begin + for (int i = (second_outer_dim_d & (N-1)); i < N; i++) begin + requant_add_d[i] = 1'b0; + inp_bias[i] = 1'b0; end + end else begin + requant_add_d = {N {1'b0}}; + inp_bias = {N {1'b0}}; end end + end // if ((((((count_q2) & (M-1)) + tile_y_q * M)) > ((first_outer_dim - 1)))) begin // inp_bias = {N {1'b0}}; @@ -401,7 +406,6 @@ module ita_controller // end // end // end - end end inp_bias_padded = inp_bias; @@ -438,6 +442,8 @@ module ita_controller busy_q <= 1'b0; bias_tile_x_q <= '0; bias_tile_y_q <= '0; + first_outer_dim_q <= '0; + second_outer_dim_q <= '0; end else begin step_q <= step_d; count_q <= count_d; @@ -453,6 +459,8 @@ module ita_controller busy_q <= busy_d; bias_tile_x_q <= bias_tile_x_d; bias_tile_y_q <= bias_tile_y_d; + first_outer_dim_q <= first_outer_dim_d; + second_outer_dim_q <= second_outer_dim_d; end end endmodule From 2a04d893e8076f30aed5a8bcff813d066abf75b0 Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Wed, 30 Oct 2024 14:58:55 +0100 Subject: [PATCH 17/60] Just errors in phase 5 and 6 --- PyITA/ITA.py | 27 ++++++++++++++++++--------- modelsim/sim_ita_tb_wave.tcl | 7 +++---- 2 files changed, 21 insertions(+), 13 deletions(-) diff --git a/PyITA/ITA.py b/PyITA/ITA.py index 04a3979..8c304f6 100644 --- a/PyITA/ITA.py +++ b/PyITA/ITA.py @@ -178,10 +178,6 @@ def _initialize_tensors(self, Q, V, Wq, Wk, Wv, Wo, Bq, Bk, Bv, Bo, FF_in, Wff, self.Bq_broadcast = np.reshape(np.repeat(self.Bq, self.S, axis = 0), (self.H, self.S, self.P_ITA)) self.Bq_broadcast = np.pad(self.Bq_broadcast, ((0, 0), (0, self.S_ITA - self.S), (0, 0))) - print(self.Bq_broadcast[0][0][16:32]) - sns.set_theme() - sns.heatmap(self.Bq_broadcast[0], annot=False, linewidths=0, linecolor='white', cmap='crest', xticklabels=False, yticklabels=False) - plt.show() if self.bias: self.Bk_in = random_shuffled_tensor( @@ -362,6 +358,9 @@ def tiler_QK(self, qk: np.ndarray, weight: np.ndarray, bias: np.ndarray, output: # Weight Wqk is H x E x P # Transpose Wqk to H x P x E + # print(f"qk: {qk.shape}") + # print(f"qk: {weight.shape}") + weight = np.transpose(weight, (0, 2, 1)) tile_x = qk.shape[0] // self.ITA_M # S // ITA_M @@ -376,6 +375,19 @@ def tiler_QK(self, qk: np.ndarray, weight: np.ndarray, bias: np.ndarray, output: Input = np.tile(Input, [1, 1, self.split, 1]) # Repeat each tile number of output row tiles times Input = np.tile(Input, [1, tile_y, 1, 1]).reshape((-1, self.ITA_M)) + # fig, ax = plt.subplots(1, 2) # Create a figure with two subplots + # im0 = ax[0].imshow(Input, cmap='viridis') + # im1 = ax[1].imshow(np.squeeze(weight, axis=0)) + + # # Add colorbars for each image if needed + # fig.colorbar(im0, ax=ax[0]) + # fig.colorbar(im1, ax=ax[1]) + + # # Set titles for each subplot + # ax[0].set_title("Inputs") + # ax[1].set_title("Weights") + + plt.show() write_matrix(Input, input_file, self.paths["standalone"]) # Transposed Weight Wqk is H x P x E @@ -526,10 +538,7 @@ def step1_Qp(self): self.Qp = np.clip(self.Qp, -2**(self.WO - 1), 2**(self.WO - 1) - 1) self.Qp_requant = requantize(self.Qp, self.requant_eps_mult[0], self.requant_right_shift[0], self.requant_add[0]) - print(self.Qp[0][0][16:32]) - sns.set_theme() - sns.heatmap(self.Qp[0], annot=False, linewidths=0, linecolor='white', cmap='crest', xticklabels=False, yticklabels=False) - plt.show() + # Set padded values to zero if (self.S_ITA - self.S) > 0: self.Qp_requant[:, -(self.S_ITA - self.S):, :] = 0 @@ -654,7 +663,7 @@ def feedforward_layer(self): self.FFp_requant = requantize(self.FFp, self.requant_eps_mult_ffn[0], self.requant_right_shift_ffn[0], self.requant_add_ffn[0]) self.FFp_requant = self.apply_activation(self.FFp_requant, self.activation) - + self.tiler_QK(self.FF, self.Wff, self.Bff, self.FFp_requant, "FF", "Wff", "Bff", "FFp") self.FF2p = np.matmul(self.FFp_requant, self.Wff2, dtype = np.int32) + self.Bff2_broadcast diff --git a/modelsim/sim_ita_tb_wave.tcl b/modelsim/sim_ita_tb_wave.tcl index bc9fed6..072c1cd 100644 --- a/modelsim/sim_ita_tb_wave.tcl +++ b/modelsim/sim_ita_tb_wave.tcl @@ -21,10 +21,9 @@ add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/bias_tile_x_d add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/bias_tile_x_q add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/bias_tile_y_d add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/bias_tile_y_q -add wave -noupdate /ita_tb/dut/calc_en -add wave -noupdate /ita_tb/dut/calc_en_q1 -add wave -noupdate /ita_tb/dut/calc_en_q2 -add wave -noupdate /ita_tb/dut/calc_en_q3 +add wave -noupdate -expand -group Requant /ita_tb/dut/i_controller/requant_add_i +add wave -noupdate -expand -group Requant /ita_tb/dut/i_controller/requant_add_o +add wave -noupdate -expand -group Requant /ita_tb/dut/i_controller/step_q add wave -noupdate -expand -group Bias /ita_tb/dut/inp_bias add wave -noupdate -expand -group Bias /ita_tb/dut/inp_bias_padded add wave -noupdate -expand -group Bias /ita_tb/dut/inp_bias_q1 From aab0df5b8835c5588ee2482767e5f5ac75b5b7fc Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Wed, 30 Oct 2024 16:56:27 +0100 Subject: [PATCH 18/60] No bugs in all phases --- src/ita_controller.sv | 11 ----------- src/tb/ita_tb.sv | 2 +- 2 files changed, 1 insertion(+), 12 deletions(-) diff --git a/src/ita_controller.sv b/src/ita_controller.sv index b2b5d39..f37474f 100644 --- a/src/ita_controller.sv +++ b/src/ita_controller.sv @@ -355,18 +355,7 @@ module ita_controller end endcase - // if (step_q == Idle && count_q2 == 8'd255) begin - // last_time = 1'b1; - // count_d2 = 1'b0; - // end - - // if (count_q == 0 && (tile_x_q > 0 || tile_y_q > 0)) begin - // bias_count = 255; - // end - - bias_count = (count_q == 0) ? 255 : count_q - 1; - // bias_count = (count_q == 0 && (tile_x_q > 0 || tile_y_q > 0)) ? 255 : count_q - 1; bias_tile_x_d = (count_q == 0) ? bias_tile_x_q : tile_x_q; bias_tile_y_d = (count_q == 0) ? bias_tile_y_q : tile_y_q; first_outer_dim_d = (count_q == 0) ? first_outer_dim_q : first_outer_dim; diff --git a/src/tb/ita_tb.sv b/src/tb/ita_tb.sv index 78280c0..1b2a077 100644 --- a/src/tb/ita_tb.sv +++ b/src/tb/ita_tb.sv @@ -95,6 +95,7 @@ module ita_tb; N_TILES_SEQUENCE_DIM = (SEQUENCE_LEN + M_TILE_LEN -1 ) / M_TILE_LEN; N_TILES_EMBEDDING_DIM = (EMBEDDING_SIZE+ M_TILE_LEN -1 ) / M_TILE_LEN; N_TILES_PROJECTION_DIM = (PROJECTION_SPACE + M_TILE_LEN -1 ) / M_TILE_LEN; + N_TILES_FEEDFORWARD = (FEEDFORWARD_SIZE + M_TILE_LEN -1) / M_TILE_LEN; N_TILES_LINEAR_PROJECTION = N_TILES_SEQUENCE_DIM * N_TILES_EMBEDDING_DIM * N_TILES_PROJECTION_DIM; N_TILES_ATTENTION = N_TILES_SEQUENCE_DIM * N_TILES_PROJECTION_DIM; N_ENTRIES_PER_TILE = M_TILE_LEN * M_TILE_LEN / N_PE; @@ -104,7 +105,6 @@ module ita_tb; N_ENTRIES_PER_SEQUENCE_DIM = N_ENTRIES_PER_TILE * N_TILES_SEQUENCE_DIM; N_ATTENTION_TILE_ROWS = N_TILES_SEQUENCE_DIM; N_GROUPS = 2 * N_ATTENTION_TILE_ROWS; - N_TILES_FEEDFORWARD = FEEDFORWARD_SIZE / M_TILE_LEN; N_TILES_INNER_DIM_LINEAR_PROJECTION[0] = N_TILES_EMBEDDING_DIM; N_TILES_INNER_DIM_LINEAR_PROJECTION[1] = N_TILES_EMBEDDING_DIM; N_TILES_INNER_DIM_LINEAR_PROJECTION[2] = N_TILES_EMBEDDING_DIM; From 64978c1ebaeb282c07ee1049061f4a5dc963fe6c Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Thu, 31 Oct 2024 09:52:10 +0100 Subject: [PATCH 19/60] Bias padding for all phases without bugs --- src/ita_controller.sv | 32 +++++--------------------------- 1 file changed, 5 insertions(+), 27 deletions(-) diff --git a/src/ita_controller.sv b/src/ita_controller.sv index f37474f..5f5bc9d 100644 --- a/src/ita_controller.sv +++ b/src/ita_controller.sv @@ -112,9 +112,6 @@ module ita_controller if (softmax_div_done_q != 1'b1 && step_q == AV && inner_tile_q == 0 && tile_q == 0 && count_q < M && count_q >= soft_addr_div_i) begin softmax_div = 1'b1; end - // if (count_q == M*M/N) begin //Problem is that the counter does not go to 256 - // count_d = '0; - // end if (ongoing_q>=FifoDepth || (softmax_fifo && ongoing_soft_q>=SoftFifoDepth) || softmax_div) begin inp_ready_o = 1'b0; weight_ready_o = 1'b0; @@ -124,11 +121,6 @@ module ita_controller weight_ready_o = inp_valid_i; bias_ready_o = weight_valid_i; if (inp_valid_i && weight_valid_i && bias_valid_i) begin - // if (count_q == M*M/N) begin - // count_d = 1; - // end else begin - // count_d = count_q + 1; - // end calc_en_o = 1; count_d = count_q + 1; busy_d = 1'b1; @@ -191,7 +183,7 @@ module ita_controller if (inner_tile_d == ctrl_i.tile_e) begin // end of inner tile inner_tile_d = '0; tile_d = tile_q + 1; - if (tile_x_q == (ctrl_i.tile_p-1)) begin // end of step Q + if (tile_x_q == (ctrl_i.tile_p-1)) begin tile_x_d = '0; tile_y_d = tile_y_q + 1; end else begin @@ -212,7 +204,7 @@ module ita_controller if (inner_tile_d == ctrl_i.tile_e) begin // end of inner tile inner_tile_d = '0; tile_d = tile_q + 1; - if (tile_x_q == (ctrl_i.tile_s-1)) begin // end of step Q + if (tile_x_q == (ctrl_i.tile_s-1)) begin tile_x_d = '0; tile_y_d = tile_y_q + 1; end else begin @@ -233,7 +225,7 @@ module ita_controller if (inner_tile_d == ctrl_i.tile_p) begin // end of inner tile inner_tile_d = '0; tile_d = tile_q + 1; - if (tile_x_q == (ctrl_i.tile_s-1)) begin // end of step Q + if (tile_x_q == (ctrl_i.tile_s-1)) begin tile_x_d = '0; end else begin tile_x_d = tile_x_q + 1; @@ -251,7 +243,7 @@ module ita_controller if (inner_tile_d == ctrl_i.tile_s) begin // end of inner tile inner_tile_d = '0; tile_d = tile_q + 1; - if (tile_x_q == (ctrl_i.tile_p-1)) begin // end of step Q + if (tile_x_q == (ctrl_i.tile_p-1)) begin tile_x_d = '0; end else begin tile_x_d = tile_x_q + 1; @@ -282,7 +274,7 @@ module ita_controller if (inner_tile_d == ctrl_i.tile_p) begin // end of inner tile inner_tile_d = '0; tile_d = tile_q + 1; - if (tile_x_q == (ctrl_i.tile_e-1)) begin // end of step Q + if (tile_x_q == (ctrl_i.tile_e-1)) begin tile_x_d = '0; tile_y_d = tile_y_q + 1; end else begin @@ -381,20 +373,6 @@ module ita_controller end end end - - // if ((((((count_q2) & (M-1)) + tile_y_q * M)) > ((first_outer_dim - 1)))) begin - // inp_bias = {N {1'b0}}; - // end else begin - // if ( ((count_q2) + tile_x_q * M*M/N) >= (second_outer_dim / N) * M ) begin - // if ( (((count_q2) / M) * N + tile_x_q * M ) < second_outer_dim) begin - // for (int i = (second_outer_dim & (N-1)); i < N; i++) begin - // inp_bias[i] = 1'b0; - // end - // end else begin - // inp_bias = {N {1'b0}}; - // end - // end - // end end inp_bias_padded = inp_bias; From d43362540d7c583c001f3b4fc21b8ef3bafcf8a8 Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Fri, 8 Nov 2024 12:02:21 +0100 Subject: [PATCH 20/60] Added test vectors in the gitlab-ci --- .gitlab-ci.yml | 38 ++++++++++++++++++++++++++++---------- 1 file changed, 28 insertions(+), 10 deletions(-) diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 31832bc..4ab51a1 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -26,15 +26,18 @@ generate_testvectors: stage: test script: - !reference [.setup_test, script] - - python testGenerator.py -H 1 -S 128 -E 128 -P 192 -F 256 --activation identity --no-bias - # - python testGenerator.py -H 1 -S 64 -E 128 -P 192 -F 256 --activation identity --no-bias - # - python testGenerator.py -H 1 -S 128 -E 192 -P 256 -F 256 --activation gelu - # - python testGenerator.py -H 1 -S 192 -E 256 -P 128 -F 128 --activation relu - - python testGenerator.py -H 1 -S 1 -E 2 -P 3 -F 3 --activation gelu --no-bias - # - python testGenerator.py -H 1 -S 1 -E 2 -P 3 -F 3 --activation relu --no-bias - - python testGenerator.py -H 1 -S 63 -E 62 -P 61 -F 61 --activation relu --no-bias - # - python testGenerator.py -H 1 -S 65 -E 130 -P 195 -F 195 --activation relu --no-bias - # - python testGenerator.py -H 1 -S 127 -E 190 -P 253 -F 253 --activation relu --no-bias + - python testGenerator.py -H 1 -S 64 -E 64 -P 64 -F 64 --activation gelu --skip-vector-validation + - python testGenerator.py -H 1 -S 128 -E 192 -P 256 -F 256 --activation gelu --skip-vector-validation + - python testGenerator.py -H 1 -S 192 -E 256 -P 128 -F 128 --activation relu --skip-vector-validation + - python testGenerator.py -H 1 -S 1 -E 2 -P 3 -F 3 --activation gelu --no-bias --skip-vector-validation + - python testGenerator.py -H 1 -S 1 -E 2 -P 3 -F 3 --activation relu --no-bias --skip-vector-validation + - python testGenerator.py -H 1 -S 63 -E 62 -P 61 -F 61 --activation relu --no-bias --skip-vector-validation + - python testGenerator.py -H 1 -S 65 -E 130 -P 195 -F 195 --activation relu --no-bias --skip-vector-validation + - python testGenerator.py -H 1 -S 127 -E 190 -P 253 -F 253 --activation relu --no-bias --skip-vector-validation + + - python testGenerator.py -H 1 -S 511 -E 511 -P 127 -F 63 --activation relu --skip-vector-validation + - python testGenerator.py -H 1 -S 63 -E 63 -P 50 -F 129 --activation gelu --skip-vector-validation + - python testGenerator.py -H 1 -S 255 -E 63 -P 511 -F 511 --activation identity --skip-vector-validation artifacts: paths: - simvectors @@ -131,9 +134,24 @@ run_sim_padding: # P: 253 # F: 253 # activation: relu + - S: 511 + E: 511 + P: 127 + F: 63 + activation: relu + - S: 63 + E: 63 + P: 50 + F: 129 + activation: relu + - S: 255 + E: 63 + P: 511 + F: 511 + activation: relu script: - make bender - - make sim VSIM_FLAGS=-c s=$S e=$E p=$P f=$F bias=0 activation=$activation + - make sim VSIM_FLAGS=-c s=$S e=$E p=$P f=$F bias=1 activation=$activation no_stalls=$no_stalls single_attention=$single_attention - ./modelsim/return_status.sh modelsim/build/transcript $S $E $P $F ita_tb run_hwpe_sim: From 8d4de04a7d0ee16ea24fcd5ec17dc4a501059055 Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Fri, 8 Nov 2024 13:08:35 +0100 Subject: [PATCH 21/60] Fixes in gitlab-ci --- .gitlab-ci.yml | 18 ++++++++++++++++-- PyITA/debug.py | 39 --------------------------------------- 2 files changed, 16 insertions(+), 41 deletions(-) delete mode 100644 PyITA/debug.py diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 4ab51a1..63ac46b 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -119,36 +119,50 @@ run_sim_padding: P: 3 F: 3 activation: relu + no_stalls: 0 + single_attention: 0 - S: 63 E: 62 P: 61 F: 61 activation: relu + no_stalls: 0 + single_attention: 0 # - S: 65 # E: 130 # P: 195 # F: 195 # activation: relu + # no_stalls: 0 + # single_attention: 0 # - S: 127 # E: 190gelu # P: 253 # F: 253 # activation: relu + # no_stalls: 0 + # single_attention: 0 - S: 511 E: 511 P: 127 F: 63 activation: relu + no_stalls: 0 + single_attention: 0 - S: 63 E: 63 P: 50 F: 129 - activation: relu + activation: gelu + no_stalls: 0 + single_attention: 0 - S: 255 E: 63 P: 511 F: 511 - activation: relu + activation: identity + no_stalls: 0 + single_attention: 0 script: - make bender - make sim VSIM_FLAGS=-c s=$S e=$E p=$P f=$F bias=1 activation=$activation no_stalls=$no_stalls single_attention=$single_attention diff --git a/PyITA/debug.py b/PyITA/debug.py deleted file mode 100644 index 3cb9d7a..0000000 --- a/PyITA/debug.py +++ /dev/null @@ -1,39 +0,0 @@ -import os -import numpy as np -import seaborn as sns -import matplotlib.pyplot as plt - - -def print_matrix(from_txt: bool, - cut: bool = False, - matrix: np.array = None, - txt_file: str = 'Qp_0.txt', - test_vector: str = 'data_S30_E64_P64_F64_H1_B1', - row: int = 64, col: int = 64): - - if (from_txt): - current_dir = os.path.dirname(os.path.abspath(__file__)) - filepath = os.path.join(os.path.dirname(current_dir), - 'simvectors', - test_vector, - 'standalone', - txt_file) - - array = np.loadtxt(filepath) - if (cut): - array = array[:4096] - matrix = array.reshape(row, col) - - sns.set_theme() - sns.heatmap(matrix, annot=False, linewidths=0, linecolor='white', cmap='crest', xticklabels=False, yticklabels=False) - plt.title(txt_file) - plt.xlabel(col) - plt.ylabel(row) - plt.show() - -# print_matrix(from_txt=True, txt_file="A_soft_0.txt") - - - - - From 55ac72669b6326a4d6de2059334dd1c6057d889b Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Fri, 8 Nov 2024 14:43:54 +0100 Subject: [PATCH 22/60] Added license on top sim_ita_tb_wave_important.tcl --- .gitlab-ci.yml | 3 +- modelsim/sim_ita_tb_wave_important.tcl | 4 + modelsim/sim_ita_tb_wave_makant.tcl | 236 ------------------------- 3 files changed, 5 insertions(+), 238 deletions(-) delete mode 100644 modelsim/sim_ita_tb_wave_makant.tcl diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 63ac46b..305275f 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -34,7 +34,6 @@ generate_testvectors: - python testGenerator.py -H 1 -S 63 -E 62 -P 61 -F 61 --activation relu --no-bias --skip-vector-validation - python testGenerator.py -H 1 -S 65 -E 130 -P 195 -F 195 --activation relu --no-bias --skip-vector-validation - python testGenerator.py -H 1 -S 127 -E 190 -P 253 -F 253 --activation relu --no-bias --skip-vector-validation - - python testGenerator.py -H 1 -S 511 -E 511 -P 127 -F 63 --activation relu --skip-vector-validation - python testGenerator.py -H 1 -S 63 -E 63 -P 50 -F 129 --activation gelu --skip-vector-validation - python testGenerator.py -H 1 -S 255 -E 63 -P 511 -F 511 --activation identity --skip-vector-validation @@ -136,7 +135,7 @@ run_sim_padding: # no_stalls: 0 # single_attention: 0 # - S: 127 - # E: 190gelu + # E: 190 # P: 253 # F: 253 # activation: relu diff --git a/modelsim/sim_ita_tb_wave_important.tcl b/modelsim/sim_ita_tb_wave_important.tcl index 7ddab73..6513e4c 100644 --- a/modelsim/sim_ita_tb_wave_important.tcl +++ b/modelsim/sim_ita_tb_wave_important.tcl @@ -1,3 +1,7 @@ +# Copyright 2023 ETH Zurich and University of Bologna. +# Licensed under the Apache License, Version 2.0, see LICENSE for details. +# SPDX-License-Identifier: Apache-2.0 + onerror {resume} quietly WaveActivateNextPane {} 0 add wave -noupdate /ita_tb/dut/i_inp1_mux/clk_i diff --git a/modelsim/sim_ita_tb_wave_makant.tcl b/modelsim/sim_ita_tb_wave_makant.tcl deleted file mode 100644 index d79b638..0000000 --- a/modelsim/sim_ita_tb_wave_makant.tcl +++ /dev/null @@ -1,236 +0,0 @@ -onerror {resume} -quietly WaveActivateNextPane {} 0 -add wave -noupdate /ita_tb/dut/i_inp1_mux/clk_i -add wave -noupdate /ita_tb/dut/i_inp1_mux/rst_ni -add wave -noupdate /ita_tb/dut/i_inp1_mux/inp_i -add wave -noupdate /ita_tb/dut/i_inp1_mux/inp1_o -add wave -noupdate /ita_tb/dut/i_inp2_mux/rst_ni -add wave -noupdate /ita_tb/dut/i_inp2_mux/weight_i -add wave -noupdate /ita_tb/dut/i_inp2_mux/inp2_o -add wave -noupdate /ita_tb/dut/i_controller/ctrl_i -add wave -noupdate /ita_tb/dut/inp1_q -add wave -noupdate /ita_tb/dut/inp2_q -add wave -noupdate /ita_tb/dut/oup_o -add wave -noupdate /ita_tb/dut/inp_bias -add wave -noupdate /ita_tb/dut/inp_bias_pad_q1 -add wave -noupdate /ita_tb/dut/inp_bias_q2 -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/count_d -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/count_q -add wave -noupdate /ita_tb/dut/i_inp2_mux/clk_i -add wave -noupdate -expand -group Calc_en /ita_tb/dut/calc_en -add wave -noupdate -expand -group Calc_en /ita_tb/dut/calc_en_q1 -add wave -noupdate -expand -group Calc_en /ita_tb/dut/calc_en_q2 -add wave -noupdate -expand -group Calc_en /ita_tb/dut/calc_en_q3 -add wave -noupdate -expand -group Calc_en /ita_tb/dut/calc_en_q4 -add wave -noupdate -expand -group Calc_en /ita_tb/dut/calc_en_q5 -add wave -noupdate -expand -group Calc_en /ita_tb/dut/calc_en_q6 -add wave -noupdate -expand -group Calc_en /ita_tb/dut/calc_en_q7 -add wave -noupdate -expand -group Calc_en /ita_tb/dut/calc_en_q8 -add wave -noupdate -expand -group Calc_en /ita_tb/dut/calc_en_q9 -add wave -noupdate -expand -group Calc_en /ita_tb/dut/calc_en_q10 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/clk_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/rst_ni -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mode_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/eps_mult_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/right_shift_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_q_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/result_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_o -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mult_signed -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/product -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_added -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_d -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_q -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q1 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q2 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q3 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q4 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_d -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/clk_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/rst_ni -add wave -noupdate -group Controller /ita_tb/dut/i_controller/ctrl_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_valid_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_ready_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/weight_valid_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/weight_ready_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_valid_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_ready_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/oup_valid_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/oup_ready_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/pop_softmax_fifo_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/soft_addr_div_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_done_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/calc_en_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_inner_tile_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/last_inner_tile_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_pad_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_pad_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/calc_en_q1_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_tile_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_tile_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_soft_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_soft_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_pad_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_pad_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_dim -add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_outer_dim -add wave -noupdate -group Controller /ita_tb/dut/i_controller/second_outer_dim -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_fifo -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div_done_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div_done_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/clk_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/rst_ni -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/ctrl_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/step_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/soft_addr_div_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/softmax_done_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_softmax_fifo_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_inp_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_oup_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_data_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_data_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/prev_max_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_data_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_data_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_x_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q3 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q4 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q3 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q4 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_diff -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_diff -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp_diff -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q3 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_full -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_empty -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/push_to_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_from_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_to_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_from_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_usage -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_row -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_col -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/clk_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/rst_ni -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_q_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_q_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_q_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/oup_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/inp_bias_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_o -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_en -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data_unused -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_en -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_data -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_d -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_q -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_d -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_q -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_d -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_q -TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Wrong Output} {2784600 ps} 1} {{Start of Calc} {2775007 ps} 1} {{Calc finish} {2783000 ps} 1} {{Cursor 4} {2783576 ps} 0} -quietly wave cursor active 4 -configure wave -namecolwidth 150 -configure wave -valuecolwidth 100 -configure wave -justifyvalue left -configure wave -signalnamewidth 1 -configure wave -snapdistance 10 -configure wave -datasetprefix 0 -configure wave -rowmargin 4 -configure wave -childrowmargin 2 -configure wave -gridoffset 0 -configure wave -gridperiod 1 -configure wave -griddelta 40 -configure wave -timeline 0 -configure wave -timelineunits ns -update -WaveRestoreZoom {2768202 ps} {2794772 ps} From bf274888cfdead82784b691089d0d8b27a919d48 Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Fri, 8 Nov 2024 17:31:59 +0100 Subject: [PATCH 23/60] Pipelining test --- .gitlab-ci.yml | 62 ++++++++++++++++++++++++++------------------------ 1 file changed, 32 insertions(+), 30 deletions(-) diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 305275f..db718b4 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -26,17 +26,17 @@ generate_testvectors: stage: test script: - !reference [.setup_test, script] - - python testGenerator.py -H 1 -S 64 -E 64 -P 64 -F 64 --activation gelu --skip-vector-validation - - python testGenerator.py -H 1 -S 128 -E 192 -P 256 -F 256 --activation gelu --skip-vector-validation - - python testGenerator.py -H 1 -S 192 -E 256 -P 128 -F 128 --activation relu --skip-vector-validation - - python testGenerator.py -H 1 -S 1 -E 2 -P 3 -F 3 --activation gelu --no-bias --skip-vector-validation - - python testGenerator.py -H 1 -S 1 -E 2 -P 3 -F 3 --activation relu --no-bias --skip-vector-validation - - python testGenerator.py -H 1 -S 63 -E 62 -P 61 -F 61 --activation relu --no-bias --skip-vector-validation - - python testGenerator.py -H 1 -S 65 -E 130 -P 195 -F 195 --activation relu --no-bias --skip-vector-validation - - python testGenerator.py -H 1 -S 127 -E 190 -P 253 -F 253 --activation relu --no-bias --skip-vector-validation - - python testGenerator.py -H 1 -S 511 -E 511 -P 127 -F 63 --activation relu --skip-vector-validation - - python testGenerator.py -H 1 -S 63 -E 63 -P 50 -F 129 --activation gelu --skip-vector-validation - - python testGenerator.py -H 1 -S 255 -E 63 -P 511 -F 511 --activation identity --skip-vector-validation + # - python testGenerator.py -H 1 -S 64 -E 64 -P 64 -F 64 --activation gelu --skip-vector-validation + # - python testGenerator.py -H 1 -S 128 -E 192 -P 256 -F 256 --activation gelu --skip-vector-validation + # - python testGenerator.py -H 1 -S 192 -E 256 -P 128 -F 128 --activation relu --skip-vector-validation + # - python testGenerator.py -H 1 -S 1 -E 2 -P 3 -F 3 --activation gelu --no-bias --skip-vector-validation + # - python testGenerator.py -H 1 -S 1 -E 2 -P 3 -F 3 --activation relu --no-bias --skip-vector-validation + # - python testGenerator.py -H 1 -S 63 -E 62 -P 61 -F 61 --activation relu --no-bias --skip-vector-validation + # - python testGenerator.py -H 1 -S 65 -E 130 -P 195 -F 195 --activation relu --no-bias --skip-vector-validation + # - python testGenerator.py -H 1 -S 127 -E 190 -P 253 -F 253 --activation relu --no-bias --skip-vector-validation + # - python testGenerator.py -H 1 -S 511 -E 511 -P 127 -F 63 --activation relu --skip-vector-validation + # - python testGenerator.py -H 1 -S 63 -E 63 -P 50 -F 129 --activation gelu --skip-vector-validation + # - python testGenerator.py -H 1 -S 255 -E 63 -P 511 -F 511 --activation identity --skip-vector-validation artifacts: paths: - simvectors @@ -108,11 +108,13 @@ run_sim_padding: - generate_testvectors parallel: matrix: - # - S: 1 - # E: 2 - # P: 3 - # F: 3 - # activation: gelu + - S: 1 + E: 2 + P: 3 + F: 3 + activation: gelu + no_stalls: 0 + single_attention: 0 - S: 1 E: 2 P: 3 @@ -127,20 +129,20 @@ run_sim_padding: activation: relu no_stalls: 0 single_attention: 0 - # - S: 65 - # E: 130 - # P: 195 - # F: 195 - # activation: relu - # no_stalls: 0 - # single_attention: 0 - # - S: 127 - # E: 190 - # P: 253 - # F: 253 - # activation: relu - # no_stalls: 0 - # single_attention: 0 + - S: 65 + E: 130 + P: 195 + F: 195 + activation: relu + no_stalls: 0 + single_attention: 0 + - S: 127 + E: 190 + P: 253 + F: 253 + activation: relu + no_stalls: 0 + single_attention: 0 - S: 511 E: 511 P: 127 From 83290ae51f84305d440ebca4ad61cef1cb7d3b8e Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Fri, 8 Nov 2024 17:39:01 +0100 Subject: [PATCH 24/60] Changed bias for test vectors in gitlab-ci --- .gitlab-ci.yml | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index db718b4..2c97e25 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -26,17 +26,17 @@ generate_testvectors: stage: test script: - !reference [.setup_test, script] - # - python testGenerator.py -H 1 -S 64 -E 64 -P 64 -F 64 --activation gelu --skip-vector-validation - # - python testGenerator.py -H 1 -S 128 -E 192 -P 256 -F 256 --activation gelu --skip-vector-validation - # - python testGenerator.py -H 1 -S 192 -E 256 -P 128 -F 128 --activation relu --skip-vector-validation - # - python testGenerator.py -H 1 -S 1 -E 2 -P 3 -F 3 --activation gelu --no-bias --skip-vector-validation - # - python testGenerator.py -H 1 -S 1 -E 2 -P 3 -F 3 --activation relu --no-bias --skip-vector-validation - # - python testGenerator.py -H 1 -S 63 -E 62 -P 61 -F 61 --activation relu --no-bias --skip-vector-validation - # - python testGenerator.py -H 1 -S 65 -E 130 -P 195 -F 195 --activation relu --no-bias --skip-vector-validation - # - python testGenerator.py -H 1 -S 127 -E 190 -P 253 -F 253 --activation relu --no-bias --skip-vector-validation - # - python testGenerator.py -H 1 -S 511 -E 511 -P 127 -F 63 --activation relu --skip-vector-validation - # - python testGenerator.py -H 1 -S 63 -E 63 -P 50 -F 129 --activation gelu --skip-vector-validation - # - python testGenerator.py -H 1 -S 255 -E 63 -P 511 -F 511 --activation identity --skip-vector-validation + - python testGenerator.py -H 1 -S 64 -E 64 -P 64 -F 64 --activation gelu --skip-vector-validation + - python testGenerator.py -H 1 -S 128 -E 192 -P 256 -F 256 --activation gelu --skip-vector-validation + - python testGenerator.py -H 1 -S 192 -E 256 -P 128 -F 128 --activation relu --skip-vector-validation + - python testGenerator.py -H 1 -S 1 -E 2 -P 3 -F 3 --activation gelu --skip-vector-validation + - python testGenerator.py -H 1 -S 1 -E 2 -P 3 -F 3 --activation relu --skip-vector-validation + - python testGenerator.py -H 1 -S 63 -E 62 -P 61 -F 61 --activation relu --skip-vector-validation + - python testGenerator.py -H 1 -S 65 -E 130 -P 195 -F 195 --activation relu --skip-vector-validation + - python testGenerator.py -H 1 -S 127 -E 190 -P 253 -F 253 --activation relu --skip-vector-validation + - python testGenerator.py -H 1 -S 511 -E 511 -P 127 -F 63 --activation relu --skip-vector-validation + - python testGenerator.py -H 1 -S 63 -E 63 -P 50 -F 129 --activation gelu --skip-vector-validation + - python testGenerator.py -H 1 -S 255 -E 63 -P 511 -F 511 --activation identity --skip-vector-validation artifacts: paths: - simvectors From 3db2ff7bc0dae34b7468df0173ec984b9c99cf8a Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Mon, 18 Nov 2024 16:51:22 +0100 Subject: [PATCH 25/60] Fixed synthesize errors --- src/ita_controller.sv | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/src/ita_controller.sv b/src/ita_controller.sv index 5f5bc9d..74de76a 100644 --- a/src/ita_controller.sv +++ b/src/ita_controller.sv @@ -84,9 +84,7 @@ module ita_controller step_d = step_q; softmax_tile_d = softmax_tile_q; softmax_div_done_d = softmax_div_done_q; - requant_add_d = {N {requant_add_i}}; last_time = 1'b0; - inp_bias = inp_bias_i; busy_d = busy_q; softmax_fifo = 1'b0; @@ -347,6 +345,8 @@ module ita_controller end endcase + inp_bias = inp_bias_i; + requant_add_d = {N {requant_add_i}}; bias_count = (count_q == 0) ? 255 : count_q - 1; bias_tile_x_d = (count_q == 0) ? bias_tile_x_q : tile_x_q; bias_tile_y_d = (count_q == 0) ? bias_tile_y_q : tile_y_q; @@ -363,9 +363,11 @@ module ita_controller end else begin if ( ((bias_count) + bias_tile_x_d * M*M/N) >= (second_outer_dim_d / N) * M ) begin if ( (((bias_count) / M) * N + bias_tile_x_d * M ) < second_outer_dim_d) begin - for (int i = (second_outer_dim_d & (N-1)); i < N; i++) begin - requant_add_d[i] = 1'b0; - inp_bias[i] = 1'b0; + for (int i = 0; i < N; i++) begin + if (i >= (second_outer_dim_d & (N-1))) begin + requant_add_d[i] = 1'b0; + inp_bias[i] = 1'b0; + end end end else begin requant_add_d = {N {1'b0}}; From 0ec7089a389dcfde07fd85f4c86f5117fb6fa829 Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Mon, 18 Nov 2024 16:59:01 +0100 Subject: [PATCH 26/60] Fixed synthesize error --- src/ita_controller.sv | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/ita_controller.sv b/src/ita_controller.sv index 74de76a..28e1885 100644 --- a/src/ita_controller.sv +++ b/src/ita_controller.sv @@ -57,7 +57,7 @@ module ita_controller logic [WO-WI*2-2:0] second_outer_dim_d, second_outer_dim_q; logic softmax_fifo, softmax_div, softmax_div_done_d, softmax_div_done_q, busy_d, busy_q; - requant_oup_t requant_add_d, requant_add_q; + requant_oup_t requant_add, requant_add_d, requant_add_q; assign step_o = step_q; assign busy_o = busy_q; @@ -85,6 +85,7 @@ module ita_controller softmax_tile_d = softmax_tile_q; softmax_div_done_d = softmax_div_done_q; last_time = 1'b0; + requant_add = {N {requant_add_i}}; busy_d = busy_q; softmax_fifo = 1'b0; @@ -346,7 +347,7 @@ module ita_controller endcase inp_bias = inp_bias_i; - requant_add_d = {N {requant_add_i}}; + requant_add_d = requant_add; bias_count = (count_q == 0) ? 255 : count_q - 1; bias_tile_x_d = (count_q == 0) ? bias_tile_x_q : tile_x_q; bias_tile_y_d = (count_q == 0) ? bias_tile_y_q : tile_y_q; @@ -367,6 +368,9 @@ module ita_controller if (i >= (second_outer_dim_d & (N-1))) begin requant_add_d[i] = 1'b0; inp_bias[i] = 1'b0; + end else begin + requant_add_d[i] = requant_add[i]; + inp_bias[i] = inp_bias_i[i]; end end end else begin From 510b2430e1977f3dc357098510b479e6cccbfb31 Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Thu, 14 Nov 2024 19:45:14 +0100 Subject: [PATCH 27/60] Started to add the triangular mask logic --- PyITA/ITA.py | 39 +++++++++++++++++++++++++++++++++++---- src/ita_controller.sv | 27 ++++++++++++++++++++++++++- src/ita_package.sv | 6 ++++++ src/tb/ita_tb.sv | 12 +++++++++++- testGenerator.py | 10 +++++++++- 5 files changed, 87 insertions(+), 7 deletions(-) diff --git a/PyITA/ITA.py b/PyITA/ITA.py index 8c304f6..e60af21 100644 --- a/PyITA/ITA.py +++ b/PyITA/ITA.py @@ -574,18 +574,47 @@ def step3_Vp(self): # Compute Vp in transposed form self.tiler_V(self.V, self.Wv, self.Bv, self.Vp_requant, "V", "Wv", "Bv", "Vp") - def step4_QK(self, no_partial_softmax): + def step4_QK(self, no_partial_softmax, mask, index): self.A = np.array( [np.matmul(self.Qp_requant[i], np.transpose(self.Kp_requant[i]), dtype = np.int32) for i in range(self.H)]) - self.A = np.clip(self.A, -2**(self.WO - 1), 2**(self.WO - 1) - 1) - self.A_requant = requantize(self.A, self.requant_eps_mult[3], self.requant_right_shift[3], self.requant_add[3]) if (self.S_ITA - self.S) > 0: self.A_requant[:, -(self.S_ITA - self.S):, :] = 0 self.A_requant[:, :, -(self.S_ITA - self.S):] = 0 + #Adjustments for Masked Attention + if (mask == 'UpperTriangular'): + print(self.A.shape) + # Iterate through all rows starting at the provided starting index + col_count = 0 + for h in np.arange(0, self.A.shape[0]): + for i in np.arange(index - 1, self.A.shape[2]): + col_count += 1 + for j in np.arange(0, col_count): + self.A[h][j][i] = np.iinfo(np.int32).min + elif(mask == 'LowerTriangular'): + pass + elif(mask == 'none'): + pass + else: + raise ValueError("Mask not supported") + + matrix = np.squeeze(self.A) + plt.imshow(matrix, cmap='viridis') + plt.colorbar() + plt.title("Matrix A") + plt.show() + + self.A = np.clip(self.A, -2**(self.WO - 1), 2**(self.WO - 1) - 1) + self.A_requant = requantize(self.A, self.requant_eps_mult[3], self.requant_right_shift[3], self.requant_add[3]) self.soft(no_partial_softmax) + matrix = np.squeeze(self.A_partial_softmax) + plt.imshow(matrix, cmap='viridis') + plt.colorbar() + plt.title("Matrix A") + plt.show() + self.tiler_AV(self.Qp_requant, self.Kp_requant, self.A_requant, "Qp_in", "Kp_in", "A") def soft(self, no_partial_softmax = False): @@ -1035,6 +1064,8 @@ def generateTestVectors(path, **kwargs): f = kwargs['F'] h = kwargs['H'] activation = kwargs['activation'] + mask = kwargs['mask'] + index = kwargs['i'] bias = int(not kwargs['no_bias']) export_snitch_cluster = kwargs['export_snitch_cluster'] export_mempool = kwargs['export_mempool'] @@ -1047,7 +1078,7 @@ def generateTestVectors(path, **kwargs): acc1.step1_Qp() acc1.step2_Kp() acc1.step3_Vp() - acc1.step4_QK(kwargs['no_partial_softmax']) + acc1.step4_QK(kwargs['no_partial_softmax'], mask, index) acc1.step5_AV() acc1.step6_O() acc1.step7_Osum() diff --git a/src/ita_controller.sv b/src/ita_controller.sv index 28e1885..c9672e2 100644 --- a/src/ita_controller.sv +++ b/src/ita_controller.sv @@ -40,6 +40,7 @@ module ita_controller step_e step_d, step_q; counter_t count_d, count_q, bias_count; + counter_t mask_count_d, mask_count_q; counter_t tile_d, tile_q; counter_t inner_tile_d, inner_tile_q; counter_t tile_x_d, tile_x_q, bias_tile_x_d, bias_tile_x_q; @@ -86,6 +87,7 @@ module ita_controller softmax_div_done_d = softmax_div_done_q; last_time = 1'b0; requant_add = {N {requant_add_i}}; + mask_count_d = (step_q == AV) ? mask_count_q : ctrl_i.mask_start_index; busy_d = busy_q; softmax_fifo = 1'b0; @@ -380,9 +382,30 @@ module ita_controller end end end - inp_bias_padded = inp_bias; + case (ctrl_i.mask_type) + None: + UpperTriangular: begin + if (step_q == AV) begin + if ((bias_count + (bias_tile_x_d * M*M/N)) >= (mask_count_q / N) * M) begin + + end else begin + mask_count_d = ((mask_count_q & N) == N) ? mask_count_q + M : mask_count_q; + end + if (((bias_count / M) * N + bias_tile_x_d * M) < mask_count_q) begin + for (int i = (second_outer_dim_d & (N-1)); i < N; i++) begin + + end + end else begin + + end + end + end + end + LowerTriangular: + endcase + if (inp_valid_i && inp_ready_o && oup_valid_i && oup_ready_i && last_inner_tile_o) begin ongoing_d = ongoing_q; end else if (inp_valid_i && inp_ready_o && last_inner_tile_o) begin @@ -417,6 +440,7 @@ module ita_controller bias_tile_y_q <= '0; first_outer_dim_q <= '0; second_outer_dim_q <= '0; + mask_count_q <= '0; end else begin step_q <= step_d; count_q <= count_d; @@ -434,6 +458,7 @@ module ita_controller bias_tile_y_q <= bias_tile_y_d; first_outer_dim_q <= first_outer_dim_d; second_outer_dim_q <= second_outer_dim_d; + mask_count_q <= mask_count_d; end end endmodule diff --git a/src/ita_package.sv b/src/ita_package.sv index 3a2c25f..eeeb1c4 100644 --- a/src/ita_package.sv +++ b/src/ita_package.sv @@ -40,6 +40,10 @@ package ita_package; typedef logic signed [GELU_CONSTANTS_WIDTH-1:0] gelu_const_t; typedef logic signed [GELU_OUT_WIDTH-1:0] gelu_out_t; + // Masking + typedef enum {None=0, UpperTriangular=1, LowerTriangular=2} mask_e; + typedef logic [WO-WI*2-2:0] mask_index_t; + // IO typedef logic [EMS-1:0] requant_const_t; typedef logic [N_REQUANT_CONSTS-1:0][EMS-1:0] requant_const_array_t; @@ -56,6 +60,8 @@ package ita_package; proj_space_t proj_space ; embed_size_t embed_size ; ff_size_t ff_size ; + mask_e mask_type ; + mask_index_t mask_start_index; layer_e layer ; activation_e activation ; requant_const_array_t eps_mult ; diff --git a/src/tb/ita_tb.sv b/src/tb/ita_tb.sv index 1b2a077..fb66e26 100644 --- a/src/tb/ita_tb.sv +++ b/src/tb/ita_tb.sv @@ -46,6 +46,8 @@ module ita_tb; integer N_TILES_INNER_DIM_LINEAR_PROJECTION[N_PHASES]; integer N_ATTENTION_TILE_ROWS, N_GROUPS; activation_e ACTIVATION; + mask_e MASK; + integer MASK_START_INDEX; // Signals logic clk, rst_n; @@ -76,6 +78,8 @@ module ita_tb; EMBEDDING_SIZE = `ifdef EMBED_SIZE `EMBED_SIZE `else M_TILE_LEN `endif; FEEDFORWARD_SIZE = `ifdef FF_SIZE `FF_SIZE `else M_TILE_LEN `endif; ACTIVATION = activation_e'(`ifdef ACTIVATION `ACTIVATION `else Identity `endif); + MASK = mask_e'(`ifdef MASK `MASK `else None `endif); + MASK_START_INDEX = `ifdef MASK_START_INDEX `MASK_START_INDEX `else 0 `endif; simdir = { "../../simvectors/data_S", @@ -89,7 +93,11 @@ module ita_tb; "_H1_B", $sformatf("%0d", `ifdef BIAS `BIAS `else 0 `endif), "_", - $sformatf( "%s", ACTIVATION) + $sformatf("%s", ACTIVATION), + "_", + $sformatf("%s", MASK), + "_I", + $sformatf("%0d", MASK_START_INDEX) }; // Round up N_TILES_SEQUENCE_DIM = (SEQUENCE_LEN + M_TILE_LEN -1 ) / M_TILE_LEN; @@ -494,6 +502,8 @@ task automatic apply_ITA_weights(input integer phase); ita_ctrl.proj_space = PROJECTION_SPACE; ita_ctrl.embed_size = EMBEDDING_SIZE; ita_ctrl.ff_size = FEEDFORWARD_SIZE; + ita_ctrl.mask_type = MASK; + ita_ctrl.mask_index = MASK_START_INDEX; read_activation_constants(ita_ctrl.gelu_b, ita_ctrl.gelu_c, ita_ctrl.activation_requant_mult, ita_ctrl.activation_requant_shift, ita_ctrl.activation_requant_add); diff --git a/testGenerator.py b/testGenerator.py index 0c94a55..f23451b 100644 --- a/testGenerator.py +++ b/testGenerator.py @@ -48,7 +48,9 @@ def generateMHA(**args): NO_BIAS = args['no_bias'] NO_PARTIAL_SOFTMAX = args['no_partial_softmax'] ACTIVATION = args['activation'].capitalize() - base_path = f'{current_dir}/simvectors/data_S{S}_E{E}_P{P}_F{F}_H{H}_B{int(not NO_BIAS)}_{ACTIVATION}' + MASK = args['mask'].capitalize() + INDEX = args['i'].capitalize() + base_path = f'{current_dir}/simvectors/data_S{S}_E{E}_P{P}_F{F}_H{H}_B{int(not NO_BIAS)}_{ACTIVATION}_{MASK}_i{INDEX}' if NO_PARTIAL_SOFTMAX: path = f'{base_path}_noPartialSoftmax/' @@ -102,6 +104,12 @@ class ArgumentDefaultMetavarTypeFormatter(argparse.ArgumentDefaultsHelpFormatter type = str, help = 'Activation function', choices = ['gelu', 'relu', 'identity']) + self.group1.add_argument('--mask', + default = 'none', + type = str, + help = 'Attention-Mask', + choices = ['none', 'UpperTriangular', 'LowerTriangular']) + self.group1.add_argument('--i', default = 1, type = int, help = 'Masking starting index') self.group1.add_argument('--no-partial-softmax', action = 'store_true', help = 'Disable partial softmax calculation') From 3a61237dee4dc31657879d38e896c1c6fc676f48 Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Sat, 16 Nov 2024 15:21:44 +0100 Subject: [PATCH 28/60] Upper triangular mask works for one tile --- Makefile | 14 +- PyITA/ITA.py | 14 +- modelsim/sim_ita_tb_wave.tcl | 26 +-- modelsim/sim_ita_tb_wave_important.tcl | 215 ++++++++++++++----------- src/ita.sv | 6 +- src/ita_controller.sv | 69 +++++--- src/tb/ita_tb.sv | 4 +- testGenerator.py | 10 +- 8 files changed, 207 insertions(+), 151 deletions(-) diff --git a/Makefile b/Makefile index f85f76b..9ea7478 100644 --- a/Makefile +++ b/Makefile @@ -35,7 +35,19 @@ else ifeq ($(activation), relu) else activation_int = 0 endif -vlog_defs += -DNO_STALLS=$(no_stalls) -DSINGLE_ATTENTION=$(single_attention) -DSEQ_LENGTH=$(s) -DEMBED_SIZE=$(e) -DPROJ_SPACE=$(p) -DFF_SIZE=$(f) -DBIAS=$(bias) -DACTIVATION=$(activation_int) + +mask ?= none +ifeq ($(mask), Upper_Triangular) + mask_int = 1 +else ifeq ($(mask), Lower_Triangular) + mask_int = 2 +else + mask_int = 0 +endif + +i ?= 1 + +vlog_defs += -DNO_STALLS=$(no_stalls) -DSINGLE_ATTENTION=$(single_attention) -DSEQ_LENGTH=$(s) -DEMBED_SIZE=$(e) -DPROJ_SPACE=$(p) -DFF_SIZE=$(f) -DBIAS=$(bias) -DACTIVATION=$(activation_int) -DMASK=$(mask_int) -DMASK_INDEX=$(i) ifeq ($(target), sim_ita_hwpe_tb) BENDER_TARGETS += -t ita_hwpe -t ita_hwpe_test diff --git a/PyITA/ITA.py b/PyITA/ITA.py index e60af21..9fa93da 100644 --- a/PyITA/ITA.py +++ b/PyITA/ITA.py @@ -578,12 +578,9 @@ def step4_QK(self, no_partial_softmax, mask, index): self.A = np.array( [np.matmul(self.Qp_requant[i], np.transpose(self.Kp_requant[i]), dtype = np.int32) for i in range(self.H)]) - if (self.S_ITA - self.S) > 0: - self.A_requant[:, -(self.S_ITA - self.S):, :] = 0 - self.A_requant[:, :, -(self.S_ITA - self.S):] = 0 #Adjustments for Masked Attention - if (mask == 'UpperTriangular'): + if (mask == 'Upper_Triangular'): print(self.A.shape) # Iterate through all rows starting at the provided starting index col_count = 0 @@ -592,7 +589,7 @@ def step4_QK(self, no_partial_softmax, mask, index): col_count += 1 for j in np.arange(0, col_count): self.A[h][j][i] = np.iinfo(np.int32).min - elif(mask == 'LowerTriangular'): + elif(mask == 'Lower_Triangular'): pass elif(mask == 'none'): pass @@ -607,6 +604,11 @@ def step4_QK(self, no_partial_softmax, mask, index): self.A = np.clip(self.A, -2**(self.WO - 1), 2**(self.WO - 1) - 1) self.A_requant = requantize(self.A, self.requant_eps_mult[3], self.requant_right_shift[3], self.requant_add[3]) + + if (self.S_ITA - self.S) > 0: + self.A_requant[:, -(self.S_ITA - self.S):, :] = 0 + self.A_requant[:, :, -(self.S_ITA - self.S):] = 0 + self.soft(no_partial_softmax) matrix = np.squeeze(self.A_partial_softmax) @@ -1065,7 +1067,7 @@ def generateTestVectors(path, **kwargs): h = kwargs['H'] activation = kwargs['activation'] mask = kwargs['mask'] - index = kwargs['i'] + index = kwargs['I'] bias = int(not kwargs['no_bias']) export_snitch_cluster = kwargs['export_snitch_cluster'] export_mempool = kwargs['export_mempool'] diff --git a/modelsim/sim_ita_tb_wave.tcl b/modelsim/sim_ita_tb_wave.tcl index 072c1cd..f9354eb 100644 --- a/modelsim/sim_ita_tb_wave.tcl +++ b/modelsim/sim_ita_tb_wave.tcl @@ -17,21 +17,21 @@ add wave -noupdate /ita_tb/dut/inp2_q add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/count_d add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/count_q add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/bias_count -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/bias_tile_x_d -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/bias_tile_x_q -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/bias_tile_y_d -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/bias_tile_y_q -add wave -noupdate -expand -group Requant /ita_tb/dut/i_controller/requant_add_i -add wave -noupdate -expand -group Requant /ita_tb/dut/i_controller/requant_add_o -add wave -noupdate -expand -group Requant /ita_tb/dut/i_controller/step_q -add wave -noupdate -expand -group Bias /ita_tb/dut/inp_bias -add wave -noupdate -expand -group Bias /ita_tb/dut/inp_bias_padded -add wave -noupdate -expand -group Bias /ita_tb/dut/inp_bias_q1 -add wave -noupdate -expand -group Bias /ita_tb/dut/inp_bias_q2 +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_pos_q +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_count_q1 +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_count_q2 +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_count_q3 +add wave -noupdate -group Requant /ita_tb/dut/i_controller/requant_add_i +add wave -noupdate -group Requant /ita_tb/dut/i_controller/requant_add_o +add wave -noupdate -group Requant /ita_tb/dut/i_controller/step_q +add wave -noupdate -group Bias /ita_tb/dut/inp_bias +add wave -noupdate -group Bias /ita_tb/dut/inp_bias_padded +add wave -noupdate -group Bias /ita_tb/dut/inp_bias_q1 +add wave -noupdate -group Bias /ita_tb/dut/inp_bias_q2 add wave -noupdate /ita_tb/dut/i_accumulator/oup_i add wave -noupdate /ita_tb/dut/i_accumulator/result_d -add wave -noupdate /ita_tb/dut/i_accumulator/result_o -add wave -noupdate /ita_tb/dut/i_requantizer/requant_oup_o +add wave -noupdate /ita_tb/dut/i_controller/accumulator_oup_i +add wave -noupdate /ita_tb/dut/masked_acc_oup add wave -noupdate /ita_tb/dut/i_activation/data_i add wave -noupdate /ita_tb/dut/i_activation/data_q1 add wave -noupdate /ita_tb/dut/i_activation/data_q2 diff --git a/modelsim/sim_ita_tb_wave_important.tcl b/modelsim/sim_ita_tb_wave_important.tcl index 6513e4c..6042363 100644 --- a/modelsim/sim_ita_tb_wave_important.tcl +++ b/modelsim/sim_ita_tb_wave_important.tcl @@ -1,34 +1,35 @@ -# Copyright 2023 ETH Zurich and University of Bologna. -# Licensed under the Apache License, Version 2.0, see LICENSE for details. -# SPDX-License-Identifier: Apache-2.0 - onerror {resume} quietly WaveActivateNextPane {} 0 add wave -noupdate /ita_tb/dut/i_inp1_mux/clk_i add wave -noupdate /ita_tb/dut/i_inp1_mux/rst_ni add wave -noupdate /ita_tb/dut/i_inp1_mux/inp_i add wave -noupdate /ita_tb/dut/i_inp1_mux/inp1_o +add wave -noupdate /ita_tb/dut/i_inp2_mux/clk_i add wave -noupdate /ita_tb/dut/i_inp2_mux/rst_ni add wave -noupdate /ita_tb/dut/i_inp2_mux/weight_i add wave -noupdate /ita_tb/dut/i_inp2_mux/inp2_o add wave -noupdate /ita_tb/dut/i_controller/ctrl_i +add wave -noupdate /ita_tb/dut/oup_o add wave -noupdate /ita_tb/dut/inp1_q add wave -noupdate /ita_tb/dut/inp2_q -add wave -noupdate /ita_tb/dut/i_inp2_mux/clk_i add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/count_d add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/count_q -add wave -noupdate /ita_tb/dut/calc_en -add wave -noupdate /ita_tb/dut/calc_en_q1 -add wave -noupdate /ita_tb/dut/calc_en_q2 -add wave -noupdate /ita_tb/dut/calc_en_q3 -add wave -noupdate -expand -group Bias /ita_tb/dut/inp_bias -add wave -noupdate -expand -group Bias /ita_tb/dut/inp_bias_padded -add wave -noupdate -expand -group Bias /ita_tb/dut/inp_bias_q1 -add wave -noupdate -expand -group Bias /ita_tb/dut/inp_bias_q2 +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/bias_count +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_pos_q +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_count_q1 +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_count_q2 +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_count_q3 +add wave -noupdate -group Requant /ita_tb/dut/i_controller/requant_add_i +add wave -noupdate -group Requant /ita_tb/dut/i_controller/requant_add_o +add wave -noupdate -group Requant /ita_tb/dut/i_controller/step_q +add wave -noupdate -group Bias /ita_tb/dut/inp_bias +add wave -noupdate -group Bias /ita_tb/dut/inp_bias_padded +add wave -noupdate -group Bias /ita_tb/dut/inp_bias_q1 +add wave -noupdate -group Bias /ita_tb/dut/inp_bias_q2 add wave -noupdate /ita_tb/dut/i_accumulator/oup_i add wave -noupdate /ita_tb/dut/i_accumulator/result_d -add wave -noupdate /ita_tb/dut/i_accumulator/result_o -add wave -noupdate /ita_tb/dut/i_requantizer/requant_oup_o +add wave -noupdate /ita_tb/dut/i_controller/accumulator_oup_i +add wave -noupdate /ita_tb/dut/masked_acc_oup add wave -noupdate /ita_tb/dut/i_activation/data_i add wave -noupdate /ita_tb/dut/i_activation/data_q1 add wave -noupdate /ita_tb/dut/i_activation/data_q2 @@ -38,7 +39,6 @@ add wave -noupdate /ita_tb/dut/i_activation/data_o add wave -noupdate /ita_tb/dut/i_fifo/data_i add wave -noupdate /ita_tb/dut/i_fifo/data_o add wave -noupdate /ita_tb/dut/oup_o -add wave -noupdate -expand -group Softmax /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/clk_i add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/rst_ni add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mode_i @@ -46,6 +46,9 @@ add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/eps_mult_i add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/right_shift_i add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_i add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_q_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/result_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_o add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mult_signed add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/product add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_added @@ -57,62 +60,77 @@ add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q3 add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q4 add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_d add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_q -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/clk_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/rst_ni -add wave -noupdate -group Controller /ita_tb/dut/i_controller/ctrl_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_valid_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_ready_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/weight_valid_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/weight_ready_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_valid_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_ready_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/oup_valid_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/oup_ready_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/pop_softmax_fifo_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/soft_addr_div_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_done_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/calc_en_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_inner_tile_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/last_inner_tile_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_pad_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_tile_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_tile_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_soft_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_soft_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_padded -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_dim -add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_outer_dim -add wave -noupdate -group Controller /ita_tb/dut/i_controller/second_outer_dim -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_fifo -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div_done_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div_done_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/clk_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/rst_ni +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ctrl_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_ready_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_ready_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_ready_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_ready_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/pop_softmax_fifo_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/soft_addr_div_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_done_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_inner_tile_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_inner_tile_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_pad_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/accumulator_oup_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/accumulator_oup_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/count_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/count_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_count +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_padded +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/acc_oup +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/masked_acc_oup +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_time +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_dim +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_fifo +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_q add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/clk_i add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/rst_ni add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/ctrl_i @@ -200,31 +218,34 @@ add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softm add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_row add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_col -add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/clk_i -add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/rst_ni -add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/calc_en_i -add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/calc_en_q_i -add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/first_tile_i -add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/first_tile_q_i -add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/last_tile_i -add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/last_tile_q_i -add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/inp_bias_i -add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/read_en -add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/read_addr -add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/read_data -add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/read_data_unused -add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/write_en -add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/write_addr -add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/write_data -add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/read_addr_d -add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/read_addr_q -add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/write_addr_d -add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/write_addr_q -add wave -noupdate -expand -group Accumulator /ita_tb/dut/i_accumulator/result_q +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/clk_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/rst_ni +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_q_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_q_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_q_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/oup_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/inp_bias_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_o +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_en +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data_unused +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_en +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_data +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_d +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_q +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_d +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_q +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_d +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_q TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {414600 ps} 1} {{Cursor 2} {550600 ps} 1} {{Cursor 3} {710600 ps} 1} {{Cursor 4} {390540 ps} 0} -quietly wave cursor active 4 -configure wave -namecolwidth 176 +WaveRestoreCursors {{Cursor 1} {3910600 ps} 1} {{Cursor 2} {3866984 ps} 1} {{Cursor 3} {3862963 ps} 0} +quietly wave cursor active 3 +configure wave -namecolwidth 150 configure wave -valuecolwidth 100 configure wave -justifyvalue left configure wave -signalnamewidth 1 @@ -238,4 +259,4 @@ configure wave -griddelta 40 configure wave -timeline 0 configure wave -timelineunits ns update -WaveRestoreZoom {371422 ps} {416865 ps} +WaveRestoreZoom {3842774 ps} {3887382 ps} diff --git a/src/ita.sv b/src/ita.sv index 6a9c1a2..1d793ac 100644 --- a/src/ita.sv +++ b/src/ita.sv @@ -41,7 +41,7 @@ module ita inp_t inp, inp_stream_soft; weight_t inp1, inp1_q, inp2, inp2_q; bias_t inp_bias, inp_bias_padded, inp_bias_q1, inp_bias_q2; - oup_t oup, oup_q, accumulator_oup; + oup_t oup, oup_q, accumulator_oup, masked_acc_oup; requant_const_t requant_mult, requant_shift, activation_requant_mult, activation_requant_shift; requant_oup_t requant_oup; requant_t requant_add, activation_requant_add; @@ -203,6 +203,8 @@ module ita .requant_add_o (requant_add_o ), .inp_bias_i (inp_bias ), .inp_bias_pad_o (inp_bias_padded ), + .accumulator_oup_i (accumulator_oup ), + .accumulator_oup_o (masked_acc_oup ), .busy_o (busy_o ) ); @@ -298,7 +300,7 @@ module ita .calc_en_i ( calc_en_q4 && last_inner_tile_q4 ), .calc_en_q_i ( calc_en_q5 && last_inner_tile_q5 ), - .result_i ( accumulator_oup ), + .result_i ( masked_acc_oup ), .add_i ( requant_add_o ), .requant_oup_o( requant_oup ) ); diff --git a/src/ita_controller.sv b/src/ita_controller.sv index c9672e2..7c46358 100644 --- a/src/ita_controller.sv +++ b/src/ita_controller.sv @@ -35,12 +35,15 @@ module ita_controller output requant_oup_t requant_add_o , input bias_t inp_bias_i , output bias_t inp_bias_pad_o , + input oup_t accumulator_oup_i , + output oup_t accumulator_oup_o , output logic busy_o ); step_e step_d, step_q; counter_t count_d, count_q, bias_count; - counter_t mask_count_d, mask_count_q; + counter_t mask_pos_d, mask_pos_q; + counter_t mask_count_d, mask_count_q1, mask_count_q2, mask_count_q3; counter_t tile_d, tile_q; counter_t inner_tile_d, inner_tile_q; counter_t tile_x_d, tile_x_q, bias_tile_x_d, bias_tile_x_q; @@ -50,6 +53,7 @@ module ita_controller ongoing_soft_t ongoing_soft_d, ongoing_soft_q; bias_t inp_bias, inp_bias_padded; + oup_t acc_oup, masked_acc_oup; logic last_time; tile_t inner_tile_dim; @@ -60,13 +64,14 @@ module ita_controller logic softmax_fifo, softmax_div, softmax_div_done_d, softmax_div_done_q, busy_d, busy_q; requant_oup_t requant_add, requant_add_d, requant_add_q; - assign step_o = step_q; - assign busy_o = busy_q; - assign tile_x_o = tile_x_q; - assign tile_y_o = tile_y_q; - assign inner_tile_o = inner_tile_q; - assign requant_add_o = requant_add_q; - assign inp_bias_pad_o = inp_bias_padded; + assign step_o = step_q; + assign busy_o = busy_q; + assign tile_x_o = tile_x_q; + assign tile_y_o = tile_y_q; + assign inner_tile_o = inner_tile_q; + assign requant_add_o = requant_add_q; + assign inp_bias_pad_o = inp_bias_padded; + assign accumulator_oup_o = masked_acc_oup; always_comb begin count_d = count_q; @@ -87,7 +92,8 @@ module ita_controller softmax_div_done_d = softmax_div_done_q; last_time = 1'b0; requant_add = {N {requant_add_i}}; - mask_count_d = (step_q == AV) ? mask_count_q : ctrl_i.mask_start_index; + acc_oup = accumulator_oup_i; + mask_pos_d = (step_q == QK) ? mask_pos_q : (ctrl_i.mask_start_index-1); busy_d = busy_q; softmax_fifo = 1'b0; @@ -355,6 +361,7 @@ module ita_controller bias_tile_y_d = (count_q == 0) ? bias_tile_y_q : tile_y_q; first_outer_dim_d = (count_q == 0) ? first_outer_dim_q : first_outer_dim; second_outer_dim_d = (count_q == 0) ? second_outer_dim_q : second_outer_dim; + mask_count_d = bias_count; if ((step_q != Idle && step_q != MatMul) || (step_q == Idle && bias_count == 255)) begin if (inner_tile_q == inner_tile_dim) begin @@ -385,26 +392,32 @@ module ita_controller inp_bias_padded = inp_bias; case (ctrl_i.mask_type) - None: + None: begin + + end UpperTriangular: begin - if (step_q == AV) begin - if ((bias_count + (bias_tile_x_d * M*M/N)) >= (mask_count_q / N) * M) begin - - end else begin - mask_count_d = ((mask_count_q & N) == N) ? mask_count_q + M : mask_count_q; - end - if (((bias_count / M) * N + bias_tile_x_d * M) < mask_count_q) begin - for (int i = (second_outer_dim_d & (N-1)); i < N; i++) begin - - end - end else begin - + // With calc_en_q4 + if (step_q == QK) begin + if (((mask_count_q3 + (bias_tile_y_d * M)) >= mask_pos_q) && (mask_count_q3 + (bias_tile_y_d * M) < (mask_pos_q + N))) begin + if ((mask_count_q3 & (N-1)) == (N-1)) begin + mask_pos_d = mask_pos_q + N + M; + end + for (int i = (mask_count_q3 & (N-1)); i < N; i++) begin + // requant_out[i] = 1'b0; + acc_oup[i] = 26'h2000000; + end + end else if (((mask_count_q3 + (bias_tile_y_d * M)) & (M-1)) < (mask_pos_q & (M-1))) begin + for (int i = 0; i < N; i++) begin + acc_oup[i] = 26'h2000000; end end end end - LowerTriangular: + LowerTriangular: begin + + end endcase + masked_acc_oup = acc_oup; if (inp_valid_i && inp_ready_o && oup_valid_i && oup_ready_i && last_inner_tile_o) begin ongoing_d = ongoing_q; @@ -440,7 +453,10 @@ module ita_controller bias_tile_y_q <= '0; first_outer_dim_q <= '0; second_outer_dim_q <= '0; - mask_count_q <= '0; + mask_pos_q <= '0; + mask_count_q1 <= '0; + mask_count_q2 <= '0; + mask_count_q3 <= '0; end else begin step_q <= step_d; count_q <= count_d; @@ -458,7 +474,10 @@ module ita_controller bias_tile_y_q <= bias_tile_y_d; first_outer_dim_q <= first_outer_dim_d; second_outer_dim_q <= second_outer_dim_d; - mask_count_q <= mask_count_d; + mask_pos_q <= mask_pos_d; + mask_count_q1 <= mask_count_d; + mask_count_q2 <= mask_count_q1; + mask_count_q3 <= mask_count_q2; end end endmodule diff --git a/src/tb/ita_tb.sv b/src/tb/ita_tb.sv index fb66e26..1fdddec 100644 --- a/src/tb/ita_tb.sv +++ b/src/tb/ita_tb.sv @@ -79,7 +79,7 @@ module ita_tb; FEEDFORWARD_SIZE = `ifdef FF_SIZE `FF_SIZE `else M_TILE_LEN `endif; ACTIVATION = activation_e'(`ifdef ACTIVATION `ACTIVATION `else Identity `endif); MASK = mask_e'(`ifdef MASK `MASK `else None `endif); - MASK_START_INDEX = `ifdef MASK_START_INDEX `MASK_START_INDEX `else 0 `endif; + MASK_START_INDEX = `ifdef MASK_INDEX `MASK_INDEX `else 1 `endif; simdir = { "../../simvectors/data_S", @@ -503,7 +503,7 @@ task automatic apply_ITA_weights(input integer phase); ita_ctrl.embed_size = EMBEDDING_SIZE; ita_ctrl.ff_size = FEEDFORWARD_SIZE; ita_ctrl.mask_type = MASK; - ita_ctrl.mask_index = MASK_START_INDEX; + ita_ctrl.mask_start_index = MASK_START_INDEX; read_activation_constants(ita_ctrl.gelu_b, ita_ctrl.gelu_c, ita_ctrl.activation_requant_mult, ita_ctrl.activation_requant_shift, ita_ctrl.activation_requant_add); diff --git a/testGenerator.py b/testGenerator.py index f23451b..ffbb49e 100644 --- a/testGenerator.py +++ b/testGenerator.py @@ -48,9 +48,9 @@ def generateMHA(**args): NO_BIAS = args['no_bias'] NO_PARTIAL_SOFTMAX = args['no_partial_softmax'] ACTIVATION = args['activation'].capitalize() - MASK = args['mask'].capitalize() - INDEX = args['i'].capitalize() - base_path = f'{current_dir}/simvectors/data_S{S}_E{E}_P{P}_F{F}_H{H}_B{int(not NO_BIAS)}_{ACTIVATION}_{MASK}_i{INDEX}' + MASK = args['mask'][:args['mask'].find("_")].capitalize() + args['mask'][args['mask'].find("_")+1:].capitalize() + INDEX = args['I'] + base_path = f'{current_dir}/simvectors/data_S{S}_E{E}_P{P}_F{F}_H{H}_B{int(not NO_BIAS)}_{ACTIVATION}_{MASK}_I{INDEX}' if NO_PARTIAL_SOFTMAX: path = f'{base_path}_noPartialSoftmax/' @@ -108,8 +108,8 @@ class ArgumentDefaultMetavarTypeFormatter(argparse.ArgumentDefaultsHelpFormatter default = 'none', type = str, help = 'Attention-Mask', - choices = ['none', 'UpperTriangular', 'LowerTriangular']) - self.group1.add_argument('--i', default = 1, type = int, help = 'Masking starting index') + choices = ['none', 'Upper_Triangular', 'Lower_Triangular']) + self.group1.add_argument('-I', default = 1, type = int, help = 'Masking starting index') self.group1.add_argument('--no-partial-softmax', action = 'store_true', help = 'Disable partial softmax calculation') From 980a7553467f2c4a09b775361d09c059d417ac13 Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Mon, 18 Nov 2024 14:42:13 +0100 Subject: [PATCH 29/60] Test for multiple tiles --- modelsim/sim_ita_tb_wave.tcl | 5 +++++ modelsim/sim_ita_tb_wave_important.tcl | 24 ++++++++++++++++-------- src/ita_controller.sv | 26 +++++++++++++++++++------- 3 files changed, 40 insertions(+), 15 deletions(-) diff --git a/modelsim/sim_ita_tb_wave.tcl b/modelsim/sim_ita_tb_wave.tcl index f9354eb..1f1dfe9 100644 --- a/modelsim/sim_ita_tb_wave.tcl +++ b/modelsim/sim_ita_tb_wave.tcl @@ -21,6 +21,11 @@ add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_pos_q add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_count_q1 add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_count_q2 add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_count_q3 +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_col_offset_q +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/bias_tile_x_d +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/bias_tile_x_q +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/bias_tile_y_d +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/bias_tile_y_q add wave -noupdate -group Requant /ita_tb/dut/i_controller/requant_add_i add wave -noupdate -group Requant /ita_tb/dut/i_controller/requant_add_o add wave -noupdate -group Requant /ita_tb/dut/i_controller/step_q diff --git a/modelsim/sim_ita_tb_wave_important.tcl b/modelsim/sim_ita_tb_wave_important.tcl index 6042363..a918813 100644 --- a/modelsim/sim_ita_tb_wave_important.tcl +++ b/modelsim/sim_ita_tb_wave_important.tcl @@ -19,6 +19,11 @@ add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_pos_q add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_count_q1 add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_count_q2 add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_count_q3 +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_col_offset_q +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/bias_tile_x_d +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/bias_tile_x_q +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/bias_tile_y_d +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/bias_tile_y_q add wave -noupdate -group Requant /ita_tb/dut/i_controller/requant_add_i add wave -noupdate -group Requant /ita_tb/dut/i_controller/requant_add_o add wave -noupdate -group Requant /ita_tb/dut/i_controller/step_q @@ -93,18 +98,21 @@ add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_q add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/count_d add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/count_q add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_count +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_count_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_count_q1 +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_count_q2 +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_count_q3 add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_d add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_q add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_d add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_q add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_d add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_q add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_d add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_q add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_d add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_q add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_d @@ -243,9 +251,9 @@ add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_q add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_d add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_q TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {3910600 ps} 1} {{Cursor 2} {3866984 ps} 1} {{Cursor 3} {3862963 ps} 0} -quietly wave cursor active 3 -configure wave -namecolwidth 150 +WaveRestoreCursors {{Cursor 1} {8544600 ps} 0} +quietly wave cursor active 1 +configure wave -namecolwidth 190 configure wave -valuecolwidth 100 configure wave -justifyvalue left configure wave -signalnamewidth 1 @@ -259,4 +267,4 @@ configure wave -griddelta 40 configure wave -timeline 0 configure wave -timelineunits ns update -WaveRestoreZoom {3842774 ps} {3887382 ps} +WaveRestoreZoom {8544100 ps} {8545063 ps} diff --git a/src/ita_controller.sv b/src/ita_controller.sv index 7c46358..97477b5 100644 --- a/src/ita_controller.sv +++ b/src/ita_controller.sv @@ -42,7 +42,8 @@ module ita_controller step_e step_d, step_q; counter_t count_d, count_q, bias_count; - counter_t mask_pos_d, mask_pos_q; + logic [14:0] mask_pos_d, mask_pos_q; // 512 * 512 / 16 = 16384 + logic [3:0] mask_col_offset_d, mask_col_offset_q; counter_t mask_count_d, mask_count_q1, mask_count_q2, mask_count_q3; counter_t tile_d, tile_q; counter_t inner_tile_d, inner_tile_q; @@ -93,7 +94,8 @@ module ita_controller last_time = 1'b0; requant_add = {N {requant_add_i}}; acc_oup = accumulator_oup_i; - mask_pos_d = (step_q == QK) ? mask_pos_q : (ctrl_i.mask_start_index-1); + mask_col_offset_d = (step_q == QK) ? mask_col_offset_q : ((ctrl_i.mask_start_index-1) & (N-1)); + mask_pos_d = (step_q == QK) ? mask_pos_q : (((ctrl_i.mask_start_index-1)/N)*M); busy_d = busy_q; softmax_fifo = 1'b0; @@ -398,15 +400,23 @@ module ita_controller UpperTriangular: begin // With calc_en_q4 if (step_q == QK) begin - if (((mask_count_q3 + (bias_tile_y_d * M)) >= mask_pos_q) && (mask_count_q3 + (bias_tile_y_d * M) < (mask_pos_q + N))) begin - if ((mask_count_q3 & (N-1)) == (N-1)) begin - mask_pos_d = mask_pos_q + N + M; + if (((mask_count_q3) >= (mask_pos_q & ((M*M/N)-1))) && + (mask_count_q3 < ((mask_pos_q & ((M*M/N)-1)) + N)) && + ((mask_pos_q & ((bias_tile_y_d * (M*M/N)) + (bias_tile_x_d * (M*M/N)))) >= '0)) begin + if ((mask_count_q3 & (M-1)) == '1) begin + // When the pattern changes the y_tile dim + mask_pos_d = mask_count_q3 + (2*(M*M/N) - (M+1)); end - for (int i = (mask_count_q3 & (N-1)); i < N; i++) begin + if (((mask_count_q3 + mask_col_offset_q) & (N-1)) == (N-1)) begin + mask_pos_d = (mask_pos_q + (N - ((mask_pos_q + mask_col_offset_q) & (N-1))) + M); + // // The offset needs to be added just one time + // mask_col_offset_d = '0; + end + for (int i = ((mask_count_q3 + mask_col_offset_q) & (N-1)); i < N; i++) begin // requant_out[i] = 1'b0; acc_oup[i] = 26'h2000000; end - end else if (((mask_count_q3 + (bias_tile_y_d * M)) & (M-1)) < (mask_pos_q & (M-1))) begin + end else if ((mask_count_q3 + ((bias_tile_y_d * (M*M/N)) + (bias_tile_x_d * (M*M/N)))) < mask_pos_q) begin for (int i = 0; i < N; i++) begin acc_oup[i] = 26'h2000000; end @@ -454,6 +464,7 @@ module ita_controller first_outer_dim_q <= '0; second_outer_dim_q <= '0; mask_pos_q <= '0; + mask_col_offset_q <= '0; mask_count_q1 <= '0; mask_count_q2 <= '0; mask_count_q3 <= '0; @@ -475,6 +486,7 @@ module ita_controller first_outer_dim_q <= first_outer_dim_d; second_outer_dim_q <= second_outer_dim_d; mask_pos_q <= mask_pos_d; + mask_col_offset_q <= mask_col_offset_d; mask_count_q1 <= mask_count_d; mask_count_q2 <= mask_count_q1; mask_count_q3 <= mask_count_q2; From 0109e78754c0abbc321fe9214ff10cfd62cb0107 Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Mon, 18 Nov 2024 14:44:38 +0100 Subject: [PATCH 30/60] This version works for one tile --- src/ita_controller.sv | 14 ++++---------- 1 file changed, 4 insertions(+), 10 deletions(-) diff --git a/src/ita_controller.sv b/src/ita_controller.sv index 97477b5..9bbfdaa 100644 --- a/src/ita_controller.sv +++ b/src/ita_controller.sv @@ -42,7 +42,7 @@ module ita_controller step_e step_d, step_q; counter_t count_d, count_q, bias_count; - logic [14:0] mask_pos_d, mask_pos_q; // 512 * 512 / 16 = 16384 + counter_t mask_pos_d, mask_pos_q; logic [3:0] mask_col_offset_d, mask_col_offset_q; counter_t mask_count_d, mask_count_q1, mask_count_q2, mask_count_q3; counter_t tile_d, tile_q; @@ -400,15 +400,9 @@ module ita_controller UpperTriangular: begin // With calc_en_q4 if (step_q == QK) begin - if (((mask_count_q3) >= (mask_pos_q & ((M*M/N)-1))) && - (mask_count_q3 < ((mask_pos_q & ((M*M/N)-1)) + N)) && - ((mask_pos_q & ((bias_tile_y_d * (M*M/N)) + (bias_tile_x_d * (M*M/N)))) >= '0)) begin - if ((mask_count_q3 & (M-1)) == '1) begin - // When the pattern changes the y_tile dim - mask_pos_d = mask_count_q3 + (2*(M*M/N) - (M+1)); - end + if (((mask_count_q3 + (bias_tile_y_d * M)) >= mask_pos_q) && (mask_count_q3 + (bias_tile_y_d * M) < (mask_pos_q + N))) begin if (((mask_count_q3 + mask_col_offset_q) & (N-1)) == (N-1)) begin - mask_pos_d = (mask_pos_q + (N - ((mask_pos_q + mask_col_offset_q) & (N-1))) + M); + mask_pos_d = (mask_pos_q + (N - ((mask_pos_q + mask_col_offset_q) & (N-1))) + M) & ((M*M/N)-1); // // The offset needs to be added just one time // mask_col_offset_d = '0; end @@ -416,7 +410,7 @@ module ita_controller // requant_out[i] = 1'b0; acc_oup[i] = 26'h2000000; end - end else if ((mask_count_q3 + ((bias_tile_y_d * (M*M/N)) + (bias_tile_x_d * (M*M/N)))) < mask_pos_q) begin + end else if (((mask_count_q3 + (bias_tile_y_d * M)) & (M-1)) < (mask_pos_q & (M-1))) begin for (int i = 0; i < N; i++) begin acc_oup[i] = 26'h2000000; end From f0a1605306ecd7fc76b618899a274bcca2739dc5 Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Tue, 19 Nov 2024 17:58:35 +0100 Subject: [PATCH 31/60] Simulation error --- src/ita_controller.sv | 71 +++++++++++++++++++++++++++++++------------ 1 file changed, 52 insertions(+), 19 deletions(-) diff --git a/src/ita_controller.sv b/src/ita_controller.sv index 9bbfdaa..30a6457 100644 --- a/src/ita_controller.sv +++ b/src/ita_controller.sv @@ -42,13 +42,15 @@ module ita_controller step_e step_d, step_q; counter_t count_d, count_q, bias_count; - counter_t mask_pos_d, mask_pos_q; + logic [14:0] mask_pos_d, mask_pos_q; logic [3:0] mask_col_offset_d, mask_col_offset_q; counter_t mask_count_d, mask_count_q1, mask_count_q2, mask_count_q3; counter_t tile_d, tile_q; counter_t inner_tile_d, inner_tile_q; - counter_t tile_x_d, tile_x_q, bias_tile_x_d, bias_tile_x_q; - counter_t tile_y_d, tile_y_q, bias_tile_y_d, bias_tile_y_q; + counter_t mask_tile_x_pos_d, mask_tile_x_pos_q; + counter_t mask_tile_y_pos_d, mask_tile_y_pos_q; + counter_t tile_x_d, tile_x_q, bias_tile_x_d, bias_tile_x_q1, bias_tile_x_q2, mask_tile_x_q3; + counter_t tile_y_d, tile_y_q, bias_tile_y_d, bias_tile_y_q1, bias_tile_y_q2, mask_tile_y_q3; counter_t softmax_tile_d, softmax_tile_q; ongoing_t ongoing_d, ongoing_q; ongoing_soft_t ongoing_soft_d, ongoing_soft_q; @@ -61,6 +63,7 @@ module ita_controller logic [WO-WI*2-2:0] first_outer_dim, second_outer_dim; logic [WO-WI*2-2:0] first_outer_dim_d, first_outer_dim_q; logic [WO-WI*2-2:0] second_outer_dim_d, second_outer_dim_q; + logic softmax_fifo, softmax_div, softmax_div_done_d, softmax_div_done_q, busy_d, busy_q; requant_oup_t requant_add, requant_add_d, requant_add_q; @@ -96,6 +99,8 @@ module ita_controller acc_oup = accumulator_oup_i; mask_col_offset_d = (step_q == QK) ? mask_col_offset_q : ((ctrl_i.mask_start_index-1) & (N-1)); mask_pos_d = (step_q == QK) ? mask_pos_q : (((ctrl_i.mask_start_index-1)/N)*M); + mask_tile_x_pos_d = mask_tile_x_pos_q; + mask_tile_y_pos_d = mask_tile_y_pos_q; busy_d = busy_q; softmax_fifo = 1'b0; @@ -359,8 +364,8 @@ module ita_controller inp_bias = inp_bias_i; requant_add_d = requant_add; bias_count = (count_q == 0) ? 255 : count_q - 1; - bias_tile_x_d = (count_q == 0) ? bias_tile_x_q : tile_x_q; - bias_tile_y_d = (count_q == 0) ? bias_tile_y_q : tile_y_q; + bias_tile_x_d = (count_q == 0) ? bias_tile_x_q1 : tile_x_q; + bias_tile_y_d = (count_q == 0) ? bias_tile_y_q1 : tile_y_q; first_outer_dim_d = (count_q == 0) ? first_outer_dim_q : first_outer_dim; second_outer_dim_d = (count_q == 0) ? second_outer_dim_q : second_outer_dim; mask_count_d = bias_count; @@ -393,6 +398,7 @@ module ita_controller end inp_bias_padded = inp_bias; + case (ctrl_i.mask_type) None: begin @@ -400,17 +406,32 @@ module ita_controller UpperTriangular: begin // With calc_en_q4 if (step_q == QK) begin - if (((mask_count_q3 + (bias_tile_y_d * M)) >= mask_pos_q) && (mask_count_q3 + (bias_tile_y_d * M) < (mask_pos_q + N))) begin - if (((mask_count_q3 + mask_col_offset_q) & (N-1)) == (N-1)) begin - mask_pos_d = (mask_pos_q + (N - ((mask_pos_q + mask_col_offset_q) & (N-1))) + M) & ((M*M/N)-1); - // // The offset needs to be added just one time - // mask_col_offset_d = '0; - end - for (int i = ((mask_count_q3 + mask_col_offset_q) & (N-1)); i < N; i++) begin - // requant_out[i] = 1'b0; - acc_oup[i] = 26'h2000000; + if ((mask_tile_x_pos_q == inner_tile_dim) && (mask_count_q3 == ((M*M/N)-1))) begin + mask_tile_x_pos_d = 1'b0; + end else if (mask_count_q3 == ((M*M/N)-1)) begin + mask_tile_x_pos_d = mask_tile_x_pos_q + 1'b1; + end else begin + mask_tile_x_pos_d = mask_tile_x_pos_q; + end + + if (mask_tile_x_q3 == mask_tile_x_pos_q && mask_tile_y_q3 == mask_tile_y_pos_q) begin + if ((mask_count_q3 >= mask_pos_q) && (mask_count_q3 < (mask_pos_q + N))) begin + if ((mask_count_q3 & (M-1)) == 6'd63) begin + mask_tile_y_pos_d = mask_tile_y_pos_q + 1'b1; + mask_pos_d = (mask_count_q3 + ((7*M) + 1)) & ((M*M/N)-1); + end else if (((mask_count_q3 + mask_col_offset_q) & (N-1)) == (N-1)) begin + mask_pos_d = (mask_pos_q + (N - ((mask_pos_q + mask_col_offset_q) & (N-1))) + M) & ((M*M/N)-1); + end + for (int i = ((mask_count_q3 + mask_col_offset_q) & (N-1)); i < N; i++) begin + // requant_out[i] = 1'b0; + acc_oup[i] = 26'h2000000; + end + end else if ((mask_count_q3 & (M-1)) < (mask_pos_q & (M-1))) begin + for (int i = 0; i < N; i++) begin + acc_oup[i] = 26'h2000000; + end end - end else if (((mask_count_q3 + (bias_tile_y_d * M)) & (M-1)) < (mask_pos_q & (M-1))) begin + end else if (mask_tile_x_q3 == mask_tile_x_pos_q && mask_tile_y_q3 != mask_tile_y_pos_q) begin for (int i = 0; i < N; i++) begin acc_oup[i] = 26'h2000000; end @@ -453,8 +474,12 @@ module ita_controller softmax_div_done_q <= 1'b0; requant_add_q <= '0; busy_q <= 1'b0; - bias_tile_x_q <= '0; - bias_tile_y_q <= '0; + bias_tile_x_q1 <= '0; + bias_tile_x_q2 <= '0; + mask_tile_x_q3 <= '0; + bias_tile_y_q1 <= '0; + bias_tile_y_q2 <= '0; + mask_tile_y_q3 <= '0; first_outer_dim_q <= '0; second_outer_dim_q <= '0; mask_pos_q <= '0; @@ -462,6 +487,8 @@ module ita_controller mask_count_q1 <= '0; mask_count_q2 <= '0; mask_count_q3 <= '0; + mask_tile_x_pos_q <= '0; + mask_tile_y_pos_q <= '0; end else begin step_q <= step_d; count_q <= count_d; @@ -475,8 +502,12 @@ module ita_controller softmax_div_done_q <= softmax_div_done_d; requant_add_q <= requant_add_d; busy_q <= busy_d; - bias_tile_x_q <= bias_tile_x_d; - bias_tile_y_q <= bias_tile_y_d; + bias_tile_x_q1 <= bias_tile_x_d; + bias_tile_x_q2 <= bias_tile_x_q1; + mask_tile_x_q3 <= bias_tile_x_q2; + bias_tile_y_q1 <= bias_tile_y_d; + bias_tile_y_q2 <= bias_tile_y_q1; + mask_tile_y_q3 <= bias_tile_y_q2; first_outer_dim_q <= first_outer_dim_d; second_outer_dim_q <= second_outer_dim_d; mask_pos_q <= mask_pos_d; @@ -484,6 +515,8 @@ module ita_controller mask_count_q1 <= mask_count_d; mask_count_q2 <= mask_count_q1; mask_count_q3 <= mask_count_q2; + mask_tile_x_pos_q <= mask_tile_x_pos_d; + mask_tile_y_pos_q <= mask_tile_y_pos_d; end end endmodule From 457266cb9d8c2ea7de9f53389e1c55d1f6aa818c Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Tue, 19 Nov 2024 19:46:15 +0100 Subject: [PATCH 32/60] Fixed simulation error --- modelsim/sim_ita_tb_wave.tcl | 11 +++++++---- modelsim/sim_ita_tb_wave_important.tcl | 25 +++++++++++++++++-------- src/ita_controller.sv | 6 +++--- 3 files changed, 27 insertions(+), 15 deletions(-) diff --git a/modelsim/sim_ita_tb_wave.tcl b/modelsim/sim_ita_tb_wave.tcl index 1f1dfe9..4913258 100644 --- a/modelsim/sim_ita_tb_wave.tcl +++ b/modelsim/sim_ita_tb_wave.tcl @@ -22,10 +22,13 @@ add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_count_q1 add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_count_q2 add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_count_q3 add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_col_offset_q -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/bias_tile_x_d -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/bias_tile_x_q -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/bias_tile_y_d -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/bias_tile_y_q +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_d +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_q +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_d +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_q +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_q3 +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_q3 +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/first_outer_dim add wave -noupdate -group Requant /ita_tb/dut/i_controller/requant_add_i add wave -noupdate -group Requant /ita_tb/dut/i_controller/requant_add_o add wave -noupdate -group Requant /ita_tb/dut/i_controller/step_q diff --git a/modelsim/sim_ita_tb_wave_important.tcl b/modelsim/sim_ita_tb_wave_important.tcl index a918813..fd10edf 100644 --- a/modelsim/sim_ita_tb_wave_important.tcl +++ b/modelsim/sim_ita_tb_wave_important.tcl @@ -20,10 +20,13 @@ add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_count_q1 add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_count_q2 add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_count_q3 add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_col_offset_q -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/bias_tile_x_d -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/bias_tile_x_q -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/bias_tile_y_d -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/bias_tile_y_q +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_d +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_q +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_d +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_q +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_q3 +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_q3 +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/inner_tile_dim add wave -noupdate -group Requant /ita_tb/dut/i_controller/requant_add_i add wave -noupdate -group Requant /ita_tb/dut/i_controller/requant_add_o add wave -noupdate -group Requant /ita_tb/dut/i_controller/step_q @@ -101,6 +104,7 @@ add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_count add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_d add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_q add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_q add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_count_d add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_count_q1 add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_count_q2 @@ -111,8 +115,14 @@ add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_q add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_d add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_q1 +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_q2 add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_d add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_q1 +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_q2 add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_d add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_q add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_d @@ -124,7 +134,6 @@ add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_p add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/acc_oup add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/masked_acc_oup add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_time -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_dim add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_d @@ -251,9 +260,9 @@ add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_q add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_d add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_q TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {8544600 ps} 0} +WaveRestoreCursors {{Cursor 1} {8820600 ps} 1} quietly wave cursor active 1 -configure wave -namecolwidth 190 +configure wave -namecolwidth 182 configure wave -valuecolwidth 100 configure wave -justifyvalue left configure wave -signalnamewidth 1 @@ -267,4 +276,4 @@ configure wave -griddelta 40 configure wave -timeline 0 configure wave -timelineunits ns update -WaveRestoreZoom {8544100 ps} {8545063 ps} +WaveRestoreZoom {8819877 ps} {8822181 ps} diff --git a/src/ita_controller.sv b/src/ita_controller.sv index 30a6457..6a06783 100644 --- a/src/ita_controller.sv +++ b/src/ita_controller.sv @@ -42,7 +42,7 @@ module ita_controller step_e step_d, step_q; counter_t count_d, count_q, bias_count; - logic [14:0] mask_pos_d, mask_pos_q; + counter_t mask_pos_d, mask_pos_q; logic [3:0] mask_col_offset_d, mask_col_offset_q; counter_t mask_count_d, mask_count_q1, mask_count_q2, mask_count_q3; counter_t tile_d, tile_q; @@ -406,9 +406,9 @@ module ita_controller UpperTriangular: begin // With calc_en_q4 if (step_q == QK) begin - if ((mask_tile_x_pos_q == inner_tile_dim) && (mask_count_q3 == ((M*M/N)-1))) begin + if ((mask_tile_x_pos_q == ctrl_i.tile_s-1) && (mask_count_q3 == ((M*M/N)-1))) begin mask_tile_x_pos_d = 1'b0; - end else if (mask_count_q3 == ((M*M/N)-1)) begin + end else if (mask_count_q3 == ((M*M/N)-1) && calc_en_q4) begin mask_tile_x_pos_d = mask_tile_x_pos_q + 1'b1; end else begin mask_tile_x_pos_d = mask_tile_x_pos_q; From b7a2554501f5302af196c202f7f846f4ab718505 Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Wed, 20 Nov 2024 12:12:53 +0100 Subject: [PATCH 33/60] Pipelined step_q --- PyITA/ITA.py | 16 ++++++++++------ src/ita.sv | 3 ++- src/ita_controller.sv | 11 ++++++++--- 3 files changed, 20 insertions(+), 10 deletions(-) diff --git a/PyITA/ITA.py b/PyITA/ITA.py index 9fa93da..d0333ef 100644 --- a/PyITA/ITA.py +++ b/PyITA/ITA.py @@ -583,12 +583,16 @@ def step4_QK(self, no_partial_softmax, mask, index): if (mask == 'Upper_Triangular'): print(self.A.shape) # Iterate through all rows starting at the provided starting index - col_count = 0 - for h in np.arange(0, self.A.shape[0]): - for i in np.arange(index - 1, self.A.shape[2]): - col_count += 1 - for j in np.arange(0, col_count): - self.A[h][j][i] = np.iinfo(np.int32).min + # col_count = 0 + # for h in np.arange(0, self.A.shape[0]): + # for i in np.arange(index - 1, self.A.shape[2]): + # col_count += 1 + # for j in np.arange(0, col_count): + # self.A[h][j][i] = np.iinfo(np.int32).min + for h in range(self.A.shape[0]): + for i in range(self.A.shape[1]): + for j in range((i + (index-1)), self.A.shape[2]): + self.A[h][i][j] = np.iinfo(np.int32).min elif(mask == 'Lower_Triangular'): pass elif(mask == 'none'): diff --git a/src/ita.sv b/src/ita.sv index 1d793ac..65dcce0 100644 --- a/src/ita.sv +++ b/src/ita.sv @@ -205,7 +205,8 @@ module ita .inp_bias_pad_o (inp_bias_padded ), .accumulator_oup_i (accumulator_oup ), .accumulator_oup_o (masked_acc_oup ), - .busy_o (busy_o ) + .busy_o (busy_o ), + .calc_en_q4_i (calc_en_q4 ) ); ita_input_sampler i_input_sampler ( diff --git a/src/ita_controller.sv b/src/ita_controller.sv index 6a06783..33dc5f1 100644 --- a/src/ita_controller.sv +++ b/src/ita_controller.sv @@ -37,10 +37,11 @@ module ita_controller output bias_t inp_bias_pad_o , input oup_t accumulator_oup_i , output oup_t accumulator_oup_o , - output logic busy_o + output logic busy_o , + input logic calc_en_q4_i ); - step_e step_d, step_q; + step_e step_d, step_q, step_q2, step_q3; counter_t count_d, count_q, bias_count; counter_t mask_pos_d, mask_pos_q; logic [3:0] mask_col_offset_d, mask_col_offset_q; @@ -408,7 +409,7 @@ module ita_controller if (step_q == QK) begin if ((mask_tile_x_pos_q == ctrl_i.tile_s-1) && (mask_count_q3 == ((M*M/N)-1))) begin mask_tile_x_pos_d = 1'b0; - end else if (mask_count_q3 == ((M*M/N)-1) && calc_en_q4) begin + end else if (mask_count_q3 == ((M*M/N)-1) && calc_en_q4_i) begin mask_tile_x_pos_d = mask_tile_x_pos_q + 1'b1; end else begin mask_tile_x_pos_d = mask_tile_x_pos_q; @@ -463,6 +464,8 @@ module ita_controller always_ff @(posedge clk_i or negedge rst_ni) begin if(~rst_ni) begin step_q <= Idle; + step_q2 <= '0; + step_q3 <= '0; count_q <= '0; tile_q <= '0; tile_x_q <= '0; @@ -491,6 +494,8 @@ module ita_controller mask_tile_y_pos_q <= '0; end else begin step_q <= step_d; + step_q2 <= step_q; + step_q3 <= step_q2; count_q <= count_d; tile_q <= tile_d; tile_x_q <= tile_x_d; From 3063d62d957fd70cd4b8f205b12c038515c9c4fa Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Thu, 21 Nov 2024 15:32:26 +0100 Subject: [PATCH 34/60] Changing the branch to adapt the golden model --- src/ita_controller.sv | 6 +----- src/ita_softmax_top.sv | 2 +- 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/src/ita_controller.sv b/src/ita_controller.sv index 33dc5f1..bb1643c 100644 --- a/src/ita_controller.sv +++ b/src/ita_controller.sv @@ -41,7 +41,7 @@ module ita_controller input logic calc_en_q4_i ); - step_e step_d, step_q, step_q2, step_q3; + step_e step_d, step_q; counter_t count_d, count_q, bias_count; counter_t mask_pos_d, mask_pos_q; logic [3:0] mask_col_offset_d, mask_col_offset_q; @@ -464,8 +464,6 @@ module ita_controller always_ff @(posedge clk_i or negedge rst_ni) begin if(~rst_ni) begin step_q <= Idle; - step_q2 <= '0; - step_q3 <= '0; count_q <= '0; tile_q <= '0; tile_x_q <= '0; @@ -494,8 +492,6 @@ module ita_controller mask_tile_y_pos_q <= '0; end else begin step_q <= step_d; - step_q2 <= step_q; - step_q3 <= step_q2; count_q <= count_d; tile_q <= tile_d; tile_x_q <= tile_x_d; diff --git a/src/ita_softmax_top.sv b/src/ita_softmax_top.sv index df2b421..68c8b4e 100644 --- a/src/ita_softmax_top.sv +++ b/src/ita_softmax_top.sv @@ -38,7 +38,7 @@ module ita_softmax_top logic unsigned [ NumDiv-1:0][DividerWidth-1:0] div_oup ; logic unsigned [ DividerWidth-1:0] val ; - requant_oup_t max_in ; + requant_oup_t max_in; requant_t prev_max, max_out; ita_max_finder i_max_finder ( From c06cfa20641033704003bd4cdf5a9d46238aacb2 Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Sat, 23 Nov 2024 20:09:37 +0100 Subject: [PATCH 35/60] Changed the softmac function in the golden model --- PyITA/ITA.py | 29 +- PyITA/softmax.py | 19 +- modelsim.ini | 2221 ++++++++++++++++++++++++ modelsim/sim_ita_tb_wave.tcl | 53 +- modelsim/sim_ita_tb_wave_important.tcl | 86 +- src/ita.sv | 27 +- src/ita_controller.sv | 81 +- src/ita_softmax.sv | 5 +- src/ita_softmax_top.sv | 6 +- transcript | 14 + 10 files changed, 2436 insertions(+), 105 deletions(-) create mode 100644 modelsim.ini create mode 100644 transcript diff --git a/PyITA/ITA.py b/PyITA/ITA.py index d0333ef..d8930db 100644 --- a/PyITA/ITA.py +++ b/PyITA/ITA.py @@ -241,6 +241,8 @@ def _initialize_tensors(self, Q, V, Wq, Wk, Wv, Wo, Bq, Bk, Bv, Bo, FF_in, Wff, self.A_real_softmax = np.zeros([self.H, self.S, self.S], dtype = np.int8) self.A_partial_softmax = np.zeros([self.H, self.S, self.S], dtype = np.int8) + self.Mask = None + self.O_soft = None self.O_soft_requant = None @@ -577,22 +579,18 @@ def step3_Vp(self): def step4_QK(self, no_partial_softmax, mask, index): self.A = np.array( [np.matmul(self.Qp_requant[i], np.transpose(self.Kp_requant[i]), dtype = np.int32) for i in range(self.H)]) + self.A = np.clip(self.A, -2**(self.WO - 1), 2**(self.WO - 1) - 1) + self.A_requant = requantize(self.A, self.requant_eps_mult[3], self.requant_right_shift[3], self.requant_add[3]) + self.Mask = np.full((self.H, self.S, self.S), fill_value=False, dtype='bool') #Adjustments for Masked Attention if (mask == 'Upper_Triangular'): - print(self.A.shape) - # Iterate through all rows starting at the provided starting index - # col_count = 0 - # for h in np.arange(0, self.A.shape[0]): - # for i in np.arange(index - 1, self.A.shape[2]): - # col_count += 1 - # for j in np.arange(0, col_count): - # self.A[h][j][i] = np.iinfo(np.int32).min - for h in range(self.A.shape[0]): - for i in range(self.A.shape[1]): - for j in range((i + (index-1)), self.A.shape[2]): - self.A[h][i][j] = np.iinfo(np.int32).min + print(self.Mask.shape) + for h in range(self.Mask.shape[0]): + for i in range(self.Mask.shape[1]): + for j in range((i + (index-1)), self.Mask.shape[2]): + self.Mask[h][i][j] = True elif(mask == 'Lower_Triangular'): pass elif(mask == 'none'): @@ -606,8 +604,6 @@ def step4_QK(self, no_partial_softmax, mask, index): plt.title("Matrix A") plt.show() - self.A = np.clip(self.A, -2**(self.WO - 1), 2**(self.WO - 1) - 1) - self.A_requant = requantize(self.A, self.requant_eps_mult[3], self.requant_right_shift[3], self.requant_add[3]) if (self.S_ITA - self.S) > 0: self.A_requant[:, -(self.S_ITA - self.S):, :] = 0 @@ -618,7 +614,7 @@ def step4_QK(self, no_partial_softmax, mask, index): matrix = np.squeeze(self.A_partial_softmax) plt.imshow(matrix, cmap='viridis') plt.colorbar() - plt.title("Matrix A") + plt.title("A After Soft") plt.show() self.tiler_AV(self.Qp_requant, self.Kp_requant, self.A_requant, "Qp_in", "Kp_in", "A") @@ -632,7 +628,8 @@ def soft(self, no_partial_softmax = False): self.A_partial_softmax = np.pad(self.A_partial_softmax, ((0, 0), (0, self.S_ITA - self.S), (0, self.S_ITA - self.S))) else: - self.A_partial_softmax = streamingPartialSoftmax(self.A_requant[:, :self.S, :self.S]) + self.A_partial_softmax = streamingPartialSoftmax(self.A_requant[:, :self.S, :self.S], self.Mask) + self.A_partial_softmax[self.Mask] = 0 self.A_partial_softmax = np.pad(self.A_partial_softmax, ((0, 0), (0, self.S_ITA - self.S), (0, self.S_ITA - self.S))) diff --git a/PyITA/softmax.py b/PyITA/softmax.py index eabf432..a9a8ae1 100644 --- a/PyITA/softmax.py +++ b/PyITA/softmax.py @@ -67,7 +67,7 @@ def fastSoftmax(x, integerize = True): return np.repeat(exp_sum_inverse, seq_length).reshape(n_heads, seq_length, seq_length) / 2**shift -def streamingPartialSoftmax(x, integerize = True): +def streamingPartialSoftmax(x, mask, integerize = True): if not integerize: x = x.astype(np.float32) @@ -143,10 +143,21 @@ def streamingPartialSoftmax(x, integerize = True): else: shift = diff * eps_max + print(shift.shape) + print() + # Set shift value so high that 2**8 >> shift gets zero for all masked values + shift[mask[:,:,i*PE:(i*PE)+width]] = 16 + matrix = np.squeeze(shift) + import matplotlib.pyplot as plt + plt.imshow(matrix, cmap='viridis') + plt.colorbar() + plt.title("Shift Matrix") + plt.show() + # Calculate exponential sum over the current part of the row and scale it by 2**10 to prevent underflow if integerize: - # exp_sum = np.sum(2**8 >> shift, -1) # or - exp_sum = np.floor(np.sum(2**8 / 2**shift, axis = -1)) + exp_sum = np.sum(2**8 >> shift, -1) # or + # exp_sum = np.floor(np.sum(2**8 / 2**shift, axis = -1)) else: exp_sum = np.sum(1 / 2**shift, axis = -1) @@ -156,6 +167,8 @@ def streamingPartialSoftmax(x, integerize = True): else: exp_partial_sum = (exp_partial_sum / 2**(shift_sum.astype(np.float32))) + exp_sum + print(exp_partial_sum.shape) + print(exp_partial_sum[0]) ## STAGE 2: Calculate the softmax activation # Invert the partial sum if integerize: diff --git a/modelsim.ini b/modelsim.ini new file mode 100644 index 0000000..d76f789 --- /dev/null +++ b/modelsim.ini @@ -0,0 +1,2221 @@ +; vsim modelsim.ini file +[Version] +INIVersion = "2021.3_2" + +; Copyright 1991-2021 Mentor Graphics Corporation +; +; All Rights Reserved. +; +; THIS WORK CONTAINS TRADE SECRET AND PROPRIETARY INFORMATION WHICH IS THE PROPERTY OF +; MENTOR GRAPHICS CORPORATION OR ITS LICENSORS AND IS SUBJECT TO LICENSE TERMS. +; + +[Library] +std = $MODEL_TECH/../std +ieee = $MODEL_TECH/../ieee +vital2000 = $MODEL_TECH/../vital2000 +; +; VITAL concerns: +; +; The library ieee contains (among other packages) the packages of the +; VITAL 2000 standard. When a design uses VITAL 2000 exclusively, it should use +; the physical library ieee (recommended), or use the physical library +; vital2000, but not both. The design can use logical library ieee and/or +; vital2000 as long as each of these maps to the same physical library, either +; ieee or vital2000. +; +; A design using the 1995 version of the VITAL packages, whether or not +; it also uses the 2000 version of the VITAL packages, must have logical library +; name ieee mapped to physical library vital1995. (A design cannot use library +; vital1995 directly because some packages in this library use logical name ieee +; when referring to the other packages in the library.) The design source +; should use logical name ieee when referring to any packages there except the +; VITAL 2000 packages. Any VITAL 2000 present in the design must use logical +; name vital2000 (mapped to physical library vital2000) to refer to those +; packages. +; ieee = $MODEL_TECH/../vital1995 +; +; For compatiblity with previous releases, logical library name vital2000 maps +; to library vital2000 (a different library than library ieee, containing the +; same packages). +; A design should not reference VITAL from both the ieee library and the +; vital2000 library because the vital packages are effectively different. +; A design that references both the ieee and vital2000 libraries must have +; both logical names ieee and vital2000 mapped to the same library, either of +; these: +; $MODEL_TECH/../ieee +; $MODEL_TECH/../vital2000 +; +verilog = $MODEL_TECH/../verilog +std_developerskit = $MODEL_TECH/../std_developerskit +synopsys = $MODEL_TECH/../synopsys +modelsim_lib = $MODEL_TECH/../modelsim_lib +sv_std = $MODEL_TECH/../sv_std +mtiAvm = $MODEL_TECH/../avm +mtiRnm = $MODEL_TECH/../rnm +mtiOvm = $MODEL_TECH/../ovm-2.1.2 +mtiUvm = $MODEL_TECH/../uvm-1.1d +mtiUPF = $MODEL_TECH/../upf_lib +mtiPA = $MODEL_TECH/../pa_lib +floatfixlib = $MODEL_TECH/../floatfixlib +mc2_lib = $MODEL_TECH/../mc2_lib +flps_lib = $MODEL_TECH/../flps_lib +osvvm = $MODEL_TECH/../osvvm + +; added mapping for ADMS +mgc_ams = $MODEL_TECH/../mgc_ams +ieee_env = $MODEL_TECH/../ieee_env + +;vhdl_psl_checkers = $MODEL_TECH/../vhdl_psl_checkers // Source files only for this release +;verilog_psl_checkers = $MODEL_TECH/../verilog_psl_checkers // Source files only for this release +;mvc_lib = $MODEL_TECH/../mvc_lib +infact = $MODEL_TECH/../infact +vhdlopt_lib = $MODEL_TECH/../vhdlopt_lib +vh_ux01v_lib = $MODEL_TECH/../vh_ux01v_lib + +; Automatically perform logical->physical mapping for physical libraries that +; appear in -L/-Lf options with filesystem path delimiters (e.g. '.' or '/'). +; The tail of the filesystem path name is chosen as the logical library name. +; For example, in the command "vopt -L ./path/to/lib1 -o opttop top", +; vopt automatically performs the mapping "lib1 -> ./path/to/lib1". +; See the User Manual for more details. +; +; AutoLibMapping = 0 + +[DefineOptionset] +; Define optionset entries for the various compilers, vmake, and vsim. +; These option sets can be used with the "-optionset " syntax. +; i.e. +; vlog -optionset COMPILEDEBUG top.sv +; vsim -optionset UVMDEBUG my_top +; +; Following are some useful examples. + +; define a vsim optionset for uvm debugging +UVMDEBUG = -uvmcontrol=all -msgmode both -displaymsgmode both -classdebug -onfinish stop + +; define a vopt optionset for debugging +VOPTDEBUG = +acc -debugdb + +[encryption] +; For vencrypt and vhencrypt. + +; Controls whether to encrypt whole files by ignoring all protect directives +; (except "viewport" and "interface_viewport") that are present in the input. +; The default is 0, use embedded protect directives to control the encryption. +; Set this to 1 to encrypt whole files by ignoring embedded protect directives. +; wholefile = 0 + +; Sets the data_method to use for the symmetric session key. +; The session key is a symmetric key that is randomly generated for each +; protected region (envelope) and is the heart of all encryption. This is used +; to set the length of the session key to generate and use when encrypting the +; HDL text. Supported values are aes128, aes192, and aes256. +; data_method = aes128 + +; The following 2 are for specifying an IEEE Std. 1735 Version 2 (V2) encryption +; "recipe" comprising an optional common block, at least one tool block (which +; contains the key public key), and the text to be encrypted. The common block +; and any of the tool blocks may contain rights in the form of the "control" +; directive. The text to be encrypted is specified either by setting +; "wholefile" to 1 or by embedding protect "begin" and "end" directives in +; the input HDL files. + +; Common recipe specification file. This file is optional. Its presence will +; require at least one "toolblock" to be specified. +; Directives such as "author" "author_info" and "data_method", +; as well as the common block license specification, go in this file. +; common = + +; Tool block specification recipe(s). Public key file with optional tool block +; file name. May be multiply-defined; at least one tool block is required if +; a recipe is being specified. +; Key file is a file name with no extension (.deprecated or .active will be +; supplied by the encryption tool). +; Rights file name is optional. +; toolblock = [,]{:[,]} + +; Location of directory containing recipe files. +; The default location is in the product installation directory. +; keyring = $MODEL_TECH/../keyring + +; Enable encryption statistics. Specify one or more arguments: +; [all,none,time,cmd,msg,perf,verbose,list] +; Add '-' to disable specific statistics. Default is [cmd,msg]. +Stats = cmd,msg + +[vcom] +; VHDL93 variable selects language version as the default. +; Default is VHDL-2002. +; Value of 0 or 1987 for VHDL-1987. +; Value of 1 or 1993 for VHDL-1993. +; Default or value of 2 or 2002 for VHDL-2002. +; Value of 3 or 2008 for VHDL-2008 +; Value of 4 or ams99 for VHDL-AMS-1999 +; Value of 5 or ams07 for VHDL-AMS-2007 +VHDL93 = 2002 + +; Ignore VHDL-2008 declaration of REAL_VECTOR in package STANDARD. Default is off. +; ignoreStandardRealVector = 1 + +; Show source line containing error. Default is off. +; Show_source = 1 + +; Turn off unbound-component warnings. Default is on. +; Show_Warning1 = 0 + +; Turn off process-without-a-wait-statement warnings. Default is on. +; Show_Warning2 = 0 + +; Turn off null-range warnings. Default is on. +; Show_Warning3 = 0 + +; Turn off no-space-in-time-literal warnings. Default is on. +; Show_Warning4 = 0 + +; Turn off multiple-drivers-on-unresolved-signal warnings. Default is on. +; Show_Warning5 = 0 + +; Turn off optimization for IEEE std_logic_1164 package. Default is on. +; Optimize_1164 = 0 + +; Enable compiler statistics. Specify one or more arguments: +; [all,none,time,cmd,msg,perf,verbose,list] +; Add '-' to disable specific statistics. Default is [time,cmd,msg]. +; Stats = time,cmd,msg + +; Turn on resolving of ambiguous function overloading in favor of the +; "explicit" function declaration (not the one automatically created by +; the compiler for each type declaration). Default is off. +; The .ini file has Explicit enabled so that std_logic_signed/unsigned +; will match the behavior of synthesis tools. +Explicit = 1 + +; Turn off acceleration of the VITAL packages. Default is to accelerate. +; NoVital = 1 + +; Turn off VITAL compliance checking. Default is checking on. +; NoVitalCheck = 1 + +; Ignore VITAL compliance checking errors. Default is to not ignore. +; IgnoreVitalErrors = 1 + +; Turn off VITAL compliance checking warnings. Default is to show warnings. +; Show_VitalChecksWarnings = 0 + +; Turn off PSL assertion warning messages. Default is to show warnings. +; Show_PslChecksWarnings = 0 + +; Enable parsing of embedded PSL assertions. Default is enabled. +; EmbeddedPsl = 0 + +; Keep silent about case statement static warnings. +; Default is to give a warning. +; NoCaseStaticError = 1 + +; Keep silent about warnings caused by aggregates that are not locally static. +; Default is to give a warning. +; NoOthersStaticError = 1 + +; Treat as errors: +; case statement static warnings +; warnings caused by aggregates that are not locally static +; Overrides NoCaseStaticError, NoOthersStaticError settings. +; PedanticErrors = 1 + +; Turn off inclusion of debugging info within design units. +; Default is to include debugging info. +; NoDebug = 1 + +; Turn off "Loading..." messages. Default is messages on. +; Quiet = 1 + +; Turn on some limited synthesis rule compliance checking. Checks only: +; -- signals used (read) by a process must be in the sensitivity list +; CheckSynthesis = 1 + +; Activate optimizations on expressions that do not involve signals, +; waits, or function/procedure/task invocations. Default is off. +; ScalarOpts = 1 + +; Turns on lint-style checking. +; Show_Lint = 1 + +; Require the user to specify a configuration for all bindings, +; and do not generate a compile time default binding for the +; component. This will result in an elaboration error of +; 'component not bound' if the user fails to do so. Avoids the rare +; issue of a false dependency upon the unused default binding. +; RequireConfigForAllDefaultBinding = 1 + +; Perform default binding at compile time. +; Default is to do default binding at load time. +; BindAtCompile = 1; + +; Inhibit range checking on subscripts of arrays. Range checking on +; scalars defined with subtypes is inhibited by default. +; NoIndexCheck = 1 + +; Inhibit range checks on all (implicit and explicit) assignments to +; scalar objects defined with subtypes. +; NoRangeCheck = 1 + +; Set the prefix to be honored for synthesis/coverage pragma recognition. +; Default is "". +; AddPragmaPrefix = "" + +; Ignore synthesis and coverage pragmas with this prefix. +; Default is "". +; IgnorePragmaPrefix = "" + +; Turn on code coverage in VHDL design units. Default is off. +; Coverage = sbceft + +; Turn off code coverage in VHDL subprograms. Default is on. +; CoverSub = 0 + +; Automatically exclude VHDL case statement OTHERS choice branches. +; This includes OTHERS choices in selected signal assigment statements. +; Default is to not exclude. +; CoverExcludeDefault = 1 + +; Control compiler and VOPT optimizations that are allowed when +; code coverage is on. Refer to the comment for this in the [vlog] area. +; CoverOpt = 3 + +; Turn on or off clkOpt optimization for code coverage. Default is on. +; CoverClkOpt = 1 + +; Turn on or off clkOpt optimization builtins for code coverage. Default is on. +; CoverClkOptBuiltins = 0 + +; Inform code coverage optimizations to respect VHDL 'H' and 'L' +; values on signals in conditions and expressions, and to not automatically +; convert them to '1' and '0'. Default is to not convert. +; CoverRespectHandL = 0 + +; Increase or decrease the maximum number of rows allowed in a UDP table +; implementing a VHDL condition coverage or expression coverage expression. +; More rows leads to a longer compile time, but more expressions covered. +; CoverMaxUDPRows = 192 + +; Increase or decrease the maximum number of input patterns that are present +; in FEC table. This leads to a longer compile time with more expressions +; covered with FEC metric. +; CoverMaxFECRows = 192 + +; Increase or decrease the limit on the size of expressions and conditions +; considered for expression and condition coverages. Higher FecUdpEffort leads +; to higher compile, optimize and simulation time, but more expressions and +; conditions are considered for coverage in the design. FecUdpEffort can +; be set to a number ranging from 1 (low) to 3 (high), defined as: +; 1 - (low) Only small expressions and conditions considered for coverage. +; 2 - (medium) Bigger expressions and conditions considered for coverage. +; 3 - (high) Very large expressions and conditions considered for coverage. +; The default setting is 1 (low). +; FecUdpEffort = 1 + +; Enable or disable Focused Expression Coverage analysis for conditions and +; expressions. Focused Expression Coverage data is provided by default when +; expression and/or condition coverage is active. +; CoverFEC = 0 + +; Enable or disable UDP Coverage analysis for conditions and expressions. +; UDP Coverage data is disabled by default when expression and/or condition +; coverage is active. +; CoverUDP = 1 + +; Enable or disable Rapid Expression Coverage mode for conditions and expressions. +; Disabling this would convert non-masking conditions in FEC tables to matching +; input patterns. +; CoverREC = 1 + +; Enable or disable bit-blasting multi-bit operands of reduction prefix expressions +; for expression/condition coverage. +; NOTE: Enabling this may have a negative impact on simulation performance. +; CoverExpandReductionPrefix = 0 + +; Enable or disable short circuit evaluation of conditions and expressions when +; condition or expression coverage is active. Short circuit evaluation is enabled +; by default. +; CoverShortCircuit = 0 + +; Enable code coverage reporting of code that has been optimized away. +; The default is not to report. +; CoverReportCancelled = 1 + +; Enable deglitching of code coverage in combinatorial, non-clocked, processes. +; Default is no deglitching. +; CoverDeglitchOn = 1 + +; Control the code coverage deglitching period. A period of 0, eliminates delta +; cycle glitches. The value of CoverDeglitchPeriod needs to be either be 0 or a +; time string that includes time units. Examples: 0 or 10.0ps or "10.0 ps". +; CoverDeglitchPeriod = 0 + +; Use this directory for compiler temporary files instead of "work/_temp" +; CompilerTempDir = /tmp + +; Set this to cause the compilers to force data to be committed to disk +; when the files are closed. +; SyncCompilerFiles = 1 + +; Add VHDL-AMS declarations to package STANDARD +; Default is not to add +; AmsStandard = 1 + +; Range and length checking will be performed on array indices and discrete +; ranges, and when violations are found within subprograms, errors will be +; reported. Default is to issue warnings for violations, because subprograms +; may not be invoked. +; NoDeferSubpgmCheck = 0 + +; Turn ON detection of FSMs having single bit current state variable. +; FsmSingle = 1 + +; Turn off reset state transitions in FSM. +; FsmResetTrans = 0 + +; Turn ON detection of FSM Implicit Transitions. +; FsmImplicitTrans = 1 + +; Controls whether or not to show immediate assertions with constant expressions +; in GUI/report/UCDB etc. By default, immediate assertions with constant +; expressions are shown in GUI/report/UCDB etc. This does not affect +; evaluation of immediate assertions. +; ShowConstantImmediateAsserts = 0 + +; Controls how VHDL basic identifiers are stored with the design unit. +; Does not make the language case-sensitive, affects only how declarations +; declared with basic identifiers have their names stored and printed +; (in the GUI, examine, etc.). +; Default is to preserve the case as originally depicted in the VHDL source. +; Value of 0 indicates to change all basic identifiers to lower case. +; PreserveCase = 0 + +; For Configuration Declarations, controls the effect that USE clauses have +; on visibility inside the configuration items being configured. If 1 +; (the default), then use pre-10.0 behavior. If 0, then for stricter LRM-compliance, +; extend the visibility of objects made visible through USE clauses into nested +; component configurations. +; OldVHDLConfigurationVisibility = 0 + +; Allows VHDL configuration declarations to be in a different library from +; the corresponding configured entity. Default is to not allow this for +; stricter LRM-compliance. +; SeparateConfigLibrary = 1; + +; Determine how mode OUT subprogram parameters of type array and record are treated. +; If 0 (the default), then only VHDL 2008 will do this initialization. +; If 1, always initialize the mode OUT parameter to its default value. +; If 2, do not initialize the mode OUT out parameter. +; Note that prior to release 10.1, all language versions did not initialize mode +; OUT array and record type parameters, unless overridden here via this mechanism. +; In release 10.1 and later, only files compiled with VHDL 2008 will cause this +; initialization, unless overridden here. +; InitOutCompositeParam = 0 + +; Generate symbols debugging database in only some special cases to save on +; the number of files in the library. For other design-units, this database is +; generated on-demand in vsim. +; Default is to to generate debugging database for all design-units. +; SmartDbgSym = 1 + +; Enable or disable automatic creation of missing libraries. +; Default is 1 (enabled) +; CreateLib = 1 + +; Describe compilation options according to matching file patterns. +; File pattern * matches all printing characters other than '/'. +; File pattern **/x matches all paths containing file/directory x. +; File pattern x/** matches all paths beginning at directory x. +; FileOptMap = (**/*.vhd => -2008); + +; Describe library targets of compilation according to matching file patterns. +; LibMap = (**/*.vhd => work); + +[vlog] +; Turn off inclusion of debugging info within design units. +; Default is to include debugging info. +; NoDebug = 1 + +; Turn off "Loading..." messages. Default is messages on. +; Quiet = 1 + +; Turn on Verilog hazard checking (order-dependent accessing of global vars). +; Default is off. +; Hazard = 1 + +; Turn on converting regular Verilog identifiers to uppercase. Allows case +; insensitivity for module names. Default is no conversion. +; UpCase = 1 + +; Activate optimizations on expressions that do not involve signals, +; waits, or function/procedure/task invocations. Default is off. +; ScalarOpts = 1 + +; Turns on lint-style checking. +; Show_Lint = 1 + +; Show source line containing error. Default is off. +; Show_source = 1 + +; Turn on bad option warning. Default is off. +; Show_BadOptionWarning = 1 + +; Revert back to IEEE 1364-1995 syntax, default is 0 (off). +; vlog95compat = 1 + +; Turn off PSL warning messages. Default is to show warnings. +; Show_PslChecksWarnings = 0 + +; Enable parsing of embedded PSL assertions. Default is enabled. +; EmbeddedPsl = 0 + +; Enable compiler statistics. Specify one or more arguments: +; [all,none,time,cmd,msg,perf,verbose,list,kb] +; Add '-' to disable specific statistics. Default is [time,cmd,msg]. +; Stats = time,cmd,msg + +; Check vlog plusargs. Default is 0 (off). +; The command line equivalent is -check_plusargs . +; 0 = Don't check plusargs (this is the default) +; 1 = Warning on unrecognized plusarg +; 2 = Error and exit on unrecognized plusarg +; CheckPlusargs = 1 + +; Set the threshold for automatically identifying sparse Verilog memories. +; A memory with total size in bytes equal to or more than the sparse memory +; threshold gets marked as sparse automatically, unless specified otherwise +; in source code or by the +nosparse commandline option of vlog or vopt. +; The default is 1M. (i.e. memories with total size equal +; to or greater than 1Mb are marked as sparse) +; SparseMemThreshold = 1048576 + +; Set the prefix to be honored for synthesis and coverage pragma recognition. +; Default is "". +; AddPragmaPrefix = "" + +; Ignore synthesis and coverage pragmas with this prefix. +; Default is "". +; IgnorePragmaPrefix = "" + +; Set the option to treat all files specified in a vlog invocation as a +; single compilation unit. The default value is set to 0 which will treat +; each file as a separate compilation unit as specified in the P1800 draft standard. +; MultiFileCompilationUnit = 1 + +; Turn on code coverage in Verilog design units. Default is off. +; Coverage = sbceft + +; Automatically exclude Verilog case statement default branches. +; Default is to not automatically exclude defaults. +; CoverExcludeDefault = 1 + +; Increase or decrease the maximum number of rows allowed in a UDP table +; implementing a VHDL condition coverage or expression coverage expression. +; More rows leads to a longer compile time, but more expressions covered. +; CoverMaxUDPRows = 192 + +; Increase or decrease the maximum number of input patterns that are present +; in FEC table. This leads to a longer compile time with more expressions +; covered with FEC metric. +; CoverMaxFECRows = 192 + +; Enable Multi Bit Expression Coverage in a Design, If design has expression with +; multi bit operands, this option enables its Expression Coverage. +; The default value is 0. +; CoverFecMultiBit = 1 + +; Increase or decrease the limit on the size of expressions and conditions +; considered for expression and condition coverages. Higher FecUdpEffort leads +; to higher compile, optimize and simulation time, but more expressions and +; conditions are considered for coverage in the design. FecUdpEffort can +; be set to a number ranging from 1 (low) to 3 (high), defined as: +; 1 - (low) Only small expressions and conditions considered for coverage. +; 2 - (medium) Bigger expressions and conditions considered for coverage. +; 3 - (high) Very large expressions and conditions considered for coverage. +; The default setting is 1 (low). +; FecUdpEffort = 1 + +; Enable or disable Focused Expression Coverage analysis for conditions and +; expressions. Focused Expression Coverage data is provided by default when +; expression and/or condition coverage is active. +; CoverFEC = 0 + +; Enable or disable UDP Coverage analysis for conditions and expressions. +; UDP Coverage data is disabled by default when expression and/or condition +; coverage is active. +; CoverUDP = 1 + +; Enable or disable Rapid Expression Coverage mode for conditions and expressions. +; Disabling this would convert non-masking conditions in FEC tables to matching +; input patterns. +; CoverREC = 1 + +; Enable or disable bit-blasting multi-bit operands of reduction prefix expressions +; for expression/condition coverage. +; NOTE: Enabling this may have a negative impact on simulation performance. +; CoverExpandReductionPrefix = 0 + +; Enable or disable short circuit evaluation of conditions and expressions when +; condition or expression coverage is active. Short circuit evaluation is enabled +; by default. +; CoverShortCircuit = 0 + +; Enable deglitching of code coverage in combinatorial, non-clocked, processes. +; Default is no deglitching. +; CoverDeglitchOn = 1 + +; Control the code coverage deglitching period. A period of 0, eliminates delta +; cycle glitches. The value of CoverDeglitchPeriod needs to be either be 0 or a +; time string that includes time units. Examples: 0 or 10.0ps or "10.0 ps". +; CoverDeglitchPeriod = 0 + +; Turn on code coverage in VLOG `celldefine modules, modules containing +; specify blocks, and modules included using vlog -v and -y. Default is off. +; CoverCells = 1 + +; Enable code coverage reporting of code that has been optimized away. +; The default is not to report. +; CoverReportCancelled = 1 + +; Control compiler and VOPT optimizations that are allowed when +; code coverage is on. This is a number from 0 to 5, with the following +; meanings (the default is 3): +; 5 -- All allowable optimizations are on. +; 4 -- Turn off removing unreferenced code. +; 3 -- Turn off process, always block and if statement merging. +; 2 -- Turn off expression optimization, converting primitives +; to continuous assignments, VHDL subprogram inlining. +; and VHDL clkOpt (converting FF's to builtins). +; 1 -- Turn off continuous assignment optimizations and clock suppression. +; 0 -- Turn off Verilog module inlining and VHDL arch inlining. +; HOWEVER, if fsm coverage is turned on, optimizations will be forced to +; level 3, with also turning off converting primitives to continuous assigns. +; CoverOpt = 3 + +; Specify the override for the default value of "cross_num_print_missing" +; option for the Cross in Covergroups. If not specified then LRM default +; value of 0 (zero) is used. This is a compile time option. +; SVCrossNumPrintMissingDefault = 0 + +; Setting following to 1 would cause creation of variables which +; would represent the value of Coverpoint expressions. This is used +; in conjunction with "SVCoverpointExprVariablePrefix" option +; in the modelsim.ini +; EnableSVCoverpointExprVariable = 0 + +; Specify the override for the prefix used in forming the variable names +; which represent the Coverpoint expressions. This is used in conjunction with +; "EnableSVCoverpointExprVariable" option of the modelsim.ini +; The default prefix is "expr". +; The variable name is +; variable name => _ +; SVCoverpointExprVariablePrefix = expr + +; Override for the default value of the SystemVerilog covergroup, +; coverpoint, and cross option.goal (defined to be 100 in the LRM). +; NOTE: It does not override specific assignments in SystemVerilog +; source code. NOTE: The modelsim.ini variable "SVCovergroupGoal" +; in the [vsim] section can override this value. +; SVCovergroupGoalDefault = 100 + +; Override for the default value of the SystemVerilog covergroup, +; coverpoint, and cross type_option.goal (defined to be 100 in the LRM) +; NOTE: It does not override specific assignments in SystemVerilog +; source code. NOTE: The modelsim.ini variable "SVCovergroupTypeGoal" +; in the [vsim] section can override this value. +; SVCovergroupTypeGoalDefault = 100 + +; Specify the override for the default value of "strobe" option for the +; Covergroup Type. This is a compile time option which forces "strobe" to +; a user specified default value and supersedes SystemVerilog specified +; default value of '0'(zero). NOTE: This can be overriden by a runtime +; modelsim.ini variable "SVCovergroupStrobe" in the [vsim] section. +; SVCovergroupStrobeDefault = 0 + +; Specify the override for the default value of "per_instance" option for the +; Covergroup variables. This is a compile time option which forces "per_instance" +; to a user specified default value and supersedes SystemVerilog specified +; default value of '0'(zero). +; SVCovergroupPerInstanceDefault = 0 + +; Specify the override for the default value of "get_inst_coverage" option for the +; Covergroup variables. This is a compile time option which forces +; "get_inst_coverage" to a user specified default value and supersedes +; SystemVerilog specified default value of '0'(zero). +; SVCovergroupGetInstCoverageDefault = 0 + +; +; A space separated list of resource libraries that contain precompiled +; packages. The behavior is identical to using the "-L" switch. +; +; LibrarySearchPath = [ ...] +LibrarySearchPath = mtiAvm mtiRnm mtiOvm mtiUvm mtiUPF infact + +; The behavior is identical to the "-mixedansiports" switch. Default is off. +; MixedAnsiPorts = 1 + +; Enable SystemVerilog 3.1a $typeof() function. Default is off. +; EnableTypeOf = 1 + +; Only allow lower case pragmas. Default is disabled. +; AcceptLowerCasePragmaOnly = 1 + +; Set the maximum depth permitted for a recursive include file nesting. +; IncludeRecursionDepthMax = 5 + +; Turn ON detection of FSMs having single bit current state variable. +; FsmSingle = 1 + +; Turn off reset state transitions in FSM. +; FsmResetTrans = 0 + +; Turn off detections of FSMs having x-assignment. +; FsmXAssign = 0 + +; Turn ON detection of FSM Implicit Transitions. +; FsmImplicitTrans = 1 + +; List of file suffixes which will be read as SystemVerilog. White space +; in extensions can be specified with a back-slash: "\ ". Back-slashes +; can be specified with two consecutive back-slashes: "\\"; +; SvFileSuffixes = sv svp svh + +; This setting is the same as the vlog -sv command line switch. +; Enables SystemVerilog features and keywords when true (1). +; When false (0), the rules of IEEE Std 1364-2005 are followed and +; SystemVerilog keywords are ignored. +; Svlog = 0 + +; Prints attribute placed upon SV packages during package import +; when true (1). The attribute will be ignored when this +; entry is false (0). The attribute name is "mti_design_element_load_message". +; The value of this attribute is a string literal. +; Default is true (1). +; PrintSVPackageLoadingAttribute = 1 + +; Do not show immediate assertions with constant expressions in +; GUI/reports/UCDB etc. By default immediate assertions with constant +; expressions are shown in GUI/reports/UCDB etc. This does not affect +; evaluation of immediate assertions. +; ShowConstantImmediateAsserts = 0 + +; Controls if untyped parameters that are initialized with values greater +; than 2147483647 are mapped to generics of type INTEGER or ignored. +; If mapped to VHDL Integers, values greater than 2147483647 +; are mapped to negative values. +; Default is to map these parameter to generic of type INTEGER +; ForceUnsignedToVHDLInteger = 1 + +; Enable AMS wreal (wired real) extensions. Default is 0. +; WrealType = 1 + +; Controls SystemVerilog Language Extensions. These options enable +; some non-LRM compliant behavior. +; SvExtensions = [+|-][,[+|-]*] + +; Generate symbols debugging database in only some special cases to save on +; the number of files in the library. For other design-units, this database is +; generated on-demand in vsim. +; Default is to to generate debugging database for all design-units. +; SmartDbgSym = 1 + +; Controls how $unit library entries are named. Valid options are: +; "file" (generate name based on the first file on the command line) +; "du" (generate name based on first design unit following an item +; found in $unit scope) +; CUAutoName = file + +; Enable or disable automatic creation of missing libraries. +; Default is 1 (enabled) +; CreateLib = 1 + +[sccom] +; Enable use of SCV include files and library. Default is off. +; UseScv = 1 + +; Add C++ compiler options to the sccom command line by using this variable. +; CppOptions = -g + +; Use custom C++ compiler located at this path rather than the default path. +; The path should point directly at a compiler executable. +; CppPath = /usr/bin/g++ + +; Specify the compiler version from the list of support GNU compilers. +; examples 4.7.4, 5.3.0, 7.4.0 +; CppInstall = 7.4.0 + +; Enable verbose messages from sccom. Default is off. +; SccomVerbose = 1 + +; sccom logfile. Default is no logfile. +; SccomLogfile = sccom.log + +; Enable use of SC_MS include files and library. Default is off. +; UseScMs = 1 + +; Use SystemC-2.2 instead of the default SystemC-2.3. Default is off. +; Sc22Mode = 1 + +; Enable compiler statistics. Specify one or more arguments: +; [all,none,time,cmd,msg,perf,verbose,list,kb] +; Add '-' to disable specific statistics. Default is [time,cmd,msg]. +; Stats = time,cmd,msg + +; Enable or disable automatic creation of missing libraries. +; Default is 1 (enabled) +; CreateLib = 1 + +; Enable use of UVMC library. Default is off. +; UseUvmc = 1 + +[vopt] +; Check vopt plusargs. Default is 0 (off). +; The command line equivalent is -check_plusargs . +; 0 = Don't check plusargs (this is the default) +; 1 = Warning on unrecognized plusarg +; 2 = Error and exit on unrecognized plusarg +; CheckPlusargs = 1 + +; Turn on code coverage in vopt. Default is off. +; Coverage = sbceft + +; enable or disable param saving in UCDB. +; CoverageSaveParam = 0 + +; Control compiler optimizations that are allowed when +; code coverage is on. Refer to the comment for this in the [vlog] area. +; CoverOpt = 3 + +; Controls set of CoverConstructs that are being considered for Coverage +; Collection. +; Some of Valid options are: default,set1,set2 +; Covermode = default + +; Override all PA VOPT and VSIM commands to run simulation in Non-PA mode. +; NonPAmode = 1 + +; Controls set of HDL cover constructs that would be considered(or not considered) +; for Coverage Collection. (Default corresponds to covermode default). +; Some of Valid options are: "ca", "citf", "cifl", "tcint", "fsmqs". +; Coverconstruct = noca,nocitf,nofsmtf,nofsmds,noctes,nocicl,nocprc,nocfl,nofsmup,nocifl,nocpm,notcint,nocpkg,nocsva + +; Increase or decrease the maximum number of rows allowed in a UDP table +; implementing a VHDL condition coverage or expression coverage expression. +; More rows leads to a longer compile time, but more expressions covered. +; CoverMaxUDPRows = 192 + +; Increase or decrease the maximum number of input patterns that are present +; in FEC table. This leads to a longer compile time with more expressions +; covered with FEC metric. +; CoverMaxFECRows = 192 + +; Enable Multi Bit Expression Coverage in a Design, If design has expression with +; multi bit operands, this option enables its Expression Coverage. +; The default value is 0. +; CoverFecMultiBit = 1 + +; Increase or decrease the limit on the size of expressions and conditions +; considered for expression and condition coverages. Higher FecUdpEffort leads +; to higher compile, optimize and simulation time, but more expressions and +; conditions are considered for coverage in the design. FecUdpEffort can +; be set to a number ranging from 1 (low) to 3 (high), defined as: +; 1 - (low) Only small expressions and conditions considered for coverage. +; 2 - (medium) Bigger expressions and conditions considered for coverage. +; 3 - (high) Very large expressions and conditions considered for coverage. +; The default setting is 1 (low). +; FecUdpEffort = 1 + +; Enable code coverage reporting of code that has been optimized away. +; The default is not to report. +; CoverReportCancelled = 1 + +; Enable deglitching of code coverage in combinatorial, non-clocked, processes. +; Default is no deglitching. +; CoverDeglitchOn = 1 + +; Enable compiler statistics. Specify one or more arguments: +; [all,none,time,cmd,msg,perf,verbose,list,kb] +; Add '-' to disable specific statistics. Default is [time,cmd,msg]. +; Stats = time,cmd,msg + +; Control the code coverage deglitching period. A period of 0, eliminates delta +; cycle glitches. The value of CoverDeglitchPeriod needs to be either be 0 or a +; time string that includes time units. Examples: 0 or 10.0ps or "10.0 ps". +; CoverDeglitchPeriod = 0 + +; Do not show immediate assertions with constant expressions in +; GUI/reports/UCDB etc. By default immediate assertions with constant +; expressions are shown in GUI/reports/UCDB etc. This does not affect +; evaluation of immediate assertions. +; ShowConstantImmediateAsserts = 0 + +; Set the maximum number of iterations permitted for a generate loop. +; Restricting this permits the implementation to recognize infinite +; generate loops. +; GenerateLoopIterationMax = 100000 + +; Set the maximum depth permitted for a recursive generate instantiation. +; Restricting this permits the implementation to recognize infinite +; recursions. +; GenerateRecursionDepthMax = 200 + +; Set the number of processes created during the code generation phase. +; By default a heuristic is used to set this value. This may be set to 0 +; to disable this feature completely. +; ParallelJobs = 0 + +; Controls SystemVerilog Language Extensions. These options enable +; some non-LRM compliant behavior. +; SvExtensions = [+|-][,[+|-]*] + +; Load the specified shared objects with the RTLD_GLOBAL flag. +; This gives global visibility to all symbols in the shared objects, +; meaning that subsequently loaded shared objects can bind to symbols +; in the global shared objects. The list of shared objects should +; be whitespace delimited. This option is not supported on the +; Windows or AIX platforms. +; GlobalSharedObjectList = example1.so example2.so example3.so + +; Disable SystemVerilog elaboration system task messages +; IgnoreSVAInfo = 1 +; IgnoreSVAWarning = 1 +; IgnoreSVAError = 1 +; IgnoreSVAFatal = 1 + +; Enable or disable automatic creation of missing libraries. +; Default is 1 (enabled) +; CreateLib = 1 + +[vsim] +; vopt flow +; Set to turn on automatic optimization of a design. +; Default is on +VoptFlow = 1 + +; Simulator resolution +; Set to fs, ps, ns, us, ms, or sec with optional prefix of 1, 10, or 100. +Resolution = ns + +; Disable certain code coverage exclusions automatically. +; Assertions and FSM are exluded from the code coverage by default +; Set AutoExclusionsDisable = fsm to enable code coverage for fsm +; Set AutoExclusionsDisable = assertions to enable code coverage for assertions +; Set AutoExclusionsDisable = all to enable code coverage for all the automatic exclusions +; Or specify comma or space separated list +;AutoExclusionsDisable = fsm,assertions + +; User time unit for run commands +; Set to default, fs, ps, ns, us, ms, or sec. The default is to use the +; unit specified for Resolution. For example, if Resolution is 100ps, +; then UserTimeUnit defaults to ps. +; Should generally be set to default. +UserTimeUnit = default + +; Default run length +RunLength = 100 + +; Maximum iterations that can be run without advancing simulation time +IterationLimit = 10000000 + +; Specify libraries to be searched for precompiled modules +; LibrarySearchPath = [ ...] + +; Set XPROP assertion fail limit. Default is 5. +; Any positive integer, -1 for infinity. +; XpropAssertionLimit = 5 + +; Control PSL and Verilog Assume directives during simulation +; Set SimulateAssumeDirectives = 0 to disable assume being simulated as asserts +; Set SimulateAssumeDirectives = 1 to enable assume simulation as asserts +; SimulateAssumeDirectives = 1 + +; Control the simulation of PSL and SVA +; These switches can be overridden by the vsim command line switches: +; -psl, -nopsl, -sva, -nosva. +; Set SimulatePSL = 0 to disable PSL simulation +; Set SimulatePSL = 1 to enable PSL simulation (default) +; SimulatePSL = 1 +; Set SimulateSVA = 0 to disable SVA simulation +; Set SimulateSVA = 1 to enable concurrent SVA simulation (default) +; SimulateSVA = 1 + +; Control SVA and VHDL immediate assertion directives during simulation +; Set SimulateImmedAsserts = 0 to disable simulation of immediate asserts +; Set SimulateImmedAsserts = 1 to enable simulation of immediate asserts +; SimulateImmedAsserts = 1 + +; License feature mappings for Verilog and VHDL +; qhsimvh Single language VHDL license +; qhsimvl Single language Verilog license +; msimhdlsim Language neutral license for either Verilog or VHDL +; msimhdlmix Second language only, language neutral license for either +; Verilog or VHDL +; +; Directives to license manager can be set either as single value or as +; space separated multi-values: +; vhdl Immediately checkout and hold a VHDL license (i.e., one of +; qhsimvh, msimhdlsim, or msimhdlmix) +; vlog Immediately checkout and hold a Verilog license (i.e., one of +; qhsimvl, msimhdlsim, or msimhdlmix) +; plus Immediately checkout and hold a VHDL license and a Verilog license +; noqueue Do not wait in the license queue when a license is not available +; viewsim Try for viewer license but accept simulator license(s) instead +; of queuing for viewer license (PE ONLY) +; noviewer Disable checkout of msimviewer license feature (PE ONLY) +; noslvhdl Disable checkout of qhsimvh license feature +; noslvlog Disable checkout of qhsimvl license feature +; nomix Disable checkout of msimhdlmix license feature +; nolnl Disable checkout of msimhdlsim license feature +; mixedonly Disable checkout of qhsimvh and qhsimvl license features +; lnlonly Disable checkout of qhsimvh,qhsimvl, and msimhdlmix license features +; +; Examples (remove ";" comment character to activate licensing directives): +; Single directive: +; License = plus +; Multi-directive (Note: space delimited directives): +; License = noqueue plus + +; Severity level of a VHDL assertion message or of a SystemVerilog severity system task +; which will cause a running simulation to stop. +; VHDL assertions and SystemVerilog severity system task that occur with the +; given severity or higher will cause a running simulation to stop. +; This value is ignored during elaboration. +; 0 = Note 1 = Warning 2 = Error 3 = Failure 4 = Fatal +BreakOnAssertion = 3 + +; Severity level of a tool message which will cause a running simulation to +; stop. This value is ignored during elaboration. Default is to not break. +; 0 = Note 1 = Warning 2 = Error 3 = Fatal +;BreakOnMessage = 2 + +; The class debug feature enables more visibility and tracking of class instances +; during simulation. By default this feature is disabled (0). To enable this +; feature set ClassDebug to 1. +; ClassDebug = 1 + +; Message Format conversion specifications: +; %S - Severity Level of message/assertion +; %R - Text of message +; %T - Time of message +; %D - Delta value (iteration number) of Time +; %K - Kind of path: Instance/Region/Signal/Process/Foreign Process/Unknown/Protected +; %i - Instance/Region/Signal pathname with Process name (if available) +; %I - shorthand for one of these: +; " %K: %i" +; " %K: %i File: %F" (when path is not Process or Signal) +; except that the %i in this case does not report the Process name +; %O - Process name +; %P - Instance/Region path without leaf process +; %F - File name +; %L - Line number; if assertion message, then line number of assertion or, if +; assertion is in a subprogram, line from which the call is made +; %u - Design unit name in form library.primary +; %U - Design unit name in form library.primary(secondary) +; %% - The '%' character itself +; +; If specific format for Severity Level is defined, use that format. +; Else, for a message that occurs during elaboration: +; -- Failure/Fatal message in VHDL region that is not a Process, and in +; certain non-VHDL regions, uses MessageFormatBreakLine; +; -- Failure/Fatal message otherwise uses MessageFormatBreak; +; -- Note/Warning/Error message uses MessageFormat. +; Else, for a message that occurs during runtime and triggers a breakpoint because +; of the BreakOnAssertion setting: +; -- if in a VHDL region that is not a Process, uses MessageFormatBreakLine; +; -- otherwise uses MessageFormatBreak. +; Else (a runtime message that does not trigger a breakpoint) uses MessageFormat. +; +; MessageFormatNote = "** %S: %R\n Time: %T Iteration: %D%I\n" +; MessageFormatWarning = "** %S: %R\n Time: %T Iteration: %D%I\n" +; MessageFormatError = "** %S: %R\n Time: %T Iteration: %D %K: %i File: %F\n" +; MessageFormatFail = "** %S: %R\n Time: %T Iteration: %D %K: %i File: %F\n" +; MessageFormatFatal = "** %S: %R\n Time: %T Iteration: %D %K: %i File: %F\n" +; MessageFormatBreakLine = "** %S: %R\n Time: %T Iteration: %D %K: %i File: %F Line: %L\n" +; MessageFormatBreak = "** %S: %R\n Time: %T Iteration: %D %K: %i File: %F\n" +; MessageFormat = "** %S: %R\n Time: %T Iteration: %D%I\n" + +; Error File - alternate file for storing error messages +; ErrorFile = error.log + +; Simulation Breakpoint messages +; This flag controls the display of function names when reporting the location +; where the simulator stops because of a breakpoint or fatal error. +; Example with function name: # Break in Process ctr at counter.vhd line 44 +; Example without function name: # Break at counter.vhd line 44 +; Default value is 1. +ShowFunctions = 1 + +; Default radix for all windows and commands. +; Radix may be one of: symbolic, ascii, binary, octal, decimal, hex, unsigned +; Flags may be one of: enumnumeric, showbase, wreal +DefaultRadix = hexadecimal +DefaultRadixFlags = showbase +; Set to 1 for make the signal_force VHDL and Verilog functions use the +; default radix when processing the force value. Prior to 10.2 signal_force +; used the default radix, now it always uses symbolic unless value explicitly indicates base +;SignalForceFunctionUseDefaultRadix = 0 + +; VSIM Startup command +; Startup = do startup.do + +; VSIM Shutdown file +; Filename to save u/i formats and configurations. +; ShutdownFile = restart.do +; To explicitly disable auto save: +; ShutdownFile = --disable-auto-save + +; Run simulator in batch mode as if -batch were specified on the command line if none of -c, -gui, or -i specified. +; Simulator runs in interactive mode as if -i were specified if this option is 0. Default is 0. +; BatchMode = 1 + +; File for saving command transcript when -batch option used +; This option is ignored when -c, -gui, or -i options are used or if BatchMode above is zero +; default is unset so command transcript only goes to stdout for better performance +; BatchTranscriptFile = transcript + +; File for saving command transcript, this option is ignored when -batch option is used +TranscriptFile = transcript + +; Transcript file long line wrapping mode(s) +; mode == 0 :: no wrapping, line recorded as is +; mode == 1 :: wrap at first whitespace after WSColumn +; or at Column. +; mode == 2 :: wrap as above, but add continuation +; character ('\') at end of each wrapped line +; +; WrapMode = 0 +; WrapColumn = 30000 +; WrapWSColumn = 27000 + +; File for saving command history +; CommandHistory = cmdhist.log + +; Specify whether paths in simulator commands should be described +; in VHDL or Verilog format. +; For VHDL, PathSeparator = / +; For Verilog, PathSeparator = . +; Must not be the same character as DatasetSeparator. +PathSeparator = / + +; Specify the dataset separator for fully rooted contexts. +; The default is ':'. For example: sim:/top +; Must not be the same character as PathSeparator. +DatasetSeparator = : + +; Specify a unique path separator for the Signal Spy set of functions. +; The default will be to use the PathSeparator variable. +; Must not be the same character as DatasetSeparator. +; SignalSpyPathSeparator = / + +; Used to control parsing of HDL identifiers input to the tool. +; This includes CLI commands, vsim/vopt/vlog/vcom options, +; string arguments to FLI/VPI/DPI calls, etc. +; If set to 1, accept either Verilog escaped Id syntax or +; VHDL extended id syntax, regardless of source language. +; If set to 0, the syntax of the source language must be used. +; Each identifier in a hierarchical name may need different syntax, +; e.g. "/top/\vhdl*ext*id\/middle/\vlog*ext*id /bottom" or +; "top.\vhdl*ext*id\.middle.\vlog*ext*id .bottom" +; GenerousIdentifierParsing = 1 + +; Disable VHDL assertion messages +; IgnoreNote = 1 +; IgnoreWarning = 1 +; IgnoreError = 1 +; IgnoreFailure = 1 + +; Disable SystemVerilog assertion messages +; IgnoreSVAInfo = 1 +; IgnoreSVAWarning = 1 +; IgnoreSVAError = 1 +; IgnoreSVAFatal = 1 + +; Do not print any additional information from Severity System tasks. +; Only the message provided by the user is printed along with severity +; information. +; SVAPrintOnlyUserMessage = 1; + +; Default force kind. May be freeze, drive, deposit, or default +; or in other terms, fixed, wired, or charged. +; A value of "default" will use the signal kind to determine the +; force kind, drive for resolved signals, freeze for unresolved signals +; DefaultForceKind = freeze + +; Control the iteration of events when a VHDL signal is forced to a value +; This flag can be set to honour the signal update event in next iteration, +; the default is to update and propagate in the same iteration. +; ForceSigNextIter = 1 + +; Enable simulation statistics. Specify one or more arguments: +; [all,none,time,cmd,msg,perf,verbose,list,kb,eor] +; Add '-' to disable specific statistics. Default is [time,cmd,msg]. +; Stats = time,cmd,msg + +; If zero, open files when elaborated; otherwise, open files on +; first read or write. Default is 0. +; DelayFileOpen = 1 + +; Control VHDL files opened for write. +; 0 = Buffered, 1 = Unbuffered +UnbufferedOutput = 0 + +; Control the number of VHDL files open concurrently. +; This number should always be less than the current ulimit +; setting for max file descriptors. +; 0 = unlimited +ConcurrentFileLimit = 40 + +; If nonzero, close files as soon as there is either an explicit call to +; file_close, or when the file variable's scope is closed. When zero, a +; file opened in append mode is not closed in case it is immediately +; reopened in append mode; otherwise, the file will be closed at the +; point it is reopened. +; AppendClose = 1 + +; Control the number of hierarchical regions displayed as +; part of a signal name shown in the Wave window. +; A value of zero tells VSIM to display the full name. +; The default is 0. +; WaveSignalNameWidth = 0 + +; Turn off warnings when changing VHDL constants and generics +; Default is 1 to generate warning messages +; WarnConstantChange = 0 + +; Turn off warnings from accelerated versions of the std_logic_arith, +; std_logic_unsigned, and std_logic_signed packages. +; StdArithNoWarnings = 1 + +; Turn off warnings from accelerated versions of the IEEE numeric_std +; and numeric_bit packages. +; NumericStdNoWarnings = 1 + +; Use old-style (pre-6.6) VHDL FOR GENERATE statement iteration names +; in the design hierarchy. +; This style is controlled by the value of the GenerateFormat +; value described next. Default is to use new-style names, which +; comprise the generate statement label, '(', the value of the generate +; parameter, and a closing ')'. +; Set this to 1 to use old-style names. +; OldVhdlForGenNames = 1 + +; Control the format of the old-style VHDL FOR generate statement region +; name for each iteration. Do not quote the value. +; The format string here must contain the conversion codes %s and %d, +; in that order, and no other conversion codes. The %s represents +; the generate statement label; the %d represents the generate parameter value +; at a particular iteration (this is the position number if the generate parameter +; is of an enumeration type). Embedded whitespace is allowed (but discouraged); +; leading and trailing whitespace is ignored. +; Application of the format must result in a unique region name over all +; loop iterations for a particular immediately enclosing scope so that name +; lookup can function properly. The default is %s__%d. +; GenerateFormat = %s__%d + +; Enable more efficient logging of VHDL Variables. +; Logging VHDL variables without this enabled, while possible, is very +; inefficient. Enabling this will provide a more efficient logging methodology +; at the expense of more memory usage. By default this feature is disabled (0). +; To enabled this feature, set this variable to 1. +; VhdlVariableLogging = 1 + +; Enable logging of VHDL access type variables and their designated objects. +; This setting will allow both variables of an access type ("access variables") +; and their designated objects ("access objects") to be logged. Logging a +; variable of an access type will automatically also cause the designated +; object(s) of that variable to be logged as the simulation progresses. +; Further, enabling this allows access objects to be logged by name. By default +; this feature is disabled (0). To enable this feature, set this variable to 1. +; Enabling this will automatically enable the VhdlVariableLogging feature also. +; AccessObjDebug = 1 + +; Make each VHDL package in a PDU has its own separate copy of the package instead +; of sharing the package between PDUs. The default is to share packages. +; To ensure that each PDU has its own set of packages, set this variable to 1. +; VhdlSeparatePduPackage = 1 + +; Specify whether checkpoint files should be compressed. +; The default is 1 (compressed). +; CheckpointCompressMode = 0 + +; Specify gcc compiler used in the compilation of automatically generated DPI exportwrapper. +; Use custom gcc compiler located at this path rather than the default path. +; The path should point directly at a compiler executable. +; DpiCppPath = /bin/gcc +; +; Specify the compiler version from the list of support GNU compilers. +; examples 4.7.4, 5.3.0, 7.4.0 +; DpiCppInstall = 7.4.0 + +; Specify whether to enable SystemVerilog DPI "out-of-the-blue" calls. +; The term "out-of-the-blue" refers to SystemVerilog export function calls +; made from C functions that don't have the proper context setup +; (as is the case when running under "DPI-C" import functions). +; When this is enabled, one can call a DPI export function +; (but not task) from any C code. +; the setting of this variable can be one of the following values: +; 0 : dpioutoftheblue call is disabled (default) +; 1 : dpioutoftheblue call is enabled, but export call debug support is not available. +; 2 : dpioutoftheblue call is enabled, and limited export call debug support is available. +; DpiOutOfTheBlue = 1 + +; Specify whether continuous assignments are run before other normal priority +; processes scheduled in the same iteration. This event ordering minimizes race +; differences between optimized and non-optimized designs, and is the default +; behavior beginning with the 6.5 release. For pre-6.5 event ordering, set +; ImmediateContinuousAssign to 0. +; The default is 1 (enabled). +; ImmediateContinuousAssign = 0 + +; List of dynamically loaded objects for Verilog PLI applications +; Veriuser = veriuser.sl + +; Which default VPI object model should the tool conform to? +; The 1364 modes are Verilog-only, for backwards compatibility with older +; libraries, and SystemVerilog objects are not available in these modes. +; +; In the absence of a user-specified default, the tool default is the +; latest available LRM behavior. +; Options for PliCompatDefault are: +; VPI_COMPATIBILITY_VERSION_1364v1995 +; VPI_COMPATIBILITY_VERSION_1364v2001 +; VPI_COMPATIBILITY_VERSION_1364v2005 +; VPI_COMPATIBILITY_VERSION_1800v2005 +; VPI_COMPATIBILITY_VERSION_1800v2008 +; +; Synonyms for each string are also recognized: +; VPI_COMPATIBILITY_VERSION_1364v1995 (1995, 95, 1364v1995, 1364V1995, VL1995) +; VPI_COMPATIBILITY_VERSION_1364v2001 (2001, 01, 1364v2001, 1364V2001, VL2001) +; VPI_COMPATIBILITY_VERSION_1364v2005 (1364v2005, 1364V2005, VL2005) +; VPI_COMPATIBILITY_VERSION_1800v2005 (2005, 05, 1800v2005, 1800V2005, SV2005) +; VPI_COMPATIBILITY_VERSION_1800v2008 (2008, 08, 1800v2008, 1800V2008, SV2008) + + +; PliCompatDefault = VPI_COMPATIBILITY_VERSION_1800v2005 + +; Specify whether the Verilog system task $fopen or vpi_mcd_open() +; will create directories that do not exist when opening the file +; in "a" or "w" mode. +; The default is 0 (do not create non-existent directories) +; CreateDirForFileAccess = 1 + +; Specify default options for the restart command. Options can be one +; or more of: -force -nobreakpoint -nolist -nolog -nowave -noassertions +; DefaultRestartOptions = -force + + +; Specify default UVM-aware debug options if the vsim -uvmcontrol switch is not used. +; Valid options include: all, none, verbose, disable, struct, reseed, msglog, trlog, certe. +; Options can be enabled by just adding the name, or disabled by prefixing the option with a "-". +; The list of options must be delimited by commas, without spaces or tabs. +; +; Some examples +; To turn on all available UVM-aware debug features: +; UVMControl = all +; To turn on the struct window, mesage logging, and transaction logging: +; UVMControl = struct,msglog,trlog +; To turn on all options except certe: +; UVMControl = all,-certe +; To completely disable all UVM-aware debug functionality: +; UVMControl = disable + +; Specify the WildcardFilter setting. +; A space separated list of object types to be excluded when performing +; wildcard matches with log, wave, etc commands. The default value for this variable is: +; "Variable Constant Generic Parameter SpecParam Memory Assertion Cover Endpoint ScVariable CellInternal ImmediateAssert VHDLFile" +; See "Using the WildcardFilter Preference Variable" in the documentation for +; details on how to use this variable and for descriptions of the filter types. +WildcardFilter = Variable Constant Generic Parameter SpecParam Memory Assertion Cover Endpoint ScVariable CellInternal ImmediateAssert VHDLFile + +; Specify the WildcardSizeThreshold setting. +; This integer setting specifies the size at which objects will be excluded when +; performing wildcard matches with log, wave, etc commands. Objects of size equal +; to or greater than the WildcardSizeThreshold will be filtered out from the wildcard +; matches. The size is a simple calculation of number of bits or items in the object. +; The default value is 8k (8192). Setting this value to 0 will disable the checking +; of object size against this threshold and allow all objects of any size to be logged. +WildcardSizeThreshold = 8192 + +; Specify whether warning messages are output when objects are filtered out due to the +; WildcardSizeThreshold. The default is 0 (no messages generated). +WildcardSizeThresholdVerbose = 0 + +; Turn on (1) or off (0) WLF file compression. +; The default is 1 (compress WLF file). +; WLFCompress = 0 + +; Specify whether to save all design hierarchy (1) in the WLF file +; or only regions containing logged signals (0). +; The default is 0 (save only regions with logged signals). +; WLFSaveAllRegions = 1 + +; WLF file time limit. Limit WLF file by time, as closely as possible, +; to the specified amount of simulation time. When the limit is exceeded +; the earliest times get truncated from the file. +; If both time and size limits are specified the most restrictive is used. +; UserTimeUnits are used if time units are not specified. +; The default is 0 (no limit). Example: WLFTimeLimit = {100 ms} +; WLFTimeLimit = 0 + +; WLF file size limit. Limit WLF file size, as closely as possible, +; to the specified number of megabytes. If both time and size limits +; are specified then the most restrictive is used. +; The default is 0 (no limit). +; WLFSizeLimit = 1000 + +; Specify whether or not a WLF file should be deleted when the +; simulation ends. A value of 1 will cause the WLF file to be deleted. +; The default is 0 (do not delete WLF file when simulation ends). +; WLFDeleteOnQuit = 1 + +; Specify whether or not a WLF file should be optimized during +; simulation. If set to 0, the WLF file will not be optimized. +; The default is 1, optimize the WLF file. +; WLFOptimize = 0 + +; Specify the name of the WLF file. +; The default is vsim.wlf +; WLFFilename = vsim.wlf + +; Specify whether to lock the WLF file. +; Locking the file prevents other invocations of ModelSim/Questa tools from +; inadvertently overwriting the WLF file. +; The default is 1, lock the WLF file. +; WLFFileLock = 0 + +; Specify the update interval for the WLF file in live simulation. +; The interval is given in seconds. +; The value is the smallest interval between WLF file updates. The WLF file +; will be flushed (updated) after (at least) the interval has elapsed, ensuring +; that the data is correct when viewed from a separate viewer. +; A value of 0 means that no updating will occur. +; The default value is 10 seconds. +; WLFUpdateInterval = 10 + +; Specify the WLF cache size limit for WLF files. +; The value is given in megabytes. A value of 0 turns off the cache. +; On non-Windows platforms the default WLFCacheSize setting is 2000 (megabytes). +; On Windows, the default value is 1000 (megabytes) to help to avoid filling +; process memory. +; WLFSimCacheSize allows a different cache size to be set for a live simulation +; WLF file, independent of post-simulation WLF file viewing. If WLFSimCacheSize +; is not set, it defaults to the WLFCacheSize value. +; WLFCacheSize = 2000 +; WLFSimCacheSize = 500 + +; Specify the WLF file event collapse mode. +; 0 = Preserve all events and event order. (same as -wlfnocollapse) +; 1 = Only record values of logged objects at the end of a simulator iteration. +; (same as -wlfcollapsedelta) +; 2 = Only record values of logged objects at the end of a simulator time step. +; (same as -wlfcollapsetime) +; The default is 1. +; WLFCollapseMode = 0 + +; Specify whether WLF file logging can use threads on multi-processor machines. +; If 0, no threads will be used; if 1, threads will be used if the system has +; more than one processor. +; WLFUseThreads = 1 + +; Specify the size of objects that will trigger "large object" messages +; at log/wave/list time. The size calculation of the object is the same as that +; used by the WildcardSizeThreshold. The default LargeObjectSize size is 500,000. +; Setting LargeObjectSize to 0 will disable these messages. +; LargeObjectSize = 500000 + +; Specify the depth of stack frames returned by $stacktrace([level]). +; This depth will be picked up when the optional 'level' argument +; is not specified or its value is not a positive integer. +; StackTraceDepth = 100 + +; Turn on/off undebuggable SystemC type warnings. Default is on. +; ShowUndebuggableScTypeWarning = 0 + +; Turn on/off unassociated SystemC name warnings. Default is off. +; ShowUnassociatedScNameWarning = 1 + +; Turn on/off SystemC IEEE 1666 deprecation warnings. Default is off. +; ScShowIeeeDeprecationWarnings = 1 + +; Turn on/off the check for multiple drivers on a SystemC sc_signal. Default is off. +; For SystemC-2.3.2 the valid values are 0,1 and 2 +; 0 = SC_SIGNAL_WRITE_CHECK_DISABLE_ +; 1 = SC_SIGNAL_WRITE_CHECK_DEFAULT_ +; 2 = SC_SIGNAL_WRITE_CHECK_CONFLICT_ +; For SystemC-2.2 the valid values are 0 and 1 +; 0 = DISABLE +; 1 = ENABLE +; ScEnableScSignalWriteCheck = 1 + +; Set SystemC default time unit. +; Set to fs, ps, ns, us, ms, or sec with optional +; prefix of 1, 10, or 100. The default is 1 ns. +; The ScTimeUnit value is honored if it is coarser than Resolution. +; If ScTimeUnit is finer than Resolution, it is set to the value +; of Resolution. For example, if Resolution is 100ps and ScTimeUnit is ns, +; then the default time unit will be 1 ns. However if Resolution +; is 10 ns and ScTimeUnit is ns, then the default time unit will be 10 ns. +ScTimeUnit = ns + +; Set SystemC sc_main stack size. The stack size is set as an integer +; number followed by the unit which can be Kb(Kilo-byte), Mb(Mega-byte) or +; Gb(Giga-byte). Default is 10 Mb. The stack size for sc_main depends +; on the amount of data on the sc_main() stack and the memory required +; to succesfully execute the longest function call chain of sc_main(). +ScMainStackSize = 10 Mb + +; Set SystemC thread stack size. The stack size is set as an integer +; number followed by the unit which can be Kb(Kilo-byte), Mb(Mega-byte) or +; Gb(Giga-byte). The stack size for sc_thread depends +; on the amount of data on the sc_thread stack and the memory required +; to succesfully execute the thread. +; ScStackSize = 1 Mb + +; Turn on/off execution of remainder of sc_main upon quitting the current +; simulation session. If the cumulative length of sc_main() in terms of +; simulation time units is less than the length of the current simulation +; run upon quit or restart, sc_main() will be in the middle of execution. +; This switch gives the option to execute the remainder of sc_main upon +; quitting simulation. The drawback of not running sc_main till the end +; is memory leaks for objects created by sc_main. If on, the remainder of +; sc_main will be executed ignoring all delays. This may cause the simulator +; to crash if the code in sc_main is dependent on some simulation state. +; Default is on. +ScMainFinishOnQuit = 1 + +; Enable calling of the DPI export taks/functions from the +; SystemC start_of_simulation() callback. +; The default is off. +; EnableDpiSosCb = 1 + + +; Set the SCV relationship name that will be used to identify phase +; relations. If the name given to a transactor relation matches this +; name, the transactions involved will be treated as phase transactions +ScvPhaseRelationName = mti_phase + +; Customize the vsim kernel shutdown behavior at the end of the simulation. +; Some common causes of the end of simulation are $finish (implicit or explicit), +; sc_stop(), tf_dofinish(), and assertion failures. +; This should be set to "ask", "exit", or "stop". The default is "ask". +; "ask" -- In batch mode, the vsim kernel will abruptly exit. +; In GUI mode, a dialog box will pop up and ask for user confirmation +; whether or not to quit the simulation. +; "stop" -- Cause the simulation to stay loaded in memory. This can make some +; post-simulation tasks easier. +; "exit" -- The simulation will abruptly exit without asking for any confirmation. +; "final" -- Run SystemVerilog final blocks then behave as "stop". +; Note: This variable can be overridden with the vsim "-onfinish" command line switch. +OnFinish = ask + +; Print pending deferred assertion messages. +; Deferred assertion messages may be scheduled after the $finish in the same +; time step. Deferred assertions scheduled to print after the $finish are +; printed before exiting with severity level NOTE since it's not known whether +; the assertion is still valid due to being printed in the active region +; instead of the reactive region where they are normally printed. +; OnFinishPendingAssert = 1; + +; Print "simstats" result. Default is 0. +; 0 == do not print simstats +; 1 == print at end of simulation +; 2 == print at end of each run command and end of simulation +; PrintSimStats = 1 + +; Assertion File - alternate file for storing VHDL/PSL/Verilog assertion messages +; AssertFile = assert.log + +; Enable assertion counts. Default is off. +; AssertionCounts = 1 + +; Run simulator in assertion debug mode. Default is off. +; AssertionDebug = 1 + +; Turn on/off PSL/SVA/VHDL assertion enable. Default is on. +; AssertionEnable = 0 + +; Set PSL/SVA/VHDL concurrent assertion fail limit. Default is -1. +; Any positive integer, -1 for infinity. +; AssertionLimit = 1 + +; Turn on/off concurrent assertion pass log. Default is off. +; Assertion pass logging is only enabled when assertion is browseable +; and assertion debug is enabled. +; AssertionPassLog = 1 + +; Turn on/off PSL concurrent assertion fail log. Default is on. +; The flag does not affect SVA +; AssertionFailLog = 0 + +; Turn on/off SVA concurrent assertion local var printing in -assertdebug mode. Default is on. +; AssertionFailLocalVarLog = 0 + +; Set action type for PSL/SVA concurrent assertion fail action. Default is continue. +; 0 = Continue 1 = Break 2 = Exit +; AssertionFailAction = 1 + +; Enable the active thread monitor in the waveform display when assertion debug is enabled. +; AssertionActiveThreadMonitor = 1 + +; Control how many waveform rows will be used for displaying the active threads. Default is 5. +; AssertionActiveThreadMonitorLimit = 5 + +; Assertion thread limit after which assertion would be killed/switched off. +; The default is -1 (unlimited). If the number of threads for an assertion go +; beyond this limit, the assertion would be either switched off or killed. This +; limit applies to only assert directives. +;AssertionThreadLimit = -1 + +; Action to be taken once the assertion thread limit is reached. Default +; is kill. It can have a value of off or kill. In case of kill, all the existing +; threads are terminated and no new attempts are started. In case of off, the +; existing attempts keep on evaluating but no new attempts are started. This +; variable applies to only assert directives. +;AssertionThreadLimitAction = kill + +; Cover thread limit after which cover would be killed/switched off. +; The default is -1 (unlimited). If the number of threads for a cover go +; beyond this limit, the cover would be either switched off or killed. This +; limit applies to only cover directives. +;CoverThreadLimit = -1 + +; Action to be taken once the cover thread limit is reached. Default +; is kill. It can have a value of off or kill. In case of kill, all the existing +; threads are terminated and no new attempts are started. In case of off, the +; existing attempts keep on evaluating but no new attempts are started. This +; variable applies to only cover directives. +;CoverThreadLimitAction = kill + + +; By default immediate assertions do not participate in Assertion Coverage calculations +; unless they are executed. This switch causes all immediate assertions in the design +; to participate in Assertion Coverage calculations, whether attempted or not. +; UnattemptedImmediateAssertions = 0 + +; By default immediate covers participate in Coverage calculations +; whether they are attempted or not. This switch causes all unattempted +; immediate covers in the design to stop participating in Coverage +; calculations. +; UnattemptedImmediateCovers = 0 + +; By default pass action block is not executed for assertions on vacuous +; success. The following variable is provided to enable execution of +; pass action block on vacuous success. The following variable is only effective +; if the user does not disable pass action block execution by using either +; system tasks or CLI. Also there is a performance penalty for enabling +; the following variable. +;AssertionEnableVacuousPassActionBlock = 1 + +; As per strict 1850-2005 PSL LRM, an always property can either pass +; or fail. However, by default, Questa reports multiple passes and +; multiple fails on top always/never property (always/never operator +; is the top operator under Verification Directive). The reason +; being that Questa reports passes and fails on per attempt of the +; top always/never property. Use the following flag to instruct +; Questa to strictly follow LRM. With this flag, all assert/never +; directives will start an attempt once at start of simulation. +; The attempt can either fail, match or match vacuously. +; For e.g. if always is the top operator under assert, the always will +; keep on checking the property at every clock. If the property under +; always fails, the directive will be considered failed and no more +; checking will be done for that directive. A top always property, +; if it does not fail, will show a pass at end of simulation. +; The default value is '0' (i.e. zero is off). For example: +; PslOneAttempt = 1 + +; Specify the number of clock ticks to represent infinite clock ticks. +; This affects eventually!, until! and until_!. If at End of Simulation +; (EOS) an active strong-property has not clocked this number of +; clock ticks then neither pass or fail (vacuous match) is returned +; else respective fail/pass is returned. The default value is '0' (zero) +; which effectively does not check for clock tick condition. For example: +; PslInfinityThreshold = 5000 + +; Control how many thread start times will be preserved for ATV viewing for a given assertion +; instance. Default is -1 (ALL). +; ATVStartTimeKeepCount = -1 + +; Turn on/off code coverage +; CodeCoverage = 0 + +; This option applies to condition and expression coverage UDP tables. It +; has no effect unless UDP is enabled for coverage with vcom/vlog/vopt -coverudp. +; If this option is used and a match occurs in more than one row in the UDP table, +; none of the counts for all matching rows is incremented. By default, counts are +; incremented for all matching rows. +; CoverCountAll = 1 + +; Turn off automatic inclusion of VHDL integers in toggle coverage. Default +; is to include them. +; ToggleNoIntegers = 1 + +; Set the maximum number of values that are collected for toggle coverage of +; VHDL integers. Default is 100; +; ToggleMaxIntValues = 100 + +; Set the maximum number of values that are collected for toggle coverage of +; Verilog real. Default is 100; +; ToggleMaxRealValues = 100 + +; Turn on automatic inclusion of Verilog integers in toggle coverage, except +; for enumeration types. Default is to include them. +; ToggleVlogIntegers = 0 + +; Turn on automatic inclusion of Verilog real type in toggle coverage, except +; for shortreal types. Default is to not include them. +; ToggleVlogReal = 1 + +; Turn on automatic inclusion of Verilog fixed-size unpacked arrays, VHDL multi-d arrays +; and VHDL arrays-of-arrays in toggle coverage. +; Default is to not include them. +; ToggleFixedSizeArray = 1 + +; Increase or decrease the maximum size of Verilog unpacked fixed-size arrays, +; VHDL multi-d arrays and VHDL arrays-of-arrays that are included for toggle coverage. +; This leads to a longer simulation time with bigger arrays covered with toggle coverage. +; Default is 1024. +; ToggleMaxFixedSizeArray = 1024 + +; Treat Verilog multi-dimensional packed vectors and packed structures as equivalently sized +; one-dimensional packed vectors for toggle coverage. Default is 0. +; TogglePackedAsVec = 0 + +; Treat Verilog enumerated types as equivalently sized one-dimensional packed vectors for +; toggle coverage. Default is 0. +; ToggleVlogEnumBits = 0 + +; Turn off automatic inclusion of VHDL records in toggle coverage. +; Default is to include them. +; ToggleVHDLRecords = 0 + +; Limit the widths of registers automatically tracked for toggle coverage. Default is 128. +; For unlimited width, set to 0. +; ToggleWidthLimit = 128 + +; Limit the counts that are tracked for toggle coverage. When all edges for a bit have +; reached this count, further activity on the bit is ignored. Default is 1. +; For unlimited counts, set to 0. +; ToggleCountLimit = 1 + +; Change the mode of extended toggle coverage. Default is 3. Valid modes are 1, 2 and 3. +; Following is the toggle coverage calculation criteria based on extended toggle mode: +; Mode 1: 0L->1H & 1H->0L & any one 'Z' transition (to/from 'Z'). +; Mode 2: 0L->1H & 1H->0L & one transition to 'Z' & one transition from 'Z'. +; Mode 3: 0L->1H & 1H->0L & all 'Z' transitions. +; ExtendedToggleMode = 3 + +; Enable toggle statistics collection only for ports. Default is 0. +; TogglePortsOnly = 1 + +; Limit the counts that are tracked for Focussed Expression Coverage. When a bin has +; reached this count, further tracking of the input patterns linked to it is ignored. +; Default is 1. For unlimited counts, set to 0. +; NOTE: Changing this value from its default value may affect simulation performance. +; FecCountLimit = 1 + +; Limit the counts that are tracked for UDP Coverage. When a bin has +; reached this count, further tracking of the input patterns linked to it is ignored. +; Default is 1. For unlimited counts, set to 0. +; NOTE: Changing this value from its default value may affect simulation performance. +; UdpCountLimit = 1 + +; Control toggle coverage deglitching period. A period of 0, eliminates delta +; cycle glitches. This is the default. The value of ToggleDeglitchPeriod needs to be either +; 0 or a time string that includes time units. Examples: 0 or 10.0ps or "10.0 ps". +; ToggleDeglitchPeriod = 10.0ps + +; Turn on/off all PSL/SVA cover directive enables. Default is on. +; CoverEnable = 0 + +; Turn on/off PSL/SVA cover log. Default is off "0". +; CoverLog = 1 + +; Set "at_least" value for all PSL/SVA cover directives. Default is 1. +; CoverAtLeast = 2 + +; Set "limit" value for all PSL/SVA cover directives. Default is -1. +; Any positive integer, -1 for infinity. +; CoverLimit = 1 + +; Specify the coverage database filename. +; Default is "" (i.e. database is NOT automatically saved on close). +; UCDBFilename = vsim.ucdb + +; Specify the maximum limit for the number of Cross (bin) products reported +; in XML and UCDB report against a Cross. A warning is issued if the limit +; is crossed. Default is zero. vsim switch -cvgmaxrptrhscross can override this +; setting. +; MaxReportRhsSVCrossProducts = 1000 + +; Specify the override for the "auto_bin_max" option for the Covergroups. +; If not specified then value from Covergroup "option" is used. +; SVCoverpointAutoBinMax = 64 + +; Specify the override for the value of "cross_num_print_missing" +; option for the Cross in Covergroups. If not specified then value +; specified in the "option.cross_num_print_missing" is used. This +; is a runtime option. NOTE: This overrides any "cross_num_print_missing" +; value specified by user in source file and any SVCrossNumPrintMissingDefault +; specified in modelsim.ini. +; SVCrossNumPrintMissing = 0 + +; Specify whether to use the value of "cross_num_print_missing" +; option in report and GUI for the Cross in Covergroups. If not specified then +; cross_num_print_missing is ignored for creating reports and displaying +; covergroups in GUI. Default is 0, which means ignore "cross_num_print_missing". +; UseSVCrossNumPrintMissing = 0 + +; Specify the threshold of Coverpoint wildcard bin value range size, above which +; a warning will be triggered. The default is 4K -- 12 wildcard bits. +; SVCoverpointWildCardBinValueSizeWarn = 4096 + +; Specify the override for the value of "strobe" option for the +; Covergroup Type. If not specified then value in "type_option.strobe" +; will be used. This is runtime option which forces "strobe" to +; user specified value and supersedes user specified values in the +; SystemVerilog Code. NOTE: This also overrides the compile time +; default value override specified using "SVCovergroupStrobeDefault" +; SVCovergroupStrobe = 0 + +; Override for explicit assignments in source code to "option.goal" of +; SystemVerilog covergroup, coverpoint, and cross. It also overrides the +; default value of "option.goal" (defined to be 100 in the SystemVerilog +; LRM) and the value of modelsim.ini variable "SVCovergroupGoalDefault". +; SVCovergroupGoal = 100 + +; Override for explicit assignments in source code to "type_option.goal" of +; SystemVerilog covergroup, coverpoint, and cross. It also overrides the +; default value of "type_option.goal" (defined to be 100 in the SystemVerilog +; LRM) and the value of modelsim.ini variable "SVCovergroupTypeGoalDefault". +; SVCovergroupTypeGoal = 100 + +; Enforce the 6.3 behavior of covergroup get_coverage() and get_inst_coverage() +; builtin functions, and report. This setting changes the default values of +; option.get_inst_coverage and type_option.merge_instances to ensure the 6.3 +; behavior if explicit assignments are not made on option.get_inst_coverage and +; type_option.merge_instances by the user. There are two vsim command line +; options, -cvg63 and -nocvg63 to override this setting from vsim command line. +; The default value of this variable from release 6.6 onwards is 0. This default +; drives compliance with the clarified behavior in the IEEE 1800-2009 standard. +; SVCovergroup63Compatibility = 0 + +; Enforce the default behavior of covergroup get_coverage() builtin function, GUI +; and report. This variable sets the default value of type_option.merge_instances. +; There are two vsim command line options, -cvgmergeinstances and +; -nocvgmergeinstances to override this setting from vsim command line. +; The default value of this variable, -1 (don't care), allows the tool to determine +; the effective value, based on factors related to capacity and optimization. +; The type_option.merge_instances appears in the GUI and coverage reports as either +; auto(1) or auto(0), depending on whether the effective value was determined to +; be a 1 or a 0. +; SVCovergroupMergeInstancesDefault = -1 + +; Enable or disable generation of more detailed information about the sampling +; of covergroup, cross, and coverpoints. It provides the details of the number +; of times the covergroup instance and type were sampled, as well as details +; about why covergroup, cross and coverpoint were not covered. A non-zero value +; is to enable this feature. 0 is to disable this feature. Default is 0 +; SVCovergroupSampleInfo = 0 + +; Specify the maximum number of Coverpoint bins in whole design for +; all Covergroups. +; MaxSVCoverpointBinsDesign = 2147483648 + +; Specify maximum number of Coverpoint bins in any instance of a Covergroup, default is 2^10 bins +; MaxSVCoverpointBinsInst = 1048576 + +; Specify the maximum number of Cross bins in whole design for +; all Covergroups. +; MaxSVCrossBinsDesign = 2147483648 + +; Specify maximum number of Cross bins in any instance of a Covergroup, default is 2^16 bins +; MaxSVCrossBinsInst = 67108864 + +; Specify whether vsim will collect the coverage data of zero-weight coverage items or not. +; By default, this variable is set 0, in which case option.no_collect setting will take effect. +; If this variable is set to 1, all zero-weight coverage items will not be saved. +; Note that the usage of vsim switch -cvgzwnocollect, if present, will override the setting +; of this variable. +; CvgZWNoCollect = 1 + +; Specify a space delimited list of double quoted TCL style +; regular expressions which will be matched against the text of all messages. +; If any regular expression is found to be contained within any message, the +; status for that message will not be propagated to the UCDB TESTSTATUS. +; If no match is detected, then the status will be propagated to the +; UCDB TESTSTATUS. More than one such regular expression text is allowed, +; and each message text is compared for each regular expression in the list. +; UCDBTestStatusMessageFilter = "Done with Test Bench" "Ignore .* message" + +; Set weight for all PSL/SVA cover directives. Default is 1. +; CoverWeight = 2 + +; Check vsim plusargs. Default is 0 (off). +; The command line equivalent is -check_plusargs . +; 0 = Don't check plusargs (this is the default) +; 1 = Warning on unrecognized plusarg +; 2 = Error and exit on unrecognized plusarg +; CheckPlusargs = 1 + +; Load the specified shared objects with the RTLD_GLOBAL flag. +; This gives global visibility to all symbols in the shared objects, +; meaning that subsequently loaded shared objects can bind to symbols +; in the global shared objects. The list of shared objects should +; be whitespace delimited. This option is not supported on the +; Windows or AIX platforms. +; GlobalSharedObjectList = example1.so example2.so example3.so + +; Generate the stub definitions for the undefined symbols in the shared libraries being +; loaded in the simulation. When this flow is turned on, the undefined symbols will not +; prevent vsim from loading. Calling undefined symbols at runtime will cause fatal error. +; The valid arguments are: on, off, verbose. +; on : turn on the automatic generation of stub definitions. +; off: turn off the flow. The undefined symbols will trigger an immediate load failure. +; verbose: Turn on the flow and report the undefined symbols for each shared library. +; NOTE: This variable can be overriden with vsim switch "-undefsyms". +; The default is on. +; +; UndefSyms = off + +; Enable the support for automatically checkpointing foreign C/C++ libraries. +; The valid arguments are: 0, 1, 2 +; 0: off (default) +; 1: on (manually save/restore user shared library data) +; 2: auto (automatically save/restore user shared library data) +; This option is not supported on the Windows platforms. +; +; AllowCheckpointCpp = 2 + +; Initial seed for the random number generator of the root thread (SystemVerilog). +; NOTE: This variable can be overridden with the vsim "-sv_seed" command line switch. +; The default value is 0. +; Sv_Seed = 0 + +; Specify the solver "engine" that vsim will select for constrained random +; generation. +; Valid values are: +; "auto" - automatically select the best engine for the current +; constraint scenario +; "bdd" - evaluate all constraint scenarios using the BDD solver engine +; "act" - evaluate all constraint scenarios using the ACT solver engine +; While the BDD solver engine is generally efficient with constraint scenarios +; involving bitwise logical relationships, the ACT solver engine can exhibit +; superior performance with constraint scenarios involving large numbers of +; random variables related via arithmetic operators (+, *, etc). +; NOTE: This variable can be overridden with the vsim "-solveengine" command +; line switch. +; The default value is "auto". +; SolveEngine = auto + +; Specify the maximum size that a random dynamic array or queue may be resized +; to by the solver. If the solver attempts to resize a dynamic array or queue +; to a size greater than the specified limit, the solver will abort with an error. +; The default value is 10000. The maximum value is 10000000. A value of 0 is +; equivalent to specifying the maximum value. +; SolveArrayResizeMax = 10000 + +; Specify error message severity when randomize() and randomize(null) failures +; are detected. +; +; Integer value up to two digits are allowed with each digit having the following legal values: +; 0 = No error 1 = Warning 2 = Error 3 = Failure 4 = Fatal +; +; 1) When a value with two digits is used, the digit at tenth place (leftmost digit) represents +; the severtity setting for normal randomize() calls. The digit at ones place (rightmost digit) +; represents the setting for randomize(null) calls. +; +; 2) When a single digit value is used, the setting is applied to both normal randomize() call +; and randomize(null) call. +; +; Example: Fatal error for randomize() failures and NO error for randomize(null) failures +; -solvefailseverity=40 +; +; NOTE: SolveFailSeverity can affect the behavior of SolveFailDebug. When SolveFailDebug is +; enabled, a constraint contradiction report will be displayed for randomize() calls that +; have a message severity >= warning (i.e. constraint contradiction reports will not be +; generated for randomize() calls having a "no error" severity level) +; +; NOTE: This variable can be overridden with the vsim "-solvefailseverity" command +; line switch. +; +; The default is 1 (warning). +; SolveFailSeverity = 1 + +; Error message severity for suppressible errors that are detected in a +; solve/before constraint. +; 0 = No error 1 = Warning 2 = Error 3 = Failure 4 = Fatal +; NOTE: This variable can be overridden with the vsim "-solvebeforeerrorseverity" +; command line switch. +; The default is 3 (failure). +; SolveBeforeErrorSeverity = 3 + +; Error message severity for suppressible errors that are related to +; solve engine capacity limits +; 0 = No error 1 = Warning 2 = Error 3 = Failure 4 = Fatal +; NOTE: This variable can be overridden with the vsim "-solveengineerrorseverity" +; command line switch. +; The default is 3 (failure). +; SolveEngineErrorSeverity = 3 + +; Enable/disable constraint conflicts on randomize() failure +; Valid values: +; 0 - disable solvefaildebug +; 1 - basic debug (no performance penalty) +; 2 - enhanced debug (runtime performance penalty) +; +; NOTE: SolveFailSeverity can affect the behavior of SolveFailDebug. When SolveFailDebug is +; enabled, a constraint contradiction report will be displayed for randomize() calls that +; have a message severity >= warning (i.e. constraint contradiction reports will not be +; generated for randomize() calls having a "no error" severity level) +; +; NOTE: This variable can be overridden with the vsim "-solvefaildebug" command +; line switch. +; +; The default is 1 (basic debug). +; SolveFailDebug = 1 + +; Upon encountering a randomize() failure, generate a simplified testcase that +; will reproduce the failure. Optionally output the testcase to a file. +; Testcases for 'no-solution' failures will only be produced if SolveFailDebug +; is enabled (see above). +; NOTE: This variable can be overridden with the vsim "-solvefailtestcase" +; command line switch. +; The default is OFF (do not generate a testcase). To enable testcase +; generation, uncomment this variable. To redirect testcase generation to a +; file, specify the name of the output file. +; SolveFailTestcase = + +; Specify solver timeout threshold (in seconds). randomize() will fail if the +; CPU time required to evaluate any randset exceeds the specified timeout. +; The default value is 500. A value of 0 will disable timeout failures. +; SolveTimeout = 500 + +; Specify the alternative behavior during solver replay. Must be used when combined with -solvereplay switch. +; SolveReplayOpt=[+|-][,[+|-]]*" +' Valid settings: +; validate : toggle the checking of value changes of non-random variables involved in randomize(). (default is off)" +; SolveReplayOpt=validate + +; Specify the maximum size of the solution graph generated by the BDD solver. +; This value can be used to force the BDD solver to abort the evaluation of a +; complex constraint scenario that cannot be evaluated with finite memory. +; This value is specified in 1000s of nodes. +; The default value is 10000. A value of 0 indicates no limit. +; SolveGraphMaxSize = 10000 + +; Specify the maximum number of evaluations that may be performed on the +; solution graph by the BDD solver. This value can be used to force the BDD +; solver to abort the evaluation of a complex constraint scenario that cannot +; be evaluated in finite time. This value is specified in 10000s of evaluations. +; The default value is 10000. A value of 0 indicates no limit. +; SolveGraphMaxEval = 10000 + +; Specify random sequence compatiblity with a prior release. This +; option is used to get the same random sequences during simulation as +; as a prior release. Only prior releases with the same major version +; as the current release are allowed. +; NOTE: Only those random sequence changes due to solver optimizations are +; reverted by this variable. Random sequence changes due to solver bugfixes +; cannot be un-done. +; NOTE: This variable can be overridden with the vsim "-solverev" command +; line switch. +; Default value set to "" (no compatibility). +; SolveRev = + +; Environment variable expansion of command line arguments has been depricated +; in favor shell level expansion. Universal environment variable expansion +; inside -f files is support and continued support for MGC Location Maps provide +; alternative methods for handling flexible pathnames. +; The following line may be uncommented and the value set to 1 to re-enable this +; deprecated behavior. The default value is 0. +; DeprecatedEnvironmentVariableExpansion = 0 + +; Specify the memory threshold for the System Verilog garbage collector. +; The value is the number of megabytes of class objects that must accumulate +; before the garbage collector is run. +; The GCThreshold setting is used when class debug mode is disabled to allow +; less frequent garbage collection and better simulation performance. +; The GCThresholdClassDebug setting is used when class debug mode is enabled +; to allow for more frequent garbage collection. +; GCThreshold = 100 +; GCThresholdClassDebug = 5 + +; Turn on/off collapsing of bus ports in VCD dumpports output +DumpportsCollapse = 1 + +; Location of Multi-Level Verification Component (MVC) installation. +; The default location is the product installation directory. +MvcHome = $QUESTA_MVC_HOME + +; Location of InFact installation. The default is $MODEL_TECH/../../infact +; +; InFactHome = $MODEL_TECH/../../infact + +; Initialize SystemVerilog enums using the base type's default value +; instead of the leftmost value. +; EnumBaseInit = 1 + +; Suppress file type registration. +; SuppressFileTypeReg = 1 + +; Enable/disable non-LRM compliant SystemVerilog language extensions. +; Valid extensions are: +; altdpiheader - Alternative style function signature generated in DPI header", +; cfce - generate an error if $cast fails as a function +; cfmt - C like formatting for specifiers with '#' prefix ('%#x', '%#h') +; dfsp - sets default format specifier as %p, if no format specifier is given for unpacked array in $display and related systasks +; expdfmt - enable format string extensions for $display/$sformatf +; extscan - support values greater than 32 bit for string builtin methods (atohex, atobin, atooct, atoi) +; fmtcap - prints capital hex digits with %X/%H in display calls +; iddp - ignore DPI disable protocol check +; lfmt - zero-pad data if '0' prefixes width in format specifier (e.g. "%04h") +; noexptc - ignore DPI export type name overloading check +; realrand - support randomize() with real variables and constraints (Default) +; SvExtensions = [+|-][,[+|-]*] + +; Enable/disable non-LRM compliant SystemVerilog constrained-random language extensions. +; Valid extensions are: +; arraymode - consider rand_mode of unpacked array field independently from its elements +; deepcheck - allow randomize(null) to recursively consider constraints from member rand class handles (Default) +; funcback - enable function backtracking (ACT only) +; genmodseedfix - enable LRM-compliant seeding of module/interface instances under for-generate blocks (Default) +; impvecindex - inject constraints on random indices of 2-state vectors +; nodist - interpret 'dist' constraint as 'inside' (ACT only) +; noorder - ignore solve/before ordering constraints (ACT only) +; pathseed - enable unique seeding of module instances based on hierarchical path name +; prerandfirst - execute all pre_randomize() functions before evaluating any constraints +; promotedist - promote priority of 'dist' constraint if LHS has no solve/before +; purecheck - suppress pre_randomize() and post_randomize() calls for randomize(null) +; randindex - allow random index in constraint (Default) +; randstruct - consider all fields of unpacked structs as 'rand' +; skew - skew randomize results (ACT only) +; strictstab - strict random stability +; SvRandExtensions = [+|-][,[+|-]*] + +; Controls the formatting of '%p' and '%P' conversion specification, used in $display +; and similar system tasks. +; 1. SVPrettyPrintFlags=I use spaces(S) or tabs(T) per indentation level. +; The 'I' flag when present causes relevant data types to be expanded and indented into +; a more readable format. +; (e.g. SVPrettyPrintFlags=I4S will cause 4 spaces to be used per indentation level). +; 2. SVPrettyPrintFlags=L limits the output to lines. +; (e.g. SVPrettyPrintFlags=L20 will limit the output to 20 lines). +; 3. SVPrettyPrintFlags=C limits the output to characters. +; (e.g. SVPrettyPrintFlags=C256 will limit the output to 256 characters). +; 4. SVPrettyPrintFlags=F limits the output to of relevant datatypes +; (e.g. SVPrettyPrintFlags=F4 will limit the output to 4 fields of a structure). +; 5. SVPrettyPrintFlags=E limits the output to of relevant datatypes +; (e.g. SVPrettyPrintFlags=E50 will limit the output to 50 elements of an array). +; 6. SVPrettyPrintFlags=D suppresses the output of sub-elements below . +; (e.g. SVPrettyPrintFlags=D5 will suppresses the output of sub elements below a depth of 5). +; 7. SVPrettyPrintFlags=R shows the output of specifier %p as per the specifed radix. +; It changes the output in $display and similar systasks. It does not affect formatted output functions ($displayh etc)). +; (e.g. SVPrettyPrintFlags=Rb will show the output of %p specifier in binary format. +; 8. Items 1-7 above can be combined as a comma separated list. +; (e.g. SVPrettyPrintFlags=I4S,L20,C256,F4,E50,D5,Rb) +; SVPrettyPrintFlags=I4S + +[lmc] +; The simulator's interface to Logic Modeling's SmartModel SWIFT software +libsm = $MODEL_TECH/libsm.sl +; The simulator's interface to Logic Modeling's SmartModel SWIFT software (Windows NT) +; libsm = $MODEL_TECH/libsm.dll +; Logic Modeling's SmartModel SWIFT software (HP 9000 Series 700) +; libswift = $LMC_HOME/lib/hp700.lib/libswift.sl +; Logic Modeling's SmartModel SWIFT software (IBM RISC System/6000) +; libswift = $LMC_HOME/lib/ibmrs.lib/swift.o +; Logic Modeling's SmartModel SWIFT software (Sun4 Solaris) +; libswift = $LMC_HOME/lib/sun4Solaris.lib/libswift.so +; Logic Modeling's SmartModel SWIFT software (Windows NT) +; libswift = $LMC_HOME/lib/pcnt.lib/libswift.dll +; Logic Modeling's SmartModel SWIFT software (non-Enterprise versions of Linux) +; libswift = $LMC_HOME/lib/x86_linux.lib/libswift.so +; Logic Modeling's SmartModel SWIFT software (Enterprise versions of Linux) +; libswift = $LMC_HOME/lib/linux.lib/libswift.so + +; The simulator's interface to Logic Modeling's hardware modeler SFI software +libhm = $MODEL_TECH/libhm.sl +; The simulator's interface to Logic Modeling's hardware modeler SFI software (Windows NT) +; libhm = $MODEL_TECH/libhm.dll +; Logic Modeling's hardware modeler SFI software (HP 9000 Series 700) +; libsfi = /lib/hp700/libsfi.sl +; Logic Modeling's hardware modeler SFI software (IBM RISC System/6000) +; libsfi = /lib/rs6000/libsfi.a +; Logic Modeling's hardware modeler SFI software (Sun4 Solaris) +; libsfi = /lib/sun4.solaris/libsfi.so +; Logic Modeling's hardware modeler SFI software (Windows NT) +; libsfi = /lib/pcnt/lm_sfi.dll +; Logic Modeling's hardware modeler SFI software (Linux) +; libsfi = /lib/linux/libsfi.so + +[msg_system] +; Change a message severity or suppress a message. +; The format is: = [,...] +; suppress can be used to achieve +nowarn functionality +; The format is: suppress = ,,[,,...] +; Examples: +suppress = 8780 ;an explanation can be had by running: verror 8780 +; note = 3009 +; warning = 3033 +; error = 3010,3016 +; fatal = 3016,3033 +; suppress = 3009,3016,3601 +; suppress = 3009,CNNODP,3601,TFMPC +; suppress = 8683,8684 +; The command verror can be used to get the complete +; description of a message. + +; Control transcripting of Verilog display system task messages and +; PLI/FLI print function call messages. The system tasks include +; $display[bho], $strobe[bho], $monitor[bho], and $write[bho]. They +; also include the analogous file I/O tasks that write to STDOUT +; (i.e. $fwrite or $fdisplay). The PLI/FLI calls include io_printf, +; vpi_printf, mti_PrintMessage, and mti_PrintFormatted. The default +; is to have messages appear only in the transcript. The other +; settings are to send messages to the wlf file only (messages that +; are recorded in the wlf file can be viewed in the MsgViewer) or +; to both the transcript and the wlf file. The valid values are +; tran {transcript only (default)} +; wlf {wlf file only} +; both {transcript and wlf file} +; displaymsgmode = tran + +; Control transcripting of elaboration/runtime messages not +; addressed by the displaymsgmode setting. The default is to +; have messages appear only in the transcript. The other settings +; are to send messages to the wlf file only (messages that are +; recorded in the wlf file can be viewed in the MsgViewer) or to both +; the transcript and the wlf file. The valid values are +; tran {transcript only (default)} +; wlf {wlf file only} +; both {transcript and wlf file} +; msgmode = tran + +; Controls number of displays of a particluar message +; default value is 5 +; MsgLimitCount = 5 + +[utils] +; Default Library Type (while creating a library with "vlib") +; 0 - legacy library using subdirectories for design units +; 2 - flat library +; DefaultLibType = 2 + +; Flat Library Page Size (while creating a library with "vlib") +; Set the size in bytes for flat library file pages. Libraries containing +; very large files may benefit from a larger value. +; FlatLibPageSize = 8192 + +; Flat Library Page Cleanup Percentage (while creating a library with "vlib") +; Set the percentage of total pages deleted before library cleanup can occur. +; This setting is applied together with FlatLibPageDeleteThreshold. +; FlatLibPageDeletePercentage = 50 + +; Flat Library Page Cleanup Threshold (while creating a library with "vlib") +; Set the number of pages deleted before library cleanup can occur. +; This setting is applied together with FlatLibPageDeletePercentage. +; FlatLibPageDeleteThreshold = 1000 + diff --git a/modelsim/sim_ita_tb_wave.tcl b/modelsim/sim_ita_tb_wave.tcl index 4913258..6899b0b 100644 --- a/modelsim/sim_ita_tb_wave.tcl +++ b/modelsim/sim_ita_tb_wave.tcl @@ -14,32 +14,49 @@ add wave -noupdate /ita_tb/dut/i_controller/ctrl_i add wave -noupdate /ita_tb/dut/oup_o add wave -noupdate /ita_tb/dut/inp1_q add wave -noupdate /ita_tb/dut/inp2_q -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/count_d -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/count_q -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/bias_count -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_pos_q -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_count_q1 -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_count_q2 -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_count_q3 -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_col_offset_q -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_d -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_q -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_d -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_q -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_q3 -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_q3 -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/first_outer_dim +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/count_d +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/bias_count +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_count_q1 +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_count_q2 +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_count_q3 +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_col_offset_q +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/max_o +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/disable_row +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/disable_col +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_controller/step_q +add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_d +add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_q +add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_d +add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_q +add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_q3 +add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_q3 +add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/first_outer_dim +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/count_q +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_controller/mask_d +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_pos_q +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_inp2_mux/clk_i +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q1 +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q2 +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q3 +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q4 +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q5 +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q6 +add wave -noupdate /ita_tb/dut/calc_en_q7 +add wave -noupdate /ita_tb/dut/calc_en_q8 +add wave -noupdate /ita_tb/dut/calc_en_q9 +add wave -noupdate /ita_tb/dut/calc_en_q10 add wave -noupdate -group Requant /ita_tb/dut/i_controller/requant_add_i add wave -noupdate -group Requant /ita_tb/dut/i_controller/requant_add_o -add wave -noupdate -group Requant /ita_tb/dut/i_controller/step_q add wave -noupdate -group Bias /ita_tb/dut/inp_bias add wave -noupdate -group Bias /ita_tb/dut/inp_bias_padded add wave -noupdate -group Bias /ita_tb/dut/inp_bias_q1 add wave -noupdate -group Bias /ita_tb/dut/inp_bias_q2 add wave -noupdate /ita_tb/dut/i_accumulator/oup_i add wave -noupdate /ita_tb/dut/i_accumulator/result_d -add wave -noupdate /ita_tb/dut/i_controller/accumulator_oup_i -add wave -noupdate /ita_tb/dut/masked_acc_oup add wave -noupdate /ita_tb/dut/i_activation/data_i add wave -noupdate /ita_tb/dut/i_activation/data_q1 add wave -noupdate /ita_tb/dut/i_activation/data_q2 diff --git a/modelsim/sim_ita_tb_wave_important.tcl b/modelsim/sim_ita_tb_wave_important.tcl index fd10edf..94d7503 100644 --- a/modelsim/sim_ita_tb_wave_important.tcl +++ b/modelsim/sim_ita_tb_wave_important.tcl @@ -12,32 +12,58 @@ add wave -noupdate /ita_tb/dut/i_controller/ctrl_i add wave -noupdate /ita_tb/dut/oup_o add wave -noupdate /ita_tb/dut/inp1_q add wave -noupdate /ita_tb/dut/inp2_q -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/count_d -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/count_q -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/bias_count -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_pos_q -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_count_q1 -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_count_q2 -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_count_q3 -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_col_offset_q -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_d -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_q -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_d -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_q -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_q3 -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_q3 -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/inner_tile_dim +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/count_d +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/bias_count +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_count_q1 +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_count_q2 +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_count_q3 +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_col_offset_q +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/max_o +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/disable_row +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/disable_col +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_controller/step_q +add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_d +add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_q +add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_d +add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_q +add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_q3 +add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_q3 +add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/first_outer_dim +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/count_q +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_controller/mask_d +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_pos_q +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_inp2_mux/clk_i +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q1 +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q2 +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q3 +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q4 +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q5 +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q6 +add wave -noupdate /ita_tb/dut/calc_en_q7 +add wave -noupdate /ita_tb/dut/calc_en_q8 +add wave -noupdate /ita_tb/dut/calc_en_q9 +add wave -noupdate /ita_tb/dut/calc_en_q10 +add wave -noupdate /ita_tb/dut/mask +add wave -noupdate /ita_tb/dut/mask_q1 +add wave -noupdate /ita_tb/dut/mask_q2 +add wave -noupdate /ita_tb/dut/mask_q3 +add wave -noupdate /ita_tb/dut/mask_q4 +add wave -noupdate /ita_tb/dut/mask_q5 +add wave -noupdate /ita_tb/dut/mask_q6 +add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/disable_shift +add wave -noupdate /ita_tb/dut/mask_q7 add wave -noupdate -group Requant /ita_tb/dut/i_controller/requant_add_i add wave -noupdate -group Requant /ita_tb/dut/i_controller/requant_add_o -add wave -noupdate -group Requant /ita_tb/dut/i_controller/step_q add wave -noupdate -group Bias /ita_tb/dut/inp_bias add wave -noupdate -group Bias /ita_tb/dut/inp_bias_padded add wave -noupdate -group Bias /ita_tb/dut/inp_bias_q1 add wave -noupdate -group Bias /ita_tb/dut/inp_bias_q2 add wave -noupdate /ita_tb/dut/i_accumulator/oup_i add wave -noupdate /ita_tb/dut/i_accumulator/result_d -add wave -noupdate /ita_tb/dut/i_controller/accumulator_oup_i -add wave -noupdate /ita_tb/dut/masked_acc_oup add wave -noupdate /ita_tb/dut/i_activation/data_i add wave -noupdate /ita_tb/dut/i_activation/data_q1 add wave -noupdate /ita_tb/dut/i_activation/data_q2 @@ -93,9 +119,9 @@ add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_ad add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_o add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_i add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_pad_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/accumulator_oup_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/accumulator_oup_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_o add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_q1_i add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_d add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_q add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/count_d @@ -113,16 +139,22 @@ add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_d add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_q add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_d add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_q add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_d add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_q add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_d add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_q1 add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_q2 +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_q3 add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_d add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_q add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_d add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_q1 add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_q2 +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_q3 add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_d add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_q add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_d @@ -131,9 +163,10 @@ add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_so add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_q add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_padded -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/acc_oup -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/masked_acc_oup add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_time +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_dim add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_d @@ -184,6 +217,7 @@ add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softm add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_x_i add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_i add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_i add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_d add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q1 add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q2 @@ -260,9 +294,9 @@ add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_q add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_d add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_q TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {8820600 ps} 1} -quietly wave cursor active 1 -configure wave -namecolwidth 182 +WaveRestoreCursors {{Cursor 1} {9405825 ps} 0} {{Cursor 2} {3857510 ps} 0} +quietly wave cursor active 2 +configure wave -namecolwidth 175 configure wave -valuecolwidth 100 configure wave -justifyvalue left configure wave -signalnamewidth 1 @@ -276,4 +310,4 @@ configure wave -griddelta 40 configure wave -timeline 0 configure wave -timelineunits ns update -WaveRestoreZoom {8819877 ps} {8822181 ps} +WaveRestoreZoom {3874839 ps} {3936161 ps} diff --git a/src/ita.sv b/src/ita.sv index 65dcce0..8a9fe25 100644 --- a/src/ita.sv +++ b/src/ita.sv @@ -41,13 +41,16 @@ module ita inp_t inp, inp_stream_soft; weight_t inp1, inp1_q, inp2, inp2_q; bias_t inp_bias, inp_bias_padded, inp_bias_q1, inp_bias_q2; - oup_t oup, oup_q, accumulator_oup, masked_acc_oup; + oup_t oup, oup_q, accumulator_oup; requant_const_t requant_mult, requant_shift, activation_requant_mult, activation_requant_shift; requant_oup_t requant_oup; requant_t requant_add, activation_requant_add; requant_mode_e requant_mode, activation_requant_mode; requant_oup_t post_activation; + //Masking + logic [N-1:0] mask, mask_q1, mask_q2, mask_q3, mask_q4, mask_q5, mask_q6; + // FIFO signals logic fifo_full, fifo_empty, push_to_fifo, pop_from_fifo; fifo_data_t data_to_fifo, data_from_fifo; @@ -106,6 +109,12 @@ module ita activation_q3 <= Identity; activation_q2 <= Identity; activation_q1 <= Identity; + mask_q6 <= '0; + mask_q5 <= '0; + mask_q4 <= '0; + mask_q3 <= '0; + mask_q2 <= '0; + mask_q1 <= '0; end else begin calc_en_q10 <= calc_en_q9; calc_en_q9 <= calc_en_q8; @@ -146,6 +155,12 @@ module ita activation_q3 <= activation_q2; activation_q2 <= activation_q1; activation_q1 <= ctrl_i.activation; + mask_q6 <= mask_q5; + mask_q5 <= mask_q4; + mask_q4 <= mask_q3; + mask_q3 <= mask_q2; + mask_q2 <= mask_q1; + mask_q1 <= mask; end end @@ -203,10 +218,9 @@ module ita .requant_add_o (requant_add_o ), .inp_bias_i (inp_bias ), .inp_bias_pad_o (inp_bias_padded ), - .accumulator_oup_i (accumulator_oup ), - .accumulator_oup_o (masked_acc_oup ), + .mask_o (mask ), .busy_o (busy_o ), - .calc_en_q4_i (calc_en_q4 ) + .calc_en_q1_i (calc_en_q1 ) ); ita_input_sampler i_input_sampler ( @@ -274,7 +288,8 @@ module ita .inp_stream_soft_o (inp_stream_soft ), .tile_x_i (tile_x ), .tile_y_i (tile_y ), - .inner_tile_i (inner_tile ) + .inner_tile_i (inner_tile ), + .mask_i (mask_q6 ) ); @@ -301,7 +316,7 @@ module ita .calc_en_i ( calc_en_q4 && last_inner_tile_q4 ), .calc_en_q_i ( calc_en_q5 && last_inner_tile_q5 ), - .result_i ( masked_acc_oup ), + .result_i ( accumulator_oup ), .add_i ( requant_add_o ), .requant_oup_o( requant_oup ) ); diff --git a/src/ita_controller.sv b/src/ita_controller.sv index bb1643c..2378752 100644 --- a/src/ita_controller.sv +++ b/src/ita_controller.sv @@ -35,10 +35,9 @@ module ita_controller output requant_oup_t requant_add_o , input bias_t inp_bias_i , output bias_t inp_bias_pad_o , - input oup_t accumulator_oup_i , - output oup_t accumulator_oup_o , + output logic [N-1:0] mask_o , output logic busy_o , - input logic calc_en_q4_i + input logic calc_en_q1_i ); step_e step_d, step_q; @@ -57,8 +56,8 @@ module ita_controller ongoing_soft_t ongoing_soft_d, ongoing_soft_q; bias_t inp_bias, inp_bias_padded; - oup_t acc_oup, masked_acc_oup; logic last_time; + logic [N-1:0] mask_d, mask_q; tile_t inner_tile_dim; logic [WO-WI*2-2:0] first_outer_dim, second_outer_dim; @@ -76,7 +75,7 @@ module ita_controller assign inner_tile_o = inner_tile_q; assign requant_add_o = requant_add_q; assign inp_bias_pad_o = inp_bias_padded; - assign accumulator_oup_o = masked_acc_oup; + assign mask_o = mask_q; always_comb begin count_d = count_q; @@ -97,11 +96,11 @@ module ita_controller softmax_div_done_d = softmax_div_done_q; last_time = 1'b0; requant_add = {N {requant_add_i}}; - acc_oup = accumulator_oup_i; mask_col_offset_d = (step_q == QK) ? mask_col_offset_q : ((ctrl_i.mask_start_index-1) & (N-1)); mask_pos_d = (step_q == QK) ? mask_pos_q : (((ctrl_i.mask_start_index-1)/N)*M); mask_tile_x_pos_d = mask_tile_x_pos_q; mask_tile_y_pos_d = mask_tile_y_pos_q; + mask_d = mask_q; busy_d = busy_q; softmax_fifo = 1'b0; @@ -399,7 +398,10 @@ module ita_controller end inp_bias_padded = inp_bias; - + + for (int i = 0; i < N; i++) begin + mask_d[i] = 1'b0; + end case (ctrl_i.mask_type) None: begin @@ -407,43 +409,54 @@ module ita_controller UpperTriangular: begin // With calc_en_q4 if (step_q == QK) begin - if ((mask_tile_x_pos_q == ctrl_i.tile_s-1) && (mask_count_q3 == ((M*M/N)-1))) begin - mask_tile_x_pos_d = 1'b0; - end else if (mask_count_q3 == ((M*M/N)-1) && calc_en_q4_i) begin - mask_tile_x_pos_d = mask_tile_x_pos_q + 1'b1; - end else begin - mask_tile_x_pos_d = mask_tile_x_pos_q; - end + // if ((mask_tile_x_pos_q == ctrl_i.tile_s-1) && (mask_count_q3 == ((M*M/N)-1))) begin + // mask_tile_x_pos_d = 1'b0; + // end else if (mask_count_q3 == ((M*M/N)-1) && calc_en_q4_i) begin + // mask_tile_x_pos_d = mask_tile_x_pos_q + 1'b1; + // end else begin + // mask_tile_x_pos_d = mask_tile_x_pos_q; + // end - if (mask_tile_x_q3 == mask_tile_x_pos_q && mask_tile_y_q3 == mask_tile_y_pos_q) begin - if ((mask_count_q3 >= mask_pos_q) && (mask_count_q3 < (mask_pos_q + N))) begin - if ((mask_count_q3 & (M-1)) == 6'd63) begin - mask_tile_y_pos_d = mask_tile_y_pos_q + 1'b1; - mask_pos_d = (mask_count_q3 + ((7*M) + 1)) & ((M*M/N)-1); - end else if (((mask_count_q3 + mask_col_offset_q) & (N-1)) == (N-1)) begin + // if (mask_tile_x_q3 == mask_tile_x_pos_q && mask_tile_y_q3 == mask_tile_y_pos_q) begin + if ((count_q >= mask_pos_q) && (count_q < (mask_pos_q + N))) begin + // if ((count_q & (M-1)) == 6'd63) begin + // mask_tile_y_pos_d = mask_tile_y_pos_q + 1'b1; + // mask_pos_d = (count_q + ((7*M) + 1)) & ((M*M/N)-1); + // end else + if (((count_q + mask_col_offset_q) & (N-1)) == (N-1)) begin mask_pos_d = (mask_pos_q + (N - ((mask_pos_q + mask_col_offset_q) & (N-1))) + M) & ((M*M/N)-1); end - for (int i = ((mask_count_q3 + mask_col_offset_q) & (N-1)); i < N; i++) begin - // requant_out[i] = 1'b0; - acc_oup[i] = 26'h2000000; + for (int i = 0; i < N; i++) begin + if (((count_q + mask_col_offset_q) & (N-1)) >= i) begin + mask_d[i] = 1'b1; + end else begin + mask_d[i] = 1'b0; + end end - end else if ((mask_count_q3 & (M-1)) < (mask_pos_q & (M-1))) begin + end else if ((count_q & (M-1)) < (mask_pos_q & (M-1))) begin for (int i = 0; i < N; i++) begin - acc_oup[i] = 26'h2000000; + mask_d[i] = 1'b1; + end + end else begin + for (int i = 0; i < N; i++) begin + mask_d[i] = 1'b0; end end - end else if (mask_tile_x_q3 == mask_tile_x_pos_q && mask_tile_y_q3 != mask_tile_y_pos_q) begin - for (int i = 0; i < N; i++) begin - acc_oup[i] = 26'h2000000; - end - end + // end else if (mask_tile_x_q3 == mask_tile_x_pos_q && mask_tile_y_q3 != mask_tile_y_pos_q) begin + // for (int i = 0; i < N; i++) begin + // mask_d[i] = 1'b1; + // end + // end else begin + // for (int i = 0; i < N; i++) begin + // mask_d[i] = 1'b0; + // end + // end end end LowerTriangular: begin end endcase - masked_acc_oup = acc_oup; if (inp_valid_i && inp_ready_o && oup_valid_i && oup_ready_i && last_inner_tile_o) begin ongoing_d = ongoing_q; @@ -490,6 +503,7 @@ module ita_controller mask_count_q3 <= '0; mask_tile_x_pos_q <= '0; mask_tile_y_pos_q <= '0; + mask_q <= '0; end else begin step_q <= step_d; count_q <= count_d; @@ -511,7 +525,10 @@ module ita_controller mask_tile_y_q3 <= bias_tile_y_q2; first_outer_dim_q <= first_outer_dim_d; second_outer_dim_q <= second_outer_dim_d; - mask_pos_q <= mask_pos_d; + if (calc_en_o) begin + mask_pos_q <= mask_pos_d; + mask_q <= mask_d; + end mask_col_offset_q <= mask_col_offset_d; mask_count_q1 <= mask_count_d; mask_count_q2 <= mask_count_q1; diff --git a/src/ita_softmax.sv b/src/ita_softmax.sv index ac61ed2..ca5aa0d 100644 --- a/src/ita_softmax.sv +++ b/src/ita_softmax.sv @@ -42,7 +42,8 @@ module ita_softmax output requant_t write_max_data_o, input counter_t tile_x_i, input counter_t tile_y_i, - input counter_t inner_tile_i + input counter_t inner_tile_i, + input logic [N-1:0] mask_i ); counter_t tile_d, tile_q1, tile_q2, tile_q3, tile_q4; @@ -151,7 +152,7 @@ module ita_softmax shift_diff[i] = max_i - requant_oup_q[i]; disable_shift[i] = ( (tile_q2*M+N*(count_q2 >> $clog2(M))+i ) >= ctrl_i.seq_length); - if (disable_shift[i]) begin + if (disable_shift[i] || mask_i[i]) begin max_o[i] = 8'h80; shift_d[i] = 4'hF; end else begin diff --git a/src/ita_softmax_top.sv b/src/ita_softmax_top.sv index 68c8b4e..56a6078 100644 --- a/src/ita_softmax_top.sv +++ b/src/ita_softmax_top.sv @@ -22,7 +22,8 @@ module ita_softmax_top output inp_t inp_stream_soft_o , input counter_t tile_x_i , input counter_t tile_y_i , - input counter_t inner_tile_i + input counter_t inner_tile_i , + input logic [N-1:0] mask_i ); @@ -121,7 +122,8 @@ module ita_softmax_top .tile_x_i (tile_x_i ), .tile_y_i (tile_y_i ), - .inner_tile_i (inner_tile_i ) + .inner_tile_i (inner_tile_i ), + .mask_i (mask_i ) ); ita_register_file_1w_multi_port_read #( diff --git a/transcript b/transcript new file mode 100644 index 0000000..62f5f03 --- /dev/null +++ b/transcript @@ -0,0 +1,14 @@ +# // Questa Sim-64 +# // Version 10.7b_1 linux_x86_64 Jul 26 2018 +# // +# // Copyright 1991-2018 Mentor Graphics Corporation +# // All Rights Reserved. +# // +# // QuestaSim and its associated documentation contain trade +# // secrets and commercial or financial information that are the property of +# // Mentor Graphics Corporation and are privileged, confidential, +# // and exempt from disclosure under the Freedom of Information Act, +# // 5 U.S.C. Section 552. Furthermore, this information +# // is prohibited from disclosure under the Trade Secrets Act, +# // 18 U.S.C. Section 1905. +# // From 1c71277cd55dd05915397436b72d27a89aa4b4fb Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Sun, 24 Nov 2024 18:06:10 +0100 Subject: [PATCH 36/60] Error in golden model --- PyITA/ITA.py | 2 + PyITA/softmax.py | 22 +- PyITA/util.py | 9 + modelsim/sim_ita_tb_wave.tcl | 7 +- modelsim/sim_ita_tb_wave_important.tcl | 373 ++++++++++++------------- src/ita_softmax.sv | 23 +- testGenerator.py | 2 +- 7 files changed, 235 insertions(+), 203 deletions(-) diff --git a/PyITA/ITA.py b/PyITA/ITA.py index d8930db..bbb72ec 100644 --- a/PyITA/ITA.py +++ b/PyITA/ITA.py @@ -656,6 +656,8 @@ def step5_AV(self): self.tiler_AV(self.A_requant, np.transpose(self.Vp_requant, (0, 2, 1)), self.O_soft_requant, "A_stream_soft_in", "Vp_in", "O_soft") + + def apply_activation(self, preactivation, activation): if activation not in ["gelu", "relu", "identity"]: diff --git a/PyITA/softmax.py b/PyITA/softmax.py index a9a8ae1..17cd28d 100644 --- a/PyITA/softmax.py +++ b/PyITA/softmax.py @@ -144,15 +144,14 @@ def streamingPartialSoftmax(x, mask, integerize = True): shift = diff * eps_max print(shift.shape) - print() # Set shift value so high that 2**8 >> shift gets zero for all masked values shift[mask[:,:,i*PE:(i*PE)+width]] = 16 - matrix = np.squeeze(shift) - import matplotlib.pyplot as plt - plt.imshow(matrix, cmap='viridis') - plt.colorbar() - plt.title("Shift Matrix") - plt.show() + # # matrix = np.squeeze(shift) + # # import matplotlib.pyplot as plt + # # plt.imshow(matrix, cmap='viridis') + # # plt.colorbar() + # # plt.title("Shift Matrix") + # # plt.show() # Calculate exponential sum over the current part of the row and scale it by 2**10 to prevent underflow if integerize: @@ -167,8 +166,14 @@ def streamingPartialSoftmax(x, mask, integerize = True): else: exp_partial_sum = (exp_partial_sum / 2**(shift_sum.astype(np.float32))) + exp_sum + print(f"Max Shape: {global_max.shape}, Max Value: {global_max}") print(exp_partial_sum.shape) print(exp_partial_sum[0]) + zero_pos = exp_partial_sum == 0 + print(zero_pos) + exp_partial_sum[zero_pos] = (2**8 - 1) * 2**8 + exp_partial_sum[0] + ## STAGE 2: Calculate the softmax activation # Invert the partial sum if integerize: @@ -176,6 +181,9 @@ def streamingPartialSoftmax(x, mask, integerize = True): else: exp_partial_sum_inverse = 1 / exp_partial_sum + # print(exp_partial_sum_inverse.shape) + # print(exp_partial_sum_inverse[0]) + # Find the difference between the maximum and x diff = np.repeat(global_max, seq_length).reshape(n_heads, seq_length, seq_length) - x.astype(np.int32) diff --git a/PyITA/util.py b/PyITA/util.py index 8690ae2..39dc450 100644 --- a/PyITA/util.py +++ b/PyITA/util.py @@ -52,6 +52,15 @@ def write_matrix(matrix: np.ndarray, name: str, path: Union[str, os.PathLike]): name (str): The name of the file. path (Union[str, os.PathLike]): The path to the directory where the file will be saved. """ + if isinstance(matrix, np.ndarray): + print(matrix) + import matplotlib.pyplot as plt + heatmap = np.squeeze(matrix) + plt.imshow(heatmap, cmap='viridis') + plt.colorbar() + plt.title(f"{name}") + plt.show() + with open('%s%s.txt' % (path, name), "wb+") as f: for row in matrix: np.savetxt(f, row, fmt = '%d') diff --git a/modelsim/sim_ita_tb_wave.tcl b/modelsim/sim_ita_tb_wave.tcl index 6899b0b..6b4ff01 100644 --- a/modelsim/sim_ita_tb_wave.tcl +++ b/modelsim/sim_ita_tb_wave.tcl @@ -24,7 +24,7 @@ add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_ add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/disable_row -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/disable_col +add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/i_softmax_top/i_softmax/disable_col add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_controller/step_q add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_d add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_q @@ -36,8 +36,11 @@ add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radi add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/count_q add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_controller/mask_d add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_pos_q -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_inp2_mux/clk_i +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 +add wave -noupdate -expand -group {Masking Signals} -radix hexadecimal /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q1 add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q2 diff --git a/modelsim/sim_ita_tb_wave_important.tcl b/modelsim/sim_ita_tb_wave_important.tcl index 94d7503..ddd5579 100644 --- a/modelsim/sim_ita_tb_wave_important.tcl +++ b/modelsim/sim_ita_tb_wave_important.tcl @@ -22,7 +22,7 @@ add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_ add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/disable_row -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/disable_col +add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/i_softmax_top/i_softmax/disable_col add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_controller/step_q add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_d add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_q @@ -34,8 +34,11 @@ add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radi add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/count_q add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_controller/mask_d add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_pos_q -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_inp2_mux/clk_i +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 +add wave -noupdate -expand -group {Masking Signals} -radix hexadecimal /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q1 add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q2 @@ -47,15 +50,6 @@ add wave -noupdate /ita_tb/dut/calc_en_q7 add wave -noupdate /ita_tb/dut/calc_en_q8 add wave -noupdate /ita_tb/dut/calc_en_q9 add wave -noupdate /ita_tb/dut/calc_en_q10 -add wave -noupdate /ita_tb/dut/mask -add wave -noupdate /ita_tb/dut/mask_q1 -add wave -noupdate /ita_tb/dut/mask_q2 -add wave -noupdate /ita_tb/dut/mask_q3 -add wave -noupdate /ita_tb/dut/mask_q4 -add wave -noupdate /ita_tb/dut/mask_q5 -add wave -noupdate /ita_tb/dut/mask_q6 -add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/disable_shift -add wave -noupdate /ita_tb/dut/mask_q7 add wave -noupdate -group Requant /ita_tb/dut/i_controller/requant_add_i add wave -noupdate -group Requant /ita_tb/dut/i_controller/requant_add_o add wave -noupdate -group Bias /ita_tb/dut/inp_bias @@ -94,181 +88,178 @@ add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q3 add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q4 add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_d add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/clk_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/rst_ni -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ctrl_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_ready_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_ready_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_ready_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_ready_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/pop_softmax_fifo_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/soft_addr_div_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_done_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_inner_tile_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_inner_tile_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_pad_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_q1_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/count_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/count_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_count -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_count_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_count_q1 -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_count_q2 -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_count_q3 -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_q1 -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_q2 -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_q3 -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_q1 -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_q2 -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_q3 -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_padded -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_time -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_dim -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_fifo -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/clk_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/rst_ni -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/ctrl_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/step_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/soft_addr_div_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/softmax_done_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_softmax_fifo_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_inp_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_oup_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_data_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_data_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/prev_max_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_data_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_data_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_x_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q3 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q4 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q3 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q4 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_diff -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_diff -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp_diff -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q3 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_full -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_empty -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/push_to_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_from_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_to_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_from_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_usage -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_row -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_col +add wave -noupdate -group Controller /ita_tb/dut/i_controller/clk_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/rst_ni +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ctrl_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_valid_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_ready_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/weight_valid_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/weight_ready_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_valid_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_ready_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/oup_valid_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/oup_ready_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/pop_softmax_fifo_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/soft_addr_div_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_done_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/calc_en_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_inner_tile_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/last_inner_tile_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_pad_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/calc_en_q1_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/count_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/count_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_count +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_pos_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_pos_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_col_offset_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_col_offset_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_count_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_count_q1 +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_count_q2 +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_count_q3 +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_x_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_x_q1 +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_x_q2 +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_x_q3 +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_y_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_y_q1 +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_y_q2 +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_y_q3 +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_tile_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_tile_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_soft_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_soft_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_padded +add wave -noupdate -group Controller /ita_tb/dut/i_controller/last_time +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_dim +add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_outer_dim +add wave -noupdate -group Controller /ita_tb/dut/i_controller/second_outer_dim +add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_outer_dim_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_outer_dim_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/second_outer_dim_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/second_outer_dim_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_fifo +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div_done_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div_done_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_q +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/clk_i +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/rst_ni +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/ctrl_i +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/step_i +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_i +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_i +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/soft_addr_div_o +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/softmax_done_o +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_softmax_fifo_o +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_i +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_inp_o +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_o +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_i +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_i +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_o +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_oup_i +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_en_o +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_addr_o +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_data_i +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_en_o +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_addr_o +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_data_o +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/prev_max_o +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_i +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_o +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_en_o +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_addr_o +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_data_i +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_en_o +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_addr_o +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_data_o +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_x_i +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_i +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_i +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_d +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q1 +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q2 +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q3 +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q4 +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_d +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q1 +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q2 +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q3 +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q4 +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_q +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_d +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_d +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_q +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_d +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_q +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_d +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_q +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_d +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_q +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_d +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_q +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_d +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_q +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_diff +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_d +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_q +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_diff +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp_diff +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q2 +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q3 +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_full +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_empty +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/push_to_fifo +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_from_fifo +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_to_fifo +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_from_fifo +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_usage +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_row +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_col add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/clk_i add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/rst_ni add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_i @@ -294,10 +285,10 @@ add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_q add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_d add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_q TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {9405825 ps} 0} {{Cursor 2} {3857510 ps} 0} -quietly wave cursor active 2 -configure wave -namecolwidth 175 -configure wave -valuecolwidth 100 +WaveRestoreCursors {{Cursor 1} {5371458 ps} 0} {{Cursor 2} {4813035 ps} 1} {{Cursor 3} {4817000 ps} 1} {{Cursor 4} {4829000 ps} 0} +quietly wave cursor active 4 +configure wave -namecolwidth 195 +configure wave -valuecolwidth 135 configure wave -justifyvalue left configure wave -signalnamewidth 1 configure wave -snapdistance 10 @@ -310,4 +301,4 @@ configure wave -griddelta 40 configure wave -timeline 0 configure wave -timelineunits ns update -WaveRestoreZoom {3874839 ps} {3936161 ps} +WaveRestoreZoom {4812915 ps} {4830108 ps} diff --git a/src/ita_softmax.sv b/src/ita_softmax.sv index ca5aa0d..d39897a 100644 --- a/src/ita_softmax.sv +++ b/src/ita_softmax.sv @@ -52,7 +52,7 @@ module ita_softmax counter_t tile_y_q; logic unsigned [SoftmaxAccDataWidth-1:0] exp_sum_d, exp_sum_q; - counter_t count_soft_d, count_soft_q1, count_soft_q2; + counter_t count_soft_d, count_soft_q1, count_soft_q2, count_mask_q2; counter_t count_div_d, count_div_q, addr_div_d, addr_div_q; logic [NumDiv-1:0] div_read_d, div_read_q, div_write_d, div_write_q; @@ -150,7 +150,7 @@ module ita_softmax max_d = max_i; for (int i = 0; i < N; i++) begin shift_diff[i] = max_i - requant_oup_q[i]; - disable_shift[i] = ( (tile_q2*M+N*(count_q2 >> $clog2(M))+i ) >= ctrl_i.seq_length); + disable_shift[i] = ((tile_q2*M+N*(count_q2 >> $clog2(M))+i ) >= ctrl_i.seq_length); if (disable_shift[i] || mask_i[i]) begin max_o[i] = 8'h80; @@ -246,6 +246,14 @@ module ita_softmax end else begin for (int i = 0; i < M; i++) begin disable_col[i] = ((inner_tile_q*M + i) >= ctrl_i.seq_length); + if ((inner_tile_q*M + i) >= ctrl_i.seq_length) begin + disable_col[i] = 1'b1; + end else if ((i >= (count_mask_q2 & (M-1))) && (ctrl_i.mask_type == UpperTriangular)) begin + disable_col[i] = 1'b1; + end else begin + disable_col[i] = 1'b0; + end + if (disable_col[i]) begin inp_stream_soft_o[i] = '0; end else begin @@ -274,6 +282,7 @@ module ita_softmax count_q1 <= M*M/N; count_soft_q1 <= '0; count_soft_q2 <= '0; + count_mask_q2 <= '0; count_div_q <= '0; div_read_q <= '0; div_write_q <= '0; @@ -297,6 +306,9 @@ module ita_softmax count_q1 <= count_d; count_soft_q1 <= count_soft_d; count_soft_q2 <= count_soft_q1; + if (calc_stream_soft_en_i) begin + count_mask_q2 <= count_soft_q1; + end count_div_q <= count_div_d; div_read_q <= div_read_d; div_write_q <= div_write_d; @@ -310,6 +322,13 @@ module ita_softmax end end + // // Debug + // always_ff @(posedge clk_i or negedge rst_ni) begin + // if (calc_en_q1) begin + // $display("Stage 1: max_i=%h, requant_oup_q=%h, shift_diff=%h, mask_i=%h", max_i, requant_oup_q, shift_diff, mask_i); + // end + // end + always_ff @(posedge clk_i, negedge rst_ni) begin if (!rst_ni) begin calc_en_q3 <= 0; diff --git a/testGenerator.py b/testGenerator.py index ffbb49e..26b43b6 100644 --- a/testGenerator.py +++ b/testGenerator.py @@ -48,7 +48,7 @@ def generateMHA(**args): NO_BIAS = args['no_bias'] NO_PARTIAL_SOFTMAX = args['no_partial_softmax'] ACTIVATION = args['activation'].capitalize() - MASK = args['mask'][:args['mask'].find("_")].capitalize() + args['mask'][args['mask'].find("_")+1:].capitalize() + MASK = args['mask'].capitalize() if (args['mask'].find("_") == -1) else args['mask'][:args['mask'].find("_")].capitalize() + args['mask'][args['mask'].find("_")+1:].capitalize() INDEX = args['I'] base_path = f'{current_dir}/simvectors/data_S{S}_E{E}_P{P}_F{F}_H{H}_B{int(not NO_BIAS)}_{ACTIVATION}_{MASK}_I{INDEX}' From 966e7d654f0a1a968e146296ebe9b43cdfb25e25 Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Mon, 25 Nov 2024 20:32:03 +0100 Subject: [PATCH 37/60] Errors in streamingPartialSoftmax function not solved --- PyITA/A_stream_soft_in_0.txt | 16384 +++++++++++++++++++++++++++++++++ PyITA/ITA.py | 20 +- PyITA/softmax.py | 24 +- PyITA/util.py | 16 +- src/ita_softmax.sv | 15 +- src/tb/ita_tb.sv | 3 + 6 files changed, 16426 insertions(+), 36 deletions(-) create mode 100644 PyITA/A_stream_soft_in_0.txt diff --git a/PyITA/A_stream_soft_in_0.txt b/PyITA/A_stream_soft_in_0.txt new file mode 100644 index 0000000..23f2a20 --- /dev/null +++ b/PyITA/A_stream_soft_in_0.txt @@ -0,0 +1,16384 @@ +127 +93 +-128 +-87 +-6 +127 +-115 +127 +-128 +-128 +127 +127 +-13 +-25 +-126 +-128 +109 +33 +-90 +-128 +-128 +-128 +16 +127 +-20 +-128 +-128 +127 +8 +127 +-102 +-128 +-16 +127 +-128 +123 +127 +-108 +127 +-14 +108 +127 +127 +-96 +61 +-128 +-128 +127 +82 +127 +-128 +127 +-111 +-128 +100 +127 +127 +-128 +-100 +127 +-128 +-60 +-55 +13 +127 +-128 +111 +51 +127 +127 +107 +127 +-128 +-128 +127 +-64 +5 +13 +127 +-128 +-128 +-128 +35 +-91 +127 +-128 +-88 +127 +127 +47 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range((i + index), self.Mask.shape[2]): self.Mask[h][i][j] = True elif(mask == 'Lower_Triangular'): pass @@ -598,10 +598,10 @@ def step4_QK(self, no_partial_softmax, mask, index): else: raise ValueError("Mask not supported") - matrix = np.squeeze(self.A) + matrix = np.squeeze(self.A_requant) plt.imshow(matrix, cmap='viridis') plt.colorbar() - plt.title("Matrix A") + plt.title("A_requant/A_stream_soft_in") plt.show() @@ -614,7 +614,7 @@ def step4_QK(self, no_partial_softmax, mask, index): matrix = np.squeeze(self.A_partial_softmax) plt.imshow(matrix, cmap='viridis') plt.colorbar() - plt.title("A After Soft") + plt.title("A_partial_softmax") plt.show() self.tiler_AV(self.Qp_requant, self.Kp_requant, self.A_requant, "Qp_in", "Kp_in", "A") @@ -654,6 +654,12 @@ def step5_AV(self): if (self.P_ITA - self.P) > 0: self.O_soft_requant[:, :, -(self.P_ITA - self.P):] = 0 + matrix = np.squeeze(self.O_soft_requant) + plt.imshow(matrix, cmap='viridis') + plt.colorbar() + plt.title("O_soft_requant/O_soft") + plt.show() + self.tiler_AV(self.A_requant, np.transpose(self.Vp_requant, (0, 2, 1)), self.O_soft_requant, "A_stream_soft_in", "Vp_in", "O_soft") @@ -683,6 +689,12 @@ def step6_O(self): self.Out_soft_requant = requantize(self.Out_soft, self.requant_eps_mult[5], self.requant_right_shift[5], self.requant_add[5]) + matrix = np.squeeze(self.Out_soft) + plt.imshow(matrix, cmap='viridis') + plt.colorbar() + plt.title("Out_soft") + plt.show() + if (self.S_ITA - self.S) > 0: self.Out_soft_requant[:, -(self.S_ITA - self.S):, :] = 0 if (self.E_ITA - self.E) > 0: diff --git a/PyITA/softmax.py b/PyITA/softmax.py index 17cd28d..c4e5475 100644 --- a/PyITA/softmax.py +++ b/PyITA/softmax.py @@ -103,11 +103,16 @@ def streamingPartialSoftmax(x, mask, integerize = True): for i in range((seq_length + PE - 1) // PE): width = seq_length % PE if i * PE + PE > seq_length else PE + mask_slice = mask[... ,i*PE:(i*PE)+width] + x_slice = x[..., 0 + i * PE:width + i * PE] + print(f"Mask Slice: {mask_slice.shape}") + print(f"X Slice: {x_slice.shape}") + # Find the maximum for each row in the current column block (consisting of 16 columns) if integerize: - current_max = np.max(x[..., 0 + i * PE:width + i * PE].astype(np.int32), axis = -1) + current_max = np.max(np.where(mask_slice, -128, x_slice.astype(np.int32)), axis = -1) else: - current_max = np.max(x[..., 0 + i * PE:width + i * PE].astype(np.float32), axis = -1) + current_max = np.max(np.where(mask_slice, -np.inf, x_slice.astype(np.float32)), axis = -1) # Initialize all shift values for each row to zero if integerize: @@ -122,6 +127,11 @@ def streamingPartialSoftmax(x, mask, integerize = True): else: max_shift = (current_max - global_max) * eps_max + print(f"Global Max: {global_max.shape}") + print(global_max) + print(f"Global Max: {current_max.shape}") + print(current_max) + # Update all shift values where new maximum is larger shift_sum[current_max > global_max] = max_shift[current_max > global_max] @@ -145,7 +155,7 @@ def streamingPartialSoftmax(x, mask, integerize = True): print(shift.shape) # Set shift value so high that 2**8 >> shift gets zero for all masked values - shift[mask[:,:,i*PE:(i*PE)+width]] = 16 + shift[mask_slice] = 16 # # matrix = np.squeeze(shift) # # import matplotlib.pyplot as plt # # plt.imshow(matrix, cmap='viridis') @@ -166,14 +176,6 @@ def streamingPartialSoftmax(x, mask, integerize = True): else: exp_partial_sum = (exp_partial_sum / 2**(shift_sum.astype(np.float32))) + exp_sum - print(f"Max Shape: {global_max.shape}, Max Value: {global_max}") - print(exp_partial_sum.shape) - print(exp_partial_sum[0]) - zero_pos = exp_partial_sum == 0 - print(zero_pos) - exp_partial_sum[zero_pos] = (2**8 - 1) * 2**8 - exp_partial_sum[0] - ## STAGE 2: Calculate the softmax activation # Invert the partial sum if integerize: diff --git a/PyITA/util.py b/PyITA/util.py index 39dc450..9f42f9b 100644 --- a/PyITA/util.py +++ b/PyITA/util.py @@ -52,14 +52,14 @@ def write_matrix(matrix: np.ndarray, name: str, path: Union[str, os.PathLike]): name (str): The name of the file. path (Union[str, os.PathLike]): The path to the directory where the file will be saved. """ - if isinstance(matrix, np.ndarray): - print(matrix) - import matplotlib.pyplot as plt - heatmap = np.squeeze(matrix) - plt.imshow(heatmap, cmap='viridis') - plt.colorbar() - plt.title(f"{name}") - plt.show() + # output_files = ["Qp_0", "Kp_0", "Vp_0", "A_0", "Out_soft_0", "FFp_0", "FF2p_0"] + # if name in output_files: + # import matplotlib.pyplot as plt + # heatmap = np.squeeze(matrix) + # plt.imshow(heatmap, cmap='viridis') + # plt.colorbar() + # plt.title(f"{name}") + # plt.show() with open('%s%s.txt' % (path, name), "wb+") as f: for row in matrix: diff --git a/src/ita_softmax.sv b/src/ita_softmax.sv index d39897a..528b38e 100644 --- a/src/ita_softmax.sv +++ b/src/ita_softmax.sv @@ -52,7 +52,7 @@ module ita_softmax counter_t tile_y_q; logic unsigned [SoftmaxAccDataWidth-1:0] exp_sum_d, exp_sum_q; - counter_t count_soft_d, count_soft_q1, count_soft_q2, count_mask_q2; + counter_t count_soft_d, count_soft_q1, count_soft_q2; counter_t count_div_d, count_div_q, addr_div_d, addr_div_q; logic [NumDiv-1:0] div_read_d, div_read_q, div_write_d, div_write_q; @@ -248,7 +248,7 @@ module ita_softmax disable_col[i] = ((inner_tile_q*M + i) >= ctrl_i.seq_length); if ((inner_tile_q*M + i) >= ctrl_i.seq_length) begin disable_col[i] = 1'b1; - end else if ((i >= (count_mask_q2 & (M-1))) && (ctrl_i.mask_type == UpperTriangular)) begin + end else if ((i >= (count_soft_q1 & (M-1))) && (ctrl_i.mask_type == UpperTriangular)) begin disable_col[i] = 1'b1; end else begin disable_col[i] = 1'b0; @@ -282,7 +282,6 @@ module ita_softmax count_q1 <= M*M/N; count_soft_q1 <= '0; count_soft_q2 <= '0; - count_mask_q2 <= '0; count_div_q <= '0; div_read_q <= '0; div_write_q <= '0; @@ -306,9 +305,6 @@ module ita_softmax count_q1 <= count_d; count_soft_q1 <= count_soft_d; count_soft_q2 <= count_soft_q1; - if (calc_stream_soft_en_i) begin - count_mask_q2 <= count_soft_q1; - end count_div_q <= count_div_d; div_read_q <= div_read_d; div_write_q <= div_write_d; @@ -322,13 +318,6 @@ module ita_softmax end end - // // Debug - // always_ff @(posedge clk_i or negedge rst_ni) begin - // if (calc_en_q1) begin - // $display("Stage 1: max_i=%h, requant_oup_q=%h, shift_diff=%h, mask_i=%h", max_i, requant_oup_q, shift_diff, mask_i); - // end - // end - always_ff @(posedge clk_i, negedge rst_ni) begin if (!rst_ni) begin calc_en_q3 <= 0; diff --git a/src/tb/ita_tb.sv b/src/tb/ita_tb.sv index 1fdddec..acba5a6 100644 --- a/src/tb/ita_tb.sv +++ b/src/tb/ita_tb.sv @@ -471,6 +471,9 @@ task automatic apply_ITA_weights(input integer phase); oup_valid_q = oup_valid; oup_ready_q = oup_ready; if (successful_handshake(oup_valid, oup_ready)) begin + // if (dut.i_softmax_top.i_softmax.calc_stream_soft_en_q && phase == 3 && dut.step == AV) begin + // $display("Softmax Input: %h", dut.i_softmax_top.i_softmax.inp_i); + // end tile_entry += 1; if (requant_oup !== exp_res) begin $display("[TB] ITA: Wrong value received %x, instead of %x at %t. (phase: %0d)", requant_oup, exp_res, $time, phase); From 4bd29e3f374f047a1e9e14cc8add59d150bad010 Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Tue, 26 Nov 2024 19:13:50 +0100 Subject: [PATCH 38/60] Only four wrong values for 1 tile --- PyITA/ITA.py | 6 ++- PyITA/softmax.py | 6 ++- modelsim/sim_ita_tb_wave.tcl | 57 +++++++++++++++------ modelsim/sim_ita_tb_wave_important.tcl | 69 +++++++++++++++++++------- src/ita_controller.sv | 6 +-- src/ita_softmax.sv | 12 +++-- 6 files changed, 113 insertions(+), 43 deletions(-) diff --git a/PyITA/ITA.py b/PyITA/ITA.py index 0281be2..6d35fa2 100644 --- a/PyITA/ITA.py +++ b/PyITA/ITA.py @@ -598,6 +598,8 @@ def step4_QK(self, no_partial_softmax, mask, index): else: raise ValueError("Mask not supported") + print(self.Mask) + matrix = np.squeeze(self.A_requant) plt.imshow(matrix, cmap='viridis') plt.colorbar() @@ -689,10 +691,10 @@ def step6_O(self): self.Out_soft_requant = requantize(self.Out_soft, self.requant_eps_mult[5], self.requant_right_shift[5], self.requant_add[5]) - matrix = np.squeeze(self.Out_soft) + matrix = np.squeeze(self.Out_soft_requant) plt.imshow(matrix, cmap='viridis') plt.colorbar() - plt.title("Out_soft") + plt.title("Out_soft_requant") plt.show() if (self.S_ITA - self.S) > 0: diff --git a/PyITA/softmax.py b/PyITA/softmax.py index c4e5475..996c14a 100644 --- a/PyITA/softmax.py +++ b/PyITA/softmax.py @@ -129,7 +129,7 @@ def streamingPartialSoftmax(x, mask, integerize = True): print(f"Global Max: {global_max.shape}") print(global_max) - print(f"Global Max: {current_max.shape}") + print(f"Current Max: {current_max.shape}") print(current_max) # Update all shift values where new maximum is larger @@ -189,6 +189,10 @@ def streamingPartialSoftmax(x, mask, integerize = True): # Find the difference between the maximum and x diff = np.repeat(global_max, seq_length).reshape(n_heads, seq_length, seq_length) - x.astype(np.int32) + # The global_max can be smaller than a few positions in x because not all values in x were considered for the global_max due to the mask. + # So diff should normally not be smaller than 0 + diff[mask] = 0 + # Shift the values by B-log2B -> multiply by B/2**B = log2e*eps_x # Make sure to do use round-half-up instead of round-half-to-even if integerize: diff --git a/modelsim/sim_ita_tb_wave.tcl b/modelsim/sim_ita_tb_wave.tcl index 6b4ff01..cf72515 100644 --- a/modelsim/sim_ita_tb_wave.tcl +++ b/modelsim/sim_ita_tb_wave.tcl @@ -19,13 +19,10 @@ add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/ add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_count_q1 add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_count_q2 add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_count_q3 -add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_col_offset_q add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/max_o add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/disable_row -add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/i_softmax_top/i_softmax/disable_col -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_controller/step_q add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_d add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_q add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_d @@ -36,16 +33,7 @@ add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radi add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/count_q add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_controller/mask_d add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_pos_q -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_inp2_mux/clk_i -add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o -add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 -add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 -add wave -noupdate -expand -group {Masking Signals} -radix hexadecimal /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q1 -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q2 -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q3 -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q4 +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_col_offset_q add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q5 add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q6 add wave -noupdate /ita_tb/dut/calc_en_q7 @@ -58,8 +46,49 @@ add wave -noupdate -group Bias /ita_tb/dut/inp_bias add wave -noupdate -group Bias /ita_tb/dut/inp_bias_padded add wave -noupdate -group Bias /ita_tb/dut/inp_bias_q1 add wave -noupdate -group Bias /ita_tb/dut/inp_bias_q2 +add wave -noupdate /ita_tb/dut/calc_en_q4 +add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 +add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q +add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 +add wave -noupdate -radix binary /ita_tb/dut/i_softmax_top/i_softmax/disable_col +add wave -noupdate /ita_tb/dut/i_inp2_mux/clk_i +add wave -noupdate /ita_tb/dut/i_controller/step_q +add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/step_i +add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_i +add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d +add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 +add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q2 +add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q3 +add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/mask_i +add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/max_i +add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/max_o +add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/count_d +add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/count_q1 +add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/count_q2 +add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/count_q3 +add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/count_q4 +add wave -noupdate /ita_tb/dut/calc_en +add wave -noupdate /ita_tb/dut/calc_en_q1 +add wave -noupdate /ita_tb/dut/calc_en_q2 +add wave -noupdate /ita_tb/dut/calc_en_q3 +add wave -noupdate /ita_tb/dut/calc_en_q4 +add wave -noupdate /ita_tb/dut/calc_en_q5 +add wave -noupdate /ita_tb/dut/calc_en_q6 +add wave -noupdate /ita_tb/dut/calc_en_q7 +add wave -noupdate /ita_tb/dut/calc_en_q8 +add wave -noupdate /ita_tb/dut/calc_en_q9 +add wave -noupdate /ita_tb/dut/calc_en_q10 +add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i +add wave -noupdate -radix hexadecimal /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q +add wave -noupdate -radix binary /ita_tb/dut/i_softmax_top/i_softmax/disable_col +add wave -noupdate /ita_tb/dut/i_inp1_mux/inp_i +add wave -noupdate /ita_tb/dut/inp +add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o +add wave -noupdate /ita_tb/dut/inp1 +add wave -noupdate /ita_tb/dut/inp1_q add wave -noupdate /ita_tb/dut/i_accumulator/oup_i add wave -noupdate /ita_tb/dut/i_accumulator/result_d +add wave -noupdate /ita_tb/dut/i_accumulator/result_o add wave -noupdate /ita_tb/dut/i_activation/data_i add wave -noupdate /ita_tb/dut/i_activation/data_q1 add wave -noupdate /ita_tb/dut/i_activation/data_q2 @@ -72,4 +101,4 @@ add wave -noupdate /ita_tb/dut/oup_o add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/* add wave -expand -group Controller /ita_tb/dut/i_controller/* add wave -group {Softmax Controller} ita_tb/dut/i_softmax_top/i_softmax/* -add wave -group {Accumulator} ita_tb/dut/i_accumulator/* +add wave -group {Accumulator} ita_tb/dut/i_accumulator/* \ No newline at end of file diff --git a/modelsim/sim_ita_tb_wave_important.tcl b/modelsim/sim_ita_tb_wave_important.tcl index ddd5579..509e694 100644 --- a/modelsim/sim_ita_tb_wave_important.tcl +++ b/modelsim/sim_ita_tb_wave_important.tcl @@ -17,13 +17,10 @@ add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/ add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_count_q1 add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_count_q2 add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_count_q3 -add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_col_offset_q add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/max_o add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/disable_row -add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/i_softmax_top/i_softmax/disable_col -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_controller/step_q add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_d add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_q add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_d @@ -34,16 +31,7 @@ add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radi add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/count_q add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_controller/mask_d add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_pos_q -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_inp2_mux/clk_i -add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o -add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 -add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 -add wave -noupdate -expand -group {Masking Signals} -radix hexadecimal /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q1 -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q2 -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q3 -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q4 +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_col_offset_q add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q5 add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q6 add wave -noupdate /ita_tb/dut/calc_en_q7 @@ -56,8 +44,49 @@ add wave -noupdate -group Bias /ita_tb/dut/inp_bias add wave -noupdate -group Bias /ita_tb/dut/inp_bias_padded add wave -noupdate -group Bias /ita_tb/dut/inp_bias_q1 add wave -noupdate -group Bias /ita_tb/dut/inp_bias_q2 +add wave -noupdate /ita_tb/dut/calc_en_q4 +add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 +add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q +add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 +add wave -noupdate -radix binary /ita_tb/dut/i_softmax_top/i_softmax/disable_col +add wave -noupdate /ita_tb/dut/i_inp2_mux/clk_i +add wave -noupdate /ita_tb/dut/i_controller/step_q +add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/step_i +add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_i +add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d +add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 +add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q2 +add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q3 +add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/mask_i +add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/max_i +add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/max_o +add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/count_d +add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/count_q1 +add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/count_q2 +add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/count_q3 +add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/count_q4 +add wave -noupdate /ita_tb/dut/calc_en +add wave -noupdate /ita_tb/dut/calc_en_q1 +add wave -noupdate /ita_tb/dut/calc_en_q2 +add wave -noupdate /ita_tb/dut/calc_en_q3 +add wave -noupdate /ita_tb/dut/calc_en_q4 +add wave -noupdate /ita_tb/dut/calc_en_q5 +add wave -noupdate /ita_tb/dut/calc_en_q6 +add wave -noupdate /ita_tb/dut/calc_en_q7 +add wave -noupdate /ita_tb/dut/calc_en_q8 +add wave -noupdate /ita_tb/dut/calc_en_q9 +add wave -noupdate /ita_tb/dut/calc_en_q10 +add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i +add wave -noupdate -radix hexadecimal /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q +add wave -noupdate -radix binary /ita_tb/dut/i_softmax_top/i_softmax/disable_col +add wave -noupdate /ita_tb/dut/i_inp1_mux/inp_i +add wave -noupdate /ita_tb/dut/inp +add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o +add wave -noupdate /ita_tb/dut/inp1 +add wave -noupdate /ita_tb/dut/inp1_q add wave -noupdate /ita_tb/dut/i_accumulator/oup_i add wave -noupdate /ita_tb/dut/i_accumulator/result_d +add wave -noupdate /ita_tb/dut/i_accumulator/result_o add wave -noupdate /ita_tb/dut/i_activation/data_i add wave -noupdate /ita_tb/dut/i_activation/data_q1 add wave -noupdate /ita_tb/dut/i_activation/data_q2 @@ -227,6 +256,8 @@ add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_d +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_d add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_q add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_d @@ -246,6 +277,7 @@ add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_diff add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp_diff +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q2 @@ -259,7 +291,6 @@ add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_usage add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_row -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_col add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/clk_i add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/rst_ni add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_i @@ -285,10 +316,10 @@ add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_q add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_d add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_q TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {5371458 ps} 0} {{Cursor 2} {4813035 ps} 1} {{Cursor 3} {4817000 ps} 1} {{Cursor 4} {4829000 ps} 0} -quietly wave cursor active 4 -configure wave -namecolwidth 195 -configure wave -valuecolwidth 135 +WaveRestoreCursors {{Cursor 1} {4842600 ps} 1} {{Cursor 2} {4823000 ps} 1} {{Cursor 4} {4816946 ps} 1} {{Cursor 12} {3614999 ps} 1} {{Cursor 13} {3617010 ps} 1} {{Cursor 14} {3645847 ps} 1} {{Cursor 15} {3624942 ps} 1} {{Cursor 16} {5124600 ps} 1} +quietly wave cursor active 8 +configure wave -namecolwidth 167 +configure wave -valuecolwidth 100 configure wave -justifyvalue left configure wave -signalnamewidth 1 configure wave -snapdistance 10 @@ -301,4 +332,4 @@ configure wave -griddelta 40 configure wave -timeline 0 configure wave -timelineunits ns update -WaveRestoreZoom {4812915 ps} {4830108 ps} +WaveRestoreZoom {5079893 ps} {5130074 ps} diff --git a/src/ita_controller.sv b/src/ita_controller.sv index 2378752..4b2965b 100644 --- a/src/ita_controller.sv +++ b/src/ita_controller.sv @@ -96,8 +96,8 @@ module ita_controller softmax_div_done_d = softmax_div_done_q; last_time = 1'b0; requant_add = {N {requant_add_i}}; - mask_col_offset_d = (step_q == QK) ? mask_col_offset_q : ((ctrl_i.mask_start_index-1) & (N-1)); - mask_pos_d = (step_q == QK) ? mask_pos_q : (((ctrl_i.mask_start_index-1)/N)*M); + mask_col_offset_d = (step_q == QK) ? mask_col_offset_q : ((ctrl_i.mask_start_index) & (N-1)); + mask_pos_d = (step_q == QK) ? mask_pos_q : (((ctrl_i.mask_start_index)/N)*M); mask_tile_x_pos_d = mask_tile_x_pos_q; mask_tile_y_pos_d = mask_tile_y_pos_q; mask_d = mask_q; @@ -427,7 +427,7 @@ module ita_controller mask_pos_d = (mask_pos_q + (N - ((mask_pos_q + mask_col_offset_q) & (N-1))) + M) & ((M*M/N)-1); end for (int i = 0; i < N; i++) begin - if (((count_q + mask_col_offset_q) & (N-1)) >= i) begin + if (((count_q + mask_col_offset_q) & (N-1)) <= i) begin mask_d[i] = 1'b1; end else begin mask_d[i] = 1'b0; diff --git a/src/ita_softmax.sv b/src/ita_softmax.sv index 528b38e..26c9611 100644 --- a/src/ita_softmax.sv +++ b/src/ita_softmax.sv @@ -52,7 +52,7 @@ module ita_softmax counter_t tile_y_q; logic unsigned [SoftmaxAccDataWidth-1:0] exp_sum_d, exp_sum_q; - counter_t count_soft_d, count_soft_q1, count_soft_q2; + counter_t count_soft_d, count_soft_q1, count_soft_q2, count_soft_mask_q; counter_t count_div_d, count_div_q, addr_div_d, addr_div_q; logic [NumDiv-1:0] div_read_d, div_read_q, div_write_d, div_write_q; @@ -248,7 +248,8 @@ module ita_softmax disable_col[i] = ((inner_tile_q*M + i) >= ctrl_i.seq_length); if ((inner_tile_q*M + i) >= ctrl_i.seq_length) begin disable_col[i] = 1'b1; - end else if ((i >= (count_soft_q1 & (M-1))) && (ctrl_i.mask_type == UpperTriangular)) begin + // This logic needs to be replaced + end else if ((i >= ((count_soft_mask_q & (M-1)) + (ctrl_i.mask_start_index & (M-1)))) && (ctrl_i.mask_type == UpperTriangular)) begin disable_col[i] = 1'b1; end else begin disable_col[i] = 1'b0; @@ -282,6 +283,7 @@ module ita_softmax count_q1 <= M*M/N; count_soft_q1 <= '0; count_soft_q2 <= '0; + count_soft_mask_q <= '0; count_div_q <= '0; div_read_q <= '0; div_write_q <= '0; @@ -303,8 +305,10 @@ module ita_softmax count_q3 <= count_q2; count_q2 <= count_q1; count_q1 <= count_d; - count_soft_q1 <= count_soft_d; - count_soft_q2 <= count_soft_q1; + count_soft_q1 <= count_soft_d; + count_soft_q2 <= count_soft_q1; + if (calc_stream_soft_en_i) + count_soft_mask_q <= count_soft_q1; count_div_q <= count_div_d; div_read_q <= div_read_d; div_write_q <= div_write_d; From 07771e9b2121c278db65619abced388d1c72174c Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Wed, 27 Nov 2024 18:19:51 +0100 Subject: [PATCH 39/60] Four errors left for one tile --- modelsim/sim_ita_tb_wave.tcl | 30 ++- modelsim/sim_ita_tb_wave_important.tcl | 256 +++++++++++++------------ src/ita_softmax.sv | 1 - 3 files changed, 162 insertions(+), 125 deletions(-) diff --git a/modelsim/sim_ita_tb_wave.tcl b/modelsim/sim_ita_tb_wave.tcl index cf72515..c49cf79 100644 --- a/modelsim/sim_ita_tb_wave.tcl +++ b/modelsim/sim_ita_tb_wave.tcl @@ -30,8 +30,26 @@ add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radi add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_q3 add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_q3 add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/first_outer_dim +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_inp2_mux/clk_i add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/count_q -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_controller/mask_d +add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/i_controller/mask_d +add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask +add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q1 +add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q2 +add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q3 +add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q4 +add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q5 +add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q6 +add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/i_softmax_top/i_softmax/mask_i +add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_softmax_top/i_softmax/max_o +add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_softmax_top/i_softmax/max_i +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_requantizer/requant_oup_o +add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q +add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_softmax_top/i_softmax/prev_max_o +add wave -noupdate -expand -group {Masking Signals} -radix decimal -childformat {{{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[15]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[14]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[13]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[12]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[11]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[10]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[9]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[8]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[7]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[6]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[5]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[4]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[3]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[2]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[1]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[0]} {-height 16 -radix decimal}} /ita_tb/dut/i_softmax_top/i_softmax/shift_diff +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_pos_q add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_col_offset_q add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q5 @@ -49,8 +67,9 @@ add wave -noupdate -group Bias /ita_tb/dut/inp_bias_q2 add wave -noupdate /ita_tb/dut/calc_en_q4 add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q +add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 -add wave -noupdate -radix binary /ita_tb/dut/i_softmax_top/i_softmax/disable_col +add wave -noupdate -radix binary -childformat {{{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[63]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[62]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[61]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[60]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[59]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[58]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[57]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[56]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[55]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[54]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[53]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[52]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[51]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[50]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[49]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[48]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[47]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[46]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[45]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[44]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[43]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[42]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[41]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[40]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[39]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[38]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[37]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[36]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[35]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[34]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[33]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[32]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[31]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[30]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[29]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[28]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[27]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[26]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[25]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[24]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[23]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[22]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[21]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[20]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[19]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[18]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[17]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[16]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[15]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[14]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[13]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[12]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[11]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[10]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[9]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[8]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[7]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[6]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[5]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[4]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[3]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[2]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[1]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[0]} -radix binary}} -subitemconfig {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[63]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[62]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[61]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[60]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[59]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[58]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[57]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[56]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[55]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[54]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[53]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[52]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[51]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[50]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[49]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[48]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[47]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[46]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[45]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[44]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[43]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[42]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[41]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[40]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[39]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[38]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[37]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[36]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[35]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[34]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[33]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[32]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[31]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[30]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[29]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[28]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[27]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[26]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[25]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[24]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[23]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[22]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[21]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[20]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[19]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[18]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[17]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[16]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[15]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[14]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[13]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[12]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[11]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[10]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[9]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[8]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[7]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[6]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[5]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[4]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[3]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[2]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[1]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[0]} {-radix binary}} /ita_tb/dut/i_softmax_top/i_softmax/disable_col add wave -noupdate /ita_tb/dut/i_inp2_mux/clk_i add wave -noupdate /ita_tb/dut/i_controller/step_q add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/step_i @@ -80,13 +99,14 @@ add wave -noupdate /ita_tb/dut/calc_en_q9 add wave -noupdate /ita_tb/dut/calc_en_q10 add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i add wave -noupdate -radix hexadecimal /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q +add wave -noupdate /ita_tb/dut/i_requantizer/clk_i add wave -noupdate -radix binary /ita_tb/dut/i_softmax_top/i_softmax/disable_col add wave -noupdate /ita_tb/dut/i_inp1_mux/inp_i add wave -noupdate /ita_tb/dut/inp add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o -add wave -noupdate /ita_tb/dut/inp1 -add wave -noupdate /ita_tb/dut/inp1_q -add wave -noupdate /ita_tb/dut/i_accumulator/oup_i +add wave -noupdate -radix decimal /ita_tb/dut/inp1 +add wave -noupdate -radix decimal /ita_tb/dut/inp1_q +add wave -noupdate -radix decimal /ita_tb/dut/i_accumulator/oup_i add wave -noupdate /ita_tb/dut/i_accumulator/result_d add wave -noupdate /ita_tb/dut/i_accumulator/result_o add wave -noupdate /ita_tb/dut/i_activation/data_i diff --git a/modelsim/sim_ita_tb_wave_important.tcl b/modelsim/sim_ita_tb_wave_important.tcl index 509e694..1658fb3 100644 --- a/modelsim/sim_ita_tb_wave_important.tcl +++ b/modelsim/sim_ita_tb_wave_important.tcl @@ -28,8 +28,26 @@ add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radi add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_q3 add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_q3 add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/first_outer_dim +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_inp2_mux/clk_i add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/count_q -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_controller/mask_d +add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/i_controller/mask_d +add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask +add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q1 +add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q2 +add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q3 +add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q4 +add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q5 +add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q6 +add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/i_softmax_top/i_softmax/mask_i +add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_softmax_top/i_softmax/max_o +add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_softmax_top/i_softmax/max_i +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_requantizer/requant_oup_o +add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q +add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_softmax_top/i_softmax/prev_max_o +add wave -noupdate -expand -group {Masking Signals} -radix decimal -childformat {{{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[15]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[14]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[13]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[12]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[11]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[10]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[9]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[8]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[7]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[6]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[5]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[4]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[3]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[2]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[1]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[0]} {-height 16 -radix decimal}} /ita_tb/dut/i_softmax_top/i_softmax/shift_diff +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_pos_q add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_col_offset_q add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q5 @@ -47,8 +65,9 @@ add wave -noupdate -group Bias /ita_tb/dut/inp_bias_q2 add wave -noupdate /ita_tb/dut/calc_en_q4 add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q +add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 -add wave -noupdate -radix binary /ita_tb/dut/i_softmax_top/i_softmax/disable_col +add wave -noupdate -radix binary -childformat {{{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[63]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[62]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[61]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[60]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[59]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[58]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[57]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[56]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[55]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[54]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[53]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[52]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[51]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[50]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[49]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[48]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[47]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[46]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[45]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[44]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[43]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[42]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[41]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[40]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[39]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[38]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[37]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[36]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[35]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[34]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[33]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[32]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[31]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[30]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[29]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[28]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[27]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[26]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[25]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[24]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[23]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[22]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[21]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[20]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[19]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[18]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[17]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[16]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[15]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[14]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[13]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[12]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[11]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[10]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[9]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[8]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[7]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[6]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[5]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[4]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[3]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[2]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[1]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[0]} -radix binary}} -subitemconfig {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[63]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[62]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[61]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[60]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[59]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[58]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[57]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[56]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[55]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[54]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[53]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[52]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[51]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[50]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[49]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[48]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[47]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[46]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[45]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[44]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[43]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[42]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[41]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[40]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[39]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[38]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[37]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[36]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[35]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[34]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[33]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[32]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[31]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[30]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[29]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[28]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[27]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[26]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[25]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[24]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[23]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[22]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[21]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[20]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[19]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[18]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[17]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[16]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[15]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[14]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[13]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[12]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[11]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[10]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[9]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[8]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[7]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[6]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[5]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[4]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[3]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[2]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[1]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[0]} {-radix binary}} /ita_tb/dut/i_softmax_top/i_softmax/disable_col add wave -noupdate /ita_tb/dut/i_inp2_mux/clk_i add wave -noupdate /ita_tb/dut/i_controller/step_q add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/step_i @@ -78,13 +97,14 @@ add wave -noupdate /ita_tb/dut/calc_en_q9 add wave -noupdate /ita_tb/dut/calc_en_q10 add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i add wave -noupdate -radix hexadecimal /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q +add wave -noupdate /ita_tb/dut/i_requantizer/clk_i add wave -noupdate -radix binary /ita_tb/dut/i_softmax_top/i_softmax/disable_col add wave -noupdate /ita_tb/dut/i_inp1_mux/inp_i add wave -noupdate /ita_tb/dut/inp add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o -add wave -noupdate /ita_tb/dut/inp1 -add wave -noupdate /ita_tb/dut/inp1_q -add wave -noupdate /ita_tb/dut/i_accumulator/oup_i +add wave -noupdate -radix decimal /ita_tb/dut/inp1 +add wave -noupdate -radix decimal /ita_tb/dut/inp1_q +add wave -noupdate -radix decimal /ita_tb/dut/i_accumulator/oup_i add wave -noupdate /ita_tb/dut/i_accumulator/result_d add wave -noupdate /ita_tb/dut/i_accumulator/result_o add wave -noupdate /ita_tb/dut/i_activation/data_i @@ -96,114 +116,112 @@ add wave -noupdate /ita_tb/dut/i_activation/data_o add wave -noupdate /ita_tb/dut/i_fifo/data_i add wave -noupdate /ita_tb/dut/i_fifo/data_o add wave -noupdate /ita_tb/dut/oup_o -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/clk_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/rst_ni -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mode_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/eps_mult_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/right_shift_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_q_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/result_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_o -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mult_signed -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/product -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_added -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_d -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_q -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q1 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q2 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q3 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q4 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_d -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/clk_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/rst_ni -add wave -noupdate -group Controller /ita_tb/dut/i_controller/ctrl_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_valid_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_ready_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/weight_valid_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/weight_ready_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_valid_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_ready_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/oup_valid_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/oup_ready_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/pop_softmax_fifo_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/soft_addr_div_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_done_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/calc_en_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_inner_tile_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/last_inner_tile_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_pad_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/calc_en_q1_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/count_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/count_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_count -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_pos_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_pos_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_col_offset_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_col_offset_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_count_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_count_q1 -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_count_q2 -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_count_q3 -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_x_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_x_q1 -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_x_q2 -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_x_q3 -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_y_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_y_q1 -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_y_q2 -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_y_q3 -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_tile_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_tile_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_soft_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_soft_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_padded -add wave -noupdate -group Controller /ita_tb/dut/i_controller/last_time -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_dim -add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_outer_dim -add wave -noupdate -group Controller /ita_tb/dut/i_controller/second_outer_dim -add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_outer_dim_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_outer_dim_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/second_outer_dim_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/second_outer_dim_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_fifo -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div_done_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div_done_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_q +add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/rst_ni +add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/mode_i +add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/eps_mult_i +add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/right_shift_i +add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/calc_en_i +add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/calc_en_q_i +add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/result_i +add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/add_i +add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/mult_signed +add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/product +add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/shifted_added +add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/shifted_d +add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/shifted_q +add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/add_q1 +add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/add_q2 +add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/add_q3 +add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/add_q4 +add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_d +add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/clk_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/rst_ni +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ctrl_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_ready_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_ready_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_ready_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_ready_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/pop_softmax_fifo_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/soft_addr_div_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_done_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_inner_tile_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_inner_tile_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_pad_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_q1_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/count_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/count_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_count +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_count_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_count_q1 +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_count_q2 +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_count_q3 +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_q1 +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_q2 +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_q3 +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_q1 +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_q2 +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_q3 +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_padded +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_time +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_dim +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_fifo +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_q add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/clk_i add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/rst_ni add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/ctrl_i @@ -258,6 +276,7 @@ add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_d add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_d add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_q add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_d @@ -266,7 +285,6 @@ add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_q add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_d add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_q -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_d add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_q add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_d @@ -277,7 +295,6 @@ add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_diff add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp_diff -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q2 @@ -291,6 +308,7 @@ add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_usage add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_row +add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_col add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/clk_i add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/rst_ni add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_i @@ -316,9 +334,9 @@ add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_q add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_d add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_q TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {4842600 ps} 1} {{Cursor 2} {4823000 ps} 1} {{Cursor 4} {4816946 ps} 1} {{Cursor 12} {3614999 ps} 1} {{Cursor 13} {3617010 ps} 1} {{Cursor 14} {3645847 ps} 1} {{Cursor 15} {3624942 ps} 1} {{Cursor 16} {5124600 ps} 1} -quietly wave cursor active 8 -configure wave -namecolwidth 167 +WaveRestoreCursors {{Cursor 1} {3869000 ps} 1} {{Cursor 2} {5124600 ps} 1} {{Cursor 3} {5390600 ps} 1} {{Cursor 4} {5680600 ps} 1} {{Cursor 5} {5920600 ps} 1} {inp1_q {5901000 ps} 1} {{Cursor 7} {5899000 ps} 1} {{Cursor 8} {5897400 ps} 1} {{Cursor 9} {0 ps} 0} {Trace {5106220 ps} 0} +quietly wave cursor active 10 +configure wave -namecolwidth 170 configure wave -valuecolwidth 100 configure wave -justifyvalue left configure wave -signalnamewidth 1 @@ -332,4 +350,4 @@ configure wave -griddelta 40 configure wave -timeline 0 configure wave -timelineunits ns update -WaveRestoreZoom {5079893 ps} {5130074 ps} +WaveRestoreZoom {5088920 ps} {5143811 ps} diff --git a/src/ita_softmax.sv b/src/ita_softmax.sv index 26c9611..f8a838c 100644 --- a/src/ita_softmax.sv +++ b/src/ita_softmax.sv @@ -245,7 +245,6 @@ module ita_softmax inp_stream_soft_o = { M { '0 } }; end else begin for (int i = 0; i < M; i++) begin - disable_col[i] = ((inner_tile_q*M + i) >= ctrl_i.seq_length); if ((inner_tile_q*M + i) >= ctrl_i.seq_length) begin disable_col[i] = 1'b1; // This logic needs to be replaced From 557ac191b998cd16d29a82bc806f940d406bb926 Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Fri, 29 Nov 2024 16:00:58 +0100 Subject: [PATCH 40/60] Still searching for the reason for the four errors --- PyITA/ITA.py | 18 +- PyITA/softmax.py | 17 +- modelsim/sim_ita_tb_wave.tcl | 47 +++-- modelsim/sim_ita_tb_wave_important.tcl | 271 +++++++++++++------------ 4 files changed, 199 insertions(+), 154 deletions(-) diff --git a/PyITA/ITA.py b/PyITA/ITA.py index 6d35fa2..18c30bd 100644 --- a/PyITA/ITA.py +++ b/PyITA/ITA.py @@ -606,7 +606,8 @@ def step4_QK(self, no_partial_softmax, mask, index): plt.title("A_requant/A_stream_soft_in") plt.show() - + print(f"A_requant row 0: {self.A_requant[0, 0, :]}") + if (self.S_ITA - self.S) > 0: self.A_requant[:, -(self.S_ITA - self.S):, :] = 0 self.A_requant[:, :, -(self.S_ITA - self.S):] = 0 @@ -632,6 +633,8 @@ def soft(self, no_partial_softmax = False): else: self.A_partial_softmax = streamingPartialSoftmax(self.A_requant[:, :self.S, :self.S], self.Mask) self.A_partial_softmax[self.Mask] = 0 + print(f"inp_stream_soft_o: {self.A_partial_softmax[0,:,:]}") + print(f"Normalization Sum: {np.sum(self.A_partial_softmax[0,:,:], axis=1)}") self.A_partial_softmax = np.pad(self.A_partial_softmax, ((0, 0), (0, self.S_ITA - self.S), (0, self.S_ITA - self.S))) @@ -643,13 +646,26 @@ def soft(self, no_partial_softmax = False): write_matrix(A_save, f"A_soft_{h}", self.paths["standalone"]) def step5_AV(self): + print(f"A_partial_softmax: {self.A_partial_softmax.shape}") + print(f"Vp_requant: {self.Vp_requant.shape}") + self.O_soft = np.array([ np.matmul(self.A_partial_softmax[i].astype(np.uint8), self.Vp_requant[i], dtype = np.int32) for i in range(self.H) ]) + print(f"O_soft without requant row 0: {self.O_soft[0, 62, :]}") + print(f"O_soft without requant row 0: {self.O_soft[0, 63, :]}") + print(f"O_soft without requant row 0: {self.O_soft[0, 0, :]}") + print(f"O_soft without requant row 0: {self.O_soft[0, 1, :]}") + self.O_soft = np.clip(self.O_soft, -2**(self.WO - 1), 2**(self.WO - 1) - 1) self.O_soft_requant = requantize(self.O_soft, self.requant_eps_mult[4], self.requant_right_shift[4], self.requant_add[4]) + + print(f"O_soft_requant: {self.O_soft_requant[0, 62, :]}") + print(f"O_soft_requant: {self.O_soft_requant[0, 63, :]}") + print(f"O_soft_requant: {self.O_soft_requant[0, 0, :]}") + print(f"O_soft_requant: {self.O_soft_requant[0, 1, :]}") if (self.S_ITA - self.S) > 0: self.O_soft_requant[:, -(self.S_ITA - self.S):, :] = 0 diff --git a/PyITA/softmax.py b/PyITA/softmax.py index 996c14a..af55f0d 100644 --- a/PyITA/softmax.py +++ b/PyITA/softmax.py @@ -105,8 +105,10 @@ def streamingPartialSoftmax(x, mask, integerize = True): mask_slice = mask[... ,i*PE:(i*PE)+width] x_slice = x[..., 0 + i * PE:width + i * PE] - print(f"Mask Slice: {mask_slice.shape}") - print(f"X Slice: {x_slice.shape}") + print(f"Mask Slice Shape: {mask_slice.shape}") + print(f"Mask Slice: {mask_slice}") + print(f"X Slice Shape: {x_slice.shape}") + print(f"X Slice: {x_slice}") # Find the maximum for each row in the current column block (consisting of 16 columns) if integerize: @@ -135,6 +137,8 @@ def streamingPartialSoftmax(x, mask, integerize = True): # Update all shift values where new maximum is larger shift_sum[current_max > global_max] = max_shift[current_max > global_max] + print(f"Shift sum: {shift_sum}") + # Updated all maximums where they changed global_max[current_max > global_max] = current_max[current_max > global_max] @@ -153,9 +157,12 @@ def streamingPartialSoftmax(x, mask, integerize = True): else: shift = diff * eps_max - print(shift.shape) + print(f"Shift Shape: {shift.shape}") + print(f"Shift without mask: {shift}") + # Set shift value so high that 2**8 >> shift gets zero for all masked values shift[mask_slice] = 16 + print(f"Shift with mask: {shift}") # # matrix = np.squeeze(shift) # # import matplotlib.pyplot as plt # # plt.imshow(matrix, cmap='viridis') @@ -170,12 +177,16 @@ def streamingPartialSoftmax(x, mask, integerize = True): else: exp_sum = np.sum(1 / 2**shift, axis = -1) + print(f"Exp sum: {exp_sum}") + # Update the accumulated sum and add the accumulation over the current part of the row if integerize: exp_partial_sum = np.floor((exp_partial_sum / 2**shift_sum)) + exp_sum else: exp_partial_sum = (exp_partial_sum / 2**(shift_sum.astype(np.float32))) + exp_sum + print(f"Exp parital sum: {exp_partial_sum}") + ## STAGE 2: Calculate the softmax activation # Invert the partial sum if integerize: diff --git a/modelsim/sim_ita_tb_wave.tcl b/modelsim/sim_ita_tb_wave.tcl index c49cf79..716f8bd 100644 --- a/modelsim/sim_ita_tb_wave.tcl +++ b/modelsim/sim_ita_tb_wave.tcl @@ -31,6 +31,16 @@ add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radi add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_q3 add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/first_outer_dim add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_inp2_mux/clk_i +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/last_inner_tile_q6 +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_controller/calc_en_o +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q1 +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q2 +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q3 +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q4 +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q5 +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q6 +add wave -noupdate -expand -group {Masking Signals} -expand -group {In Softmax Module} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d +add wave -noupdate -expand -group {Masking Signals} -expand -group {In Softmax Module} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/count_q add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/i_controller/mask_d add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask @@ -43,17 +53,16 @@ add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/ma add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/i_softmax_top/i_softmax/mask_i add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_softmax_top/i_softmax/max_o add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_softmax_top/i_softmax/max_i -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_requantizer/requant_oup_o +add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_requantizer/requant_oup_o add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_softmax_top/i_softmax/prev_max_o add wave -noupdate -expand -group {Masking Signals} -radix decimal -childformat {{{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[15]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[14]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[13]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[12]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[11]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[10]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[9]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[8]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[7]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[6]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[5]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[4]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[3]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[2]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[1]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[0]} {-height 16 -radix decimal}} /ita_tb/dut/i_softmax_top/i_softmax/shift_diff add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_controller/step_q add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_pos_q add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_col_offset_q -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q5 -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q6 +add wave -noupdate /ita_tb/dut/calc_en_q5 +add wave -noupdate /ita_tb/dut/calc_en_q6 add wave -noupdate /ita_tb/dut/calc_en_q7 add wave -noupdate /ita_tb/dut/calc_en_q8 add wave -noupdate /ita_tb/dut/calc_en_q9 @@ -66,18 +75,14 @@ add wave -noupdate -group Bias /ita_tb/dut/inp_bias_q1 add wave -noupdate -group Bias /ita_tb/dut/inp_bias_q2 add wave -noupdate /ita_tb/dut/calc_en_q4 add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 -add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q +add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i +add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 -add wave -noupdate -radix binary -childformat {{{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[63]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[62]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[61]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[60]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[59]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[58]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[57]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[56]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[55]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[54]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[53]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[52]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[51]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[50]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[49]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[48]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[47]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[46]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[45]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[44]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[43]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[42]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[41]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[40]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[39]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[38]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[37]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[36]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[35]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[34]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[33]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[32]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[31]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[30]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[29]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[28]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[27]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[26]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[25]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[24]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[23]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[22]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[21]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[20]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[19]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[18]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[17]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[16]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[15]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[14]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[13]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[12]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[11]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[10]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[9]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[8]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[7]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[6]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[5]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[4]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[3]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[2]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[1]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[0]} -radix binary}} -subitemconfig {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[63]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[62]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[61]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[60]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[59]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[58]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[57]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[56]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[55]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[54]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[53]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[52]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[51]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[50]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[49]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[48]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[47]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[46]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[45]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[44]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[43]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[42]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[41]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[40]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[39]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[38]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[37]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[36]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[35]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[34]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[33]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[32]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[31]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[30]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[29]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[28]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[27]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[26]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[25]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[24]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[23]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[22]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[21]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[20]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[19]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[18]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[17]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[16]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[15]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[14]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[13]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[12]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[11]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[10]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[9]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[8]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[7]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[6]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[5]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[4]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[3]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[2]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[1]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[0]} {-radix binary}} /ita_tb/dut/i_softmax_top/i_softmax/disable_col +add wave -noupdate -radix binary -childformat {{{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[63]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[62]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[61]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[60]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[59]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[58]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[57]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[56]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[55]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[54]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[53]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[52]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[51]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[50]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[49]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[48]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[47]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[46]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[45]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[44]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[43]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[42]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[41]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[40]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[39]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[38]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[37]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[36]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[35]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[34]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[33]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[32]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[31]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[30]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[29]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[28]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[27]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[26]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[25]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[24]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[23]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[22]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[21]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[20]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[19]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[18]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[17]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[16]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[15]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[14]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[13]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[12]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[11]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[10]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[9]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[8]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[7]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[6]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[5]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[4]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[3]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[2]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[1]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[0]} -radix binary}} -subitemconfig {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[63]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[62]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[61]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[60]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[59]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[58]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[57]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[56]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[55]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[54]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[53]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[52]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[51]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[50]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[49]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[48]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[47]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[46]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[45]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[44]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[43]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[42]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[41]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[40]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[39]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[38]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[37]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[36]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[35]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[34]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[33]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[32]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[31]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[30]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[29]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[28]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[27]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[26]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[25]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[24]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[23]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[22]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[21]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[20]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[19]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[18]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[17]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[16]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[15]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[14]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[13]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[12]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[11]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[10]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[9]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[8]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[7]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[6]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[5]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[4]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[3]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[2]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[1]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[0]} {-height 16 -radix binary}} /ita_tb/dut/i_softmax_top/i_softmax/disable_col add wave -noupdate /ita_tb/dut/i_inp2_mux/clk_i -add wave -noupdate /ita_tb/dut/i_controller/step_q add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/step_i add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_i -add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d -add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 -add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q2 -add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q3 add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/mask_i add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/max_i add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/max_o @@ -100,16 +105,18 @@ add wave -noupdate /ita_tb/dut/calc_en_q10 add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i add wave -noupdate -radix hexadecimal /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q add wave -noupdate /ita_tb/dut/i_requantizer/clk_i +add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q add wave -noupdate -radix binary /ita_tb/dut/i_softmax_top/i_softmax/disable_col -add wave -noupdate /ita_tb/dut/i_inp1_mux/inp_i -add wave -noupdate /ita_tb/dut/inp -add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o -add wave -noupdate -radix decimal /ita_tb/dut/inp1 -add wave -noupdate -radix decimal /ita_tb/dut/inp1_q +add wave -noupdate /ita_tb/dut/i_activation/data_q3 +add wave -noupdate -radix decimal /ita_tb/dut/inp_i +add wave -noupdate -expand -group {All in one Phase} -radix decimal -childformat {{{/ita_tb/dut/inp[63]} -radix decimal} {{/ita_tb/dut/inp[62]} -radix decimal} {{/ita_tb/dut/inp[61]} -radix decimal} {{/ita_tb/dut/inp[60]} -radix decimal} {{/ita_tb/dut/inp[59]} -radix decimal} {{/ita_tb/dut/inp[58]} -radix decimal} {{/ita_tb/dut/inp[57]} -radix decimal} {{/ita_tb/dut/inp[56]} -radix decimal} {{/ita_tb/dut/inp[55]} -radix decimal} {{/ita_tb/dut/inp[54]} -radix decimal} {{/ita_tb/dut/inp[53]} -radix decimal} {{/ita_tb/dut/inp[52]} -radix decimal} {{/ita_tb/dut/inp[51]} -radix decimal} {{/ita_tb/dut/inp[50]} -radix decimal} {{/ita_tb/dut/inp[49]} -radix decimal} {{/ita_tb/dut/inp[48]} -radix decimal} {{/ita_tb/dut/inp[47]} -radix decimal} {{/ita_tb/dut/inp[46]} -radix decimal} {{/ita_tb/dut/inp[45]} -radix decimal} {{/ita_tb/dut/inp[44]} -radix decimal} {{/ita_tb/dut/inp[43]} -radix decimal} {{/ita_tb/dut/inp[42]} -radix decimal} {{/ita_tb/dut/inp[41]} -radix decimal} {{/ita_tb/dut/inp[40]} -radix decimal} {{/ita_tb/dut/inp[39]} -radix decimal} {{/ita_tb/dut/inp[38]} -radix decimal} {{/ita_tb/dut/inp[37]} -radix decimal} {{/ita_tb/dut/inp[36]} -radix decimal} {{/ita_tb/dut/inp[35]} -radix decimal} {{/ita_tb/dut/inp[34]} -radix decimal} {{/ita_tb/dut/inp[33]} -radix decimal} {{/ita_tb/dut/inp[32]} -radix decimal} {{/ita_tb/dut/inp[31]} -radix decimal} {{/ita_tb/dut/inp[30]} -radix decimal} {{/ita_tb/dut/inp[29]} -radix decimal} {{/ita_tb/dut/inp[28]} -radix decimal} {{/ita_tb/dut/inp[27]} -radix decimal} {{/ita_tb/dut/inp[26]} -radix decimal} {{/ita_tb/dut/inp[25]} -radix decimal} {{/ita_tb/dut/inp[24]} -radix decimal} {{/ita_tb/dut/inp[23]} -radix decimal} {{/ita_tb/dut/inp[22]} -radix decimal} {{/ita_tb/dut/inp[21]} -radix decimal} {{/ita_tb/dut/inp[20]} -radix decimal} {{/ita_tb/dut/inp[19]} -radix decimal} {{/ita_tb/dut/inp[18]} -radix decimal} {{/ita_tb/dut/inp[17]} -radix decimal} {{/ita_tb/dut/inp[16]} -radix decimal} {{/ita_tb/dut/inp[15]} -radix decimal} {{/ita_tb/dut/inp[14]} -radix decimal} {{/ita_tb/dut/inp[13]} -radix decimal} {{/ita_tb/dut/inp[12]} -radix decimal} {{/ita_tb/dut/inp[11]} -radix decimal} {{/ita_tb/dut/inp[10]} -radix decimal} {{/ita_tb/dut/inp[9]} -radix decimal} {{/ita_tb/dut/inp[8]} -radix decimal} {{/ita_tb/dut/inp[7]} -radix decimal} {{/ita_tb/dut/inp[6]} -radix decimal} {{/ita_tb/dut/inp[5]} -radix decimal} {{/ita_tb/dut/inp[4]} -radix decimal} {{/ita_tb/dut/inp[3]} -radix decimal} {{/ita_tb/dut/inp[2]} -radix decimal} {{/ita_tb/dut/inp[1]} -radix decimal} {{/ita_tb/dut/inp[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/inp[63]} {-radix decimal} {/ita_tb/dut/inp[62]} {-radix decimal} {/ita_tb/dut/inp[61]} {-radix decimal} {/ita_tb/dut/inp[60]} {-radix decimal} {/ita_tb/dut/inp[59]} {-radix decimal} {/ita_tb/dut/inp[58]} {-radix decimal} {/ita_tb/dut/inp[57]} {-radix decimal} {/ita_tb/dut/inp[56]} {-radix decimal} {/ita_tb/dut/inp[55]} {-radix decimal} {/ita_tb/dut/inp[54]} {-radix decimal} {/ita_tb/dut/inp[53]} {-radix decimal} {/ita_tb/dut/inp[52]} {-radix decimal} {/ita_tb/dut/inp[51]} {-radix decimal} {/ita_tb/dut/inp[50]} {-radix decimal} {/ita_tb/dut/inp[49]} {-radix decimal} {/ita_tb/dut/inp[48]} {-radix decimal} {/ita_tb/dut/inp[47]} {-radix decimal} {/ita_tb/dut/inp[46]} {-radix decimal} {/ita_tb/dut/inp[45]} {-radix decimal} {/ita_tb/dut/inp[44]} {-radix decimal} {/ita_tb/dut/inp[43]} {-radix decimal} {/ita_tb/dut/inp[42]} {-radix decimal} {/ita_tb/dut/inp[41]} {-radix decimal} {/ita_tb/dut/inp[40]} {-radix decimal} {/ita_tb/dut/inp[39]} {-radix decimal} {/ita_tb/dut/inp[38]} {-radix decimal} {/ita_tb/dut/inp[37]} {-radix decimal} {/ita_tb/dut/inp[36]} {-radix decimal} {/ita_tb/dut/inp[35]} {-radix decimal} {/ita_tb/dut/inp[34]} {-radix decimal} {/ita_tb/dut/inp[33]} {-radix decimal} {/ita_tb/dut/inp[32]} {-radix decimal} {/ita_tb/dut/inp[31]} {-radix decimal} {/ita_tb/dut/inp[30]} {-radix decimal} {/ita_tb/dut/inp[29]} {-radix decimal} {/ita_tb/dut/inp[28]} {-radix decimal} {/ita_tb/dut/inp[27]} {-radix decimal} {/ita_tb/dut/inp[26]} {-radix decimal} {/ita_tb/dut/inp[25]} {-radix decimal} {/ita_tb/dut/inp[24]} {-radix decimal} {/ita_tb/dut/inp[23]} {-radix decimal} {/ita_tb/dut/inp[22]} {-radix decimal} {/ita_tb/dut/inp[21]} {-radix decimal} {/ita_tb/dut/inp[20]} {-radix decimal} {/ita_tb/dut/inp[19]} {-radix decimal} {/ita_tb/dut/inp[18]} {-radix decimal} {/ita_tb/dut/inp[17]} {-radix decimal} {/ita_tb/dut/inp[16]} {-radix decimal} {/ita_tb/dut/inp[15]} {-radix decimal} {/ita_tb/dut/inp[14]} {-radix decimal} {/ita_tb/dut/inp[13]} {-radix decimal} {/ita_tb/dut/inp[12]} {-radix decimal} {/ita_tb/dut/inp[11]} {-radix decimal} {/ita_tb/dut/inp[10]} {-radix decimal} {/ita_tb/dut/inp[9]} {-radix decimal} {/ita_tb/dut/inp[8]} {-radix decimal} {/ita_tb/dut/inp[7]} {-radix decimal} {/ita_tb/dut/inp[6]} {-radix decimal} {/ita_tb/dut/inp[5]} {-radix decimal} {/ita_tb/dut/inp[4]} {-radix decimal} {/ita_tb/dut/inp[3]} {-radix decimal} {/ita_tb/dut/inp[2]} {-radix decimal} {/ita_tb/dut/inp[1]} {-radix decimal} {/ita_tb/dut/inp[0]} {-radix decimal}} /ita_tb/dut/inp +add wave -noupdate -expand -group {All in one Phase} -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o +add wave -noupdate -expand -group {All in one Phase} -radix decimal /ita_tb/dut/inp1 +add wave -noupdate -expand -group {All in one Phase} -radix unsigned /ita_tb/dut/inp1_q add wave -noupdate -radix decimal /ita_tb/dut/i_accumulator/oup_i -add wave -noupdate /ita_tb/dut/i_accumulator/result_d -add wave -noupdate /ita_tb/dut/i_accumulator/result_o -add wave -noupdate /ita_tb/dut/i_activation/data_i +add wave -noupdate -radix decimal -childformat {{{/ita_tb/dut/i_accumulator/result_d[15]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[14]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[13]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[12]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[11]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[10]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[9]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[8]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[7]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[6]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[5]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[4]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[3]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[2]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[1]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_accumulator/result_d[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[0]} {-height 16 -radix decimal}} /ita_tb/dut/i_accumulator/result_d +add wave -noupdate -radix decimal /ita_tb/dut/i_accumulator/result_o +add wave -noupdate -radix decimal -childformat {{{/ita_tb/dut/i_activation/data_i[15]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[14]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[13]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[12]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[11]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[10]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[9]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[8]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[7]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[6]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[5]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[4]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[3]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[2]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[1]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_activation/data_i[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[0]} {-height 16 -radix decimal}} /ita_tb/dut/i_activation/data_i add wave -noupdate /ita_tb/dut/i_activation/data_q1 add wave -noupdate /ita_tb/dut/i_activation/data_q2 add wave -noupdate /ita_tb/dut/i_activation/data_q3 diff --git a/modelsim/sim_ita_tb_wave_important.tcl b/modelsim/sim_ita_tb_wave_important.tcl index 1658fb3..7633c3d 100644 --- a/modelsim/sim_ita_tb_wave_important.tcl +++ b/modelsim/sim_ita_tb_wave_important.tcl @@ -29,6 +29,16 @@ add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radi add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_q3 add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/first_outer_dim add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_inp2_mux/clk_i +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/last_inner_tile_q6 +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_controller/calc_en_o +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q1 +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q2 +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q3 +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q4 +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q5 +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q6 +add wave -noupdate -expand -group {Masking Signals} -expand -group {In Softmax Module} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d +add wave -noupdate -expand -group {Masking Signals} -expand -group {In Softmax Module} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/count_q add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/i_controller/mask_d add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask @@ -41,17 +51,16 @@ add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/ma add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/i_softmax_top/i_softmax/mask_i add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_softmax_top/i_softmax/max_o add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_softmax_top/i_softmax/max_i -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_requantizer/requant_oup_o +add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_requantizer/requant_oup_o add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_softmax_top/i_softmax/prev_max_o add wave -noupdate -expand -group {Masking Signals} -radix decimal -childformat {{{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[15]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[14]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[13]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[12]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[11]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[10]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[9]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[8]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[7]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[6]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[5]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[4]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[3]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[2]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[1]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[0]} {-height 16 -radix decimal}} /ita_tb/dut/i_softmax_top/i_softmax/shift_diff add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_controller/step_q add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_pos_q add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_col_offset_q -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q5 -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q6 +add wave -noupdate /ita_tb/dut/calc_en_q5 +add wave -noupdate /ita_tb/dut/calc_en_q6 add wave -noupdate /ita_tb/dut/calc_en_q7 add wave -noupdate /ita_tb/dut/calc_en_q8 add wave -noupdate /ita_tb/dut/calc_en_q9 @@ -64,18 +73,14 @@ add wave -noupdate -group Bias /ita_tb/dut/inp_bias_q1 add wave -noupdate -group Bias /ita_tb/dut/inp_bias_q2 add wave -noupdate /ita_tb/dut/calc_en_q4 add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 -add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q +add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i +add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 -add wave -noupdate -radix binary -childformat {{{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[63]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[62]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[61]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[60]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[59]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[58]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[57]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[56]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[55]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[54]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[53]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[52]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[51]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[50]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[49]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[48]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[47]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[46]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[45]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[44]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[43]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[42]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[41]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[40]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[39]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[38]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[37]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[36]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[35]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[34]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[33]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[32]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[31]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[30]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[29]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[28]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[27]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[26]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[25]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[24]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[23]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[22]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[21]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[20]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[19]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[18]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[17]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[16]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[15]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[14]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[13]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[12]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[11]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[10]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[9]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[8]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[7]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[6]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[5]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[4]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[3]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[2]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[1]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[0]} -radix binary}} -subitemconfig {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[63]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[62]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[61]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[60]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[59]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[58]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[57]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[56]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[55]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[54]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[53]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[52]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[51]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[50]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[49]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[48]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[47]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[46]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[45]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[44]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[43]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[42]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[41]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[40]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[39]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[38]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[37]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[36]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[35]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[34]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[33]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[32]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[31]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[30]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[29]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[28]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[27]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[26]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[25]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[24]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[23]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[22]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[21]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[20]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[19]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[18]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[17]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[16]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[15]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[14]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[13]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[12]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[11]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[10]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[9]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[8]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[7]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[6]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[5]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[4]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[3]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[2]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[1]} {-radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[0]} {-radix binary}} /ita_tb/dut/i_softmax_top/i_softmax/disable_col +add wave -noupdate -radix binary -childformat {{{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[63]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[62]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[61]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[60]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[59]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[58]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[57]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[56]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[55]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[54]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[53]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[52]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[51]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[50]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[49]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[48]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[47]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[46]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[45]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[44]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[43]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[42]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[41]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[40]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[39]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[38]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[37]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[36]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[35]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[34]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[33]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[32]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[31]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[30]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[29]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[28]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[27]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[26]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[25]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[24]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[23]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[22]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[21]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[20]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[19]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[18]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[17]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[16]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[15]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[14]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[13]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[12]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[11]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[10]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[9]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[8]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[7]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[6]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[5]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[4]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[3]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[2]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[1]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[0]} -radix binary}} -subitemconfig {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[63]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[62]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[61]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[60]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[59]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[58]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[57]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[56]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[55]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[54]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[53]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[52]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[51]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[50]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[49]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[48]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[47]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[46]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[45]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[44]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[43]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[42]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[41]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[40]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[39]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[38]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[37]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[36]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[35]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[34]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[33]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[32]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[31]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[30]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[29]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[28]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[27]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[26]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[25]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[24]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[23]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[22]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[21]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[20]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[19]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[18]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[17]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[16]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[15]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[14]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[13]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[12]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[11]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[10]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[9]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[8]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[7]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[6]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[5]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[4]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[3]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[2]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[1]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[0]} {-height 16 -radix binary}} /ita_tb/dut/i_softmax_top/i_softmax/disable_col add wave -noupdate /ita_tb/dut/i_inp2_mux/clk_i -add wave -noupdate /ita_tb/dut/i_controller/step_q add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/step_i add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_i -add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d -add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 -add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q2 -add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q3 add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/mask_i add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/max_i add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/max_o @@ -98,16 +103,18 @@ add wave -noupdate /ita_tb/dut/calc_en_q10 add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i add wave -noupdate -radix hexadecimal /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q add wave -noupdate /ita_tb/dut/i_requantizer/clk_i +add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q add wave -noupdate -radix binary /ita_tb/dut/i_softmax_top/i_softmax/disable_col -add wave -noupdate /ita_tb/dut/i_inp1_mux/inp_i -add wave -noupdate /ita_tb/dut/inp -add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o -add wave -noupdate -radix decimal /ita_tb/dut/inp1 -add wave -noupdate -radix decimal /ita_tb/dut/inp1_q +add wave -noupdate /ita_tb/dut/i_activation/data_q3 +add wave -noupdate -radix decimal /ita_tb/dut/inp_i +add wave -noupdate -expand -group {All in one Phase} -radix decimal -childformat {{{/ita_tb/dut/inp[63]} -radix decimal} {{/ita_tb/dut/inp[62]} -radix decimal} {{/ita_tb/dut/inp[61]} -radix decimal} {{/ita_tb/dut/inp[60]} -radix decimal} {{/ita_tb/dut/inp[59]} -radix decimal} {{/ita_tb/dut/inp[58]} -radix decimal} {{/ita_tb/dut/inp[57]} -radix decimal} {{/ita_tb/dut/inp[56]} -radix decimal} {{/ita_tb/dut/inp[55]} -radix decimal} {{/ita_tb/dut/inp[54]} -radix decimal} {{/ita_tb/dut/inp[53]} -radix decimal} {{/ita_tb/dut/inp[52]} -radix decimal} {{/ita_tb/dut/inp[51]} -radix decimal} {{/ita_tb/dut/inp[50]} -radix decimal} {{/ita_tb/dut/inp[49]} -radix decimal} {{/ita_tb/dut/inp[48]} -radix decimal} {{/ita_tb/dut/inp[47]} -radix decimal} {{/ita_tb/dut/inp[46]} -radix decimal} {{/ita_tb/dut/inp[45]} -radix decimal} {{/ita_tb/dut/inp[44]} -radix decimal} {{/ita_tb/dut/inp[43]} -radix decimal} {{/ita_tb/dut/inp[42]} -radix decimal} {{/ita_tb/dut/inp[41]} -radix decimal} {{/ita_tb/dut/inp[40]} -radix decimal} {{/ita_tb/dut/inp[39]} -radix decimal} {{/ita_tb/dut/inp[38]} -radix decimal} {{/ita_tb/dut/inp[37]} -radix decimal} {{/ita_tb/dut/inp[36]} -radix decimal} {{/ita_tb/dut/inp[35]} -radix decimal} {{/ita_tb/dut/inp[34]} -radix decimal} {{/ita_tb/dut/inp[33]} -radix decimal} {{/ita_tb/dut/inp[32]} -radix decimal} {{/ita_tb/dut/inp[31]} -radix decimal} {{/ita_tb/dut/inp[30]} -radix decimal} {{/ita_tb/dut/inp[29]} -radix decimal} {{/ita_tb/dut/inp[28]} -radix decimal} {{/ita_tb/dut/inp[27]} -radix decimal} {{/ita_tb/dut/inp[26]} -radix decimal} {{/ita_tb/dut/inp[25]} -radix decimal} {{/ita_tb/dut/inp[24]} -radix decimal} {{/ita_tb/dut/inp[23]} -radix decimal} {{/ita_tb/dut/inp[22]} -radix decimal} {{/ita_tb/dut/inp[21]} -radix decimal} {{/ita_tb/dut/inp[20]} -radix decimal} {{/ita_tb/dut/inp[19]} -radix decimal} {{/ita_tb/dut/inp[18]} -radix decimal} {{/ita_tb/dut/inp[17]} -radix decimal} {{/ita_tb/dut/inp[16]} -radix decimal} {{/ita_tb/dut/inp[15]} -radix decimal} {{/ita_tb/dut/inp[14]} -radix decimal} {{/ita_tb/dut/inp[13]} -radix decimal} {{/ita_tb/dut/inp[12]} -radix decimal} {{/ita_tb/dut/inp[11]} -radix decimal} {{/ita_tb/dut/inp[10]} -radix decimal} {{/ita_tb/dut/inp[9]} -radix decimal} {{/ita_tb/dut/inp[8]} -radix decimal} {{/ita_tb/dut/inp[7]} -radix decimal} {{/ita_tb/dut/inp[6]} -radix decimal} {{/ita_tb/dut/inp[5]} -radix decimal} {{/ita_tb/dut/inp[4]} -radix decimal} {{/ita_tb/dut/inp[3]} -radix decimal} {{/ita_tb/dut/inp[2]} -radix decimal} {{/ita_tb/dut/inp[1]} -radix decimal} {{/ita_tb/dut/inp[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/inp[63]} {-radix decimal} {/ita_tb/dut/inp[62]} {-radix decimal} {/ita_tb/dut/inp[61]} {-radix decimal} {/ita_tb/dut/inp[60]} {-radix decimal} {/ita_tb/dut/inp[59]} {-radix decimal} {/ita_tb/dut/inp[58]} {-radix decimal} {/ita_tb/dut/inp[57]} {-radix decimal} {/ita_tb/dut/inp[56]} {-radix decimal} {/ita_tb/dut/inp[55]} {-radix decimal} {/ita_tb/dut/inp[54]} {-radix decimal} {/ita_tb/dut/inp[53]} {-radix decimal} {/ita_tb/dut/inp[52]} {-radix decimal} {/ita_tb/dut/inp[51]} {-radix decimal} {/ita_tb/dut/inp[50]} {-radix decimal} {/ita_tb/dut/inp[49]} {-radix decimal} {/ita_tb/dut/inp[48]} {-radix decimal} {/ita_tb/dut/inp[47]} {-radix decimal} {/ita_tb/dut/inp[46]} {-radix decimal} {/ita_tb/dut/inp[45]} {-radix decimal} {/ita_tb/dut/inp[44]} {-radix decimal} {/ita_tb/dut/inp[43]} {-radix decimal} {/ita_tb/dut/inp[42]} {-radix decimal} {/ita_tb/dut/inp[41]} {-radix decimal} {/ita_tb/dut/inp[40]} {-radix decimal} {/ita_tb/dut/inp[39]} {-radix decimal} {/ita_tb/dut/inp[38]} {-radix decimal} {/ita_tb/dut/inp[37]} {-radix decimal} {/ita_tb/dut/inp[36]} {-radix decimal} {/ita_tb/dut/inp[35]} {-radix decimal} {/ita_tb/dut/inp[34]} {-radix decimal} {/ita_tb/dut/inp[33]} {-radix decimal} {/ita_tb/dut/inp[32]} {-radix decimal} {/ita_tb/dut/inp[31]} {-radix decimal} {/ita_tb/dut/inp[30]} {-radix decimal} {/ita_tb/dut/inp[29]} {-radix decimal} {/ita_tb/dut/inp[28]} {-radix decimal} {/ita_tb/dut/inp[27]} {-radix decimal} {/ita_tb/dut/inp[26]} {-radix decimal} {/ita_tb/dut/inp[25]} {-radix decimal} {/ita_tb/dut/inp[24]} {-radix decimal} {/ita_tb/dut/inp[23]} {-radix decimal} {/ita_tb/dut/inp[22]} {-radix decimal} {/ita_tb/dut/inp[21]} {-radix decimal} {/ita_tb/dut/inp[20]} {-radix decimal} {/ita_tb/dut/inp[19]} {-radix decimal} {/ita_tb/dut/inp[18]} {-radix decimal} {/ita_tb/dut/inp[17]} {-radix decimal} {/ita_tb/dut/inp[16]} {-radix decimal} {/ita_tb/dut/inp[15]} {-radix decimal} {/ita_tb/dut/inp[14]} {-radix decimal} {/ita_tb/dut/inp[13]} {-radix decimal} {/ita_tb/dut/inp[12]} {-radix decimal} {/ita_tb/dut/inp[11]} {-radix decimal} {/ita_tb/dut/inp[10]} {-radix decimal} {/ita_tb/dut/inp[9]} {-radix decimal} {/ita_tb/dut/inp[8]} {-radix decimal} {/ita_tb/dut/inp[7]} {-radix decimal} {/ita_tb/dut/inp[6]} {-radix decimal} {/ita_tb/dut/inp[5]} {-radix decimal} {/ita_tb/dut/inp[4]} {-radix decimal} {/ita_tb/dut/inp[3]} {-radix decimal} {/ita_tb/dut/inp[2]} {-radix decimal} {/ita_tb/dut/inp[1]} {-radix decimal} {/ita_tb/dut/inp[0]} {-radix decimal}} /ita_tb/dut/inp +add wave -noupdate -expand -group {All in one Phase} -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o +add wave -noupdate -expand -group {All in one Phase} -radix decimal /ita_tb/dut/inp1 +add wave -noupdate -expand -group {All in one Phase} -radix unsigned /ita_tb/dut/inp1_q add wave -noupdate -radix decimal /ita_tb/dut/i_accumulator/oup_i -add wave -noupdate /ita_tb/dut/i_accumulator/result_d -add wave -noupdate /ita_tb/dut/i_accumulator/result_o -add wave -noupdate /ita_tb/dut/i_activation/data_i +add wave -noupdate -radix decimal -childformat {{{/ita_tb/dut/i_accumulator/result_d[15]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[14]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[13]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[12]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[11]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[10]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[9]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[8]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[7]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[6]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[5]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[4]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[3]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[2]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[1]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_accumulator/result_d[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[0]} {-height 16 -radix decimal}} /ita_tb/dut/i_accumulator/result_d +add wave -noupdate -radix decimal /ita_tb/dut/i_accumulator/result_o +add wave -noupdate -radix decimal -childformat {{{/ita_tb/dut/i_activation/data_i[15]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[14]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[13]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[12]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[11]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[10]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[9]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[8]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[7]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[6]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[5]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[4]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[3]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[2]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[1]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_activation/data_i[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[0]} {-height 16 -radix decimal}} /ita_tb/dut/i_activation/data_i add wave -noupdate /ita_tb/dut/i_activation/data_q1 add wave -noupdate /ita_tb/dut/i_activation/data_q2 add wave -noupdate /ita_tb/dut/i_activation/data_q3 @@ -116,25 +123,27 @@ add wave -noupdate /ita_tb/dut/i_activation/data_o add wave -noupdate /ita_tb/dut/i_fifo/data_i add wave -noupdate /ita_tb/dut/i_fifo/data_o add wave -noupdate /ita_tb/dut/oup_o -add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/rst_ni -add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/mode_i -add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/eps_mult_i -add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/right_shift_i -add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/calc_en_i -add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/calc_en_q_i -add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/result_i -add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/add_i -add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/mult_signed -add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/product -add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/shifted_added -add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/shifted_d -add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/shifted_q -add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/add_q1 -add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/add_q2 -add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/add_q3 -add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/add_q4 -add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_d -add wave -noupdate -expand -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_q +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/clk_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/rst_ni +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mode_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/eps_mult_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/right_shift_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_q_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/result_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_o +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mult_signed +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/product +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_added +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_d +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_q +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q1 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q2 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q3 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q4 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_d +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_q add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/clk_i add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/rst_ni add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ctrl_i @@ -222,93 +231,95 @@ add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_d add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_q add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_d add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_q -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/clk_i -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/rst_ni -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/ctrl_i -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/step_i -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_i -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_i -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/soft_addr_div_o -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/softmax_done_o -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_softmax_fifo_o -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_i -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_inp_o -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_o -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_i -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_i -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_o -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_oup_i -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_en_o -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_addr_o -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_data_i -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_en_o -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_addr_o -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_data_o -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/prev_max_o -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_i -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_o -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_en_o -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_addr_o -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_data_i -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_en_o -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_addr_o -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_data_o -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_x_i -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_i -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_i -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_d -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q1 -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q2 -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q3 -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q4 -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_d -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q1 -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q2 -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q3 -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q4 -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_q -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_d -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_d -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_q -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_d -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_q -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_d -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_q -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_d -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_q -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_d -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_q -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_d -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_q -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_diff -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_d -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_q -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_diff -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp_diff -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q2 -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q3 -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_full -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_empty -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/push_to_fifo -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_from_fifo -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_to_fifo -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_from_fifo -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_usage -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_row -add wave -noupdate -expand -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_col +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/clk_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/rst_ni +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/ctrl_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/step_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/soft_addr_div_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/softmax_done_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_softmax_fifo_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_inp_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_oup_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_data_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_data_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/prev_max_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_data_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_data_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_x_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q3 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q4 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q3 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q4 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_diff +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_diff +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp_diff +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q3 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_full +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_empty +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/push_to_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_from_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_to_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_from_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_usage +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_row +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_col add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/clk_i add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/rst_ni add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_i @@ -334,9 +345,9 @@ add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_q add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_d add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_q TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {3869000 ps} 1} {{Cursor 2} {5124600 ps} 1} {{Cursor 3} {5390600 ps} 1} {{Cursor 4} {5680600 ps} 1} {{Cursor 5} {5920600 ps} 1} {inp1_q {5901000 ps} 1} {{Cursor 7} {5899000 ps} 1} {{Cursor 8} {5897400 ps} 1} {{Cursor 9} {0 ps} 0} {Trace {5106220 ps} 0} -quietly wave cursor active 10 -configure wave -namecolwidth 170 +WaveRestoreCursors {{Cursor 1} {5920600 ps} 1} {{Cursor 2} {5901262 ps} 0} {{Cursor 3} {5899036 ps} 1} {{Cursor 4} {5901000 ps} 1} {{Cursor 5} {5893100 ps} 0} +quietly wave cursor active 2 +configure wave -namecolwidth 183 configure wave -valuecolwidth 100 configure wave -justifyvalue left configure wave -signalnamewidth 1 @@ -350,4 +361,4 @@ configure wave -griddelta 40 configure wave -timeline 0 configure wave -timelineunits ns update -WaveRestoreZoom {5088920 ps} {5143811 ps} +WaveRestoreZoom {5892623 ps} {5911836 ps} From b267458d51714d16f200c6a0e2b1b28e3fb499b0 Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Sun, 1 Dec 2024 20:14:27 +0100 Subject: [PATCH 41/60] Started to add the logic for more than one tile --- PyITA/softmax.py | 8 +- modelsim/sim_ita_tb_wave.tcl | 459 ++++++++++++++++++++++++- modelsim/sim_ita_tb_wave_important.tcl | 266 ++++++++++++-- src/ita_controller.sv | 61 ++-- src/ita_softmax.sv | 71 +++- 5 files changed, 791 insertions(+), 74 deletions(-) diff --git a/PyITA/softmax.py b/PyITA/softmax.py index af55f0d..dae63b7 100644 --- a/PyITA/softmax.py +++ b/PyITA/softmax.py @@ -161,7 +161,7 @@ def streamingPartialSoftmax(x, mask, integerize = True): print(f"Shift without mask: {shift}") # Set shift value so high that 2**8 >> shift gets zero for all masked values - shift[mask_slice] = 16 + shift[mask_slice] = 32 print(f"Shift with mask: {shift}") # # matrix = np.squeeze(shift) # # import matplotlib.pyplot as plt @@ -194,8 +194,7 @@ def streamingPartialSoftmax(x, mask, integerize = True): else: exp_partial_sum_inverse = 1 / exp_partial_sum - # print(exp_partial_sum_inverse.shape) - # print(exp_partial_sum_inverse[0]) + print(f"Exp parital sum inverse: {exp_partial_sum_inverse}") # Find the difference between the maximum and x diff = np.repeat(global_max, seq_length).reshape(n_heads, seq_length, seq_length) - x.astype(np.int32) @@ -210,6 +209,9 @@ def streamingPartialSoftmax(x, mask, integerize = True): shift = np.floor(diff * eps_max + 0.5 + np.finfo(np.float32).eps).astype(np.int32) else: shift = diff * eps_max + + print(f"shift value before return shape: {shift.shape}") + print(f"shift value before return: {shift}") # Calculate the activation value if integerize: diff --git a/modelsim/sim_ita_tb_wave.tcl b/modelsim/sim_ita_tb_wave.tcl index 716f8bd..a9f160c 100644 --- a/modelsim/sim_ita_tb_wave.tcl +++ b/modelsim/sim_ita_tb_wave.tcl @@ -16,9 +16,6 @@ add wave -noupdate /ita_tb/dut/inp1_q add wave -noupdate /ita_tb/dut/inp2_q add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/count_d add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/bias_count -add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_count_q1 -add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_count_q2 -add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_count_q3 add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/max_o add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q @@ -27,8 +24,6 @@ add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radi add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_q add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_d add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_q -add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_q3 -add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_q3 add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/first_outer_dim add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_inp2_mux/clk_i add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/last_inner_tile_q6 @@ -41,8 +36,6 @@ add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q5 add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q6 add wave -noupdate -expand -group {Masking Signals} -expand -group {In Softmax Module} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d add wave -noupdate -expand -group {Masking Signals} -expand -group {In Softmax Module} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 -add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/count_q -add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/i_controller/mask_d add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q1 add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q2 @@ -59,8 +52,19 @@ add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i add wave -noupdate -expand -group {Masking Signals} -radix decimal -childformat {{{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[15]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[14]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[13]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[12]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[11]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[10]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[9]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[8]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[7]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[6]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[5]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[4]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[3]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[2]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[1]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[0]} {-height 16 -radix decimal}} /ita_tb/dut/i_softmax_top/i_softmax/shift_diff add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_controller/step_q +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/count_q +add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/i_controller/mask_d +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_pos_d add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_pos_q add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_col_offset_q +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_d +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_q +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_d +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_q +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/tile_x_d +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/tile_x_q +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/tile_y_d +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/tile_y_q add wave -noupdate /ita_tb/dut/calc_en_q5 add wave -noupdate /ita_tb/dut/calc_en_q6 add wave -noupdate /ita_tb/dut/calc_en_q7 @@ -106,10 +110,16 @@ add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i add wave -noupdate -radix hexadecimal /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q add wave -noupdate /ita_tb/dut/i_requantizer/clk_i add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q +add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_d +add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_q +add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_d +add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_q +add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_d +add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_q add wave -noupdate -radix binary /ita_tb/dut/i_softmax_top/i_softmax/disable_col add wave -noupdate /ita_tb/dut/i_activation/data_q3 add wave -noupdate -radix decimal /ita_tb/dut/inp_i -add wave -noupdate -expand -group {All in one Phase} -radix decimal -childformat {{{/ita_tb/dut/inp[63]} -radix decimal} {{/ita_tb/dut/inp[62]} -radix decimal} {{/ita_tb/dut/inp[61]} -radix decimal} {{/ita_tb/dut/inp[60]} -radix decimal} {{/ita_tb/dut/inp[59]} -radix decimal} {{/ita_tb/dut/inp[58]} -radix decimal} {{/ita_tb/dut/inp[57]} -radix decimal} {{/ita_tb/dut/inp[56]} -radix decimal} {{/ita_tb/dut/inp[55]} -radix decimal} {{/ita_tb/dut/inp[54]} -radix decimal} {{/ita_tb/dut/inp[53]} -radix decimal} {{/ita_tb/dut/inp[52]} -radix decimal} {{/ita_tb/dut/inp[51]} -radix decimal} {{/ita_tb/dut/inp[50]} -radix decimal} {{/ita_tb/dut/inp[49]} -radix decimal} {{/ita_tb/dut/inp[48]} -radix decimal} {{/ita_tb/dut/inp[47]} -radix decimal} {{/ita_tb/dut/inp[46]} -radix decimal} {{/ita_tb/dut/inp[45]} -radix decimal} {{/ita_tb/dut/inp[44]} -radix decimal} {{/ita_tb/dut/inp[43]} -radix decimal} {{/ita_tb/dut/inp[42]} -radix decimal} {{/ita_tb/dut/inp[41]} -radix decimal} {{/ita_tb/dut/inp[40]} -radix decimal} {{/ita_tb/dut/inp[39]} -radix decimal} {{/ita_tb/dut/inp[38]} -radix decimal} {{/ita_tb/dut/inp[37]} -radix decimal} {{/ita_tb/dut/inp[36]} -radix decimal} {{/ita_tb/dut/inp[35]} -radix decimal} {{/ita_tb/dut/inp[34]} -radix decimal} {{/ita_tb/dut/inp[33]} -radix decimal} {{/ita_tb/dut/inp[32]} -radix decimal} {{/ita_tb/dut/inp[31]} -radix decimal} {{/ita_tb/dut/inp[30]} -radix decimal} {{/ita_tb/dut/inp[29]} -radix decimal} {{/ita_tb/dut/inp[28]} -radix decimal} {{/ita_tb/dut/inp[27]} -radix decimal} {{/ita_tb/dut/inp[26]} -radix decimal} {{/ita_tb/dut/inp[25]} -radix decimal} {{/ita_tb/dut/inp[24]} -radix decimal} {{/ita_tb/dut/inp[23]} -radix decimal} {{/ita_tb/dut/inp[22]} -radix decimal} {{/ita_tb/dut/inp[21]} -radix decimal} {{/ita_tb/dut/inp[20]} -radix decimal} {{/ita_tb/dut/inp[19]} -radix decimal} {{/ita_tb/dut/inp[18]} -radix decimal} {{/ita_tb/dut/inp[17]} -radix decimal} {{/ita_tb/dut/inp[16]} -radix decimal} {{/ita_tb/dut/inp[15]} -radix decimal} {{/ita_tb/dut/inp[14]} -radix decimal} {{/ita_tb/dut/inp[13]} -radix decimal} {{/ita_tb/dut/inp[12]} -radix decimal} {{/ita_tb/dut/inp[11]} -radix decimal} {{/ita_tb/dut/inp[10]} -radix decimal} {{/ita_tb/dut/inp[9]} -radix decimal} {{/ita_tb/dut/inp[8]} -radix decimal} {{/ita_tb/dut/inp[7]} -radix decimal} {{/ita_tb/dut/inp[6]} -radix decimal} {{/ita_tb/dut/inp[5]} -radix decimal} {{/ita_tb/dut/inp[4]} -radix decimal} {{/ita_tb/dut/inp[3]} -radix decimal} {{/ita_tb/dut/inp[2]} -radix decimal} {{/ita_tb/dut/inp[1]} -radix decimal} {{/ita_tb/dut/inp[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/inp[63]} {-radix decimal} {/ita_tb/dut/inp[62]} {-radix decimal} {/ita_tb/dut/inp[61]} {-radix decimal} {/ita_tb/dut/inp[60]} {-radix decimal} {/ita_tb/dut/inp[59]} {-radix decimal} {/ita_tb/dut/inp[58]} {-radix decimal} {/ita_tb/dut/inp[57]} {-radix decimal} {/ita_tb/dut/inp[56]} {-radix decimal} {/ita_tb/dut/inp[55]} {-radix decimal} {/ita_tb/dut/inp[54]} {-radix decimal} {/ita_tb/dut/inp[53]} {-radix decimal} {/ita_tb/dut/inp[52]} {-radix decimal} {/ita_tb/dut/inp[51]} {-radix decimal} {/ita_tb/dut/inp[50]} {-radix decimal} {/ita_tb/dut/inp[49]} {-radix decimal} {/ita_tb/dut/inp[48]} {-radix decimal} {/ita_tb/dut/inp[47]} {-radix decimal} {/ita_tb/dut/inp[46]} {-radix decimal} {/ita_tb/dut/inp[45]} {-radix decimal} {/ita_tb/dut/inp[44]} {-radix decimal} {/ita_tb/dut/inp[43]} {-radix decimal} {/ita_tb/dut/inp[42]} {-radix decimal} {/ita_tb/dut/inp[41]} {-radix decimal} {/ita_tb/dut/inp[40]} {-radix decimal} {/ita_tb/dut/inp[39]} {-radix decimal} {/ita_tb/dut/inp[38]} {-radix decimal} {/ita_tb/dut/inp[37]} {-radix decimal} {/ita_tb/dut/inp[36]} {-radix decimal} {/ita_tb/dut/inp[35]} {-radix decimal} {/ita_tb/dut/inp[34]} {-radix decimal} {/ita_tb/dut/inp[33]} {-radix decimal} {/ita_tb/dut/inp[32]} {-radix decimal} {/ita_tb/dut/inp[31]} {-radix decimal} {/ita_tb/dut/inp[30]} {-radix decimal} {/ita_tb/dut/inp[29]} {-radix decimal} {/ita_tb/dut/inp[28]} {-radix decimal} {/ita_tb/dut/inp[27]} {-radix decimal} {/ita_tb/dut/inp[26]} {-radix decimal} {/ita_tb/dut/inp[25]} {-radix decimal} {/ita_tb/dut/inp[24]} {-radix decimal} {/ita_tb/dut/inp[23]} {-radix decimal} {/ita_tb/dut/inp[22]} {-radix decimal} {/ita_tb/dut/inp[21]} {-radix decimal} {/ita_tb/dut/inp[20]} {-radix decimal} {/ita_tb/dut/inp[19]} {-radix decimal} {/ita_tb/dut/inp[18]} {-radix decimal} {/ita_tb/dut/inp[17]} {-radix decimal} {/ita_tb/dut/inp[16]} {-radix decimal} {/ita_tb/dut/inp[15]} {-radix decimal} {/ita_tb/dut/inp[14]} {-radix decimal} {/ita_tb/dut/inp[13]} {-radix decimal} {/ita_tb/dut/inp[12]} {-radix decimal} {/ita_tb/dut/inp[11]} {-radix decimal} {/ita_tb/dut/inp[10]} {-radix decimal} {/ita_tb/dut/inp[9]} {-radix decimal} {/ita_tb/dut/inp[8]} {-radix decimal} {/ita_tb/dut/inp[7]} {-radix decimal} {/ita_tb/dut/inp[6]} {-radix decimal} {/ita_tb/dut/inp[5]} {-radix decimal} {/ita_tb/dut/inp[4]} {-radix decimal} {/ita_tb/dut/inp[3]} {-radix decimal} {/ita_tb/dut/inp[2]} {-radix decimal} {/ita_tb/dut/inp[1]} {-radix decimal} {/ita_tb/dut/inp[0]} {-radix decimal}} /ita_tb/dut/inp +add wave -noupdate -expand -group {All in one Phase} -radix decimal -childformat {{{/ita_tb/dut/inp[63]} -radix decimal} {{/ita_tb/dut/inp[62]} -radix decimal} {{/ita_tb/dut/inp[61]} -radix decimal} {{/ita_tb/dut/inp[60]} -radix decimal} {{/ita_tb/dut/inp[59]} -radix decimal} {{/ita_tb/dut/inp[58]} -radix decimal} {{/ita_tb/dut/inp[57]} -radix decimal} {{/ita_tb/dut/inp[56]} -radix decimal} {{/ita_tb/dut/inp[55]} -radix decimal} {{/ita_tb/dut/inp[54]} -radix decimal} {{/ita_tb/dut/inp[53]} -radix decimal} {{/ita_tb/dut/inp[52]} -radix decimal} {{/ita_tb/dut/inp[51]} -radix decimal} {{/ita_tb/dut/inp[50]} -radix decimal} {{/ita_tb/dut/inp[49]} -radix decimal} {{/ita_tb/dut/inp[48]} -radix decimal} {{/ita_tb/dut/inp[47]} -radix decimal} {{/ita_tb/dut/inp[46]} -radix decimal} {{/ita_tb/dut/inp[45]} -radix decimal} {{/ita_tb/dut/inp[44]} -radix decimal} {{/ita_tb/dut/inp[43]} -radix decimal} {{/ita_tb/dut/inp[42]} -radix decimal} {{/ita_tb/dut/inp[41]} -radix decimal} {{/ita_tb/dut/inp[40]} -radix decimal} {{/ita_tb/dut/inp[39]} -radix decimal} {{/ita_tb/dut/inp[38]} -radix decimal} {{/ita_tb/dut/inp[37]} -radix decimal} {{/ita_tb/dut/inp[36]} -radix decimal} {{/ita_tb/dut/inp[35]} -radix decimal} {{/ita_tb/dut/inp[34]} -radix decimal} {{/ita_tb/dut/inp[33]} -radix decimal} {{/ita_tb/dut/inp[32]} -radix decimal} {{/ita_tb/dut/inp[31]} -radix decimal} {{/ita_tb/dut/inp[30]} -radix decimal} {{/ita_tb/dut/inp[29]} -radix decimal} {{/ita_tb/dut/inp[28]} -radix decimal} {{/ita_tb/dut/inp[27]} -radix decimal} {{/ita_tb/dut/inp[26]} -radix decimal} {{/ita_tb/dut/inp[25]} -radix decimal} {{/ita_tb/dut/inp[24]} -radix decimal} {{/ita_tb/dut/inp[23]} -radix decimal} {{/ita_tb/dut/inp[22]} -radix decimal} {{/ita_tb/dut/inp[21]} -radix decimal} {{/ita_tb/dut/inp[20]} -radix decimal} {{/ita_tb/dut/inp[19]} -radix decimal} {{/ita_tb/dut/inp[18]} -radix decimal} {{/ita_tb/dut/inp[17]} -radix decimal} {{/ita_tb/dut/inp[16]} -radix decimal} {{/ita_tb/dut/inp[15]} -radix decimal} {{/ita_tb/dut/inp[14]} -radix decimal} {{/ita_tb/dut/inp[13]} -radix decimal} {{/ita_tb/dut/inp[12]} -radix decimal} {{/ita_tb/dut/inp[11]} -radix decimal} {{/ita_tb/dut/inp[10]} -radix decimal} {{/ita_tb/dut/inp[9]} -radix decimal} {{/ita_tb/dut/inp[8]} -radix decimal} {{/ita_tb/dut/inp[7]} -radix decimal} {{/ita_tb/dut/inp[6]} -radix decimal} {{/ita_tb/dut/inp[5]} -radix decimal} {{/ita_tb/dut/inp[4]} -radix decimal} {{/ita_tb/dut/inp[3]} -radix decimal} {{/ita_tb/dut/inp[2]} -radix decimal} {{/ita_tb/dut/inp[1]} -radix decimal} {{/ita_tb/dut/inp[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/inp[63]} {-height 16 -radix decimal} {/ita_tb/dut/inp[62]} {-height 16 -radix decimal} {/ita_tb/dut/inp[61]} {-height 16 -radix decimal} {/ita_tb/dut/inp[60]} {-height 16 -radix decimal} {/ita_tb/dut/inp[59]} {-height 16 -radix decimal} {/ita_tb/dut/inp[58]} {-height 16 -radix decimal} {/ita_tb/dut/inp[57]} {-height 16 -radix decimal} {/ita_tb/dut/inp[56]} {-height 16 -radix decimal} {/ita_tb/dut/inp[55]} {-height 16 -radix decimal} {/ita_tb/dut/inp[54]} {-height 16 -radix decimal} {/ita_tb/dut/inp[53]} {-height 16 -radix decimal} {/ita_tb/dut/inp[52]} {-height 16 -radix decimal} {/ita_tb/dut/inp[51]} {-height 16 -radix decimal} {/ita_tb/dut/inp[50]} {-height 16 -radix decimal} {/ita_tb/dut/inp[49]} {-height 16 -radix decimal} {/ita_tb/dut/inp[48]} {-height 16 -radix decimal} {/ita_tb/dut/inp[47]} {-height 16 -radix decimal} {/ita_tb/dut/inp[46]} {-height 16 -radix decimal} {/ita_tb/dut/inp[45]} {-height 16 -radix decimal} {/ita_tb/dut/inp[44]} {-height 16 -radix decimal} {/ita_tb/dut/inp[43]} {-height 16 -radix decimal} {/ita_tb/dut/inp[42]} {-height 16 -radix decimal} {/ita_tb/dut/inp[41]} {-height 16 -radix decimal} {/ita_tb/dut/inp[40]} {-height 16 -radix decimal} {/ita_tb/dut/inp[39]} {-height 16 -radix decimal} {/ita_tb/dut/inp[38]} {-height 16 -radix decimal} {/ita_tb/dut/inp[37]} {-height 16 -radix decimal} {/ita_tb/dut/inp[36]} {-height 16 -radix decimal} {/ita_tb/dut/inp[35]} {-height 16 -radix decimal} {/ita_tb/dut/inp[34]} {-height 16 -radix decimal} {/ita_tb/dut/inp[33]} {-height 16 -radix decimal} {/ita_tb/dut/inp[32]} {-height 16 -radix decimal} {/ita_tb/dut/inp[31]} {-height 16 -radix decimal} {/ita_tb/dut/inp[30]} {-height 16 -radix decimal} {/ita_tb/dut/inp[29]} {-height 16 -radix decimal} {/ita_tb/dut/inp[28]} {-height 16 -radix decimal} {/ita_tb/dut/inp[27]} {-height 16 -radix decimal} {/ita_tb/dut/inp[26]} {-height 16 -radix decimal} {/ita_tb/dut/inp[25]} {-height 16 -radix decimal} {/ita_tb/dut/inp[24]} {-height 16 -radix decimal} {/ita_tb/dut/inp[23]} {-height 16 -radix decimal} {/ita_tb/dut/inp[22]} {-height 16 -radix decimal} {/ita_tb/dut/inp[21]} {-height 16 -radix decimal} {/ita_tb/dut/inp[20]} {-height 16 -radix decimal} {/ita_tb/dut/inp[19]} {-height 16 -radix decimal} {/ita_tb/dut/inp[18]} {-height 16 -radix decimal} {/ita_tb/dut/inp[17]} {-height 16 -radix decimal} {/ita_tb/dut/inp[16]} {-height 16 -radix decimal} {/ita_tb/dut/inp[15]} {-height 16 -radix decimal} {/ita_tb/dut/inp[14]} {-height 16 -radix decimal} {/ita_tb/dut/inp[13]} {-height 16 -radix decimal} {/ita_tb/dut/inp[12]} {-height 16 -radix decimal} {/ita_tb/dut/inp[11]} {-height 16 -radix decimal} {/ita_tb/dut/inp[10]} {-height 16 -radix decimal} {/ita_tb/dut/inp[9]} {-height 16 -radix decimal} {/ita_tb/dut/inp[8]} {-height 16 -radix decimal} {/ita_tb/dut/inp[7]} {-height 16 -radix decimal} {/ita_tb/dut/inp[6]} {-height 16 -radix decimal} {/ita_tb/dut/inp[5]} {-height 16 -radix decimal} {/ita_tb/dut/inp[4]} {-height 16 -radix decimal} {/ita_tb/dut/inp[3]} {-height 16 -radix decimal} {/ita_tb/dut/inp[2]} {-height 16 -radix decimal} {/ita_tb/dut/inp[1]} {-height 16 -radix decimal} {/ita_tb/dut/inp[0]} {-height 16 -radix decimal}} /ita_tb/dut/inp add wave -noupdate -expand -group {All in one Phase} -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o add wave -noupdate -expand -group {All in one Phase} -radix decimal /ita_tb/dut/inp1 add wave -noupdate -expand -group {All in one Phase} -radix unsigned /ita_tb/dut/inp1_q @@ -125,6 +135,439 @@ add wave -noupdate /ita_tb/dut/i_activation/data_o add wave -noupdate /ita_tb/dut/i_fifo/data_i add wave -noupdate /ita_tb/dut/i_fifo/data_o add wave -noupdate /ita_tb/dut/oup_o +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/clk_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/rst_ni +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mode_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/eps_mult_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/right_shift_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_q_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/result_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_o +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mult_signed +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/product +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_added +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_d +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_q +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q1 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q2 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q3 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q4 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_d +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_q +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/clk_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/rst_ni +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mode_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/eps_mult_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/right_shift_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_q_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/result_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_o +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mult_signed +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/product +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_added +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_d +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_q +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q1 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q2 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q3 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q4 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_d +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/clk_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/rst_ni +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ctrl_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_ready_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_ready_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_ready_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_ready_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/pop_softmax_fifo_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/soft_addr_div_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_done_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_inner_tile_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_inner_tile_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_pad_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_q1_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/count_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/count_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_count +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_padded +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_time +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_dim +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_fifo +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/clk_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/rst_ni +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ctrl_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_ready_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_ready_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_ready_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_ready_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/pop_softmax_fifo_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/soft_addr_div_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_done_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_inner_tile_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_inner_tile_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_pad_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_q1_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/count_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/count_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_count +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_padded +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_time +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_dim +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_fifo +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/clk_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/rst_ni +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/ctrl_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/step_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/soft_addr_div_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/softmax_done_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_softmax_fifo_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_inp_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_oup_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_data_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_data_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/prev_max_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_data_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_data_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_x_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q3 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q4 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q3 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q4 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_diff +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_diff +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp_diff +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q3 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_full +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_empty +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/push_to_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_from_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_to_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_from_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_usage +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_row +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_col +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/clk_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/rst_ni +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/ctrl_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/step_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/soft_addr_div_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/softmax_done_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_softmax_fifo_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_inp_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_oup_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_data_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_data_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/prev_max_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_data_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_data_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_x_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q3 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q4 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q3 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q4 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_x_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_diff +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_diff +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp_diff +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q3 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_full +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_empty +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/push_to_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_from_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_to_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_from_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_usage +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_row +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_col +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/clk_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/rst_ni +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_q_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_q_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_q_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/oup_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/inp_bias_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_o +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_en +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data_unused +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_en +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_data +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_d +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_q +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_d +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_q +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_d +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_q +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/clk_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/rst_ni +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_q_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_q_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_q_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/oup_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/inp_bias_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_o +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_en +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data_unused +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_en +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_data +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_d +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_q +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_d +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_q +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_d +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_q add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/* add wave -expand -group Controller /ita_tb/dut/i_controller/* add wave -group {Softmax Controller} ita_tb/dut/i_softmax_top/i_softmax/* diff --git a/modelsim/sim_ita_tb_wave_important.tcl b/modelsim/sim_ita_tb_wave_important.tcl index 7633c3d..0d78b45 100644 --- a/modelsim/sim_ita_tb_wave_important.tcl +++ b/modelsim/sim_ita_tb_wave_important.tcl @@ -14,9 +14,6 @@ add wave -noupdate /ita_tb/dut/inp1_q add wave -noupdate /ita_tb/dut/inp2_q add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/count_d add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/bias_count -add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_count_q1 -add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_count_q2 -add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_count_q3 add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/max_o add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q @@ -25,8 +22,6 @@ add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radi add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_q add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_d add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_q -add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_q3 -add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_q3 add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/first_outer_dim add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_inp2_mux/clk_i add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/last_inner_tile_q6 @@ -39,8 +34,6 @@ add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q5 add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q6 add wave -noupdate -expand -group {Masking Signals} -expand -group {In Softmax Module} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d add wave -noupdate -expand -group {Masking Signals} -expand -group {In Softmax Module} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 -add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/count_q -add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/i_controller/mask_d add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q1 add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q2 @@ -57,8 +50,19 @@ add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i add wave -noupdate -expand -group {Masking Signals} -radix decimal -childformat {{{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[15]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[14]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[13]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[12]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[11]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[10]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[9]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[8]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[7]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[6]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[5]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[4]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[3]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[2]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[1]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[0]} {-height 16 -radix decimal}} /ita_tb/dut/i_softmax_top/i_softmax/shift_diff add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_controller/step_q +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/count_q +add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/i_controller/mask_d +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_pos_d add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_pos_q add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_col_offset_q +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_d +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_q +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_d +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_q +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/tile_x_d +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/tile_x_q +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/tile_y_d +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/tile_y_q add wave -noupdate /ita_tb/dut/calc_en_q5 add wave -noupdate /ita_tb/dut/calc_en_q6 add wave -noupdate /ita_tb/dut/calc_en_q7 @@ -104,10 +108,16 @@ add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i add wave -noupdate -radix hexadecimal /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q add wave -noupdate /ita_tb/dut/i_requantizer/clk_i add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q +add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_d +add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_q +add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_d +add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_q +add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_d +add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_q add wave -noupdate -radix binary /ita_tb/dut/i_softmax_top/i_softmax/disable_col add wave -noupdate /ita_tb/dut/i_activation/data_q3 add wave -noupdate -radix decimal /ita_tb/dut/inp_i -add wave -noupdate -expand -group {All in one Phase} -radix decimal -childformat {{{/ita_tb/dut/inp[63]} -radix decimal} {{/ita_tb/dut/inp[62]} -radix decimal} {{/ita_tb/dut/inp[61]} -radix decimal} {{/ita_tb/dut/inp[60]} -radix decimal} {{/ita_tb/dut/inp[59]} -radix decimal} {{/ita_tb/dut/inp[58]} -radix decimal} {{/ita_tb/dut/inp[57]} -radix decimal} {{/ita_tb/dut/inp[56]} -radix decimal} {{/ita_tb/dut/inp[55]} -radix decimal} {{/ita_tb/dut/inp[54]} -radix decimal} {{/ita_tb/dut/inp[53]} -radix decimal} {{/ita_tb/dut/inp[52]} -radix decimal} {{/ita_tb/dut/inp[51]} -radix decimal} {{/ita_tb/dut/inp[50]} -radix decimal} {{/ita_tb/dut/inp[49]} -radix decimal} {{/ita_tb/dut/inp[48]} -radix decimal} {{/ita_tb/dut/inp[47]} -radix decimal} {{/ita_tb/dut/inp[46]} -radix decimal} {{/ita_tb/dut/inp[45]} -radix decimal} {{/ita_tb/dut/inp[44]} -radix decimal} {{/ita_tb/dut/inp[43]} -radix decimal} {{/ita_tb/dut/inp[42]} -radix decimal} {{/ita_tb/dut/inp[41]} -radix decimal} {{/ita_tb/dut/inp[40]} -radix decimal} {{/ita_tb/dut/inp[39]} -radix decimal} {{/ita_tb/dut/inp[38]} -radix decimal} {{/ita_tb/dut/inp[37]} -radix decimal} {{/ita_tb/dut/inp[36]} -radix decimal} {{/ita_tb/dut/inp[35]} -radix decimal} {{/ita_tb/dut/inp[34]} -radix decimal} {{/ita_tb/dut/inp[33]} -radix decimal} {{/ita_tb/dut/inp[32]} -radix decimal} {{/ita_tb/dut/inp[31]} -radix decimal} {{/ita_tb/dut/inp[30]} -radix decimal} {{/ita_tb/dut/inp[29]} -radix decimal} {{/ita_tb/dut/inp[28]} -radix decimal} {{/ita_tb/dut/inp[27]} -radix decimal} {{/ita_tb/dut/inp[26]} -radix decimal} {{/ita_tb/dut/inp[25]} -radix decimal} {{/ita_tb/dut/inp[24]} -radix decimal} {{/ita_tb/dut/inp[23]} -radix decimal} {{/ita_tb/dut/inp[22]} -radix decimal} {{/ita_tb/dut/inp[21]} -radix decimal} {{/ita_tb/dut/inp[20]} -radix decimal} {{/ita_tb/dut/inp[19]} -radix decimal} {{/ita_tb/dut/inp[18]} -radix decimal} {{/ita_tb/dut/inp[17]} -radix decimal} {{/ita_tb/dut/inp[16]} -radix decimal} {{/ita_tb/dut/inp[15]} -radix decimal} {{/ita_tb/dut/inp[14]} -radix decimal} {{/ita_tb/dut/inp[13]} -radix decimal} {{/ita_tb/dut/inp[12]} -radix decimal} {{/ita_tb/dut/inp[11]} -radix decimal} {{/ita_tb/dut/inp[10]} -radix decimal} {{/ita_tb/dut/inp[9]} -radix decimal} {{/ita_tb/dut/inp[8]} -radix decimal} {{/ita_tb/dut/inp[7]} -radix decimal} {{/ita_tb/dut/inp[6]} -radix decimal} {{/ita_tb/dut/inp[5]} -radix decimal} {{/ita_tb/dut/inp[4]} -radix decimal} {{/ita_tb/dut/inp[3]} -radix decimal} {{/ita_tb/dut/inp[2]} -radix decimal} {{/ita_tb/dut/inp[1]} -radix decimal} {{/ita_tb/dut/inp[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/inp[63]} {-radix decimal} {/ita_tb/dut/inp[62]} {-radix decimal} {/ita_tb/dut/inp[61]} {-radix decimal} {/ita_tb/dut/inp[60]} {-radix decimal} {/ita_tb/dut/inp[59]} {-radix decimal} {/ita_tb/dut/inp[58]} {-radix decimal} {/ita_tb/dut/inp[57]} {-radix decimal} {/ita_tb/dut/inp[56]} {-radix decimal} {/ita_tb/dut/inp[55]} {-radix decimal} {/ita_tb/dut/inp[54]} {-radix decimal} {/ita_tb/dut/inp[53]} {-radix decimal} {/ita_tb/dut/inp[52]} {-radix decimal} {/ita_tb/dut/inp[51]} {-radix decimal} {/ita_tb/dut/inp[50]} {-radix decimal} {/ita_tb/dut/inp[49]} {-radix decimal} {/ita_tb/dut/inp[48]} {-radix decimal} {/ita_tb/dut/inp[47]} {-radix decimal} {/ita_tb/dut/inp[46]} {-radix decimal} {/ita_tb/dut/inp[45]} {-radix decimal} {/ita_tb/dut/inp[44]} {-radix decimal} {/ita_tb/dut/inp[43]} {-radix decimal} {/ita_tb/dut/inp[42]} {-radix decimal} {/ita_tb/dut/inp[41]} {-radix decimal} {/ita_tb/dut/inp[40]} {-radix decimal} {/ita_tb/dut/inp[39]} {-radix decimal} {/ita_tb/dut/inp[38]} {-radix decimal} {/ita_tb/dut/inp[37]} {-radix decimal} {/ita_tb/dut/inp[36]} {-radix decimal} {/ita_tb/dut/inp[35]} {-radix decimal} {/ita_tb/dut/inp[34]} {-radix decimal} {/ita_tb/dut/inp[33]} {-radix decimal} {/ita_tb/dut/inp[32]} {-radix decimal} {/ita_tb/dut/inp[31]} {-radix decimal} {/ita_tb/dut/inp[30]} {-radix decimal} {/ita_tb/dut/inp[29]} {-radix decimal} {/ita_tb/dut/inp[28]} {-radix decimal} {/ita_tb/dut/inp[27]} {-radix decimal} {/ita_tb/dut/inp[26]} {-radix decimal} {/ita_tb/dut/inp[25]} {-radix decimal} {/ita_tb/dut/inp[24]} {-radix decimal} {/ita_tb/dut/inp[23]} {-radix decimal} {/ita_tb/dut/inp[22]} {-radix decimal} {/ita_tb/dut/inp[21]} {-radix decimal} {/ita_tb/dut/inp[20]} {-radix decimal} {/ita_tb/dut/inp[19]} {-radix decimal} {/ita_tb/dut/inp[18]} {-radix decimal} {/ita_tb/dut/inp[17]} {-radix decimal} {/ita_tb/dut/inp[16]} {-radix decimal} {/ita_tb/dut/inp[15]} {-radix decimal} {/ita_tb/dut/inp[14]} {-radix decimal} {/ita_tb/dut/inp[13]} {-radix decimal} {/ita_tb/dut/inp[12]} {-radix decimal} {/ita_tb/dut/inp[11]} {-radix decimal} {/ita_tb/dut/inp[10]} {-radix decimal} {/ita_tb/dut/inp[9]} {-radix decimal} {/ita_tb/dut/inp[8]} {-radix decimal} {/ita_tb/dut/inp[7]} {-radix decimal} {/ita_tb/dut/inp[6]} {-radix decimal} {/ita_tb/dut/inp[5]} {-radix decimal} {/ita_tb/dut/inp[4]} {-radix decimal} {/ita_tb/dut/inp[3]} {-radix decimal} {/ita_tb/dut/inp[2]} {-radix decimal} {/ita_tb/dut/inp[1]} {-radix decimal} {/ita_tb/dut/inp[0]} {-radix decimal}} /ita_tb/dut/inp +add wave -noupdate -expand -group {All in one Phase} -radix decimal -childformat {{{/ita_tb/dut/inp[63]} -radix decimal} {{/ita_tb/dut/inp[62]} -radix decimal} {{/ita_tb/dut/inp[61]} -radix decimal} {{/ita_tb/dut/inp[60]} -radix decimal} {{/ita_tb/dut/inp[59]} -radix decimal} {{/ita_tb/dut/inp[58]} -radix decimal} {{/ita_tb/dut/inp[57]} -radix decimal} {{/ita_tb/dut/inp[56]} -radix decimal} {{/ita_tb/dut/inp[55]} -radix decimal} {{/ita_tb/dut/inp[54]} -radix decimal} {{/ita_tb/dut/inp[53]} -radix decimal} {{/ita_tb/dut/inp[52]} -radix decimal} {{/ita_tb/dut/inp[51]} -radix decimal} {{/ita_tb/dut/inp[50]} -radix decimal} {{/ita_tb/dut/inp[49]} -radix decimal} {{/ita_tb/dut/inp[48]} -radix decimal} {{/ita_tb/dut/inp[47]} -radix decimal} {{/ita_tb/dut/inp[46]} -radix decimal} {{/ita_tb/dut/inp[45]} -radix decimal} {{/ita_tb/dut/inp[44]} -radix decimal} {{/ita_tb/dut/inp[43]} -radix decimal} {{/ita_tb/dut/inp[42]} -radix decimal} {{/ita_tb/dut/inp[41]} -radix decimal} {{/ita_tb/dut/inp[40]} -radix decimal} {{/ita_tb/dut/inp[39]} -radix decimal} {{/ita_tb/dut/inp[38]} -radix decimal} {{/ita_tb/dut/inp[37]} -radix decimal} {{/ita_tb/dut/inp[36]} -radix decimal} {{/ita_tb/dut/inp[35]} -radix decimal} {{/ita_tb/dut/inp[34]} -radix decimal} {{/ita_tb/dut/inp[33]} -radix decimal} {{/ita_tb/dut/inp[32]} -radix decimal} {{/ita_tb/dut/inp[31]} -radix decimal} {{/ita_tb/dut/inp[30]} -radix decimal} {{/ita_tb/dut/inp[29]} -radix decimal} {{/ita_tb/dut/inp[28]} -radix decimal} {{/ita_tb/dut/inp[27]} -radix decimal} {{/ita_tb/dut/inp[26]} -radix decimal} {{/ita_tb/dut/inp[25]} -radix decimal} {{/ita_tb/dut/inp[24]} -radix decimal} {{/ita_tb/dut/inp[23]} -radix decimal} {{/ita_tb/dut/inp[22]} -radix decimal} {{/ita_tb/dut/inp[21]} -radix decimal} {{/ita_tb/dut/inp[20]} -radix decimal} {{/ita_tb/dut/inp[19]} -radix decimal} {{/ita_tb/dut/inp[18]} -radix decimal} {{/ita_tb/dut/inp[17]} -radix decimal} {{/ita_tb/dut/inp[16]} -radix decimal} {{/ita_tb/dut/inp[15]} -radix decimal} {{/ita_tb/dut/inp[14]} -radix decimal} {{/ita_tb/dut/inp[13]} -radix decimal} {{/ita_tb/dut/inp[12]} -radix decimal} {{/ita_tb/dut/inp[11]} -radix decimal} {{/ita_tb/dut/inp[10]} -radix decimal} {{/ita_tb/dut/inp[9]} -radix decimal} {{/ita_tb/dut/inp[8]} -radix decimal} {{/ita_tb/dut/inp[7]} -radix decimal} {{/ita_tb/dut/inp[6]} -radix decimal} {{/ita_tb/dut/inp[5]} -radix decimal} {{/ita_tb/dut/inp[4]} -radix decimal} {{/ita_tb/dut/inp[3]} -radix decimal} {{/ita_tb/dut/inp[2]} -radix decimal} {{/ita_tb/dut/inp[1]} -radix decimal} {{/ita_tb/dut/inp[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/inp[63]} {-height 16 -radix decimal} {/ita_tb/dut/inp[62]} {-height 16 -radix decimal} {/ita_tb/dut/inp[61]} {-height 16 -radix decimal} {/ita_tb/dut/inp[60]} {-height 16 -radix decimal} {/ita_tb/dut/inp[59]} {-height 16 -radix decimal} {/ita_tb/dut/inp[58]} {-height 16 -radix decimal} {/ita_tb/dut/inp[57]} {-height 16 -radix decimal} {/ita_tb/dut/inp[56]} {-height 16 -radix decimal} {/ita_tb/dut/inp[55]} {-height 16 -radix decimal} {/ita_tb/dut/inp[54]} {-height 16 -radix decimal} {/ita_tb/dut/inp[53]} {-height 16 -radix decimal} {/ita_tb/dut/inp[52]} {-height 16 -radix decimal} {/ita_tb/dut/inp[51]} {-height 16 -radix decimal} {/ita_tb/dut/inp[50]} {-height 16 -radix decimal} {/ita_tb/dut/inp[49]} {-height 16 -radix decimal} {/ita_tb/dut/inp[48]} {-height 16 -radix decimal} {/ita_tb/dut/inp[47]} {-height 16 -radix decimal} {/ita_tb/dut/inp[46]} {-height 16 -radix decimal} {/ita_tb/dut/inp[45]} {-height 16 -radix decimal} {/ita_tb/dut/inp[44]} {-height 16 -radix decimal} {/ita_tb/dut/inp[43]} {-height 16 -radix decimal} {/ita_tb/dut/inp[42]} {-height 16 -radix decimal} {/ita_tb/dut/inp[41]} {-height 16 -radix decimal} {/ita_tb/dut/inp[40]} {-height 16 -radix decimal} {/ita_tb/dut/inp[39]} {-height 16 -radix decimal} {/ita_tb/dut/inp[38]} {-height 16 -radix decimal} {/ita_tb/dut/inp[37]} {-height 16 -radix decimal} {/ita_tb/dut/inp[36]} {-height 16 -radix decimal} {/ita_tb/dut/inp[35]} {-height 16 -radix decimal} {/ita_tb/dut/inp[34]} {-height 16 -radix decimal} {/ita_tb/dut/inp[33]} {-height 16 -radix decimal} {/ita_tb/dut/inp[32]} {-height 16 -radix decimal} {/ita_tb/dut/inp[31]} {-height 16 -radix decimal} {/ita_tb/dut/inp[30]} {-height 16 -radix decimal} {/ita_tb/dut/inp[29]} {-height 16 -radix decimal} {/ita_tb/dut/inp[28]} {-height 16 -radix decimal} {/ita_tb/dut/inp[27]} {-height 16 -radix decimal} {/ita_tb/dut/inp[26]} {-height 16 -radix decimal} {/ita_tb/dut/inp[25]} {-height 16 -radix decimal} {/ita_tb/dut/inp[24]} {-height 16 -radix decimal} {/ita_tb/dut/inp[23]} {-height 16 -radix decimal} {/ita_tb/dut/inp[22]} {-height 16 -radix decimal} {/ita_tb/dut/inp[21]} {-height 16 -radix decimal} {/ita_tb/dut/inp[20]} {-height 16 -radix decimal} {/ita_tb/dut/inp[19]} {-height 16 -radix decimal} {/ita_tb/dut/inp[18]} {-height 16 -radix decimal} {/ita_tb/dut/inp[17]} {-height 16 -radix decimal} {/ita_tb/dut/inp[16]} {-height 16 -radix decimal} {/ita_tb/dut/inp[15]} {-height 16 -radix decimal} {/ita_tb/dut/inp[14]} {-height 16 -radix decimal} {/ita_tb/dut/inp[13]} {-height 16 -radix decimal} {/ita_tb/dut/inp[12]} {-height 16 -radix decimal} {/ita_tb/dut/inp[11]} {-height 16 -radix decimal} {/ita_tb/dut/inp[10]} {-height 16 -radix decimal} {/ita_tb/dut/inp[9]} {-height 16 -radix decimal} {/ita_tb/dut/inp[8]} {-height 16 -radix decimal} {/ita_tb/dut/inp[7]} {-height 16 -radix decimal} {/ita_tb/dut/inp[6]} {-height 16 -radix decimal} {/ita_tb/dut/inp[5]} {-height 16 -radix decimal} {/ita_tb/dut/inp[4]} {-height 16 -radix decimal} {/ita_tb/dut/inp[3]} {-height 16 -radix decimal} {/ita_tb/dut/inp[2]} {-height 16 -radix decimal} {/ita_tb/dut/inp[1]} {-height 16 -radix decimal} {/ita_tb/dut/inp[0]} {-height 16 -radix decimal}} /ita_tb/dut/inp add wave -noupdate -expand -group {All in one Phase} -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o add wave -noupdate -expand -group {All in one Phase} -radix decimal /ita_tb/dut/inp1 add wave -noupdate -expand -group {All in one Phase} -radix unsigned /ita_tb/dut/inp1_q @@ -144,6 +154,106 @@ add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q3 add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q4 add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_d add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_q +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/clk_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/rst_ni +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mode_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/eps_mult_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/right_shift_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_q_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/result_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_o +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mult_signed +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/product +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_added +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_d +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_q +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q1 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q2 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q3 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q4 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_d +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/clk_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/rst_ni +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ctrl_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_ready_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_ready_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_ready_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_ready_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/pop_softmax_fifo_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/soft_addr_div_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_done_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_inner_tile_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_inner_tile_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_pad_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_q1_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/count_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/count_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_count +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_padded +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_time +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_dim +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_fifo +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_q add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/clk_i add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/rst_ni add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ctrl_i @@ -181,10 +291,6 @@ add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_d add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_q add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_d add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_count_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_count_q1 -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_count_q2 -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_count_q3 add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_d add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_q add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_d @@ -196,15 +302,11 @@ add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_ add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_d add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_q add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_q1 -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_q2 -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_q3 +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_q add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_d add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_q add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_q1 -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_q2 -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_q3 +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_q add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_d add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_q add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_d @@ -320,6 +422,126 @@ add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softm add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_row add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_col +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/clk_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/rst_ni +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/ctrl_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/step_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/soft_addr_div_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/softmax_done_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_softmax_fifo_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_inp_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_oup_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_data_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_data_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/prev_max_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_data_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_data_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_x_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q3 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q4 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q3 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q4 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_x_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_diff +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_diff +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp_diff +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q3 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_full +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_empty +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/push_to_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_from_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_to_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_from_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_usage +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_row +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_col +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/clk_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/rst_ni +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_q_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_q_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_q_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/oup_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/inp_bias_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_o +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_en +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data_unused +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_en +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_data +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_d +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_q +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_d +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_q +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_d +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_q add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/clk_i add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/rst_ni add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_i @@ -345,9 +567,9 @@ add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_q add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_d add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_q TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {5920600 ps} 1} {{Cursor 2} {5901262 ps} 0} {{Cursor 3} {5899036 ps} 1} {{Cursor 4} {5901000 ps} 1} {{Cursor 5} {5893100 ps} 0} -quietly wave cursor active 2 -configure wave -namecolwidth 183 +WaveRestoreCursors {{Cursor 1} {10268600 ps} 1} +quietly wave cursor active 1 +configure wave -namecolwidth 150 configure wave -valuecolwidth 100 configure wave -justifyvalue left configure wave -signalnamewidth 1 @@ -361,4 +583,4 @@ configure wave -griddelta 40 configure wave -timeline 0 configure wave -timelineunits ns update -WaveRestoreZoom {5892623 ps} {5911836 ps} +WaveRestoreZoom {0 ps} {23757930 ps} diff --git a/src/ita_controller.sv b/src/ita_controller.sv index 4b2965b..63e7c11 100644 --- a/src/ita_controller.sv +++ b/src/ita_controller.sv @@ -44,13 +44,12 @@ module ita_controller counter_t count_d, count_q, bias_count; counter_t mask_pos_d, mask_pos_q; logic [3:0] mask_col_offset_d, mask_col_offset_q; - counter_t mask_count_d, mask_count_q1, mask_count_q2, mask_count_q3; counter_t tile_d, tile_q; counter_t inner_tile_d, inner_tile_q; counter_t mask_tile_x_pos_d, mask_tile_x_pos_q; counter_t mask_tile_y_pos_d, mask_tile_y_pos_q; - counter_t tile_x_d, tile_x_q, bias_tile_x_d, bias_tile_x_q1, bias_tile_x_q2, mask_tile_x_q3; - counter_t tile_y_d, tile_y_q, bias_tile_y_d, bias_tile_y_q1, bias_tile_y_q2, mask_tile_y_q3; + counter_t tile_x_d, tile_x_q, bias_tile_x_d, bias_tile_x_q; + counter_t tile_y_d, tile_y_q, bias_tile_y_d, bias_tile_y_q; counter_t softmax_tile_d, softmax_tile_q; ongoing_t ongoing_d, ongoing_q; ongoing_soft_t ongoing_soft_d, ongoing_soft_q; @@ -364,11 +363,10 @@ module ita_controller inp_bias = inp_bias_i; requant_add_d = requant_add; bias_count = (count_q == 0) ? 255 : count_q - 1; - bias_tile_x_d = (count_q == 0) ? bias_tile_x_q1 : tile_x_q; - bias_tile_y_d = (count_q == 0) ? bias_tile_y_q1 : tile_y_q; + bias_tile_x_d = (count_q == 0) ? bias_tile_x_q : tile_x_q; + bias_tile_y_d = (count_q == 0) ? bias_tile_y_q : tile_y_q; first_outer_dim_d = (count_q == 0) ? first_outer_dim_q : first_outer_dim; second_outer_dim_d = (count_q == 0) ? second_outer_dim_q : second_outer_dim; - mask_count_d = bias_count; if ((step_q != Idle && step_q != MatMul) || (step_q == Idle && bias_count == 255)) begin if (inner_tile_q == inner_tile_dim) begin @@ -416,13 +414,18 @@ module ita_controller // end else begin // mask_tile_x_pos_d = mask_tile_x_pos_q; // end + - // if (mask_tile_x_q3 == mask_tile_x_pos_q && mask_tile_y_q3 == mask_tile_y_pos_q) begin + if (mask_tile_x_pos_q == tile_x_q && mask_tile_y_pos_q == tile_y_q) begin + if (count_q == ((M*M/N)-1)) begin + mask_tile_x_pos_d = mask_tile_x_pos_q + 1'b1; + end if ((count_q >= mask_pos_q) && (count_q < (mask_pos_q + N))) begin - // if ((count_q & (M-1)) == 6'd63) begin - // mask_tile_y_pos_d = mask_tile_y_pos_q + 1'b1; - // mask_pos_d = (count_q + ((7*M) + 1)) & ((M*M/N)-1); - // end else + if ((count_q & (M-1)) == (M-1)) begin + mask_tile_y_pos_d = tile_y_q + 1'b1; + mask_tile_x_pos_d = tile_x_q; + mask_pos_d = (count_q + ((7*M) + 1)) & ((M*M/N)-1); + end if (((count_q + mask_col_offset_q) & (N-1)) == (N-1)) begin mask_pos_d = (mask_pos_q + (N - ((mask_pos_q + mask_col_offset_q) & (N-1))) + M) & ((M*M/N)-1); end @@ -442,6 +445,10 @@ module ita_controller mask_d[i] = 1'b0; end end + end else if (mask_tile_x_pos_q == tile_x_q && mask_tile_y_pos_q != tile_y_q) begin + for (int i = 0; i < N; i++) begin + mask_d[i] = 1'b1; + end // end else if (mask_tile_x_q3 == mask_tile_x_pos_q && mask_tile_y_q3 != mask_tile_y_pos_q) begin // for (int i = 0; i < N; i++) begin // mask_d[i] = 1'b1; @@ -450,7 +457,11 @@ module ita_controller // for (int i = 0; i < N; i++) begin // mask_d[i] = 1'b0; // end - // end + end else if (mask_tile_x_pos_q != tile_x_q && mask_tile_y_pos_q == tile_y_q) begin + for (int i = 0; i < N; i++) begin + mask_d[i] = 1'b0; + end + end end end LowerTriangular: begin @@ -488,19 +499,12 @@ module ita_controller softmax_div_done_q <= 1'b0; requant_add_q <= '0; busy_q <= 1'b0; - bias_tile_x_q1 <= '0; - bias_tile_x_q2 <= '0; - mask_tile_x_q3 <= '0; - bias_tile_y_q1 <= '0; - bias_tile_y_q2 <= '0; - mask_tile_y_q3 <= '0; + bias_tile_x_q <= '0; + bias_tile_y_q <= '0; first_outer_dim_q <= '0; second_outer_dim_q <= '0; mask_pos_q <= '0; mask_col_offset_q <= '0; - mask_count_q1 <= '0; - mask_count_q2 <= '0; - mask_count_q3 <= '0; mask_tile_x_pos_q <= '0; mask_tile_y_pos_q <= '0; mask_q <= '0; @@ -517,24 +521,17 @@ module ita_controller softmax_div_done_q <= softmax_div_done_d; requant_add_q <= requant_add_d; busy_q <= busy_d; - bias_tile_x_q1 <= bias_tile_x_d; - bias_tile_x_q2 <= bias_tile_x_q1; - mask_tile_x_q3 <= bias_tile_x_q2; - bias_tile_y_q1 <= bias_tile_y_d; - bias_tile_y_q2 <= bias_tile_y_q1; - mask_tile_y_q3 <= bias_tile_y_q2; + bias_tile_x_q <= bias_tile_x_d; + bias_tile_y_q <= bias_tile_y_d; first_outer_dim_q <= first_outer_dim_d; second_outer_dim_q <= second_outer_dim_d; if (calc_en_o) begin mask_pos_q <= mask_pos_d; mask_q <= mask_d; + mask_tile_x_pos_q <= mask_tile_x_pos_d; + mask_tile_y_pos_q <= mask_tile_y_pos_d; end mask_col_offset_q <= mask_col_offset_d; - mask_count_q1 <= mask_count_d; - mask_count_q2 <= mask_count_q1; - mask_count_q3 <= mask_count_q2; - mask_tile_x_pos_q <= mask_tile_x_pos_d; - mask_tile_y_pos_q <= mask_tile_y_pos_d; end end endmodule diff --git a/src/ita_softmax.sv b/src/ita_softmax.sv index f8a838c..68b7b53 100644 --- a/src/ita_softmax.sv +++ b/src/ita_softmax.sv @@ -49,7 +49,9 @@ module ita_softmax counter_t tile_d, tile_q1, tile_q2, tile_q3, tile_q4; counter_t count_d, count_q1, count_q2, count_q3, count_q4; counter_t inner_tile_q; - counter_t tile_y_q; + counter_t tile_x_q, tile_y_q; + counter_t mask_tile_x_d, mask_tile_x_q, mask_tile_y_d, mask_tile_y_q; + counter_t mask_tile_d, mask_tile_q; logic unsigned [SoftmaxAccDataWidth-1:0] exp_sum_d, exp_sum_q; counter_t count_soft_d, count_soft_q1, count_soft_q2, count_soft_mask_q; @@ -121,6 +123,10 @@ module ita_softmax shift_inp_diff = '0; inp_stream_soft_o = '0; softmax_done_o = 0; + mask_tile_x_d = mask_tile_x_q; + mask_tile_y_d = mask_tile_y_q; + mask_tile_d = mask_tile_q; + //************ Accumulation ************// case (step_i) @@ -241,18 +247,57 @@ module ita_softmax end end if (calc_stream_soft_en_q) begin + if (count_soft_mask_q == (((M*M)/N)-1)) begin + mask_tile_d = mask_tile_q + 1; + if (mask_tile_x_q == (ctrl_i.tile_s-1)) begin + mask_tile_x_d = '0; + mask_tile_y_d = mask_tile_y_q + 1; + end else begin + mask_tile_x_d = mask_tile_x_q + 1; + end + if (mask_tile_d == ctrl_i.tile_s * ctrl_i.tile_s) begin + mask_tile_d = '0; + mask_tile_x_d = '0; + mask_tile_y_d = '0; + end + end + if (disable_row) begin inp_stream_soft_o = { M { '0 } }; end else begin for (int i = 0; i < M; i++) begin - if ((inner_tile_q*M + i) >= ctrl_i.seq_length) begin - disable_col[i] = 1'b1; - // This logic needs to be replaced - end else if ((i >= ((count_soft_mask_q & (M-1)) + (ctrl_i.mask_start_index & (M-1)))) && (ctrl_i.mask_type == UpperTriangular)) begin - disable_col[i] = 1'b1; - end else begin - disable_col[i] = 1'b0; - end + disable_col[i] = ((inner_tile_q*M + i) >= ctrl_i.seq_length); + + case (ctrl_i.mask_type) + UpperTriangular: begin + // (ctrl_i.mask_start_index / M) -> tile where the masking starts + if (mask_tile_x_q == mask_tile_y_q) begin + if (i >= counter_t'((count_soft_mask_q & (M-1)) + (ctrl_i.mask_start_index & (M-1)))) begin + disable_col[i] = 1'b1; + end else begin + disable_col[i] = 1'b0; + end + end else if (mask_tile_x_q == ((ctrl_i.mask_start_index / M) + 1'b1 + mask_tile_y_q)) begin + if (((count_soft_mask_q & (M-1)) > (ctrl_i.mask_start_index & (M-1))) && (i <= ((count_soft_mask_q & (M-1)) - (ctrl_i.mask_start_index & (M-1))))) begin + disable_col[i] = 1'b1; + end else begin + disable_col[i] = 1'b0; + end + end else if (mask_tile_x_q > ((ctrl_i.mask_start_index / M) + 1'b1 + mask_tile_y_q)) begin + disable_col[i] = 1'b1; + end else if (mask_tile_x_q <= (ctrl_i.mask_start_index / M)) begin + disable_col[i] = 1'b0; + end else begin + disable_col[i] = 1'b0; + end + end + LowerTriangular: begin + + end + None: begin + + end + endcase if (disable_col[i]) begin inp_stream_soft_o[i] = '0; @@ -271,7 +316,11 @@ module ita_softmax always_ff @(posedge clk_i or negedge rst_ni) begin if(~rst_ni) begin inner_tile_q <= '0; + tile_x_q <= '0; tile_y_q <= '0; + mask_tile_x_q <= '0; + mask_tile_y_q <= '0; + mask_tile_q <= '0; tile_q4 <= '0; tile_q3 <= '0; tile_q2 <= '0; @@ -295,6 +344,7 @@ module ita_softmax shift_sum_q <= '0; end else begin inner_tile_q <= inner_tile_i; + tile_x_q <= tile_x_i; tile_y_q <= tile_y_i; tile_q4 <= tile_q3; tile_q3 <= tile_q2; @@ -308,6 +358,9 @@ module ita_softmax count_soft_q2 <= count_soft_q1; if (calc_stream_soft_en_i) count_soft_mask_q <= count_soft_q1; + mask_tile_x_q <= mask_tile_x_d; + mask_tile_y_q <= mask_tile_y_d; + mask_tile_q <= mask_tile_d; count_div_q <= count_div_d; div_read_q <= div_read_d; div_write_q <= div_write_d; From d0ccc19d8f9108871e3dd493aabe91d08305ddc9 Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Mon, 2 Dec 2024 13:39:59 +0100 Subject: [PATCH 42/60] Works for two tiles but only with index smaller than 64 --- modelsim/sim_ita_tb_wave.tcl | 23 +- modelsim/sim_ita_tb_wave_important.tcl | 565 +++++++++++++++++-------- src/ita_softmax.sv | 68 +-- 3 files changed, 427 insertions(+), 229 deletions(-) diff --git a/modelsim/sim_ita_tb_wave.tcl b/modelsim/sim_ita_tb_wave.tcl index a9f160c..cf0959b 100644 --- a/modelsim/sim_ita_tb_wave.tcl +++ b/modelsim/sim_ita_tb_wave.tcl @@ -52,6 +52,7 @@ add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i add wave -noupdate -expand -group {Masking Signals} -radix decimal -childformat {{{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[15]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[14]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[13]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[12]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[11]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[10]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[9]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[8]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[7]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[6]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[5]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[4]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[3]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[2]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[1]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[0]} {-height 16 -radix decimal}} /ita_tb/dut/i_softmax_top/i_softmax/shift_diff add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_controller/step_q +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/count_q add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/i_controller/mask_d add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_pos_d @@ -81,7 +82,6 @@ add wave -noupdate /ita_tb/dut/calc_en_q4 add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q -add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 add wave -noupdate -radix binary -childformat {{{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[63]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[62]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[61]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[60]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[59]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[58]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[57]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[56]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[55]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[54]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[53]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[52]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[51]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[50]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[49]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[48]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[47]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[46]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[45]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[44]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[43]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[42]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[41]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[40]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[39]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[38]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[37]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[36]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[35]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[34]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[33]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[32]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[31]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[30]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[29]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[28]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[27]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[26]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[25]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[24]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[23]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[22]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[21]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[20]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[19]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[18]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[17]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[16]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[15]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[14]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[13]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[12]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[11]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[10]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[9]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[8]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[7]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[6]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[5]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[4]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[3]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[2]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[1]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[0]} -radix binary}} -subitemconfig {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[63]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[62]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[61]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[60]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[59]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[58]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[57]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[56]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[55]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[54]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[53]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[52]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[51]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[50]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[49]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[48]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[47]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[46]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[45]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[44]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[43]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[42]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[41]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[40]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[39]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[38]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[37]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[36]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[35]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[34]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[33]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[32]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[31]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[30]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[29]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[28]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[27]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[26]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[25]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[24]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[23]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[22]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[21]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[20]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[19]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[18]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[17]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[16]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[15]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[14]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[13]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[12]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[11]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[10]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[9]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[8]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[7]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[6]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[5]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[4]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[3]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[2]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[1]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[0]} {-height 16 -radix binary}} /ita_tb/dut/i_softmax_top/i_softmax/disable_col add wave -noupdate /ita_tb/dut/i_inp2_mux/clk_i @@ -90,25 +90,10 @@ add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softm add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/mask_i add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/max_i add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/max_o -add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/count_d -add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/count_q1 -add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/count_q2 -add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/count_q3 -add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/count_q4 -add wave -noupdate /ita_tb/dut/calc_en -add wave -noupdate /ita_tb/dut/calc_en_q1 -add wave -noupdate /ita_tb/dut/calc_en_q2 -add wave -noupdate /ita_tb/dut/calc_en_q3 -add wave -noupdate /ita_tb/dut/calc_en_q4 -add wave -noupdate /ita_tb/dut/calc_en_q5 -add wave -noupdate /ita_tb/dut/calc_en_q6 -add wave -noupdate /ita_tb/dut/calc_en_q7 -add wave -noupdate /ita_tb/dut/calc_en_q8 -add wave -noupdate /ita_tb/dut/calc_en_q9 -add wave -noupdate /ita_tb/dut/calc_en_q10 add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i add wave -noupdate -radix hexadecimal /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q add wave -noupdate /ita_tb/dut/i_requantizer/clk_i +add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_d add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_q @@ -122,11 +107,11 @@ add wave -noupdate -radix decimal /ita_tb/dut/inp_i add wave -noupdate -expand -group {All in one Phase} -radix decimal -childformat {{{/ita_tb/dut/inp[63]} -radix decimal} {{/ita_tb/dut/inp[62]} -radix decimal} {{/ita_tb/dut/inp[61]} -radix decimal} {{/ita_tb/dut/inp[60]} -radix decimal} {{/ita_tb/dut/inp[59]} -radix decimal} {{/ita_tb/dut/inp[58]} -radix decimal} {{/ita_tb/dut/inp[57]} -radix decimal} {{/ita_tb/dut/inp[56]} -radix decimal} {{/ita_tb/dut/inp[55]} -radix decimal} {{/ita_tb/dut/inp[54]} -radix decimal} {{/ita_tb/dut/inp[53]} -radix decimal} {{/ita_tb/dut/inp[52]} -radix decimal} {{/ita_tb/dut/inp[51]} -radix decimal} {{/ita_tb/dut/inp[50]} -radix decimal} {{/ita_tb/dut/inp[49]} -radix decimal} {{/ita_tb/dut/inp[48]} -radix decimal} {{/ita_tb/dut/inp[47]} -radix decimal} {{/ita_tb/dut/inp[46]} -radix decimal} {{/ita_tb/dut/inp[45]} -radix decimal} {{/ita_tb/dut/inp[44]} -radix decimal} {{/ita_tb/dut/inp[43]} -radix decimal} {{/ita_tb/dut/inp[42]} -radix decimal} {{/ita_tb/dut/inp[41]} -radix decimal} {{/ita_tb/dut/inp[40]} -radix decimal} {{/ita_tb/dut/inp[39]} -radix decimal} {{/ita_tb/dut/inp[38]} -radix decimal} {{/ita_tb/dut/inp[37]} -radix decimal} {{/ita_tb/dut/inp[36]} -radix decimal} {{/ita_tb/dut/inp[35]} -radix decimal} {{/ita_tb/dut/inp[34]} -radix decimal} {{/ita_tb/dut/inp[33]} -radix decimal} {{/ita_tb/dut/inp[32]} -radix decimal} {{/ita_tb/dut/inp[31]} -radix decimal} {{/ita_tb/dut/inp[30]} -radix decimal} {{/ita_tb/dut/inp[29]} -radix decimal} {{/ita_tb/dut/inp[28]} -radix decimal} {{/ita_tb/dut/inp[27]} -radix decimal} {{/ita_tb/dut/inp[26]} -radix decimal} {{/ita_tb/dut/inp[25]} -radix decimal} {{/ita_tb/dut/inp[24]} -radix decimal} {{/ita_tb/dut/inp[23]} -radix decimal} {{/ita_tb/dut/inp[22]} -radix decimal} {{/ita_tb/dut/inp[21]} -radix decimal} {{/ita_tb/dut/inp[20]} -radix decimal} {{/ita_tb/dut/inp[19]} -radix decimal} {{/ita_tb/dut/inp[18]} -radix decimal} {{/ita_tb/dut/inp[17]} -radix decimal} {{/ita_tb/dut/inp[16]} -radix decimal} {{/ita_tb/dut/inp[15]} -radix decimal} {{/ita_tb/dut/inp[14]} -radix decimal} {{/ita_tb/dut/inp[13]} -radix decimal} {{/ita_tb/dut/inp[12]} -radix decimal} {{/ita_tb/dut/inp[11]} -radix decimal} {{/ita_tb/dut/inp[10]} -radix decimal} {{/ita_tb/dut/inp[9]} -radix decimal} {{/ita_tb/dut/inp[8]} -radix decimal} {{/ita_tb/dut/inp[7]} -radix decimal} {{/ita_tb/dut/inp[6]} -radix decimal} {{/ita_tb/dut/inp[5]} -radix decimal} {{/ita_tb/dut/inp[4]} -radix decimal} {{/ita_tb/dut/inp[3]} -radix decimal} {{/ita_tb/dut/inp[2]} -radix decimal} {{/ita_tb/dut/inp[1]} -radix decimal} {{/ita_tb/dut/inp[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/inp[63]} {-height 16 -radix decimal} {/ita_tb/dut/inp[62]} {-height 16 -radix decimal} {/ita_tb/dut/inp[61]} {-height 16 -radix decimal} {/ita_tb/dut/inp[60]} {-height 16 -radix decimal} {/ita_tb/dut/inp[59]} {-height 16 -radix decimal} {/ita_tb/dut/inp[58]} {-height 16 -radix decimal} {/ita_tb/dut/inp[57]} {-height 16 -radix decimal} {/ita_tb/dut/inp[56]} {-height 16 -radix decimal} {/ita_tb/dut/inp[55]} {-height 16 -radix decimal} {/ita_tb/dut/inp[54]} {-height 16 -radix decimal} {/ita_tb/dut/inp[53]} {-height 16 -radix decimal} {/ita_tb/dut/inp[52]} {-height 16 -radix decimal} {/ita_tb/dut/inp[51]} {-height 16 -radix decimal} {/ita_tb/dut/inp[50]} {-height 16 -radix decimal} {/ita_tb/dut/inp[49]} {-height 16 -radix decimal} {/ita_tb/dut/inp[48]} {-height 16 -radix decimal} {/ita_tb/dut/inp[47]} {-height 16 -radix decimal} {/ita_tb/dut/inp[46]} {-height 16 -radix decimal} {/ita_tb/dut/inp[45]} {-height 16 -radix decimal} {/ita_tb/dut/inp[44]} {-height 16 -radix decimal} {/ita_tb/dut/inp[43]} {-height 16 -radix decimal} {/ita_tb/dut/inp[42]} {-height 16 -radix decimal} {/ita_tb/dut/inp[41]} {-height 16 -radix decimal} {/ita_tb/dut/inp[40]} {-height 16 -radix decimal} {/ita_tb/dut/inp[39]} {-height 16 -radix decimal} {/ita_tb/dut/inp[38]} {-height 16 -radix decimal} {/ita_tb/dut/inp[37]} {-height 16 -radix decimal} {/ita_tb/dut/inp[36]} {-height 16 -radix decimal} {/ita_tb/dut/inp[35]} {-height 16 -radix decimal} {/ita_tb/dut/inp[34]} {-height 16 -radix decimal} {/ita_tb/dut/inp[33]} {-height 16 -radix decimal} {/ita_tb/dut/inp[32]} {-height 16 -radix decimal} {/ita_tb/dut/inp[31]} {-height 16 -radix decimal} {/ita_tb/dut/inp[30]} {-height 16 -radix decimal} {/ita_tb/dut/inp[29]} {-height 16 -radix decimal} {/ita_tb/dut/inp[28]} {-height 16 -radix decimal} {/ita_tb/dut/inp[27]} {-height 16 -radix decimal} {/ita_tb/dut/inp[26]} {-height 16 -radix decimal} {/ita_tb/dut/inp[25]} {-height 16 -radix decimal} {/ita_tb/dut/inp[24]} {-height 16 -radix decimal} {/ita_tb/dut/inp[23]} {-height 16 -radix decimal} {/ita_tb/dut/inp[22]} {-height 16 -radix decimal} {/ita_tb/dut/inp[21]} {-height 16 -radix decimal} {/ita_tb/dut/inp[20]} {-height 16 -radix decimal} {/ita_tb/dut/inp[19]} {-height 16 -radix decimal} {/ita_tb/dut/inp[18]} {-height 16 -radix decimal} {/ita_tb/dut/inp[17]} {-height 16 -radix decimal} {/ita_tb/dut/inp[16]} {-height 16 -radix decimal} {/ita_tb/dut/inp[15]} {-height 16 -radix decimal} {/ita_tb/dut/inp[14]} {-height 16 -radix decimal} {/ita_tb/dut/inp[13]} {-height 16 -radix decimal} {/ita_tb/dut/inp[12]} {-height 16 -radix decimal} {/ita_tb/dut/inp[11]} {-height 16 -radix decimal} {/ita_tb/dut/inp[10]} {-height 16 -radix decimal} {/ita_tb/dut/inp[9]} {-height 16 -radix decimal} {/ita_tb/dut/inp[8]} {-height 16 -radix decimal} {/ita_tb/dut/inp[7]} {-height 16 -radix decimal} {/ita_tb/dut/inp[6]} {-height 16 -radix decimal} {/ita_tb/dut/inp[5]} {-height 16 -radix decimal} {/ita_tb/dut/inp[4]} {-height 16 -radix decimal} {/ita_tb/dut/inp[3]} {-height 16 -radix decimal} {/ita_tb/dut/inp[2]} {-height 16 -radix decimal} {/ita_tb/dut/inp[1]} {-height 16 -radix decimal} {/ita_tb/dut/inp[0]} {-height 16 -radix decimal}} /ita_tb/dut/inp add wave -noupdate -expand -group {All in one Phase} -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o add wave -noupdate -expand -group {All in one Phase} -radix decimal /ita_tb/dut/inp1 -add wave -noupdate -expand -group {All in one Phase} -radix unsigned /ita_tb/dut/inp1_q +add wave -noupdate -radix unsigned /ita_tb/dut/inp1_q add wave -noupdate -radix decimal /ita_tb/dut/i_accumulator/oup_i add wave -noupdate -radix decimal -childformat {{{/ita_tb/dut/i_accumulator/result_d[15]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[14]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[13]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[12]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[11]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[10]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[9]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[8]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[7]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[6]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[5]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[4]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[3]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[2]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[1]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_accumulator/result_d[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[0]} {-height 16 -radix decimal}} /ita_tb/dut/i_accumulator/result_d add wave -noupdate -radix decimal /ita_tb/dut/i_accumulator/result_o -add wave -noupdate -radix decimal -childformat {{{/ita_tb/dut/i_activation/data_i[15]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[14]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[13]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[12]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[11]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[10]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[9]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[8]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[7]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[6]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[5]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[4]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[3]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[2]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[1]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_activation/data_i[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[0]} {-height 16 -radix decimal}} /ita_tb/dut/i_activation/data_i +add wave -noupdate -radix hexadecimal -childformat {{{/ita_tb/dut/i_activation/data_i[15]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[14]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[13]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[12]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[11]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[10]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[9]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[8]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[7]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[6]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[5]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[4]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[3]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[2]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[1]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_activation/data_i[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[0]} {-height 16 -radix decimal}} /ita_tb/dut/i_activation/data_i add wave -noupdate /ita_tb/dut/i_activation/data_q1 add wave -noupdate /ita_tb/dut/i_activation/data_q2 add wave -noupdate /ita_tb/dut/i_activation/data_q3 diff --git a/modelsim/sim_ita_tb_wave_important.tcl b/modelsim/sim_ita_tb_wave_important.tcl index 0d78b45..0d0a0cd 100644 --- a/modelsim/sim_ita_tb_wave_important.tcl +++ b/modelsim/sim_ita_tb_wave_important.tcl @@ -50,6 +50,7 @@ add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i add wave -noupdate -expand -group {Masking Signals} -radix decimal -childformat {{{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[15]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[14]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[13]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[12]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[11]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[10]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[9]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[8]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[7]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[6]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[5]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[4]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[3]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[2]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[1]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[0]} {-height 16 -radix decimal}} /ita_tb/dut/i_softmax_top/i_softmax/shift_diff add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_controller/step_q +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/count_q add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/i_controller/mask_d add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_pos_d @@ -79,7 +80,6 @@ add wave -noupdate /ita_tb/dut/calc_en_q4 add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q -add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 add wave -noupdate -radix binary -childformat {{{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[63]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[62]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[61]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[60]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[59]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[58]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[57]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[56]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[55]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[54]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[53]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[52]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[51]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[50]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[49]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[48]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[47]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[46]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[45]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[44]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[43]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[42]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[41]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[40]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[39]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[38]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[37]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[36]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[35]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[34]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[33]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[32]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[31]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[30]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[29]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[28]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[27]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[26]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[25]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[24]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[23]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[22]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[21]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[20]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[19]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[18]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[17]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[16]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[15]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[14]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[13]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[12]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[11]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[10]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[9]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[8]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[7]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[6]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[5]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[4]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[3]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[2]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[1]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[0]} -radix binary}} -subitemconfig {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[63]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[62]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[61]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[60]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[59]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[58]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[57]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[56]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[55]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[54]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[53]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[52]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[51]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[50]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[49]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[48]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[47]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[46]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[45]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[44]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[43]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[42]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[41]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[40]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[39]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[38]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[37]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[36]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[35]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[34]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[33]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[32]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[31]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[30]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[29]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[28]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[27]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[26]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[25]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[24]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[23]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[22]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[21]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[20]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[19]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[18]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[17]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[16]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[15]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[14]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[13]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[12]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[11]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[10]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[9]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[8]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[7]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[6]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[5]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[4]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[3]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[2]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[1]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[0]} {-height 16 -radix binary}} /ita_tb/dut/i_softmax_top/i_softmax/disable_col add wave -noupdate /ita_tb/dut/i_inp2_mux/clk_i @@ -88,25 +88,10 @@ add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softm add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/mask_i add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/max_i add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/max_o -add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/count_d -add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/count_q1 -add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/count_q2 -add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/count_q3 -add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/count_q4 -add wave -noupdate /ita_tb/dut/calc_en -add wave -noupdate /ita_tb/dut/calc_en_q1 -add wave -noupdate /ita_tb/dut/calc_en_q2 -add wave -noupdate /ita_tb/dut/calc_en_q3 -add wave -noupdate /ita_tb/dut/calc_en_q4 -add wave -noupdate /ita_tb/dut/calc_en_q5 -add wave -noupdate /ita_tb/dut/calc_en_q6 -add wave -noupdate /ita_tb/dut/calc_en_q7 -add wave -noupdate /ita_tb/dut/calc_en_q8 -add wave -noupdate /ita_tb/dut/calc_en_q9 -add wave -noupdate /ita_tb/dut/calc_en_q10 add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i add wave -noupdate -radix hexadecimal /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q add wave -noupdate /ita_tb/dut/i_requantizer/clk_i +add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_d add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_q @@ -120,11 +105,11 @@ add wave -noupdate -radix decimal /ita_tb/dut/inp_i add wave -noupdate -expand -group {All in one Phase} -radix decimal -childformat {{{/ita_tb/dut/inp[63]} -radix decimal} {{/ita_tb/dut/inp[62]} -radix decimal} {{/ita_tb/dut/inp[61]} -radix decimal} {{/ita_tb/dut/inp[60]} -radix decimal} {{/ita_tb/dut/inp[59]} -radix decimal} {{/ita_tb/dut/inp[58]} -radix decimal} {{/ita_tb/dut/inp[57]} -radix decimal} {{/ita_tb/dut/inp[56]} -radix decimal} {{/ita_tb/dut/inp[55]} -radix decimal} {{/ita_tb/dut/inp[54]} -radix decimal} {{/ita_tb/dut/inp[53]} -radix decimal} {{/ita_tb/dut/inp[52]} -radix decimal} {{/ita_tb/dut/inp[51]} -radix decimal} {{/ita_tb/dut/inp[50]} -radix decimal} {{/ita_tb/dut/inp[49]} -radix decimal} {{/ita_tb/dut/inp[48]} -radix decimal} {{/ita_tb/dut/inp[47]} -radix decimal} {{/ita_tb/dut/inp[46]} -radix decimal} {{/ita_tb/dut/inp[45]} -radix decimal} {{/ita_tb/dut/inp[44]} -radix decimal} {{/ita_tb/dut/inp[43]} -radix decimal} {{/ita_tb/dut/inp[42]} -radix decimal} {{/ita_tb/dut/inp[41]} -radix decimal} {{/ita_tb/dut/inp[40]} -radix decimal} {{/ita_tb/dut/inp[39]} -radix decimal} {{/ita_tb/dut/inp[38]} -radix decimal} {{/ita_tb/dut/inp[37]} -radix decimal} {{/ita_tb/dut/inp[36]} -radix decimal} {{/ita_tb/dut/inp[35]} -radix decimal} {{/ita_tb/dut/inp[34]} -radix decimal} {{/ita_tb/dut/inp[33]} -radix decimal} {{/ita_tb/dut/inp[32]} -radix decimal} {{/ita_tb/dut/inp[31]} -radix decimal} {{/ita_tb/dut/inp[30]} -radix decimal} {{/ita_tb/dut/inp[29]} -radix decimal} {{/ita_tb/dut/inp[28]} -radix decimal} {{/ita_tb/dut/inp[27]} -radix decimal} {{/ita_tb/dut/inp[26]} -radix decimal} {{/ita_tb/dut/inp[25]} -radix decimal} {{/ita_tb/dut/inp[24]} -radix decimal} {{/ita_tb/dut/inp[23]} -radix decimal} {{/ita_tb/dut/inp[22]} -radix decimal} {{/ita_tb/dut/inp[21]} -radix decimal} {{/ita_tb/dut/inp[20]} -radix decimal} {{/ita_tb/dut/inp[19]} -radix decimal} {{/ita_tb/dut/inp[18]} -radix decimal} {{/ita_tb/dut/inp[17]} -radix decimal} {{/ita_tb/dut/inp[16]} -radix decimal} {{/ita_tb/dut/inp[15]} -radix decimal} {{/ita_tb/dut/inp[14]} -radix decimal} {{/ita_tb/dut/inp[13]} -radix decimal} {{/ita_tb/dut/inp[12]} -radix decimal} {{/ita_tb/dut/inp[11]} -radix decimal} {{/ita_tb/dut/inp[10]} -radix decimal} {{/ita_tb/dut/inp[9]} -radix decimal} {{/ita_tb/dut/inp[8]} -radix decimal} {{/ita_tb/dut/inp[7]} -radix decimal} {{/ita_tb/dut/inp[6]} -radix decimal} {{/ita_tb/dut/inp[5]} -radix decimal} {{/ita_tb/dut/inp[4]} -radix decimal} {{/ita_tb/dut/inp[3]} -radix decimal} {{/ita_tb/dut/inp[2]} -radix decimal} {{/ita_tb/dut/inp[1]} -radix decimal} {{/ita_tb/dut/inp[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/inp[63]} {-height 16 -radix decimal} {/ita_tb/dut/inp[62]} {-height 16 -radix decimal} {/ita_tb/dut/inp[61]} {-height 16 -radix decimal} {/ita_tb/dut/inp[60]} {-height 16 -radix decimal} {/ita_tb/dut/inp[59]} {-height 16 -radix decimal} {/ita_tb/dut/inp[58]} {-height 16 -radix decimal} {/ita_tb/dut/inp[57]} {-height 16 -radix decimal} {/ita_tb/dut/inp[56]} {-height 16 -radix decimal} {/ita_tb/dut/inp[55]} {-height 16 -radix decimal} {/ita_tb/dut/inp[54]} {-height 16 -radix decimal} {/ita_tb/dut/inp[53]} {-height 16 -radix decimal} {/ita_tb/dut/inp[52]} {-height 16 -radix decimal} {/ita_tb/dut/inp[51]} {-height 16 -radix decimal} {/ita_tb/dut/inp[50]} {-height 16 -radix decimal} {/ita_tb/dut/inp[49]} {-height 16 -radix decimal} {/ita_tb/dut/inp[48]} {-height 16 -radix decimal} {/ita_tb/dut/inp[47]} {-height 16 -radix decimal} {/ita_tb/dut/inp[46]} {-height 16 -radix decimal} {/ita_tb/dut/inp[45]} {-height 16 -radix decimal} {/ita_tb/dut/inp[44]} {-height 16 -radix decimal} {/ita_tb/dut/inp[43]} {-height 16 -radix decimal} {/ita_tb/dut/inp[42]} {-height 16 -radix decimal} {/ita_tb/dut/inp[41]} {-height 16 -radix decimal} {/ita_tb/dut/inp[40]} {-height 16 -radix decimal} {/ita_tb/dut/inp[39]} {-height 16 -radix decimal} {/ita_tb/dut/inp[38]} {-height 16 -radix decimal} {/ita_tb/dut/inp[37]} {-height 16 -radix decimal} {/ita_tb/dut/inp[36]} {-height 16 -radix decimal} {/ita_tb/dut/inp[35]} {-height 16 -radix decimal} {/ita_tb/dut/inp[34]} {-height 16 -radix decimal} {/ita_tb/dut/inp[33]} {-height 16 -radix decimal} {/ita_tb/dut/inp[32]} {-height 16 -radix decimal} {/ita_tb/dut/inp[31]} {-height 16 -radix decimal} {/ita_tb/dut/inp[30]} {-height 16 -radix decimal} {/ita_tb/dut/inp[29]} {-height 16 -radix decimal} {/ita_tb/dut/inp[28]} {-height 16 -radix decimal} {/ita_tb/dut/inp[27]} {-height 16 -radix decimal} {/ita_tb/dut/inp[26]} {-height 16 -radix decimal} {/ita_tb/dut/inp[25]} {-height 16 -radix decimal} {/ita_tb/dut/inp[24]} {-height 16 -radix decimal} {/ita_tb/dut/inp[23]} {-height 16 -radix decimal} {/ita_tb/dut/inp[22]} {-height 16 -radix decimal} {/ita_tb/dut/inp[21]} {-height 16 -radix decimal} {/ita_tb/dut/inp[20]} {-height 16 -radix decimal} {/ita_tb/dut/inp[19]} {-height 16 -radix decimal} {/ita_tb/dut/inp[18]} {-height 16 -radix decimal} {/ita_tb/dut/inp[17]} {-height 16 -radix decimal} {/ita_tb/dut/inp[16]} {-height 16 -radix decimal} {/ita_tb/dut/inp[15]} {-height 16 -radix decimal} {/ita_tb/dut/inp[14]} {-height 16 -radix decimal} {/ita_tb/dut/inp[13]} {-height 16 -radix decimal} {/ita_tb/dut/inp[12]} {-height 16 -radix decimal} {/ita_tb/dut/inp[11]} {-height 16 -radix decimal} {/ita_tb/dut/inp[10]} {-height 16 -radix decimal} {/ita_tb/dut/inp[9]} {-height 16 -radix decimal} {/ita_tb/dut/inp[8]} {-height 16 -radix decimal} {/ita_tb/dut/inp[7]} {-height 16 -radix decimal} {/ita_tb/dut/inp[6]} {-height 16 -radix decimal} {/ita_tb/dut/inp[5]} {-height 16 -radix decimal} {/ita_tb/dut/inp[4]} {-height 16 -radix decimal} {/ita_tb/dut/inp[3]} {-height 16 -radix decimal} {/ita_tb/dut/inp[2]} {-height 16 -radix decimal} {/ita_tb/dut/inp[1]} {-height 16 -radix decimal} {/ita_tb/dut/inp[0]} {-height 16 -radix decimal}} /ita_tb/dut/inp add wave -noupdate -expand -group {All in one Phase} -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o add wave -noupdate -expand -group {All in one Phase} -radix decimal /ita_tb/dut/inp1 -add wave -noupdate -expand -group {All in one Phase} -radix unsigned /ita_tb/dut/inp1_q +add wave -noupdate -radix unsigned /ita_tb/dut/inp1_q add wave -noupdate -radix decimal /ita_tb/dut/i_accumulator/oup_i add wave -noupdate -radix decimal -childformat {{{/ita_tb/dut/i_accumulator/result_d[15]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[14]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[13]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[12]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[11]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[10]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[9]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[8]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[7]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[6]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[5]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[4]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[3]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[2]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[1]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_accumulator/result_d[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[0]} {-height 16 -radix decimal}} /ita_tb/dut/i_accumulator/result_d add wave -noupdate -radix decimal /ita_tb/dut/i_accumulator/result_o -add wave -noupdate -radix decimal -childformat {{{/ita_tb/dut/i_activation/data_i[15]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[14]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[13]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[12]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[11]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[10]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[9]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[8]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[7]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[6]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[5]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[4]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[3]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[2]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[1]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_activation/data_i[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[0]} {-height 16 -radix decimal}} /ita_tb/dut/i_activation/data_i +add wave -noupdate -radix hexadecimal -childformat {{{/ita_tb/dut/i_activation/data_i[15]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[14]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[13]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[12]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[11]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[10]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[9]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[8]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[7]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[6]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[5]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[4]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[3]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[2]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[1]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_activation/data_i[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[0]} {-height 16 -radix decimal}} /ita_tb/dut/i_activation/data_i add wave -noupdate /ita_tb/dut/i_activation/data_q1 add wave -noupdate /ita_tb/dut/i_activation/data_q2 add wave -noupdate /ita_tb/dut/i_activation/data_q3 @@ -175,164 +160,264 @@ add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q3 add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q4 add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_d add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/clk_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/rst_ni -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ctrl_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_ready_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_ready_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_ready_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_ready_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/pop_softmax_fifo_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/soft_addr_div_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_done_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_inner_tile_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_inner_tile_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_pad_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_q1_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/count_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/count_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_count -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_padded -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_time -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_dim -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_fifo -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/clk_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/rst_ni -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ctrl_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_ready_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_ready_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_ready_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_ready_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/pop_softmax_fifo_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/soft_addr_div_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_done_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_inner_tile_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_inner_tile_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_pad_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_q1_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/count_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/count_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_count -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_padded -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_time -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_dim -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_fifo -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_q +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/clk_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/rst_ni +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mode_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/eps_mult_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/right_shift_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_q_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/result_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_o +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mult_signed +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/product +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_added +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_d +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_q +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q1 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q2 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q3 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q4 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_d +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/clk_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/rst_ni +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ctrl_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_valid_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_ready_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/weight_valid_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/weight_ready_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_valid_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_ready_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/oup_valid_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/oup_ready_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/pop_softmax_fifo_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/soft_addr_div_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_done_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/calc_en_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_inner_tile_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/last_inner_tile_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_pad_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/calc_en_q1_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/count_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/count_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_count +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_pos_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_pos_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_col_offset_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_col_offset_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_x_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_x_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_y_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_y_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_tile_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_tile_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_soft_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_soft_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_padded +add wave -noupdate -group Controller /ita_tb/dut/i_controller/last_time +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_dim +add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_outer_dim +add wave -noupdate -group Controller /ita_tb/dut/i_controller/second_outer_dim +add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_outer_dim_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_outer_dim_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/second_outer_dim_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/second_outer_dim_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_fifo +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div_done_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div_done_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/clk_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/rst_ni +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ctrl_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_valid_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_ready_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/weight_valid_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/weight_ready_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_valid_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_ready_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/oup_valid_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/oup_ready_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/pop_softmax_fifo_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/soft_addr_div_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_done_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/calc_en_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_inner_tile_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/last_inner_tile_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_pad_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/calc_en_q1_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/count_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/count_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_count +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_pos_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_pos_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_col_offset_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_col_offset_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_x_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_x_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_y_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_y_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_tile_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_tile_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_soft_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_soft_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_padded +add wave -noupdate -group Controller /ita_tb/dut/i_controller/last_time +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_dim +add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_outer_dim +add wave -noupdate -group Controller /ita_tb/dut/i_controller/second_outer_dim +add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_outer_dim_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_outer_dim_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/second_outer_dim_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/second_outer_dim_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_fifo +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div_done_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div_done_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/clk_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/rst_ni +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ctrl_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_valid_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_ready_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/weight_valid_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/weight_ready_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_valid_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_ready_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/oup_valid_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/oup_ready_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/pop_softmax_fifo_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/soft_addr_div_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_done_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/calc_en_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_inner_tile_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/last_inner_tile_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_pad_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/calc_en_q1_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/count_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/count_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_count +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_pos_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_pos_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_col_offset_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_col_offset_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_x_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_x_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_y_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_y_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_tile_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_tile_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_soft_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_soft_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_padded +add wave -noupdate -group Controller /ita_tb/dut/i_controller/last_time +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_dim +add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_outer_dim +add wave -noupdate -group Controller /ita_tb/dut/i_controller/second_outer_dim +add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_outer_dim_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_outer_dim_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/second_outer_dim_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/second_outer_dim_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_fifo +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div_done_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div_done_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_q add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/clk_i add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/rst_ni add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/ctrl_i @@ -518,6 +603,126 @@ add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softm add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_row add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_col +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/clk_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/rst_ni +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/ctrl_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/step_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/soft_addr_div_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/softmax_done_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_softmax_fifo_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_inp_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_oup_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_data_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_data_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/prev_max_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_data_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_data_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_x_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q3 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q4 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q3 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q4 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_x_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_diff +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_diff +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp_diff +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q3 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_full +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_empty +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/push_to_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_from_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_to_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_from_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_usage +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_row +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_col +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/clk_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/rst_ni +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_q_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_q_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_q_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/oup_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/inp_bias_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_o +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_en +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data_unused +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_en +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_data +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_d +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_q +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_d +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_q +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_d +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_q add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/clk_i add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/rst_ni add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_i @@ -567,8 +772,8 @@ add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_q add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_d add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_q TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {10268600 ps} 1} -quietly wave cursor active 1 +WaveRestoreCursors {{Cursor 1} {10400600 ps} 1} {{Cursor 2} {10358978 ps} 0} +quietly wave cursor active 2 configure wave -namecolwidth 150 configure wave -valuecolwidth 100 configure wave -justifyvalue left @@ -583,4 +788,4 @@ configure wave -griddelta 40 configure wave -timeline 0 configure wave -timelineunits ns update -WaveRestoreZoom {0 ps} {23757930 ps} +WaveRestoreZoom {10355645 ps} {10373942 ps} diff --git a/src/ita_softmax.sv b/src/ita_softmax.sv index 68b7b53..dc96128 100644 --- a/src/ita_softmax.sv +++ b/src/ita_softmax.sv @@ -266,38 +266,45 @@ module ita_softmax inp_stream_soft_o = { M { '0 } }; end else begin for (int i = 0; i < M; i++) begin - disable_col[i] = ((inner_tile_q*M + i) >= ctrl_i.seq_length); - - case (ctrl_i.mask_type) - UpperTriangular: begin - // (ctrl_i.mask_start_index / M) -> tile where the masking starts - if (mask_tile_x_q == mask_tile_y_q) begin - if (i >= counter_t'((count_soft_mask_q & (M-1)) + (ctrl_i.mask_start_index & (M-1)))) begin + if ((inner_tile_q*M + i) >= ctrl_i.seq_length) begin + disable_col[i] = 1'b1; + end else begin + case (ctrl_i.mask_type) + UpperTriangular: begin + // (ctrl_i.mask_start_index / M) -> tile where the masking starts + if (mask_tile_x_q == mask_tile_y_q) begin + if (i >= ((count_soft_mask_q & (M-1)) + (ctrl_i.mask_start_index & (M-1)))) begin + disable_col[i] = 1'b1; + end else begin + disable_col[i] = 1'b0; + end + end else if (mask_tile_x_q == ((ctrl_i.mask_start_index / M) + 1'b1 + mask_tile_y_q)) begin + if ((count_soft_mask_q & (M-1)) > (M - (ctrl_i.mask_start_index & (M-1)))) begin + if (i < ((count_soft_mask_q & (M-1)) - (M - (ctrl_i.mask_start_index & (M-1))))) begin + disable_col[i] = 1'b0; + end else begin + disable_col[i] = 1'b1; + end + end else begin + disable_col[i] = 1'b1; + end + end else if (mask_tile_x_q > ((ctrl_i.mask_start_index / M) + 1'b1 + mask_tile_y_q)) begin disable_col[i] = 1'b1; - end else begin + end else if (mask_tile_x_q <= (ctrl_i.mask_start_index / M)) begin disable_col[i] = 1'b0; - end - end else if (mask_tile_x_q == ((ctrl_i.mask_start_index / M) + 1'b1 + mask_tile_y_q)) begin - if (((count_soft_mask_q & (M-1)) > (ctrl_i.mask_start_index & (M-1))) && (i <= ((count_soft_mask_q & (M-1)) - (ctrl_i.mask_start_index & (M-1))))) begin - disable_col[i] = 1'b1; end else begin disable_col[i] = 1'b0; end - end else if (mask_tile_x_q > ((ctrl_i.mask_start_index / M) + 1'b1 + mask_tile_y_q)) begin - disable_col[i] = 1'b1; - end else if (mask_tile_x_q <= (ctrl_i.mask_start_index / M)) begin - disable_col[i] = 1'b0; - end else begin - disable_col[i] = 1'b0; end - end - LowerTriangular: begin - - end - None: begin - - end - endcase + LowerTriangular: begin + + end + None: begin + + end + endcase + end + if (disable_col[i]) begin inp_stream_soft_o[i] = '0; @@ -356,11 +363,12 @@ module ita_softmax count_q1 <= count_d; count_soft_q1 <= count_soft_d; count_soft_q2 <= count_soft_q1; - if (calc_stream_soft_en_i) + if (calc_stream_soft_en_i) begin count_soft_mask_q <= count_soft_q1; - mask_tile_x_q <= mask_tile_x_d; - mask_tile_y_q <= mask_tile_y_d; - mask_tile_q <= mask_tile_d; + end + mask_tile_x_q <= mask_tile_x_d; + mask_tile_y_q <= mask_tile_y_d; + mask_tile_q <= mask_tile_d; count_div_q <= count_div_d; div_read_q <= div_read_d; div_write_q <= div_write_d; From 6d5c804a8b059e5775dce5a17e854f7a859b014d Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Mon, 2 Dec 2024 15:38:04 +0100 Subject: [PATCH 43/60] Test with s=511 --- src/ita_controller.sv | 36 +++++++----------------------------- src/ita_softmax.sv | 2 +- 2 files changed, 8 insertions(+), 30 deletions(-) diff --git a/src/ita_controller.sv b/src/ita_controller.sv index 63e7c11..bbddedf 100644 --- a/src/ita_controller.sv +++ b/src/ita_controller.sv @@ -95,9 +95,9 @@ module ita_controller softmax_div_done_d = softmax_div_done_q; last_time = 1'b0; requant_add = {N {requant_add_i}}; - mask_col_offset_d = (step_q == QK) ? mask_col_offset_q : ((ctrl_i.mask_start_index) & (N-1)); - mask_pos_d = (step_q == QK) ? mask_pos_q : (((ctrl_i.mask_start_index)/N)*M); - mask_tile_x_pos_d = mask_tile_x_pos_q; + mask_col_offset_d = (step_q == QK || step_q == AV) ? mask_col_offset_q : ((ctrl_i.mask_start_index) & (N-1)); + mask_pos_d = (step_q == QK || step_q == AV) ? mask_pos_q : ((((ctrl_i.mask_start_index)/N)*M) & ((M*M/N)-1)); + mask_tile_x_pos_d = (step_q == QK || step_q == AV) ? mask_tile_x_pos_q : ((ctrl_i.mask_start_index) / M); mask_tile_y_pos_d = mask_tile_y_pos_q; mask_d = mask_q; @@ -405,26 +405,16 @@ module ita_controller end UpperTriangular: begin - // With calc_en_q4 - if (step_q == QK) begin - // if ((mask_tile_x_pos_q == ctrl_i.tile_s-1) && (mask_count_q3 == ((M*M/N)-1))) begin - // mask_tile_x_pos_d = 1'b0; - // end else if (mask_count_q3 == ((M*M/N)-1) && calc_en_q4_i) begin - // mask_tile_x_pos_d = mask_tile_x_pos_q + 1'b1; - // end else begin - // mask_tile_x_pos_d = mask_tile_x_pos_q; - // end - - + if (step_q == QK) begin if (mask_tile_x_pos_q == tile_x_q && mask_tile_y_pos_q == tile_y_q) begin if (count_q == ((M*M/N)-1)) begin mask_tile_x_pos_d = mask_tile_x_pos_q + 1'b1; end if ((count_q >= mask_pos_q) && (count_q < (mask_pos_q + N))) begin - if ((count_q & (M-1)) == (M-1)) begin + if ((count_q & (M-1)) == (M-1) && !(((count_q + mask_col_offset_q) & (N-1)) == (N-1))) begin mask_tile_y_pos_d = tile_y_q + 1'b1; mask_tile_x_pos_d = tile_x_q; - mask_pos_d = (count_q + ((7*M) + 1)) & ((M*M/N)-1); + mask_pos_d = ((count_q + (((ctrl_i.tile_s * (M*M/N)) - M) + 1)) & ((M*M/N)-1)); end if (((count_q + mask_col_offset_q) & (N-1)) == (N-1)) begin mask_pos_d = (mask_pos_q + (N - ((mask_pos_q + mask_col_offset_q) & (N-1))) + M) & ((M*M/N)-1); @@ -440,23 +430,11 @@ module ita_controller for (int i = 0; i < N; i++) begin mask_d[i] = 1'b1; end - end else begin - for (int i = 0; i < N; i++) begin - mask_d[i] = 1'b0; - end - end + end end else if (mask_tile_x_pos_q == tile_x_q && mask_tile_y_pos_q != tile_y_q) begin for (int i = 0; i < N; i++) begin mask_d[i] = 1'b1; end - // end else if (mask_tile_x_q3 == mask_tile_x_pos_q && mask_tile_y_q3 != mask_tile_y_pos_q) begin - // for (int i = 0; i < N; i++) begin - // mask_d[i] = 1'b1; - // end - // end else begin - // for (int i = 0; i < N; i++) begin - // mask_d[i] = 1'b0; - // end end else if (mask_tile_x_pos_q != tile_x_q && mask_tile_y_pos_q == tile_y_q) begin for (int i = 0; i < N; i++) begin mask_d[i] = 1'b0; diff --git a/src/ita_softmax.sv b/src/ita_softmax.sv index dc96128..993ea94 100644 --- a/src/ita_softmax.sv +++ b/src/ita_softmax.sv @@ -272,7 +272,7 @@ module ita_softmax case (ctrl_i.mask_type) UpperTriangular: begin // (ctrl_i.mask_start_index / M) -> tile where the masking starts - if (mask_tile_x_q == mask_tile_y_q) begin + if ((mask_tile_x_q - (ctrl_i.mask_start_index / M)) == mask_tile_y_q) begin if (i >= ((count_soft_mask_q & (M-1)) + (ctrl_i.mask_start_index & (M-1)))) begin disable_col[i] = 1'b1; end else begin From b9bd4471e497e8ad9d5d81da47924ed3061f1b6b Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Tue, 3 Dec 2024 22:06:03 +0100 Subject: [PATCH 44/60] Works now for multiple tiles but not extensively tested yet --- modelsim/sim_ita_tb_wave.tcl | 4 - modelsim/sim_ita_tb_wave_important.tcl | 1582 ++++++++++++------------ src/ita_controller.sv | 8 +- src/ita_softmax.sv | 27 +- 4 files changed, 825 insertions(+), 796 deletions(-) diff --git a/modelsim/sim_ita_tb_wave.tcl b/modelsim/sim_ita_tb_wave.tcl index cf0959b..78d5ce5 100644 --- a/modelsim/sim_ita_tb_wave.tcl +++ b/modelsim/sim_ita_tb_wave.tcl @@ -99,8 +99,6 @@ add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_d add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_q add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_d add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_q -add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_d -add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_q add wave -noupdate -radix binary /ita_tb/dut/i_softmax_top/i_softmax/disable_col add wave -noupdate /ita_tb/dut/i_activation/data_q3 add wave -noupdate -radix decimal /ita_tb/dut/inp_i @@ -463,8 +461,6 @@ add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softm add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_q add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_d add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_q add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_d diff --git a/modelsim/sim_ita_tb_wave_important.tcl b/modelsim/sim_ita_tb_wave_important.tcl index 0d0a0cd..7d52f26 100644 --- a/modelsim/sim_ita_tb_wave_important.tcl +++ b/modelsim/sim_ita_tb_wave_important.tcl @@ -1,781 +1,807 @@ onerror {resume} +quietly set dataset_list [list vsim sim] +if {[catch {datasetcheck $dataset_list}]} {abort} quietly WaveActivateNextPane {} 0 -add wave -noupdate /ita_tb/dut/i_inp1_mux/clk_i -add wave -noupdate /ita_tb/dut/i_inp1_mux/rst_ni -add wave -noupdate /ita_tb/dut/i_inp1_mux/inp_i -add wave -noupdate /ita_tb/dut/i_inp1_mux/inp1_o -add wave -noupdate /ita_tb/dut/i_inp2_mux/clk_i -add wave -noupdate /ita_tb/dut/i_inp2_mux/rst_ni -add wave -noupdate /ita_tb/dut/i_inp2_mux/weight_i -add wave -noupdate /ita_tb/dut/i_inp2_mux/inp2_o -add wave -noupdate /ita_tb/dut/i_controller/ctrl_i -add wave -noupdate /ita_tb/dut/oup_o -add wave -noupdate /ita_tb/dut/inp1_q -add wave -noupdate /ita_tb/dut/inp2_q -add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/count_d -add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/bias_count -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/max_o -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/disable_row -add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_d -add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_q -add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_d -add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_q -add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/first_outer_dim -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_inp2_mux/clk_i -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/last_inner_tile_q6 -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_controller/calc_en_o -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q1 -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q2 -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q3 -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q4 -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q5 -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q6 -add wave -noupdate -expand -group {Masking Signals} -expand -group {In Softmax Module} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d -add wave -noupdate -expand -group {Masking Signals} -expand -group {In Softmax Module} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 -add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask -add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q1 -add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q2 -add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q3 -add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q4 -add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q5 -add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q6 -add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/i_softmax_top/i_softmax/mask_i -add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_softmax_top/i_softmax/max_o -add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_softmax_top/i_softmax/max_i -add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_requantizer/requant_oup_o -add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q -add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_softmax_top/i_softmax/prev_max_o -add wave -noupdate -expand -group {Masking Signals} -radix decimal -childformat {{{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[15]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[14]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[13]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[12]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[11]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[10]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[9]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[8]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[7]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[6]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[5]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[4]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[3]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[2]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[1]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[0]} {-height 16 -radix decimal}} /ita_tb/dut/i_softmax_top/i_softmax/shift_diff -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_controller/step_q -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q -add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/count_q -add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/i_controller/mask_d -add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_pos_d -add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_pos_q -add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_col_offset_q -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_d -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_q -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_d -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_q -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/tile_x_d -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/tile_x_q -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/tile_y_d -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/tile_y_q -add wave -noupdate /ita_tb/dut/calc_en_q5 -add wave -noupdate /ita_tb/dut/calc_en_q6 -add wave -noupdate /ita_tb/dut/calc_en_q7 -add wave -noupdate /ita_tb/dut/calc_en_q8 -add wave -noupdate /ita_tb/dut/calc_en_q9 -add wave -noupdate /ita_tb/dut/calc_en_q10 -add wave -noupdate -group Requant /ita_tb/dut/i_controller/requant_add_i -add wave -noupdate -group Requant /ita_tb/dut/i_controller/requant_add_o -add wave -noupdate -group Bias /ita_tb/dut/inp_bias -add wave -noupdate -group Bias /ita_tb/dut/inp_bias_padded -add wave -noupdate -group Bias /ita_tb/dut/inp_bias_q1 -add wave -noupdate -group Bias /ita_tb/dut/inp_bias_q2 -add wave -noupdate /ita_tb/dut/calc_en_q4 -add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 -add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i -add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q -add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 -add wave -noupdate -radix binary -childformat {{{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[63]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[62]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[61]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[60]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[59]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[58]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[57]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[56]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[55]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[54]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[53]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[52]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[51]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[50]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[49]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[48]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[47]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[46]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[45]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[44]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[43]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[42]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[41]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[40]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[39]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[38]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[37]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[36]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[35]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[34]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[33]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[32]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[31]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[30]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[29]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[28]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[27]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[26]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[25]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[24]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[23]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[22]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[21]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[20]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[19]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[18]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[17]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[16]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[15]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[14]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[13]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[12]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[11]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[10]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[9]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[8]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[7]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[6]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[5]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[4]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[3]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[2]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[1]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[0]} -radix binary}} -subitemconfig {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[63]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[62]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[61]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[60]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[59]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[58]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[57]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[56]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[55]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[54]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[53]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[52]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[51]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[50]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[49]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[48]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[47]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[46]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[45]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[44]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[43]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[42]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[41]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[40]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[39]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[38]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[37]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[36]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[35]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[34]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[33]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[32]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[31]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[30]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[29]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[28]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[27]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[26]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[25]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[24]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[23]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[22]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[21]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[20]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[19]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[18]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[17]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[16]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[15]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[14]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[13]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[12]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[11]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[10]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[9]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[8]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[7]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[6]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[5]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[4]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[3]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[2]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[1]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[0]} {-height 16 -radix binary}} /ita_tb/dut/i_softmax_top/i_softmax/disable_col -add wave -noupdate /ita_tb/dut/i_inp2_mux/clk_i -add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/step_i -add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_i -add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/mask_i -add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/max_i -add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/max_o -add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i -add wave -noupdate -radix hexadecimal /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q -add wave -noupdate /ita_tb/dut/i_requantizer/clk_i -add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 -add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q -add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_d -add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_q -add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_d -add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_q -add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_d -add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_q -add wave -noupdate -radix binary /ita_tb/dut/i_softmax_top/i_softmax/disable_col -add wave -noupdate /ita_tb/dut/i_activation/data_q3 -add wave -noupdate -radix decimal /ita_tb/dut/inp_i -add wave -noupdate -expand -group {All in one Phase} -radix decimal -childformat {{{/ita_tb/dut/inp[63]} -radix decimal} {{/ita_tb/dut/inp[62]} -radix decimal} {{/ita_tb/dut/inp[61]} -radix decimal} {{/ita_tb/dut/inp[60]} -radix decimal} {{/ita_tb/dut/inp[59]} -radix decimal} {{/ita_tb/dut/inp[58]} -radix decimal} {{/ita_tb/dut/inp[57]} -radix decimal} {{/ita_tb/dut/inp[56]} -radix decimal} {{/ita_tb/dut/inp[55]} -radix decimal} {{/ita_tb/dut/inp[54]} -radix decimal} {{/ita_tb/dut/inp[53]} -radix decimal} {{/ita_tb/dut/inp[52]} -radix decimal} {{/ita_tb/dut/inp[51]} -radix decimal} {{/ita_tb/dut/inp[50]} -radix decimal} {{/ita_tb/dut/inp[49]} -radix decimal} {{/ita_tb/dut/inp[48]} -radix decimal} {{/ita_tb/dut/inp[47]} -radix decimal} {{/ita_tb/dut/inp[46]} -radix decimal} {{/ita_tb/dut/inp[45]} -radix decimal} {{/ita_tb/dut/inp[44]} -radix decimal} {{/ita_tb/dut/inp[43]} -radix decimal} {{/ita_tb/dut/inp[42]} -radix decimal} {{/ita_tb/dut/inp[41]} -radix decimal} {{/ita_tb/dut/inp[40]} -radix decimal} {{/ita_tb/dut/inp[39]} -radix decimal} {{/ita_tb/dut/inp[38]} -radix decimal} {{/ita_tb/dut/inp[37]} -radix decimal} {{/ita_tb/dut/inp[36]} -radix decimal} {{/ita_tb/dut/inp[35]} -radix decimal} {{/ita_tb/dut/inp[34]} -radix decimal} {{/ita_tb/dut/inp[33]} -radix decimal} {{/ita_tb/dut/inp[32]} -radix decimal} {{/ita_tb/dut/inp[31]} -radix decimal} {{/ita_tb/dut/inp[30]} -radix decimal} {{/ita_tb/dut/inp[29]} -radix decimal} {{/ita_tb/dut/inp[28]} -radix decimal} {{/ita_tb/dut/inp[27]} -radix decimal} {{/ita_tb/dut/inp[26]} -radix decimal} {{/ita_tb/dut/inp[25]} -radix decimal} {{/ita_tb/dut/inp[24]} -radix decimal} {{/ita_tb/dut/inp[23]} -radix decimal} {{/ita_tb/dut/inp[22]} -radix decimal} {{/ita_tb/dut/inp[21]} -radix decimal} {{/ita_tb/dut/inp[20]} -radix decimal} {{/ita_tb/dut/inp[19]} -radix decimal} {{/ita_tb/dut/inp[18]} -radix decimal} {{/ita_tb/dut/inp[17]} -radix decimal} {{/ita_tb/dut/inp[16]} -radix decimal} {{/ita_tb/dut/inp[15]} -radix decimal} {{/ita_tb/dut/inp[14]} -radix decimal} {{/ita_tb/dut/inp[13]} -radix decimal} {{/ita_tb/dut/inp[12]} -radix decimal} {{/ita_tb/dut/inp[11]} -radix decimal} {{/ita_tb/dut/inp[10]} -radix decimal} {{/ita_tb/dut/inp[9]} -radix decimal} {{/ita_tb/dut/inp[8]} -radix decimal} {{/ita_tb/dut/inp[7]} -radix decimal} {{/ita_tb/dut/inp[6]} -radix decimal} {{/ita_tb/dut/inp[5]} -radix decimal} {{/ita_tb/dut/inp[4]} -radix decimal} {{/ita_tb/dut/inp[3]} -radix decimal} {{/ita_tb/dut/inp[2]} -radix decimal} {{/ita_tb/dut/inp[1]} -radix decimal} {{/ita_tb/dut/inp[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/inp[63]} {-height 16 -radix decimal} {/ita_tb/dut/inp[62]} {-height 16 -radix decimal} {/ita_tb/dut/inp[61]} {-height 16 -radix decimal} {/ita_tb/dut/inp[60]} {-height 16 -radix decimal} {/ita_tb/dut/inp[59]} {-height 16 -radix decimal} {/ita_tb/dut/inp[58]} {-height 16 -radix decimal} {/ita_tb/dut/inp[57]} {-height 16 -radix decimal} {/ita_tb/dut/inp[56]} {-height 16 -radix decimal} {/ita_tb/dut/inp[55]} {-height 16 -radix decimal} {/ita_tb/dut/inp[54]} {-height 16 -radix decimal} {/ita_tb/dut/inp[53]} {-height 16 -radix decimal} {/ita_tb/dut/inp[52]} {-height 16 -radix decimal} {/ita_tb/dut/inp[51]} {-height 16 -radix decimal} {/ita_tb/dut/inp[50]} {-height 16 -radix decimal} {/ita_tb/dut/inp[49]} {-height 16 -radix decimal} {/ita_tb/dut/inp[48]} {-height 16 -radix decimal} {/ita_tb/dut/inp[47]} {-height 16 -radix decimal} {/ita_tb/dut/inp[46]} {-height 16 -radix decimal} {/ita_tb/dut/inp[45]} {-height 16 -radix decimal} {/ita_tb/dut/inp[44]} {-height 16 -radix decimal} {/ita_tb/dut/inp[43]} {-height 16 -radix decimal} {/ita_tb/dut/inp[42]} {-height 16 -radix decimal} {/ita_tb/dut/inp[41]} {-height 16 -radix decimal} {/ita_tb/dut/inp[40]} {-height 16 -radix decimal} {/ita_tb/dut/inp[39]} {-height 16 -radix decimal} {/ita_tb/dut/inp[38]} {-height 16 -radix decimal} {/ita_tb/dut/inp[37]} {-height 16 -radix decimal} {/ita_tb/dut/inp[36]} {-height 16 -radix decimal} {/ita_tb/dut/inp[35]} {-height 16 -radix decimal} {/ita_tb/dut/inp[34]} {-height 16 -radix decimal} {/ita_tb/dut/inp[33]} {-height 16 -radix decimal} {/ita_tb/dut/inp[32]} {-height 16 -radix decimal} {/ita_tb/dut/inp[31]} {-height 16 -radix decimal} {/ita_tb/dut/inp[30]} {-height 16 -radix decimal} {/ita_tb/dut/inp[29]} {-height 16 -radix decimal} {/ita_tb/dut/inp[28]} {-height 16 -radix decimal} {/ita_tb/dut/inp[27]} {-height 16 -radix decimal} {/ita_tb/dut/inp[26]} {-height 16 -radix decimal} {/ita_tb/dut/inp[25]} {-height 16 -radix decimal} {/ita_tb/dut/inp[24]} {-height 16 -radix decimal} {/ita_tb/dut/inp[23]} {-height 16 -radix decimal} {/ita_tb/dut/inp[22]} {-height 16 -radix decimal} {/ita_tb/dut/inp[21]} {-height 16 -radix decimal} {/ita_tb/dut/inp[20]} {-height 16 -radix decimal} {/ita_tb/dut/inp[19]} {-height 16 -radix decimal} {/ita_tb/dut/inp[18]} {-height 16 -radix decimal} {/ita_tb/dut/inp[17]} {-height 16 -radix decimal} {/ita_tb/dut/inp[16]} {-height 16 -radix decimal} {/ita_tb/dut/inp[15]} {-height 16 -radix decimal} {/ita_tb/dut/inp[14]} {-height 16 -radix decimal} {/ita_tb/dut/inp[13]} {-height 16 -radix decimal} {/ita_tb/dut/inp[12]} {-height 16 -radix decimal} {/ita_tb/dut/inp[11]} {-height 16 -radix decimal} {/ita_tb/dut/inp[10]} {-height 16 -radix decimal} {/ita_tb/dut/inp[9]} {-height 16 -radix decimal} {/ita_tb/dut/inp[8]} {-height 16 -radix decimal} {/ita_tb/dut/inp[7]} {-height 16 -radix decimal} {/ita_tb/dut/inp[6]} {-height 16 -radix decimal} {/ita_tb/dut/inp[5]} {-height 16 -radix decimal} {/ita_tb/dut/inp[4]} {-height 16 -radix decimal} {/ita_tb/dut/inp[3]} {-height 16 -radix decimal} {/ita_tb/dut/inp[2]} {-height 16 -radix decimal} {/ita_tb/dut/inp[1]} {-height 16 -radix decimal} {/ita_tb/dut/inp[0]} {-height 16 -radix decimal}} /ita_tb/dut/inp -add wave -noupdate -expand -group {All in one Phase} -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o -add wave -noupdate -expand -group {All in one Phase} -radix decimal /ita_tb/dut/inp1 -add wave -noupdate -radix unsigned /ita_tb/dut/inp1_q -add wave -noupdate -radix decimal /ita_tb/dut/i_accumulator/oup_i -add wave -noupdate -radix decimal -childformat {{{/ita_tb/dut/i_accumulator/result_d[15]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[14]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[13]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[12]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[11]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[10]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[9]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[8]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[7]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[6]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[5]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[4]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[3]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[2]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[1]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_accumulator/result_d[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[0]} {-height 16 -radix decimal}} /ita_tb/dut/i_accumulator/result_d -add wave -noupdate -radix decimal /ita_tb/dut/i_accumulator/result_o -add wave -noupdate -radix hexadecimal -childformat {{{/ita_tb/dut/i_activation/data_i[15]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[14]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[13]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[12]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[11]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[10]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[9]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[8]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[7]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[6]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[5]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[4]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[3]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[2]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[1]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_activation/data_i[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[0]} {-height 16 -radix decimal}} /ita_tb/dut/i_activation/data_i -add wave -noupdate /ita_tb/dut/i_activation/data_q1 -add wave -noupdate /ita_tb/dut/i_activation/data_q2 -add wave -noupdate /ita_tb/dut/i_activation/data_q3 -add wave -noupdate /ita_tb/dut/i_activation/data_q4 -add wave -noupdate /ita_tb/dut/i_activation/data_o -add wave -noupdate /ita_tb/dut/i_fifo/data_i -add wave -noupdate /ita_tb/dut/i_fifo/data_o -add wave -noupdate /ita_tb/dut/oup_o -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/clk_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/rst_ni -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mode_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/eps_mult_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/right_shift_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_q_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/result_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_o -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mult_signed -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/product -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_added -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_d -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_q -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q1 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q2 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q3 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q4 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_d -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_q -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/clk_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/rst_ni -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mode_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/eps_mult_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/right_shift_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_q_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/result_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_o -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mult_signed -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/product -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_added -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_d -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_q -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q1 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q2 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q3 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q4 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_d -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_q -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/clk_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/rst_ni -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mode_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/eps_mult_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/right_shift_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_q_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/result_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_o -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mult_signed -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/product -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_added -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_d -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_q -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q1 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q2 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q3 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q4 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_d -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/clk_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/rst_ni -add wave -noupdate -group Controller /ita_tb/dut/i_controller/ctrl_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_valid_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_ready_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/weight_valid_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/weight_ready_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_valid_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_ready_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/oup_valid_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/oup_ready_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/pop_softmax_fifo_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/soft_addr_div_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_done_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/calc_en_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_inner_tile_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/last_inner_tile_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_pad_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/calc_en_q1_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/count_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/count_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_count -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_pos_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_pos_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_col_offset_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_col_offset_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_x_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_x_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_y_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_y_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_tile_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_tile_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_soft_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_soft_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_padded -add wave -noupdate -group Controller /ita_tb/dut/i_controller/last_time -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_dim -add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_outer_dim -add wave -noupdate -group Controller /ita_tb/dut/i_controller/second_outer_dim -add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_outer_dim_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_outer_dim_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/second_outer_dim_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/second_outer_dim_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_fifo -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div_done_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div_done_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/clk_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/rst_ni -add wave -noupdate -group Controller /ita_tb/dut/i_controller/ctrl_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_valid_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_ready_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/weight_valid_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/weight_ready_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_valid_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_ready_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/oup_valid_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/oup_ready_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/pop_softmax_fifo_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/soft_addr_div_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_done_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/calc_en_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_inner_tile_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/last_inner_tile_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_pad_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/calc_en_q1_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/count_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/count_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_count -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_pos_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_pos_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_col_offset_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_col_offset_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_x_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_x_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_y_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_y_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_tile_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_tile_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_soft_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_soft_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_padded -add wave -noupdate -group Controller /ita_tb/dut/i_controller/last_time -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_dim -add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_outer_dim -add wave -noupdate -group Controller /ita_tb/dut/i_controller/second_outer_dim -add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_outer_dim_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_outer_dim_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/second_outer_dim_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/second_outer_dim_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_fifo -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div_done_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div_done_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/clk_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/rst_ni -add wave -noupdate -group Controller /ita_tb/dut/i_controller/ctrl_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_valid_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_ready_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/weight_valid_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/weight_ready_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_valid_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_ready_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/oup_valid_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/oup_ready_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/pop_softmax_fifo_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/soft_addr_div_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_done_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/calc_en_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_inner_tile_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/last_inner_tile_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_pad_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_o -add wave -noupdate -group Controller /ita_tb/dut/i_controller/calc_en_q1_i -add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/count_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/count_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_count -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_pos_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_pos_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_col_offset_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_col_offset_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_x_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_x_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_y_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_y_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_tile_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_tile_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_soft_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_soft_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_padded -add wave -noupdate -group Controller /ita_tb/dut/i_controller/last_time -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_dim -add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_outer_dim -add wave -noupdate -group Controller /ita_tb/dut/i_controller/second_outer_dim -add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_outer_dim_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_outer_dim_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/second_outer_dim_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/second_outer_dim_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_fifo -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div_done_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div_done_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_q -add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_d -add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/clk_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/rst_ni -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/ctrl_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/step_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/soft_addr_div_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/softmax_done_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_softmax_fifo_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_inp_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_oup_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_data_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_data_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/prev_max_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_data_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_data_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_x_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q3 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q4 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q3 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q4 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_diff -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_diff -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp_diff -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q3 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_full -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_empty -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/push_to_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_from_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_to_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_from_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_usage -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_row -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_col -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/clk_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/rst_ni -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/ctrl_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/step_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/soft_addr_div_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/softmax_done_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_softmax_fifo_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_inp_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_oup_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_data_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_data_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/prev_max_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_data_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_data_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_x_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q3 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q4 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q3 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q4 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_x_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_diff -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_diff -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp_diff -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q3 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_full -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_empty -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/push_to_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_from_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_to_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_from_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_usage -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_row -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_col -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/clk_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/rst_ni -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/ctrl_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/step_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/soft_addr_div_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/softmax_done_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_softmax_fifo_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_inp_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_oup_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_data_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_data_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/prev_max_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_data_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_data_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_x_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q3 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q4 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q3 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q4 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_x_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_diff -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_diff -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp_diff -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q3 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_full -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_empty -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/push_to_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_from_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_to_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_from_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_usage -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_row -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_col -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/clk_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/rst_ni -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_q_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_q_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_q_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/oup_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/inp_bias_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_o -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_en -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data_unused -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_en -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_data -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_d -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_q -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_d -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_q -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_d -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_q -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/clk_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/rst_ni -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_q_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_q_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_q_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/oup_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/inp_bias_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_o -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_en -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data_unused -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_en -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_data -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_d -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_q -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_d -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_q -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_d -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_q -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/clk_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/rst_ni -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_q_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_q_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_q_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/oup_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/inp_bias_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_o -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_en -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data_unused -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_en -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_data -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_d -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_q -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_d -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_q -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_d -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_q +add wave -noupdate sim:/ita_tb/dut/i_inp1_mux/clk_i +add wave -noupdate sim:/ita_tb/dut/i_inp1_mux/rst_ni +add wave -noupdate sim:/ita_tb/dut/i_inp1_mux/inp_i +add wave -noupdate sim:/ita_tb/dut/i_inp1_mux/inp1_o +add wave -noupdate sim:/ita_tb/dut/i_inp2_mux/clk_i +add wave -noupdate sim:/ita_tb/dut/i_inp2_mux/rst_ni +add wave -noupdate sim:/ita_tb/dut/i_inp2_mux/weight_i +add wave -noupdate sim:/ita_tb/dut/i_inp2_mux/inp2_o +add wave -noupdate sim:/ita_tb/dut/i_controller/ctrl_i +add wave -noupdate sim:/ita_tb/dut/oup_o +add wave -noupdate sim:/ita_tb/dut/inp1_q +add wave -noupdate sim:/ita_tb/dut/inp2_q +add wave -noupdate -expand -group {Masking Signals} -radix unsigned sim:/ita_tb/dut/i_controller/count_d +add wave -noupdate -expand -group {Masking Signals} -radix unsigned sim:/ita_tb/dut/i_controller/bias_count +add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_o +add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/disable_row +add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned sim:/ita_tb/dut/i_controller/mask_tile_x_pos_d +add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned sim:/ita_tb/dut/i_controller/mask_tile_x_pos_q +add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned sim:/ita_tb/dut/i_controller/mask_tile_y_pos_d +add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned sim:/ita_tb/dut/i_controller/mask_tile_y_pos_q +add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned sim:/ita_tb/dut/i_controller/first_outer_dim +add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/last_inner_tile_q6 +add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_controller/calc_en_o +add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/calc_en_q1 +add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/calc_en_q2 +add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/calc_en_q3 +add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/calc_en_q4 +add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/calc_en_q5 +add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/calc_en_q6 +add wave -noupdate -expand -group {Masking Signals} -expand -group {In Softmax Module} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_d +add wave -noupdate -expand -group {Masking Signals} -radix decimal sim:/ita_tb/dut/i_softmax_top/i_softmax/max_o +add wave -noupdate -expand -group {Masking Signals} -radix decimal sim:/ita_tb/dut/i_softmax_top/i_softmax/max_i +add wave -noupdate -expand -group {Masking Signals} -radix decimal vsim:/ita_tb/dut/i_softmax_top/i_softmax/max_i +add wave -noupdate -expand -group {Masking Signals} -radix decimal sim:/ita_tb/dut/i_requantizer/requant_oup_o +add wave -noupdate -expand -group {Masking Signals} -radix decimal sim:/ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q +add wave -noupdate -expand -group {Masking Signals} -radix decimal sim:/ita_tb/dut/i_softmax_top/i_softmax/prev_max_o +add wave -noupdate -expand -group {Masking Signals} -radix decimal -childformat {{{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[15]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[14]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[13]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[12]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[11]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[10]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[9]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[8]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[7]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[6]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[5]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[4]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[3]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[2]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[1]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[0]} {-height 16 -radix decimal}} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_diff +add wave -noupdate -expand -group {Masking Signals} -radix decimal vsim:/ita_tb/dut/i_softmax_top/i_softmax/shift_diff +add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/disable_shift +add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_controller/step_q +add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q +add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_inp2_mux/clk_i +add wave -noupdate -expand -group {Masking Signals} -radix unsigned sim:/ita_tb/dut/i_controller/count_q +add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 +add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_q2 +add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_q3 +add wave -noupdate -expand -group {Masking Signals} -radix binary sim:/ita_tb/dut/i_controller/mask_d +add wave -noupdate -expand -group {Masking Signals} -radix binary sim:/ita_tb/dut/mask +add wave -noupdate -expand -group {Masking Signals} -radix binary sim:/ita_tb/dut/mask_q1 +add wave -noupdate -expand -group {Masking Signals} -radix binary sim:/ita_tb/dut/mask_q2 +add wave -noupdate -expand -group {Masking Signals} -radix binary sim:/ita_tb/dut/mask_q3 +add wave -noupdate -expand -group {Masking Signals} -radix binary sim:/ita_tb/dut/mask_q4 +add wave -noupdate -expand -group {Masking Signals} -radix binary sim:/ita_tb/dut/mask_q5 +add wave -noupdate -expand -group {Masking Signals} -radix binary sim:/ita_tb/dut/mask_q6 +add wave -noupdate -expand -group {Masking Signals} -radix binary sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_i +add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_i +add wave -noupdate -expand -group {Masking Signals} vsim:/ita_tb/dut/i_softmax_top/i_softmax/max_i +add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_d +add wave -noupdate -expand -group {Masking Signals} vsim:/ita_tb/dut/i_softmax_top/i_softmax/shift_d +add wave -noupdate -expand -group {Masking Signals} -radix unsigned sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_q +add wave -noupdate -expand -group {Masking Signals} vsim:/ita_tb/dut/i_softmax_top/i_softmax/shift_q +add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_sum_d +add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_sum_q +add wave -noupdate -expand -group {Masking Signals} vsim:/ita_tb/dut/i_softmax_top/i_softmax/shift_sum_d +add wave -noupdate -expand -group {Masking Signals} vsim:/ita_tb/dut/i_softmax_top/i_softmax/shift_sum_q +add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/read_max_en_o +add wave -noupdate -expand -group {Masking Signals} -radix unsigned sim:/ita_tb/dut/i_softmax_top/i_softmax/read_max_addr_o +add wave -noupdate -expand -group {Masking Signals} -radix decimal sim:/ita_tb/dut/i_softmax_top/i_softmax/read_max_data_i +add wave -noupdate -expand -group {Masking Signals} vsim:/ita_tb/dut/i_softmax_top/i_softmax/read_max_en_o +add wave -noupdate -expand -group {Masking Signals} -radix unsigned vsim:/ita_tb/dut/i_softmax_top/i_softmax/read_max_addr_o +add wave -noupdate -expand -group {Masking Signals} -radix decimal vsim:/ita_tb/dut/i_softmax_top/i_softmax/read_max_data_i +add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/read_acc_data_i +add wave -noupdate -expand -group {Masking Signals} vsim:/ita_tb/dut/i_softmax_top/i_softmax/read_acc_data_i +add wave -noupdate -expand -group {Masking Signals} -expand sim:/ita_tb/dut/i_softmax_top/i_softmax/read_acc_en_o +add wave -noupdate -expand -group {Masking Signals} -expand vsim:/ita_tb/dut/i_softmax_top/i_softmax/read_acc_en_o +add wave -noupdate -expand -group {Masking Signals} -radix unsigned sim:/ita_tb/dut/i_softmax_top/i_softmax/read_acc_addr_o +add wave -noupdate -expand -group {Masking Signals} -radix unsigned vsim:/ita_tb/dut/i_softmax_top/i_softmax/read_acc_addr_o +add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_acc_en_o +add wave -noupdate -expand -group {Masking Signals} vsim:/ita_tb/dut/i_softmax_top/i_softmax/write_acc_en_o +add wave -noupdate -expand -group {Masking Signals} -radix unsigned sim:/ita_tb/dut/i_softmax_top/i_softmax/write_acc_addr_o +add wave -noupdate -expand -group {Masking Signals} -radix unsigned vsim:/ita_tb/dut/i_softmax_top/i_softmax/write_acc_addr_o +add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_acc_data_o +add wave -noupdate -expand -group {Masking Signals} vsim:/ita_tb/dut/i_softmax_top/i_softmax/write_acc_data_o +add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d +add wave -noupdate -expand -group {Masking Signals} vsim:/ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d +add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q +add wave -noupdate -expand -group {Masking Signals} vsim:/ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q +add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/step_i +add wave -noupdate -expand -group {Masking Signals} vsim:/ita_tb/dut/i_softmax_top/i_softmax/step_i +add wave -noupdate -expand -group {Masking Signals} -radix unsigned sim:/ita_tb/dut/i_softmax_top/i_softmax/count_d +add wave -noupdate -expand -group {Masking Signals} -radix unsigned vsim:/ita_tb/dut/i_softmax_top/i_softmax/count_d +add wave -noupdate -expand -group {Masking Signals} -radix unsigned sim:/ita_tb/dut/i_softmax_top/i_softmax/count_q1 +add wave -noupdate -expand -group {Masking Signals} -radix unsigned vsim:/ita_tb/dut/i_softmax_top/i_softmax/count_q1 +add wave -noupdate -expand -group {Masking Signals} -radix unsigned sim:/ita_tb/dut/i_softmax_top/i_softmax/count_q2 +add wave -noupdate -expand -group {Masking Signals} -radix unsigned vsim:/ita_tb/dut/i_softmax_top/i_softmax/count_q2 +add wave -noupdate -expand -group {Masking Signals} -radix unsigned sim:/ita_tb/dut/i_softmax_top/i_softmax/count_q3 +add wave -noupdate -expand -group {Masking Signals} -radix unsigned vsim:/ita_tb/dut/i_softmax_top/i_softmax/count_q3 +add wave -noupdate -expand -group {Masking Signals} -radix unsigned sim:/ita_tb/dut/i_softmax_top/i_softmax/count_q4 +add wave -noupdate -expand -group {Masking Signals} -radix unsigned vsim:/ita_tb/dut/i_softmax_top/i_softmax/count_q4 +add wave -noupdate -expand -group {Masking Signals} -radix unsigned sim:/ita_tb/dut/i_controller/mask_pos_d +add wave -noupdate -expand -group {Masking Signals} -radix unsigned sim:/ita_tb/dut/i_controller/mask_pos_q +add wave -noupdate -expand -group {Masking Signals} -radix unsigned sim:/ita_tb/dut/i_controller/mask_col_offset_q +add wave -noupdate -radix unsigned sim:/ita_tb/dut/i_controller/mask_tile_x_pos_d +add wave -noupdate -radix unsigned sim:/ita_tb/dut/i_controller/mask_tile_x_pos_q +add wave -noupdate -radix unsigned sim:/ita_tb/dut/i_controller/mask_tile_y_pos_d +add wave -noupdate -radix unsigned sim:/ita_tb/dut/i_controller/mask_tile_y_pos_q +add wave -noupdate -radix unsigned sim:/ita_tb/dut/i_controller/tile_x_d +add wave -noupdate -radix unsigned sim:/ita_tb/dut/i_controller/tile_x_q +add wave -noupdate -radix unsigned sim:/ita_tb/dut/i_controller/tile_y_d +add wave -noupdate -radix unsigned sim:/ita_tb/dut/i_controller/tile_y_q +add wave -noupdate sim:/ita_tb/dut/calc_en_q5 +add wave -noupdate sim:/ita_tb/dut/calc_en_q6 +add wave -noupdate sim:/ita_tb/dut/calc_en_q7 +add wave -noupdate sim:/ita_tb/dut/calc_en_q8 +add wave -noupdate sim:/ita_tb/dut/calc_en_q9 +add wave -noupdate sim:/ita_tb/dut/calc_en_q10 +add wave -noupdate -group Requant sim:/ita_tb/dut/i_controller/requant_add_i +add wave -noupdate -group Requant sim:/ita_tb/dut/i_controller/requant_add_o +add wave -noupdate -group Bias sim:/ita_tb/dut/inp_bias +add wave -noupdate -group Bias sim:/ita_tb/dut/inp_bias_padded +add wave -noupdate -group Bias sim:/ita_tb/dut/inp_bias_q1 +add wave -noupdate -group Bias sim:/ita_tb/dut/inp_bias_q2 +add wave -noupdate sim:/ita_tb/dut/calc_en_q4 +add wave -noupdate -radix unsigned sim:/ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 +add wave -noupdate sim:/ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i +add wave -noupdate sim:/ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q +add wave -noupdate -radix unsigned sim:/ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 +add wave -noupdate -radix binary -childformat {{{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[63]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[62]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[61]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[60]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[59]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[58]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[57]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[56]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[55]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[54]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[53]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[52]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[51]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[50]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[49]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[48]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[47]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[46]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[45]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[44]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[43]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[42]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[41]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[40]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[39]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[38]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[37]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[36]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[35]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[34]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[33]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[32]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[31]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[30]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[29]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[28]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[27]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[26]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[25]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[24]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[23]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[22]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[21]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[20]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[19]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[18]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[17]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[16]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[15]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[14]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[13]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[12]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[11]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[10]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[9]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[8]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[7]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[6]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[5]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[4]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[3]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[2]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[1]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[0]} -radix binary}} -subitemconfig {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[63]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[62]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[61]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[60]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[59]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[58]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[57]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[56]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[55]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[54]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[53]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[52]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[51]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[50]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[49]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[48]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[47]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[46]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[45]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[44]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[43]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[42]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[41]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[40]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[39]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[38]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[37]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[36]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[35]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[34]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[33]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[32]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[31]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[30]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[29]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[28]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[27]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[26]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[25]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[24]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[23]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[22]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[21]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[20]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[19]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[18]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[17]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[16]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[15]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[14]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[13]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[12]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[11]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[10]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[9]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[8]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[7]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[6]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[5]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[4]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[3]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[2]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[1]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[0]} {-height 16 -radix binary}} sim:/ita_tb/dut/i_softmax_top/i_softmax/disable_col +add wave -noupdate sim:/ita_tb/dut/i_inp2_mux/clk_i +add wave -noupdate -expand -group {In Softmax} sim:/ita_tb/dut/i_softmax_top/i_softmax/step_i +add wave -noupdate -expand -group {In Softmax} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_i +add wave -noupdate -expand -group {In Softmax} sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_i +add wave -noupdate -expand -group {In Softmax} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_i +add wave -noupdate -expand -group {In Softmax} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_o +add wave -noupdate sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i +add wave -noupdate -radix hexadecimal sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q +add wave -noupdate sim:/ita_tb/dut/i_requantizer/clk_i +add wave -noupdate -radix unsigned sim:/ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 +add wave -noupdate -radix unsigned sim:/ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q +add wave -noupdate sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_d +add wave -noupdate sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_q +add wave -noupdate sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_d +add wave -noupdate sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_q +add wave -noupdate sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_d +add wave -noupdate sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_q +add wave -noupdate -radix binary sim:/ita_tb/dut/i_softmax_top/i_softmax/disable_col +add wave -noupdate sim:/ita_tb/dut/i_activation/data_q3 +add wave -noupdate -radix decimal sim:/ita_tb/dut/inp_i +add wave -noupdate -expand -group {All in one Phase} -radix decimal -childformat {{{/ita_tb/dut/inp[63]} -radix decimal} {{/ita_tb/dut/inp[62]} -radix decimal} {{/ita_tb/dut/inp[61]} -radix decimal} {{/ita_tb/dut/inp[60]} -radix decimal} {{/ita_tb/dut/inp[59]} -radix decimal} {{/ita_tb/dut/inp[58]} -radix decimal} {{/ita_tb/dut/inp[57]} -radix decimal} {{/ita_tb/dut/inp[56]} -radix decimal} {{/ita_tb/dut/inp[55]} -radix decimal} {{/ita_tb/dut/inp[54]} -radix decimal} {{/ita_tb/dut/inp[53]} -radix decimal} {{/ita_tb/dut/inp[52]} -radix decimal} {{/ita_tb/dut/inp[51]} -radix decimal} {{/ita_tb/dut/inp[50]} -radix decimal} {{/ita_tb/dut/inp[49]} -radix decimal} {{/ita_tb/dut/inp[48]} -radix decimal} {{/ita_tb/dut/inp[47]} -radix decimal} {{/ita_tb/dut/inp[46]} -radix decimal} {{/ita_tb/dut/inp[45]} -radix decimal} {{/ita_tb/dut/inp[44]} -radix decimal} {{/ita_tb/dut/inp[43]} -radix decimal} {{/ita_tb/dut/inp[42]} -radix decimal} {{/ita_tb/dut/inp[41]} -radix decimal} {{/ita_tb/dut/inp[40]} -radix decimal} {{/ita_tb/dut/inp[39]} -radix decimal} {{/ita_tb/dut/inp[38]} -radix decimal} {{/ita_tb/dut/inp[37]} -radix decimal} {{/ita_tb/dut/inp[36]} -radix decimal} {{/ita_tb/dut/inp[35]} -radix decimal} {{/ita_tb/dut/inp[34]} -radix decimal} {{/ita_tb/dut/inp[33]} -radix decimal} {{/ita_tb/dut/inp[32]} -radix decimal} {{/ita_tb/dut/inp[31]} -radix decimal} {{/ita_tb/dut/inp[30]} -radix decimal} {{/ita_tb/dut/inp[29]} -radix decimal} {{/ita_tb/dut/inp[28]} -radix decimal} {{/ita_tb/dut/inp[27]} -radix decimal} {{/ita_tb/dut/inp[26]} -radix decimal} {{/ita_tb/dut/inp[25]} -radix decimal} {{/ita_tb/dut/inp[24]} -radix decimal} {{/ita_tb/dut/inp[23]} -radix decimal} {{/ita_tb/dut/inp[22]} -radix decimal} {{/ita_tb/dut/inp[21]} -radix decimal} {{/ita_tb/dut/inp[20]} -radix decimal} {{/ita_tb/dut/inp[19]} -radix decimal} {{/ita_tb/dut/inp[18]} -radix decimal} {{/ita_tb/dut/inp[17]} -radix decimal} {{/ita_tb/dut/inp[16]} -radix decimal} {{/ita_tb/dut/inp[15]} -radix decimal} {{/ita_tb/dut/inp[14]} -radix decimal} {{/ita_tb/dut/inp[13]} -radix decimal} {{/ita_tb/dut/inp[12]} -radix decimal} {{/ita_tb/dut/inp[11]} -radix decimal} {{/ita_tb/dut/inp[10]} -radix decimal} {{/ita_tb/dut/inp[9]} -radix decimal} {{/ita_tb/dut/inp[8]} -radix decimal} {{/ita_tb/dut/inp[7]} -radix decimal} {{/ita_tb/dut/inp[6]} -radix decimal} {{/ita_tb/dut/inp[5]} -radix decimal} {{/ita_tb/dut/inp[4]} -radix decimal} {{/ita_tb/dut/inp[3]} -radix decimal} {{/ita_tb/dut/inp[2]} -radix decimal} {{/ita_tb/dut/inp[1]} -radix decimal} {{/ita_tb/dut/inp[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/inp[63]} {-height 16 -radix decimal} {/ita_tb/dut/inp[62]} {-height 16 -radix decimal} {/ita_tb/dut/inp[61]} {-height 16 -radix decimal} {/ita_tb/dut/inp[60]} {-height 16 -radix decimal} {/ita_tb/dut/inp[59]} {-height 16 -radix decimal} {/ita_tb/dut/inp[58]} {-height 16 -radix decimal} {/ita_tb/dut/inp[57]} {-height 16 -radix decimal} {/ita_tb/dut/inp[56]} {-height 16 -radix decimal} {/ita_tb/dut/inp[55]} {-height 16 -radix decimal} {/ita_tb/dut/inp[54]} {-height 16 -radix decimal} {/ita_tb/dut/inp[53]} {-height 16 -radix decimal} {/ita_tb/dut/inp[52]} {-height 16 -radix decimal} {/ita_tb/dut/inp[51]} {-height 16 -radix decimal} {/ita_tb/dut/inp[50]} {-height 16 -radix decimal} {/ita_tb/dut/inp[49]} {-height 16 -radix decimal} {/ita_tb/dut/inp[48]} {-height 16 -radix decimal} {/ita_tb/dut/inp[47]} {-height 16 -radix decimal} {/ita_tb/dut/inp[46]} {-height 16 -radix decimal} {/ita_tb/dut/inp[45]} {-height 16 -radix decimal} {/ita_tb/dut/inp[44]} {-height 16 -radix decimal} {/ita_tb/dut/inp[43]} {-height 16 -radix decimal} {/ita_tb/dut/inp[42]} {-height 16 -radix decimal} {/ita_tb/dut/inp[41]} {-height 16 -radix decimal} {/ita_tb/dut/inp[40]} {-height 16 -radix decimal} {/ita_tb/dut/inp[39]} {-height 16 -radix decimal} {/ita_tb/dut/inp[38]} {-height 16 -radix decimal} {/ita_tb/dut/inp[37]} {-height 16 -radix decimal} {/ita_tb/dut/inp[36]} {-height 16 -radix decimal} {/ita_tb/dut/inp[35]} {-height 16 -radix decimal} {/ita_tb/dut/inp[34]} {-height 16 -radix decimal} {/ita_tb/dut/inp[33]} {-height 16 -radix decimal} {/ita_tb/dut/inp[32]} {-height 16 -radix decimal} {/ita_tb/dut/inp[31]} {-height 16 -radix decimal} {/ita_tb/dut/inp[30]} {-height 16 -radix decimal} {/ita_tb/dut/inp[29]} {-height 16 -radix decimal} {/ita_tb/dut/inp[28]} {-height 16 -radix decimal} {/ita_tb/dut/inp[27]} {-height 16 -radix decimal} {/ita_tb/dut/inp[26]} {-height 16 -radix decimal} {/ita_tb/dut/inp[25]} {-height 16 -radix decimal} {/ita_tb/dut/inp[24]} {-height 16 -radix decimal} {/ita_tb/dut/inp[23]} {-height 16 -radix decimal} {/ita_tb/dut/inp[22]} {-height 16 -radix decimal} {/ita_tb/dut/inp[21]} {-height 16 -radix decimal} {/ita_tb/dut/inp[20]} {-height 16 -radix decimal} {/ita_tb/dut/inp[19]} {-height 16 -radix decimal} {/ita_tb/dut/inp[18]} {-height 16 -radix decimal} {/ita_tb/dut/inp[17]} {-height 16 -radix decimal} {/ita_tb/dut/inp[16]} {-height 16 -radix decimal} {/ita_tb/dut/inp[15]} {-height 16 -radix decimal} {/ita_tb/dut/inp[14]} {-height 16 -radix decimal} {/ita_tb/dut/inp[13]} {-height 16 -radix decimal} {/ita_tb/dut/inp[12]} {-height 16 -radix decimal} {/ita_tb/dut/inp[11]} {-height 16 -radix decimal} {/ita_tb/dut/inp[10]} {-height 16 -radix decimal} {/ita_tb/dut/inp[9]} {-height 16 -radix decimal} {/ita_tb/dut/inp[8]} {-height 16 -radix decimal} {/ita_tb/dut/inp[7]} {-height 16 -radix decimal} {/ita_tb/dut/inp[6]} {-height 16 -radix decimal} {/ita_tb/dut/inp[5]} {-height 16 -radix decimal} {/ita_tb/dut/inp[4]} {-height 16 -radix decimal} {/ita_tb/dut/inp[3]} {-height 16 -radix decimal} {/ita_tb/dut/inp[2]} {-height 16 -radix decimal} {/ita_tb/dut/inp[1]} {-height 16 -radix decimal} {/ita_tb/dut/inp[0]} {-height 16 -radix decimal}} sim:/ita_tb/dut/inp +add wave -noupdate -expand -group {All in one Phase} -radix unsigned sim:/ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o +add wave -noupdate -expand -group {All in one Phase} -radix decimal sim:/ita_tb/dut/inp1 +add wave -noupdate -radix unsigned sim:/ita_tb/dut/inp1_q +add wave -noupdate -radix decimal sim:/ita_tb/dut/i_accumulator/oup_i +add wave -noupdate -radix decimal -childformat {{{/ita_tb/dut/i_accumulator/result_d[15]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[14]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[13]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[12]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[11]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[10]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[9]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[8]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[7]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[6]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[5]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[4]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[3]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[2]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[1]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_accumulator/result_d[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[0]} {-height 16 -radix decimal}} sim:/ita_tb/dut/i_accumulator/result_d +add wave -noupdate -radix decimal sim:/ita_tb/dut/i_accumulator/result_o +add wave -noupdate -radix hexadecimal -childformat {{{/ita_tb/dut/i_activation/data_i[15]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[14]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[13]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[12]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[11]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[10]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[9]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[8]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[7]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[6]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[5]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[4]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[3]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[2]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[1]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_activation/data_i[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[0]} {-height 16 -radix decimal}} sim:/ita_tb/dut/i_activation/data_i +add wave -noupdate sim:/ita_tb/dut/i_activation/data_q1 +add wave -noupdate sim:/ita_tb/dut/i_activation/data_q2 +add wave -noupdate sim:/ita_tb/dut/i_activation/data_q3 +add wave -noupdate sim:/ita_tb/dut/i_activation/data_q4 +add wave -noupdate sim:/ita_tb/dut/i_activation/data_o +add wave -noupdate sim:/ita_tb/dut/i_fifo/data_i +add wave -noupdate sim:/ita_tb/dut/i_fifo/data_o +add wave -noupdate sim:/ita_tb/dut/oup_o +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/clk_i +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/rst_ni +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/mode_i +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/eps_mult_i +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/right_shift_i +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/calc_en_i +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/calc_en_q_i +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/result_i +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/add_i +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/requant_oup_o +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/mult_signed +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/product +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/shifted_added +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/shifted_d +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/shifted_q +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/add_q1 +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/add_q2 +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/add_q3 +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/add_q4 +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/requant_oup_d +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/requant_oup_q +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/clk_i +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/rst_ni +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/mode_i +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/eps_mult_i +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/right_shift_i +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/calc_en_i +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/calc_en_q_i +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/result_i +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/add_i +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/requant_oup_o +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/mult_signed +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/product +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/shifted_added +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/shifted_d +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/shifted_q +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/add_q1 +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/add_q2 +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/add_q3 +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/add_q4 +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/requant_oup_d +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/requant_oup_q +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/clk_i +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/rst_ni +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/mode_i +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/eps_mult_i +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/right_shift_i +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/calc_en_i +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/calc_en_q_i +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/result_i +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/add_i +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/requant_oup_o +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/mult_signed +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/product +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/shifted_added +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/shifted_d +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/shifted_q +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/add_q1 +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/add_q2 +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/add_q3 +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/add_q4 +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/requant_oup_d +add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/requant_oup_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/clk_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/rst_ni +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/ctrl_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_valid_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_ready_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/weight_valid_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/weight_ready_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_valid_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_ready_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/oup_valid_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/oup_ready_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/pop_softmax_fifo_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/step_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/soft_addr_div_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_done_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/calc_en_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/first_inner_tile_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/last_inner_tile_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_x_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_y_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inner_tile_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/requant_add_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/requant_add_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_bias_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_bias_pad_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/busy_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/calc_en_q1_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/step_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/step_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/count_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/count_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_count +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_pos_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_pos_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_col_offset_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_col_offset_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inner_tile_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inner_tile_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_tile_x_pos_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_tile_x_pos_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_tile_y_pos_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_tile_y_pos_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_x_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_x_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_tile_x_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_tile_x_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_y_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_y_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_tile_y_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_tile_y_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_tile_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_tile_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/ongoing_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/ongoing_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/ongoing_soft_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/ongoing_soft_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_bias +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_bias_padded +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/last_time +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inner_tile_dim +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/first_outer_dim +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/second_outer_dim +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/first_outer_dim_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/first_outer_dim_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/second_outer_dim_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/second_outer_dim_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_fifo +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_div +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_div_done_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_div_done_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/busy_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/busy_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/requant_add_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/requant_add_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/clk_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/rst_ni +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/ctrl_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_valid_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_ready_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/weight_valid_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/weight_ready_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_valid_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_ready_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/oup_valid_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/oup_ready_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/pop_softmax_fifo_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/step_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/soft_addr_div_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_done_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/calc_en_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/first_inner_tile_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/last_inner_tile_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_x_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_y_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inner_tile_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/requant_add_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/requant_add_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_bias_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_bias_pad_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/busy_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/calc_en_q1_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/step_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/step_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/count_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/count_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_count +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_pos_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_pos_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_col_offset_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_col_offset_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inner_tile_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inner_tile_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_tile_x_pos_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_tile_x_pos_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_tile_y_pos_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_tile_y_pos_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_x_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_x_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_tile_x_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_tile_x_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_y_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_y_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_tile_y_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_tile_y_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_tile_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_tile_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/ongoing_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/ongoing_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/ongoing_soft_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/ongoing_soft_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_bias +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_bias_padded +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/last_time +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inner_tile_dim +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/first_outer_dim +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/second_outer_dim +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/first_outer_dim_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/first_outer_dim_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/second_outer_dim_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/second_outer_dim_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_fifo +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_div +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_div_done_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_div_done_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/busy_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/busy_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/requant_add_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/requant_add_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/clk_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/rst_ni +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/ctrl_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_valid_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_ready_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/weight_valid_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/weight_ready_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_valid_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_ready_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/oup_valid_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/oup_ready_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/pop_softmax_fifo_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/step_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/soft_addr_div_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_done_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/calc_en_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/first_inner_tile_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/last_inner_tile_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_x_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_y_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inner_tile_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/requant_add_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/requant_add_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_bias_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_bias_pad_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/busy_o +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/calc_en_q1_i +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/step_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/step_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/count_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/count_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_count +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_pos_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_pos_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_col_offset_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_col_offset_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inner_tile_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inner_tile_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_tile_x_pos_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_tile_x_pos_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_tile_y_pos_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_tile_y_pos_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_x_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_x_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_tile_x_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_tile_x_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_y_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_y_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_tile_y_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_tile_y_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_tile_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_tile_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/ongoing_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/ongoing_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/ongoing_soft_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/ongoing_soft_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_bias +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_bias_padded +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/last_time +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inner_tile_dim +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/first_outer_dim +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/second_outer_dim +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/first_outer_dim_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/first_outer_dim_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/second_outer_dim_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/second_outer_dim_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_fifo +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_div +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_div_done_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_div_done_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/busy_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/busy_q +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/requant_add_d +add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/requant_add_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/clk_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/rst_ni +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/ctrl_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/requant_oup_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/soft_addr_div_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/softmax_done_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/pop_softmax_fifo_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/inp_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_inp_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_valid_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_ready_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_valid_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_ready_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_oup_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/prev_max_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/read_max_en_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/read_max_addr_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/read_max_data_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_max_en_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_max_addr_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_max_data_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_x_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_y_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_q1 +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_q2 +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_q3 +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_q4 +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_y_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_soft_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_div_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_div_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/addr_div_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/addr_div_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_read_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_read_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_write_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_write_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_diff +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_diff +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_inp +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_inp_diff +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/fifo_full +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/fifo_empty +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/push_to_fifo +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/pop_from_fifo +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/data_to_fifo +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/data_from_fifo +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/fifo_usage +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/disable_shift +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/disable_row +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/disable_col +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/clk_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/rst_ni +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/ctrl_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/step_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/requant_oup_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/soft_addr_div_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/softmax_done_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/pop_softmax_fifo_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/inp_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_inp_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_valid_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_ready_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_valid_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_ready_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_oup_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/read_acc_en_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/read_acc_addr_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/read_acc_data_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_acc_en_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_acc_addr_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_acc_data_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/prev_max_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_max_en_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_max_addr_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_max_data_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_x_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_y_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_q1 +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_q2 +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_q3 +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_q4 +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_q1 +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_q2 +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_q3 +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_q4 +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_x_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_y_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_soft_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_div_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_div_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/addr_div_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/addr_div_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_read_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_read_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_write_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_write_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_diff +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_sum_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_sum_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_diff +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_inp +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_inp_diff +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_q2 +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_q3 +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/fifo_full +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/fifo_empty +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/push_to_fifo +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/pop_from_fifo +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/data_to_fifo +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/data_from_fifo +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/fifo_usage +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/disable_shift +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/disable_row +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/disable_col +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/clk_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/rst_ni +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/ctrl_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/step_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/requant_oup_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/soft_addr_div_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/softmax_done_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/pop_softmax_fifo_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/inp_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_inp_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_valid_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_ready_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_valid_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_ready_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_oup_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/read_acc_en_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/read_acc_addr_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/read_acc_data_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_acc_en_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_acc_addr_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_acc_data_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/prev_max_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/read_max_en_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/read_max_addr_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/read_max_data_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_max_en_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_max_addr_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_max_data_o +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_x_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_y_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_i +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_q1 +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_q2 +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_q3 +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_q4 +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_q1 +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_q2 +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_q3 +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_q4 +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_x_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_y_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_soft_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_div_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_div_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/addr_div_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/addr_div_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_read_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_read_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_write_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_write_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_diff +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_sum_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_sum_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_diff +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_inp +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_inp_diff +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_d +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_q2 +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_q3 +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/fifo_full +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/fifo_empty +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/push_to_fifo +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/pop_from_fifo +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/data_to_fifo +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/data_from_fifo +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/fifo_usage +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/disable_shift +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/disable_row +add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/disable_col +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/clk_i +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/rst_ni +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/calc_en_i +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/calc_en_q_i +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/first_tile_i +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/first_tile_q_i +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/last_tile_i +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/last_tile_q_i +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/oup_i +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/inp_bias_i +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/result_o +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_en +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_addr +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_data +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_data_unused +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/write_en +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/write_addr +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/write_data +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_addr_d +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_addr_q +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/write_addr_d +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/write_addr_q +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/result_d +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/result_q +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/clk_i +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/rst_ni +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/calc_en_i +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/calc_en_q_i +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/first_tile_i +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/first_tile_q_i +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/last_tile_i +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/last_tile_q_i +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/oup_i +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/inp_bias_i +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/result_o +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_en +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_addr +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_data +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_data_unused +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/write_en +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/write_addr +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/write_data +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_addr_d +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_addr_q +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/write_addr_d +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/write_addr_q +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/result_d +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/result_q +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/clk_i +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/rst_ni +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/calc_en_i +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/calc_en_q_i +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/first_tile_i +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/first_tile_q_i +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/last_tile_i +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/last_tile_q_i +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/oup_i +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/inp_bias_i +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/result_o +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_en +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_addr +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_data +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_data_unused +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/write_en +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/write_addr +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/write_data +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_addr_d +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_addr_q +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/write_addr_d +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/write_addr_q +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/result_d +add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/result_q TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {10400600 ps} 1} {{Cursor 2} {10358978 ps} 0} -quietly wave cursor active 2 -configure wave -namecolwidth 150 -configure wave -valuecolwidth 100 +WaveRestoreCursors {{Cursor 1} {5124600 ps} 1} {{Cursor 2} {5097000 ps} 1} {63 {3866973 ps} 1} {127 {4124941 ps} 1} {191 {4374986 ps} 1} {255 {4820989 ps} 1} {{Cursor 7} {4818977 ps} 0} +quietly wave cursor active 7 +configure wave -namecolwidth 189 +configure wave -valuecolwidth 165 configure wave -justifyvalue left configure wave -signalnamewidth 1 configure wave -snapdistance 10 @@ -788,4 +814,8 @@ configure wave -griddelta 40 configure wave -timeline 0 configure wave -timelineunits ns update -WaveRestoreZoom {10355645 ps} {10373942 ps} +WaveRestoreZoom {4810718 ps} {4831365 ps} + + + + diff --git a/src/ita_controller.sv b/src/ita_controller.sv index bbddedf..d60193e 100644 --- a/src/ita_controller.sv +++ b/src/ita_controller.sv @@ -406,7 +406,7 @@ module ita_controller end UpperTriangular: begin if (step_q == QK) begin - if (mask_tile_x_pos_q == tile_x_q && mask_tile_y_pos_q == tile_y_q) begin + if (mask_tile_x_pos_q == tile_x_q && mask_tile_y_pos_q == tile_y_q && last_inner_tile_o == 1'b1) begin if (count_q == ((M*M/N)-1)) begin mask_tile_x_pos_d = mask_tile_x_pos_q + 1'b1; end @@ -431,11 +431,11 @@ module ita_controller mask_d[i] = 1'b1; end end - end else if (mask_tile_x_pos_q == tile_x_q && mask_tile_y_pos_q != tile_y_q) begin + end else if (mask_tile_x_pos_q <= tile_x_q && mask_tile_y_pos_q != tile_y_q && last_inner_tile_o == 1'b1) begin for (int i = 0; i < N; i++) begin mask_d[i] = 1'b1; end - end else if (mask_tile_x_pos_q != tile_x_q && mask_tile_y_pos_q == tile_y_q) begin + end else if (mask_tile_x_pos_q != tile_x_q && mask_tile_y_pos_q == tile_y_q && last_inner_tile_o == 1'b1) begin for (int i = 0; i < N; i++) begin mask_d[i] = 1'b0; end @@ -505,10 +505,10 @@ module ita_controller second_outer_dim_q <= second_outer_dim_d; if (calc_en_o) begin mask_pos_q <= mask_pos_d; - mask_q <= mask_d; mask_tile_x_pos_q <= mask_tile_x_pos_d; mask_tile_y_pos_q <= mask_tile_y_pos_d; end + mask_q <= mask_d; mask_col_offset_q <= mask_col_offset_d; end end diff --git a/src/ita_softmax.sv b/src/ita_softmax.sv index 993ea94..b81e4a3 100644 --- a/src/ita_softmax.sv +++ b/src/ita_softmax.sv @@ -51,7 +51,7 @@ module ita_softmax counter_t inner_tile_q; counter_t tile_x_q, tile_y_q; counter_t mask_tile_x_d, mask_tile_x_q, mask_tile_y_d, mask_tile_y_q; - counter_t mask_tile_d, mask_tile_q; + counter_t mask_tile_outer_dim_d, mask_tile_outer_dim_q; logic unsigned [SoftmaxAccDataWidth-1:0] exp_sum_d, exp_sum_q; counter_t count_soft_d, count_soft_q1, count_soft_q2, count_soft_mask_q; @@ -125,7 +125,7 @@ module ita_softmax softmax_done_o = 0; mask_tile_x_d = mask_tile_x_q; mask_tile_y_d = mask_tile_y_q; - mask_tile_d = mask_tile_q; + mask_tile_outer_dim_d = mask_tile_outer_dim_q; //************ Accumulation ************// @@ -187,8 +187,8 @@ module ita_softmax write_max_addr_o = count_q3; write_max_data_o = max_q; for (int i = 0; i < N; i++) begin - if (shift_d[i] != 4'hF) - exp_sum_d += unsigned'(9'h100)>>shift_q[i]; + // if (shift_d[i] != 4'hF) + exp_sum_d += unsigned'(9'h100)>>shift_q[i]; end if (tile_q3 != '0 || count_q3>=M) begin // If not first part of the first row exp_sum_d += ( unsigned'(read_acc_data_i[0]) >> shift_sum_q); @@ -248,15 +248,18 @@ module ita_softmax end if (calc_stream_soft_en_q) begin if (count_soft_mask_q == (((M*M)/N)-1)) begin - mask_tile_d = mask_tile_q + 1; - if (mask_tile_x_q == (ctrl_i.tile_s-1)) begin + if (mask_tile_x_q == (ctrl_i.tile_s - 1)) begin mask_tile_x_d = '0; - mask_tile_y_d = mask_tile_y_q + 1; + mask_tile_outer_dim_d = mask_tile_outer_dim_q + 1; + if (mask_tile_outer_dim_q == (ctrl_i.tile_p - 1)) begin + mask_tile_outer_dim_d = '0; + mask_tile_y_d = mask_tile_y_q + 1; + end end else begin mask_tile_x_d = mask_tile_x_q + 1; end - if (mask_tile_d == ctrl_i.tile_s * ctrl_i.tile_s) begin - mask_tile_d = '0; + if (mask_tile_y_q == ctrl_i.tile_s) begin + mask_tile_outer_dim_d = '0; mask_tile_x_d = '0; mask_tile_y_d = '0; end @@ -269,6 +272,7 @@ module ita_softmax if ((inner_tile_q*M + i) >= ctrl_i.seq_length) begin disable_col[i] = 1'b1; end else begin + disable_col[i] = 1'b0; case (ctrl_i.mask_type) UpperTriangular: begin // (ctrl_i.mask_start_index / M) -> tile where the masking starts @@ -305,7 +309,6 @@ module ita_softmax endcase end - if (disable_col[i]) begin inp_stream_soft_o[i] = '0; end else begin @@ -327,7 +330,7 @@ module ita_softmax tile_y_q <= '0; mask_tile_x_q <= '0; mask_tile_y_q <= '0; - mask_tile_q <= '0; + mask_tile_outer_dim_q <= '0; tile_q4 <= '0; tile_q3 <= '0; tile_q2 <= '0; @@ -368,7 +371,7 @@ module ita_softmax end mask_tile_x_q <= mask_tile_x_d; mask_tile_y_q <= mask_tile_y_d; - mask_tile_q <= mask_tile_d; + mask_tile_outer_dim_q <= mask_tile_outer_dim_d; count_div_q <= count_div_d; div_read_q <= div_read_d; div_write_q <= div_write_d; From 2841115e2c6f843c31e862e2ae53a4bccd378de4 Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Wed, 4 Dec 2024 18:56:55 +0100 Subject: [PATCH 45/60] Upper triangular mask works for multiple tiles --- Makefile | 4 +- PyITA/A_stream_soft_in_0.txt | 16384 --------------------------------- PyITA/ITA.py | 48 +- src/ita_controller.sv | 76 +- src/ita_softmax.sv | 4 +- testGenerator.py | 2 +- 6 files changed, 103 insertions(+), 16415 deletions(-) delete mode 100644 PyITA/A_stream_soft_in_0.txt diff --git a/Makefile b/Makefile index 9ea7478..ce7f2e0 100644 --- a/Makefile +++ b/Makefile @@ -37,9 +37,9 @@ else endif mask ?= none -ifeq ($(mask), Upper_Triangular) +ifeq ($(mask), upper_triangular) mask_int = 1 -else ifeq ($(mask), Lower_Triangular) +else ifeq ($(mask), lower_triangular) mask_int = 2 else mask_int = 0 diff --git a/PyITA/A_stream_soft_in_0.txt b/PyITA/A_stream_soft_in_0.txt deleted file mode 100644 index 23f2a20..0000000 --- a/PyITA/A_stream_soft_in_0.txt +++ /dev/null @@ -1,16384 +0,0 @@ -127 -93 --128 --87 --6 -127 --115 -127 --128 --128 -127 -127 --13 --25 --126 --128 -109 -33 --90 --128 --128 --128 -16 -127 --20 --128 --128 -127 -8 -127 --102 --128 --16 -127 --128 -123 -127 --108 -127 --14 -108 -127 -127 --96 -61 --128 --128 -127 -82 -127 --128 -127 --111 --128 -100 -127 -127 --128 --100 -127 --128 --60 --55 -13 -127 --128 -111 -51 -127 -127 -107 -127 --128 --128 -127 --64 -5 -13 -127 --128 --128 --128 -35 --91 -127 --128 --88 -127 -127 -47 --91 -127 -127 -127 -99 -127 --124 -54 -21 -12 -127 -127 -127 -45 --128 -127 -96 --128 -127 --128 -112 -2 -11 --6 --128 --127 --128 --13 -127 --4 -127 --34 -127 -127 --128 -39 -127 -127 -38 -127 --128 -107 --96 -127 --82 --57 --128 -127 -67 -55 --128 --125 --37 --24 -127 -98 -30 -69 -7 --128 -127 -127 --128 -74 --128 --128 --128 -127 -38 --128 --5 -127 --128 -127 --99 --128 --128 -28 -74 -91 -127 -70 --12 -127 -61 -108 -47 -49 -127 -127 --128 -127 --128 -100 --128 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self.S, self.S), fill_value=False, dtype='bool') + if (self.mask == 'upper_triangular'): + if (0 < index and index < self.S): + for h in range(self.Mask.shape[0]): + for i in range(self.Mask.shape[1]): + for j in range((i + index), self.Mask.shape[2]): + self.Mask[h][i][j] = True + else: + raise ValueError("Index is out of bounds") + elif(self.mask == 'lower_triangular'): + if (0 < index and index < self.S): + for h in range(self.Mask.shape[0]): + for i in range(index, self.Mask.shape[1]): + for j in range((i-(index-1))): + self.Mask[h][i][j] = True + else: + raise ValueError("Index is out of bounds") + elif(self.mask == 'none'): + pass + else: + raise ValueError("Mask not supported") + + + def step4_QK(self, no_partial_softmax, index): self.A = np.array( [np.matmul(self.Qp_requant[i], np.transpose(self.Kp_requant[i]), dtype = np.int32) for i in range(self.H)]) self.A = np.clip(self.A, -2**(self.WO - 1), 2**(self.WO - 1) - 1) self.A_requant = requantize(self.A, self.requant_eps_mult[3], self.requant_right_shift[3], self.requant_add[3]) - self.Mask = np.full((self.H, self.S, self.S), fill_value=False, dtype='bool') - - #Adjustments for Masked Attention - if (mask == 'Upper_Triangular'): - print(self.Mask.shape) - for h in range(self.Mask.shape[0]): - for i in range(self.Mask.shape[1]): - for j in range((i + index), self.Mask.shape[2]): - self.Mask[h][i][j] = True - elif(mask == 'Lower_Triangular'): - pass - elif(mask == 'none'): - pass - else: - raise ValueError("Mask not supported") + self.apply_mask(index) print(self.Mask) @@ -1105,7 +1117,7 @@ def generateTestVectors(path, **kwargs): export_snitch_cluster = kwargs['export_snitch_cluster'] export_mempool = kwargs['export_mempool'] - acc1 = Transformer(s, p, e, f, h, bias = bias, path = path, activation = activation) + acc1 = Transformer(s, p, e, f, h, bias = bias, path = path, activation = activation, mask = mask) if kwargs['verbose']: print("=> Generating test vectors...") @@ -1113,7 +1125,7 @@ def generateTestVectors(path, **kwargs): acc1.step1_Qp() acc1.step2_Kp() acc1.step3_Vp() - acc1.step4_QK(kwargs['no_partial_softmax'], mask, index) + acc1.step4_QK(kwargs['no_partial_softmax'], index=index) acc1.step5_AV() acc1.step6_O() acc1.step7_Osum() diff --git a/src/ita_controller.sv b/src/ita_controller.sv index d60193e..74cb424 100644 --- a/src/ita_controller.sv +++ b/src/ita_controller.sv @@ -98,6 +98,7 @@ module ita_controller mask_col_offset_d = (step_q == QK || step_q == AV) ? mask_col_offset_q : ((ctrl_i.mask_start_index) & (N-1)); mask_pos_d = (step_q == QK || step_q == AV) ? mask_pos_q : ((((ctrl_i.mask_start_index)/N)*M) & ((M*M/N)-1)); mask_tile_x_pos_d = (step_q == QK || step_q == AV) ? mask_tile_x_pos_q : ((ctrl_i.mask_start_index) / M); + inp_bias = inp_bias_i; mask_tile_y_pos_d = mask_tile_y_pos_q; mask_d = mask_q; @@ -360,15 +361,13 @@ module ita_controller end endcase - inp_bias = inp_bias_i; - requant_add_d = requant_add; - bias_count = (count_q == 0) ? 255 : count_q - 1; + bias_count = (count_q == 0) ? ((M*M/N)-1) : count_q - 1; bias_tile_x_d = (count_q == 0) ? bias_tile_x_q : tile_x_q; bias_tile_y_d = (count_q == 0) ? bias_tile_y_q : tile_y_q; first_outer_dim_d = (count_q == 0) ? first_outer_dim_q : first_outer_dim; second_outer_dim_d = (count_q == 0) ? second_outer_dim_q : second_outer_dim; - if ((step_q != Idle && step_q != MatMul) || (step_q == Idle && bias_count == 255)) begin + if ((step_q != Idle && step_q != MatMul) || (step_q == Idle && bias_count == ((M*M/N)-1))) begin if (inner_tile_q == inner_tile_dim) begin last_inner_tile_o = 1'b1; end @@ -402,9 +401,17 @@ module ita_controller end case (ctrl_i.mask_type) None: begin - + mask_col_offset_d = '0; + mask_tile_x_pos_d = '0; + mask_tile_y_pos_d = '0; + mask_pos_d = '0; + mask_d = '0; end UpperTriangular: begin + mask_col_offset_d = (step_q == QK || step_q == AV) ? mask_col_offset_q : ((ctrl_i.mask_start_index) & (N-1)); + mask_pos_d = (step_q == QK || step_q == AV) ? mask_pos_q : ((((ctrl_i.mask_start_index)/N)*M) & ((M*M/N)-1)); + mask_tile_x_pos_d = (step_q == QK || step_q == AV) ? mask_tile_x_pos_q : ((ctrl_i.mask_start_index) / M); + if (step_q == QK) begin if (mask_tile_x_pos_q == tile_x_q && mask_tile_y_pos_q == tile_y_q && last_inner_tile_o == 1'b1) begin if (count_q == ((M*M/N)-1)) begin @@ -415,8 +422,17 @@ module ita_controller mask_tile_y_pos_d = tile_y_q + 1'b1; mask_tile_x_pos_d = tile_x_q; mask_pos_d = ((count_q + (((ctrl_i.tile_s * (M*M/N)) - M) + 1)) & ((M*M/N)-1)); - end - if (((count_q + mask_col_offset_q) & (N-1)) == (N-1)) begin + end else if ((count_q & (M-1)) == (M-1) && (((count_q + mask_col_offset_q) & (N-1)) == (N-1))) begin + if ((count_q / M) == ((M/N)-1)) begin + mask_tile_y_pos_d = tile_y_q + 1'b1; + mask_tile_x_pos_d = tile_x_q + 1'b1; + mask_pos_d = ((count_q + ((ctrl_i.tile_s * (M*M/N)) + 1)) & ((M*M/N)-1)); + end else begin + mask_tile_y_pos_d = tile_y_q + 1'b1; + mask_tile_x_pos_d = tile_x_q; + mask_pos_d = ((count_q + ((ctrl_i.tile_s * (M*M/N)) + 1)) & ((M*M/N)-1)); + end + end else if (((count_q + mask_col_offset_q) & (N-1)) == (N-1)) begin mask_pos_d = (mask_pos_q + (N - ((mask_pos_q + mask_col_offset_q) & (N-1))) + M) & ((M*M/N)-1); end for (int i = 0; i < N; i++) begin @@ -443,7 +459,51 @@ module ita_controller end end LowerTriangular: begin - + if (step_q == QK) begin + if (mask_tile_x_pos_q == tile_x_q && mask_tile_y_pos_q == tile_y_q && last_inner_tile_o == 1'b1) begin + if (count_q == ((M*M/N)-1)) begin + mask_tile_x_pos_d = mask_tile_x_pos_q + 1'b1; + end + if ((count_q >= mask_pos_q) && (count_q < (mask_pos_q + N))) begin + if ((count_q & (M-1)) == (M-1) && !(((count_q + mask_col_offset_q) & (N-1)) == (N-1))) begin + mask_tile_y_pos_d = tile_y_q + 1'b1; + mask_tile_x_pos_d = tile_x_q; + mask_pos_d = ((count_q + (((ctrl_i.tile_s * (M*M/N)) - M) + 1)) & ((M*M/N)-1)); + end else if ((count_q & (M-1)) == (M-1) && (((count_q + mask_col_offset_q) & (N-1)) == (N-1))) begin + if ((count_q / M) == ((M/N)-1)) begin + mask_tile_y_pos_d = tile_y_q + 1'b1; + mask_tile_x_pos_d = tile_x_q + 1'b1; + mask_pos_d = ((count_q + ((ctrl_i.tile_s * (M*M/N)) + 1)) & ((M*M/N)-1)); + end else begin + mask_tile_y_pos_d = tile_y_q + 1'b1; + mask_tile_x_pos_d = tile_x_q; + mask_pos_d = ((count_q + ((ctrl_i.tile_s * (M*M/N)) + 1)) & ((M*M/N)-1)); + end + end else if (((count_q + mask_col_offset_q) & (N-1)) == (N-1)) begin + mask_pos_d = (mask_pos_q + (N - ((mask_pos_q + mask_col_offset_q) & (N-1))) + M) & ((M*M/N)-1); + end + for (int i = 0; i < N; i++) begin + if (((count_q + mask_col_offset_q) & (N-1)) <= i) begin + mask_d[i] = 1'b1; + end else begin + mask_d[i] = 1'b0; + end + end + end else if ((count_q & (M-1)) < (mask_pos_q & (M-1))) begin + for (int i = 0; i < N; i++) begin + mask_d[i] = 1'b1; + end + end + end else if (mask_tile_x_pos_q <= tile_x_q && mask_tile_y_pos_q != tile_y_q && last_inner_tile_o == 1'b1) begin + for (int i = 0; i < N; i++) begin + mask_d[i] = 1'b1; + end + end else if (mask_tile_x_pos_q != tile_x_q && mask_tile_y_pos_q == tile_y_q && last_inner_tile_o == 1'b1) begin + for (int i = 0; i < N; i++) begin + mask_d[i] = 1'b0; + end + end + end end endcase diff --git a/src/ita_softmax.sv b/src/ita_softmax.sv index b81e4a3..ce857b9 100644 --- a/src/ita_softmax.sv +++ b/src/ita_softmax.sv @@ -187,8 +187,8 @@ module ita_softmax write_max_addr_o = count_q3; write_max_data_o = max_q; for (int i = 0; i < N; i++) begin - // if (shift_d[i] != 4'hF) - exp_sum_d += unsigned'(9'h100)>>shift_q[i]; + if (shift_q[i] != 4'hF) + exp_sum_d += unsigned'(9'h100)>>shift_q[i]; end if (tile_q3 != '0 || count_q3>=M) begin // If not first part of the first row exp_sum_d += ( unsigned'(read_acc_data_i[0]) >> shift_sum_q); diff --git a/testGenerator.py b/testGenerator.py index 26b43b6..fc3f002 100644 --- a/testGenerator.py +++ b/testGenerator.py @@ -108,7 +108,7 @@ class ArgumentDefaultMetavarTypeFormatter(argparse.ArgumentDefaultsHelpFormatter default = 'none', type = str, help = 'Attention-Mask', - choices = ['none', 'Upper_Triangular', 'Lower_Triangular']) + choices = ['none', 'upper_triangular', 'lower_triangular']) self.group1.add_argument('-I', default = 1, type = int, help = 'Masking starting index') self.group1.add_argument('--no-partial-softmax', action = 'store_true', From 5612e8d569bc9efd27a3a427aff547cd485b5e80 Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Thu, 5 Dec 2024 17:28:21 +0100 Subject: [PATCH 46/60] All triangular mask shapes work --- modelsim/sim_ita_tb_wave_important.tcl | 1579 ++++++++++++------------ src/ita_controller.sv | 23 +- src/ita_softmax.sv | 33 +- 3 files changed, 806 insertions(+), 829 deletions(-) diff --git a/modelsim/sim_ita_tb_wave_important.tcl b/modelsim/sim_ita_tb_wave_important.tcl index 7d52f26..196e80f 100644 --- a/modelsim/sim_ita_tb_wave_important.tcl +++ b/modelsim/sim_ita_tb_wave_important.tcl @@ -1,807 +1,778 @@ onerror {resume} -quietly set dataset_list [list vsim sim] -if {[catch {datasetcheck $dataset_list}]} {abort} quietly WaveActivateNextPane {} 0 -add wave -noupdate sim:/ita_tb/dut/i_inp1_mux/clk_i -add wave -noupdate sim:/ita_tb/dut/i_inp1_mux/rst_ni -add wave -noupdate sim:/ita_tb/dut/i_inp1_mux/inp_i -add wave -noupdate sim:/ita_tb/dut/i_inp1_mux/inp1_o -add wave -noupdate sim:/ita_tb/dut/i_inp2_mux/clk_i -add wave -noupdate sim:/ita_tb/dut/i_inp2_mux/rst_ni -add wave -noupdate sim:/ita_tb/dut/i_inp2_mux/weight_i -add wave -noupdate sim:/ita_tb/dut/i_inp2_mux/inp2_o -add wave -noupdate sim:/ita_tb/dut/i_controller/ctrl_i -add wave -noupdate sim:/ita_tb/dut/oup_o -add wave -noupdate sim:/ita_tb/dut/inp1_q -add wave -noupdate sim:/ita_tb/dut/inp2_q -add wave -noupdate -expand -group {Masking Signals} -radix unsigned sim:/ita_tb/dut/i_controller/count_d -add wave -noupdate -expand -group {Masking Signals} -radix unsigned sim:/ita_tb/dut/i_controller/bias_count -add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_o -add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/disable_row -add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned sim:/ita_tb/dut/i_controller/mask_tile_x_pos_d -add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned sim:/ita_tb/dut/i_controller/mask_tile_x_pos_q -add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned sim:/ita_tb/dut/i_controller/mask_tile_y_pos_d -add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned sim:/ita_tb/dut/i_controller/mask_tile_y_pos_q -add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned sim:/ita_tb/dut/i_controller/first_outer_dim -add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/last_inner_tile_q6 -add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_controller/calc_en_o -add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/calc_en_q1 -add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/calc_en_q2 -add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/calc_en_q3 -add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/calc_en_q4 -add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/calc_en_q5 -add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/calc_en_q6 -add wave -noupdate -expand -group {Masking Signals} -expand -group {In Softmax Module} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_d -add wave -noupdate -expand -group {Masking Signals} -radix decimal sim:/ita_tb/dut/i_softmax_top/i_softmax/max_o -add wave -noupdate -expand -group {Masking Signals} -radix decimal sim:/ita_tb/dut/i_softmax_top/i_softmax/max_i -add wave -noupdate -expand -group {Masking Signals} -radix decimal vsim:/ita_tb/dut/i_softmax_top/i_softmax/max_i -add wave -noupdate -expand -group {Masking Signals} -radix decimal sim:/ita_tb/dut/i_requantizer/requant_oup_o -add wave -noupdate -expand -group {Masking Signals} -radix decimal sim:/ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q -add wave -noupdate -expand -group {Masking Signals} -radix decimal sim:/ita_tb/dut/i_softmax_top/i_softmax/prev_max_o -add wave -noupdate -expand -group {Masking Signals} -radix decimal -childformat {{{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[15]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[14]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[13]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[12]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[11]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[10]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[9]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[8]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[7]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[6]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[5]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[4]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[3]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[2]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[1]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[0]} {-height 16 -radix decimal}} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_diff -add wave -noupdate -expand -group {Masking Signals} -radix decimal vsim:/ita_tb/dut/i_softmax_top/i_softmax/shift_diff -add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/disable_shift -add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_controller/step_q -add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q -add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_inp2_mux/clk_i -add wave -noupdate -expand -group {Masking Signals} -radix unsigned sim:/ita_tb/dut/i_controller/count_q -add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 -add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_q2 -add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_q3 -add wave -noupdate -expand -group {Masking Signals} -radix binary sim:/ita_tb/dut/i_controller/mask_d -add wave -noupdate -expand -group {Masking Signals} -radix binary sim:/ita_tb/dut/mask -add wave -noupdate -expand -group {Masking Signals} -radix binary sim:/ita_tb/dut/mask_q1 -add wave -noupdate -expand -group {Masking Signals} -radix binary sim:/ita_tb/dut/mask_q2 -add wave -noupdate -expand -group {Masking Signals} -radix binary sim:/ita_tb/dut/mask_q3 -add wave -noupdate -expand -group {Masking Signals} -radix binary sim:/ita_tb/dut/mask_q4 -add wave -noupdate -expand -group {Masking Signals} -radix binary sim:/ita_tb/dut/mask_q5 -add wave -noupdate -expand -group {Masking Signals} -radix binary sim:/ita_tb/dut/mask_q6 -add wave -noupdate -expand -group {Masking Signals} -radix binary sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_i -add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_i -add wave -noupdate -expand -group {Masking Signals} vsim:/ita_tb/dut/i_softmax_top/i_softmax/max_i -add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_d -add wave -noupdate -expand -group {Masking Signals} vsim:/ita_tb/dut/i_softmax_top/i_softmax/shift_d -add wave -noupdate -expand -group {Masking Signals} -radix unsigned sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_q -add wave -noupdate -expand -group {Masking Signals} vsim:/ita_tb/dut/i_softmax_top/i_softmax/shift_q -add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_sum_d -add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_sum_q -add wave -noupdate -expand -group {Masking Signals} vsim:/ita_tb/dut/i_softmax_top/i_softmax/shift_sum_d -add wave -noupdate -expand -group {Masking Signals} vsim:/ita_tb/dut/i_softmax_top/i_softmax/shift_sum_q -add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/read_max_en_o -add wave -noupdate -expand -group {Masking Signals} -radix unsigned sim:/ita_tb/dut/i_softmax_top/i_softmax/read_max_addr_o -add wave -noupdate -expand -group {Masking Signals} -radix decimal sim:/ita_tb/dut/i_softmax_top/i_softmax/read_max_data_i -add wave -noupdate -expand -group {Masking Signals} vsim:/ita_tb/dut/i_softmax_top/i_softmax/read_max_en_o -add wave -noupdate -expand -group {Masking Signals} -radix unsigned vsim:/ita_tb/dut/i_softmax_top/i_softmax/read_max_addr_o -add wave -noupdate -expand -group {Masking Signals} -radix decimal vsim:/ita_tb/dut/i_softmax_top/i_softmax/read_max_data_i -add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/read_acc_data_i -add wave -noupdate -expand -group {Masking Signals} vsim:/ita_tb/dut/i_softmax_top/i_softmax/read_acc_data_i -add wave -noupdate -expand -group {Masking Signals} -expand sim:/ita_tb/dut/i_softmax_top/i_softmax/read_acc_en_o -add wave -noupdate -expand -group {Masking Signals} -expand vsim:/ita_tb/dut/i_softmax_top/i_softmax/read_acc_en_o -add wave -noupdate -expand -group {Masking Signals} -radix unsigned sim:/ita_tb/dut/i_softmax_top/i_softmax/read_acc_addr_o -add wave -noupdate -expand -group {Masking Signals} -radix unsigned vsim:/ita_tb/dut/i_softmax_top/i_softmax/read_acc_addr_o -add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_acc_en_o -add wave -noupdate -expand -group {Masking Signals} vsim:/ita_tb/dut/i_softmax_top/i_softmax/write_acc_en_o -add wave -noupdate -expand -group {Masking Signals} -radix unsigned sim:/ita_tb/dut/i_softmax_top/i_softmax/write_acc_addr_o -add wave -noupdate -expand -group {Masking Signals} -radix unsigned vsim:/ita_tb/dut/i_softmax_top/i_softmax/write_acc_addr_o -add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_acc_data_o -add wave -noupdate -expand -group {Masking Signals} vsim:/ita_tb/dut/i_softmax_top/i_softmax/write_acc_data_o -add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d -add wave -noupdate -expand -group {Masking Signals} vsim:/ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d -add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q -add wave -noupdate -expand -group {Masking Signals} vsim:/ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q -add wave -noupdate -expand -group {Masking Signals} sim:/ita_tb/dut/i_softmax_top/i_softmax/step_i -add wave -noupdate -expand -group {Masking Signals} vsim:/ita_tb/dut/i_softmax_top/i_softmax/step_i -add wave -noupdate -expand -group {Masking Signals} -radix unsigned sim:/ita_tb/dut/i_softmax_top/i_softmax/count_d -add wave -noupdate -expand -group {Masking Signals} -radix unsigned vsim:/ita_tb/dut/i_softmax_top/i_softmax/count_d -add wave -noupdate -expand -group {Masking Signals} -radix unsigned sim:/ita_tb/dut/i_softmax_top/i_softmax/count_q1 -add wave -noupdate -expand -group {Masking Signals} -radix unsigned vsim:/ita_tb/dut/i_softmax_top/i_softmax/count_q1 -add wave -noupdate -expand -group {Masking Signals} -radix unsigned sim:/ita_tb/dut/i_softmax_top/i_softmax/count_q2 -add wave -noupdate -expand -group {Masking Signals} -radix unsigned vsim:/ita_tb/dut/i_softmax_top/i_softmax/count_q2 -add wave -noupdate -expand -group {Masking Signals} -radix unsigned sim:/ita_tb/dut/i_softmax_top/i_softmax/count_q3 -add wave -noupdate -expand -group {Masking Signals} -radix unsigned vsim:/ita_tb/dut/i_softmax_top/i_softmax/count_q3 -add wave -noupdate -expand -group {Masking Signals} -radix unsigned sim:/ita_tb/dut/i_softmax_top/i_softmax/count_q4 -add wave -noupdate -expand -group {Masking Signals} -radix unsigned vsim:/ita_tb/dut/i_softmax_top/i_softmax/count_q4 -add wave -noupdate -expand -group {Masking Signals} -radix unsigned sim:/ita_tb/dut/i_controller/mask_pos_d -add wave -noupdate -expand -group {Masking Signals} -radix unsigned sim:/ita_tb/dut/i_controller/mask_pos_q -add wave -noupdate -expand -group {Masking Signals} -radix unsigned sim:/ita_tb/dut/i_controller/mask_col_offset_q -add wave -noupdate -radix unsigned sim:/ita_tb/dut/i_controller/mask_tile_x_pos_d -add wave -noupdate -radix unsigned sim:/ita_tb/dut/i_controller/mask_tile_x_pos_q -add wave -noupdate -radix unsigned sim:/ita_tb/dut/i_controller/mask_tile_y_pos_d -add wave -noupdate -radix unsigned sim:/ita_tb/dut/i_controller/mask_tile_y_pos_q -add wave -noupdate -radix unsigned sim:/ita_tb/dut/i_controller/tile_x_d -add wave -noupdate -radix unsigned sim:/ita_tb/dut/i_controller/tile_x_q -add wave -noupdate -radix unsigned sim:/ita_tb/dut/i_controller/tile_y_d -add wave -noupdate -radix unsigned sim:/ita_tb/dut/i_controller/tile_y_q -add wave -noupdate sim:/ita_tb/dut/calc_en_q5 -add wave -noupdate sim:/ita_tb/dut/calc_en_q6 -add wave -noupdate sim:/ita_tb/dut/calc_en_q7 -add wave -noupdate sim:/ita_tb/dut/calc_en_q8 -add wave -noupdate sim:/ita_tb/dut/calc_en_q9 -add wave -noupdate sim:/ita_tb/dut/calc_en_q10 -add wave -noupdate -group Requant sim:/ita_tb/dut/i_controller/requant_add_i -add wave -noupdate -group Requant sim:/ita_tb/dut/i_controller/requant_add_o -add wave -noupdate -group Bias sim:/ita_tb/dut/inp_bias -add wave -noupdate -group Bias sim:/ita_tb/dut/inp_bias_padded -add wave -noupdate -group Bias sim:/ita_tb/dut/inp_bias_q1 -add wave -noupdate -group Bias sim:/ita_tb/dut/inp_bias_q2 -add wave -noupdate sim:/ita_tb/dut/calc_en_q4 -add wave -noupdate -radix unsigned sim:/ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 -add wave -noupdate sim:/ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i -add wave -noupdate sim:/ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q -add wave -noupdate -radix unsigned sim:/ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 -add wave -noupdate -radix binary -childformat {{{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[63]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[62]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[61]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[60]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[59]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[58]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[57]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[56]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[55]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[54]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[53]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[52]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[51]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[50]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[49]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[48]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[47]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[46]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[45]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[44]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[43]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[42]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[41]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[40]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[39]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[38]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[37]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[36]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[35]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[34]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[33]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[32]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[31]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[30]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[29]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[28]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[27]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[26]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[25]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[24]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[23]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[22]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[21]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[20]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[19]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[18]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[17]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[16]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[15]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[14]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[13]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[12]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[11]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[10]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[9]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[8]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[7]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[6]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[5]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[4]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[3]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[2]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[1]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[0]} -radix binary}} -subitemconfig {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[63]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[62]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[61]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[60]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[59]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[58]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[57]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[56]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[55]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[54]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[53]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[52]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[51]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[50]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[49]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[48]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[47]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[46]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[45]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[44]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[43]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[42]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[41]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[40]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[39]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[38]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[37]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[36]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[35]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[34]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[33]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[32]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[31]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[30]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[29]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[28]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[27]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[26]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[25]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[24]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[23]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[22]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[21]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[20]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[19]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[18]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[17]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[16]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[15]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[14]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[13]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[12]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[11]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[10]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[9]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[8]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[7]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[6]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[5]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[4]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[3]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[2]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[1]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[0]} {-height 16 -radix binary}} sim:/ita_tb/dut/i_softmax_top/i_softmax/disable_col -add wave -noupdate sim:/ita_tb/dut/i_inp2_mux/clk_i -add wave -noupdate -expand -group {In Softmax} sim:/ita_tb/dut/i_softmax_top/i_softmax/step_i -add wave -noupdate -expand -group {In Softmax} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_i -add wave -noupdate -expand -group {In Softmax} sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_i -add wave -noupdate -expand -group {In Softmax} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_i -add wave -noupdate -expand -group {In Softmax} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_o -add wave -noupdate sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i -add wave -noupdate -radix hexadecimal sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q -add wave -noupdate sim:/ita_tb/dut/i_requantizer/clk_i -add wave -noupdate -radix unsigned sim:/ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 -add wave -noupdate -radix unsigned sim:/ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q -add wave -noupdate sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_d -add wave -noupdate sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_q -add wave -noupdate sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_d -add wave -noupdate sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_q -add wave -noupdate sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_d -add wave -noupdate sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_q -add wave -noupdate -radix binary sim:/ita_tb/dut/i_softmax_top/i_softmax/disable_col -add wave -noupdate sim:/ita_tb/dut/i_activation/data_q3 -add wave -noupdate -radix decimal sim:/ita_tb/dut/inp_i -add wave -noupdate -expand -group {All in one Phase} -radix decimal -childformat {{{/ita_tb/dut/inp[63]} -radix decimal} {{/ita_tb/dut/inp[62]} -radix decimal} {{/ita_tb/dut/inp[61]} -radix decimal} {{/ita_tb/dut/inp[60]} -radix decimal} {{/ita_tb/dut/inp[59]} -radix decimal} {{/ita_tb/dut/inp[58]} -radix decimal} {{/ita_tb/dut/inp[57]} -radix decimal} {{/ita_tb/dut/inp[56]} -radix decimal} {{/ita_tb/dut/inp[55]} -radix decimal} {{/ita_tb/dut/inp[54]} -radix decimal} {{/ita_tb/dut/inp[53]} -radix decimal} {{/ita_tb/dut/inp[52]} -radix decimal} {{/ita_tb/dut/inp[51]} -radix decimal} {{/ita_tb/dut/inp[50]} -radix decimal} {{/ita_tb/dut/inp[49]} -radix decimal} {{/ita_tb/dut/inp[48]} -radix decimal} {{/ita_tb/dut/inp[47]} -radix decimal} {{/ita_tb/dut/inp[46]} -radix decimal} {{/ita_tb/dut/inp[45]} -radix decimal} {{/ita_tb/dut/inp[44]} -radix decimal} {{/ita_tb/dut/inp[43]} -radix decimal} {{/ita_tb/dut/inp[42]} -radix decimal} {{/ita_tb/dut/inp[41]} -radix decimal} {{/ita_tb/dut/inp[40]} -radix decimal} {{/ita_tb/dut/inp[39]} -radix decimal} {{/ita_tb/dut/inp[38]} -radix decimal} {{/ita_tb/dut/inp[37]} -radix decimal} {{/ita_tb/dut/inp[36]} -radix decimal} {{/ita_tb/dut/inp[35]} -radix decimal} {{/ita_tb/dut/inp[34]} -radix decimal} {{/ita_tb/dut/inp[33]} -radix decimal} {{/ita_tb/dut/inp[32]} -radix decimal} {{/ita_tb/dut/inp[31]} -radix decimal} {{/ita_tb/dut/inp[30]} -radix decimal} {{/ita_tb/dut/inp[29]} -radix decimal} {{/ita_tb/dut/inp[28]} -radix decimal} {{/ita_tb/dut/inp[27]} -radix decimal} {{/ita_tb/dut/inp[26]} -radix decimal} {{/ita_tb/dut/inp[25]} -radix decimal} {{/ita_tb/dut/inp[24]} -radix decimal} {{/ita_tb/dut/inp[23]} -radix decimal} {{/ita_tb/dut/inp[22]} -radix decimal} {{/ita_tb/dut/inp[21]} -radix decimal} {{/ita_tb/dut/inp[20]} -radix decimal} {{/ita_tb/dut/inp[19]} -radix decimal} {{/ita_tb/dut/inp[18]} -radix decimal} {{/ita_tb/dut/inp[17]} -radix decimal} {{/ita_tb/dut/inp[16]} -radix decimal} {{/ita_tb/dut/inp[15]} -radix decimal} {{/ita_tb/dut/inp[14]} -radix decimal} {{/ita_tb/dut/inp[13]} -radix decimal} {{/ita_tb/dut/inp[12]} -radix decimal} {{/ita_tb/dut/inp[11]} -radix decimal} {{/ita_tb/dut/inp[10]} -radix decimal} {{/ita_tb/dut/inp[9]} -radix decimal} {{/ita_tb/dut/inp[8]} -radix decimal} {{/ita_tb/dut/inp[7]} -radix decimal} {{/ita_tb/dut/inp[6]} -radix decimal} {{/ita_tb/dut/inp[5]} -radix decimal} {{/ita_tb/dut/inp[4]} -radix decimal} {{/ita_tb/dut/inp[3]} -radix decimal} {{/ita_tb/dut/inp[2]} -radix decimal} {{/ita_tb/dut/inp[1]} -radix decimal} {{/ita_tb/dut/inp[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/inp[63]} {-height 16 -radix decimal} {/ita_tb/dut/inp[62]} {-height 16 -radix decimal} {/ita_tb/dut/inp[61]} {-height 16 -radix decimal} {/ita_tb/dut/inp[60]} {-height 16 -radix decimal} {/ita_tb/dut/inp[59]} {-height 16 -radix decimal} {/ita_tb/dut/inp[58]} {-height 16 -radix decimal} {/ita_tb/dut/inp[57]} {-height 16 -radix decimal} {/ita_tb/dut/inp[56]} {-height 16 -radix decimal} {/ita_tb/dut/inp[55]} {-height 16 -radix decimal} {/ita_tb/dut/inp[54]} {-height 16 -radix decimal} {/ita_tb/dut/inp[53]} {-height 16 -radix decimal} {/ita_tb/dut/inp[52]} {-height 16 -radix decimal} {/ita_tb/dut/inp[51]} {-height 16 -radix decimal} {/ita_tb/dut/inp[50]} {-height 16 -radix decimal} {/ita_tb/dut/inp[49]} {-height 16 -radix decimal} {/ita_tb/dut/inp[48]} {-height 16 -radix decimal} {/ita_tb/dut/inp[47]} {-height 16 -radix decimal} {/ita_tb/dut/inp[46]} {-height 16 -radix decimal} {/ita_tb/dut/inp[45]} {-height 16 -radix decimal} {/ita_tb/dut/inp[44]} {-height 16 -radix decimal} {/ita_tb/dut/inp[43]} {-height 16 -radix decimal} {/ita_tb/dut/inp[42]} {-height 16 -radix decimal} {/ita_tb/dut/inp[41]} {-height 16 -radix decimal} {/ita_tb/dut/inp[40]} {-height 16 -radix decimal} {/ita_tb/dut/inp[39]} {-height 16 -radix decimal} {/ita_tb/dut/inp[38]} {-height 16 -radix decimal} {/ita_tb/dut/inp[37]} {-height 16 -radix decimal} {/ita_tb/dut/inp[36]} {-height 16 -radix decimal} {/ita_tb/dut/inp[35]} {-height 16 -radix decimal} {/ita_tb/dut/inp[34]} {-height 16 -radix decimal} {/ita_tb/dut/inp[33]} {-height 16 -radix decimal} {/ita_tb/dut/inp[32]} {-height 16 -radix decimal} {/ita_tb/dut/inp[31]} {-height 16 -radix decimal} {/ita_tb/dut/inp[30]} {-height 16 -radix decimal} {/ita_tb/dut/inp[29]} {-height 16 -radix decimal} {/ita_tb/dut/inp[28]} {-height 16 -radix decimal} {/ita_tb/dut/inp[27]} {-height 16 -radix decimal} {/ita_tb/dut/inp[26]} {-height 16 -radix decimal} {/ita_tb/dut/inp[25]} {-height 16 -radix decimal} {/ita_tb/dut/inp[24]} {-height 16 -radix decimal} {/ita_tb/dut/inp[23]} {-height 16 -radix decimal} {/ita_tb/dut/inp[22]} {-height 16 -radix decimal} {/ita_tb/dut/inp[21]} {-height 16 -radix decimal} {/ita_tb/dut/inp[20]} {-height 16 -radix decimal} {/ita_tb/dut/inp[19]} {-height 16 -radix decimal} {/ita_tb/dut/inp[18]} {-height 16 -radix decimal} {/ita_tb/dut/inp[17]} {-height 16 -radix decimal} {/ita_tb/dut/inp[16]} {-height 16 -radix decimal} {/ita_tb/dut/inp[15]} {-height 16 -radix decimal} {/ita_tb/dut/inp[14]} {-height 16 -radix decimal} {/ita_tb/dut/inp[13]} {-height 16 -radix decimal} {/ita_tb/dut/inp[12]} {-height 16 -radix decimal} {/ita_tb/dut/inp[11]} {-height 16 -radix decimal} {/ita_tb/dut/inp[10]} {-height 16 -radix decimal} {/ita_tb/dut/inp[9]} {-height 16 -radix decimal} {/ita_tb/dut/inp[8]} {-height 16 -radix decimal} {/ita_tb/dut/inp[7]} {-height 16 -radix decimal} {/ita_tb/dut/inp[6]} {-height 16 -radix decimal} {/ita_tb/dut/inp[5]} {-height 16 -radix decimal} {/ita_tb/dut/inp[4]} {-height 16 -radix decimal} {/ita_tb/dut/inp[3]} {-height 16 -radix decimal} {/ita_tb/dut/inp[2]} {-height 16 -radix decimal} {/ita_tb/dut/inp[1]} {-height 16 -radix decimal} {/ita_tb/dut/inp[0]} {-height 16 -radix decimal}} sim:/ita_tb/dut/inp -add wave -noupdate -expand -group {All in one Phase} -radix unsigned sim:/ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o -add wave -noupdate -expand -group {All in one Phase} -radix decimal sim:/ita_tb/dut/inp1 -add wave -noupdate -radix unsigned sim:/ita_tb/dut/inp1_q -add wave -noupdate -radix decimal sim:/ita_tb/dut/i_accumulator/oup_i -add wave -noupdate -radix decimal -childformat {{{/ita_tb/dut/i_accumulator/result_d[15]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[14]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[13]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[12]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[11]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[10]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[9]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[8]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[7]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[6]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[5]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[4]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[3]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[2]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[1]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_accumulator/result_d[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[0]} {-height 16 -radix decimal}} sim:/ita_tb/dut/i_accumulator/result_d -add wave -noupdate -radix decimal sim:/ita_tb/dut/i_accumulator/result_o -add wave -noupdate -radix hexadecimal -childformat {{{/ita_tb/dut/i_activation/data_i[15]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[14]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[13]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[12]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[11]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[10]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[9]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[8]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[7]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[6]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[5]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[4]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[3]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[2]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[1]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_activation/data_i[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[0]} {-height 16 -radix decimal}} sim:/ita_tb/dut/i_activation/data_i -add wave -noupdate sim:/ita_tb/dut/i_activation/data_q1 -add wave -noupdate sim:/ita_tb/dut/i_activation/data_q2 -add wave -noupdate sim:/ita_tb/dut/i_activation/data_q3 -add wave -noupdate sim:/ita_tb/dut/i_activation/data_q4 -add wave -noupdate sim:/ita_tb/dut/i_activation/data_o -add wave -noupdate sim:/ita_tb/dut/i_fifo/data_i -add wave -noupdate sim:/ita_tb/dut/i_fifo/data_o -add wave -noupdate sim:/ita_tb/dut/oup_o -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/clk_i -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/rst_ni -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/mode_i -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/eps_mult_i -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/right_shift_i -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/calc_en_i -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/calc_en_q_i -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/result_i -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/add_i -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/requant_oup_o -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/mult_signed -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/product -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/shifted_added -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/shifted_d -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/shifted_q -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/add_q1 -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/add_q2 -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/add_q3 -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/add_q4 -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/requant_oup_d -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/requant_oup_q -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/clk_i -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/rst_ni -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/mode_i -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/eps_mult_i -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/right_shift_i -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/calc_en_i -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/calc_en_q_i -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/result_i -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/add_i -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/requant_oup_o -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/mult_signed -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/product -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/shifted_added -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/shifted_d -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/shifted_q -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/add_q1 -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/add_q2 -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/add_q3 -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/add_q4 -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/requant_oup_d -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/requant_oup_q -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/clk_i -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/rst_ni -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/mode_i -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/eps_mult_i -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/right_shift_i -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/calc_en_i -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/calc_en_q_i -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/result_i -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/add_i -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/requant_oup_o -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/mult_signed -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/product -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/shifted_added -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/shifted_d -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/shifted_q -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/add_q1 -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/add_q2 -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/add_q3 -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/add_q4 -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/requant_oup_d -add wave -noupdate -group Requantizer sim:/ita_tb/dut/i_requantizer/requant_oup_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/clk_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/rst_ni -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/ctrl_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_valid_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_ready_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/weight_valid_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/weight_ready_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_valid_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_ready_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/oup_valid_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/oup_ready_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/pop_softmax_fifo_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/step_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/soft_addr_div_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_done_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/calc_en_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/first_inner_tile_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/last_inner_tile_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_x_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_y_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inner_tile_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/requant_add_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/requant_add_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_bias_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_bias_pad_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/busy_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/calc_en_q1_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/step_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/step_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/count_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/count_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_count -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_pos_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_pos_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_col_offset_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_col_offset_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inner_tile_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inner_tile_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_tile_x_pos_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_tile_x_pos_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_tile_y_pos_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_tile_y_pos_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_x_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_x_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_tile_x_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_tile_x_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_y_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_y_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_tile_y_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_tile_y_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_tile_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_tile_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/ongoing_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/ongoing_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/ongoing_soft_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/ongoing_soft_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_bias -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_bias_padded -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/last_time -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inner_tile_dim -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/first_outer_dim -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/second_outer_dim -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/first_outer_dim_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/first_outer_dim_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/second_outer_dim_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/second_outer_dim_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_fifo -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_div -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_div_done_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_div_done_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/busy_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/busy_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/requant_add_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/requant_add_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/clk_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/rst_ni -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/ctrl_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_valid_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_ready_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/weight_valid_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/weight_ready_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_valid_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_ready_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/oup_valid_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/oup_ready_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/pop_softmax_fifo_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/step_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/soft_addr_div_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_done_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/calc_en_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/first_inner_tile_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/last_inner_tile_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_x_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_y_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inner_tile_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/requant_add_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/requant_add_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_bias_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_bias_pad_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/busy_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/calc_en_q1_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/step_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/step_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/count_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/count_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_count -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_pos_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_pos_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_col_offset_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_col_offset_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inner_tile_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inner_tile_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_tile_x_pos_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_tile_x_pos_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_tile_y_pos_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_tile_y_pos_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_x_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_x_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_tile_x_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_tile_x_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_y_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_y_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_tile_y_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_tile_y_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_tile_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_tile_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/ongoing_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/ongoing_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/ongoing_soft_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/ongoing_soft_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_bias -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_bias_padded -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/last_time -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inner_tile_dim -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/first_outer_dim -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/second_outer_dim -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/first_outer_dim_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/first_outer_dim_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/second_outer_dim_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/second_outer_dim_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_fifo -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_div -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_div_done_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_div_done_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/busy_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/busy_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/requant_add_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/requant_add_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/clk_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/rst_ni -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/ctrl_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_valid_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_ready_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/weight_valid_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/weight_ready_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_valid_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_ready_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/oup_valid_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/oup_ready_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/pop_softmax_fifo_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/step_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/soft_addr_div_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_done_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/calc_en_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/first_inner_tile_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/last_inner_tile_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_x_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_y_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inner_tile_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/requant_add_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/requant_add_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_bias_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_bias_pad_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/busy_o -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/calc_en_q1_i -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/step_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/step_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/count_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/count_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_count -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_pos_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_pos_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_col_offset_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_col_offset_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inner_tile_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inner_tile_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_tile_x_pos_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_tile_x_pos_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_tile_y_pos_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_tile_y_pos_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_x_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_x_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_tile_x_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_tile_x_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_y_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/tile_y_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_tile_y_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/bias_tile_y_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_tile_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_tile_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/ongoing_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/ongoing_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/ongoing_soft_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/ongoing_soft_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_bias -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inp_bias_padded -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/last_time -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/mask_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/inner_tile_dim -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/first_outer_dim -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/second_outer_dim -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/first_outer_dim_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/first_outer_dim_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/second_outer_dim_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/second_outer_dim_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_fifo -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_div -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_div_done_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/softmax_div_done_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/busy_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/busy_q -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/requant_add_d -add wave -noupdate -expand -group Controller sim:/ita_tb/dut/i_controller/requant_add_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/clk_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/rst_ni -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/ctrl_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/requant_oup_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/soft_addr_div_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/softmax_done_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/pop_softmax_fifo_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/inp_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_inp_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_valid_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_ready_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_valid_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_ready_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_oup_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/prev_max_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/read_max_en_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/read_max_addr_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/read_max_data_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_max_en_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_max_addr_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_max_data_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_x_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_y_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_q1 -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_q2 -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_q3 -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_q4 -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_y_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_soft_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_div_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_div_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/addr_div_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/addr_div_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_read_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_read_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_write_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_write_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_diff -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_diff -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_inp -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_inp_diff -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/fifo_full -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/fifo_empty -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/push_to_fifo -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/pop_from_fifo -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/data_to_fifo -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/data_from_fifo -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/fifo_usage -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/disable_shift -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/disable_row -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/disable_col -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/clk_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/rst_ni -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/ctrl_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/step_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/requant_oup_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/soft_addr_div_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/softmax_done_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/pop_softmax_fifo_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/inp_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_inp_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_valid_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_ready_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_valid_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_ready_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_oup_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/read_acc_en_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/read_acc_addr_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/read_acc_data_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_acc_en_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_acc_addr_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_acc_data_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/prev_max_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_max_en_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_max_addr_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_max_data_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_x_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_y_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_q1 -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_q2 -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_q3 -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_q4 -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_q1 -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_q2 -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_q3 -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_q4 -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_x_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_y_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_soft_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_div_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_div_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/addr_div_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/addr_div_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_read_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_read_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_write_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_write_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_diff -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_sum_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_sum_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_diff -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_inp -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_inp_diff -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_q2 -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_q3 -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/fifo_full -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/fifo_empty -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/push_to_fifo -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/pop_from_fifo -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/data_to_fifo -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/data_from_fifo -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/fifo_usage -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/disable_shift -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/disable_row -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/disable_col -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/clk_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/rst_ni -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/ctrl_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/step_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/requant_oup_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/soft_addr_div_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/softmax_done_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/pop_softmax_fifo_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/inp_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_inp_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_valid_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_ready_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_valid_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_ready_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_oup_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/read_acc_en_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/read_acc_addr_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/read_acc_data_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_acc_en_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_acc_addr_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_acc_data_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/prev_max_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/read_max_en_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/read_max_addr_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/read_max_data_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_max_en_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_max_addr_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/write_max_data_o -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_x_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_y_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_i -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_q1 -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_q2 -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_q3 -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_q4 -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_q1 -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_q2 -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_q3 -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_q4 -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_x_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/tile_y_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/mask_tile_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_soft_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_div_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/count_div_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/addr_div_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/addr_div_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_read_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_read_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_write_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/div_write_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_diff -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_sum_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_sum_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/max_diff -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_inp -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/shift_inp_diff -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_d -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_q2 -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/calc_en_q3 -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/fifo_full -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/fifo_empty -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/push_to_fifo -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/pop_from_fifo -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/data_to_fifo -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/data_from_fifo -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/fifo_usage -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/disable_shift -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/disable_row -add wave -noupdate -expand -group {Softmax Controller} sim:/ita_tb/dut/i_softmax_top/i_softmax/disable_col -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/clk_i -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/rst_ni -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/calc_en_i -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/calc_en_q_i -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/first_tile_i -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/first_tile_q_i -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/last_tile_i -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/last_tile_q_i -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/oup_i -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/inp_bias_i -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/result_o -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_en -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_addr -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_data -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_data_unused -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/write_en -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/write_addr -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/write_data -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_addr_d -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_addr_q -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/write_addr_d -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/write_addr_q -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/result_d -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/result_q -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/clk_i -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/rst_ni -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/calc_en_i -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/calc_en_q_i -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/first_tile_i -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/first_tile_q_i -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/last_tile_i -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/last_tile_q_i -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/oup_i -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/inp_bias_i -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/result_o -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_en -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_addr -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_data -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_data_unused -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/write_en -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/write_addr -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/write_data -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_addr_d -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_addr_q -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/write_addr_d -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/write_addr_q -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/result_d -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/result_q -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/clk_i -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/rst_ni -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/calc_en_i -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/calc_en_q_i -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/first_tile_i -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/first_tile_q_i -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/last_tile_i -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/last_tile_q_i -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/oup_i -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/inp_bias_i -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/result_o -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_en -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_addr -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_data -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_data_unused -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/write_en -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/write_addr -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/write_data -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_addr_d -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/read_addr_q -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/write_addr_d -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/write_addr_q -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/result_d -add wave -noupdate -group Accumulator sim:/ita_tb/dut/i_accumulator/result_q +add wave -noupdate /ita_tb/dut/i_inp1_mux/clk_i +add wave -noupdate /ita_tb/dut/i_inp1_mux/rst_ni +add wave -noupdate /ita_tb/dut/i_inp1_mux/inp_i +add wave -noupdate /ita_tb/dut/i_inp1_mux/inp1_o +add wave -noupdate /ita_tb/dut/i_inp2_mux/clk_i +add wave -noupdate /ita_tb/dut/i_inp2_mux/rst_ni +add wave -noupdate /ita_tb/dut/i_inp2_mux/weight_i +add wave -noupdate /ita_tb/dut/i_inp2_mux/inp2_o +add wave -noupdate /ita_tb/dut/i_controller/ctrl_i +add wave -noupdate /ita_tb/dut/oup_o +add wave -noupdate /ita_tb/dut/inp1_q +add wave -noupdate /ita_tb/dut/inp2_q +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/count_d +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/bias_count +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/max_o +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/disable_row +add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_d +add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_q +add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_d +add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_q +add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/first_outer_dim +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_inp2_mux/clk_i +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/last_inner_tile_q6 +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_controller/calc_en_o +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q1 +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q2 +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q3 +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q4 +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q5 +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q6 +add wave -noupdate -expand -group {Masking Signals} -expand -group {In Softmax Module} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d +add wave -noupdate -expand -group {Masking Signals} -expand -group {In Softmax Module} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 +add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask +add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q1 +add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q2 +add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q3 +add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q4 +add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q5 +add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q6 +add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/i_softmax_top/i_softmax/mask_i +add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_softmax_top/i_softmax/max_o +add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_softmax_top/i_softmax/max_i +add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_requantizer/requant_oup_o +add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q +add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_softmax_top/i_softmax/prev_max_o +add wave -noupdate -expand -group {Masking Signals} -radix decimal -childformat {{{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[15]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[14]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[13]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[12]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[11]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[10]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[9]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[8]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[7]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[6]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[5]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[4]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[3]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[2]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[1]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[0]} {-height 16 -radix decimal}} /ita_tb/dut/i_softmax_top/i_softmax/shift_diff +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_controller/step_q +add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/count_q +add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/i_controller/mask_d +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_pos_d +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_pos_q +add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_col_offset_q +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_d +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_q +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_d +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_q +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/tile_x_d +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/tile_x_q +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/tile_y_d +add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/tile_y_q +add wave -noupdate /ita_tb/dut/calc_en_q5 +add wave -noupdate /ita_tb/dut/calc_en_q6 +add wave -noupdate /ita_tb/dut/calc_en_q7 +add wave -noupdate /ita_tb/dut/calc_en_q8 +add wave -noupdate /ita_tb/dut/calc_en_q9 +add wave -noupdate /ita_tb/dut/calc_en_q10 +add wave -noupdate -group Requant /ita_tb/dut/i_controller/requant_add_i +add wave -noupdate -group Requant /ita_tb/dut/i_controller/requant_add_o +add wave -noupdate -group Bias /ita_tb/dut/inp_bias +add wave -noupdate -group Bias /ita_tb/dut/inp_bias_padded +add wave -noupdate -group Bias /ita_tb/dut/inp_bias_q1 +add wave -noupdate -group Bias /ita_tb/dut/inp_bias_q2 +add wave -noupdate /ita_tb/dut/calc_en_q4 +add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 +add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i +add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q +add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 +add wave -noupdate -radix binary -childformat {{{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[63]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[62]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[61]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[60]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[59]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[58]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[57]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[56]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[55]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[54]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[53]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[52]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[51]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[50]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[49]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[48]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[47]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[46]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[45]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[44]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[43]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[42]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[41]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[40]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[39]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[38]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[37]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[36]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[35]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[34]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[33]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[32]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[31]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[30]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[29]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[28]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[27]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[26]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[25]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[24]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[23]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[22]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[21]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[20]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[19]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[18]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[17]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[16]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[15]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[14]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[13]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[12]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[11]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[10]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[9]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[8]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[7]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[6]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[5]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[4]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[3]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[2]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[1]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[0]} -radix binary}} -subitemconfig {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[63]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[62]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[61]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[60]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[59]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[58]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[57]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[56]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[55]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[54]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[53]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[52]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[51]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[50]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[49]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[48]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[47]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[46]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[45]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[44]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[43]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[42]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[41]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[40]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[39]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[38]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[37]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[36]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[35]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[34]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[33]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[32]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[31]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[30]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[29]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[28]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[27]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[26]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[25]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[24]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[23]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[22]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[21]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[20]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[19]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[18]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[17]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[16]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[15]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[14]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[13]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[12]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[11]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[10]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[9]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[8]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[7]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[6]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[5]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[4]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[3]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[2]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[1]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[0]} {-height 16 -radix binary}} /ita_tb/dut/i_softmax_top/i_softmax/disable_col +add wave -noupdate /ita_tb/dut/i_inp2_mux/clk_i +add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/step_i +add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_i +add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/mask_i +add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/max_i +add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/max_o +add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i +add wave -noupdate -radix hexadecimal /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q +add wave -noupdate /ita_tb/dut/i_requantizer/clk_i +add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 +add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q +add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_d +add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_q +add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_d +add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_q +add wave -noupdate -radix binary /ita_tb/dut/i_softmax_top/i_softmax/disable_col +add wave -noupdate /ita_tb/dut/i_activation/data_q3 +add wave -noupdate -radix decimal /ita_tb/dut/inp_i +add wave -noupdate -expand -group {All in one Phase} -radix decimal -childformat {{{/ita_tb/dut/inp[63]} -radix decimal} {{/ita_tb/dut/inp[62]} -radix decimal} {{/ita_tb/dut/inp[61]} -radix decimal} {{/ita_tb/dut/inp[60]} -radix decimal} {{/ita_tb/dut/inp[59]} -radix decimal} {{/ita_tb/dut/inp[58]} -radix decimal} {{/ita_tb/dut/inp[57]} -radix decimal} {{/ita_tb/dut/inp[56]} -radix decimal} {{/ita_tb/dut/inp[55]} -radix decimal} {{/ita_tb/dut/inp[54]} -radix decimal} {{/ita_tb/dut/inp[53]} -radix decimal} {{/ita_tb/dut/inp[52]} -radix decimal} {{/ita_tb/dut/inp[51]} -radix decimal} {{/ita_tb/dut/inp[50]} -radix decimal} {{/ita_tb/dut/inp[49]} -radix decimal} {{/ita_tb/dut/inp[48]} -radix decimal} {{/ita_tb/dut/inp[47]} -radix decimal} {{/ita_tb/dut/inp[46]} -radix decimal} {{/ita_tb/dut/inp[45]} -radix decimal} {{/ita_tb/dut/inp[44]} -radix decimal} {{/ita_tb/dut/inp[43]} -radix decimal} {{/ita_tb/dut/inp[42]} -radix decimal} {{/ita_tb/dut/inp[41]} -radix decimal} {{/ita_tb/dut/inp[40]} -radix decimal} {{/ita_tb/dut/inp[39]} -radix decimal} {{/ita_tb/dut/inp[38]} -radix decimal} {{/ita_tb/dut/inp[37]} -radix decimal} {{/ita_tb/dut/inp[36]} -radix decimal} {{/ita_tb/dut/inp[35]} -radix decimal} {{/ita_tb/dut/inp[34]} -radix decimal} {{/ita_tb/dut/inp[33]} -radix decimal} {{/ita_tb/dut/inp[32]} -radix decimal} {{/ita_tb/dut/inp[31]} -radix decimal} {{/ita_tb/dut/inp[30]} -radix decimal} {{/ita_tb/dut/inp[29]} -radix decimal} {{/ita_tb/dut/inp[28]} -radix decimal} {{/ita_tb/dut/inp[27]} -radix decimal} {{/ita_tb/dut/inp[26]} -radix decimal} {{/ita_tb/dut/inp[25]} -radix decimal} {{/ita_tb/dut/inp[24]} -radix decimal} {{/ita_tb/dut/inp[23]} -radix decimal} {{/ita_tb/dut/inp[22]} -radix decimal} {{/ita_tb/dut/inp[21]} -radix decimal} {{/ita_tb/dut/inp[20]} -radix decimal} {{/ita_tb/dut/inp[19]} -radix decimal} {{/ita_tb/dut/inp[18]} -radix decimal} {{/ita_tb/dut/inp[17]} -radix decimal} {{/ita_tb/dut/inp[16]} -radix decimal} {{/ita_tb/dut/inp[15]} -radix decimal} {{/ita_tb/dut/inp[14]} -radix decimal} {{/ita_tb/dut/inp[13]} -radix decimal} {{/ita_tb/dut/inp[12]} -radix decimal} {{/ita_tb/dut/inp[11]} -radix decimal} {{/ita_tb/dut/inp[10]} -radix decimal} {{/ita_tb/dut/inp[9]} -radix decimal} {{/ita_tb/dut/inp[8]} -radix decimal} {{/ita_tb/dut/inp[7]} -radix decimal} {{/ita_tb/dut/inp[6]} -radix decimal} {{/ita_tb/dut/inp[5]} -radix decimal} {{/ita_tb/dut/inp[4]} -radix decimal} {{/ita_tb/dut/inp[3]} -radix decimal} {{/ita_tb/dut/inp[2]} -radix decimal} {{/ita_tb/dut/inp[1]} -radix decimal} {{/ita_tb/dut/inp[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/inp[63]} {-height 16 -radix decimal} {/ita_tb/dut/inp[62]} {-height 16 -radix decimal} {/ita_tb/dut/inp[61]} {-height 16 -radix decimal} {/ita_tb/dut/inp[60]} {-height 16 -radix decimal} {/ita_tb/dut/inp[59]} {-height 16 -radix decimal} {/ita_tb/dut/inp[58]} {-height 16 -radix decimal} {/ita_tb/dut/inp[57]} {-height 16 -radix decimal} {/ita_tb/dut/inp[56]} {-height 16 -radix decimal} {/ita_tb/dut/inp[55]} {-height 16 -radix decimal} {/ita_tb/dut/inp[54]} {-height 16 -radix decimal} {/ita_tb/dut/inp[53]} {-height 16 -radix decimal} {/ita_tb/dut/inp[52]} {-height 16 -radix decimal} {/ita_tb/dut/inp[51]} {-height 16 -radix decimal} {/ita_tb/dut/inp[50]} {-height 16 -radix decimal} {/ita_tb/dut/inp[49]} {-height 16 -radix decimal} {/ita_tb/dut/inp[48]} {-height 16 -radix decimal} {/ita_tb/dut/inp[47]} {-height 16 -radix decimal} {/ita_tb/dut/inp[46]} {-height 16 -radix decimal} {/ita_tb/dut/inp[45]} {-height 16 -radix decimal} {/ita_tb/dut/inp[44]} {-height 16 -radix decimal} {/ita_tb/dut/inp[43]} {-height 16 -radix decimal} {/ita_tb/dut/inp[42]} {-height 16 -radix decimal} {/ita_tb/dut/inp[41]} {-height 16 -radix decimal} {/ita_tb/dut/inp[40]} {-height 16 -radix decimal} {/ita_tb/dut/inp[39]} {-height 16 -radix decimal} {/ita_tb/dut/inp[38]} {-height 16 -radix decimal} {/ita_tb/dut/inp[37]} {-height 16 -radix decimal} {/ita_tb/dut/inp[36]} {-height 16 -radix decimal} {/ita_tb/dut/inp[35]} {-height 16 -radix decimal} {/ita_tb/dut/inp[34]} {-height 16 -radix decimal} {/ita_tb/dut/inp[33]} {-height 16 -radix decimal} {/ita_tb/dut/inp[32]} {-height 16 -radix decimal} {/ita_tb/dut/inp[31]} {-height 16 -radix decimal} {/ita_tb/dut/inp[30]} {-height 16 -radix decimal} {/ita_tb/dut/inp[29]} {-height 16 -radix decimal} {/ita_tb/dut/inp[28]} {-height 16 -radix decimal} {/ita_tb/dut/inp[27]} {-height 16 -radix decimal} {/ita_tb/dut/inp[26]} {-height 16 -radix decimal} {/ita_tb/dut/inp[25]} {-height 16 -radix decimal} {/ita_tb/dut/inp[24]} {-height 16 -radix decimal} {/ita_tb/dut/inp[23]} {-height 16 -radix decimal} {/ita_tb/dut/inp[22]} {-height 16 -radix decimal} {/ita_tb/dut/inp[21]} {-height 16 -radix decimal} {/ita_tb/dut/inp[20]} {-height 16 -radix decimal} {/ita_tb/dut/inp[19]} {-height 16 -radix decimal} {/ita_tb/dut/inp[18]} {-height 16 -radix decimal} {/ita_tb/dut/inp[17]} {-height 16 -radix decimal} {/ita_tb/dut/inp[16]} {-height 16 -radix decimal} {/ita_tb/dut/inp[15]} {-height 16 -radix decimal} {/ita_tb/dut/inp[14]} {-height 16 -radix decimal} {/ita_tb/dut/inp[13]} {-height 16 -radix decimal} {/ita_tb/dut/inp[12]} {-height 16 -radix decimal} {/ita_tb/dut/inp[11]} {-height 16 -radix decimal} {/ita_tb/dut/inp[10]} {-height 16 -radix decimal} {/ita_tb/dut/inp[9]} {-height 16 -radix decimal} {/ita_tb/dut/inp[8]} {-height 16 -radix decimal} {/ita_tb/dut/inp[7]} {-height 16 -radix decimal} {/ita_tb/dut/inp[6]} {-height 16 -radix decimal} {/ita_tb/dut/inp[5]} {-height 16 -radix decimal} {/ita_tb/dut/inp[4]} {-height 16 -radix decimal} {/ita_tb/dut/inp[3]} {-height 16 -radix decimal} {/ita_tb/dut/inp[2]} {-height 16 -radix decimal} {/ita_tb/dut/inp[1]} {-height 16 -radix decimal} {/ita_tb/dut/inp[0]} {-height 16 -radix decimal}} /ita_tb/dut/inp +add wave -noupdate -expand -group {All in one Phase} -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o +add wave -noupdate -expand -group {All in one Phase} -radix decimal /ita_tb/dut/inp1 +add wave -noupdate -radix unsigned /ita_tb/dut/inp1_q +add wave -noupdate -radix decimal /ita_tb/dut/i_accumulator/oup_i +add wave -noupdate -radix decimal -childformat {{{/ita_tb/dut/i_accumulator/result_d[15]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[14]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[13]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[12]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[11]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[10]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[9]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[8]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[7]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[6]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[5]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[4]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[3]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[2]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[1]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_accumulator/result_d[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[0]} {-height 16 -radix decimal}} /ita_tb/dut/i_accumulator/result_d +add wave -noupdate -radix decimal /ita_tb/dut/i_accumulator/result_o +add wave -noupdate -radix hexadecimal -childformat {{{/ita_tb/dut/i_activation/data_i[15]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[14]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[13]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[12]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[11]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[10]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[9]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[8]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[7]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[6]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[5]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[4]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[3]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[2]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[1]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_activation/data_i[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[0]} {-height 16 -radix decimal}} /ita_tb/dut/i_activation/data_i +add wave -noupdate /ita_tb/dut/i_activation/data_q1 +add wave -noupdate /ita_tb/dut/i_activation/data_q2 +add wave -noupdate /ita_tb/dut/i_activation/data_q3 +add wave -noupdate /ita_tb/dut/i_activation/data_q4 +add wave -noupdate /ita_tb/dut/i_activation/data_o +add wave -noupdate /ita_tb/dut/i_fifo/data_i +add wave -noupdate /ita_tb/dut/i_fifo/data_o +add wave -noupdate /ita_tb/dut/oup_o +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/clk_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/rst_ni +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mode_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/eps_mult_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/right_shift_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_q_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/result_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_o +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mult_signed +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/product +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_added +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_d +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_q +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q1 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q2 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q3 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q4 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_d +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_q +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/clk_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/rst_ni +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mode_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/eps_mult_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/right_shift_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_q_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/result_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_o +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mult_signed +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/product +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_added +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_d +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_q +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q1 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q2 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q3 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q4 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_d +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_q +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/clk_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/rst_ni +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mode_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/eps_mult_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/right_shift_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_q_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/result_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_i +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_o +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mult_signed +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/product +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_added +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_d +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_q +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q1 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q2 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q3 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q4 +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_d +add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/clk_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/rst_ni +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ctrl_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_ready_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_ready_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_ready_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_ready_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/pop_softmax_fifo_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/soft_addr_div_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_done_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_inner_tile_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_inner_tile_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_pad_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_q1_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/count_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/count_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_count +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_padded +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_time +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_dim +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_fifo +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/clk_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/rst_ni +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ctrl_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_ready_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_ready_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_ready_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_ready_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/pop_softmax_fifo_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/soft_addr_div_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_done_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_inner_tile_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_inner_tile_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_pad_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_q1_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/count_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/count_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_count +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_padded +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_time +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_dim +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_fifo +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/clk_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/rst_ni +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ctrl_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_ready_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_ready_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_ready_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_valid_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_ready_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/pop_softmax_fifo_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/soft_addr_div_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_done_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_inner_tile_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_inner_tile_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_pad_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_q1_i +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_count +add wave -noupdate -expand -group Controller -radix unsigned /ita_tb/dut/i_controller/count_d +add wave -noupdate -expand -group Controller -radix unsigned /ita_tb/dut/i_controller/count_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_inner_tile_o +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_padded +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_time +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_dim +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_fifo +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_q +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_d +add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/clk_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/rst_ni +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/ctrl_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/step_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/soft_addr_div_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/softmax_done_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_softmax_fifo_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_inp_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_oup_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_data_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_data_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/prev_max_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_data_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_data_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_x_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q3 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q4 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q3 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q4 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_diff +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_diff +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp_diff +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q3 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_full +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_empty +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/push_to_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_from_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_to_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_from_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_usage +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_row +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_col +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/clk_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/rst_ni +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/ctrl_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/step_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/soft_addr_div_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/softmax_done_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_softmax_fifo_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_inp_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_oup_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_data_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_data_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/prev_max_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_data_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_data_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_x_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q3 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q4 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q3 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q4 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_x_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_diff +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_diff +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp_diff +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q3 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_full +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_empty +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/push_to_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_from_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_to_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_from_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_usage +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_row +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_col +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/clk_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/rst_ni +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/ctrl_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/step_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/soft_addr_div_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/softmax_done_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_softmax_fifo_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_inp_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_oup_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_data_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_data_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/prev_max_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_data_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_en_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_addr_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_data_o +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_x_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_i +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q3 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q4 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q3 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q4 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_x_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_outer_dim_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_outer_dim_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_diff +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_diff +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp_diff +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q2 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q3 +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_full +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_empty +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/push_to_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_from_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_to_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_from_fifo +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_usage +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_row +add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_col +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/clk_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/rst_ni +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_q_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_q_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_q_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/oup_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/inp_bias_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_o +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_en +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data_unused +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_en +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_data +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_d +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_q +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_d +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_q +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_d +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_q +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/clk_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/rst_ni +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_q_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_q_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_q_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/oup_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/inp_bias_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_o +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_en +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data_unused +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_en +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_data +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_d +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_q +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_d +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_q +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_d +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_q +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/clk_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/rst_ni +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_q_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_q_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_q_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/oup_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/inp_bias_i +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_o +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_en +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data_unused +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_en +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_data +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_d +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_q +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_d +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_q +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_d +add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_q TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {5124600 ps} 1} {{Cursor 2} {5097000 ps} 1} {63 {3866973 ps} 1} {127 {4124941 ps} 1} {191 {4374986 ps} 1} {255 {4820989 ps} 1} {{Cursor 7} {4818977 ps} 0} -quietly wave cursor active 7 -configure wave -namecolwidth 189 -configure wave -valuecolwidth 165 +WaveRestoreCursors {{Cursor 1} {99296600 ps} 1} {{Cursor 2} {94544458 ps} 0} +quietly wave cursor active 2 +configure wave -namecolwidth 150 +configure wave -valuecolwidth 178 configure wave -justifyvalue left configure wave -signalnamewidth 1 configure wave -snapdistance 10 @@ -814,8 +785,4 @@ configure wave -griddelta 40 configure wave -timeline 0 configure wave -timelineunits ns update -WaveRestoreZoom {4810718 ps} {4831365 ps} - - - - +WaveRestoreZoom {94475383 ps} {94588811 ps} diff --git a/src/ita_controller.sv b/src/ita_controller.sv index 74cb424..91424eb 100644 --- a/src/ita_controller.sv +++ b/src/ita_controller.sv @@ -396,9 +396,7 @@ module ita_controller inp_bias_padded = inp_bias; - for (int i = 0; i < N; i++) begin - mask_d[i] = 1'b0; - end + mask_d = '0; case (ctrl_i.mask_type) None: begin mask_col_offset_d = '0; @@ -459,17 +457,20 @@ module ita_controller end end LowerTriangular: begin + mask_pos_d = (step_q == QK || step_q == AV) ? mask_pos_q : (ctrl_i.mask_start_index & (M-1)); + mask_tile_y_pos_d = (step_q == QK || step_q == AV) ? mask_tile_y_pos_q : ((ctrl_i.mask_start_index) / M); + if (step_q == QK) begin if (mask_tile_x_pos_q == tile_x_q && mask_tile_y_pos_q == tile_y_q && last_inner_tile_o == 1'b1) begin if (count_q == ((M*M/N)-1)) begin mask_tile_x_pos_d = mask_tile_x_pos_q + 1'b1; end if ((count_q >= mask_pos_q) && (count_q < (mask_pos_q + N))) begin - if ((count_q & (M-1)) == (M-1) && !(((count_q + mask_col_offset_q) & (N-1)) == (N-1))) begin + if (((count_q & (M-1)) == (M-1)) && !(((count_q + (N - (ctrl_i.mask_start_index & (N-1)))) & (N-1)) == (N-1))) begin mask_tile_y_pos_d = tile_y_q + 1'b1; mask_tile_x_pos_d = tile_x_q; mask_pos_d = ((count_q + (((ctrl_i.tile_s * (M*M/N)) - M) + 1)) & ((M*M/N)-1)); - end else if ((count_q & (M-1)) == (M-1) && (((count_q + mask_col_offset_q) & (N-1)) == (N-1))) begin + end else if (((count_q & (M-1)) == (M-1)) && (((count_q + (N - (ctrl_i.mask_start_index & (N-1)))) & (N-1)) == (N-1))) begin if ((count_q / M) == ((M/N)-1)) begin mask_tile_y_pos_d = tile_y_q + 1'b1; mask_tile_x_pos_d = tile_x_q + 1'b1; @@ -479,26 +480,26 @@ module ita_controller mask_tile_x_pos_d = tile_x_q; mask_pos_d = ((count_q + ((ctrl_i.tile_s * (M*M/N)) + 1)) & ((M*M/N)-1)); end - end else if (((count_q + mask_col_offset_q) & (N-1)) == (N-1)) begin - mask_pos_d = (mask_pos_q + (N - ((mask_pos_q + mask_col_offset_q) & (N-1))) + M) & ((M*M/N)-1); + end else if (((count_q + (N - (ctrl_i.mask_start_index & (N-1)))) & (N-1)) == (N-1)) begin + mask_pos_d = (mask_pos_q + (count_q - mask_pos_q + 1) + M) & ((M*M/N)-1); end for (int i = 0; i < N; i++) begin - if (((count_q + mask_col_offset_q) & (N-1)) <= i) begin + if (((count_q + (N - (ctrl_i.mask_start_index & (N-1)))) & (N-1)) >= i) begin mask_d[i] = 1'b1; end else begin mask_d[i] = 1'b0; end end - end else if ((count_q & (M-1)) < (mask_pos_q & (M-1))) begin + end else if ((count_q & (M-1)) >= (mask_pos_q & (M-1))) begin for (int i = 0; i < N; i++) begin mask_d[i] = 1'b1; end end - end else if (mask_tile_x_pos_q <= tile_x_q && mask_tile_y_pos_q != tile_y_q && last_inner_tile_o == 1'b1) begin + end else if (mask_tile_x_pos_q > tile_x_q && mask_tile_y_pos_q == tile_y_q && last_inner_tile_o == 1'b1) begin for (int i = 0; i < N; i++) begin mask_d[i] = 1'b1; end - end else if (mask_tile_x_pos_q != tile_x_q && mask_tile_y_pos_q == tile_y_q && last_inner_tile_o == 1'b1) begin + end else if (mask_tile_x_pos_q >= tile_x_q && mask_tile_y_pos_q != tile_y_q && last_inner_tile_o == 1'b1) begin for (int i = 0; i < N; i++) begin mask_d[i] = 1'b0; end diff --git a/src/ita_softmax.sv b/src/ita_softmax.sv index ce857b9..2939b11 100644 --- a/src/ita_softmax.sv +++ b/src/ita_softmax.sv @@ -272,39 +272,48 @@ module ita_softmax if ((inner_tile_q*M + i) >= ctrl_i.seq_length) begin disable_col[i] = 1'b1; end else begin - disable_col[i] = 1'b0; case (ctrl_i.mask_type) UpperTriangular: begin // (ctrl_i.mask_start_index / M) -> tile where the masking starts - if ((mask_tile_x_q - (ctrl_i.mask_start_index / M)) == mask_tile_y_q) begin + if (mask_tile_x_q == mask_tile_y_q + (ctrl_i.mask_start_index / M)) begin if (i >= ((count_soft_mask_q & (M-1)) + (ctrl_i.mask_start_index & (M-1)))) begin disable_col[i] = 1'b1; end else begin disable_col[i] = 1'b0; end end else if (mask_tile_x_q == ((ctrl_i.mask_start_index / M) + 1'b1 + mask_tile_y_q)) begin - if ((count_soft_mask_q & (M-1)) > (M - (ctrl_i.mask_start_index & (M-1)))) begin - if (i < ((count_soft_mask_q & (M-1)) - (M - (ctrl_i.mask_start_index & (M-1))))) begin - disable_col[i] = 1'b0; - end else begin - disable_col[i] = 1'b1; - end + if (i < signed'((count_soft_mask_q & (M-1)) - (M - (ctrl_i.mask_start_index & (M-1))))) begin + disable_col[i] = 1'b0; end else begin disable_col[i] = 1'b1; end end else if (mask_tile_x_q > ((ctrl_i.mask_start_index / M) + 1'b1 + mask_tile_y_q)) begin disable_col[i] = 1'b1; - end else if (mask_tile_x_q <= (ctrl_i.mask_start_index / M)) begin - disable_col[i] = 1'b0; end else begin disable_col[i] = 1'b0; end end LowerTriangular: begin - + if (mask_tile_y_q == mask_tile_x_q + (ctrl_i.mask_start_index / M)) begin + if (i <= signed'((count_soft_mask_q & (M-1)) - (ctrl_i.mask_start_index & (M-1)))) begin + disable_col[i] = 1'b1; + end else begin + disable_col[i] = 1'b0; + end + end else if (mask_tile_y_q == ((ctrl_i.mask_start_index / M) + 1'b1 + mask_tile_x_q)) begin + if (i <= ((count_soft_mask_q & (M-1)) + (M - (ctrl_i.mask_start_index & (M-1))))) begin + disable_col[i] = 1'b1; + end else begin + disable_col[i] = 1'b0; + end + end else if (mask_tile_y_q > ((ctrl_i.mask_start_index / M) + 1'b1 + mask_tile_x_q)) begin + disable_col[i] = 1'b1; + end else begin + disable_col[i] = 1'b0; + end end None: begin - + disable_col[i] = 1'b0; end endcase end From b3068b17323e7bd3312b71de74c77ca78dfd9252 Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Sun, 8 Dec 2024 22:21:11 +0100 Subject: [PATCH 47/60] Added functionality for the strided mask but not tested yet --- Makefile | 6 ++++++ PyITA/ITA.py | 27 +++++++++++++++++++++++---- src/ita_controller.sv | 37 ++++++++++++++++++++++++++++--------- src/ita_package.sv | 2 +- src/ita_softmax.sv | 15 ++++++++++++--- testGenerator.py | 2 +- 6 files changed, 71 insertions(+), 18 deletions(-) diff --git a/Makefile b/Makefile index ce7f2e0..0158e78 100644 --- a/Makefile +++ b/Makefile @@ -41,6 +41,12 @@ ifeq ($(mask), upper_triangular) mask_int = 1 else ifeq ($(mask), lower_triangular) mask_int = 2 +else ifeq ($(mask), strided) + mask_int = 3 +else ifeq ($(mask), upper_strided) + mask_int = 4 +else ifeq ($(mask), lower_strided) + mask_int = 5 else mask_int = 0 endif diff --git a/PyITA/ITA.py b/PyITA/ITA.py index 72b3e6e..c366685 100644 --- a/PyITA/ITA.py +++ b/PyITA/ITA.py @@ -579,23 +579,42 @@ def step3_Vp(self): self.tiler_V(self.V, self.Wv, self.Bv, self.Vp_requant, "V", "Wv", "Bv", "Vp") def apply_mask(self, index): - self.Mask = np.full((self.H, self.S, self.S), fill_value=False, dtype='bool') + if (self.mask == 'upper_triangular'): + self.Mask = np.full((self.H, self.S, self.S), fill_value=False, dtype='bool') if (0 < index and index < self.S): for h in range(self.Mask.shape[0]): for i in range(self.Mask.shape[1]): for j in range((i + index), self.Mask.shape[2]): self.Mask[h][i][j] = True else: - raise ValueError("Index is out of bounds") - elif(self.mask == 'lower_triangular'): + raise ValueError(f"Index is out of bounds for {self.mask} mask") + elif (self.mask == 'lower_triangular'): + self.Mask = np.full((self.H, self.S, self.S), fill_value=False, dtype='bool') if (0 < index and index < self.S): for h in range(self.Mask.shape[0]): for i in range(index, self.Mask.shape[1]): for j in range((i-(index-1))): self.Mask[h][i][j] = True else: - raise ValueError("Index is out of bounds") + raise ValueError(f"Index is out of bounds for {self.mask} mask") + elif (self.mask == 'strided'): + self.Mask = np.full((self.H, self.S, self.S), fill_value=True, dtype='bool') + if (0 < index and index < self.S): + for h in range(self.Mask.shape[0]): + for i in range(self.Mask.shape[1]): + self.Mask[h][i][i] = False + for j in range(i, self.Mask.shape[2], index): + self.Mask[h][i][j] = False + self.Mask[h][j][i] = False + else: + raise ValueError(f"Index is out of bounds for {self.mask} mask") + elif (self.mask == 'upper_strided'): + pass + elif (self.mask == 'lower_strided'): + pass + elif (self.mask == 'lower_local'): + pass elif(self.mask == 'none'): pass else: diff --git a/src/ita_controller.sv b/src/ita_controller.sv index 91424eb..d3c2f82 100644 --- a/src/ita_controller.sv +++ b/src/ita_controller.sv @@ -95,12 +95,7 @@ module ita_controller softmax_div_done_d = softmax_div_done_q; last_time = 1'b0; requant_add = {N {requant_add_i}}; - mask_col_offset_d = (step_q == QK || step_q == AV) ? mask_col_offset_q : ((ctrl_i.mask_start_index) & (N-1)); - mask_pos_d = (step_q == QK || step_q == AV) ? mask_pos_q : ((((ctrl_i.mask_start_index)/N)*M) & ((M*M/N)-1)); - mask_tile_x_pos_d = (step_q == QK || step_q == AV) ? mask_tile_x_pos_q : ((ctrl_i.mask_start_index) / M); inp_bias = inp_bias_i; - mask_tile_y_pos_d = mask_tile_y_pos_q; - mask_d = mask_q; busy_d = busy_q; softmax_fifo = 1'b0; @@ -395,8 +390,6 @@ module ita_controller end inp_bias_padded = inp_bias; - - mask_d = '0; case (ctrl_i.mask_type) None: begin mask_col_offset_d = '0; @@ -407,8 +400,10 @@ module ita_controller end UpperTriangular: begin mask_col_offset_d = (step_q == QK || step_q == AV) ? mask_col_offset_q : ((ctrl_i.mask_start_index) & (N-1)); - mask_pos_d = (step_q == QK || step_q == AV) ? mask_pos_q : ((((ctrl_i.mask_start_index)/N)*M) & ((M*M/N)-1)); mask_tile_x_pos_d = (step_q == QK || step_q == AV) ? mask_tile_x_pos_q : ((ctrl_i.mask_start_index) / M); + mask_tile_y_pos_d = mask_tile_y_pos_q; + mask_pos_d = (step_q == QK || step_q == AV) ? mask_pos_q : ((((ctrl_i.mask_start_index)/N)*M) & ((M*M/N)-1)); + mask_d = '0; if (step_q == QK) begin if (mask_tile_x_pos_q == tile_x_q && mask_tile_y_pos_q == tile_y_q && last_inner_tile_o == 1'b1) begin @@ -457,8 +452,11 @@ module ita_controller end end LowerTriangular: begin - mask_pos_d = (step_q == QK || step_q == AV) ? mask_pos_q : (ctrl_i.mask_start_index & (M-1)); + mask_col_offset_d = '0; + mask_tile_x_pos_d = '0; mask_tile_y_pos_d = (step_q == QK || step_q == AV) ? mask_tile_y_pos_q : ((ctrl_i.mask_start_index) / M); + mask_pos_d = (step_q == QK || step_q == AV) ? mask_pos_q : (ctrl_i.mask_start_index & (M-1)); + mask_d = '0; if (step_q == QK) begin if (mask_tile_x_pos_q == tile_x_q && mask_tile_y_pos_q == tile_y_q && last_inner_tile_o == 1'b1) begin @@ -506,6 +504,27 @@ module ita_controller end end end + Strided: begin + mask_col_offset_d = '0; + mask_tile_x_pos_d = '0; + mask_tile_y_pos_d = '0; + mask_pos_d = '0; + mask_d = '0; + + if (step_q == QK) begin + if (last_inner_tile_o == 1'b1) begin + for (int i = 0; i < N; i++) begin + //col_pos = count_q/M + i + mask_tile_x_pos_q * M + //row_pos = count_q & (M-1) + mask_tile_y_pos_q * M + if ((((((count_q / M) * N) + i + (tile_x_q * M)) - ((count_q & (M-1)) + (tile_y_q * M))) & (ctrl_i.mask_start_index-1)) == 0) begin + mask_d[i] = 1'b0; + end else begin + mask_d[i] = 1'b1; + end + end + end + end + end endcase if (inp_valid_i && inp_ready_o && oup_valid_i && oup_ready_i && last_inner_tile_o) begin diff --git a/src/ita_package.sv b/src/ita_package.sv index eeeb1c4..f63a299 100644 --- a/src/ita_package.sv +++ b/src/ita_package.sv @@ -41,7 +41,7 @@ package ita_package; typedef logic signed [GELU_OUT_WIDTH-1:0] gelu_out_t; // Masking - typedef enum {None=0, UpperTriangular=1, LowerTriangular=2} mask_e; + typedef enum {None=0, UpperTriangular=1, LowerTriangular=2, Strided=3, UpperStrided=4, LowerStrided=5} mask_e; typedef logic [WO-WI*2-2:0] mask_index_t; // IO diff --git a/src/ita_softmax.sv b/src/ita_softmax.sv index 2939b11..e99653b 100644 --- a/src/ita_softmax.sv +++ b/src/ita_softmax.sv @@ -273,6 +273,9 @@ module ita_softmax disable_col[i] = 1'b1; end else begin case (ctrl_i.mask_type) + None: begin + disable_col[i] = 1'b0; + end UpperTriangular: begin // (ctrl_i.mask_start_index / M) -> tile where the masking starts if (mask_tile_x_q == mask_tile_y_q + (ctrl_i.mask_start_index / M)) begin @@ -312,9 +315,15 @@ module ita_softmax disable_col[i] = 1'b0; end end - None: begin - disable_col[i] = 1'b0; - end + Strided: begin + //col_pos = i + mask_tile_x_q * M + //row_pos = count_soft_mask_q & (M-1) + mask_tile_y_pos_q * M + if ((((i + (mask_tile_x_q * M)) - ((count_soft_mask_q & (M-1)) + (mask_tile_y_q * M))) & (ctrl_i.mask_start_index-1)) == 0) begin + disable_col[i] = 1'b0; + end else begin + disable_col[i] = 1'b1; + end + end endcase end diff --git a/testGenerator.py b/testGenerator.py index fc3f002..97465d9 100644 --- a/testGenerator.py +++ b/testGenerator.py @@ -108,7 +108,7 @@ class ArgumentDefaultMetavarTypeFormatter(argparse.ArgumentDefaultsHelpFormatter default = 'none', type = str, help = 'Attention-Mask', - choices = ['none', 'upper_triangular', 'lower_triangular']) + choices = ['none', 'upper_triangular', 'lower_triangular', 'strided', 'upper_strided', 'lower_strided']) self.group1.add_argument('-I', default = 1, type = int, help = 'Masking starting index') self.group1.add_argument('--no-partial-softmax', action = 'store_true', From 9dbbd8e518f9920cc9b24c3a0260b0ac12c22c58 Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Thu, 12 Dec 2024 19:58:47 +0100 Subject: [PATCH 48/60] Made new masking module --- Bender.yml | 1 + PyITA/ITA.py | 1444 ---------------------------------- modelsim/sim_ita_tb_wave.tcl | 449 +---------- src/ita.sv | 3 +- src/ita_controller.sv | 188 +---- src/ita_masking.sv | 190 +++++ src/ita_package.sv | 9 +- src/ita_softmax.sv | 3 +- 8 files changed, 223 insertions(+), 2064 deletions(-) create mode 100644 src/ita_masking.sv diff --git a/Bender.yml b/Bender.yml index f0497c7..45d0671 100644 --- a/Bender.yml +++ b/Bender.yml @@ -32,6 +32,7 @@ sources: # Individual source files are simple string entries: - src/ita_package.sv - src/ita_accumulator.sv + - src/ita_masking.sv - src/ita_controller.sv - src/ita_dotp.sv - src/ita_fifo_controller.sv diff --git a/PyITA/ITA.py b/PyITA/ITA.py index c366685..e69de29 100644 --- a/PyITA/ITA.py +++ b/PyITA/ITA.py @@ -1,1444 +0,0 @@ -# Copyright 2023 ETH Zurich and University of Bologna. -# Licensed under the Apache License, Version 2.0, see LICENSE for details. -# SPDX-License-Identifier: Apache-2.0 - -# ---------------------------------------------------------------------- -# -# File: ITA.py -# -# Last edited: 5.03.2024 -# -# Copyright (C) 2024, ETH Zurich and University of Bologna. -# -# Author: Philip Wiese (wiesep@iis.ee.ethz.ch), ETH Zurich -# -# ---------------------------------------------------------------------- - -import os -import sys -from functools import partial -from typing import Union - -import numpy as np -from numpy.typing import ArrayLike, DTypeLike - -import seaborn as sns -import matplotlib.pyplot as plt - -from .softmax import fastSoftmax, realSoftmax, streamingPartialSoftmax -from .gelu import gelu_requantize, i_gelu_requantized, get_i_gelu_constants, get_i_gelu_requantized_constants -from .util import (generate_matrix_mem, pack_8b_to_word, pack_array_8b_to_word, pack_hex_24b, pack_multihead_8b_to_word, - pack_multihead_24b_to_word, random_shuffled_tensor, requantize, split_matrix, to_hex, write_matrix, - write_matrix_mem, write_matrix_mem_hex, write_vector_mem_hex, get_almost_symmetric_scaling_factor, - error_MAEP) - - -class Transformer: - WO = 26 - WI = 8 - - def __init__(self, - S: int, - P: int, - E: int, - F: int, - H: int, - path: Union[str, os.PathLike], - bias: bool = True, - activation: str = "identity", - mask: str = "none", - Q: ArrayLike = None, - K: ArrayLike = None, - V: ArrayLike = None, - Wq: ArrayLike = None, - Wk: ArrayLike = None, - Wv: ArrayLike = None, - Wo: ArrayLike = None, - Bq: ArrayLike = None, - Bk: ArrayLike = None, - Bv: ArrayLike = None, - Bo: ArrayLike = None, - FF_in: ArrayLike = None, - Wff: ArrayLike = None, - Wff2: ArrayLike = None, - Bff: ArrayLike = None, - Bff2: ArrayLike = None): - - self.ITA_N = 16 - self.ITA_M = 64 - - # WIESEP: Set numpy print options - np.set_printoptions(threshold = sys.maxsize) - np.set_printoptions(linewidth = np.inf) - - self._init_paths(path) - - self.S_ITA = ((S - 1) // self.ITA_M + 1) * self.ITA_M - self.P_ITA = ((P - 1) // self.ITA_M + 1) * self.ITA_M - self.E_ITA = ((E - 1) // self.ITA_M + 1) * self.ITA_M - self.F_ITA = ((F - 1) // self.ITA_M + 1) * self.ITA_M - self.H_ITA = 4 - self.split = self.ITA_M // self.ITA_N - - self.S = S - self.P = P - self.E = E - self.F = F - self.H = H - self.bias = bias - self.activation = activation - self.mask = mask - - # Setup transformation functions - self.split_m_m = partial(split_matrix, block_shape = (self.ITA_M, self.ITA_M)) - self.split_m_n = partial(split_matrix, block_shape = (self.ITA_M, self.ITA_N)) - - self._validate_matrix_constraints(K, V) - self._initialize_quantization_parameters() - self._init_gelu_constants() - self._initialize_tensors(Q, V, Wq, Wk, Wv, Wo, Bq, Bk, Bv, Bo, FF_in, Wff, Wff2, Bff, Bff2) - - def split_multihead_m_m(self, multihead_array: np.ndarray): - """ - Split a multihead array into blocks of size ITA_M x ITA_M. - - Args: - multihead_array (np.ndarray): A 3-dimensional numpy array to be split into blocks. - - Returns: - np.ndarray: A 3-dimensional numpy array with the blocks of size ITA_M x ITA_M, where all blocks are stacked vertically in the inner dimensions. - """ - return [self.split_m_m(array) for array in multihead_array] - - def _validate_matrix_constraints(self, K: ArrayLike, V: ArrayLike): - # WIESEP: Ensure that K is the same as V because we do cross-attention - assert (np.all(K == V)) - - # WIESEP: Current restrictions for ITA - # assert (self.S % self.ITA_M == 0), "Sequence length must be divisible by ITA_M" - # assert (self.P % self.ITA_M == 0), "Projection space must be divisible by ITA_M" - # assert (self.E % self.ITA_M == 0), "Embedding size must be divisible by ITA_M" - # assert (self.F % self.ITA_M == 0), "Feedforward size must be divisible by ITA_M" - - assert ( - self.E <= 512 - ), f"Embedding size must be less than {int(2**(self.WO-17))} because the internal bit width is {self.WO} bits" - assert ( - self.P <= 512 - ), f"Projection space must be less than {int(2**(self.WO-17))} because the internal bit width is {self.WO} bits" - assert ( - self.S <= 512 - ), f"Sequence length must be less than {int(2**(self.WO-17))} because the internal bit width is {self.WO} bits" - assert ( - self.F <= 512 - ), f"Feedforward size must be less than {int(2**(self.WO-17))} because the internal bit width is {self.WO} bits" - - # assert (self.H % self.H_ITA == 0 or self.H == 1), "Number of heads must be one or divisible by H_ITA" - - def _initialize_tensors(self, Q, V, Wq, Wk, Wv, Wo, Bq, Bk, Bv, Bo, FF_in, Wff, Wff2, Bff, Bff2): - - self.exp_sum = np.zeros(self.S, dtype = np.int32) - - self.Q_in = random_shuffled_tensor((self.S, self.E), self.WI) if Q is None else Q - self.Q = np.pad(self.Q_in, ((0, self.S_ITA - self.S), (0, self.E_ITA - self.E))) - - self.V_in = random_shuffled_tensor((self.S, self.E), self.WI) if V is None else V - self.V = np.pad(self.V_in, ((0, self.S_ITA - self.S), (0, self.E_ITA - self.E))) - - # WIESEP: K is the same as V because we do cross-attention - self.K_in = self.V_in - self.K = self.V - - self.FF_in = random_shuffled_tensor((self.S, self.E), self.WI) if FF_in is None else FF_in - self.FF = np.pad(self.FF_in, ((0, self.S_ITA - self.S), (0, self.E_ITA - self.E))) - - #### Weight matrices #### - self.Wq_in = random_shuffled_tensor((self.H, self.E, self.P), self.WI) if Wq is None else Wq - self.Wq = np.pad(self.Wq_in, ((0, 0), (0, self.E_ITA - self.E), (0, self.P_ITA - self.P))) - - self.Wk_in = random_shuffled_tensor((self.H, self.E, self.P), self.WI) if Wk is None else Wk - self.Wk = np.pad(self.Wk_in, ((0, 0), (0, self.E_ITA - self.E), (0, self.P_ITA - self.P))) - - self.Wv_in = random_shuffled_tensor((self.H, self.E, self.P), self.WI) if Wv is None else Wv - self.Wv = np.pad(self.Wv_in, ((0, 0), (0, self.E_ITA - self.E), (0, self.P_ITA - self.P))) - - self.Wo_in = random_shuffled_tensor((self.H, self.P, self.E), self.WI) if Wo is None else Wo - self.Wo = np.pad(self.Wo_in, ((0, 0), (0, self.P_ITA - self.P), (0, self.E_ITA - self.E))) - - self.Wff_in = random_shuffled_tensor((1, self.E, self.F), self.WI) if Wff is None else Wff - self.Wff = np.pad(self.Wff_in, ((0, 0), (0, self.E_ITA - self.E), (0, self.F_ITA - self.F))) - self.Wff2_in = random_shuffled_tensor((1, self.F, self.E), self.WI) if Wff2 is None else Wff2 - self.Wff2 = np.pad(self.Wff2_in, ((0, 0), (0, self.F_ITA - self.F), (0, self.E_ITA - self.E))) - - #### Bias matrices #### - if self.bias: - self.Bq_in = random_shuffled_tensor( - (self.H, self.P), int(np.log2(self.P)) + 8, type = np.int32) if Bq is None else Bq - else: - self.Bq_in = np.zeros((self.H, self.P), dtype = np.int8) - self.Bq = np.pad(self.Bq_in, ((0, 0), (0, self.P_ITA - self.P))) - self.Bq_broadcast = np.reshape(np.repeat(self.Bq, self.S, axis = 0), (self.H, self.S, self.P_ITA)) - self.Bq_broadcast = np.pad(self.Bq_broadcast, ((0, 0), (0, self.S_ITA - self.S), (0, 0))) - - - if self.bias: - self.Bk_in = random_shuffled_tensor( - (self.H, self.P), int(np.log2(self.P)) + 8, type = np.int32) if Bk is None else Bk - else: - self.Bk_in = np.zeros((self.H, self.P), dtype = np.int8) - self.Bk = np.pad(self.Bk_in, ((0, 0), (0, self.P_ITA - self.P))) - self.Bk_broadcast = np.reshape(np.repeat(self.Bk, self.S, axis = 0), (self.H, self.S, self.P_ITA)) - self.Bk_broadcast = np.pad(self.Bk_broadcast, ((0, 0), (0, self.S_ITA - self.S), (0, 0))) - - if self.bias: - self.Bv_in = random_shuffled_tensor( - (self.H, self.P), int(np.log2(self.P)) + 8, type = np.int32) if Bv is None else Bv - else: - self.Bv_in = np.zeros((self.H, self.P), dtype = np.int8) - self.Bv = np.pad(self.Bv_in, ((0, 0), (0, self.P_ITA - self.P))) - self.Bv_broadcast = np.reshape(np.repeat(self.Bv, self.S, axis = 0), (self.H, self.S, self.P_ITA)) - self.Bv_broadcast = np.pad(self.Bv_broadcast, ((0, 0), (0, self.S_ITA - self.S), (0, 0))) - - if self.bias: - self.Bo_in = random_shuffled_tensor( - (self.H, self.E), int(np.log2(self.E)) + 8, type = np.int32) if Bo is None else Bo - else: - self.Bo_in = np.zeros((self.H, self.E), dtype = np.int8) - self.Bo = np.pad(self.Bo_in, ((0, 0), (0, self.E_ITA - self.E))) - self.Bo_broadcast = np.reshape(np.repeat(self.Bo, self.S, axis = 0), (self.H, self.S, self.E_ITA)) - self.Bo_broadcast = np.pad(self.Bo_broadcast, ((0, 0), (0, self.S_ITA - self.S), (0, 0))) - - if self.bias: - self.Bff_in = random_shuffled_tensor( - (1, self.F), int(np.log2(self.F)) + 8, type = np.int32) if Bff is None else Bff - else: - self.Bff_in = np.zeros((1, self.F), dtype = np.int8) - self.Bff = np.pad(self.Bff_in, ((0, 0), (0, self.F_ITA - self.F))) - self.Bff_broadcast = np.reshape(np.repeat(self.Bff, self.S, axis = 0), (1, self.S, self.F_ITA)) - self.Bff_broadcast = np.pad(self.Bff_broadcast, ((0, 0), (0, self.S_ITA - self.S), (0, 0))) - if self.bias: - self.Bff2_in = random_shuffled_tensor( - (1, self.E), int(np.log2(self.E)) + 8, type = np.int32) if Bff2 is None else Bff2 - else: - self.Bff2_in = np.zeros((1, self.E), dtype = np.int8) - self.Bff2 = np.pad(self.Bff2_in, ((0, 0), (0, self.E_ITA - self.E))) - self.Bff2_broadcast = np.reshape(np.repeat(self.Bff2, self.S, axis = 0), (1, self.S, self.E_ITA)) - self.Bff2_broadcast = np.pad(self.Bff2_broadcast, ((0, 0), (0, self.S_ITA - self.S), (0, 0))) - - #### Intermediate tensors #### - - self.Qp = None - self.Qp_requant = None - self.Kp = None - self.Kp_requant = None - self.Vp = None - self.Vp_requant = None - self.FFp = None - self.FFp_requant = None - self.FF2p = None - self.FF2p_requant = None - - self.A = None - self.A_requant = None - self.A_real_softmax = np.zeros([self.H, self.S, self.S], dtype = np.int8) - self.A_partial_softmax = np.zeros([self.H, self.S, self.S], dtype = np.int8) - - self.Mask = None - - self.O_soft = None - self.O_soft_requant = None - - self.Out_soft = None - self.Out_soft_requant = None - - self.Out_soft_sum = None - self.Out_soft_sum_requant = None - - self.preactivation = np.random.randint(-128, 127, size = (self.S, self.F), dtype = np.int8) - self.postactivation = None - - def _initialize_quantization_parameters(self): - # WIESEP: 6 steps for attention layer and one to requantize the accumulated output, 2 for feedforward - self.requant_eps_mult = np.zeros((7, self.H), dtype = np.uint8) - self.requant_right_shift = np.zeros((7, self.H), dtype = np.uint8) - - # WIESEP: Add parameter in transformers will always be zero as there are no batch normalization layers - self.requant_add = np.zeros((7, self.H), dtype = np.int8) - - for i in range(7): - self.requant_eps_mult[i, :] = np.random.randint(64, 127, size = (1, self.H), dtype = np.uint8) - - if i < 3: # Q, K, V - max_bit_width = np.log2(self.requant_eps_mult[i, :].astype(np.uint32) * self.E * 2**9).astype(np.uint32) - elif i == 3: # QK - max_bit_width = np.log2(self.requant_eps_mult[i, :].astype(np.uint32) * self.P * 2**8).astype(np.uint32) - elif i == 4: # AV - max_bit_width = np.log2(self.requant_eps_mult[i, :].astype(np.uint32) * self.S * 2**5).astype(np.uint32) - elif i == 5: # OW - max_bit_width = np.log2(self.requant_eps_mult[i, :].astype(np.uint32) * self.E * 2**9).astype(np.uint32) - elif i == 6: # Sum OW - max_bit_width = np.log2(self.requant_eps_mult[i, :].astype(np.uint32) * self.H * 2**7).astype(np.uint32) - - # WIESEP: Last requatization after head summation shares the same parameters - if i == 6: - self.requant_right_shift[i, :] = np.tile(max_bit_width[0] - 8 + 2, self.H) - else: - self.requant_right_shift[i, :] = max_bit_width - 8 + 2 - - write_matrix([self.requant_eps_mult.T], "RQS_ATTN_MUL", self.paths["base"]) - write_matrix([self.requant_right_shift.T], "RQS_ATTN_SHIFT", self.paths["base"]) - write_matrix([self.requant_add.T], "RQS_ATTN_ADD", self.paths["base"]) - - self.requant_eps_mult_ffn = np.zeros((2, 1), dtype = np.uint8) - self.requant_right_shift_ffn = np.zeros((2, 1), dtype = np.uint8) - self.requant_add_ffn = np.zeros((2, 1), dtype = np.int8) - - for i in range(2): - self.requant_eps_mult_ffn[i, :] = np.random.randint(64, 127, size = (1, 1), dtype = np.uint8) - - if i == 0: - max_bit_width = np.log2(self.requant_eps_mult_ffn[i, :].astype(np.uint32) * self.E * 2**9).astype( - np.uint32) - elif i == 1: - max_bit_width = np.log2(self.requant_eps_mult_ffn[i, :].astype(np.uint32) * self.F * 2**9).astype( - np.uint32) - - self.requant_right_shift_ffn[i, :] = max_bit_width - 8 + 2 - - write_matrix([self.requant_eps_mult_ffn.T], "RQS_FFN_MUL", self.paths["base"]) - write_matrix([self.requant_right_shift_ffn.T], "RQS_FFN_SHIFT", self.paths["base"]) - write_matrix([self.requant_add_ffn.T], "RQS_FFN_ADD", self.paths["base"]) - - def _init_gelu_constants(self): - CLIP_LO = -4 - D = 2**20 - - gelu_eps_mult, _ = get_almost_symmetric_scaling_factor(CLIP_LO, n_bits = 8) - self.q_1, self.q_b, self.q_c, _, _, _, self.gelu_rqs_mul, self.gelu_rqs_shift, self.gelu_rqs_add, S_out = get_i_gelu_requantized_constants( - gelu_eps_mult, D) - - write_matrix([[self.q_1]], "GELU_ONE", self.paths["base"]) - write_matrix([[self.q_b]], "GELU_B", self.paths["base"]) - write_matrix([[self.q_c]], "GELU_C", self.paths["base"]) - write_matrix([[self.gelu_rqs_mul]], "activation_requant_mult", self.paths["base"]) - write_matrix([[self.gelu_rqs_shift]], "activation_requant_shift", self.paths["base"]) - write_matrix([[self.gelu_rqs_add]], "activation_requant_add", self.paths["base"]) - - def _init_paths(self, base_path: Union[str, os.PathLike]): - self.paths = { - "base": base_path, - "mempool": os.path.join(base_path, "mempool/"), - "hwpe": os.path.join(base_path, "hwpe/"), - "standalone": os.path.join(base_path, "standalone/"), - "snitch-cluster": os.path.join(base_path, "snitch-cluster/") - } - for path in self.paths.values(): - os.makedirs(path, exist_ok = True) - - def print_properties(self, verbose: int, text_align = 30): - if verbose > 0: - print(f"{'ITA Sequence Length ' :<{text_align}}: {self.S_ITA}") - print(f"{'ITA Projection Space' :<{text_align}}: {self.P_ITA}") - print(f"{'ITA Embedding Size ' :<{text_align}}: {self.E_ITA}") - print(f"{'ITA Number of Heads ' :<{text_align}}: {self.H_ITA}") - print(f"{'Matrix Sequence Length ' :<{text_align}}: {self.S}") - print(f"{'Matrix Projection Space' :<{text_align}}: {self.P}") - print(f"{'Matrix Embedding Size ' :<{text_align}}: {self.E}") - print(f"{'Matrix Feedforward Size' :<{text_align}}: {self.F}") - print(f"{'Matrix Number of Heads ' :<{text_align}}: {self.H}") - print(f"{'Bias ' :<{text_align}}: {bool(self.bias)}") - print(f"{'Requant Mult Attention ' :<{text_align}}: {list(self.requant_eps_mult)}") - print(f"{'Requant Shift Attention ' :<{text_align}}: {list(self.requant_right_shift)}") - print(f"{'Requant Add Attention ' :<{text_align}}: {list(self.requant_add)}") - print(f"{'Requant Mult FFN ' :<{text_align}}: {list(self.requant_eps_mult_ffn)}") - print(f"{'Requant Shift FFN ' :<{text_align}}: {list(self.requant_right_shift_ffn)}") - print(f"{'Requant Add FFN ' :<{text_align}}: {list(self.requant_add_ffn)}") - - def tiler_QK(self, qk: np.ndarray, weight: np.ndarray, bias: np.ndarray, output: np.ndarray, input_file: str, - weight_file: str, bias_file: str, output_file: str): - """ - Tile input, weight, bias and output for Q and K generation - """ - - # Weight Wqk is H x E x P - # Transpose Wqk to H x P x E - # print(f"qk: {qk.shape}") - # print(f"qk: {weight.shape}") - - weight = np.transpose(weight, (0, 2, 1)) - - tile_x = qk.shape[0] // self.ITA_M # S // ITA_M - tile_inner = qk.shape[1] // self.ITA_M # E // ITA_M - tile_y = weight.shape[1] // self.ITA_M # P // ITA_M - print(f"=> Tile: {input_file} x {weight_file} + {bias_file} = {output_file}") - print(f" X: {tile_x}, Y: {tile_y}, Inner: {tile_inner}") - - # Input QK is S x E - Input = split_matrix(qk, (self.ITA_M, self.ITA_M), flatten = False) - # Repeat each row of each tile split times - Input = np.tile(Input, [1, 1, self.split, 1]) - # Repeat each tile number of output row tiles times - Input = np.tile(Input, [1, tile_y, 1, 1]).reshape((-1, self.ITA_M)) - # fig, ax = plt.subplots(1, 2) # Create a figure with two subplots - # im0 = ax[0].imshow(Input, cmap='viridis') - # im1 = ax[1].imshow(np.squeeze(weight, axis=0)) - - # # Add colorbars for each image if needed - # fig.colorbar(im0, ax=ax[0]) - # fig.colorbar(im1, ax=ax[1]) - - # # Set titles for each subplot - # ax[0].set_title("Inputs") - # ax[1].set_title("Weights") - - plt.show() - write_matrix(Input, input_file, self.paths["standalone"]) - - # Transposed Weight Wqk is H x P x E - for h in range(self.H): - Weight = split_matrix(weight[h], (self.ITA_M, self.ITA_M)) - # Repeat each tile number of output column tiles times - Weight = np.tile(Weight, [tile_x, 1]) - write_matrix(Weight, f"{weight_file}_{h}", self.paths["standalone"]) - - # Bias Bqk is H x P - # Broadcast Bias Bqk to H x S x P - bias = np.tile(bias, [1, self.S_ITA, 1]) - for h in range(self.H): - Bias = split_matrix(bias[h], (self.ITA_M, self.ITA_N)) - write_matrix(Bias, f"{bias_file}_{h}", self.paths["standalone"]) - - # Output QKp is H x S x P - for h in range(self.H): - Output = split_matrix(output[h], (self.ITA_M, self.ITA_N)) - write_matrix(Output, f"{output_file}_{h}", self.paths["standalone"]) - - def tiler_V(self, v, weight, bias, output, input_file, weight_file, bias_file, output_file): - """ - Tile input, weight, bias and output for V generation - *Compute Vp in transposed form* - """ - - # Weight Wv is H x E x P - # Transpose Wv to H x P x E - weight = np.transpose(weight, (0, 2, 1)) - - tile_x = v.shape[0] // self.ITA_M # S // ITA_M - tile_inner = v.shape[1] // self.ITA_M # E // ITA_M - tile_y = weight.shape[1] // self.ITA_M # P // ITA_M - print(f"=> Tile: {input_file} x {weight_file} + {bias_file} = {output_file}") - print(f" X: {tile_x}, Y: {tile_y}, Inner: {tile_inner}") - - # Input V is S x E (will be used as second input) - Input = split_matrix(v, (self.ITA_M, self.ITA_M)) - # Repeat each tile number of output row tiles times - Input = np.tile(Input, [tile_y, 1]) - write_matrix(Input, input_file, self.paths["standalone"]) - - # Transposed Weight Wv is H x P x E (will be used as first input) - for h in range(self.H): - Weight = split_matrix(weight[h], (self.ITA_M, self.ITA_M), flatten = False) - # Repeat each row of each tile split times - Weight = np.tile(Weight, [1, 1, self.split, 1]) - # Repeat each tile number of output column tiles times - Weight = np.tile(Weight, [1, tile_x, 1, 1]).reshape((-1, self.ITA_M)) - write_matrix(Weight, f"{weight_file}_{h}", self.paths["standalone"]) - - # Bias Bv is H x P - # Broadcast Bias Bv to H x S x P - bias = np.tile(bias, [1, self.S_ITA, 1]) - # Transpose Bias Bv to H x P x S - bias = np.transpose(bias, (0, 2, 1)) - for h in range(self.H): - Bias = split_matrix(bias[h], (self.ITA_M, self.ITA_N)) - write_matrix(Bias, f"{bias_file}_{h}", self.paths["standalone"]) - - # Output Vp is H x S x P - # Transpose Vp to H x P x S - output = np.transpose(output, (0, 2, 1)) - for h in range(self.H): - Output = split_matrix(output[h], (self.ITA_M, self.ITA_N)) - write_matrix(Output, f"{output_file}_{h}", self.paths["standalone"]) - - def tiler_AV(self, Qp, Kp, output, input_file, weight_file, output_file): - """ - Tile input, weight, and output for Q.K = A and A.V = O generation - """ - - tile_x = Qp.shape[1] // self.ITA_M - tile_inner = Qp.shape[2] // self.ITA_M - tile_y = Kp.shape[1] // self.ITA_M - print(f"=> Tile: {input_file} x {weight_file} = {output_file}") - print(f" X: {tile_x}, Y: {tile_y}, Inner: {tile_inner}") - - # Input Qp is H x S x P or A is S x S - for h in range(self.H): - Input = split_matrix(Qp[h], (self.ITA_M, self.ITA_M), flatten = False) - # Repeat each row of each tile split times - Input = np.tile(Input, [1, 1, self.split, 1]) - # Repeat each tile number of output row tiles times - Input = np.tile(Input, [1, tile_y, 1, 1]).reshape((-1, self.ITA_M)) - write_matrix(Input, f"{input_file}_{h}", self.paths["standalone"]) - - # Weight Kp is H x S x P or V is H x P x S - for h in range(self.H): - Weight = split_matrix(Kp[h], (self.ITA_M, self.ITA_M)) - # Repeat each tile number of output column tiles times - Weight = np.tile(Weight, [tile_x, 1]) - write_matrix(Weight, f"{weight_file}_{h}", self.paths["standalone"]) - - # Output A is H x S x S or O is H x S x P - for h in range(self.H): - Output = split_matrix(output[h], (self.ITA_M, self.ITA_N)) - write_matrix(Output, f"{output_file}_{h}", self.paths["standalone"]) - - def tiler_Out(self, O, weight, bias, output, input_file, weight_file, bias_file, output_file): - """ - Tile input, weight, bias and output for Output generation - Same as QK but takes multi-head input - """ - - # Weight Wo is H x P x E - # Transpose Wo to H x E x P - weight = np.transpose(weight, (0, 2, 1)) - - tile_x = O.shape[1] // self.ITA_M # S // ITA_M - tile_inner = O.shape[2] // self.ITA_M # P // ITA_M - tile_y = weight.shape[1] // self.ITA_M # E // ITA_M - - print(f"=> Tile: {input_file} x {weight_file} + {bias_file} = {output_file}") - print(f" X: {tile_x}, Y: {tile_y}, Inner: {tile_inner}") - - # Input O is H x S x P - for h in range(self.H): - Input = split_matrix(O[h], (self.ITA_M, self.ITA_M), flatten = False) - # Repeat each row of each tile split times - Input = np.tile(Input, [1, 1, self.split, 1]) - # Repeat each tile number of output row tiles times - Input = np.tile(Input, [1, tile_y, 1, 1]).reshape((-1, self.ITA_M)) - write_matrix(Input, f"{input_file}_{h}", self.paths["standalone"]) - - # Transposed Weight Wo is H x E x P - for h in range(self.H): - Weight = split_matrix(weight[h], (self.ITA_M, self.ITA_M)) - # Repeat each tile number of output column tiles times - Weight = np.tile(Weight, [tile_x, 1]) - write_matrix(Weight, f"{weight_file}_{h}", self.paths["standalone"]) - - # Bias Bo is H x E - # Broadcast Bias Bo to H x S x E - bias = np.tile(bias, [1, self.S_ITA, 1]) - for h in range(self.H): - Bias = split_matrix(bias[h], (self.ITA_M, self.ITA_N)) - write_matrix(Bias, f"{bias_file}_{h}", self.paths["standalone"]) - - # Output is H x S x E - for h in range(self.H): - Output = split_matrix(output[h], (self.ITA_M, self.ITA_N)) - write_matrix(Output, f"{output_file}_{h}", self.paths["standalone"]) - - def step1_Qp(self): - self.Qp = np.matmul(self.Q, self.Wq, dtype = np.int32) + self.Bq_broadcast - self.Qp = np.clip(self.Qp, -2**(self.WO - 1), 2**(self.WO - 1) - 1) - self.Qp_requant = requantize(self.Qp, self.requant_eps_mult[0], self.requant_right_shift[0], - self.requant_add[0]) - - # Set padded values to zero - if (self.S_ITA - self.S) > 0: - self.Qp_requant[:, -(self.S_ITA - self.S):, :] = 0 - if (self.P_ITA - self.P) > 0: - self.Qp_requant[:, :, -(self.P_ITA - self.P):] = 0 - - self.tiler_QK(self.Q, self.Wq, self.Bq, self.Qp_requant, "Q", "Wq", "Bq", "Qp") - - def step2_Kp(self): - self.Kp = np.matmul(self.K, self.Wk, dtype = np.int32) + self.Bk_broadcast - self.Kp = np.clip(self.Kp, -2**(self.WO - 1), 2**(self.WO - 1) - 1) - self.Kp_requant = requantize(self.Kp, self.requant_eps_mult[1], self.requant_right_shift[1], - self.requant_add[1]) - - if (self.S_ITA - self.S) > 0: - self.Kp_requant[:, -(self.S_ITA - self.S):, :] = 0 - if (self.P_ITA - self.P) > 0: - self.Kp_requant[:, :, -(self.P_ITA - self.P):] = 0 - - self.tiler_QK(self.K, self.Wk, self.Bk, self.Kp_requant, "K", "Wk", "Bk", "Kp") - - def step3_Vp(self): - self.Vp = np.matmul(self.V, self.Wv, dtype = np.int32) + self.Bv_broadcast - self.Vp = np.clip(self.Vp, -2**(self.WO - 1), 2**(self.WO - 1) - 1) - self.Vp_requant = requantize(self.Vp, self.requant_eps_mult[2], self.requant_right_shift[2], - self.requant_add[2]) - - if (self.S_ITA - self.S) > 0: - self.Vp_requant[:, -(self.S_ITA - self.S):, :] = 0 - if (self.P_ITA - self.P) > 0: - self.Vp_requant[:, :, -(self.P_ITA - self.P):] = 0 - - # Compute Vp in transposed form - self.tiler_V(self.V, self.Wv, self.Bv, self.Vp_requant, "V", "Wv", "Bv", "Vp") - - def apply_mask(self, index): - - if (self.mask == 'upper_triangular'): - self.Mask = np.full((self.H, self.S, self.S), fill_value=False, dtype='bool') - if (0 < index and index < self.S): - for h in range(self.Mask.shape[0]): - for i in range(self.Mask.shape[1]): - for j in range((i + index), self.Mask.shape[2]): - self.Mask[h][i][j] = True - else: - raise ValueError(f"Index is out of bounds for {self.mask} mask") - elif (self.mask == 'lower_triangular'): - self.Mask = np.full((self.H, self.S, self.S), fill_value=False, dtype='bool') - if (0 < index and index < self.S): - for h in range(self.Mask.shape[0]): - for i in range(index, self.Mask.shape[1]): - for j in range((i-(index-1))): - self.Mask[h][i][j] = True - else: - raise ValueError(f"Index is out of bounds for {self.mask} mask") - elif (self.mask == 'strided'): - self.Mask = np.full((self.H, self.S, self.S), fill_value=True, dtype='bool') - if (0 < index and index < self.S): - for h in range(self.Mask.shape[0]): - for i in range(self.Mask.shape[1]): - self.Mask[h][i][i] = False - for j in range(i, self.Mask.shape[2], index): - self.Mask[h][i][j] = False - self.Mask[h][j][i] = False - else: - raise ValueError(f"Index is out of bounds for {self.mask} mask") - elif (self.mask == 'upper_strided'): - pass - elif (self.mask == 'lower_strided'): - pass - elif (self.mask == 'lower_local'): - pass - elif(self.mask == 'none'): - pass - else: - raise ValueError("Mask not supported") - - - def step4_QK(self, no_partial_softmax, index): - self.A = np.array( - [np.matmul(self.Qp_requant[i], np.transpose(self.Kp_requant[i]), dtype = np.int32) for i in range(self.H)]) - self.A = np.clip(self.A, -2**(self.WO - 1), 2**(self.WO - 1) - 1) - self.A_requant = requantize(self.A, self.requant_eps_mult[3], self.requant_right_shift[3], self.requant_add[3]) - - self.apply_mask(index) - - print(self.Mask) - - matrix = np.squeeze(self.A_requant) - plt.imshow(matrix, cmap='viridis') - plt.colorbar() - plt.title("A_requant/A_stream_soft_in") - plt.show() - - print(f"A_requant row 0: {self.A_requant[0, 0, :]}") - - if (self.S_ITA - self.S) > 0: - self.A_requant[:, -(self.S_ITA - self.S):, :] = 0 - self.A_requant[:, :, -(self.S_ITA - self.S):] = 0 - - self.soft(no_partial_softmax) - - matrix = np.squeeze(self.A_partial_softmax) - plt.imshow(matrix, cmap='viridis') - plt.colorbar() - plt.title("A_partial_softmax") - plt.show() - - self.tiler_AV(self.Qp_requant, self.Kp_requant, self.A_requant, "Qp_in", "Kp_in", "A") - - def soft(self, no_partial_softmax = False): - self.A_real_softmax = realSoftmax(self.A_requant[:, :self.S, :self.S]) - self.A_real_softmax = np.pad(self.A_real_softmax, ((0, 0), (0, self.S_ITA - self.S), (0, self.S_ITA - self.S))) - - if no_partial_softmax: - self.A_partial_softmax = fastSoftmax(self.A_requant[:, :self.S, :self.S]) - self.A_partial_softmax = np.pad(self.A_partial_softmax, - ((0, 0), (0, self.S_ITA - self.S), (0, self.S_ITA - self.S))) - else: - self.A_partial_softmax = streamingPartialSoftmax(self.A_requant[:, :self.S, :self.S], self.Mask) - self.A_partial_softmax[self.Mask] = 0 - print(f"inp_stream_soft_o: {self.A_partial_softmax[0,:,:]}") - print(f"Normalization Sum: {np.sum(self.A_partial_softmax[0,:,:], axis=1)}") - self.A_partial_softmax = np.pad(self.A_partial_softmax, - ((0, 0), (0, self.S_ITA - self.S), (0, self.S_ITA - self.S))) - - if self.H == 1: - A_save = [np.tile(self.A_partial_softmax[i], [self.split, 1]) for i in range(self.H)] - write_matrix(A_save, "A_soft_in", self.paths["standalone"]) - for h in range(self.H): - A_save = self.A_partial_softmax[h] - write_matrix(A_save, f"A_soft_{h}", self.paths["standalone"]) - - def step5_AV(self): - print(f"A_partial_softmax: {self.A_partial_softmax.shape}") - print(f"Vp_requant: {self.Vp_requant.shape}") - - self.O_soft = np.array([ - np.matmul(self.A_partial_softmax[i].astype(np.uint8), self.Vp_requant[i], dtype = np.int32) - for i in range(self.H) - ]) - print(f"O_soft without requant row 0: {self.O_soft[0, 62, :]}") - print(f"O_soft without requant row 0: {self.O_soft[0, 63, :]}") - print(f"O_soft without requant row 0: {self.O_soft[0, 0, :]}") - print(f"O_soft without requant row 0: {self.O_soft[0, 1, :]}") - - self.O_soft = np.clip(self.O_soft, -2**(self.WO - 1), 2**(self.WO - 1) - 1) - self.O_soft_requant = requantize(self.O_soft, self.requant_eps_mult[4], self.requant_right_shift[4], - self.requant_add[4]) - - print(f"O_soft_requant: {self.O_soft_requant[0, 62, :]}") - print(f"O_soft_requant: {self.O_soft_requant[0, 63, :]}") - print(f"O_soft_requant: {self.O_soft_requant[0, 0, :]}") - print(f"O_soft_requant: {self.O_soft_requant[0, 1, :]}") - - if (self.S_ITA - self.S) > 0: - self.O_soft_requant[:, -(self.S_ITA - self.S):, :] = 0 - if (self.P_ITA - self.P) > 0: - self.O_soft_requant[:, :, -(self.P_ITA - self.P):] = 0 - - matrix = np.squeeze(self.O_soft_requant) - plt.imshow(matrix, cmap='viridis') - plt.colorbar() - plt.title("O_soft_requant/O_soft") - plt.show() - - self.tiler_AV(self.A_requant, np.transpose(self.Vp_requant, (0, 2, 1)), self.O_soft_requant, "A_stream_soft_in", - "Vp_in", "O_soft") - - - - def apply_activation(self, preactivation, activation): - if activation not in ["gelu", "relu", "identity"]: - raise ValueError("Activation function not supported") - - if activation == "gelu": - vectorized_gelu = np.vectorize(i_gelu_requantized) - postactivation = vectorized_gelu(preactivation, self.q_1, self.q_b, self.q_c, self.gelu_rqs_mul, - self.gelu_rqs_shift, self.gelu_rqs_add) - elif activation == "relu": - postactivation = np.maximum(preactivation, 0) - vectorized_requantize = np.vectorize(gelu_requantize) - postactivation = vectorized_requantize(postactivation, self.gelu_rqs_mul, self.gelu_rqs_shift, - self.gelu_rqs_add) - elif activation == "identity": - postactivation = preactivation.copy() - - return postactivation - - def step6_O(self): - self.Out_soft = np.matmul(self.O_soft_requant, self.Wo, dtype = np.int32) + self.Bo_broadcast - self.Out_soft = np.clip(self.Out_soft, -2**(self.WO - 1), 2**(self.WO - 1) - 1) - self.Out_soft_requant = requantize(self.Out_soft, self.requant_eps_mult[5], self.requant_right_shift[5], - self.requant_add[5]) - - matrix = np.squeeze(self.Out_soft_requant) - plt.imshow(matrix, cmap='viridis') - plt.colorbar() - plt.title("Out_soft_requant") - plt.show() - - if (self.S_ITA - self.S) > 0: - self.Out_soft_requant[:, -(self.S_ITA - self.S):, :] = 0 - if (self.E_ITA - self.E) > 0: - self.Out_soft_requant[:, :, -(self.E_ITA - self.E):] = 0 - - self.tiler_Out(self.O_soft_requant, self.Wo, self.Bo, self.Out_soft_requant, "O_soft_in", "Wo", "Bo", - "Out_soft") - - def feedforward_layer(self): - self.FFp = np.matmul(self.FF, self.Wff, dtype = np.int32) + self.Bff_broadcast - self.FFp = np.clip(self.FFp, -2**(self.WO - 1), 2**(self.WO - 1) - 1) - self.FFp_requant = requantize(self.FFp, self.requant_eps_mult_ffn[0], self.requant_right_shift_ffn[0], - self.requant_add_ffn[0]) - self.FFp_requant = self.apply_activation(self.FFp_requant, self.activation) - - self.tiler_QK(self.FF, self.Wff, self.Bff, self.FFp_requant, "FF", "Wff", "Bff", "FFp") - - self.FF2p = np.matmul(self.FFp_requant, self.Wff2, dtype = np.int32) + self.Bff2_broadcast - self.FF2p = np.clip(self.FF2p, -2**(self.WO - 1), 2**(self.WO - 1) - 1) - self.FF2p_requant = requantize(self.FF2p, self.requant_eps_mult_ffn[1], self.requant_right_shift_ffn[1], - self.requant_add_ffn[1]) - - self.tiler_Out(self.FFp_requant, self.Wff2, self.Bff2, self.FF2p_requant, "FFp_in", "Wff2", "Bff2", "FF2p") - - def step7_Osum(self): - self.Out_soft_sum = np.sum(self.Out_soft_requant, axis = 0, dtype = np.int32, keepdims = True) - self.Out_soft_sum_requant = requantize(self.Out_soft_sum, self.requant_eps_mult[6], self.requant_right_shift[6], - self.requant_add[6]) - - def test_activations(self): - write_matrix(self.preactivation, "preactivation", self.paths["standalone"]) - gelu = np.zeros(self.preactivation.shape, dtype = np.int8) - relu = np.zeros(self.preactivation.shape, dtype = np.int8) - for i in range(self.preactivation.shape[0]): - for j in range(self.preactivation.shape[1]): - gelu[i, j] = i_gelu_requantized(self.preactivation[i, j], self.q_1, self.q_b, self.q_c, - self.gelu_rqs_mul, self.gelu_rqs_shift, self.gelu_rqs_add) - relu[i, j] = self.preactivation[i, j] if self.preactivation[i, j] > 0 else 0 - relu[i, j] = gelu_requantize(relu[i, j], self.gelu_rqs_mul, self.gelu_rqs_shift, self.gelu_rqs_add) - - write_matrix(gelu, "gelu", self.paths["standalone"]) - write_matrix(relu, "relu", self.paths["standalone"]) - - def export_hwpe(self): - path = self.paths["hwpe"] - - def remove_if_exists(file_name): - if os.path.exists(file_name): - os.remove(file_name) - - # WIESEP: Delete the old file otherwise it will lead to mismatches during RTL simulations as the files are memory mapped - mem_file = "mem" - files = [ - f"{mem_file}.txt", "Output.txt", "Q.txt", "K.txt", "V.txt", "QK.txt", "A.txt", "AV.txt", "OW.txt", "F1.txt", - "F2.txt" - ] - for file in files: - remove_if_exists(f"{path}/{file}") - - # Write the new mem file - # Layer: Attention - for h in range(self.H): - q = split_matrix(self.Q, (self.ITA_M, self.ITA_M)) - write_matrix_mem_hex(pack_array_8b_to_word(q, hex_string = False), mem_file, path) - - k = split_matrix(self.K, (self.ITA_M, self.ITA_M)) - write_matrix_mem_hex(pack_array_8b_to_word(k, hex_string = False), mem_file, path) - - w1 = split_matrix(np.transpose(self.Wq[h]), (self.ITA_M, self.ITA_M)) - write_matrix_mem_hex(pack_array_8b_to_word(w1, hex_string = False), mem_file, path) - - w2 = split_matrix(np.transpose(self.Wk[h]), (self.ITA_M, self.ITA_M)) - write_matrix_mem_hex(pack_array_8b_to_word(w2, hex_string = False), mem_file, path) - - w3 = split_matrix(np.transpose(self.Wv[h]), (self.ITA_M, self.ITA_M)) - write_matrix_mem_hex(pack_array_8b_to_word(w3, hex_string = False), mem_file, path) - - w4 = split_matrix(np.transpose(self.Wo[h]), (self.ITA_M, self.ITA_M)) - write_matrix_mem_hex(pack_array_8b_to_word(w4, hex_string = False), mem_file, path) - - b1_hex = np.vectorize(lambda val: to_hex(val, bit_size = 24))(self.Bq[h]) - # pack 24-bit values into 32-bit words - packed_b1_hex = np.array(pack_hex_24b(b1_hex)) - write_vector_mem_hex(packed_b1_hex, mem_file, path) - - b2_hex = np.vectorize(lambda val: to_hex(val, bit_size = 24))(self.Bk[h]) - # pack 24-bit values into 32-bit words - packed_b2_hex = np.array(pack_hex_24b(b2_hex)) - write_vector_mem_hex(packed_b2_hex, mem_file, path) - - b3_hex = np.vectorize(lambda val: to_hex(val, bit_size = 24))(self.Bv[h]) - # pack 24-bit values into 32-bit words - packed_b3_hex = np.array(pack_hex_24b(b3_hex)) - write_vector_mem_hex(packed_b3_hex, mem_file, path) - - b4_hex = np.vectorize(lambda val: to_hex(val, bit_size = 24))(self.Bo[h]) - # pack 24-bit values into 32-bit words - packed_b4_hex = np.array(pack_hex_24b(b4_hex)) - write_vector_mem_hex(packed_b4_hex, mem_file, path) - - # Write output - qp = split_matrix(self.Qp_requant[h], (self.ITA_M, self.ITA_M)) - write_matrix_mem_hex(pack_array_8b_to_word(qp, hex_string = False), "Q", path) - - kp = split_matrix(self.Kp_requant[h], (self.ITA_M, self.ITA_M)) - write_matrix_mem_hex(pack_array_8b_to_word(kp, hex_string = False), "K", path) - - v = split_matrix(np.transpose(self.Vp_requant[h]), (self.ITA_M, self.ITA_M)) - write_matrix_mem_hex(pack_array_8b_to_word(v, hex_string = False), "V", path) - - qk = split_matrix(self.A_requant[h], (self.ITA_M, self.ITA_M)) - write_matrix_mem_hex(pack_array_8b_to_word(qk, hex_string = False), "QK", path) - - a = split_matrix(self.A_partial_softmax[h], (self.ITA_M, self.ITA_M)) - write_matrix_mem_hex(pack_array_8b_to_word(a, hex_string = False), "A", path) - - o = split_matrix(self.O_soft_requant[h], (self.ITA_M, self.ITA_M)) - write_matrix_mem_hex(pack_array_8b_to_word(o, hex_string = False), "AV", path) - - out = split_matrix(self.Out_soft_requant[h], (self.ITA_M, self.ITA_M)) - write_matrix_mem_hex(pack_array_8b_to_word(out, hex_string = False), "OW", path) - - # Layer: Feedforward - ff = split_matrix(self.FF, (self.ITA_M, self.ITA_M)) - write_matrix_mem_hex(pack_array_8b_to_word(ff, hex_string = False), mem_file, path) - - wff = split_matrix(np.transpose(self.Wff[0]), (self.ITA_M, self.ITA_M)) - write_matrix_mem_hex(pack_array_8b_to_word(wff, hex_string = False), mem_file, path) - - wff2 = split_matrix(np.transpose(self.Wff2[0]), (self.ITA_M, self.ITA_M)) - write_matrix_mem_hex(pack_array_8b_to_word(wff2, hex_string = False), mem_file, path) - - bff_hex = np.vectorize(lambda val: to_hex(val, bit_size = 24))(self.Bff[0]) - # pack 24-bit values into 32-bit words - packed_bff_hex = np.array(pack_hex_24b(bff_hex)) - write_vector_mem_hex(packed_bff_hex, mem_file, path) - - bff2_hex = np.vectorize(lambda val: to_hex(val, bit_size = 24))(self.Bff2[0]) - # pack 24-bit values into 32-bit words - packed_bff2_hex = np.array(pack_hex_24b(bff2_hex)) - write_vector_mem_hex(packed_bff2_hex, mem_file, path) - - # Write output - ff = split_matrix(self.FFp_requant[0], (self.ITA_M, self.ITA_M)) - write_matrix_mem_hex(pack_array_8b_to_word(ff, hex_string = False), "F1", path) - - ff2 = split_matrix(self.FF2p_requant[0], (self.ITA_M, self.ITA_M)) - write_matrix_mem_hex(pack_array_8b_to_word(ff2, hex_string = False), "F2", path) - - def generate_snitch_cluster(self) -> str: - """ - This function generates a header file for ITA integrated into the the Snitch cluster. - - Returns: - str: The generated configuration file as a string. - """ - - ret = "" - - ret += f"""/* This file is automatically generated by '{" ".join(sys.argv)}' -* Do not edit manually, any manual change will be overwritten. -*/ - -// clang-format off -""" - - def generate_C_array(array, name, type = "uint32_t"): - """ - Generates a C-style array declaration from a numpy array. - - Args: - array (np.ndarray): The numpy array to be converted. - name (str): The name of the array in the generated code. - - Returns: - str: The C-style array declaration. - """ - return f"const {type} {name}[{array.size}] = {{\n{generate_matrix_mem(array)}\n}};\n" - - def generate_multihead_C_array(multihead_array, name, _type): - ret = "" - ret += f"const {_type} {name}[{self.H}][{multihead_array[0].size}] = {{\n" - ret += ",\n".join([f"{{\n{generate_matrix_mem(array)}\n}}" for array in multihead_array]) - ret += "\n};\n" - return ret - - def requant_multihead_harmonization_and_pack_8b(requant_array): - ret = [] - for i in range(self.H): - ret.append(pack_8b_to_word(np.pad(requant_array[:6, i], (0, 2)))) - return np.array(ret) - - def generate_define(name, value): - return f"#define {name.upper()} {value}\n" - - # Inputs (Q, K) - ret += generate_C_array(self.split_m_m(self.Q), "input_q", "int8_t") - ret += generate_C_array(self.split_m_m(self.K), "input_k", "int8_t") - - # Weights (Wq, Wk, Wv, Wo) - ret += generate_multihead_C_array(self.split_multihead_m_m(self.Wq.transpose(0, 2, 1)), "input_Wq", "int8_t") - ret += generate_multihead_C_array(self.split_multihead_m_m(self.Wk.transpose(0, 2, 1)), "input_Wk", "int8_t") - ret += generate_multihead_C_array(self.split_multihead_m_m(self.Wv.transpose(0, 2, 1)), "input_Wv", "int8_t") - ret += generate_multihead_C_array(self.split_multihead_m_m(self.Wo.transpose(0, 2, 1)), "input_Wo", "int8_t") - - # Biases (Bq, Bk, Bv, Bo) - ret += generate_multihead_C_array(self.Bq, "input_Bq", "ita_int24_t") - ret += generate_multihead_C_array(self.Bk, "input_Bk", "ita_int24_t") - ret += generate_multihead_C_array(self.Bv, "input_Bv", "ita_int24_t") - ret += generate_multihead_C_array(self.Bo, "input_Bo", "ita_int24_t") - - # Requantization parameters - ret += generate_multihead_C_array(requant_multihead_harmonization_and_pack_8b(self.requant_eps_mult), - "requant_eps_mult", "int32_t") - ret += generate_multihead_C_array(requant_multihead_harmonization_and_pack_8b(self.requant_right_shift), - "requant_right_shift", "int32_t") - ret += generate_multihead_C_array(requant_multihead_harmonization_and_pack_8b(self.requant_add), "requant_add", - "int32_t") - - # Intermediate results (Qp, Kp, Vp, A, O_soft, Out_soft) - ret += generate_multihead_C_array(self.split_multihead_m_m(self.Qp_requant), "golden_interm_Pq", "int8_t") - ret += generate_multihead_C_array(self.split_multihead_m_m(self.Kp_requant), "golden_interm_Pk", "int8_t") - ret += generate_multihead_C_array(self.split_multihead_m_m(self.Vp_requant.transpose((0, 2, 1))), - "golden_interm_Pv", "int8_t") - ret += generate_multihead_C_array(self.split_multihead_m_m(self.A_requant), "golden_interm_attention", "int8_t") - ret += generate_multihead_C_array(self.split_multihead_m_m(self.O_soft_requant), "golden_interm_head_output", - "int8_t") - ret += generate_multihead_C_array(self.split_multihead_m_m(self.Out_soft_requant), "golden_output", "int8_t") - - ret += "\n" - - ret += generate_define("heads", self.H) - ret += generate_define("sequence_length", self.S) - ret += generate_define("embedding_space", self.E) - ret += generate_define("projection_space", self.P) - ret += generate_define("n_tile_sequence_length", self.S // 64) - ret += generate_define("n_tile_embedding_space", self.E // 64) - ret += generate_define("n_tile_projection_space", self.P // 64) - ret += generate_define("tile_size_sequence_length", 64) - ret += generate_define("tile_size_embedding_space", 64) - ret += generate_define("tile_size_projection_space", 64) - - ret += '\n// clang-format on\n' - - return ret - - def export_snitch_cluster(self, path, filename = "mem_snitch_cluster.h"): - if path == './': - path = self.paths["snitch-cluster"] - - print(f"=> Exporting memory file to '{path}'") - - with open(os.path.join(path, filename), "w") as f: - f.write(self.generate_snitch_cluster()) - - def export_mempool(self, path): - # WIESEP: TODO: Refactor code to use new split_matrix function - - if path == './': - path = self.paths["mempool"] - - print(f"=> Exporting memory file to '{path}'") - - requant_eps_mult = np.pad(self.requant_eps_mult[:6, :].T, ((0, 0), (0, 2)), mode = "constant") - requant_right_shift = np.pad(self.requant_right_shift[:6, :].T, ((0, 0), (0, 2)), mode = "constant") - requant_add = np.pad(self.requant_add[:6, :].T, ((0, 0), (0, 2)), mode = "constant") - - with open('%s%s.c' % (path, "mem"), "w+") as f: - f.write(f"""/* This file is automatically generated by '{" ".join(sys.argv)}' -* Do not edit manually, any manual change will be overwritten. -*/ - -// clang-format off -""") - - with open('%s%s.c' % (path, "mem"), "a+") as f: - f.write('#include \n') - f.write(f'\nconst uint8_t Requant_Mult[{self.H}][{requant_eps_mult[0].size}] = ' + '{') - write_matrix_mem([requant_eps_mult], "mem", path) - - with open('%s%s.c' % (path, "mem"), "a+") as f: - f.write('};' + f'\nconst uint8_t Requant_Shift[{self.H}][{requant_right_shift[0].size}] = ' + '{') - write_matrix_mem([requant_right_shift], "mem", path) - - with open('%s%s.c' % (path, "mem"), "a+") as f: - f.write('};' + f'\nconst int8_t Requant_Add[{self.H}][{requant_add[0].size}] = ' + '{') - write_matrix_mem([requant_add], "mem", path) - - with open('%s%s.c' % (path, "mem"), "a+") as f: - f.write('};\n\n') - - for h in range(self.H): - with open('%s%s.c' % (path, "mem"), "a+") as f: - f.write(f'const int8_t inputs_{h}[] __attribute__((aligned(0x1000))) = ' + '{\n') - - w4 = np.concatenate([np.transpose(self.Wo[h])]) - write_matrix_mem(w4, "mem", path) - - w3 = np.concatenate([np.transpose(self.Wv[h])]) - write_matrix_mem(w3, "mem", path) - - w2 = np.concatenate([np.transpose(self.Wk[h])]) - write_matrix_mem(w2, "mem", path) - - q = np.concatenate(np.split(self.Q, self.split, axis = 1)) - write_matrix_mem(q, "mem", path) - - k = np.concatenate(np.split(self.K, self.split, axis = 1)) - write_matrix_mem(k, "mem", path) - - # w1 = np.concatenate([np.transpose(self.Wq[i]) for i in range(self.H)]) - w1 = np.concatenate(np.split(np.concatenate([np.transpose(self.Wq[h])]), self.split, axis = 1)) - write_matrix_mem(w1, "mem", path) - - b4 = np.reshape(np.split(self.Bo_broadcast[h], self.split, axis = 1), (self.S_ITA, self.E_ITA)) - write_matrix_mem(b4, "mem", path) - - b3 = np.reshape( - np.split(np.reshape(np.transpose(self.Bv_broadcast[h]), (self.P_ITA, self.S_ITA)), self.split, - axis = 1), (self.P_ITA, self.S_ITA)) - write_matrix_mem(b3, "mem", path) - - b2 = np.reshape(np.split(self.Bk_broadcast[h], self.split, axis = 1), (self.S_ITA, self.P_ITA)) - write_matrix_mem(b2, "mem", path) - - b1 = np.reshape(np.split(self.Bq_broadcast[h], self.split, axis = 1), (self.S_ITA, self.P_ITA)) - write_matrix_mem(b1, "mem", path) - - with open('%s%s.c' % (path, "mem"), "ab+") as f: - f.seek(-1, os.SEEK_END) - f.truncate() - with open('%s%s.c' % (path, "mem"), "a+") as f: - f.write('\n};\n\n') - - with open('%s%s.c' % (path, "mem"), "a+") as f: - f.write('\n// clang-format on\n') - tot_bytes = np.size(self.Q) + np.size(self.K) + np.size(self.Wq) + np.size(self.Bq_broadcast) \ - + np.size(self.Wk) + np.size(self.Bk_broadcast) + np.size(self.Wv) + np.size(self.Bv_broadcast) + \ - np.size(self.Wo) + np.size(self.Bo_broadcast) - - tot_params = tot_bytes = np.size(self.Q) + np.size(self.K) + np.size(self.Wq) + np.size(self.Bq) \ - + np.size(self.Wk) + np.size(self.Bk) + np.size(self.Wv) + np.size(self.Bv) + \ - np.size(self.Wo) + np.size(self.Bo) - - print(f"{'Number of Bytes' :<{30}}: {tot_bytes} ({tot_bytes/1024} kB)") - print(f"{'Number of Parameters' :<{30}}: {tot_params} ({tot_params/1000} k)") - - def export_numpy(self): - assert np.all(np.equal(self.K, self.V)), "For ITA, keys and values have to be equal" - q = self.Q_in - k = self.K_in - w1 = self.Wq_in - b1 = self.Bq_in - w2 = self.Wk_in - b2 = self.Bk_in - w3 = self.Wv_in - b3 = self.Bv_in - w4 = self.Wo_in - b4 = self.Bo_in - o = self.Out_soft_requant[:, :self.S, :self.E] - o_sum = self.Out_soft_sum_requant[:, :self.S, :self.E] - np.savez('%s%s.npz' % (self.paths["base"], "mha"), - q = q, - k = k, - w1 = w1, - b1 = b1, - w2 = w2, - b2 = b2, - w3 = w3, - b3 = b3, - w4 = w4, - b4 = b4, - o = o, - o_sum = o_sum, - rqs_mult = self.requant_eps_mult, - rqs_shift = self.requant_right_shift, - rqs_add = self.requant_add) - - -def generateTestVectors(path, **kwargs): - s = kwargs['S'] - p = kwargs['P'] - e = kwargs['E'] - f = kwargs['F'] - h = kwargs['H'] - activation = kwargs['activation'] - mask = kwargs['mask'] - index = kwargs['I'] - bias = int(not kwargs['no_bias']) - export_snitch_cluster = kwargs['export_snitch_cluster'] - export_mempool = kwargs['export_mempool'] - - acc1 = Transformer(s, p, e, f, h, bias = bias, path = path, activation = activation, mask = mask) - - if kwargs['verbose']: - print("=> Generating test vectors...") - acc1.print_properties(kwargs['verbose']) - acc1.step1_Qp() - acc1.step2_Kp() - acc1.step3_Vp() - acc1.step4_QK(kwargs['no_partial_softmax'], index=index) - acc1.step5_AV() - acc1.step6_O() - acc1.step7_Osum() - acc1.feedforward_layer() - acc1.test_activations() - - if export_mempool: - acc1.export_mempool(kwargs['mem_path']) - if export_snitch_cluster: - acc1.export_snitch_cluster(kwargs['mem_path']) - acc1.export_hwpe() - acc1.export_numpy() - - def calculate_tensor_stats(tensor, name, tol = 1e-1): - # Calculate the similarly of elements within one row and over all columns - similarity_row = np.mean(np.abs(np.diff(tensor, axis = -2))) - similarity_column = np.mean(np.abs(np.diff(tensor, axis = -1))) - - if (similarity_row < tol) or (similarity_column < tol): - if name is not None: - print(f"WARNING: {name} is constant!") - print(f"{name} Mean-Squared Difference (row) : {similarity_row:5.1f}") - print(f"{name} Mean-Squared Difference (column): {similarity_column:5.1f}") - if kwargs['skip_vector_validation'] is False: - raise ValueError(f"Tensor {name} is constant! This is a bad test vector!") - else: - print(f" WARNING: Tensor {name} is constant! This is a bad test vector!") - else: - print(" WARNING: Tensor is constant!") - print(f" Mean-Squared Difference (row) : {similarity_row:5.1f}") - print(f" Mean-Squared Difference (column): {similarity_column:5.1f}") - - return similarity_row, similarity_column - - def print_tensor_stats(tensor, name = None): - print(f" Min: {np.min(tensor)}") - print(f" Max: {np.max(tensor)}") - - similarity_row, similarity_column = calculate_tensor_stats(tensor, name) - - print(f" Mean-Squared Difference (row) : {similarity_row:5.1f}") - print(f" Mean-Squared Difference (column): {similarity_column:5.1f}") - - # Calculate all tensor statistics - tensors = { - "Qp": acc1.Qp_requant, - "Kp": acc1.Kp_requant, - "Vp": acc1.Vp_requant, - "A": acc1.A_requant, - "A_soft": acc1.A_partial_softmax, - "O_soft": acc1.O_soft_requant, - "Out_soft": acc1.Out_soft_requant, - "Out_soft_sum": acc1.Out_soft_sum_requant - } - - for name, tensor in tensors.items(): - calculate_tensor_stats(tensor, name) - - # Check if softmax is sufficiently precise - maep_softmax = error_MAEP(acc1.A_partial_softmax, acc1.A_real_softmax) - if maep_softmax > 5: - print(f"WARNING: Softmax is not precise enough! MAEP Error to Integer Softmax: {maep_softmax:.2f}%") - - if kwargs['verbose'] > 1: - print("=> Qp") - print_tensor_stats(acc1.Qp_requant) - if kwargs['verbose'] > 4: - print(acc1.Qp) - if kwargs['verbose'] > 3: - print(acc1.Qp_requant) - - print("=> Kp") - print_tensor_stats(acc1.Kp_requant) - if kwargs['verbose'] > 4: - print(acc1.Kp) - if kwargs['verbose'] > 3: - print(acc1.Kp_requant) - - print("=> Vp") - print_tensor_stats(acc1.Vp_requant) - if kwargs['verbose'] > 4: - print(acc1.Vp) - if kwargs['verbose'] > 3: - print(acc1.Vp_requant) - - print("=> A") - print_tensor_stats(acc1.A_requant) - if kwargs['verbose'] > 4: - print(acc1.A) - if kwargs['verbose'] > 3: - print(acc1.A_requant) - - print("=> A (partial softmax)") - print_tensor_stats(acc1.A_partial_softmax) - print(f" MAEP Error to Integer Softmax: {maep_softmax:.2f}%") - if kwargs['verbose'] > 3: - print(acc1.A_partial_softmax) - - print("=> O (soft)") - print_tensor_stats(acc1.O_soft_requant) - if kwargs['verbose'] > 4: - print(acc1.O_soft) - if kwargs['verbose'] > 3: - print(acc1.O_soft_requant) - - print("=> Output (all heads)") - print_tensor_stats(acc1.Out_soft_requant) - if kwargs['verbose'] > 3: - print(acc1.Out_soft_requant) - - print("=> Output (accumulated)") - print_tensor_stats(acc1.Out_soft_sum_requant) - if kwargs['verbose'] > 3: - print(acc1.Out_soft_sum_requant) - - if kwargs['plot_tensors']: - # Plot distribution of all input and output tensors - import matplotlib.pyplot as plt - import seaborn as sns - from matplotlib.gridspec import GridSpec - - def plot_distribution(tensor, title, ax): - sns.histplot(tensor.flatten(), bins = 50, kde = True, ax = ax) - ax.set_title(title) - - # Plot color values of all tensors - def plot_heatmap(tensor, title, ax): - # If tensor is more than 2D, only plot the first 2D - if len(tensor.shape) > 2: - tensor = tensor[0] - - sns.heatmap(tensor, ax = ax, cbar = False) - # Do not show ticks - ax.set_xticks([]) - ax.set_yticks([]) - ax.set_title(title) - - # Create sublots - fig = plt.figure(figsize = (12, 12), layout = 'tight', dpi = 72) - - gs = GridSpec(8, 12, figure = fig) - - ax = fig.add_subplot(gs[0, 0:3]) - plot_distribution(acc1.Q, "Q", ax) - ax = fig.add_subplot(gs[0, 3:6]) - plot_heatmap(acc1.Q, "Q", ax) - ax = fig.add_subplot(gs[0, 6:9]) - plot_distribution(acc1.K, "K", ax) - ax = fig.add_subplot(gs[0, 9:12]) - plot_heatmap(acc1.K, "K", ax) - - ax = fig.add_subplot(gs[1, 0:3]) - plot_distribution(acc1.Wq, "Wq", ax) - ax = fig.add_subplot(gs[1, 3:6]) - plot_distribution(acc1.Wk, "Wk", ax) - ax = fig.add_subplot(gs[1, 6:9]) - plot_distribution(acc1.Wv, "Wv", ax) - ax = fig.add_subplot(gs[1, 9:12]) - plot_distribution(acc1.Wo, "Wo", ax) - - ax = fig.add_subplot(gs[2, 0:3]) - plot_heatmap(acc1.Wq, "Wq", ax) - ax = fig.add_subplot(gs[2, 3:6]) - plot_heatmap(acc1.Wk, "Wk", ax) - ax = fig.add_subplot(gs[2, 6:9]) - plot_heatmap(acc1.Wv, "Wv", ax) - ax = fig.add_subplot(gs[2, 9:12]) - plot_heatmap(acc1.Wo, "Wo", ax) - - ax = fig.add_subplot(gs[3, 0:3]) - plot_distribution(acc1.Bq, "Bq", ax) - ax = fig.add_subplot(gs[3, 3:6]) - plot_distribution(acc1.Bk, "Bk", ax) - ax = fig.add_subplot(gs[3, 6:9]) - plot_distribution(acc1.Bv, "Bv", ax) - ax = fig.add_subplot(gs[3, 9:12]) - plot_distribution(acc1.Bo, "Bo", ax) - - ax = fig.add_subplot(gs[4, 0:3]) - plot_distribution(acc1.Qp_requant, "Qp", ax) - ax = fig.add_subplot(gs[4, 3:6]) - plot_distribution(acc1.Kp_requant, "Kp", ax) - ax = fig.add_subplot(gs[4, 6:9]) - plot_distribution(acc1.Vp_requant, "Vp", ax) - - ax = fig.add_subplot(gs[5, 0:3]) - plot_heatmap(acc1.Qp_requant, "Qp", ax) - ax = fig.add_subplot(gs[5, 3:6]) - plot_heatmap(acc1.Kp_requant, "Kp", ax) - ax = fig.add_subplot(gs[5, 6:9]) - plot_heatmap(acc1.Vp_requant, "Vp", ax) - - ax = fig.add_subplot(gs[6, 0:3]) - plot_distribution(acc1.A_requant, "QK", ax) - ax = fig.add_subplot(gs[6, 3:6]) - plot_distribution(acc1.A_partial_softmax, "A", ax) - ax = fig.add_subplot(gs[6, 6:9]) - plot_distribution(acc1.O_soft_requant, "O", ax) - ax = fig.add_subplot(gs[6, 9:12]) - plot_distribution(acc1.Out_soft_requant, "Out", ax) - - ax = fig.add_subplot(gs[7, 0:3]) - plot_heatmap(acc1.A_requant, "QK", ax) - ax = fig.add_subplot(gs[7, 3:6]) - plot_heatmap(acc1.A_partial_softmax, "A", ax) - ax = fig.add_subplot(gs[7, 6:9]) - plot_heatmap(acc1.O_soft_requant, "O", ax) - ax = fig.add_subplot(gs[7, 9:12]) - plot_heatmap(acc1.Out_soft_requant, "Out", ax) - - plt.show() - - -def util_main(**kwargs): - B = 8 - log2e = np.log2(np.exp(1)) - eps_max = B / (2**B) - - N = 1024 - A = np.random.randint(-128, 127, size = (1, N, N), dtype = np.int8) - input_float = A * eps_max # Assume eps is eps_max - input_int = A - - fast_softmax = fastSoftmax(input_float, False) - fast_integer_softmax = fastSoftmax(input_int, True) / 255 - - fast_partial_softmax = streamingPartialSoftmax(input_float, False) - fast_partial_integer_softmax = streamingPartialSoftmax(input_int, True) / 255 - - softmax = realSoftmax(input_float, False) - integer_softmax = realSoftmax(input_int, True) / 255 - - print(f"=> L2 Softmax Differences:") - print( - f" Softmax - Fast Softmax : {np.linalg.norm((softmax-fast_softmax)[0], 2):.10}" - ) - print( - f" Softmax - Fast Partial Softmax : {np.linalg.norm((softmax-fast_partial_softmax)[0], 2):.10}" - ) - print( - f" Softmax - Fast Integer Softmax : {np.linalg.norm((softmax-fast_integer_softmax)[0], 2):.10}" - ) - print( - f" Softmax - Fast Partial Integer Softmax : {np.linalg.norm((softmax-fast_partial_integer_softmax)[0], 2):.10}" - ) - # print(f" Integer Softmax - Fast Integer Softmax : {np.linalg.norm((integer_softmax-fast_integer_softmax)[0], 2):.3}") - # print(f" Integer Softmax - Fast Partial Integer Softmax : {np.linalg.norm((integer_softmax-fast_partial_integer_softmax)[0], 2):.3}") - # print(f" Softmax - Integer Softmax : {np.linalg.norm((integer_softmax-softmax)[0], 2):.3}") - # print(f" Fast Softmax - Fast Partial Softmax : {np.linalg.norm((fast_softmax-fast_partial_softmax)[0], 2):.3}") - # print(f" Fast Integer Softmax - Fast Partial Integer Softmax : {np.linalg.norm((fast_integer_softmax-fast_partial_integer_softmax)[0], 2):.3}") - - TEST_QUANTLIB = True - if TEST_QUANTLIB: - import torch - - from quantlib.algorithms.pact.pact_ops import (PACTIntegerITAMax, PACTIntegerITAPartialMax, PACTITAMax, - PACTITAPartialMax) - input = torch.tensor(input_float).unsqueeze(0).float() - - ITAMax = PACTITAMax() - ITAPartialMax = PACTITAPartialMax(ita_sequence_length = N) - ITAmax_softmax = ITAMax.forward(input).detach().numpy().squeeze(axis = 0) - ITApartialmax_softmax = ITAPartialMax.forward(input).detach().numpy().squeeze(axis = 0) - - ITAMax.started = torch.tensor(1) - ITAPartialMax.started = torch.tensor(1) - ITAMax.set_eps_in(torch.tensor((eps_max,))) - ITAPartialMax.set_eps_in(torch.tensor((eps_max,))) - ITAMax_integer_softmax = ITAMax.forward(input).detach().numpy().squeeze(axis = 0) - ITAPartialMax_integer_softmax = ITAPartialMax.forward(input).detach().numpy().squeeze(axis = 0) - - input = torch.tensor(input_int).unsqueeze(0).float() - ITAIntegerMax_softmax = PACTIntegerITAMax.MySoftmax.forward( - None, input, torch.tensor(256)).detach().numpy().squeeze(axis = 0) - ITAPartialIntegerMax_softmax = PACTIntegerITAMax.MySoftmax.forward( - None, input, torch.tensor(256)).detach().numpy().squeeze(axis = 0) - - print() - print(f"=> L2 PyTorch Softmax Differences:") - print( - f" Fast Softmax - ITAmax : {np.linalg.norm((fast_softmax-ITAmax_softmax)[0], 2):.3}" - ) - print( - f" Fast Partial Softmax - ITAPartialMax : {np.linalg.norm((fast_partial_softmax-ITApartialmax_softmax)[0], 2):.3}" - ) - print( - f" Fast Integer Softmax - Fake-Quantized ITAmax : {np.linalg.norm((fast_integer_softmax-ITAMax_integer_softmax)[0], 2):.3}" - ) - print( - f" Fast Integer Partial Softmax - Fake-Quantized ITAPartialMax : {np.linalg.norm((fast_partial_integer_softmax-ITAPartialMax_integer_softmax)[0], 2):.3}" - ) - print( - f" Fast Integer Softmax - True-Quantized ITAmax : {np.linalg.norm((fast_integer_softmax-ITAIntegerMax_softmax/255)[0], 2):.3}" - ) - print( - f" Fast Integer Partial Softmax - True-Quantized ITAPartialMax : {np.linalg.norm((fast_partial_integer_softmax-ITAPartialIntegerMax_softmax/255)[0], 2):.3}" - ) diff --git a/modelsim/sim_ita_tb_wave.tcl b/modelsim/sim_ita_tb_wave.tcl index 78d5ce5..490d5e6 100644 --- a/modelsim/sim_ita_tb_wave.tcl +++ b/modelsim/sim_ita_tb_wave.tcl @@ -20,10 +20,6 @@ add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_ add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/disable_row -add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_d -add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_q -add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_d -add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_q add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/first_outer_dim add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_inp2_mux/clk_i add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/last_inner_tile_q6 @@ -54,18 +50,6 @@ add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_ add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_controller/step_q add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/count_q -add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/i_controller/mask_d -add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_pos_d -add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_pos_q -add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_col_offset_q -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_d -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_q -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_d -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_q -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/tile_x_d -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/tile_x_q -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/tile_y_d -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/tile_y_q add wave -noupdate /ita_tb/dut/calc_en_q5 add wave -noupdate /ita_tb/dut/calc_en_q6 add wave -noupdate /ita_tb/dut/calc_en_q7 @@ -118,438 +102,7 @@ add wave -noupdate /ita_tb/dut/i_activation/data_o add wave -noupdate /ita_tb/dut/i_fifo/data_i add wave -noupdate /ita_tb/dut/i_fifo/data_o add wave -noupdate /ita_tb/dut/oup_o -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/clk_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/rst_ni -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mode_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/eps_mult_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/right_shift_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_q_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/result_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_o -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mult_signed -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/product -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_added -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_d -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_q -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q1 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q2 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q3 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q4 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_d -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_q -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/clk_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/rst_ni -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mode_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/eps_mult_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/right_shift_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_q_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/result_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_o -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mult_signed -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/product -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_added -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_d -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_q -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q1 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q2 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q3 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q4 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_d -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/clk_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/rst_ni -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ctrl_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_ready_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_ready_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_ready_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_ready_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/pop_softmax_fifo_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/soft_addr_div_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_done_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_inner_tile_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_inner_tile_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_pad_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_q1_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/count_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/count_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_count -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_padded -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_time -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_dim -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_fifo -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/clk_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/rst_ni -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ctrl_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_ready_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_ready_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_ready_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_ready_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/pop_softmax_fifo_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/soft_addr_div_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_done_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_inner_tile_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_inner_tile_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_pad_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_q1_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/count_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/count_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_count -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_padded -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_time -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_dim -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_fifo -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/clk_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/rst_ni -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/ctrl_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/step_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/soft_addr_div_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/softmax_done_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_softmax_fifo_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_inp_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_oup_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_data_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_data_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/prev_max_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_data_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_data_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_x_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q3 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q4 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q3 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q4 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_diff -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_diff -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp_diff -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q3 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_full -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_empty -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/push_to_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_from_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_to_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_from_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_usage -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_row -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_col -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/clk_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/rst_ni -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/ctrl_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/step_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/soft_addr_div_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/softmax_done_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_softmax_fifo_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_inp_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_oup_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_data_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_data_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/prev_max_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_data_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_data_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_x_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q3 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q4 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q3 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q4 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_x_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_diff -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_diff -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp_diff -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q3 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_full -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_empty -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/push_to_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_from_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_to_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_from_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_usage -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_row -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_col -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/clk_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/rst_ni -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_q_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_q_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_q_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/oup_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/inp_bias_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_o -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_en -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data_unused -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_en -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_data -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_d -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_q -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_d -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_q -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_d -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_q -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/clk_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/rst_ni -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_q_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_q_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_q_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/oup_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/inp_bias_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_o -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_en -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data_unused -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_en -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_data -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_d -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_q -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_d -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_q -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_d -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_q add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/* -add wave -expand -group Controller /ita_tb/dut/i_controller/* +add wave -group {Controller} /ita_tb/dut/i_controller/* add wave -group {Softmax Controller} ita_tb/dut/i_softmax_top/i_softmax/* add wave -group {Accumulator} ita_tb/dut/i_accumulator/* \ No newline at end of file diff --git a/src/ita.sv b/src/ita.sv index 8a9fe25..7822050 100644 --- a/src/ita.sv +++ b/src/ita.sv @@ -219,8 +219,7 @@ module ita .inp_bias_i (inp_bias ), .inp_bias_pad_o (inp_bias_padded ), .mask_o (mask ), - .busy_o (busy_o ), - .calc_en_q1_i (calc_en_q1 ) + .busy_o (busy_o ) ); ita_input_sampler i_input_sampler ( diff --git a/src/ita_controller.sv b/src/ita_controller.sv index d3c2f82..3a834bb 100644 --- a/src/ita_controller.sv +++ b/src/ita_controller.sv @@ -36,18 +36,14 @@ module ita_controller input bias_t inp_bias_i , output bias_t inp_bias_pad_o , output logic [N-1:0] mask_o , - output logic busy_o , - input logic calc_en_q1_i + output logic busy_o ); step_e step_d, step_q; counter_t count_d, count_q, bias_count; - counter_t mask_pos_d, mask_pos_q; - logic [3:0] mask_col_offset_d, mask_col_offset_q; + counter_t tile_d, tile_q; counter_t inner_tile_d, inner_tile_q; - counter_t mask_tile_x_pos_d, mask_tile_x_pos_q; - counter_t mask_tile_y_pos_d, mask_tile_y_pos_q; counter_t tile_x_d, tile_x_q, bias_tile_x_d, bias_tile_x_q; counter_t tile_y_d, tile_y_q, bias_tile_y_d, bias_tile_y_q; counter_t softmax_tile_d, softmax_tile_q; @@ -56,14 +52,12 @@ module ita_controller bias_t inp_bias, inp_bias_padded; logic last_time; - logic [N-1:0] mask_d, mask_q; tile_t inner_tile_dim; - logic [WO-WI*2-2:0] first_outer_dim, second_outer_dim; - logic [WO-WI*2-2:0] first_outer_dim_d, first_outer_dim_q; - logic [WO-WI*2-2:0] second_outer_dim_d, second_outer_dim_q; + input_dim_t first_outer_dim, second_outer_dim; + input_dim_t first_outer_dim_d, first_outer_dim_q; + input_dim_t second_outer_dim_d, second_outer_dim_q; - logic softmax_fifo, softmax_div, softmax_div_done_d, softmax_div_done_q, busy_d, busy_q; requant_oup_t requant_add, requant_add_d, requant_add_q; @@ -74,7 +68,7 @@ module ita_controller assign inner_tile_o = inner_tile_q; assign requant_add_o = requant_add_q; assign inp_bias_pad_o = inp_bias_padded; - assign mask_o = mask_q; + always_comb begin count_d = count_q; @@ -96,10 +90,9 @@ module ita_controller last_time = 1'b0; requant_add = {N {requant_add_i}}; inp_bias = inp_bias_i; - - busy_d = busy_q; - softmax_fifo = 1'b0; - softmax_div = 1'b0; + busy_d = busy_q; + softmax_fifo = 1'b0; + softmax_div = 1'b0; if (step_q != AV) begin softmax_div_done_d = 1'b0; @@ -390,143 +383,6 @@ module ita_controller end inp_bias_padded = inp_bias; - case (ctrl_i.mask_type) - None: begin - mask_col_offset_d = '0; - mask_tile_x_pos_d = '0; - mask_tile_y_pos_d = '0; - mask_pos_d = '0; - mask_d = '0; - end - UpperTriangular: begin - mask_col_offset_d = (step_q == QK || step_q == AV) ? mask_col_offset_q : ((ctrl_i.mask_start_index) & (N-1)); - mask_tile_x_pos_d = (step_q == QK || step_q == AV) ? mask_tile_x_pos_q : ((ctrl_i.mask_start_index) / M); - mask_tile_y_pos_d = mask_tile_y_pos_q; - mask_pos_d = (step_q == QK || step_q == AV) ? mask_pos_q : ((((ctrl_i.mask_start_index)/N)*M) & ((M*M/N)-1)); - mask_d = '0; - - if (step_q == QK) begin - if (mask_tile_x_pos_q == tile_x_q && mask_tile_y_pos_q == tile_y_q && last_inner_tile_o == 1'b1) begin - if (count_q == ((M*M/N)-1)) begin - mask_tile_x_pos_d = mask_tile_x_pos_q + 1'b1; - end - if ((count_q >= mask_pos_q) && (count_q < (mask_pos_q + N))) begin - if ((count_q & (M-1)) == (M-1) && !(((count_q + mask_col_offset_q) & (N-1)) == (N-1))) begin - mask_tile_y_pos_d = tile_y_q + 1'b1; - mask_tile_x_pos_d = tile_x_q; - mask_pos_d = ((count_q + (((ctrl_i.tile_s * (M*M/N)) - M) + 1)) & ((M*M/N)-1)); - end else if ((count_q & (M-1)) == (M-1) && (((count_q + mask_col_offset_q) & (N-1)) == (N-1))) begin - if ((count_q / M) == ((M/N)-1)) begin - mask_tile_y_pos_d = tile_y_q + 1'b1; - mask_tile_x_pos_d = tile_x_q + 1'b1; - mask_pos_d = ((count_q + ((ctrl_i.tile_s * (M*M/N)) + 1)) & ((M*M/N)-1)); - end else begin - mask_tile_y_pos_d = tile_y_q + 1'b1; - mask_tile_x_pos_d = tile_x_q; - mask_pos_d = ((count_q + ((ctrl_i.tile_s * (M*M/N)) + 1)) & ((M*M/N)-1)); - end - end else if (((count_q + mask_col_offset_q) & (N-1)) == (N-1)) begin - mask_pos_d = (mask_pos_q + (N - ((mask_pos_q + mask_col_offset_q) & (N-1))) + M) & ((M*M/N)-1); - end - for (int i = 0; i < N; i++) begin - if (((count_q + mask_col_offset_q) & (N-1)) <= i) begin - mask_d[i] = 1'b1; - end else begin - mask_d[i] = 1'b0; - end - end - end else if ((count_q & (M-1)) < (mask_pos_q & (M-1))) begin - for (int i = 0; i < N; i++) begin - mask_d[i] = 1'b1; - end - end - end else if (mask_tile_x_pos_q <= tile_x_q && mask_tile_y_pos_q != tile_y_q && last_inner_tile_o == 1'b1) begin - for (int i = 0; i < N; i++) begin - mask_d[i] = 1'b1; - end - end else if (mask_tile_x_pos_q != tile_x_q && mask_tile_y_pos_q == tile_y_q && last_inner_tile_o == 1'b1) begin - for (int i = 0; i < N; i++) begin - mask_d[i] = 1'b0; - end - end - end - end - LowerTriangular: begin - mask_col_offset_d = '0; - mask_tile_x_pos_d = '0; - mask_tile_y_pos_d = (step_q == QK || step_q == AV) ? mask_tile_y_pos_q : ((ctrl_i.mask_start_index) / M); - mask_pos_d = (step_q == QK || step_q == AV) ? mask_pos_q : (ctrl_i.mask_start_index & (M-1)); - mask_d = '0; - - if (step_q == QK) begin - if (mask_tile_x_pos_q == tile_x_q && mask_tile_y_pos_q == tile_y_q && last_inner_tile_o == 1'b1) begin - if (count_q == ((M*M/N)-1)) begin - mask_tile_x_pos_d = mask_tile_x_pos_q + 1'b1; - end - if ((count_q >= mask_pos_q) && (count_q < (mask_pos_q + N))) begin - if (((count_q & (M-1)) == (M-1)) && !(((count_q + (N - (ctrl_i.mask_start_index & (N-1)))) & (N-1)) == (N-1))) begin - mask_tile_y_pos_d = tile_y_q + 1'b1; - mask_tile_x_pos_d = tile_x_q; - mask_pos_d = ((count_q + (((ctrl_i.tile_s * (M*M/N)) - M) + 1)) & ((M*M/N)-1)); - end else if (((count_q & (M-1)) == (M-1)) && (((count_q + (N - (ctrl_i.mask_start_index & (N-1)))) & (N-1)) == (N-1))) begin - if ((count_q / M) == ((M/N)-1)) begin - mask_tile_y_pos_d = tile_y_q + 1'b1; - mask_tile_x_pos_d = tile_x_q + 1'b1; - mask_pos_d = ((count_q + ((ctrl_i.tile_s * (M*M/N)) + 1)) & ((M*M/N)-1)); - end else begin - mask_tile_y_pos_d = tile_y_q + 1'b1; - mask_tile_x_pos_d = tile_x_q; - mask_pos_d = ((count_q + ((ctrl_i.tile_s * (M*M/N)) + 1)) & ((M*M/N)-1)); - end - end else if (((count_q + (N - (ctrl_i.mask_start_index & (N-1)))) & (N-1)) == (N-1)) begin - mask_pos_d = (mask_pos_q + (count_q - mask_pos_q + 1) + M) & ((M*M/N)-1); - end - for (int i = 0; i < N; i++) begin - if (((count_q + (N - (ctrl_i.mask_start_index & (N-1)))) & (N-1)) >= i) begin - mask_d[i] = 1'b1; - end else begin - mask_d[i] = 1'b0; - end - end - end else if ((count_q & (M-1)) >= (mask_pos_q & (M-1))) begin - for (int i = 0; i < N; i++) begin - mask_d[i] = 1'b1; - end - end - end else if (mask_tile_x_pos_q > tile_x_q && mask_tile_y_pos_q == tile_y_q && last_inner_tile_o == 1'b1) begin - for (int i = 0; i < N; i++) begin - mask_d[i] = 1'b1; - end - end else if (mask_tile_x_pos_q >= tile_x_q && mask_tile_y_pos_q != tile_y_q && last_inner_tile_o == 1'b1) begin - for (int i = 0; i < N; i++) begin - mask_d[i] = 1'b0; - end - end - end - end - Strided: begin - mask_col_offset_d = '0; - mask_tile_x_pos_d = '0; - mask_tile_y_pos_d = '0; - mask_pos_d = '0; - mask_d = '0; - - if (step_q == QK) begin - if (last_inner_tile_o == 1'b1) begin - for (int i = 0; i < N; i++) begin - //col_pos = count_q/M + i + mask_tile_x_pos_q * M - //row_pos = count_q & (M-1) + mask_tile_y_pos_q * M - if ((((((count_q / M) * N) + i + (tile_x_q * M)) - ((count_q & (M-1)) + (tile_y_q * M))) & (ctrl_i.mask_start_index-1)) == 0) begin - mask_d[i] = 1'b0; - end else begin - mask_d[i] = 1'b1; - end - end - end - end - end - endcase - if (inp_valid_i && inp_ready_o && oup_valid_i && oup_ready_i && last_inner_tile_o) begin ongoing_d = ongoing_q; end else if (inp_valid_i && inp_ready_o && last_inner_tile_o) begin @@ -561,11 +417,6 @@ module ita_controller bias_tile_y_q <= '0; first_outer_dim_q <= '0; second_outer_dim_q <= '0; - mask_pos_q <= '0; - mask_col_offset_q <= '0; - mask_tile_x_pos_q <= '0; - mask_tile_y_pos_q <= '0; - mask_q <= '0; end else begin step_q <= step_d; count_q <= count_d; @@ -583,13 +434,20 @@ module ita_controller bias_tile_y_q <= bias_tile_y_d; first_outer_dim_q <= first_outer_dim_d; second_outer_dim_q <= second_outer_dim_d; - if (calc_en_o) begin - mask_pos_q <= mask_pos_d; - mask_tile_x_pos_q <= mask_tile_x_pos_d; - mask_tile_y_pos_q <= mask_tile_y_pos_d; - end - mask_q <= mask_d; - mask_col_offset_q <= mask_col_offset_d; end end + + ita_masking i_masking ( + .clk_i (clk_i), + .rst_ni (rst_ni), + .ctrl_i (ctrl_i), + .step_i (step_o), + .calc_en_i (calc_en_o), + .last_inner_tile_i (last_inner_tile_o), + .count_i (count_q), + .tile_x_i (tile_x_o), + .tile_y_i (tile_y_o), + .mask_o (mask_o) + ); + endmodule diff --git a/src/ita_masking.sv b/src/ita_masking.sv new file mode 100644 index 0000000..7273309 --- /dev/null +++ b/src/ita_masking.sv @@ -0,0 +1,190 @@ +// Copyright 2024 ETH Zurich and University of Bologna. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 + +/** + ITA masking module. +*/ + +module ita_masking + import ita_package::*; +( + input logic clk_i, + input logic rst_ni, + input ctrl_t ctrl_i, + input step_e step_i, + input logic calc_en_i, + input logic last_inner_tile_i, + input counter_t count_i, + input counter_t tile_x_i, + input counter_t tile_y_i, + output logic [N-1:0] mask_o +); + + logic [3:0] mask_col_offset_d, mask_col_offset_q; + counter_t mask_tile_x_pos_d, mask_tile_x_pos_q; + counter_t mask_tile_y_pos_d, mask_tile_y_pos_q; + counter_t mask_pos_d, mask_pos_q; + logic [N-1:0] mask_d, mask_q; + + assign mask_o = mask_q; + + always_comb begin + case (ctrl_i.mask_type) + None: begin + mask_col_offset_d = '0; + mask_tile_x_pos_d = '0; + mask_tile_y_pos_d = '0; + mask_pos_d = '0; + mask_d = '0; + end + UpperTriangular: begin + mask_col_offset_d = (step_i == QK || step_i == AV) ? mask_col_offset_q : ((ctrl_i.mask_start_index) & (N-1)); + mask_tile_x_pos_d = (step_i == QK || step_i == AV) ? mask_tile_x_pos_q : ((ctrl_i.mask_start_index) / M); + mask_tile_y_pos_d = mask_tile_y_pos_q; + mask_pos_d = (step_i == QK || step_i == AV) ? mask_pos_q : ((((ctrl_i.mask_start_index)/N)*M) & ((M*M/N)-1)); + mask_d = '0; + + if (step_i == QK) begin + if (mask_tile_x_pos_q == tile_x_i && mask_tile_y_pos_q == tile_y_i && last_inner_tile_i == 1'b1) begin + if (count_i == ((M * M / N) - 1)) begin + mask_tile_x_pos_d = mask_tile_x_pos_q + 1'b1; + end + if ((count_i >= mask_pos_q) && (count_i < (mask_pos_q + N))) begin + if ((count_i & (M-1)) == (M-1) && !(((count_i + mask_col_offset_q) & (N-1)) == (N-1))) begin + mask_tile_y_pos_d = tile_y_i + 1'b1; + mask_tile_x_pos_d = tile_x_i; + mask_pos_d = ((count_i + (((ctrl_i.tile_s * (M*M/N)) - M) + 1)) & ((M*M/N)-1)); + end else if ((count_i & (M-1)) == (M-1) && (((count_i + mask_col_offset_q) & (N-1)) == (N-1))) begin + if ((count_i / M) == ((M / N) - 1)) begin + mask_tile_y_pos_d = tile_y_i + 1'b1; + mask_tile_x_pos_d = tile_x_i + 1'b1; + mask_pos_d = ((count_i + ((ctrl_i.tile_s * (M*M/N)) + 1)) & ((M*M/N)-1)); + end else begin + mask_tile_y_pos_d = tile_y_i + 1'b1; + mask_tile_x_pos_d = tile_x_i; + mask_pos_d = ((count_i + ((ctrl_i.tile_s * (M*M/N)) + 1)) & ((M*M/N)-1)); + end + end else if (((count_i + mask_col_offset_q) & (N - 1)) == (N - 1)) begin + mask_pos_d = (mask_pos_q + (N - ((mask_pos_q + mask_col_offset_q) & (N-1))) + M) & ((M*M/N)-1); + end + for (int i = 0; i < N; i++) begin + if (((count_i + mask_col_offset_q) & (N - 1)) <= i) begin + mask_d[i] = 1'b1; + end else begin + mask_d[i] = 1'b0; + end + end + end else if ((count_i & (M - 1)) < (mask_pos_q & (M - 1))) begin + for (int i = 0; i < N; i++) begin + mask_d[i] = 1'b1; + end + end + end else if (mask_tile_x_pos_q <= tile_x_i && mask_tile_y_pos_q != tile_y_i && last_inner_tile_i == 1'b1) begin + for (int i = 0; i < N; i++) begin + mask_d[i] = 1'b1; + end + end else if (mask_tile_x_pos_q != tile_x_i && mask_tile_y_pos_q == tile_y_i && last_inner_tile_i == 1'b1) begin + for (int i = 0; i < N; i++) begin + mask_d[i] = 1'b0; + end + end + end + end + LowerTriangular: begin + mask_col_offset_d = '0; + mask_tile_x_pos_d = '0; + mask_tile_y_pos_d = (step_i == QK || step_i == AV) ? mask_tile_y_pos_q : ((ctrl_i.mask_start_index) / M); + mask_pos_d = (step_i == QK || step_i == AV) ? mask_pos_q : (ctrl_i.mask_start_index & (M-1)); + mask_d = '0; + + if (step_i == QK) begin + if (mask_tile_x_pos_q == tile_x_i && mask_tile_y_pos_q == tile_y_i && last_inner_tile_i == 1'b1) begin + if (count_i == ((M * M / N) - 1)) begin + mask_tile_x_pos_d = mask_tile_x_pos_q + 1'b1; + end + if ((count_i >= mask_pos_q) && (count_i < (mask_pos_q + N))) begin + if (((count_i & (M-1)) == (M-1)) && !(((count_i + (N - (ctrl_i.mask_start_index & (N-1)))) & (N-1)) == (N-1))) begin + mask_tile_y_pos_d = tile_y_i + 1'b1; + mask_tile_x_pos_d = tile_x_i; + mask_pos_d = ((count_i + (((ctrl_i.tile_s * (M*M/N)) - M) + 1)) & ((M*M/N)-1)); + end else if (((count_i & (M-1)) == (M-1)) && (((count_i + (N - (ctrl_i.mask_start_index & (N-1)))) & (N-1)) == (N-1))) begin + if ((count_i / M) == ((M / N) - 1)) begin + mask_tile_y_pos_d = tile_y_i + 1'b1; + mask_tile_x_pos_d = tile_x_i + 1'b1; + mask_pos_d = ((count_i + ((ctrl_i.tile_s * (M*M/N)) + 1)) & ((M*M/N)-1)); + end else begin + mask_tile_y_pos_d = tile_y_i + 1'b1; + mask_tile_x_pos_d = tile_x_i; + mask_pos_d = ((count_i + ((ctrl_i.tile_s * (M*M/N)) + 1)) & ((M*M/N)-1)); + end + end else if (((count_i + (N - (ctrl_i.mask_start_index & (N-1)))) & (N-1)) == (N-1)) begin + mask_pos_d = (mask_pos_q + (count_i - mask_pos_q + 1) + M) & ((M * M / N) - 1); + end + for (int i = 0; i < N; i++) begin + if (((count_i + (N - (ctrl_i.mask_start_index & (N - 1)))) & (N - 1)) >= i) begin + mask_d[i] = 1'b1; + end else begin + mask_d[i] = 1'b0; + end + end + end else if ((count_i & (M - 1)) >= (mask_pos_q & (M - 1))) begin + for (int i = 0; i < N; i++) begin + mask_d[i] = 1'b1; + end + end + end else if (mask_tile_x_pos_q > tile_x_i && mask_tile_y_pos_q == tile_y_i && last_inner_tile_i == 1'b1) begin + for (int i = 0; i < N; i++) begin + mask_d[i] = 1'b1; + end + end else if (mask_tile_x_pos_q >= tile_x_i && mask_tile_y_pos_q != tile_y_i && last_inner_tile_i == 1'b1) begin + for (int i = 0; i < N; i++) begin + mask_d[i] = 1'b0; + end + end + end + end + Strided: begin + mask_col_offset_d = '0; + mask_tile_x_pos_d = '0; + mask_tile_y_pos_d = '0; + mask_pos_d = '0; + mask_d = '0; + + if (step_i == QK) begin + if (last_inner_tile_i == 1'b1) begin + for (int i = 0; i < N; i++) begin + //col_pos = count_i/M * N + i + tile_x_i * M + //row_pos = count_i & (M-1) + tile_y_i * M + //Marcel Kant: Does only work if ctrl_i.mask_start_index is a power of two + if ((((((count_i / M) * N) + i + (tile_x_i * M)) - ((count_i & (M-1)) + (tile_y_i * M))) & (ctrl_i.mask_start_index-1)) == 0) begin + mask_d[i] = 1'b0; + end else begin + mask_d[i] = 1'b1; + end + end + end + end + end + endcase + end + + always_ff @(posedge clk_i or negedge rst_ni) begin + if (~rst_ni) begin + mask_pos_q <= '0; + mask_tile_x_pos_q <= '0; + mask_tile_y_pos_q <= '0; + mask_col_offset_q <= '0; + mask_q <= '0; + end else begin + if (calc_en_i) begin + mask_pos_q <= mask_pos_d; + mask_tile_x_pos_q <= mask_tile_x_pos_d; + mask_tile_y_pos_q <= mask_tile_y_pos_d; + end + mask_col_offset_q <= mask_col_offset_d; + mask_q <= mask_d; + end + end + +endmodule diff --git a/src/ita_package.sv b/src/ita_package.sv index f63a299..184e0f9 100644 --- a/src/ita_package.sv +++ b/src/ita_package.sv @@ -49,10 +49,11 @@ package ita_package; typedef logic [N_REQUANT_CONSTS-1:0][EMS-1:0] requant_const_array_t; typedef logic signed [WI-1:0] requant_t; typedef logic signed [N_REQUANT_CONSTS-1:0][WI-1:0] requant_array_t; - typedef logic [WO-WI*2-2:0] seq_length_t; - typedef logic [WO-WI*2-2:0] proj_space_t; - typedef logic [WO-WI*2-2:0] embed_size_t; - typedef logic [WO-WI*2-2:0] ff_size_t; + typedef logic [WO-WI*2-1:0] input_dim_t; + typedef input_dim_t seq_length_t; + typedef input_dim_t proj_space_t; + typedef input_dim_t embed_size_t; + typedef input_dim_t ff_size_t; typedef logic [ 32-1:0] tile_t; typedef struct packed { logic start ; diff --git a/src/ita_softmax.sv b/src/ita_softmax.sv index e99653b..70bdfe8 100644 --- a/src/ita_softmax.sv +++ b/src/ita_softmax.sv @@ -187,6 +187,7 @@ module ita_softmax write_max_addr_o = count_q3; write_max_data_o = max_q; for (int i = 0; i < N; i++) begin + //Marcel Kant: This if statement is most likely not required if (shift_q[i] != 4'hF) exp_sum_d += unsigned'(9'h100)>>shift_q[i]; end @@ -317,7 +318,7 @@ module ita_softmax end Strided: begin //col_pos = i + mask_tile_x_q * M - //row_pos = count_soft_mask_q & (M-1) + mask_tile_y_pos_q * M + //row_pos = count_soft_mask_q & (M-1) + mask_tile_y_q * M if ((((i + (mask_tile_x_q * M)) - ((count_soft_mask_q & (M-1)) + (mask_tile_y_q * M))) & (ctrl_i.mask_start_index-1)) == 0) begin disable_col[i] = 1'b0; end else begin From 27a0e37eba2d7b9cdf3069ce78d16a92d69efb3c Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Fri, 13 Dec 2024 17:21:18 +0100 Subject: [PATCH 49/60] Added more masks in the golden model --- PyITA/ITA.py | 1468 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 1468 insertions(+) diff --git a/PyITA/ITA.py b/PyITA/ITA.py index e69de29..0b1dac3 100644 --- a/PyITA/ITA.py +++ b/PyITA/ITA.py @@ -0,0 +1,1468 @@ +# Copyright 2023 ETH Zurich and University of Bologna. +# Licensed under the Apache License, Version 2.0, see LICENSE for details. +# SPDX-License-Identifier: Apache-2.0 + +# ---------------------------------------------------------------------- +# +# File: ITA.py +# +# Last edited: 5.03.2024 +# +# Copyright (C) 2024, ETH Zurich and University of Bologna. +# +# Author: Philip Wiese (wiesep@iis.ee.ethz.ch), ETH Zurich +# +# ---------------------------------------------------------------------- + +import os +import sys +from functools import partial +from typing import Union + +import numpy as np +from numpy.typing import ArrayLike, DTypeLike + +import seaborn as sns +import matplotlib.pyplot as plt + +from .softmax import fastSoftmax, realSoftmax, streamingPartialSoftmax +from .gelu import gelu_requantize, i_gelu_requantized, get_i_gelu_constants, get_i_gelu_requantized_constants +from .util import (generate_matrix_mem, pack_8b_to_word, pack_array_8b_to_word, pack_hex_24b, pack_multihead_8b_to_word, + pack_multihead_24b_to_word, random_shuffled_tensor, requantize, split_matrix, to_hex, write_matrix, + write_matrix_mem, write_matrix_mem_hex, write_vector_mem_hex, get_almost_symmetric_scaling_factor, + error_MAEP) + + +class Transformer: + WO = 26 + WI = 8 + + def __init__(self, + S: int, + P: int, + E: int, + F: int, + H: int, + path: Union[str, os.PathLike], + bias: bool = True, + activation: str = "identity", + mask: str = "none", + Q: ArrayLike = None, + K: ArrayLike = None, + V: ArrayLike = None, + Wq: ArrayLike = None, + Wk: ArrayLike = None, + Wv: ArrayLike = None, + Wo: ArrayLike = None, + Bq: ArrayLike = None, + Bk: ArrayLike = None, + Bv: ArrayLike = None, + Bo: ArrayLike = None, + FF_in: ArrayLike = None, + Wff: ArrayLike = None, + Wff2: ArrayLike = None, + Bff: ArrayLike = None, + Bff2: ArrayLike = None): + + self.ITA_N = 16 + self.ITA_M = 64 + + # WIESEP: Set numpy print options + np.set_printoptions(threshold = sys.maxsize) + np.set_printoptions(linewidth = np.inf) + + self._init_paths(path) + + self.S_ITA = ((S - 1) // self.ITA_M + 1) * self.ITA_M + self.P_ITA = ((P - 1) // self.ITA_M + 1) * self.ITA_M + self.E_ITA = ((E - 1) // self.ITA_M + 1) * self.ITA_M + self.F_ITA = ((F - 1) // self.ITA_M + 1) * self.ITA_M + self.H_ITA = 4 + self.split = self.ITA_M // self.ITA_N + + self.S = S + self.P = P + self.E = E + self.F = F + self.H = H + self.bias = bias + self.activation = activation + self.mask = mask + + # Setup transformation functions + self.split_m_m = partial(split_matrix, block_shape = (self.ITA_M, self.ITA_M)) + self.split_m_n = partial(split_matrix, block_shape = (self.ITA_M, self.ITA_N)) + + self._validate_matrix_constraints(K, V) + self._initialize_quantization_parameters() + self._init_gelu_constants() + self._initialize_tensors(Q, V, Wq, Wk, Wv, Wo, Bq, Bk, Bv, Bo, FF_in, Wff, Wff2, Bff, Bff2) + + def split_multihead_m_m(self, multihead_array: np.ndarray): + """ + Split a multihead array into blocks of size ITA_M x ITA_M. + + Args: + multihead_array (np.ndarray): A 3-dimensional numpy array to be split into blocks. + + Returns: + np.ndarray: A 3-dimensional numpy array with the blocks of size ITA_M x ITA_M, where all blocks are stacked vertically in the inner dimensions. + """ + return [self.split_m_m(array) for array in multihead_array] + + def _validate_matrix_constraints(self, K: ArrayLike, V: ArrayLike): + # WIESEP: Ensure that K is the same as V because we do cross-attention + assert (np.all(K == V)) + + # WIESEP: Current restrictions for ITA + # assert (self.S % self.ITA_M == 0), "Sequence length must be divisible by ITA_M" + # assert (self.P % self.ITA_M == 0), "Projection space must be divisible by ITA_M" + # assert (self.E % self.ITA_M == 0), "Embedding size must be divisible by ITA_M" + # assert (self.F % self.ITA_M == 0), "Feedforward size must be divisible by ITA_M" + + assert ( + self.E <= 512 + ), f"Embedding size must be less than {int(2**(self.WO-17))} because the internal bit width is {self.WO} bits" + assert ( + self.P <= 512 + ), f"Projection space must be less than {int(2**(self.WO-17))} because the internal bit width is {self.WO} bits" + assert ( + self.S <= 512 + ), f"Sequence length must be less than {int(2**(self.WO-17))} because the internal bit width is {self.WO} bits" + assert ( + self.F <= 512 + ), f"Feedforward size must be less than {int(2**(self.WO-17))} because the internal bit width is {self.WO} bits" + + # assert (self.H % self.H_ITA == 0 or self.H == 1), "Number of heads must be one or divisible by H_ITA" + + def _initialize_tensors(self, Q, V, Wq, Wk, Wv, Wo, Bq, Bk, Bv, Bo, FF_in, Wff, Wff2, Bff, Bff2): + + self.exp_sum = np.zeros(self.S, dtype = np.int32) + + self.Q_in = random_shuffled_tensor((self.S, self.E), self.WI) if Q is None else Q + self.Q = np.pad(self.Q_in, ((0, self.S_ITA - self.S), (0, self.E_ITA - self.E))) + + self.V_in = random_shuffled_tensor((self.S, self.E), self.WI) if V is None else V + self.V = np.pad(self.V_in, ((0, self.S_ITA - self.S), (0, self.E_ITA - self.E))) + + # WIESEP: K is the same as V because we do cross-attention + self.K_in = self.V_in + self.K = self.V + + self.FF_in = random_shuffled_tensor((self.S, self.E), self.WI) if FF_in is None else FF_in + self.FF = np.pad(self.FF_in, ((0, self.S_ITA - self.S), (0, self.E_ITA - self.E))) + + #### Weight matrices #### + self.Wq_in = random_shuffled_tensor((self.H, self.E, self.P), self.WI) if Wq is None else Wq + self.Wq = np.pad(self.Wq_in, ((0, 0), (0, self.E_ITA - self.E), (0, self.P_ITA - self.P))) + + self.Wk_in = random_shuffled_tensor((self.H, self.E, self.P), self.WI) if Wk is None else Wk + self.Wk = np.pad(self.Wk_in, ((0, 0), (0, self.E_ITA - self.E), (0, self.P_ITA - self.P))) + + self.Wv_in = random_shuffled_tensor((self.H, self.E, self.P), self.WI) if Wv is None else Wv + self.Wv = np.pad(self.Wv_in, ((0, 0), (0, self.E_ITA - self.E), (0, self.P_ITA - self.P))) + + self.Wo_in = random_shuffled_tensor((self.H, self.P, self.E), self.WI) if Wo is None else Wo + self.Wo = np.pad(self.Wo_in, ((0, 0), (0, self.P_ITA - self.P), (0, self.E_ITA - self.E))) + + self.Wff_in = random_shuffled_tensor((1, self.E, self.F), self.WI) if Wff is None else Wff + self.Wff = np.pad(self.Wff_in, ((0, 0), (0, self.E_ITA - self.E), (0, self.F_ITA - self.F))) + self.Wff2_in = random_shuffled_tensor((1, self.F, self.E), self.WI) if Wff2 is None else Wff2 + self.Wff2 = np.pad(self.Wff2_in, ((0, 0), (0, self.F_ITA - self.F), (0, self.E_ITA - self.E))) + + #### Bias matrices #### + if self.bias: + self.Bq_in = random_shuffled_tensor( + (self.H, self.P), int(np.log2(self.P)) + 8, type = np.int32) if Bq is None else Bq + else: + self.Bq_in = np.zeros((self.H, self.P), dtype = np.int8) + self.Bq = np.pad(self.Bq_in, ((0, 0), (0, self.P_ITA - self.P))) + self.Bq_broadcast = np.reshape(np.repeat(self.Bq, self.S, axis = 0), (self.H, self.S, self.P_ITA)) + self.Bq_broadcast = np.pad(self.Bq_broadcast, ((0, 0), (0, self.S_ITA - self.S), (0, 0))) + + + if self.bias: + self.Bk_in = random_shuffled_tensor( + (self.H, self.P), int(np.log2(self.P)) + 8, type = np.int32) if Bk is None else Bk + else: + self.Bk_in = np.zeros((self.H, self.P), dtype = np.int8) + self.Bk = np.pad(self.Bk_in, ((0, 0), (0, self.P_ITA - self.P))) + self.Bk_broadcast = np.reshape(np.repeat(self.Bk, self.S, axis = 0), (self.H, self.S, self.P_ITA)) + self.Bk_broadcast = np.pad(self.Bk_broadcast, ((0, 0), (0, self.S_ITA - self.S), (0, 0))) + + if self.bias: + self.Bv_in = random_shuffled_tensor( + (self.H, self.P), int(np.log2(self.P)) + 8, type = np.int32) if Bv is None else Bv + else: + self.Bv_in = np.zeros((self.H, self.P), dtype = np.int8) + self.Bv = np.pad(self.Bv_in, ((0, 0), (0, self.P_ITA - self.P))) + self.Bv_broadcast = np.reshape(np.repeat(self.Bv, self.S, axis = 0), (self.H, self.S, self.P_ITA)) + self.Bv_broadcast = np.pad(self.Bv_broadcast, ((0, 0), (0, self.S_ITA - self.S), (0, 0))) + + if self.bias: + self.Bo_in = random_shuffled_tensor( + (self.H, self.E), int(np.log2(self.E)) + 8, type = np.int32) if Bo is None else Bo + else: + self.Bo_in = np.zeros((self.H, self.E), dtype = np.int8) + self.Bo = np.pad(self.Bo_in, ((0, 0), (0, self.E_ITA - self.E))) + self.Bo_broadcast = np.reshape(np.repeat(self.Bo, self.S, axis = 0), (self.H, self.S, self.E_ITA)) + self.Bo_broadcast = np.pad(self.Bo_broadcast, ((0, 0), (0, self.S_ITA - self.S), (0, 0))) + + if self.bias: + self.Bff_in = random_shuffled_tensor( + (1, self.F), int(np.log2(self.F)) + 8, type = np.int32) if Bff is None else Bff + else: + self.Bff_in = np.zeros((1, self.F), dtype = np.int8) + self.Bff = np.pad(self.Bff_in, ((0, 0), (0, self.F_ITA - self.F))) + self.Bff_broadcast = np.reshape(np.repeat(self.Bff, self.S, axis = 0), (1, self.S, self.F_ITA)) + self.Bff_broadcast = np.pad(self.Bff_broadcast, ((0, 0), (0, self.S_ITA - self.S), (0, 0))) + if self.bias: + self.Bff2_in = random_shuffled_tensor( + (1, self.E), int(np.log2(self.E)) + 8, type = np.int32) if Bff2 is None else Bff2 + else: + self.Bff2_in = np.zeros((1, self.E), dtype = np.int8) + self.Bff2 = np.pad(self.Bff2_in, ((0, 0), (0, self.E_ITA - self.E))) + self.Bff2_broadcast = np.reshape(np.repeat(self.Bff2, self.S, axis = 0), (1, self.S, self.E_ITA)) + self.Bff2_broadcast = np.pad(self.Bff2_broadcast, ((0, 0), (0, self.S_ITA - self.S), (0, 0))) + + #### Intermediate tensors #### + + self.Qp = None + self.Qp_requant = None + self.Kp = None + self.Kp_requant = None + self.Vp = None + self.Vp_requant = None + self.FFp = None + self.FFp_requant = None + self.FF2p = None + self.FF2p_requant = None + + self.A = None + self.A_requant = None + self.A_real_softmax = np.zeros([self.H, self.S, self.S], dtype = np.int8) + self.A_partial_softmax = np.zeros([self.H, self.S, self.S], dtype = np.int8) + + self.Mask = None + + self.O_soft = None + self.O_soft_requant = None + + self.Out_soft = None + self.Out_soft_requant = None + + self.Out_soft_sum = None + self.Out_soft_sum_requant = None + + self.preactivation = np.random.randint(-128, 127, size = (self.S, self.F), dtype = np.int8) + self.postactivation = None + + def _initialize_quantization_parameters(self): + # WIESEP: 6 steps for attention layer and one to requantize the accumulated output, 2 for feedforward + self.requant_eps_mult = np.zeros((7, self.H), dtype = np.uint8) + self.requant_right_shift = np.zeros((7, self.H), dtype = np.uint8) + + # WIESEP: Add parameter in transformers will always be zero as there are no batch normalization layers + self.requant_add = np.zeros((7, self.H), dtype = np.int8) + + for i in range(7): + self.requant_eps_mult[i, :] = np.random.randint(64, 127, size = (1, self.H), dtype = np.uint8) + + if i < 3: # Q, K, V + max_bit_width = np.log2(self.requant_eps_mult[i, :].astype(np.uint32) * self.E * 2**9).astype(np.uint32) + elif i == 3: # QK + max_bit_width = np.log2(self.requant_eps_mult[i, :].astype(np.uint32) * self.P * 2**8).astype(np.uint32) + elif i == 4: # AV + max_bit_width = np.log2(self.requant_eps_mult[i, :].astype(np.uint32) * self.S * 2**5).astype(np.uint32) + elif i == 5: # OW + max_bit_width = np.log2(self.requant_eps_mult[i, :].astype(np.uint32) * self.E * 2**9).astype(np.uint32) + elif i == 6: # Sum OW + max_bit_width = np.log2(self.requant_eps_mult[i, :].astype(np.uint32) * self.H * 2**7).astype(np.uint32) + + # WIESEP: Last requatization after head summation shares the same parameters + if i == 6: + self.requant_right_shift[i, :] = np.tile(max_bit_width[0] - 8 + 2, self.H) + else: + self.requant_right_shift[i, :] = max_bit_width - 8 + 2 + + write_matrix([self.requant_eps_mult.T], "RQS_ATTN_MUL", self.paths["base"]) + write_matrix([self.requant_right_shift.T], "RQS_ATTN_SHIFT", self.paths["base"]) + write_matrix([self.requant_add.T], "RQS_ATTN_ADD", self.paths["base"]) + + self.requant_eps_mult_ffn = np.zeros((2, 1), dtype = np.uint8) + self.requant_right_shift_ffn = np.zeros((2, 1), dtype = np.uint8) + self.requant_add_ffn = np.zeros((2, 1), dtype = np.int8) + + for i in range(2): + self.requant_eps_mult_ffn[i, :] = np.random.randint(64, 127, size = (1, 1), dtype = np.uint8) + + if i == 0: + max_bit_width = np.log2(self.requant_eps_mult_ffn[i, :].astype(np.uint32) * self.E * 2**9).astype( + np.uint32) + elif i == 1: + max_bit_width = np.log2(self.requant_eps_mult_ffn[i, :].astype(np.uint32) * self.F * 2**9).astype( + np.uint32) + + self.requant_right_shift_ffn[i, :] = max_bit_width - 8 + 2 + + write_matrix([self.requant_eps_mult_ffn.T], "RQS_FFN_MUL", self.paths["base"]) + write_matrix([self.requant_right_shift_ffn.T], "RQS_FFN_SHIFT", self.paths["base"]) + write_matrix([self.requant_add_ffn.T], "RQS_FFN_ADD", self.paths["base"]) + + def _init_gelu_constants(self): + CLIP_LO = -4 + D = 2**20 + + gelu_eps_mult, _ = get_almost_symmetric_scaling_factor(CLIP_LO, n_bits = 8) + self.q_1, self.q_b, self.q_c, _, _, _, self.gelu_rqs_mul, self.gelu_rqs_shift, self.gelu_rqs_add, S_out = get_i_gelu_requantized_constants( + gelu_eps_mult, D) + + write_matrix([[self.q_1]], "GELU_ONE", self.paths["base"]) + write_matrix([[self.q_b]], "GELU_B", self.paths["base"]) + write_matrix([[self.q_c]], "GELU_C", self.paths["base"]) + write_matrix([[self.gelu_rqs_mul]], "activation_requant_mult", self.paths["base"]) + write_matrix([[self.gelu_rqs_shift]], "activation_requant_shift", self.paths["base"]) + write_matrix([[self.gelu_rqs_add]], "activation_requant_add", self.paths["base"]) + + def _init_paths(self, base_path: Union[str, os.PathLike]): + self.paths = { + "base": base_path, + "mempool": os.path.join(base_path, "mempool/"), + "hwpe": os.path.join(base_path, "hwpe/"), + "standalone": os.path.join(base_path, "standalone/"), + "snitch-cluster": os.path.join(base_path, "snitch-cluster/") + } + for path in self.paths.values(): + os.makedirs(path, exist_ok = True) + + def print_properties(self, verbose: int, text_align = 30): + if verbose > 0: + print(f"{'ITA Sequence Length ' :<{text_align}}: {self.S_ITA}") + print(f"{'ITA Projection Space' :<{text_align}}: {self.P_ITA}") + print(f"{'ITA Embedding Size ' :<{text_align}}: {self.E_ITA}") + print(f"{'ITA Number of Heads ' :<{text_align}}: {self.H_ITA}") + print(f"{'Matrix Sequence Length ' :<{text_align}}: {self.S}") + print(f"{'Matrix Projection Space' :<{text_align}}: {self.P}") + print(f"{'Matrix Embedding Size ' :<{text_align}}: {self.E}") + print(f"{'Matrix Feedforward Size' :<{text_align}}: {self.F}") + print(f"{'Matrix Number of Heads ' :<{text_align}}: {self.H}") + print(f"{'Bias ' :<{text_align}}: {bool(self.bias)}") + print(f"{'Requant Mult Attention ' :<{text_align}}: {list(self.requant_eps_mult)}") + print(f"{'Requant Shift Attention ' :<{text_align}}: {list(self.requant_right_shift)}") + print(f"{'Requant Add Attention ' :<{text_align}}: {list(self.requant_add)}") + print(f"{'Requant Mult FFN ' :<{text_align}}: {list(self.requant_eps_mult_ffn)}") + print(f"{'Requant Shift FFN ' :<{text_align}}: {list(self.requant_right_shift_ffn)}") + print(f"{'Requant Add FFN ' :<{text_align}}: {list(self.requant_add_ffn)}") + + def tiler_QK(self, qk: np.ndarray, weight: np.ndarray, bias: np.ndarray, output: np.ndarray, input_file: str, + weight_file: str, bias_file: str, output_file: str): + """ + Tile input, weight, bias and output for Q and K generation + """ + + # Weight Wqk is H x E x P + # Transpose Wqk to H x P x E + # print(f"qk: {qk.shape}") + # print(f"qk: {weight.shape}") + + weight = np.transpose(weight, (0, 2, 1)) + + tile_x = qk.shape[0] // self.ITA_M # S // ITA_M + tile_inner = qk.shape[1] // self.ITA_M # E // ITA_M + tile_y = weight.shape[1] // self.ITA_M # P // ITA_M + print(f"=> Tile: {input_file} x {weight_file} + {bias_file} = {output_file}") + print(f" X: {tile_x}, Y: {tile_y}, Inner: {tile_inner}") + + # Input QK is S x E + Input = split_matrix(qk, (self.ITA_M, self.ITA_M), flatten = False) + # Repeat each row of each tile split times + Input = np.tile(Input, [1, 1, self.split, 1]) + # Repeat each tile number of output row tiles times + Input = np.tile(Input, [1, tile_y, 1, 1]).reshape((-1, self.ITA_M)) + # fig, ax = plt.subplots(1, 2) # Create a figure with two subplots + # im0 = ax[0].imshow(Input, cmap='viridis') + # im1 = ax[1].imshow(np.squeeze(weight, axis=0)) + + # # Add colorbars for each image if needed + # fig.colorbar(im0, ax=ax[0]) + # fig.colorbar(im1, ax=ax[1]) + + # # Set titles for each subplot + # ax[0].set_title("Inputs") + # ax[1].set_title("Weights") + + plt.show() + write_matrix(Input, input_file, self.paths["standalone"]) + + # Transposed Weight Wqk is H x P x E + for h in range(self.H): + Weight = split_matrix(weight[h], (self.ITA_M, self.ITA_M)) + # Repeat each tile number of output column tiles times + Weight = np.tile(Weight, [tile_x, 1]) + write_matrix(Weight, f"{weight_file}_{h}", self.paths["standalone"]) + + # Bias Bqk is H x P + # Broadcast Bias Bqk to H x S x P + bias = np.tile(bias, [1, self.S_ITA, 1]) + for h in range(self.H): + Bias = split_matrix(bias[h], (self.ITA_M, self.ITA_N)) + write_matrix(Bias, f"{bias_file}_{h}", self.paths["standalone"]) + + # Output QKp is H x S x P + for h in range(self.H): + Output = split_matrix(output[h], (self.ITA_M, self.ITA_N)) + write_matrix(Output, f"{output_file}_{h}", self.paths["standalone"]) + + def tiler_V(self, v, weight, bias, output, input_file, weight_file, bias_file, output_file): + """ + Tile input, weight, bias and output for V generation + *Compute Vp in transposed form* + """ + + # Weight Wv is H x E x P + # Transpose Wv to H x P x E + weight = np.transpose(weight, (0, 2, 1)) + + tile_x = v.shape[0] // self.ITA_M # S // ITA_M + tile_inner = v.shape[1] // self.ITA_M # E // ITA_M + tile_y = weight.shape[1] // self.ITA_M # P // ITA_M + print(f"=> Tile: {input_file} x {weight_file} + {bias_file} = {output_file}") + print(f" X: {tile_x}, Y: {tile_y}, Inner: {tile_inner}") + + # Input V is S x E (will be used as second input) + Input = split_matrix(v, (self.ITA_M, self.ITA_M)) + # Repeat each tile number of output row tiles times + Input = np.tile(Input, [tile_y, 1]) + write_matrix(Input, input_file, self.paths["standalone"]) + + # Transposed Weight Wv is H x P x E (will be used as first input) + for h in range(self.H): + Weight = split_matrix(weight[h], (self.ITA_M, self.ITA_M), flatten = False) + # Repeat each row of each tile split times + Weight = np.tile(Weight, [1, 1, self.split, 1]) + # Repeat each tile number of output column tiles times + Weight = np.tile(Weight, [1, tile_x, 1, 1]).reshape((-1, self.ITA_M)) + write_matrix(Weight, f"{weight_file}_{h}", self.paths["standalone"]) + + # Bias Bv is H x P + # Broadcast Bias Bv to H x S x P + bias = np.tile(bias, [1, self.S_ITA, 1]) + # Transpose Bias Bv to H x P x S + bias = np.transpose(bias, (0, 2, 1)) + for h in range(self.H): + Bias = split_matrix(bias[h], (self.ITA_M, self.ITA_N)) + write_matrix(Bias, f"{bias_file}_{h}", self.paths["standalone"]) + + # Output Vp is H x S x P + # Transpose Vp to H x P x S + output = np.transpose(output, (0, 2, 1)) + for h in range(self.H): + Output = split_matrix(output[h], (self.ITA_M, self.ITA_N)) + write_matrix(Output, f"{output_file}_{h}", self.paths["standalone"]) + + def tiler_AV(self, Qp, Kp, output, input_file, weight_file, output_file): + """ + Tile input, weight, and output for Q.K = A and A.V = O generation + """ + + tile_x = Qp.shape[1] // self.ITA_M + tile_inner = Qp.shape[2] // self.ITA_M + tile_y = Kp.shape[1] // self.ITA_M + print(f"=> Tile: {input_file} x {weight_file} = {output_file}") + print(f" X: {tile_x}, Y: {tile_y}, Inner: {tile_inner}") + + # Input Qp is H x S x P or A is S x S + for h in range(self.H): + Input = split_matrix(Qp[h], (self.ITA_M, self.ITA_M), flatten = False) + # Repeat each row of each tile split times + Input = np.tile(Input, [1, 1, self.split, 1]) + # Repeat each tile number of output row tiles times + Input = np.tile(Input, [1, tile_y, 1, 1]).reshape((-1, self.ITA_M)) + write_matrix(Input, f"{input_file}_{h}", self.paths["standalone"]) + + # Weight Kp is H x S x P or V is H x P x S + for h in range(self.H): + Weight = split_matrix(Kp[h], (self.ITA_M, self.ITA_M)) + # Repeat each tile number of output column tiles times + Weight = np.tile(Weight, [tile_x, 1]) + write_matrix(Weight, f"{weight_file}_{h}", self.paths["standalone"]) + + # Output A is H x S x S or O is H x S x P + for h in range(self.H): + Output = split_matrix(output[h], (self.ITA_M, self.ITA_N)) + write_matrix(Output, f"{output_file}_{h}", self.paths["standalone"]) + + def tiler_Out(self, O, weight, bias, output, input_file, weight_file, bias_file, output_file): + """ + Tile input, weight, bias and output for Output generation + Same as QK but takes multi-head input + """ + + # Weight Wo is H x P x E + # Transpose Wo to H x E x P + weight = np.transpose(weight, (0, 2, 1)) + + tile_x = O.shape[1] // self.ITA_M # S // ITA_M + tile_inner = O.shape[2] // self.ITA_M # P // ITA_M + tile_y = weight.shape[1] // self.ITA_M # E // ITA_M + + print(f"=> Tile: {input_file} x {weight_file} + {bias_file} = {output_file}") + print(f" X: {tile_x}, Y: {tile_y}, Inner: {tile_inner}") + + # Input O is H x S x P + for h in range(self.H): + Input = split_matrix(O[h], (self.ITA_M, self.ITA_M), flatten = False) + # Repeat each row of each tile split times + Input = np.tile(Input, [1, 1, self.split, 1]) + # Repeat each tile number of output row tiles times + Input = np.tile(Input, [1, tile_y, 1, 1]).reshape((-1, self.ITA_M)) + write_matrix(Input, f"{input_file}_{h}", self.paths["standalone"]) + + # Transposed Weight Wo is H x E x P + for h in range(self.H): + Weight = split_matrix(weight[h], (self.ITA_M, self.ITA_M)) + # Repeat each tile number of output column tiles times + Weight = np.tile(Weight, [tile_x, 1]) + write_matrix(Weight, f"{weight_file}_{h}", self.paths["standalone"]) + + # Bias Bo is H x E + # Broadcast Bias Bo to H x S x E + bias = np.tile(bias, [1, self.S_ITA, 1]) + for h in range(self.H): + Bias = split_matrix(bias[h], (self.ITA_M, self.ITA_N)) + write_matrix(Bias, f"{bias_file}_{h}", self.paths["standalone"]) + + # Output is H x S x E + for h in range(self.H): + Output = split_matrix(output[h], (self.ITA_M, self.ITA_N)) + write_matrix(Output, f"{output_file}_{h}", self.paths["standalone"]) + + def step1_Qp(self): + self.Qp = np.matmul(self.Q, self.Wq, dtype = np.int32) + self.Bq_broadcast + self.Qp = np.clip(self.Qp, -2**(self.WO - 1), 2**(self.WO - 1) - 1) + self.Qp_requant = requantize(self.Qp, self.requant_eps_mult[0], self.requant_right_shift[0], + self.requant_add[0]) + + # Set padded values to zero + if (self.S_ITA - self.S) > 0: + self.Qp_requant[:, -(self.S_ITA - self.S):, :] = 0 + if (self.P_ITA - self.P) > 0: + self.Qp_requant[:, :, -(self.P_ITA - self.P):] = 0 + + self.tiler_QK(self.Q, self.Wq, self.Bq, self.Qp_requant, "Q", "Wq", "Bq", "Qp") + + def step2_Kp(self): + self.Kp = np.matmul(self.K, self.Wk, dtype = np.int32) + self.Bk_broadcast + self.Kp = np.clip(self.Kp, -2**(self.WO - 1), 2**(self.WO - 1) - 1) + self.Kp_requant = requantize(self.Kp, self.requant_eps_mult[1], self.requant_right_shift[1], + self.requant_add[1]) + + if (self.S_ITA - self.S) > 0: + self.Kp_requant[:, -(self.S_ITA - self.S):, :] = 0 + if (self.P_ITA - self.P) > 0: + self.Kp_requant[:, :, -(self.P_ITA - self.P):] = 0 + + self.tiler_QK(self.K, self.Wk, self.Bk, self.Kp_requant, "K", "Wk", "Bk", "Kp") + + def step3_Vp(self): + self.Vp = np.matmul(self.V, self.Wv, dtype = np.int32) + self.Bv_broadcast + self.Vp = np.clip(self.Vp, -2**(self.WO - 1), 2**(self.WO - 1) - 1) + self.Vp_requant = requantize(self.Vp, self.requant_eps_mult[2], self.requant_right_shift[2], + self.requant_add[2]) + + if (self.S_ITA - self.S) > 0: + self.Vp_requant[:, -(self.S_ITA - self.S):, :] = 0 + if (self.P_ITA - self.P) > 0: + self.Vp_requant[:, :, -(self.P_ITA - self.P):] = 0 + + # Compute Vp in transposed form + self.tiler_V(self.V, self.Wv, self.Bv, self.Vp_requant, "V", "Wv", "Bv", "Vp") + + def apply_mask(self, index): + if (self.mask == 'upper_triangular'): + self.Mask = np.full((self.H, self.S, self.S), fill_value=False, dtype='bool') + if (0 < index and index < self.S): + for h in range(self.Mask.shape[0]): + for i in range(self.Mask.shape[1]): + for j in range((i + index), self.Mask.shape[2]): + self.Mask[h][i][j] = True + else: + raise ValueError(f"Index is out of bounds for {self.mask} mask") + elif (self.mask == 'lower_triangular'): + self.Mask = np.full((self.H, self.S, self.S), fill_value=False, dtype='bool') + if (0 < index and index < self.S): + for h in range(self.Mask.shape[0]): + for i in range(index, self.Mask.shape[1]): + for j in range((i-(index-1))): + self.Mask[h][i][j] = True + else: + raise ValueError(f"Index is out of bounds for {self.mask} mask") + elif (self.mask == 'strided'): + self.Mask = np.full((self.H, self.S, self.S), fill_value=True, dtype='bool') + if (0 < index and index < self.S): + if (index % 2 == 0): + for h in range(self.Mask.shape[0]): + for i in range(self.Mask.shape[1]): + self.Mask[h][i][i] = False + for j in range(i, self.Mask.shape[2], index): + self.Mask[h][i][j] = False + self.Mask[h][j][i] = False + else: + raise ValueError(f"Index has to be a power of two for {self.mask} mask") + else: + raise ValueError(f"Index is out of bounds for {self.mask} mask") + elif (self.mask == 'upper_strided'): + self.Mask = np.full((self.H, self.S, self.S), fill_value=True, dtype='bool') + if (0 < index and index < self.S): + for h in range(self.Mask.shape[0]): + for i in range(self.Mask.shape[1]): + for j in range(i, self.Mask.shape[2], index): + self.Mask[h][i][j] = False + else: + raise ValueError(f"Index is out of bounds for {self.mask} mask") + elif (self.mask == 'lower_strided'): + self.Mask = np.full((self.H, self.S, self.S), fill_value=True, dtype='bool') + if (0 < index and index < self.S): + for h in range(self.Mask.shape[0]): + for i in range(self.Mask.shape[1]): + for j in range(i, self.Mask.shape[2], index): + self.Mask[h][j][i] = False + else: + raise ValueError(f"Index is out of bounds for {self.mask} mask") + elif (self.mask == 'sliding_window_attention'): + self.Mask = np.full((self.H, self.S, self.S), fill_value=True, dtype='bool') + if (0 < index and index < self.S): + for h in range(self.Mask.shape[0]): + for i in range(self.Mask.shape[1]): + for j in range(i, (index + i)): + self.Mask[h][i][j] = False + self.Mask[h][j][i] = False + else: + raise ValueError(f"Index is out of bounds for {self.mask} mask") + elif(self.mask == 'none'): + pass + else: + raise ValueError("Mask not supported") + + + def step4_QK(self, no_partial_softmax, index): + self.A = np.array( + [np.matmul(self.Qp_requant[i], np.transpose(self.Kp_requant[i]), dtype = np.int32) for i in range(self.H)]) + self.A = np.clip(self.A, -2**(self.WO - 1), 2**(self.WO - 1) - 1) + self.A_requant = requantize(self.A, self.requant_eps_mult[3], self.requant_right_shift[3], self.requant_add[3]) + + self.apply_mask(index) + + print(self.Mask) + + matrix = np.squeeze(self.A_requant) + plt.imshow(matrix, cmap='viridis') + plt.colorbar() + plt.title("A_requant/A_stream_soft_in") + plt.show() + + print(f"A_requant row 0: {self.A_requant[0, 0, :]}") + + if (self.S_ITA - self.S) > 0: + self.A_requant[:, -(self.S_ITA - self.S):, :] = 0 + self.A_requant[:, :, -(self.S_ITA - self.S):] = 0 + + self.soft(no_partial_softmax) + + matrix = np.squeeze(self.A_partial_softmax) + plt.imshow(matrix, cmap='viridis') + plt.colorbar() + plt.title("A_partial_softmax") + plt.show() + + self.tiler_AV(self.Qp_requant, self.Kp_requant, self.A_requant, "Qp_in", "Kp_in", "A") + + def soft(self, no_partial_softmax = False): + self.A_real_softmax = realSoftmax(self.A_requant[:, :self.S, :self.S]) + self.A_real_softmax = np.pad(self.A_real_softmax, ((0, 0), (0, self.S_ITA - self.S), (0, self.S_ITA - self.S))) + + if no_partial_softmax: + self.A_partial_softmax = fastSoftmax(self.A_requant[:, :self.S, :self.S]) + self.A_partial_softmax = np.pad(self.A_partial_softmax, + ((0, 0), (0, self.S_ITA - self.S), (0, self.S_ITA - self.S))) + else: + self.A_partial_softmax = streamingPartialSoftmax(self.A_requant[:, :self.S, :self.S], self.Mask) + self.A_partial_softmax[self.Mask] = 0 + print(f"inp_stream_soft_o: {self.A_partial_softmax[0,:,:]}") + print(f"Normalization Sum: {np.sum(self.A_partial_softmax[0,:,:], axis=1)}") + self.A_partial_softmax = np.pad(self.A_partial_softmax, + ((0, 0), (0, self.S_ITA - self.S), (0, self.S_ITA - self.S))) + + if self.H == 1: + A_save = [np.tile(self.A_partial_softmax[i], [self.split, 1]) for i in range(self.H)] + write_matrix(A_save, "A_soft_in", self.paths["standalone"]) + for h in range(self.H): + A_save = self.A_partial_softmax[h] + write_matrix(A_save, f"A_soft_{h}", self.paths["standalone"]) + + def step5_AV(self): + print(f"A_partial_softmax: {self.A_partial_softmax.shape}") + print(f"Vp_requant: {self.Vp_requant.shape}") + + self.O_soft = np.array([ + np.matmul(self.A_partial_softmax[i].astype(np.uint8), self.Vp_requant[i], dtype = np.int32) + for i in range(self.H) + ]) + print(f"O_soft without requant row 0: {self.O_soft[0, 62, :]}") + print(f"O_soft without requant row 0: {self.O_soft[0, 63, :]}") + print(f"O_soft without requant row 0: {self.O_soft[0, 0, :]}") + print(f"O_soft without requant row 0: {self.O_soft[0, 1, :]}") + + self.O_soft = np.clip(self.O_soft, -2**(self.WO - 1), 2**(self.WO - 1) - 1) + self.O_soft_requant = requantize(self.O_soft, self.requant_eps_mult[4], self.requant_right_shift[4], + self.requant_add[4]) + + print(f"O_soft_requant: {self.O_soft_requant[0, 62, :]}") + print(f"O_soft_requant: {self.O_soft_requant[0, 63, :]}") + print(f"O_soft_requant: {self.O_soft_requant[0, 0, :]}") + print(f"O_soft_requant: {self.O_soft_requant[0, 1, :]}") + + if (self.S_ITA - self.S) > 0: + self.O_soft_requant[:, -(self.S_ITA - self.S):, :] = 0 + if (self.P_ITA - self.P) > 0: + self.O_soft_requant[:, :, -(self.P_ITA - self.P):] = 0 + + matrix = np.squeeze(self.O_soft_requant) + plt.imshow(matrix, cmap='viridis') + plt.colorbar() + plt.title("O_soft_requant/O_soft") + plt.show() + + self.tiler_AV(self.A_requant, np.transpose(self.Vp_requant, (0, 2, 1)), self.O_soft_requant, "A_stream_soft_in", + "Vp_in", "O_soft") + + + + def apply_activation(self, preactivation, activation): + if activation not in ["gelu", "relu", "identity"]: + raise ValueError("Activation function not supported") + + if activation == "gelu": + vectorized_gelu = np.vectorize(i_gelu_requantized) + postactivation = vectorized_gelu(preactivation, self.q_1, self.q_b, self.q_c, self.gelu_rqs_mul, + self.gelu_rqs_shift, self.gelu_rqs_add) + elif activation == "relu": + postactivation = np.maximum(preactivation, 0) + vectorized_requantize = np.vectorize(gelu_requantize) + postactivation = vectorized_requantize(postactivation, self.gelu_rqs_mul, self.gelu_rqs_shift, + self.gelu_rqs_add) + elif activation == "identity": + postactivation = preactivation.copy() + + return postactivation + + def step6_O(self): + self.Out_soft = np.matmul(self.O_soft_requant, self.Wo, dtype = np.int32) + self.Bo_broadcast + self.Out_soft = np.clip(self.Out_soft, -2**(self.WO - 1), 2**(self.WO - 1) - 1) + self.Out_soft_requant = requantize(self.Out_soft, self.requant_eps_mult[5], self.requant_right_shift[5], + self.requant_add[5]) + + matrix = np.squeeze(self.Out_soft_requant) + plt.imshow(matrix, cmap='viridis') + plt.colorbar() + plt.title("Out_soft_requant") + plt.show() + + if (self.S_ITA - self.S) > 0: + self.Out_soft_requant[:, -(self.S_ITA - self.S):, :] = 0 + if (self.E_ITA - self.E) > 0: + self.Out_soft_requant[:, :, -(self.E_ITA - self.E):] = 0 + + self.tiler_Out(self.O_soft_requant, self.Wo, self.Bo, self.Out_soft_requant, "O_soft_in", "Wo", "Bo", + "Out_soft") + + def feedforward_layer(self): + self.FFp = np.matmul(self.FF, self.Wff, dtype = np.int32) + self.Bff_broadcast + self.FFp = np.clip(self.FFp, -2**(self.WO - 1), 2**(self.WO - 1) - 1) + self.FFp_requant = requantize(self.FFp, self.requant_eps_mult_ffn[0], self.requant_right_shift_ffn[0], + self.requant_add_ffn[0]) + self.FFp_requant = self.apply_activation(self.FFp_requant, self.activation) + + self.tiler_QK(self.FF, self.Wff, self.Bff, self.FFp_requant, "FF", "Wff", "Bff", "FFp") + + self.FF2p = np.matmul(self.FFp_requant, self.Wff2, dtype = np.int32) + self.Bff2_broadcast + self.FF2p = np.clip(self.FF2p, -2**(self.WO - 1), 2**(self.WO - 1) - 1) + self.FF2p_requant = requantize(self.FF2p, self.requant_eps_mult_ffn[1], self.requant_right_shift_ffn[1], + self.requant_add_ffn[1]) + + self.tiler_Out(self.FFp_requant, self.Wff2, self.Bff2, self.FF2p_requant, "FFp_in", "Wff2", "Bff2", "FF2p") + + def step7_Osum(self): + self.Out_soft_sum = np.sum(self.Out_soft_requant, axis = 0, dtype = np.int32, keepdims = True) + self.Out_soft_sum_requant = requantize(self.Out_soft_sum, self.requant_eps_mult[6], self.requant_right_shift[6], + self.requant_add[6]) + + def test_activations(self): + write_matrix(self.preactivation, "preactivation", self.paths["standalone"]) + gelu = np.zeros(self.preactivation.shape, dtype = np.int8) + relu = np.zeros(self.preactivation.shape, dtype = np.int8) + for i in range(self.preactivation.shape[0]): + for j in range(self.preactivation.shape[1]): + gelu[i, j] = i_gelu_requantized(self.preactivation[i, j], self.q_1, self.q_b, self.q_c, + self.gelu_rqs_mul, self.gelu_rqs_shift, self.gelu_rqs_add) + relu[i, j] = self.preactivation[i, j] if self.preactivation[i, j] > 0 else 0 + relu[i, j] = gelu_requantize(relu[i, j], self.gelu_rqs_mul, self.gelu_rqs_shift, self.gelu_rqs_add) + + write_matrix(gelu, "gelu", self.paths["standalone"]) + write_matrix(relu, "relu", self.paths["standalone"]) + + def export_hwpe(self): + path = self.paths["hwpe"] + + def remove_if_exists(file_name): + if os.path.exists(file_name): + os.remove(file_name) + + # WIESEP: Delete the old file otherwise it will lead to mismatches during RTL simulations as the files are memory mapped + mem_file = "mem" + files = [ + f"{mem_file}.txt", "Output.txt", "Q.txt", "K.txt", "V.txt", "QK.txt", "A.txt", "AV.txt", "OW.txt", "F1.txt", + "F2.txt" + ] + for file in files: + remove_if_exists(f"{path}/{file}") + + # Write the new mem file + # Layer: Attention + for h in range(self.H): + q = split_matrix(self.Q, (self.ITA_M, self.ITA_M)) + write_matrix_mem_hex(pack_array_8b_to_word(q, hex_string = False), mem_file, path) + + k = split_matrix(self.K, (self.ITA_M, self.ITA_M)) + write_matrix_mem_hex(pack_array_8b_to_word(k, hex_string = False), mem_file, path) + + w1 = split_matrix(np.transpose(self.Wq[h]), (self.ITA_M, self.ITA_M)) + write_matrix_mem_hex(pack_array_8b_to_word(w1, hex_string = False), mem_file, path) + + w2 = split_matrix(np.transpose(self.Wk[h]), (self.ITA_M, self.ITA_M)) + write_matrix_mem_hex(pack_array_8b_to_word(w2, hex_string = False), mem_file, path) + + w3 = split_matrix(np.transpose(self.Wv[h]), (self.ITA_M, self.ITA_M)) + write_matrix_mem_hex(pack_array_8b_to_word(w3, hex_string = False), mem_file, path) + + w4 = split_matrix(np.transpose(self.Wo[h]), (self.ITA_M, self.ITA_M)) + write_matrix_mem_hex(pack_array_8b_to_word(w4, hex_string = False), mem_file, path) + + b1_hex = np.vectorize(lambda val: to_hex(val, bit_size = 24))(self.Bq[h]) + # pack 24-bit values into 32-bit words + packed_b1_hex = np.array(pack_hex_24b(b1_hex)) + write_vector_mem_hex(packed_b1_hex, mem_file, path) + + b2_hex = np.vectorize(lambda val: to_hex(val, bit_size = 24))(self.Bk[h]) + # pack 24-bit values into 32-bit words + packed_b2_hex = np.array(pack_hex_24b(b2_hex)) + write_vector_mem_hex(packed_b2_hex, mem_file, path) + + b3_hex = np.vectorize(lambda val: to_hex(val, bit_size = 24))(self.Bv[h]) + # pack 24-bit values into 32-bit words + packed_b3_hex = np.array(pack_hex_24b(b3_hex)) + write_vector_mem_hex(packed_b3_hex, mem_file, path) + + b4_hex = np.vectorize(lambda val: to_hex(val, bit_size = 24))(self.Bo[h]) + # pack 24-bit values into 32-bit words + packed_b4_hex = np.array(pack_hex_24b(b4_hex)) + write_vector_mem_hex(packed_b4_hex, mem_file, path) + + # Write output + qp = split_matrix(self.Qp_requant[h], (self.ITA_M, self.ITA_M)) + write_matrix_mem_hex(pack_array_8b_to_word(qp, hex_string = False), "Q", path) + + kp = split_matrix(self.Kp_requant[h], (self.ITA_M, self.ITA_M)) + write_matrix_mem_hex(pack_array_8b_to_word(kp, hex_string = False), "K", path) + + v = split_matrix(np.transpose(self.Vp_requant[h]), (self.ITA_M, self.ITA_M)) + write_matrix_mem_hex(pack_array_8b_to_word(v, hex_string = False), "V", path) + + qk = split_matrix(self.A_requant[h], (self.ITA_M, self.ITA_M)) + write_matrix_mem_hex(pack_array_8b_to_word(qk, hex_string = False), "QK", path) + + a = split_matrix(self.A_partial_softmax[h], (self.ITA_M, self.ITA_M)) + write_matrix_mem_hex(pack_array_8b_to_word(a, hex_string = False), "A", path) + + o = split_matrix(self.O_soft_requant[h], (self.ITA_M, self.ITA_M)) + write_matrix_mem_hex(pack_array_8b_to_word(o, hex_string = False), "AV", path) + + out = split_matrix(self.Out_soft_requant[h], (self.ITA_M, self.ITA_M)) + write_matrix_mem_hex(pack_array_8b_to_word(out, hex_string = False), "OW", path) + + # Layer: Feedforward + ff = split_matrix(self.FF, (self.ITA_M, self.ITA_M)) + write_matrix_mem_hex(pack_array_8b_to_word(ff, hex_string = False), mem_file, path) + + wff = split_matrix(np.transpose(self.Wff[0]), (self.ITA_M, self.ITA_M)) + write_matrix_mem_hex(pack_array_8b_to_word(wff, hex_string = False), mem_file, path) + + wff2 = split_matrix(np.transpose(self.Wff2[0]), (self.ITA_M, self.ITA_M)) + write_matrix_mem_hex(pack_array_8b_to_word(wff2, hex_string = False), mem_file, path) + + bff_hex = np.vectorize(lambda val: to_hex(val, bit_size = 24))(self.Bff[0]) + # pack 24-bit values into 32-bit words + packed_bff_hex = np.array(pack_hex_24b(bff_hex)) + write_vector_mem_hex(packed_bff_hex, mem_file, path) + + bff2_hex = np.vectorize(lambda val: to_hex(val, bit_size = 24))(self.Bff2[0]) + # pack 24-bit values into 32-bit words + packed_bff2_hex = np.array(pack_hex_24b(bff2_hex)) + write_vector_mem_hex(packed_bff2_hex, mem_file, path) + + # Write output + ff = split_matrix(self.FFp_requant[0], (self.ITA_M, self.ITA_M)) + write_matrix_mem_hex(pack_array_8b_to_word(ff, hex_string = False), "F1", path) + + ff2 = split_matrix(self.FF2p_requant[0], (self.ITA_M, self.ITA_M)) + write_matrix_mem_hex(pack_array_8b_to_word(ff2, hex_string = False), "F2", path) + + def generate_snitch_cluster(self) -> str: + """ + This function generates a header file for ITA integrated into the the Snitch cluster. + + Returns: + str: The generated configuration file as a string. + """ + + ret = "" + + ret += f"""/* This file is automatically generated by '{" ".join(sys.argv)}' +* Do not edit manually, any manual change will be overwritten. +*/ + +// clang-format off +""" + + def generate_C_array(array, name, type = "uint32_t"): + """ + Generates a C-style array declaration from a numpy array. + + Args: + array (np.ndarray): The numpy array to be converted. + name (str): The name of the array in the generated code. + + Returns: + str: The C-style array declaration. + """ + return f"const {type} {name}[{array.size}] = {{\n{generate_matrix_mem(array)}\n}};\n" + + def generate_multihead_C_array(multihead_array, name, _type): + ret = "" + ret += f"const {_type} {name}[{self.H}][{multihead_array[0].size}] = {{\n" + ret += ",\n".join([f"{{\n{generate_matrix_mem(array)}\n}}" for array in multihead_array]) + ret += "\n};\n" + return ret + + def requant_multihead_harmonization_and_pack_8b(requant_array): + ret = [] + for i in range(self.H): + ret.append(pack_8b_to_word(np.pad(requant_array[:6, i], (0, 2)))) + return np.array(ret) + + def generate_define(name, value): + return f"#define {name.upper()} {value}\n" + + # Inputs (Q, K) + ret += generate_C_array(self.split_m_m(self.Q), "input_q", "int8_t") + ret += generate_C_array(self.split_m_m(self.K), "input_k", "int8_t") + + # Weights (Wq, Wk, Wv, Wo) + ret += generate_multihead_C_array(self.split_multihead_m_m(self.Wq.transpose(0, 2, 1)), "input_Wq", "int8_t") + ret += generate_multihead_C_array(self.split_multihead_m_m(self.Wk.transpose(0, 2, 1)), "input_Wk", "int8_t") + ret += generate_multihead_C_array(self.split_multihead_m_m(self.Wv.transpose(0, 2, 1)), "input_Wv", "int8_t") + ret += generate_multihead_C_array(self.split_multihead_m_m(self.Wo.transpose(0, 2, 1)), "input_Wo", "int8_t") + + # Biases (Bq, Bk, Bv, Bo) + ret += generate_multihead_C_array(self.Bq, "input_Bq", "ita_int24_t") + ret += generate_multihead_C_array(self.Bk, "input_Bk", "ita_int24_t") + ret += generate_multihead_C_array(self.Bv, "input_Bv", "ita_int24_t") + ret += generate_multihead_C_array(self.Bo, "input_Bo", "ita_int24_t") + + # Requantization parameters + ret += generate_multihead_C_array(requant_multihead_harmonization_and_pack_8b(self.requant_eps_mult), + "requant_eps_mult", "int32_t") + ret += generate_multihead_C_array(requant_multihead_harmonization_and_pack_8b(self.requant_right_shift), + "requant_right_shift", "int32_t") + ret += generate_multihead_C_array(requant_multihead_harmonization_and_pack_8b(self.requant_add), "requant_add", + "int32_t") + + # Intermediate results (Qp, Kp, Vp, A, O_soft, Out_soft) + ret += generate_multihead_C_array(self.split_multihead_m_m(self.Qp_requant), "golden_interm_Pq", "int8_t") + ret += generate_multihead_C_array(self.split_multihead_m_m(self.Kp_requant), "golden_interm_Pk", "int8_t") + ret += generate_multihead_C_array(self.split_multihead_m_m(self.Vp_requant.transpose((0, 2, 1))), + "golden_interm_Pv", "int8_t") + ret += generate_multihead_C_array(self.split_multihead_m_m(self.A_requant), "golden_interm_attention", "int8_t") + ret += generate_multihead_C_array(self.split_multihead_m_m(self.O_soft_requant), "golden_interm_head_output", + "int8_t") + ret += generate_multihead_C_array(self.split_multihead_m_m(self.Out_soft_requant), "golden_output", "int8_t") + + ret += "\n" + + ret += generate_define("heads", self.H) + ret += generate_define("sequence_length", self.S) + ret += generate_define("embedding_space", self.E) + ret += generate_define("projection_space", self.P) + ret += generate_define("n_tile_sequence_length", self.S // 64) + ret += generate_define("n_tile_embedding_space", self.E // 64) + ret += generate_define("n_tile_projection_space", self.P // 64) + ret += generate_define("tile_size_sequence_length", 64) + ret += generate_define("tile_size_embedding_space", 64) + ret += generate_define("tile_size_projection_space", 64) + + ret += '\n// clang-format on\n' + + return ret + + def export_snitch_cluster(self, path, filename = "mem_snitch_cluster.h"): + if path == './': + path = self.paths["snitch-cluster"] + + print(f"=> Exporting memory file to '{path}'") + + with open(os.path.join(path, filename), "w") as f: + f.write(self.generate_snitch_cluster()) + + def export_mempool(self, path): + # WIESEP: TODO: Refactor code to use new split_matrix function + + if path == './': + path = self.paths["mempool"] + + print(f"=> Exporting memory file to '{path}'") + + requant_eps_mult = np.pad(self.requant_eps_mult[:6, :].T, ((0, 0), (0, 2)), mode = "constant") + requant_right_shift = np.pad(self.requant_right_shift[:6, :].T, ((0, 0), (0, 2)), mode = "constant") + requant_add = np.pad(self.requant_add[:6, :].T, ((0, 0), (0, 2)), mode = "constant") + + with open('%s%s.c' % (path, "mem"), "w+") as f: + f.write(f"""/* This file is automatically generated by '{" ".join(sys.argv)}' +* Do not edit manually, any manual change will be overwritten. +*/ + +// clang-format off +""") + + with open('%s%s.c' % (path, "mem"), "a+") as f: + f.write('#include \n') + f.write(f'\nconst uint8_t Requant_Mult[{self.H}][{requant_eps_mult[0].size}] = ' + '{') + write_matrix_mem([requant_eps_mult], "mem", path) + + with open('%s%s.c' % (path, "mem"), "a+") as f: + f.write('};' + f'\nconst uint8_t Requant_Shift[{self.H}][{requant_right_shift[0].size}] = ' + '{') + write_matrix_mem([requant_right_shift], "mem", path) + + with open('%s%s.c' % (path, "mem"), "a+") as f: + f.write('};' + f'\nconst int8_t Requant_Add[{self.H}][{requant_add[0].size}] = ' + '{') + write_matrix_mem([requant_add], "mem", path) + + with open('%s%s.c' % (path, "mem"), "a+") as f: + f.write('};\n\n') + + for h in range(self.H): + with open('%s%s.c' % (path, "mem"), "a+") as f: + f.write(f'const int8_t inputs_{h}[] __attribute__((aligned(0x1000))) = ' + '{\n') + + w4 = np.concatenate([np.transpose(self.Wo[h])]) + write_matrix_mem(w4, "mem", path) + + w3 = np.concatenate([np.transpose(self.Wv[h])]) + write_matrix_mem(w3, "mem", path) + + w2 = np.concatenate([np.transpose(self.Wk[h])]) + write_matrix_mem(w2, "mem", path) + + q = np.concatenate(np.split(self.Q, self.split, axis = 1)) + write_matrix_mem(q, "mem", path) + + k = np.concatenate(np.split(self.K, self.split, axis = 1)) + write_matrix_mem(k, "mem", path) + + # w1 = np.concatenate([np.transpose(self.Wq[i]) for i in range(self.H)]) + w1 = np.concatenate(np.split(np.concatenate([np.transpose(self.Wq[h])]), self.split, axis = 1)) + write_matrix_mem(w1, "mem", path) + + b4 = np.reshape(np.split(self.Bo_broadcast[h], self.split, axis = 1), (self.S_ITA, self.E_ITA)) + write_matrix_mem(b4, "mem", path) + + b3 = np.reshape( + np.split(np.reshape(np.transpose(self.Bv_broadcast[h]), (self.P_ITA, self.S_ITA)), self.split, + axis = 1), (self.P_ITA, self.S_ITA)) + write_matrix_mem(b3, "mem", path) + + b2 = np.reshape(np.split(self.Bk_broadcast[h], self.split, axis = 1), (self.S_ITA, self.P_ITA)) + write_matrix_mem(b2, "mem", path) + + b1 = np.reshape(np.split(self.Bq_broadcast[h], self.split, axis = 1), (self.S_ITA, self.P_ITA)) + write_matrix_mem(b1, "mem", path) + + with open('%s%s.c' % (path, "mem"), "ab+") as f: + f.seek(-1, os.SEEK_END) + f.truncate() + with open('%s%s.c' % (path, "mem"), "a+") as f: + f.write('\n};\n\n') + + with open('%s%s.c' % (path, "mem"), "a+") as f: + f.write('\n// clang-format on\n') + tot_bytes = np.size(self.Q) + np.size(self.K) + np.size(self.Wq) + np.size(self.Bq_broadcast) \ + + np.size(self.Wk) + np.size(self.Bk_broadcast) + np.size(self.Wv) + np.size(self.Bv_broadcast) + \ + np.size(self.Wo) + np.size(self.Bo_broadcast) + + tot_params = tot_bytes = np.size(self.Q) + np.size(self.K) + np.size(self.Wq) + np.size(self.Bq) \ + + np.size(self.Wk) + np.size(self.Bk) + np.size(self.Wv) + np.size(self.Bv) + \ + np.size(self.Wo) + np.size(self.Bo) + + print(f"{'Number of Bytes' :<{30}}: {tot_bytes} ({tot_bytes/1024} kB)") + print(f"{'Number of Parameters' :<{30}}: {tot_params} ({tot_params/1000} k)") + + def export_numpy(self): + assert np.all(np.equal(self.K, self.V)), "For ITA, keys and values have to be equal" + q = self.Q_in + k = self.K_in + w1 = self.Wq_in + b1 = self.Bq_in + w2 = self.Wk_in + b2 = self.Bk_in + w3 = self.Wv_in + b3 = self.Bv_in + w4 = self.Wo_in + b4 = self.Bo_in + o = self.Out_soft_requant[:, :self.S, :self.E] + o_sum = self.Out_soft_sum_requant[:, :self.S, :self.E] + np.savez('%s%s.npz' % (self.paths["base"], "mha"), + q = q, + k = k, + w1 = w1, + b1 = b1, + w2 = w2, + b2 = b2, + w3 = w3, + b3 = b3, + w4 = w4, + b4 = b4, + o = o, + o_sum = o_sum, + rqs_mult = self.requant_eps_mult, + rqs_shift = self.requant_right_shift, + rqs_add = self.requant_add) + + +def generateTestVectors(path, **kwargs): + s = kwargs['S'] + p = kwargs['P'] + e = kwargs['E'] + f = kwargs['F'] + h = kwargs['H'] + activation = kwargs['activation'] + mask = kwargs['mask'] + index = kwargs['I'] + bias = int(not kwargs['no_bias']) + export_snitch_cluster = kwargs['export_snitch_cluster'] + export_mempool = kwargs['export_mempool'] + + acc1 = Transformer(s, p, e, f, h, bias = bias, path = path, activation = activation, mask = mask) + + if kwargs['verbose']: + print("=> Generating test vectors...") + acc1.print_properties(kwargs['verbose']) + acc1.step1_Qp() + acc1.step2_Kp() + acc1.step3_Vp() + acc1.step4_QK(kwargs['no_partial_softmax'], index=index) + acc1.step5_AV() + acc1.step6_O() + acc1.step7_Osum() + acc1.feedforward_layer() + acc1.test_activations() + + if export_mempool: + acc1.export_mempool(kwargs['mem_path']) + if export_snitch_cluster: + acc1.export_snitch_cluster(kwargs['mem_path']) + acc1.export_hwpe() + acc1.export_numpy() + + def calculate_tensor_stats(tensor, name, tol = 1e-1): + # Calculate the similarly of elements within one row and over all columns + similarity_row = np.mean(np.abs(np.diff(tensor, axis = -2))) + similarity_column = np.mean(np.abs(np.diff(tensor, axis = -1))) + + if (similarity_row < tol) or (similarity_column < tol): + if name is not None: + print(f"WARNING: {name} is constant!") + print(f"{name} Mean-Squared Difference (row) : {similarity_row:5.1f}") + print(f"{name} Mean-Squared Difference (column): {similarity_column:5.1f}") + if kwargs['skip_vector_validation'] is False: + raise ValueError(f"Tensor {name} is constant! This is a bad test vector!") + else: + print(f" WARNING: Tensor {name} is constant! This is a bad test vector!") + else: + print(" WARNING: Tensor is constant!") + print(f" Mean-Squared Difference (row) : {similarity_row:5.1f}") + print(f" Mean-Squared Difference (column): {similarity_column:5.1f}") + + return similarity_row, similarity_column + + def print_tensor_stats(tensor, name = None): + print(f" Min: {np.min(tensor)}") + print(f" Max: {np.max(tensor)}") + + similarity_row, similarity_column = calculate_tensor_stats(tensor, name) + + print(f" Mean-Squared Difference (row) : {similarity_row:5.1f}") + print(f" Mean-Squared Difference (column): {similarity_column:5.1f}") + + # Calculate all tensor statistics + tensors = { + "Qp": acc1.Qp_requant, + "Kp": acc1.Kp_requant, + "Vp": acc1.Vp_requant, + "A": acc1.A_requant, + "A_soft": acc1.A_partial_softmax, + "O_soft": acc1.O_soft_requant, + "Out_soft": acc1.Out_soft_requant, + "Out_soft_sum": acc1.Out_soft_sum_requant + } + + for name, tensor in tensors.items(): + calculate_tensor_stats(tensor, name) + + # Check if softmax is sufficiently precise + maep_softmax = error_MAEP(acc1.A_partial_softmax, acc1.A_real_softmax) + if maep_softmax > 5: + print(f"WARNING: Softmax is not precise enough! MAEP Error to Integer Softmax: {maep_softmax:.2f}%") + + if kwargs['verbose'] > 1: + print("=> Qp") + print_tensor_stats(acc1.Qp_requant) + if kwargs['verbose'] > 4: + print(acc1.Qp) + if kwargs['verbose'] > 3: + print(acc1.Qp_requant) + + print("=> Kp") + print_tensor_stats(acc1.Kp_requant) + if kwargs['verbose'] > 4: + print(acc1.Kp) + if kwargs['verbose'] > 3: + print(acc1.Kp_requant) + + print("=> Vp") + print_tensor_stats(acc1.Vp_requant) + if kwargs['verbose'] > 4: + print(acc1.Vp) + if kwargs['verbose'] > 3: + print(acc1.Vp_requant) + + print("=> A") + print_tensor_stats(acc1.A_requant) + if kwargs['verbose'] > 4: + print(acc1.A) + if kwargs['verbose'] > 3: + print(acc1.A_requant) + + print("=> A (partial softmax)") + print_tensor_stats(acc1.A_partial_softmax) + print(f" MAEP Error to Integer Softmax: {maep_softmax:.2f}%") + if kwargs['verbose'] > 3: + print(acc1.A_partial_softmax) + + print("=> O (soft)") + print_tensor_stats(acc1.O_soft_requant) + if kwargs['verbose'] > 4: + print(acc1.O_soft) + if kwargs['verbose'] > 3: + print(acc1.O_soft_requant) + + print("=> Output (all heads)") + print_tensor_stats(acc1.Out_soft_requant) + if kwargs['verbose'] > 3: + print(acc1.Out_soft_requant) + + print("=> Output (accumulated)") + print_tensor_stats(acc1.Out_soft_sum_requant) + if kwargs['verbose'] > 3: + print(acc1.Out_soft_sum_requant) + + if kwargs['plot_tensors']: + # Plot distribution of all input and output tensors + import matplotlib.pyplot as plt + import seaborn as sns + from matplotlib.gridspec import GridSpec + + def plot_distribution(tensor, title, ax): + sns.histplot(tensor.flatten(), bins = 50, kde = True, ax = ax) + ax.set_title(title) + + # Plot color values of all tensors + def plot_heatmap(tensor, title, ax): + # If tensor is more than 2D, only plot the first 2D + if len(tensor.shape) > 2: + tensor = tensor[0] + + sns.heatmap(tensor, ax = ax, cbar = False) + # Do not show ticks + ax.set_xticks([]) + ax.set_yticks([]) + ax.set_title(title) + + # Create sublots + fig = plt.figure(figsize = (12, 12), layout = 'tight', dpi = 72) + + gs = GridSpec(8, 12, figure = fig) + + ax = fig.add_subplot(gs[0, 0:3]) + plot_distribution(acc1.Q, "Q", ax) + ax = fig.add_subplot(gs[0, 3:6]) + plot_heatmap(acc1.Q, "Q", ax) + ax = fig.add_subplot(gs[0, 6:9]) + plot_distribution(acc1.K, "K", ax) + ax = fig.add_subplot(gs[0, 9:12]) + plot_heatmap(acc1.K, "K", ax) + + ax = fig.add_subplot(gs[1, 0:3]) + plot_distribution(acc1.Wq, "Wq", ax) + ax = fig.add_subplot(gs[1, 3:6]) + plot_distribution(acc1.Wk, "Wk", ax) + ax = fig.add_subplot(gs[1, 6:9]) + plot_distribution(acc1.Wv, "Wv", ax) + ax = fig.add_subplot(gs[1, 9:12]) + plot_distribution(acc1.Wo, "Wo", ax) + + ax = fig.add_subplot(gs[2, 0:3]) + plot_heatmap(acc1.Wq, "Wq", ax) + ax = fig.add_subplot(gs[2, 3:6]) + plot_heatmap(acc1.Wk, "Wk", ax) + ax = fig.add_subplot(gs[2, 6:9]) + plot_heatmap(acc1.Wv, "Wv", ax) + ax = fig.add_subplot(gs[2, 9:12]) + plot_heatmap(acc1.Wo, "Wo", ax) + + ax = fig.add_subplot(gs[3, 0:3]) + plot_distribution(acc1.Bq, "Bq", ax) + ax = fig.add_subplot(gs[3, 3:6]) + plot_distribution(acc1.Bk, "Bk", ax) + ax = fig.add_subplot(gs[3, 6:9]) + plot_distribution(acc1.Bv, "Bv", ax) + ax = fig.add_subplot(gs[3, 9:12]) + plot_distribution(acc1.Bo, "Bo", ax) + + ax = fig.add_subplot(gs[4, 0:3]) + plot_distribution(acc1.Qp_requant, "Qp", ax) + ax = fig.add_subplot(gs[4, 3:6]) + plot_distribution(acc1.Kp_requant, "Kp", ax) + ax = fig.add_subplot(gs[4, 6:9]) + plot_distribution(acc1.Vp_requant, "Vp", ax) + + ax = fig.add_subplot(gs[5, 0:3]) + plot_heatmap(acc1.Qp_requant, "Qp", ax) + ax = fig.add_subplot(gs[5, 3:6]) + plot_heatmap(acc1.Kp_requant, "Kp", ax) + ax = fig.add_subplot(gs[5, 6:9]) + plot_heatmap(acc1.Vp_requant, "Vp", ax) + + ax = fig.add_subplot(gs[6, 0:3]) + plot_distribution(acc1.A_requant, "QK", ax) + ax = fig.add_subplot(gs[6, 3:6]) + plot_distribution(acc1.A_partial_softmax, "A", ax) + ax = fig.add_subplot(gs[6, 6:9]) + plot_distribution(acc1.O_soft_requant, "O", ax) + ax = fig.add_subplot(gs[6, 9:12]) + plot_distribution(acc1.Out_soft_requant, "Out", ax) + + ax = fig.add_subplot(gs[7, 0:3]) + plot_heatmap(acc1.A_requant, "QK", ax) + ax = fig.add_subplot(gs[7, 3:6]) + plot_heatmap(acc1.A_partial_softmax, "A", ax) + ax = fig.add_subplot(gs[7, 6:9]) + plot_heatmap(acc1.O_soft_requant, "O", ax) + ax = fig.add_subplot(gs[7, 9:12]) + plot_heatmap(acc1.Out_soft_requant, "Out", ax) + + plt.show() + + +def util_main(**kwargs): + B = 8 + log2e = np.log2(np.exp(1)) + eps_max = B / (2**B) + + N = 1024 + A = np.random.randint(-128, 127, size = (1, N, N), dtype = np.int8) + input_float = A * eps_max # Assume eps is eps_max + input_int = A + + fast_softmax = fastSoftmax(input_float, False) + fast_integer_softmax = fastSoftmax(input_int, True) / 255 + + fast_partial_softmax = streamingPartialSoftmax(input_float, False) + fast_partial_integer_softmax = streamingPartialSoftmax(input_int, True) / 255 + + softmax = realSoftmax(input_float, False) + integer_softmax = realSoftmax(input_int, True) / 255 + + print(f"=> L2 Softmax Differences:") + print( + f" Softmax - Fast Softmax : {np.linalg.norm((softmax-fast_softmax)[0], 2):.10}" + ) + print( + f" Softmax - Fast Partial Softmax : {np.linalg.norm((softmax-fast_partial_softmax)[0], 2):.10}" + ) + print( + f" Softmax - Fast Integer Softmax : {np.linalg.norm((softmax-fast_integer_softmax)[0], 2):.10}" + ) + print( + f" Softmax - Fast Partial Integer Softmax : {np.linalg.norm((softmax-fast_partial_integer_softmax)[0], 2):.10}" + ) + # print(f" Integer Softmax - Fast Integer Softmax : {np.linalg.norm((integer_softmax-fast_integer_softmax)[0], 2):.3}") + # print(f" Integer Softmax - Fast Partial Integer Softmax : {np.linalg.norm((integer_softmax-fast_partial_integer_softmax)[0], 2):.3}") + # print(f" Softmax - Integer Softmax : {np.linalg.norm((integer_softmax-softmax)[0], 2):.3}") + # print(f" Fast Softmax - Fast Partial Softmax : {np.linalg.norm((fast_softmax-fast_partial_softmax)[0], 2):.3}") + # print(f" Fast Integer Softmax - Fast Partial Integer Softmax : {np.linalg.norm((fast_integer_softmax-fast_partial_integer_softmax)[0], 2):.3}") + + TEST_QUANTLIB = True + if TEST_QUANTLIB: + import torch + + from quantlib.algorithms.pact.pact_ops import (PACTIntegerITAMax, PACTIntegerITAPartialMax, PACTITAMax, + PACTITAPartialMax) + input = torch.tensor(input_float).unsqueeze(0).float() + + ITAMax = PACTITAMax() + ITAPartialMax = PACTITAPartialMax(ita_sequence_length = N) + ITAmax_softmax = ITAMax.forward(input).detach().numpy().squeeze(axis = 0) + ITApartialmax_softmax = ITAPartialMax.forward(input).detach().numpy().squeeze(axis = 0) + + ITAMax.started = torch.tensor(1) + ITAPartialMax.started = torch.tensor(1) + ITAMax.set_eps_in(torch.tensor((eps_max,))) + ITAPartialMax.set_eps_in(torch.tensor((eps_max,))) + ITAMax_integer_softmax = ITAMax.forward(input).detach().numpy().squeeze(axis = 0) + ITAPartialMax_integer_softmax = ITAPartialMax.forward(input).detach().numpy().squeeze(axis = 0) + + input = torch.tensor(input_int).unsqueeze(0).float() + ITAIntegerMax_softmax = PACTIntegerITAMax.MySoftmax.forward( + None, input, torch.tensor(256)).detach().numpy().squeeze(axis = 0) + ITAPartialIntegerMax_softmax = PACTIntegerITAMax.MySoftmax.forward( + None, input, torch.tensor(256)).detach().numpy().squeeze(axis = 0) + + print() + print(f"=> L2 PyTorch Softmax Differences:") + print( + f" Fast Softmax - ITAmax : {np.linalg.norm((fast_softmax-ITAmax_softmax)[0], 2):.3}" + ) + print( + f" Fast Partial Softmax - ITAPartialMax : {np.linalg.norm((fast_partial_softmax-ITApartialmax_softmax)[0], 2):.3}" + ) + print( + f" Fast Integer Softmax - Fake-Quantized ITAmax : {np.linalg.norm((fast_integer_softmax-ITAMax_integer_softmax)[0], 2):.3}" + ) + print( + f" Fast Integer Partial Softmax - Fake-Quantized ITAPartialMax : {np.linalg.norm((fast_partial_integer_softmax-ITAPartialMax_integer_softmax)[0], 2):.3}" + ) + print( + f" Fast Integer Softmax - True-Quantized ITAmax : {np.linalg.norm((fast_integer_softmax-ITAIntegerMax_softmax/255)[0], 2):.3}" + ) + print( + f" Fast Integer Partial Softmax - True-Quantized ITAPartialMax : {np.linalg.norm((fast_partial_integer_softmax-ITAPartialIntegerMax_softmax/255)[0], 2):.3}" + ) From 343b6a999d973eb5a76fd75d99b659d9af91b948 Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Fri, 13 Dec 2024 19:07:04 +0100 Subject: [PATCH 50/60] Added upper and lower strided masks --- Makefile | 4 +++ PyITA/ITA.py | 57 +++++++++++++++++++++++++++++++------------ src/ita_masking.sv | 61 ++++++++++++++++++++++++++++++++++++++++++---- src/ita_package.sv | 9 ++++++- src/ita_softmax.sv | 22 +++++++++++++++++ testGenerator.py | 9 ++++++- 6 files changed, 140 insertions(+), 22 deletions(-) diff --git a/Makefile b/Makefile index 0158e78..3a5a0d7 100644 --- a/Makefile +++ b/Makefile @@ -47,6 +47,10 @@ else ifeq ($(mask), upper_strided) mask_int = 4 else ifeq ($(mask), lower_strided) mask_int = 5 +else ifeq ($(mask), sliding_window_attention) + mask_int = 6 +else ifeq ($(mask), strided_sliding_window_attention) + mask_int = 7 else mask_int = 0 endif diff --git a/PyITA/ITA.py b/PyITA/ITA.py index 0b1dac3..d53e7cd 100644 --- a/PyITA/ITA.py +++ b/PyITA/ITA.py @@ -614,32 +614,59 @@ def apply_mask(self, index): elif (self.mask == 'upper_strided'): self.Mask = np.full((self.H, self.S, self.S), fill_value=True, dtype='bool') if (0 < index and index < self.S): - for h in range(self.Mask.shape[0]): - for i in range(self.Mask.shape[1]): - for j in range(i, self.Mask.shape[2], index): - self.Mask[h][i][j] = False + if (index % 2 == 0): + for h in range(self.Mask.shape[0]): + for i in range(self.Mask.shape[1]): + for j in range(i, self.Mask.shape[2], index): + self.Mask[h][i][j] = False + else: + raise ValueError(f"Index has to be a power of two for {self.mask} mask") else: raise ValueError(f"Index is out of bounds for {self.mask} mask") elif (self.mask == 'lower_strided'): self.Mask = np.full((self.H, self.S, self.S), fill_value=True, dtype='bool') if (0 < index and index < self.S): - for h in range(self.Mask.shape[0]): - for i in range(self.Mask.shape[1]): - for j in range(i, self.Mask.shape[2], index): - self.Mask[h][j][i] = False + if (index % 2 == 0): + for h in range(self.Mask.shape[0]): + for i in range(self.Mask.shape[1]): + for j in range(i, self.Mask.shape[2], index): + self.Mask[h][j][i] = False + else: + raise ValueError(f"Index has to be a power of two for {self.mask} mask") else: raise ValueError(f"Index is out of bounds for {self.mask} mask") - elif (self.mask == 'sliding_window_attention'): + elif (self.mask == 'sliding_window'): self.Mask = np.full((self.H, self.S, self.S), fill_value=True, dtype='bool') if (0 < index and index < self.S): - for h in range(self.Mask.shape[0]): - for i in range(self.Mask.shape[1]): - for j in range(i, (index + i)): - self.Mask[h][i][j] = False - self.Mask[h][j][i] = False + if (index % 2 == 0): + for h in range(self.Mask.shape[0]): + for i in range(self.Mask.shape[1]): + for j in range(i, (index + i)): + self.Mask[h][i][j] = False + self.Mask[h][j][i] = False + else: + raise ValueError(f"Index has to be a power of two for {self.mask} mask") + else: + raise ValueError(f"Index is out of bounds for {self.mask} mask") + elif (self.mask == 'strided_sliding_window'): + self.Mask = np.full((self.H, self.S, self.S), fill_value=True, dtype='bool') + if (0 < index and index < self.S): + if (index % 2 == 0): + for h in range(self.Mask.shape[0]): + for i in range(self.Mask.shape[1]): + for j in range(i, self.Mask.shape[2]): + if (j > (index + i)): + if (j % index == 0): + self.Mask[h][i][j] = False + self.Mask[h][j][i] = False + else: + self.Mask[h][i][j] = False + self.Mask[h][j][i] = False + else: + raise ValueError(f"Index has to be a power of two for {self.mask} mask") else: raise ValueError(f"Index is out of bounds for {self.mask} mask") - elif(self.mask == 'none'): + elif (self.mask == 'none'): pass else: raise ValueError("Mask not supported") diff --git a/src/ita_masking.sv b/src/ita_masking.sv index 7273309..f65cc5d 100644 --- a/src/ita_masking.sv +++ b/src/ita_masking.sv @@ -30,6 +30,9 @@ module ita_masking assign mask_o = mask_q; always_comb begin + + + case (ctrl_i.mask_type) None: begin mask_col_offset_d = '0; @@ -41,9 +44,9 @@ module ita_masking UpperTriangular: begin mask_col_offset_d = (step_i == QK || step_i == AV) ? mask_col_offset_q : ((ctrl_i.mask_start_index) & (N-1)); mask_tile_x_pos_d = (step_i == QK || step_i == AV) ? mask_tile_x_pos_q : ((ctrl_i.mask_start_index) / M); - mask_tile_y_pos_d = mask_tile_y_pos_q; + mask_tile_y_pos_d = mask_tile_y_pos_q; mask_pos_d = (step_i == QK || step_i == AV) ? mask_pos_q : ((((ctrl_i.mask_start_index)/N)*M) & ((M*M/N)-1)); - mask_d = '0; + mask_d = '0; if (step_i == QK) begin if (mask_tile_x_pos_q == tile_x_i && mask_tile_y_pos_q == tile_y_i && last_inner_tile_i == 1'b1) begin @@ -92,11 +95,11 @@ module ita_masking end end LowerTriangular: begin - mask_col_offset_d = '0; - mask_tile_x_pos_d = '0; + mask_col_offset_d = '0; + mask_tile_x_pos_d = mask_tile_x_pos_q; mask_tile_y_pos_d = (step_i == QK || step_i == AV) ? mask_tile_y_pos_q : ((ctrl_i.mask_start_index) / M); mask_pos_d = (step_i == QK || step_i == AV) ? mask_pos_q : (ctrl_i.mask_start_index & (M-1)); - mask_d = '0; + mask_d = '0; if (step_i == QK) begin if (mask_tile_x_pos_q == tile_x_i && mask_tile_y_pos_q == tile_y_i && last_inner_tile_i == 1'b1) begin @@ -166,6 +169,54 @@ module ita_masking end end end + UpperStrided: begin + mask_col_offset_d = '0; + mask_tile_x_pos_d = '0; + mask_tile_y_pos_d = '0; + mask_pos_d = '0; + mask_d = '0; + + if (step_i == QK) begin + if (last_inner_tile_i == 1'b1) begin + for (int i = 0; i < N; i++) begin + //Marcel Kant: Does only work if ctrl_i.mask_start_index is a power of two + if ((((((count_i / M) * N) + i + (tile_x_i * M)) - ((count_i & (M-1)) + (tile_y_i * M))) & (ctrl_i.mask_start_index-1)) == 0 && + ((((count_i / M) * N) + i + (tile_x_i * M)) >= ((count_i & (M-1)) + (tile_y_i * M)))) begin + mask_d[i] = 1'b0; + end else begin + mask_d[i] = 1'b1; + end + end + end + end + end + LowerStrided: begin + mask_col_offset_d = '0; + mask_tile_x_pos_d = '0; + mask_tile_y_pos_d = '0; + mask_pos_d = '0; + mask_d = '0; + + if (step_i == QK) begin + if (last_inner_tile_i == 1'b1) begin + for (int i = 0; i < N; i++) begin + //Marcel Kant: Does only work if ctrl_i.mask_start_index is a power of two + if ((((((count_i / M) * N) + i + (tile_x_i * M)) - ((count_i & (M-1)) + (tile_y_i * M))) & (ctrl_i.mask_start_index-1)) == 0 && + ((((count_i / M) * N) + i + (tile_x_i * M)) <= ((count_i & (M-1)) + (tile_y_i * M)))) begin + mask_d[i] = 1'b0; + end else begin + mask_d[i] = 1'b1; + end + end + end + end + end + SlidingWindow: begin + + end + StridedSlidingWindow: begin + + end endcase end diff --git a/src/ita_package.sv b/src/ita_package.sv index 184e0f9..fee10a8 100644 --- a/src/ita_package.sv +++ b/src/ita_package.sv @@ -41,7 +41,14 @@ package ita_package; typedef logic signed [GELU_OUT_WIDTH-1:0] gelu_out_t; // Masking - typedef enum {None=0, UpperTriangular=1, LowerTriangular=2, Strided=3, UpperStrided=4, LowerStrided=5} mask_e; + typedef enum {None=0, + UpperTriangular=1, + LowerTriangular=2, + Strided=3, + UpperStrided=4, + LowerStrided=5, + SlidingWindow=6, + StridedSlidingWindow=7} mask_e; typedef logic [WO-WI*2-2:0] mask_index_t; // IO diff --git a/src/ita_softmax.sv b/src/ita_softmax.sv index 70bdfe8..3e38f47 100644 --- a/src/ita_softmax.sv +++ b/src/ita_softmax.sv @@ -325,6 +325,28 @@ module ita_softmax disable_col[i] = 1'b1; end end + UpperStrided: begin + if ((((i + (mask_tile_x_q * M)) - ((count_soft_mask_q & (M-1)) + (mask_tile_y_q * M))) & (ctrl_i.mask_start_index-1)) == 0 && + ((i + (mask_tile_x_q * M)) >= ((count_soft_mask_q & (M-1)) + (mask_tile_y_q * M)))) begin + disable_col[i] = 1'b0; + end else begin + disable_col[i] = 1'b1; + end + end + LowerStrided: begin + if ((((i + (mask_tile_x_q * M)) - ((count_soft_mask_q & (M-1)) + (mask_tile_y_q * M))) & (ctrl_i.mask_start_index-1)) == 0 && + ((i + (mask_tile_x_q * M)) <= ((count_soft_mask_q & (M-1)) + (mask_tile_y_q * M)))) begin + disable_col[i] = 1'b0; + end else begin + disable_col[i] = 1'b1; + end + end + SlidingWindow: begin + + end + StridedSlidingWindow: begin + + end endcase end diff --git a/testGenerator.py b/testGenerator.py index 97465d9..9079056 100644 --- a/testGenerator.py +++ b/testGenerator.py @@ -108,7 +108,14 @@ class ArgumentDefaultMetavarTypeFormatter(argparse.ArgumentDefaultsHelpFormatter default = 'none', type = str, help = 'Attention-Mask', - choices = ['none', 'upper_triangular', 'lower_triangular', 'strided', 'upper_strided', 'lower_strided']) + choices = ['none', + 'upper_triangular', + 'lower_triangular', + 'strided', + 'upper_strided', + 'lower_strided', + 'sliding_window', + 'strided_sliding_window']) self.group1.add_argument('-I', default = 1, type = int, help = 'Masking starting index') self.group1.add_argument('--no-partial-softmax', action = 'store_true', From b18f1d853096db5145dea68f17c75dd6722c626d Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Mon, 16 Dec 2024 08:15:54 +0100 Subject: [PATCH 51/60] Added the strided sliding window mask but not working yet --- Makefile | 4 +- PyITA/ITA.py | 10 +- modelsim/sim_ita_tb_wave_important.tcl | 665 ++++--------------------- src/ita_masking.sv | 61 ++- src/ita_softmax.sv | 37 +- src/tb/ita_tb.sv | 3 - testGenerator.py | 4 +- 7 files changed, 195 insertions(+), 589 deletions(-) diff --git a/Makefile b/Makefile index 3a5a0d7..5dac0d1 100644 --- a/Makefile +++ b/Makefile @@ -47,9 +47,9 @@ else ifeq ($(mask), upper_strided) mask_int = 4 else ifeq ($(mask), lower_strided) mask_int = 5 -else ifeq ($(mask), sliding_window_attention) +else ifeq ($(mask), sliding_window) mask_int = 6 -else ifeq ($(mask), strided_sliding_window_attention) +else ifeq ($(mask), strided_sliding_window) mask_int = 7 else mask_int = 0 diff --git a/PyITA/ITA.py b/PyITA/ITA.py index d53e7cd..048bca9 100644 --- a/PyITA/ITA.py +++ b/PyITA/ITA.py @@ -641,7 +641,7 @@ def apply_mask(self, index): if (index % 2 == 0): for h in range(self.Mask.shape[0]): for i in range(self.Mask.shape[1]): - for j in range(i, (index + i)): + for j in range(i, min((index + i), self.Mask.shape[2])): self.Mask[h][i][j] = False self.Mask[h][j][i] = False else: @@ -655,11 +655,7 @@ def apply_mask(self, index): for h in range(self.Mask.shape[0]): for i in range(self.Mask.shape[1]): for j in range(i, self.Mask.shape[2]): - if (j > (index + i)): - if (j % index == 0): - self.Mask[h][i][j] = False - self.Mask[h][j][i] = False - else: + if (j < (index + i) or ((j-i) % index == 0)): self.Mask[h][i][j] = False self.Mask[h][j][i] = False else: @@ -667,7 +663,7 @@ def apply_mask(self, index): else: raise ValueError(f"Index is out of bounds for {self.mask} mask") elif (self.mask == 'none'): - pass + return else: raise ValueError("Mask not supported") diff --git a/modelsim/sim_ita_tb_wave_important.tcl b/modelsim/sim_ita_tb_wave_important.tcl index 196e80f..0cff06e 100644 --- a/modelsim/sim_ita_tb_wave_important.tcl +++ b/modelsim/sim_ita_tb_wave_important.tcl @@ -18,10 +18,6 @@ add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_ add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/disable_row -add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_d -add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_q -add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_d -add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_q add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/first_outer_dim add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_inp2_mux/clk_i add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/last_inner_tile_q6 @@ -34,42 +30,26 @@ add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q5 add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q6 add wave -noupdate -expand -group {Masking Signals} -expand -group {In Softmax Module} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d add wave -noupdate -expand -group {Masking Signals} -expand -group {In Softmax Module} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 -add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask -add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q1 -add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q2 -add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q3 -add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q4 -add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q5 -add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q6 -add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/i_softmax_top/i_softmax/mask_i -add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_softmax_top/i_softmax/max_o -add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_softmax_top/i_softmax/max_i -add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_requantizer/requant_oup_o -add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q -add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_softmax_top/i_softmax/prev_max_o -add wave -noupdate -expand -group {Masking Signals} -radix decimal -childformat {{{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[15]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[14]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[13]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[12]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[11]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[10]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[9]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[8]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[7]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[6]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[5]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[4]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[3]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[2]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[1]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[0]} {-height 16 -radix decimal}} /ita_tb/dut/i_softmax_top/i_softmax/shift_diff -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_controller/step_q -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q -add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/count_q -add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/i_controller/mask_d -add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_pos_d -add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_pos_q -add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/mask_col_offset_q -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_d -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_x_pos_q -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_d -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/mask_tile_y_pos_q -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/tile_x_d -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/tile_x_q -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/tile_y_d -add wave -noupdate -radix unsigned /ita_tb/dut/i_controller/tile_y_q -add wave -noupdate /ita_tb/dut/calc_en_q5 -add wave -noupdate /ita_tb/dut/calc_en_q6 -add wave -noupdate /ita_tb/dut/calc_en_q7 -add wave -noupdate /ita_tb/dut/calc_en_q8 -add wave -noupdate /ita_tb/dut/calc_en_q9 -add wave -noupdate /ita_tb/dut/calc_en_q10 +add wave -noupdate -expand -group {Masking Signals} -expand -group {Masking Module} /ita_tb/dut/i_controller/i_masking/clk_i +add wave -noupdate -expand -group {Masking Signals} -expand -group {Masking Module} /ita_tb/dut/i_controller/i_masking/rst_ni +add wave -noupdate -expand -group {Masking Signals} -expand -group {Masking Module} /ita_tb/dut/i_controller/i_masking/ctrl_i +add wave -noupdate -expand -group {Masking Signals} -expand -group {Masking Module} /ita_tb/dut/i_controller/i_masking/step_i +add wave -noupdate -expand -group {Masking Signals} -expand -group {Masking Module} /ita_tb/dut/i_controller/i_masking/calc_en_i +add wave -noupdate -expand -group {Masking Signals} -expand -group {Masking Module} /ita_tb/dut/i_controller/i_masking/last_inner_tile_i +add wave -noupdate -expand -group {Masking Signals} -expand -group {Masking Module} /ita_tb/dut/i_controller/i_masking/count_i +add wave -noupdate -expand -group {Masking Signals} -expand -group {Masking Module} /ita_tb/dut/i_controller/i_masking/tile_x_i +add wave -noupdate -expand -group {Masking Signals} -expand -group {Masking Module} /ita_tb/dut/i_controller/i_masking/tile_y_i +add wave -noupdate -expand -group {Masking Signals} -expand -group {Masking Module} /ita_tb/dut/i_controller/i_masking/mask_o +add wave -noupdate -expand -group {Masking Signals} -expand -group {Masking Module} /ita_tb/dut/i_controller/i_masking/mask_col_offset_d +add wave -noupdate -expand -group {Masking Signals} -expand -group {Masking Module} /ita_tb/dut/i_controller/i_masking/mask_col_offset_q +add wave -noupdate -expand -group {Masking Signals} -expand -group {Masking Module} /ita_tb/dut/i_controller/i_masking/mask_tile_x_pos_d +add wave -noupdate -expand -group {Masking Signals} -expand -group {Masking Module} /ita_tb/dut/i_controller/i_masking/mask_tile_x_pos_q +add wave -noupdate -expand -group {Masking Signals} -expand -group {Masking Module} /ita_tb/dut/i_controller/i_masking/mask_tile_y_pos_d +add wave -noupdate -expand -group {Masking Signals} -expand -group {Masking Module} /ita_tb/dut/i_controller/i_masking/mask_tile_y_pos_q +add wave -noupdate -expand -group {Masking Signals} -expand -group {Masking Module} /ita_tb/dut/i_controller/i_masking/mask_pos_d +add wave -noupdate -expand -group {Masking Signals} -expand -group {Masking Module} /ita_tb/dut/i_controller/i_masking/mask_pos_q +add wave -noupdate -expand -group {Masking Signals} -expand -group {Masking Module} /ita_tb/dut/i_controller/i_masking/mask_d +add wave -noupdate -expand -group {Masking Signals} -expand -group {Masking Module} /ita_tb/dut/i_controller/i_masking/mask_q add wave -noupdate -group Requant /ita_tb/dut/i_controller/requant_add_i add wave -noupdate -group Requant /ita_tb/dut/i_controller/requant_add_o add wave -noupdate -group Bias /ita_tb/dut/inp_bias @@ -100,9 +80,9 @@ add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_q add wave -noupdate -radix binary /ita_tb/dut/i_softmax_top/i_softmax/disable_col add wave -noupdate /ita_tb/dut/i_activation/data_q3 add wave -noupdate -radix decimal /ita_tb/dut/inp_i -add wave -noupdate -expand -group {All in one Phase} -radix decimal -childformat {{{/ita_tb/dut/inp[63]} -radix decimal} {{/ita_tb/dut/inp[62]} -radix decimal} {{/ita_tb/dut/inp[61]} -radix decimal} {{/ita_tb/dut/inp[60]} -radix decimal} {{/ita_tb/dut/inp[59]} -radix decimal} {{/ita_tb/dut/inp[58]} -radix decimal} {{/ita_tb/dut/inp[57]} -radix decimal} {{/ita_tb/dut/inp[56]} -radix decimal} {{/ita_tb/dut/inp[55]} -radix decimal} {{/ita_tb/dut/inp[54]} -radix decimal} {{/ita_tb/dut/inp[53]} -radix decimal} {{/ita_tb/dut/inp[52]} -radix decimal} {{/ita_tb/dut/inp[51]} -radix decimal} {{/ita_tb/dut/inp[50]} -radix decimal} {{/ita_tb/dut/inp[49]} -radix decimal} {{/ita_tb/dut/inp[48]} -radix decimal} {{/ita_tb/dut/inp[47]} -radix decimal} {{/ita_tb/dut/inp[46]} -radix decimal} {{/ita_tb/dut/inp[45]} -radix decimal} {{/ita_tb/dut/inp[44]} -radix decimal} {{/ita_tb/dut/inp[43]} -radix decimal} {{/ita_tb/dut/inp[42]} -radix decimal} {{/ita_tb/dut/inp[41]} -radix decimal} {{/ita_tb/dut/inp[40]} -radix decimal} {{/ita_tb/dut/inp[39]} -radix decimal} {{/ita_tb/dut/inp[38]} -radix decimal} {{/ita_tb/dut/inp[37]} -radix decimal} {{/ita_tb/dut/inp[36]} -radix decimal} {{/ita_tb/dut/inp[35]} -radix decimal} {{/ita_tb/dut/inp[34]} -radix decimal} {{/ita_tb/dut/inp[33]} -radix decimal} {{/ita_tb/dut/inp[32]} -radix decimal} {{/ita_tb/dut/inp[31]} -radix decimal} {{/ita_tb/dut/inp[30]} -radix decimal} {{/ita_tb/dut/inp[29]} -radix decimal} {{/ita_tb/dut/inp[28]} -radix decimal} {{/ita_tb/dut/inp[27]} -radix decimal} {{/ita_tb/dut/inp[26]} -radix decimal} {{/ita_tb/dut/inp[25]} -radix decimal} {{/ita_tb/dut/inp[24]} -radix decimal} {{/ita_tb/dut/inp[23]} -radix decimal} {{/ita_tb/dut/inp[22]} -radix decimal} {{/ita_tb/dut/inp[21]} -radix decimal} {{/ita_tb/dut/inp[20]} -radix decimal} {{/ita_tb/dut/inp[19]} -radix decimal} {{/ita_tb/dut/inp[18]} -radix decimal} {{/ita_tb/dut/inp[17]} -radix decimal} {{/ita_tb/dut/inp[16]} -radix decimal} {{/ita_tb/dut/inp[15]} -radix decimal} {{/ita_tb/dut/inp[14]} -radix decimal} {{/ita_tb/dut/inp[13]} -radix decimal} {{/ita_tb/dut/inp[12]} -radix decimal} {{/ita_tb/dut/inp[11]} -radix decimal} {{/ita_tb/dut/inp[10]} -radix decimal} {{/ita_tb/dut/inp[9]} -radix decimal} {{/ita_tb/dut/inp[8]} -radix decimal} {{/ita_tb/dut/inp[7]} -radix decimal} {{/ita_tb/dut/inp[6]} -radix decimal} {{/ita_tb/dut/inp[5]} -radix decimal} {{/ita_tb/dut/inp[4]} -radix decimal} {{/ita_tb/dut/inp[3]} -radix decimal} {{/ita_tb/dut/inp[2]} -radix decimal} {{/ita_tb/dut/inp[1]} -radix decimal} {{/ita_tb/dut/inp[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/inp[63]} {-height 16 -radix decimal} {/ita_tb/dut/inp[62]} {-height 16 -radix decimal} {/ita_tb/dut/inp[61]} {-height 16 -radix decimal} {/ita_tb/dut/inp[60]} {-height 16 -radix decimal} {/ita_tb/dut/inp[59]} {-height 16 -radix decimal} {/ita_tb/dut/inp[58]} {-height 16 -radix decimal} {/ita_tb/dut/inp[57]} {-height 16 -radix decimal} {/ita_tb/dut/inp[56]} {-height 16 -radix decimal} {/ita_tb/dut/inp[55]} {-height 16 -radix decimal} {/ita_tb/dut/inp[54]} {-height 16 -radix decimal} {/ita_tb/dut/inp[53]} {-height 16 -radix decimal} {/ita_tb/dut/inp[52]} {-height 16 -radix decimal} {/ita_tb/dut/inp[51]} {-height 16 -radix decimal} {/ita_tb/dut/inp[50]} {-height 16 -radix decimal} {/ita_tb/dut/inp[49]} {-height 16 -radix decimal} {/ita_tb/dut/inp[48]} {-height 16 -radix decimal} {/ita_tb/dut/inp[47]} {-height 16 -radix decimal} {/ita_tb/dut/inp[46]} {-height 16 -radix decimal} {/ita_tb/dut/inp[45]} {-height 16 -radix decimal} {/ita_tb/dut/inp[44]} {-height 16 -radix decimal} {/ita_tb/dut/inp[43]} {-height 16 -radix decimal} {/ita_tb/dut/inp[42]} {-height 16 -radix decimal} {/ita_tb/dut/inp[41]} {-height 16 -radix decimal} {/ita_tb/dut/inp[40]} {-height 16 -radix decimal} {/ita_tb/dut/inp[39]} {-height 16 -radix decimal} {/ita_tb/dut/inp[38]} {-height 16 -radix decimal} {/ita_tb/dut/inp[37]} {-height 16 -radix decimal} {/ita_tb/dut/inp[36]} {-height 16 -radix decimal} {/ita_tb/dut/inp[35]} {-height 16 -radix decimal} {/ita_tb/dut/inp[34]} {-height 16 -radix decimal} {/ita_tb/dut/inp[33]} {-height 16 -radix decimal} {/ita_tb/dut/inp[32]} {-height 16 -radix decimal} {/ita_tb/dut/inp[31]} {-height 16 -radix decimal} {/ita_tb/dut/inp[30]} {-height 16 -radix decimal} {/ita_tb/dut/inp[29]} {-height 16 -radix decimal} {/ita_tb/dut/inp[28]} {-height 16 -radix decimal} {/ita_tb/dut/inp[27]} {-height 16 -radix decimal} {/ita_tb/dut/inp[26]} {-height 16 -radix decimal} {/ita_tb/dut/inp[25]} {-height 16 -radix decimal} {/ita_tb/dut/inp[24]} {-height 16 -radix decimal} {/ita_tb/dut/inp[23]} {-height 16 -radix decimal} {/ita_tb/dut/inp[22]} {-height 16 -radix decimal} {/ita_tb/dut/inp[21]} {-height 16 -radix decimal} {/ita_tb/dut/inp[20]} {-height 16 -radix decimal} {/ita_tb/dut/inp[19]} {-height 16 -radix decimal} {/ita_tb/dut/inp[18]} {-height 16 -radix decimal} {/ita_tb/dut/inp[17]} {-height 16 -radix decimal} {/ita_tb/dut/inp[16]} {-height 16 -radix decimal} {/ita_tb/dut/inp[15]} {-height 16 -radix decimal} {/ita_tb/dut/inp[14]} {-height 16 -radix decimal} {/ita_tb/dut/inp[13]} {-height 16 -radix decimal} {/ita_tb/dut/inp[12]} {-height 16 -radix decimal} {/ita_tb/dut/inp[11]} {-height 16 -radix decimal} {/ita_tb/dut/inp[10]} {-height 16 -radix decimal} {/ita_tb/dut/inp[9]} {-height 16 -radix decimal} {/ita_tb/dut/inp[8]} {-height 16 -radix decimal} {/ita_tb/dut/inp[7]} {-height 16 -radix decimal} {/ita_tb/dut/inp[6]} {-height 16 -radix decimal} {/ita_tb/dut/inp[5]} {-height 16 -radix decimal} {/ita_tb/dut/inp[4]} {-height 16 -radix decimal} {/ita_tb/dut/inp[3]} {-height 16 -radix decimal} {/ita_tb/dut/inp[2]} {-height 16 -radix decimal} {/ita_tb/dut/inp[1]} {-height 16 -radix decimal} {/ita_tb/dut/inp[0]} {-height 16 -radix decimal}} /ita_tb/dut/inp -add wave -noupdate -expand -group {All in one Phase} -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o -add wave -noupdate -expand -group {All in one Phase} -radix decimal /ita_tb/dut/inp1 +add wave -noupdate -group {All in one Phase} -radix decimal -childformat {{{/ita_tb/dut/inp[63]} -radix decimal} {{/ita_tb/dut/inp[62]} -radix decimal} {{/ita_tb/dut/inp[61]} -radix decimal} {{/ita_tb/dut/inp[60]} -radix decimal} {{/ita_tb/dut/inp[59]} -radix decimal} {{/ita_tb/dut/inp[58]} -radix decimal} {{/ita_tb/dut/inp[57]} -radix decimal} {{/ita_tb/dut/inp[56]} -radix decimal} {{/ita_tb/dut/inp[55]} -radix decimal} {{/ita_tb/dut/inp[54]} -radix decimal} {{/ita_tb/dut/inp[53]} -radix decimal} {{/ita_tb/dut/inp[52]} -radix decimal} {{/ita_tb/dut/inp[51]} -radix decimal} {{/ita_tb/dut/inp[50]} -radix decimal} {{/ita_tb/dut/inp[49]} -radix decimal} {{/ita_tb/dut/inp[48]} -radix decimal} {{/ita_tb/dut/inp[47]} -radix decimal} {{/ita_tb/dut/inp[46]} -radix decimal} {{/ita_tb/dut/inp[45]} -radix decimal} {{/ita_tb/dut/inp[44]} -radix decimal} {{/ita_tb/dut/inp[43]} -radix decimal} {{/ita_tb/dut/inp[42]} -radix decimal} {{/ita_tb/dut/inp[41]} -radix decimal} {{/ita_tb/dut/inp[40]} -radix decimal} {{/ita_tb/dut/inp[39]} -radix decimal} {{/ita_tb/dut/inp[38]} -radix decimal} {{/ita_tb/dut/inp[37]} -radix decimal} {{/ita_tb/dut/inp[36]} -radix decimal} {{/ita_tb/dut/inp[35]} -radix decimal} {{/ita_tb/dut/inp[34]} -radix decimal} {{/ita_tb/dut/inp[33]} -radix decimal} {{/ita_tb/dut/inp[32]} -radix decimal} {{/ita_tb/dut/inp[31]} -radix decimal} {{/ita_tb/dut/inp[30]} -radix decimal} {{/ita_tb/dut/inp[29]} -radix decimal} {{/ita_tb/dut/inp[28]} -radix decimal} {{/ita_tb/dut/inp[27]} -radix decimal} {{/ita_tb/dut/inp[26]} -radix decimal} {{/ita_tb/dut/inp[25]} -radix decimal} {{/ita_tb/dut/inp[24]} -radix decimal} {{/ita_tb/dut/inp[23]} -radix decimal} {{/ita_tb/dut/inp[22]} -radix decimal} {{/ita_tb/dut/inp[21]} -radix decimal} {{/ita_tb/dut/inp[20]} -radix decimal} {{/ita_tb/dut/inp[19]} -radix decimal} {{/ita_tb/dut/inp[18]} -radix decimal} {{/ita_tb/dut/inp[17]} -radix decimal} {{/ita_tb/dut/inp[16]} -radix decimal} {{/ita_tb/dut/inp[15]} -radix decimal} {{/ita_tb/dut/inp[14]} -radix decimal} {{/ita_tb/dut/inp[13]} -radix decimal} {{/ita_tb/dut/inp[12]} -radix decimal} {{/ita_tb/dut/inp[11]} -radix decimal} {{/ita_tb/dut/inp[10]} -radix decimal} {{/ita_tb/dut/inp[9]} -radix decimal} {{/ita_tb/dut/inp[8]} -radix decimal} {{/ita_tb/dut/inp[7]} -radix decimal} {{/ita_tb/dut/inp[6]} -radix decimal} {{/ita_tb/dut/inp[5]} -radix decimal} {{/ita_tb/dut/inp[4]} -radix decimal} {{/ita_tb/dut/inp[3]} -radix decimal} {{/ita_tb/dut/inp[2]} -radix decimal} {{/ita_tb/dut/inp[1]} -radix decimal} {{/ita_tb/dut/inp[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/inp[63]} {-height 16 -radix decimal} {/ita_tb/dut/inp[62]} {-height 16 -radix decimal} {/ita_tb/dut/inp[61]} {-height 16 -radix decimal} {/ita_tb/dut/inp[60]} {-height 16 -radix decimal} {/ita_tb/dut/inp[59]} {-height 16 -radix decimal} {/ita_tb/dut/inp[58]} {-height 16 -radix decimal} {/ita_tb/dut/inp[57]} {-height 16 -radix decimal} {/ita_tb/dut/inp[56]} {-height 16 -radix decimal} {/ita_tb/dut/inp[55]} {-height 16 -radix decimal} {/ita_tb/dut/inp[54]} {-height 16 -radix decimal} {/ita_tb/dut/inp[53]} {-height 16 -radix decimal} {/ita_tb/dut/inp[52]} {-height 16 -radix decimal} {/ita_tb/dut/inp[51]} {-height 16 -radix decimal} {/ita_tb/dut/inp[50]} {-height 16 -radix decimal} {/ita_tb/dut/inp[49]} {-height 16 -radix decimal} {/ita_tb/dut/inp[48]} {-height 16 -radix decimal} {/ita_tb/dut/inp[47]} {-height 16 -radix decimal} {/ita_tb/dut/inp[46]} {-height 16 -radix decimal} {/ita_tb/dut/inp[45]} {-height 16 -radix decimal} {/ita_tb/dut/inp[44]} {-height 16 -radix decimal} {/ita_tb/dut/inp[43]} {-height 16 -radix decimal} {/ita_tb/dut/inp[42]} {-height 16 -radix decimal} {/ita_tb/dut/inp[41]} {-height 16 -radix decimal} {/ita_tb/dut/inp[40]} {-height 16 -radix decimal} {/ita_tb/dut/inp[39]} {-height 16 -radix decimal} {/ita_tb/dut/inp[38]} {-height 16 -radix decimal} {/ita_tb/dut/inp[37]} {-height 16 -radix decimal} {/ita_tb/dut/inp[36]} {-height 16 -radix decimal} {/ita_tb/dut/inp[35]} {-height 16 -radix decimal} {/ita_tb/dut/inp[34]} {-height 16 -radix decimal} {/ita_tb/dut/inp[33]} {-height 16 -radix decimal} {/ita_tb/dut/inp[32]} {-height 16 -radix decimal} {/ita_tb/dut/inp[31]} {-height 16 -radix decimal} {/ita_tb/dut/inp[30]} {-height 16 -radix decimal} {/ita_tb/dut/inp[29]} {-height 16 -radix decimal} {/ita_tb/dut/inp[28]} {-height 16 -radix decimal} {/ita_tb/dut/inp[27]} {-height 16 -radix decimal} {/ita_tb/dut/inp[26]} {-height 16 -radix decimal} {/ita_tb/dut/inp[25]} {-height 16 -radix decimal} {/ita_tb/dut/inp[24]} {-height 16 -radix decimal} {/ita_tb/dut/inp[23]} {-height 16 -radix decimal} {/ita_tb/dut/inp[22]} {-height 16 -radix decimal} {/ita_tb/dut/inp[21]} {-height 16 -radix decimal} {/ita_tb/dut/inp[20]} {-height 16 -radix decimal} {/ita_tb/dut/inp[19]} {-height 16 -radix decimal} {/ita_tb/dut/inp[18]} {-height 16 -radix decimal} {/ita_tb/dut/inp[17]} {-height 16 -radix decimal} {/ita_tb/dut/inp[16]} {-height 16 -radix decimal} {/ita_tb/dut/inp[15]} {-height 16 -radix decimal} {/ita_tb/dut/inp[14]} {-height 16 -radix decimal} {/ita_tb/dut/inp[13]} {-height 16 -radix decimal} {/ita_tb/dut/inp[12]} {-height 16 -radix decimal} {/ita_tb/dut/inp[11]} {-height 16 -radix decimal} {/ita_tb/dut/inp[10]} {-height 16 -radix decimal} {/ita_tb/dut/inp[9]} {-height 16 -radix decimal} {/ita_tb/dut/inp[8]} {-height 16 -radix decimal} {/ita_tb/dut/inp[7]} {-height 16 -radix decimal} {/ita_tb/dut/inp[6]} {-height 16 -radix decimal} {/ita_tb/dut/inp[5]} {-height 16 -radix decimal} {/ita_tb/dut/inp[4]} {-height 16 -radix decimal} {/ita_tb/dut/inp[3]} {-height 16 -radix decimal} {/ita_tb/dut/inp[2]} {-height 16 -radix decimal} {/ita_tb/dut/inp[1]} {-height 16 -radix decimal} {/ita_tb/dut/inp[0]} {-height 16 -radix decimal}} /ita_tb/dut/inp +add wave -noupdate -group {All in one Phase} -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o +add wave -noupdate -group {All in one Phase} -radix decimal /ita_tb/dut/inp1 add wave -noupdate -radix unsigned /ita_tb/dut/inp1_q add wave -noupdate -radix decimal /ita_tb/dut/i_accumulator/oup_i add wave -noupdate -radix decimal -childformat {{{/ita_tb/dut/i_accumulator/result_d[15]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[14]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[13]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[12]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[11]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[10]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[9]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[8]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[7]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[6]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[5]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[4]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[3]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[2]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[1]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_accumulator/result_d[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[0]} {-height 16 -radix decimal}} /ita_tb/dut/i_accumulator/result_d @@ -137,469 +117,75 @@ add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q3 add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q4 add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_d add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_q -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/clk_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/rst_ni -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mode_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/eps_mult_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/right_shift_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_q_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/result_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_o -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mult_signed -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/product -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_added -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_d -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_q -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q1 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q2 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q3 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q4 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_d -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_q -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/clk_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/rst_ni -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mode_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/eps_mult_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/right_shift_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/calc_en_q_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/result_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_i -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_o -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/mult_signed -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/product -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_added -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_d -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/shifted_q -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q1 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q2 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q3 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/add_q4 -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_d -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/requant_oup_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/clk_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/rst_ni -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ctrl_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_ready_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_ready_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_ready_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_ready_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/pop_softmax_fifo_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/soft_addr_div_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_done_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_inner_tile_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_inner_tile_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_pad_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_q1_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/count_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/count_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_count -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_padded -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_time -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_dim -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_fifo -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/clk_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/rst_ni -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ctrl_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_ready_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_ready_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_ready_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_ready_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/pop_softmax_fifo_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/soft_addr_div_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_done_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_inner_tile_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_inner_tile_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_pad_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_q1_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/count_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/count_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_count -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_padded -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_time -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_dim -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_fifo -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/clk_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/rst_ni -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ctrl_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_ready_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/weight_ready_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_ready_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_valid_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/oup_ready_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/pop_softmax_fifo_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/soft_addr_div_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_done_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_inner_tile_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_inner_tile_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_pad_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/calc_en_q1_i -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/step_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_count -add wave -noupdate -expand -group Controller -radix unsigned /ita_tb/dut/i_controller/count_d -add wave -noupdate -expand -group Controller -radix unsigned /ita_tb/dut/i_controller/count_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_inner_tile_o -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_pos_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_col_offset_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_x_pos_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_tile_y_pos_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_x_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_x_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/tile_y_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/bias_tile_y_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_tile_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/ongoing_soft_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inp_bias_padded -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/last_time -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/mask_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/inner_tile_dim -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/first_outer_dim_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/second_outer_dim_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_fifo -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/softmax_div_done_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/busy_q -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_d -add wave -noupdate -expand -group Controller /ita_tb/dut/i_controller/requant_add_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/clk_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/rst_ni -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/ctrl_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/step_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/soft_addr_div_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/softmax_done_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_softmax_fifo_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_inp_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_oup_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_data_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_data_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/prev_max_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_data_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_data_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_x_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q3 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q4 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q3 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q4 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_diff -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_diff -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp_diff -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q3 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_full -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_empty -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/push_to_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_from_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_to_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_from_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_usage -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_row -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_col -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/clk_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/rst_ni -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/ctrl_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/step_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/soft_addr_div_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/softmax_done_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_softmax_fifo_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_inp_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_valid_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_ready_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_oup_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_acc_data_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_acc_data_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/prev_max_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/read_max_data_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_en_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_addr_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/write_max_data_o -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_x_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_i -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q3 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_q4 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q3 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_q4 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_x_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/tile_y_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/count_div_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/addr_div_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_read_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/div_write_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_diff -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_sum_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/max_diff -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/shift_inp_diff -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q2 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q3 -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_full -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_empty -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/push_to_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/pop_from_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_to_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/data_from_fifo -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/fifo_usage -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_row -add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/disable_col +add wave -noupdate -group Controller /ita_tb/dut/i_controller/clk_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/rst_ni +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ctrl_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_valid_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_ready_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/weight_valid_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/weight_ready_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_valid_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_ready_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/oup_valid_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/oup_ready_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/pop_softmax_fifo_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/soft_addr_div_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_done_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/calc_en_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_inner_tile_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/last_inner_tile_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_i +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_pad_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/mask_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_o +add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/step_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/count_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/count_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_count +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_x_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_x_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_x_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/tile_y_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_y_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/bias_tile_y_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_tile_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_tile_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_soft_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/ongoing_soft_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inp_bias_padded +add wave -noupdate -group Controller /ita_tb/dut/i_controller/last_time +add wave -noupdate -group Controller /ita_tb/dut/i_controller/inner_tile_dim +add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_outer_dim +add wave -noupdate -group Controller /ita_tb/dut/i_controller/second_outer_dim +add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_outer_dim_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/first_outer_dim_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/second_outer_dim_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/second_outer_dim_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_fifo +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div_done_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/softmax_div_done_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/busy_q +add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add +add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_d +add wave -noupdate -group Controller /ita_tb/dut/i_controller/requant_add_q add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/clk_i add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/rst_ni add wave -noupdate -group {Softmax Controller} /ita_tb/dut/i_softmax_top/i_softmax/ctrl_i @@ -720,69 +306,4 @@ add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_d add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_q add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_d add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_q -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/clk_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/rst_ni -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_q_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_q_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_q_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/oup_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/inp_bias_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_o -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_en -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data_unused -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_en -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_data -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_d -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_q -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_d -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_q -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_d -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_q -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/clk_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/rst_ni -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/calc_en_q_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/first_tile_q_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/last_tile_q_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/oup_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/inp_bias_i -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_o -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_en -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_data_unused -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_en -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_data -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_d -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/read_addr_q -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_d -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/write_addr_q -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_d -add wave -noupdate -group Accumulator /ita_tb/dut/i_accumulator/result_q -TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {99296600 ps} 1} {{Cursor 2} {94544458 ps} 0} -quietly wave cursor active 2 -configure wave -namecolwidth 150 -configure wave -valuecolwidth 178 -configure wave -justifyvalue left -configure wave -signalnamewidth 1 -configure wave -snapdistance 10 -configure wave -datasetprefix 0 -configure wave -rowmargin 4 -configure wave -childrowmargin 2 -configure wave -gridoffset 0 -configure wave -gridperiod 1 -configure wave -griddelta 40 -configure wave -timeline 0 -configure wave -timelineunits ns -update -WaveRestoreZoom {94475383 ps} {94588811 ps} + diff --git a/src/ita_masking.sv b/src/ita_masking.sv index f65cc5d..5627de8 100644 --- a/src/ita_masking.sv +++ b/src/ita_masking.sv @@ -212,10 +212,67 @@ module ita_masking end end SlidingWindow: begin - + mask_col_offset_d = '0; + mask_tile_x_pos_d = '0; + mask_tile_y_pos_d = '0; + mask_pos_d = '0; + mask_d = '0; + + if (step_i == QK) begin + if (last_inner_tile_i == 1'b1) begin + for (int i = 0; i < N; i++) begin + if (((count_i & (M-1)) + (tile_y_i * M)) < ctrl_i.mask_start_index) begin + if ((((count_i / M) * N) + i + (tile_x_i * M)) < (ctrl_i.mask_start_index + ((count_i & (M-1)) + (tile_y_i * M)))) begin + mask_d[i] = 1'b0; + end else begin + mask_d[i] = 1'b1; + end + end else begin + if ((((count_i & (M-1)) + (tile_y_i * M) - (ctrl_i.mask_start_index-1)) <= (((count_i / M) * N) + i + (tile_x_i * M))) && + ((((count_i / M) * N) + i + (tile_x_i * M)) < ((count_i & (M-1)) + (tile_y_i * M) + ctrl_i.mask_start_index))) begin + mask_d[i] = 1'b0; + end else begin + mask_d[i] = 1'b1; + end + end + end + end + end end StridedSlidingWindow: begin - + mask_col_offset_d = '0; + mask_tile_x_pos_d = '0; + mask_tile_y_pos_d = '0; + mask_pos_d = '0; + mask_d = '0; + + if (step_i == QK) begin + if (last_inner_tile_i == 1'b1) begin + for (int i = 0; i < N; i++) begin + //Strided logic + if ((((((count_i / M) * N) + i + (tile_x_i * M)) - ((count_i & (M-1)) + (tile_y_i * M))) & (ctrl_i.mask_start_index-1)) == 0) begin + mask_d[i] = 1'b0; + end else begin + mask_d[i] = 1'b1; + end + //Sliding window logic + if (((count_i & (M-1)) + (tile_y_i * M)) < ctrl_i.mask_start_index) begin + if ((((count_i / M) * N) + i + (tile_x_i * M)) < (ctrl_i.mask_start_index + ((count_i & (M-1)) + (tile_y_i * M)))) begin + mask_d[i] = 1'b0; + end else begin + mask_d[i] = 1'b1; + end + end else begin + if ((((count_i & (M-1)) + (tile_y_i * M) - (ctrl_i.mask_start_index-1)) <= (((count_i / M) * N) + i + (tile_x_i * M))) && + ((((count_i / M) * N) + i + (tile_x_i * M)) < ((count_i & (M-1)) + (tile_y_i * M) + ctrl_i.mask_start_index))) begin + mask_d[i] = 1'b0; + end else begin + mask_d[i] = 1'b1; + end + end + end + end + end end endcase end diff --git a/src/ita_softmax.sv b/src/ita_softmax.sv index 3e38f47..20242e5 100644 --- a/src/ita_softmax.sv +++ b/src/ita_softmax.sv @@ -342,10 +342,43 @@ module ita_softmax end end SlidingWindow: begin - + if (((count_soft_mask_q & (M-1)) + (mask_tile_y_q * M)) < ctrl_i.mask_start_index) begin + if ((i + (mask_tile_x_q * M)) < ((count_soft_mask_q & (M-1)) + (mask_tile_y_q * M) + ctrl_i.mask_start_index)) begin + disable_col[i] = 1'b0; + end else begin + disable_col[i] = 1'b1; + end + end else begin + if ((((count_soft_mask_q & (M-1)) + (mask_tile_y_q * M) - (ctrl_i.mask_start_index-1)) <= (i + (mask_tile_x_q * M))) && + ((i + (mask_tile_x_q * M)) < ((count_soft_mask_q & (M-1)) + (mask_tile_y_q * M) + ctrl_i.mask_start_index))) begin + disable_col[i] = 1'b0; + end else begin + disable_col[i] = 1'b1; + end + end end StridedSlidingWindow: begin - + //Strided logic + if ((((i + (mask_tile_x_q * M)) - ((count_soft_mask_q & (M-1)) + (mask_tile_y_q * M))) & (ctrl_i.mask_start_index-1)) == 0) begin + disable_col[i] = 1'b0; + end else begin + disable_col[i] = 1'b1; + end + //Sliding window logic + if (((count_soft_mask_q & (M-1)) + (mask_tile_y_q * M)) < ctrl_i.mask_start_index) begin + if ((i + (mask_tile_x_q * M)) < ((count_soft_mask_q & (M-1)) + (mask_tile_y_q * M) + ctrl_i.mask_start_index)) begin + disable_col[i] = 1'b0; + end else begin + disable_col[i] = 1'b1; + end + end else begin + if ((((count_soft_mask_q & (M-1)) + (mask_tile_y_q * M) - (ctrl_i.mask_start_index-1)) <= (i + (mask_tile_x_q * M))) && + ((i + (mask_tile_x_q * M)) < ((count_soft_mask_q & (M-1)) + (mask_tile_y_q * M) + ctrl_i.mask_start_index))) begin + disable_col[i] = 1'b0; + end else begin + disable_col[i] = 1'b1; + end + end end endcase end diff --git a/src/tb/ita_tb.sv b/src/tb/ita_tb.sv index acba5a6..1fdddec 100644 --- a/src/tb/ita_tb.sv +++ b/src/tb/ita_tb.sv @@ -471,9 +471,6 @@ task automatic apply_ITA_weights(input integer phase); oup_valid_q = oup_valid; oup_ready_q = oup_ready; if (successful_handshake(oup_valid, oup_ready)) begin - // if (dut.i_softmax_top.i_softmax.calc_stream_soft_en_q && phase == 3 && dut.step == AV) begin - // $display("Softmax Input: %h", dut.i_softmax_top.i_softmax.inp_i); - // end tile_entry += 1; if (requant_oup !== exp_res) begin $display("[TB] ITA: Wrong value received %x, instead of %x at %t. (phase: %0d)", requant_oup, exp_res, $time, phase); diff --git a/testGenerator.py b/testGenerator.py index 9079056..c26a2a4 100644 --- a/testGenerator.py +++ b/testGenerator.py @@ -48,7 +48,9 @@ def generateMHA(**args): NO_BIAS = args['no_bias'] NO_PARTIAL_SOFTMAX = args['no_partial_softmax'] ACTIVATION = args['activation'].capitalize() - MASK = args['mask'].capitalize() if (args['mask'].find("_") == -1) else args['mask'][:args['mask'].find("_")].capitalize() + args['mask'][args['mask'].find("_")+1:].capitalize() + features = args['mask'].split('_') + seperator = "" + MASK = seperator.join(feature.capitalize() for feature in features) INDEX = args['I'] base_path = f'{current_dir}/simvectors/data_S{S}_E{E}_P{P}_F{F}_H{H}_B{int(not NO_BIAS)}_{ACTIVATION}_{MASK}_I{INDEX}' From a915d5b2b29a335efbee2c71cee67494f35588b3 Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Fri, 10 Jan 2025 16:12:33 +0100 Subject: [PATCH 52/60] Changes for automated tests --- .yapfignore | 3 - PyITA/ITA.py | 70 +++------------- PyITA/softmax.py | 28 ------- modelsim/Makefile | 6 +- modelsim/sim_ita_tb.tcl | 12 +-- modelsim/sim_ita_tb_wave.tcl | 90 +------------------- src/ita_masking.sv | 31 ++++--- src/ita_softmax.sv | 29 ++++--- tests/masking_test.sh | 157 +++++++++++++++++++++++++++++++++++ 9 files changed, 206 insertions(+), 220 deletions(-) delete mode 100644 .yapfignore create mode 100755 tests/masking_test.sh diff --git a/.yapfignore b/.yapfignore deleted file mode 100644 index 99bbfb7..0000000 --- a/.yapfignore +++ /dev/null @@ -1,3 +0,0 @@ -*third_party/ -*venv/ -*simvectors/ \ No newline at end of file diff --git a/PyITA/ITA.py b/PyITA/ITA.py index 048bca9..c41fc01 100644 --- a/PyITA/ITA.py +++ b/PyITA/ITA.py @@ -579,6 +579,7 @@ def step3_Vp(self): self.tiler_V(self.V, self.Wv, self.Bv, self.Vp_requant, "V", "Wv", "Bv", "Vp") def apply_mask(self, index): + # True means this positon gets masked if (self.mask == 'upper_triangular'): self.Mask = np.full((self.H, self.S, self.S), fill_value=False, dtype='bool') if (0 < index and index < self.S): @@ -600,7 +601,7 @@ def apply_mask(self, index): elif (self.mask == 'strided'): self.Mask = np.full((self.H, self.S, self.S), fill_value=True, dtype='bool') if (0 < index and index < self.S): - if (index % 2 == 0): + if (index > 0 and (index & (index - 1)) == 0): for h in range(self.Mask.shape[0]): for i in range(self.Mask.shape[1]): self.Mask[h][i][i] = False @@ -614,7 +615,7 @@ def apply_mask(self, index): elif (self.mask == 'upper_strided'): self.Mask = np.full((self.H, self.S, self.S), fill_value=True, dtype='bool') if (0 < index and index < self.S): - if (index % 2 == 0): + if (index > 0 and (index & (index - 1)) == 0): for h in range(self.Mask.shape[0]): for i in range(self.Mask.shape[1]): for j in range(i, self.Mask.shape[2], index): @@ -626,7 +627,7 @@ def apply_mask(self, index): elif (self.mask == 'lower_strided'): self.Mask = np.full((self.H, self.S, self.S), fill_value=True, dtype='bool') if (0 < index and index < self.S): - if (index % 2 == 0): + if (index > 0 and (index & (index - 1)) == 0): for h in range(self.Mask.shape[0]): for i in range(self.Mask.shape[1]): for j in range(i, self.Mask.shape[2], index): @@ -638,20 +639,17 @@ def apply_mask(self, index): elif (self.mask == 'sliding_window'): self.Mask = np.full((self.H, self.S, self.S), fill_value=True, dtype='bool') if (0 < index and index < self.S): - if (index % 2 == 0): - for h in range(self.Mask.shape[0]): - for i in range(self.Mask.shape[1]): - for j in range(i, min((index + i), self.Mask.shape[2])): - self.Mask[h][i][j] = False - self.Mask[h][j][i] = False - else: - raise ValueError(f"Index has to be a power of two for {self.mask} mask") + for h in range(self.Mask.shape[0]): + for i in range(self.Mask.shape[1]): + for j in range(i, min((index + i), self.Mask.shape[2])): + self.Mask[h][i][j] = False + self.Mask[h][j][i] = False else: raise ValueError(f"Index is out of bounds for {self.mask} mask") elif (self.mask == 'strided_sliding_window'): self.Mask = np.full((self.H, self.S, self.S), fill_value=True, dtype='bool') if (0 < index and index < self.S): - if (index % 2 == 0): + if (index > 0 and (index & (index - 1)) == 0): for h in range(self.Mask.shape[0]): for i in range(self.Mask.shape[1]): for j in range(i, self.Mask.shape[2]): @@ -663,7 +661,7 @@ def apply_mask(self, index): else: raise ValueError(f"Index is out of bounds for {self.mask} mask") elif (self.mask == 'none'): - return + self.Mask = np.full((self.H, self.S, self.S), fill_value=False, dtype='bool') else: raise ValueError("Mask not supported") @@ -675,16 +673,6 @@ def step4_QK(self, no_partial_softmax, index): self.A_requant = requantize(self.A, self.requant_eps_mult[3], self.requant_right_shift[3], self.requant_add[3]) self.apply_mask(index) - - print(self.Mask) - - matrix = np.squeeze(self.A_requant) - plt.imshow(matrix, cmap='viridis') - plt.colorbar() - plt.title("A_requant/A_stream_soft_in") - plt.show() - - print(f"A_requant row 0: {self.A_requant[0, 0, :]}") if (self.S_ITA - self.S) > 0: self.A_requant[:, -(self.S_ITA - self.S):, :] = 0 @@ -692,12 +680,6 @@ def step4_QK(self, no_partial_softmax, index): self.soft(no_partial_softmax) - matrix = np.squeeze(self.A_partial_softmax) - plt.imshow(matrix, cmap='viridis') - plt.colorbar() - plt.title("A_partial_softmax") - plt.show() - self.tiler_AV(self.Qp_requant, self.Kp_requant, self.A_requant, "Qp_in", "Kp_in", "A") def soft(self, no_partial_softmax = False): @@ -711,8 +693,6 @@ def soft(self, no_partial_softmax = False): else: self.A_partial_softmax = streamingPartialSoftmax(self.A_requant[:, :self.S, :self.S], self.Mask) self.A_partial_softmax[self.Mask] = 0 - print(f"inp_stream_soft_o: {self.A_partial_softmax[0,:,:]}") - print(f"Normalization Sum: {np.sum(self.A_partial_softmax[0,:,:], axis=1)}") self.A_partial_softmax = np.pad(self.A_partial_softmax, ((0, 0), (0, self.S_ITA - self.S), (0, self.S_ITA - self.S))) @@ -723,39 +703,21 @@ def soft(self, no_partial_softmax = False): A_save = self.A_partial_softmax[h] write_matrix(A_save, f"A_soft_{h}", self.paths["standalone"]) - def step5_AV(self): - print(f"A_partial_softmax: {self.A_partial_softmax.shape}") - print(f"Vp_requant: {self.Vp_requant.shape}") - + def step5_AV(self): self.O_soft = np.array([ np.matmul(self.A_partial_softmax[i].astype(np.uint8), self.Vp_requant[i], dtype = np.int32) for i in range(self.H) ]) - print(f"O_soft without requant row 0: {self.O_soft[0, 62, :]}") - print(f"O_soft without requant row 0: {self.O_soft[0, 63, :]}") - print(f"O_soft without requant row 0: {self.O_soft[0, 0, :]}") - print(f"O_soft without requant row 0: {self.O_soft[0, 1, :]}") - + self.O_soft = np.clip(self.O_soft, -2**(self.WO - 1), 2**(self.WO - 1) - 1) self.O_soft_requant = requantize(self.O_soft, self.requant_eps_mult[4], self.requant_right_shift[4], self.requant_add[4]) - print(f"O_soft_requant: {self.O_soft_requant[0, 62, :]}") - print(f"O_soft_requant: {self.O_soft_requant[0, 63, :]}") - print(f"O_soft_requant: {self.O_soft_requant[0, 0, :]}") - print(f"O_soft_requant: {self.O_soft_requant[0, 1, :]}") - if (self.S_ITA - self.S) > 0: self.O_soft_requant[:, -(self.S_ITA - self.S):, :] = 0 if (self.P_ITA - self.P) > 0: self.O_soft_requant[:, :, -(self.P_ITA - self.P):] = 0 - matrix = np.squeeze(self.O_soft_requant) - plt.imshow(matrix, cmap='viridis') - plt.colorbar() - plt.title("O_soft_requant/O_soft") - plt.show() - self.tiler_AV(self.A_requant, np.transpose(self.Vp_requant, (0, 2, 1)), self.O_soft_requant, "A_stream_soft_in", "Vp_in", "O_soft") @@ -785,12 +747,6 @@ def step6_O(self): self.Out_soft_requant = requantize(self.Out_soft, self.requant_eps_mult[5], self.requant_right_shift[5], self.requant_add[5]) - matrix = np.squeeze(self.Out_soft_requant) - plt.imshow(matrix, cmap='viridis') - plt.colorbar() - plt.title("Out_soft_requant") - plt.show() - if (self.S_ITA - self.S) > 0: self.Out_soft_requant[:, -(self.S_ITA - self.S):, :] = 0 if (self.E_ITA - self.E) > 0: diff --git a/PyITA/softmax.py b/PyITA/softmax.py index dae63b7..76e9302 100644 --- a/PyITA/softmax.py +++ b/PyITA/softmax.py @@ -105,10 +105,6 @@ def streamingPartialSoftmax(x, mask, integerize = True): mask_slice = mask[... ,i*PE:(i*PE)+width] x_slice = x[..., 0 + i * PE:width + i * PE] - print(f"Mask Slice Shape: {mask_slice.shape}") - print(f"Mask Slice: {mask_slice}") - print(f"X Slice Shape: {x_slice.shape}") - print(f"X Slice: {x_slice}") # Find the maximum for each row in the current column block (consisting of 16 columns) if integerize: @@ -129,16 +125,9 @@ def streamingPartialSoftmax(x, mask, integerize = True): else: max_shift = (current_max - global_max) * eps_max - print(f"Global Max: {global_max.shape}") - print(global_max) - print(f"Current Max: {current_max.shape}") - print(current_max) - # Update all shift values where new maximum is larger shift_sum[current_max > global_max] = max_shift[current_max > global_max] - print(f"Shift sum: {shift_sum}") - # Updated all maximums where they changed global_max[current_max > global_max] = current_max[current_max > global_max] @@ -157,18 +146,8 @@ def streamingPartialSoftmax(x, mask, integerize = True): else: shift = diff * eps_max - print(f"Shift Shape: {shift.shape}") - print(f"Shift without mask: {shift}") - # Set shift value so high that 2**8 >> shift gets zero for all masked values shift[mask_slice] = 32 - print(f"Shift with mask: {shift}") - # # matrix = np.squeeze(shift) - # # import matplotlib.pyplot as plt - # # plt.imshow(matrix, cmap='viridis') - # # plt.colorbar() - # # plt.title("Shift Matrix") - # # plt.show() # Calculate exponential sum over the current part of the row and scale it by 2**10 to prevent underflow if integerize: @@ -176,8 +155,6 @@ def streamingPartialSoftmax(x, mask, integerize = True): # exp_sum = np.floor(np.sum(2**8 / 2**shift, axis = -1)) else: exp_sum = np.sum(1 / 2**shift, axis = -1) - - print(f"Exp sum: {exp_sum}") # Update the accumulated sum and add the accumulation over the current part of the row if integerize: @@ -185,7 +162,6 @@ def streamingPartialSoftmax(x, mask, integerize = True): else: exp_partial_sum = (exp_partial_sum / 2**(shift_sum.astype(np.float32))) + exp_sum - print(f"Exp parital sum: {exp_partial_sum}") ## STAGE 2: Calculate the softmax activation # Invert the partial sum @@ -194,7 +170,6 @@ def streamingPartialSoftmax(x, mask, integerize = True): else: exp_partial_sum_inverse = 1 / exp_partial_sum - print(f"Exp parital sum inverse: {exp_partial_sum_inverse}") # Find the difference between the maximum and x diff = np.repeat(global_max, seq_length).reshape(n_heads, seq_length, seq_length) - x.astype(np.int32) @@ -209,9 +184,6 @@ def streamingPartialSoftmax(x, mask, integerize = True): shift = np.floor(diff * eps_max + 0.5 + np.finfo(np.float32).eps).astype(np.int32) else: shift = diff * eps_max - - print(f"shift value before return shape: {shift.shape}") - print(f"shift value before return: {shift}") # Calculate the activation value if integerize: diff --git a/modelsim/Makefile b/modelsim/Makefile index 8aec4cf..a9a5183 100644 --- a/modelsim/Makefile +++ b/modelsim/Makefile @@ -11,8 +11,8 @@ VOPT ?= $(QUESTA_SEPP) vopt VSIM ?= $(QUESTA_SEPP) vsim VLIB ?= $(QUESTA_SEPP) vlib VMAP ?= $(QUESTA_SEPP) vmap -VSIM_FLAGS ?= -gui -DEBUG ?= ON +VSIM_FLAGS ?= -c # -gui +DEBUG ?= OFF # ON lib: cd $(buildpath) && $(VLIB) work && $(VMAP) work work @@ -21,7 +21,7 @@ build: cd $(buildpath) && $(VSIM) -c -do 'source compile.tcl; quit' sim_ita_tb: lib build - cd $(buildpath) && $(VSIM) $(VSIM_FLAGS) -do 'source ../sim_ita_tb.tcl' + cd $(buildpath) && $(VSIM) $(VSIM_FLAGS) -do 'set DEBUG $(DEBUG); source ../sim_ita_tb.tcl' sim_ita_hwpe_tb: lib build cd $(buildpath) && $(VSIM) $(VSIM_FLAGS) -do 'set DEBUG $(DEBUG); source ../sim_ita_hwpe_tb.tcl' diff --git a/modelsim/sim_ita_tb.tcl b/modelsim/sim_ita_tb.tcl index 2eb5b81..5fff852 100644 --- a/modelsim/sim_ita_tb.tcl +++ b/modelsim/sim_ita_tb.tcl @@ -2,18 +2,12 @@ # Licensed under the Apache License, Version 2.0, see LICENSE for details. # SPDX-License-Identifier: Apache-2.0 -set DEBUG ON - # Set working library. set LIB work -if {$DEBUG == "ON"} { - set VOPT_ARG "+acc" - echo $VOPT_ARG - set DB_SW "-debugdb" -} else { - set DB_SW "" -} +set VOPT_ARG "+acc" +echo $VOPT_ARG +set DB_SW "-debugdb" quit -sim diff --git a/modelsim/sim_ita_tb_wave.tcl b/modelsim/sim_ita_tb_wave.tcl index 490d5e6..5a1d358 100644 --- a/modelsim/sim_ita_tb_wave.tcl +++ b/modelsim/sim_ita_tb_wave.tcl @@ -14,95 +14,7 @@ add wave -noupdate /ita_tb/dut/i_controller/ctrl_i add wave -noupdate /ita_tb/dut/oup_o add wave -noupdate /ita_tb/dut/inp1_q add wave -noupdate /ita_tb/dut/inp2_q -add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/count_d -add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/bias_count -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/max_o -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_d -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/exp_sum_q -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/disable_row -add wave -noupdate -expand -group {Masking Signals} -group {Mask Tile Pos} -radix unsigned /ita_tb/dut/i_controller/first_outer_dim -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_inp2_mux/clk_i -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/last_inner_tile_q6 -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_controller/calc_en_o -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q1 -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q2 -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q3 -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q4 -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q5 -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/calc_en_q6 -add wave -noupdate -expand -group {Masking Signals} -expand -group {In Softmax Module} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_d -add wave -noupdate -expand -group {Masking Signals} -expand -group {In Softmax Module} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_q1 -add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask -add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q1 -add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q2 -add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q3 -add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q4 -add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q5 -add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/mask_q6 -add wave -noupdate -expand -group {Masking Signals} -radix binary /ita_tb/dut/i_softmax_top/i_softmax/mask_i -add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_softmax_top/i_softmax/max_o -add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_softmax_top/i_softmax/max_i -add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_requantizer/requant_oup_o -add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_softmax_top/i_softmax/requant_oup_q -add wave -noupdate -expand -group {Masking Signals} -radix decimal /ita_tb/dut/i_softmax_top/i_softmax/prev_max_o -add wave -noupdate -expand -group {Masking Signals} -radix decimal -childformat {{{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[15]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[14]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[13]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[12]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[11]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[10]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[9]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[8]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[7]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[6]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[5]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[4]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[3]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[2]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[1]} -radix decimal} {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_softmax_top/i_softmax/shift_diff[0]} {-height 16 -radix decimal}} /ita_tb/dut/i_softmax_top/i_softmax/shift_diff -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/disable_shift -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_controller/step_q -add wave -noupdate -expand -group {Masking Signals} /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q -add wave -noupdate -expand -group {Masking Signals} -radix unsigned /ita_tb/dut/i_controller/count_q -add wave -noupdate /ita_tb/dut/calc_en_q5 -add wave -noupdate /ita_tb/dut/calc_en_q6 -add wave -noupdate /ita_tb/dut/calc_en_q7 -add wave -noupdate /ita_tb/dut/calc_en_q8 -add wave -noupdate /ita_tb/dut/calc_en_q9 -add wave -noupdate /ita_tb/dut/calc_en_q10 -add wave -noupdate -group Requant /ita_tb/dut/i_controller/requant_add_i -add wave -noupdate -group Requant /ita_tb/dut/i_controller/requant_add_o -add wave -noupdate -group Bias /ita_tb/dut/inp_bias -add wave -noupdate -group Bias /ita_tb/dut/inp_bias_padded -add wave -noupdate -group Bias /ita_tb/dut/inp_bias_q1 -add wave -noupdate -group Bias /ita_tb/dut/inp_bias_q2 -add wave -noupdate /ita_tb/dut/calc_en_q4 -add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 -add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_i -add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/inner_tile_q -add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q2 -add wave -noupdate -radix binary -childformat {{{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[63]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[62]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[61]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[60]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[59]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[58]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[57]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[56]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[55]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[54]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[53]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[52]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[51]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[50]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[49]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[48]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[47]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[46]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[45]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[44]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[43]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[42]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[41]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[40]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[39]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[38]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[37]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[36]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[35]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[34]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[33]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[32]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[31]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[30]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[29]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[28]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[27]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[26]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[25]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[24]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[23]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[22]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[21]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[20]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[19]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[18]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[17]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[16]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[15]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[14]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[13]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[12]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[11]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[10]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[9]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[8]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[7]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[6]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[5]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[4]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[3]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[2]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[1]} -radix binary} {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[0]} -radix binary}} -subitemconfig {{/ita_tb/dut/i_softmax_top/i_softmax/disable_col[63]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[62]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[61]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[60]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[59]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[58]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[57]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[56]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[55]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[54]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[53]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[52]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[51]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[50]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[49]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[48]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[47]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[46]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[45]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[44]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[43]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[42]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[41]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[40]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[39]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[38]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[37]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[36]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[35]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[34]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[33]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[32]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[31]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[30]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[29]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[28]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[27]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[26]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[25]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[24]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[23]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[22]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[21]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[20]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[19]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[18]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[17]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[16]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[15]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[14]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[13]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[12]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[11]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[10]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[9]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[8]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[7]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[6]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[5]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[4]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[3]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[2]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[1]} {-height 16 -radix binary} {/ita_tb/dut/i_softmax_top/i_softmax/disable_col[0]} {-height 16 -radix binary}} /ita_tb/dut/i_softmax_top/i_softmax/disable_col -add wave -noupdate /ita_tb/dut/i_inp2_mux/clk_i -add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/step_i -add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/calc_en_i -add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/mask_i -add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/max_i -add wave -noupdate -expand -group {In Softmax} /ita_tb/dut/i_softmax_top/i_softmax/max_o -add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_i -add wave -noupdate -radix hexadecimal /ita_tb/dut/i_softmax_top/i_softmax/calc_stream_soft_en_q -add wave -noupdate /ita_tb/dut/i_requantizer/clk_i -add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_q1 -add wave -noupdate -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/count_soft_mask_q -add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_d -add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_x_q -add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_d -add wave -noupdate /ita_tb/dut/i_softmax_top/i_softmax/mask_tile_y_q -add wave -noupdate -radix binary /ita_tb/dut/i_softmax_top/i_softmax/disable_col -add wave -noupdate /ita_tb/dut/i_activation/data_q3 -add wave -noupdate -radix decimal /ita_tb/dut/inp_i -add wave -noupdate -expand -group {All in one Phase} -radix decimal -childformat {{{/ita_tb/dut/inp[63]} -radix decimal} {{/ita_tb/dut/inp[62]} -radix decimal} {{/ita_tb/dut/inp[61]} -radix decimal} {{/ita_tb/dut/inp[60]} -radix decimal} {{/ita_tb/dut/inp[59]} -radix decimal} {{/ita_tb/dut/inp[58]} -radix decimal} {{/ita_tb/dut/inp[57]} -radix decimal} {{/ita_tb/dut/inp[56]} -radix decimal} {{/ita_tb/dut/inp[55]} -radix decimal} {{/ita_tb/dut/inp[54]} -radix decimal} {{/ita_tb/dut/inp[53]} -radix decimal} {{/ita_tb/dut/inp[52]} -radix decimal} {{/ita_tb/dut/inp[51]} -radix decimal} {{/ita_tb/dut/inp[50]} -radix decimal} {{/ita_tb/dut/inp[49]} -radix decimal} {{/ita_tb/dut/inp[48]} -radix decimal} {{/ita_tb/dut/inp[47]} -radix decimal} {{/ita_tb/dut/inp[46]} -radix decimal} {{/ita_tb/dut/inp[45]} -radix decimal} {{/ita_tb/dut/inp[44]} -radix decimal} {{/ita_tb/dut/inp[43]} -radix decimal} {{/ita_tb/dut/inp[42]} -radix decimal} {{/ita_tb/dut/inp[41]} -radix decimal} {{/ita_tb/dut/inp[40]} -radix decimal} {{/ita_tb/dut/inp[39]} -radix decimal} {{/ita_tb/dut/inp[38]} -radix decimal} {{/ita_tb/dut/inp[37]} -radix decimal} {{/ita_tb/dut/inp[36]} -radix decimal} {{/ita_tb/dut/inp[35]} -radix decimal} {{/ita_tb/dut/inp[34]} -radix decimal} {{/ita_tb/dut/inp[33]} -radix decimal} {{/ita_tb/dut/inp[32]} -radix decimal} {{/ita_tb/dut/inp[31]} -radix decimal} {{/ita_tb/dut/inp[30]} -radix decimal} {{/ita_tb/dut/inp[29]} -radix decimal} {{/ita_tb/dut/inp[28]} -radix decimal} {{/ita_tb/dut/inp[27]} -radix decimal} {{/ita_tb/dut/inp[26]} -radix decimal} {{/ita_tb/dut/inp[25]} -radix decimal} {{/ita_tb/dut/inp[24]} -radix decimal} {{/ita_tb/dut/inp[23]} -radix decimal} {{/ita_tb/dut/inp[22]} -radix decimal} {{/ita_tb/dut/inp[21]} -radix decimal} {{/ita_tb/dut/inp[20]} -radix decimal} {{/ita_tb/dut/inp[19]} -radix decimal} {{/ita_tb/dut/inp[18]} -radix decimal} {{/ita_tb/dut/inp[17]} -radix decimal} {{/ita_tb/dut/inp[16]} -radix decimal} {{/ita_tb/dut/inp[15]} -radix decimal} {{/ita_tb/dut/inp[14]} -radix decimal} {{/ita_tb/dut/inp[13]} -radix decimal} {{/ita_tb/dut/inp[12]} -radix decimal} {{/ita_tb/dut/inp[11]} -radix decimal} {{/ita_tb/dut/inp[10]} -radix decimal} {{/ita_tb/dut/inp[9]} -radix decimal} {{/ita_tb/dut/inp[8]} -radix decimal} {{/ita_tb/dut/inp[7]} -radix decimal} {{/ita_tb/dut/inp[6]} -radix decimal} {{/ita_tb/dut/inp[5]} -radix decimal} {{/ita_tb/dut/inp[4]} -radix decimal} {{/ita_tb/dut/inp[3]} -radix decimal} {{/ita_tb/dut/inp[2]} -radix decimal} {{/ita_tb/dut/inp[1]} -radix decimal} {{/ita_tb/dut/inp[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/inp[63]} {-height 16 -radix decimal} {/ita_tb/dut/inp[62]} {-height 16 -radix decimal} {/ita_tb/dut/inp[61]} {-height 16 -radix decimal} {/ita_tb/dut/inp[60]} {-height 16 -radix decimal} {/ita_tb/dut/inp[59]} {-height 16 -radix decimal} {/ita_tb/dut/inp[58]} {-height 16 -radix decimal} {/ita_tb/dut/inp[57]} {-height 16 -radix decimal} {/ita_tb/dut/inp[56]} {-height 16 -radix decimal} {/ita_tb/dut/inp[55]} {-height 16 -radix decimal} {/ita_tb/dut/inp[54]} {-height 16 -radix decimal} {/ita_tb/dut/inp[53]} {-height 16 -radix decimal} {/ita_tb/dut/inp[52]} {-height 16 -radix decimal} {/ita_tb/dut/inp[51]} {-height 16 -radix decimal} {/ita_tb/dut/inp[50]} {-height 16 -radix decimal} {/ita_tb/dut/inp[49]} {-height 16 -radix decimal} {/ita_tb/dut/inp[48]} {-height 16 -radix decimal} {/ita_tb/dut/inp[47]} {-height 16 -radix decimal} {/ita_tb/dut/inp[46]} {-height 16 -radix decimal} {/ita_tb/dut/inp[45]} {-height 16 -radix decimal} {/ita_tb/dut/inp[44]} {-height 16 -radix decimal} {/ita_tb/dut/inp[43]} {-height 16 -radix decimal} {/ita_tb/dut/inp[42]} {-height 16 -radix decimal} {/ita_tb/dut/inp[41]} {-height 16 -radix decimal} {/ita_tb/dut/inp[40]} {-height 16 -radix decimal} {/ita_tb/dut/inp[39]} {-height 16 -radix decimal} {/ita_tb/dut/inp[38]} {-height 16 -radix decimal} {/ita_tb/dut/inp[37]} {-height 16 -radix decimal} {/ita_tb/dut/inp[36]} {-height 16 -radix decimal} {/ita_tb/dut/inp[35]} {-height 16 -radix decimal} {/ita_tb/dut/inp[34]} {-height 16 -radix decimal} {/ita_tb/dut/inp[33]} {-height 16 -radix decimal} {/ita_tb/dut/inp[32]} {-height 16 -radix decimal} {/ita_tb/dut/inp[31]} {-height 16 -radix decimal} {/ita_tb/dut/inp[30]} {-height 16 -radix decimal} {/ita_tb/dut/inp[29]} {-height 16 -radix decimal} {/ita_tb/dut/inp[28]} {-height 16 -radix decimal} {/ita_tb/dut/inp[27]} {-height 16 -radix decimal} {/ita_tb/dut/inp[26]} {-height 16 -radix decimal} {/ita_tb/dut/inp[25]} {-height 16 -radix decimal} {/ita_tb/dut/inp[24]} {-height 16 -radix decimal} {/ita_tb/dut/inp[23]} {-height 16 -radix decimal} {/ita_tb/dut/inp[22]} {-height 16 -radix decimal} {/ita_tb/dut/inp[21]} {-height 16 -radix decimal} {/ita_tb/dut/inp[20]} {-height 16 -radix decimal} {/ita_tb/dut/inp[19]} {-height 16 -radix decimal} {/ita_tb/dut/inp[18]} {-height 16 -radix decimal} {/ita_tb/dut/inp[17]} {-height 16 -radix decimal} {/ita_tb/dut/inp[16]} {-height 16 -radix decimal} {/ita_tb/dut/inp[15]} {-height 16 -radix decimal} {/ita_tb/dut/inp[14]} {-height 16 -radix decimal} {/ita_tb/dut/inp[13]} {-height 16 -radix decimal} {/ita_tb/dut/inp[12]} {-height 16 -radix decimal} {/ita_tb/dut/inp[11]} {-height 16 -radix decimal} {/ita_tb/dut/inp[10]} {-height 16 -radix decimal} {/ita_tb/dut/inp[9]} {-height 16 -radix decimal} {/ita_tb/dut/inp[8]} {-height 16 -radix decimal} {/ita_tb/dut/inp[7]} {-height 16 -radix decimal} {/ita_tb/dut/inp[6]} {-height 16 -radix decimal} {/ita_tb/dut/inp[5]} {-height 16 -radix decimal} {/ita_tb/dut/inp[4]} {-height 16 -radix decimal} {/ita_tb/dut/inp[3]} {-height 16 -radix decimal} {/ita_tb/dut/inp[2]} {-height 16 -radix decimal} {/ita_tb/dut/inp[1]} {-height 16 -radix decimal} {/ita_tb/dut/inp[0]} {-height 16 -radix decimal}} /ita_tb/dut/inp -add wave -noupdate -expand -group {All in one Phase} -radix unsigned /ita_tb/dut/i_softmax_top/i_softmax/inp_stream_soft_o -add wave -noupdate -expand -group {All in one Phase} -radix decimal /ita_tb/dut/inp1 -add wave -noupdate -radix unsigned /ita_tb/dut/inp1_q -add wave -noupdate -radix decimal /ita_tb/dut/i_accumulator/oup_i -add wave -noupdate -radix decimal -childformat {{{/ita_tb/dut/i_accumulator/result_d[15]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[14]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[13]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[12]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[11]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[10]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[9]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[8]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[7]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[6]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[5]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[4]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[3]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[2]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[1]} -radix decimal} {{/ita_tb/dut/i_accumulator/result_d[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_accumulator/result_d[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_accumulator/result_d[0]} {-height 16 -radix decimal}} /ita_tb/dut/i_accumulator/result_d -add wave -noupdate -radix decimal /ita_tb/dut/i_accumulator/result_o -add wave -noupdate -radix hexadecimal -childformat {{{/ita_tb/dut/i_activation/data_i[15]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[14]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[13]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[12]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[11]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[10]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[9]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[8]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[7]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[6]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[5]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[4]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[3]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[2]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[1]} -radix decimal} {{/ita_tb/dut/i_activation/data_i[0]} -radix decimal}} -subitemconfig {{/ita_tb/dut/i_activation/data_i[15]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[14]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[13]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[12]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[11]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[10]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[9]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[8]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[7]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[6]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[5]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[4]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[3]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[2]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[1]} {-height 16 -radix decimal} {/ita_tb/dut/i_activation/data_i[0]} {-height 16 -radix decimal}} /ita_tb/dut/i_activation/data_i -add wave -noupdate /ita_tb/dut/i_activation/data_q1 -add wave -noupdate /ita_tb/dut/i_activation/data_q2 -add wave -noupdate /ita_tb/dut/i_activation/data_q3 -add wave -noupdate /ita_tb/dut/i_activation/data_q4 -add wave -noupdate /ita_tb/dut/i_activation/data_o -add wave -noupdate /ita_tb/dut/i_fifo/data_i -add wave -noupdate /ita_tb/dut/i_fifo/data_o -add wave -noupdate /ita_tb/dut/oup_o -add wave -noupdate -group Requantizer /ita_tb/dut/i_requantizer/* + add wave -group {Controller} /ita_tb/dut/i_controller/* add wave -group {Softmax Controller} ita_tb/dut/i_softmax_top/i_softmax/* add wave -group {Accumulator} ita_tb/dut/i_accumulator/* \ No newline at end of file diff --git a/src/ita_masking.sv b/src/ita_masking.sv index 5627de8..a0b33cf 100644 --- a/src/ita_masking.sv +++ b/src/ita_masking.sv @@ -253,23 +253,22 @@ module ita_masking if ((((((count_i / M) * N) + i + (tile_x_i * M)) - ((count_i & (M-1)) + (tile_y_i * M))) & (ctrl_i.mask_start_index-1)) == 0) begin mask_d[i] = 1'b0; end else begin - mask_d[i] = 1'b1; - end - //Sliding window logic - if (((count_i & (M-1)) + (tile_y_i * M)) < ctrl_i.mask_start_index) begin - if ((((count_i / M) * N) + i + (tile_x_i * M)) < (ctrl_i.mask_start_index + ((count_i & (M-1)) + (tile_y_i * M)))) begin - mask_d[i] = 1'b0; + //Sliding window logic + if (((count_i & (M-1)) + (tile_y_i * M)) < ctrl_i.mask_start_index) begin + if ((((count_i / M) * N) + i + (tile_x_i * M)) < (ctrl_i.mask_start_index + ((count_i & (M-1)) + (tile_y_i * M)))) begin + mask_d[i] = 1'b0; + end else begin + mask_d[i] = 1'b1; + end end else begin - mask_d[i] = 1'b1; - end - end else begin - if ((((count_i & (M-1)) + (tile_y_i * M) - (ctrl_i.mask_start_index-1)) <= (((count_i / M) * N) + i + (tile_x_i * M))) && - ((((count_i / M) * N) + i + (tile_x_i * M)) < ((count_i & (M-1)) + (tile_y_i * M) + ctrl_i.mask_start_index))) begin - mask_d[i] = 1'b0; - end else begin - mask_d[i] = 1'b1; - end - end + if ((((count_i & (M-1)) + (tile_y_i * M) - (ctrl_i.mask_start_index-1)) <= (((count_i / M) * N) + i + (tile_x_i * M))) && + ((((count_i / M) * N) + i + (tile_x_i * M)) < ((count_i & (M-1)) + (tile_y_i * M) + ctrl_i.mask_start_index))) begin + mask_d[i] = 1'b0; + end else begin + mask_d[i] = 1'b1; + end + end + end end end end diff --git a/src/ita_softmax.sv b/src/ita_softmax.sv index 20242e5..a2362e5 100644 --- a/src/ita_softmax.sv +++ b/src/ita_softmax.sv @@ -192,7 +192,7 @@ module ita_softmax exp_sum_d += unsigned'(9'h100)>>shift_q[i]; end if (tile_q3 != '0 || count_q3>=M) begin // If not first part of the first row - exp_sum_d += ( unsigned'(read_acc_data_i[0]) >> shift_sum_q); + exp_sum_d += (unsigned'(read_acc_data_i[0]) >> shift_sum_q); end end @@ -362,21 +362,20 @@ module ita_softmax if ((((i + (mask_tile_x_q * M)) - ((count_soft_mask_q & (M-1)) + (mask_tile_y_q * M))) & (ctrl_i.mask_start_index-1)) == 0) begin disable_col[i] = 1'b0; end else begin - disable_col[i] = 1'b1; - end - //Sliding window logic - if (((count_soft_mask_q & (M-1)) + (mask_tile_y_q * M)) < ctrl_i.mask_start_index) begin - if ((i + (mask_tile_x_q * M)) < ((count_soft_mask_q & (M-1)) + (mask_tile_y_q * M) + ctrl_i.mask_start_index)) begin - disable_col[i] = 1'b0; + //Sliding window logic + if (((count_soft_mask_q & (M-1)) + (mask_tile_y_q * M)) < ctrl_i.mask_start_index) begin + if ((i + (mask_tile_x_q * M)) < ((count_soft_mask_q & (M-1)) + (mask_tile_y_q * M) + ctrl_i.mask_start_index)) begin + disable_col[i] = 1'b0; + end else begin + disable_col[i] = 1'b1; + end end else begin - disable_col[i] = 1'b1; - end - end else begin - if ((((count_soft_mask_q & (M-1)) + (mask_tile_y_q * M) - (ctrl_i.mask_start_index-1)) <= (i + (mask_tile_x_q * M))) && - ((i + (mask_tile_x_q * M)) < ((count_soft_mask_q & (M-1)) + (mask_tile_y_q * M) + ctrl_i.mask_start_index))) begin - disable_col[i] = 1'b0; - end else begin - disable_col[i] = 1'b1; + if ((((count_soft_mask_q & (M-1)) + (mask_tile_y_q * M) - (ctrl_i.mask_start_index-1)) <= (i + (mask_tile_x_q * M))) && + ((i + (mask_tile_x_q * M)) < ((count_soft_mask_q & (M-1)) + (mask_tile_y_q * M) + ctrl_i.mask_start_index))) begin + disable_col[i] = 1'b0; + end else begin + disable_col[i] = 1'b1; + end end end end diff --git a/tests/masking_test.sh b/tests/masking_test.sh new file mode 100755 index 0000000..98c40cd --- /dev/null +++ b/tests/masking_test.sh @@ -0,0 +1,157 @@ +#!/bin/bash + +# Copyright 2023 ETH Zurich and University +# of Bologna. Licensed under the Apache License, +# Version 2.0, see LICENSE for details. +# SPDX-License-Identifier: Apache-2.0 + +echo "Testing ITA ..." + +# Set the log file +log_file=tests/logs/run_loop_$(date +%Y%m%d%H%M%S).log + +# Create folder and log file +mkdir -p tests/logs +touch $log_file + +# Activate the virtual environment +source venv/bin/activate + +# Set the simulation path +export buildpath=build +export SIM_PATH=modelsim/$buildpath + +# Set to -gui to use the GUI of QuestaSim +export vsim_flags=-c + +# Set the no_stalls if not set +if [ -z "$no_stalls" ]; then + no_stalls=0 + echo "No_stalls not set. Using default value: $no_stalls" +fi + +# Set the n_tests if not set +if [ -z "$n_tests" ]; then + n_tests=250 + echo "Granularity not set. Using default value: $n_tests" +fi + +# Log the parameters +echo "no_stalls=$no_stalls" >> $log_file +echo "n_tests=$n_tests" >> $log_file + +# List of masking names +masking_names=("upper_triangular" "lower_triangular" "strided" + "upper_strided" "lower_strided" + "sliding_window" "strided_sliding_window") + +# List of activation names +activation_names=("identity" "relu" "gelu") + +# Helper function: checks if a mask is one of the strided ones +is_strided_mask() { + case "$1" in + "strided"|"upper_strided"|"lower_strided"|"strided_sliding_window") + return 0 # True + ;; + *) + return 1 # False + ;; + esac +} + +# Helper function: returns all powers of two < s +# (2, 4, 8, 16, ...), stored in an array +powers_of_two_less_than_s() { + local limit=$1 + local val=1 + local results=() + + # If you also want to allow i=1 (which is 2^0), + # set val=1 and do while [ $val -lt $limit ] + # If you need strictly 2,4,8..., set val=2. + val=2 + while [ $val -lt $limit ]; do + results+=($val) + val=$((val*2)) + done + + echo "${results[@]}" +} + +# Run the tests +for test_idx in $(seq 1 $n_tests); do + # Randomly pick s, e, p, f in [2..512] + s=$((2 + RANDOM % 511)) + e=$((1 + RANDOM % 511)) + p=$((1 + RANDOM % 511)) + f=$((1 + RANDOM % 511)) + + # Pick one random masking + random_mask_idx=$((RANDOM % ${#masking_names[@]})) + masking=${masking_names[$random_mask_idx]} + + # Pick one random activation + random_activation_idx=$((RANDOM % ${#activation_names[@]})) + activation=${activation_names[$random_activation_idx]} + + # Pick one random bias (0 or 1) + bias=$((RANDOM % 2)) + + # Decide how to pick i based on whether masking is strided + if is_strided_mask "$masking"; then + # 1) We need i that is < s and also a power of two + valid_i_list=( $(powers_of_two_less_than_s $s) ) + + # If no valid i found, skip this iteration + if [ ${#valid_i_list[@]} -eq 0 ]; then + echo "No valid i for mask=$masking with s=$s (need i < s and i a power of two). Skipping..." + continue + fi + + # Pick a random valid i from the list + i=${valid_i_list[$((RANDOM % ${#valid_i_list[@]}))]} + else + # 2) Non-strided masks: pick i in [1 .. s-1] + if [ "$s" -le 1 ]; then + echo "No valid i for mask=$masking with s=$s (need i < s). Skipping..." + continue + fi + i=$((1 + (RANDOM % (s-1)))) + fi + + echo "Index is: $i (Masking = $masking, s=$s)" + + # Create test vectors (no-bias and bias) + if [ "$bias" -eq 1 ]; then + python testGenerator.py -H 1 -S $s -P $p -E $e -F $f \ + --activation "$activation" --mask "$masking" -I "$i" + else + python testGenerator.py -H 1 -S $s -P $p -E $e -F $f \ + --activation "$activation" --mask "$masking" -I "$i" --no-bias + fi + + # Log the test + echo "Testing ita_tb: S=$s E=$e P=$p F=$f Activation=$activation Masking=$masking I=$i Bias=$bias" >> $log_file + + # Run the test + make sim VSIM_FLAGS=$vsim_flags DEBUG=OFF target=sim_ita_tb \ + no_stalls=$no_stalls s=$s e=$e p=$p f=$f bias=$bias \ + activation=$activation mask=$masking i=$i + + # Check the simulation status + ./modelsim/return_status.sh "${SIM_PATH}/transcript" \ + "$s" "$e" "$p" "$f" ita_tb "$masking" "$i" >> $log_file + + # Format masking for directory name (e.g. "upper_strided" -> "UpperStrided") + formatted_masking="" + for word in ${masking//_/ }; do + formatted_masking+="${word^}" + done + + # echo "simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^}_${formatted_masking}_I${i}" >> $log_file + + # Remove the test vectors + rm -rf simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^}_${formatted_masking}_I${i} + +done \ No newline at end of file From b400e51c677d69bd9778c75dc0b5cfe246f622b1 Mon Sep 17 00:00:00 2001 From: Marcel Kant Date: Mon, 13 Jan 2025 12:06:40 +0100 Subject: [PATCH 53/60] Tested and synthesized --- src/ita_masking.sv | 3 --- src/ita_softmax.sv | 2 +- 2 files changed, 1 insertion(+), 4 deletions(-) diff --git a/src/ita_masking.sv b/src/ita_masking.sv index a0b33cf..a5fae64 100644 --- a/src/ita_masking.sv +++ b/src/ita_masking.sv @@ -30,9 +30,6 @@ module ita_masking assign mask_o = mask_q; always_comb begin - - - case (ctrl_i.mask_type) None: begin mask_col_offset_d = '0; diff --git a/src/ita_softmax.sv b/src/ita_softmax.sv index a2362e5..b035dc8 100644 --- a/src/ita_softmax.sv +++ b/src/ita_softmax.sv @@ -278,7 +278,7 @@ module ita_softmax disable_col[i] = 1'b0; end UpperTriangular: begin - // (ctrl_i.mask_start_index / M) -> tile where the masking starts + // (ctrl_i.mask_start_index / M) -> tile where masking starts if (mask_tile_x_q == mask_tile_y_q + (ctrl_i.mask_start_index / M)) begin if (i >= ((count_soft_mask_q & (M-1)) + (ctrl_i.mask_start_index & (M-1)))) begin disable_col[i] = 1'b1; From e38cd367c0b93263b041be1f3d5a1745cc7f93e2 Mon Sep 17 00:00:00 2001 From: Ludi-1 Date: Mon, 24 Feb 2025 16:01:21 +0100 Subject: [PATCH 54/60] hwpe tb setup script with masking --- Bender.lock | 4 +- modelsim/Makefile | 2 +- modelsim/sim_ita_tb_wave.tcl | 3 +- src/hwpe/tb/ita_hwpe_tb.sv | 10 +- tests/hwpe_mask_test.sh | 158 ++++++++++++++++++++++++ tests/hwpe_upper_triangle_test.sh | 138 +++++++++++++++++++++ tests/masking_test.sh | 5 +- tests/run.sh | 4 +- tests/tests/hwpe_mask_test.sh | 158 ++++++++++++++++++++++++ tests/tests/hwpe_upper_triangle_test.sh | 138 +++++++++++++++++++++ tests/tests/masking_test.sh | 158 ++++++++++++++++++++++++ tests/tests/run.sh | 39 ++++++ tests/tests/run_loop.sh | 87 +++++++++++++ tests/tests/upper_triangle_test.sh | 138 +++++++++++++++++++++ tests/upper_triangle_test.sh | 138 +++++++++++++++++++++ 15 files changed, 1171 insertions(+), 9 deletions(-) create mode 100755 tests/hwpe_mask_test.sh create mode 100755 tests/hwpe_upper_triangle_test.sh create mode 100755 tests/tests/hwpe_mask_test.sh create mode 100755 tests/tests/hwpe_upper_triangle_test.sh create mode 100755 tests/tests/masking_test.sh create mode 100755 tests/tests/run.sh create mode 100755 tests/tests/run_loop.sh create mode 100755 tests/tests/upper_triangle_test.sh create mode 100755 tests/upper_triangle_test.sh diff --git a/Bender.lock b/Bender.lock index 731bfca..665687f 100644 --- a/Bender.lock +++ b/Bender.lock @@ -15,8 +15,8 @@ packages: - common_verification - tech_cells_generic common_verification: - revision: 9c07fa860593b2caabd9b5681740c25fac04b878 - version: 0.2.3 + revision: fb1885f48ea46164a10568aeff51884389f67ae3 + version: 0.2.5 source: Git: https://github.com/pulp-platform/common_verification.git dependencies: [] diff --git a/modelsim/Makefile b/modelsim/Makefile index a9a5183..71ed400 100644 --- a/modelsim/Makefile +++ b/modelsim/Makefile @@ -11,7 +11,7 @@ VOPT ?= $(QUESTA_SEPP) vopt VSIM ?= $(QUESTA_SEPP) vsim VLIB ?= $(QUESTA_SEPP) vlib VMAP ?= $(QUESTA_SEPP) vmap -VSIM_FLAGS ?= -c # -gui +VSIM_FLAGS ?= -c #-gui DEBUG ?= OFF # ON lib: diff --git a/modelsim/sim_ita_tb_wave.tcl b/modelsim/sim_ita_tb_wave.tcl index 5a1d358..8f035a7 100644 --- a/modelsim/sim_ita_tb_wave.tcl +++ b/modelsim/sim_ita_tb_wave.tcl @@ -17,4 +17,5 @@ add wave -noupdate /ita_tb/dut/inp2_q add wave -group {Controller} /ita_tb/dut/i_controller/* add wave -group {Softmax Controller} ita_tb/dut/i_softmax_top/i_softmax/* -add wave -group {Accumulator} ita_tb/dut/i_accumulator/* \ No newline at end of file +add wave -group {Accumulator} ita_tb/dut/i_accumulator/* +add wave -group {Masking} ita_tb/dut/i_controller/i_masking/* diff --git a/src/hwpe/tb/ita_hwpe_tb.sv b/src/hwpe/tb/ita_hwpe_tb.sv index e24e70d..6e9f738 100644 --- a/src/hwpe/tb/ita_hwpe_tb.sv +++ b/src/hwpe/tb/ita_hwpe_tb.sv @@ -28,6 +28,9 @@ module ita_hwpe_tb; parameter integer FEEDFORWARD_SIZE = `ifdef FF_SIZE `FF_SIZE `else M_TILE_LEN `endif; parameter activation_e ACTIVATION = `ifdef ACTIVATION `ACTIVATION `else Identity `endif; parameter integer SINGLE_ATTENTION = `ifdef SINGLE_ATTENTION `SINGLE_ATTENTION `else 0 `endif; + parameter mask_e MASK = mask_e'(`ifdef MASK `MASK `else None `endif); + parameter integer MASK_START_INDEX = `ifdef MASK_INDEX `MASK_INDEX `else 1 `endif; + integer N_TILES_SEQUENCE_DIM, N_TILES_EMBEDDING_DIM, N_TILES_PROJECTION_DIM, N_TILES_FEEDFORWARD_DIM; integer N_ELEMENTS_PER_TILE; @@ -133,8 +136,13 @@ module ita_hwpe_tb; "_H1_B", $sformatf("%0d", `ifdef BIAS `BIAS `else 0 `endif), "_", - $sformatf( "%s", ACTIVATION) + $sformatf("%s", ACTIVATION), + "_", + $sformatf("%s", MASK), + "_I", + $sformatf("%0d", MASK_START_INDEX) }; + // Number of tiles in the sequence dimension N_TILES_SEQUENCE_DIM = SEQUENCE_LEN / M_TILE_LEN; // Number of tiles in the embedding dimension diff --git a/tests/hwpe_mask_test.sh b/tests/hwpe_mask_test.sh new file mode 100755 index 0000000..07f9f54 --- /dev/null +++ b/tests/hwpe_mask_test.sh @@ -0,0 +1,158 @@ +#!/bin/bash + +# Copyright 2023 ETH Zurich and University +# of Bologna. Licensed under the Apache License, +# Version 2.0, see LICENSE for details. +# SPDX-License-Identifier: Apache-2.0 + +echo "Testing ITA ..." + +# Set the log file +log_file=tests/logs/run_loop_$(date +%Y%m%d%H%M%S).log + +# Create folder and log file +mkdir -p tests/logs +touch $log_file + +# Activate the virtual environment +source venv/bin/activate + +# Set the simulation path +export buildpath=build +export SIM_PATH=modelsim/$buildpath + +# Set to -gui to use the GUI of QuestaSim +export vsim_flags=-c #-gui + +# Set the no_stalls if not set +if [ -z "$no_stalls" ]; then + no_stalls=0 + echo "No_stalls not set. Using default value: $no_stalls" +fi + +# Set the n_tests if not set +if [ -z "$n_tests" ]; then + n_tests=250 + echo "Granularity not set. Using default value: $n_tests" +fi + +# Log the parameters +echo "no_stalls=$no_stalls" >> $log_file +echo "n_tests=$n_tests" >> $log_file + +# List of masking names +masking_names=("upper_triangular" "lower_triangular" "strided" + "upper_strided" "lower_strided" + "sliding_window" "strided_sliding_window") + +# List of activation names +activation_names=("identity" "relu" "gelu") + +# Helper function: checks if a mask is one of the strided ones +is_strided_mask() { + case "$1" in + "strided"|"upper_strided"|"lower_strided"|"strided_sliding_window") + return 0 # True + ;; + *) + return 1 # False + ;; + esac +} + +# Helper function: returns all powers of two < s +# (2, 4, 8, 16, ...), stored in an array +powers_of_two_less_than_s() { + local limit=$1 + local val=1 + local results=() + + # If you also want to allow i=1 (which is 2^0), + # set val=1 and do while [ $val -lt $limit ] + # If you need strictly 2,4,8..., set val=2. + val=2 + while [ $val -lt $limit ]; do + results+=($val) + val=$((val*2)) + done + + echo "${results[@]}" +} + +# Run the tests +for test_idx in $(seq 1 $n_tests); do + # Randomly pick s, e, p, f in [2..512] + s=$((2 + RANDOM % 511)) + e=$((1 + RANDOM % 511)) + p=$((1 + RANDOM % 511)) + f=$((1 + RANDOM % 511)) + + # Pick one random masking + random_mask_idx=$((RANDOM % ${#masking_names[@]})) + masking=${masking_names[$random_mask_idx]} + + # Pick one random activation + random_activation_idx=$((RANDOM % ${#activation_names[@]})) + activation=${activation_names[$random_activation_idx]} + + # Pick one random bias (0 or 1) + bias=$((RANDOM % 2)) + + # Decide how to pick i based on whether masking is strided + if is_strided_mask "$masking"; then + # 1) We need i that is < s and also a power of two + valid_i_list=( $(powers_of_two_less_than_s $s) ) + + # If no valid i found, skip this iteration + if [ ${#valid_i_list[@]} -eq 0 ]; then + echo "No valid i for mask=$masking with s=$s (need i < s and i a power of two). Skipping..." + continue + fi + + # Pick a random valid i from the list + i=${valid_i_list[$((RANDOM % ${#valid_i_list[@]}))]} + else + # 2) Non-strided masks: pick i in [1 .. s-1] + if [ "$s" -le 1 ]; then + echo "No valid i for mask=$masking with s=$s (need i < s). Skipping..." + continue + fi + i=$((1 + (RANDOM % (s-1)))) + fi + + echo "Index is: $i (Masking = $masking, s=$s)" + + # Create test vectors (no-bias and bias) + echo "creating test vectors" + if [ "$bias" -eq 1 ]; then + python testGenerator.py -H 1 -S $s -P $p -E $e -F $f \ + --activation "$activation" --mask "$masking" -I "$i" + else + python testGenerator.py -H 1 -S $s -P $p -E $e -F $f \ + --activation "$activation" --mask "$masking" -I "$i" --no-bias + fi + + # Log the test + echo "Testing ita_tb: S=$s E=$e P=$p F=$f Activation=$activation Masking=$masking I=$i Bias=$bias" >> $log_file + + # Run the test + make sim VSIM_FLAGS=$vsim_flags DEBUG=OFF target=sim_ita_hwpe_tb \ + no_stalls=$no_stalls s=$s e=$e p=$p f=$f bias=$bias \ + activation=$activation mask=$masking i=$i + + # Check the simulation status + ./modelsim/return_status.sh "${SIM_PATH}/transcript" \ + "$s" "$e" "$p" "$f" ita_tb "$masking" "$i" >> $log_file + + # Format masking for directory name (e.g. "upper_strided" -> "UpperStrided") + formatted_masking="" + for word in ${masking//_/ }; do + formatted_masking+="${word^}" + done + + # echo "simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^}_${formatted_masking}_I${i}" >> $log_file + + # Remove the test vectors + # rm -rf simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^}_${formatted_masking}_I${i} + +done diff --git a/tests/hwpe_upper_triangle_test.sh b/tests/hwpe_upper_triangle_test.sh new file mode 100755 index 0000000..944d03b --- /dev/null +++ b/tests/hwpe_upper_triangle_test.sh @@ -0,0 +1,138 @@ +#!/bin/bash + +# Copyright 2023 ETH Zurich and University +# of Bologna. Licensed under the Apache License, +# Version 2.0, see LICENSE for details. +# SPDX-License-Identifier: Apache-2.0 + +echo "Testing ITA ..." + +# Set the log file +log_file=tests/logs/run_loop_$(date +%Y%m%d%H%M%S).log + +# Create folder and log file +mkdir -p tests/logs +touch $log_file + +# Activate the virtual environment +source venv/bin/activate + +# Set the simulation path +export buildpath=build +export SIM_PATH=modelsim/$buildpath + +# Set to -gui to use the GUI of QuestaSim +export vsim_flags=-c + +# Set the no_stalls if not set +if [ -z "$no_stalls" ]; then + no_stalls=0 + echo "No_stalls not set. Using default value: $no_stalls" +fi + +# Set the n_tests if not set +if [ -z "$n_tests" ]; then + n_tests=1 + echo "Granularity not set. Using default value: $n_tests" +fi + +# Log the parameters +echo "no_stalls=$no_stalls" >> $log_file +echo "n_tests=$n_tests" >> $log_file + +# List of masking names +masking_names=("upper_triangular") + +# List of activation names +activation_names=("identity") + +# Helper function: checks if a mask is one of the strided ones +is_strided_mask() { + case "$1" in + "strided"|"upper_strided"|"lower_strided"|"strided_sliding_window") + return 0 # True + ;; + *) + return 1 # False + ;; + esac +} + +# Run the tests +for test_idx in $(seq 1 $n_tests); do + # Randomly pick s, e, p, f in [2..512] + s=128 + e=64 + p=64 + f=64 + + # Pick one random masking + random_mask_idx=$((RANDOM % ${#masking_names[@]})) + masking=${masking_names[$random_mask_idx]} + + # Pick one random activation + random_activation_idx=$((RANDOM % ${#activation_names[@]})) + activation=${activation_names[$random_activation_idx]} + + # Pick one random bias (0 or 1) + bias=1 + + # Decide how to pick i based on whether masking is strided + if is_strided_mask "$masking"; then + # 1) We need i that is < s and also a power of two + valid_i_list=( $(powers_of_two_less_than_s $s) ) + + # If no valid i found, skip this iteration + if [ ${#valid_i_list[@]} -eq 0 ]; then + echo "No valid i for mask=$masking with s=$s (need i < s and i a power of two). Skipping..." + continue + fi + + # Pick a random valid i from the list + i=${valid_i_list[$((RANDOM % ${#valid_i_list[@]}))]} + else + # 2) Non-strided masks: pick i in [1 .. s-1] + if [ "$s" -le 1 ]; then + echo "No valid i for mask=$masking with s=$s (need i < s). Skipping..." + continue + fi + i=1 + # i=$((1 + (RANDOM % (s-1)))) + fi + + echo "Index is: $i (Masking = $masking, s=$s)" + + # Create test vectors (no-bias and bias) + echo "creating test vectors" + if [ "$bias" -eq 1 ]; then + python testGenerator.py -H 1 -S $s -P $p -E $e -F $f \ + --activation "$activation" --mask "$masking" -I "$i" + else + python testGenerator.py -H 1 -S $s -P $p -E $e -F $f \ + --activation "$activation" --mask "$masking" -I "$i" --no-bias + fi + + # Log the test + echo "Testing ita_tb: S=$s E=$e P=$p F=$f Activation=$activation Masking=$masking I=$i Bias=$bias" >> $log_file + + # Run the test + make sim VSIM_FLAGS=$vsim_flags DEBUG=ON target=sim_ita_hwpe_tb \ + no_stalls=$no_stalls s=$s e=$e p=$p f=$f bias=$bias \ + activation=$activation mask=$masking i=$i + + # Check the simulation status + ./modelsim/return_status.sh "${SIM_PATH}/transcript" \ + "$s" "$e" "$p" "$f" ita_tb "$masking" "$i" >> $log_file + + # Format masking for directory name (e.g. "upper_strided" -> "UpperStrided") + formatted_masking="" + for word in ${masking//_/ }; do + formatted_masking+="${word^}" + done + + # echo "simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^}_${formatted_masking}_I${i}" >> $log_file + + # Remove the test vectors + rm -rf simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^}_${formatted_masking}_I${i} + +done diff --git a/tests/masking_test.sh b/tests/masking_test.sh index 98c40cd..32a7292 100755 --- a/tests/masking_test.sh +++ b/tests/masking_test.sh @@ -22,7 +22,7 @@ export buildpath=build export SIM_PATH=modelsim/$buildpath # Set to -gui to use the GUI of QuestaSim -export vsim_flags=-c +export vsim_flags=-gui #-c # Set the no_stalls if not set if [ -z "$no_stalls" ]; then @@ -123,6 +123,7 @@ for test_idx in $(seq 1 $n_tests); do echo "Index is: $i (Masking = $masking, s=$s)" # Create test vectors (no-bias and bias) + echo "creating test vectors" if [ "$bias" -eq 1 ]; then python testGenerator.py -H 1 -S $s -P $p -E $e -F $f \ --activation "$activation" --mask "$masking" -I "$i" @@ -154,4 +155,4 @@ for test_idx in $(seq 1 $n_tests); do # Remove the test vectors rm -rf simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^}_${formatted_masking}_I${i} -done \ No newline at end of file +done diff --git a/tests/run.sh b/tests/run.sh index bf2201e..bdd41db 100755 --- a/tests/run.sh +++ b/tests/run.sh @@ -12,7 +12,7 @@ export buildpath=build export SIM_PATH=modelsim/$buildpath # Set to -gui to use the GUI of QuestaSim -export vsim_flags=-c +export vsim_flags=-gui #-c export target=ita_tb export no_stalls=0 @@ -35,5 +35,5 @@ then fi # Run the test -make sim VSIM_FLAGS=$vsim_flags DEBUG=OFF target=sim_$target no_stalls=$no_stalls s=$s e=$e p=$p f=$f bias=$bias activation=$activation +make sim VSIM_FLAGS=$vsim_flags DEBUG=ON target=sim_$target no_stalls=$no_stalls s=$s e=$e p=$p f=$f bias=$bias activation=$activation ./modelsim/return_status.sh ${SIM_PATH}/transcript $s $e $p $f $target diff --git a/tests/tests/hwpe_mask_test.sh b/tests/tests/hwpe_mask_test.sh new file mode 100755 index 0000000..07f9f54 --- /dev/null +++ b/tests/tests/hwpe_mask_test.sh @@ -0,0 +1,158 @@ +#!/bin/bash + +# Copyright 2023 ETH Zurich and University +# of Bologna. Licensed under the Apache License, +# Version 2.0, see LICENSE for details. +# SPDX-License-Identifier: Apache-2.0 + +echo "Testing ITA ..." + +# Set the log file +log_file=tests/logs/run_loop_$(date +%Y%m%d%H%M%S).log + +# Create folder and log file +mkdir -p tests/logs +touch $log_file + +# Activate the virtual environment +source venv/bin/activate + +# Set the simulation path +export buildpath=build +export SIM_PATH=modelsim/$buildpath + +# Set to -gui to use the GUI of QuestaSim +export vsim_flags=-c #-gui + +# Set the no_stalls if not set +if [ -z "$no_stalls" ]; then + no_stalls=0 + echo "No_stalls not set. Using default value: $no_stalls" +fi + +# Set the n_tests if not set +if [ -z "$n_tests" ]; then + n_tests=250 + echo "Granularity not set. Using default value: $n_tests" +fi + +# Log the parameters +echo "no_stalls=$no_stalls" >> $log_file +echo "n_tests=$n_tests" >> $log_file + +# List of masking names +masking_names=("upper_triangular" "lower_triangular" "strided" + "upper_strided" "lower_strided" + "sliding_window" "strided_sliding_window") + +# List of activation names +activation_names=("identity" "relu" "gelu") + +# Helper function: checks if a mask is one of the strided ones +is_strided_mask() { + case "$1" in + "strided"|"upper_strided"|"lower_strided"|"strided_sliding_window") + return 0 # True + ;; + *) + return 1 # False + ;; + esac +} + +# Helper function: returns all powers of two < s +# (2, 4, 8, 16, ...), stored in an array +powers_of_two_less_than_s() { + local limit=$1 + local val=1 + local results=() + + # If you also want to allow i=1 (which is 2^0), + # set val=1 and do while [ $val -lt $limit ] + # If you need strictly 2,4,8..., set val=2. + val=2 + while [ $val -lt $limit ]; do + results+=($val) + val=$((val*2)) + done + + echo "${results[@]}" +} + +# Run the tests +for test_idx in $(seq 1 $n_tests); do + # Randomly pick s, e, p, f in [2..512] + s=$((2 + RANDOM % 511)) + e=$((1 + RANDOM % 511)) + p=$((1 + RANDOM % 511)) + f=$((1 + RANDOM % 511)) + + # Pick one random masking + random_mask_idx=$((RANDOM % ${#masking_names[@]})) + masking=${masking_names[$random_mask_idx]} + + # Pick one random activation + random_activation_idx=$((RANDOM % ${#activation_names[@]})) + activation=${activation_names[$random_activation_idx]} + + # Pick one random bias (0 or 1) + bias=$((RANDOM % 2)) + + # Decide how to pick i based on whether masking is strided + if is_strided_mask "$masking"; then + # 1) We need i that is < s and also a power of two + valid_i_list=( $(powers_of_two_less_than_s $s) ) + + # If no valid i found, skip this iteration + if [ ${#valid_i_list[@]} -eq 0 ]; then + echo "No valid i for mask=$masking with s=$s (need i < s and i a power of two). Skipping..." + continue + fi + + # Pick a random valid i from the list + i=${valid_i_list[$((RANDOM % ${#valid_i_list[@]}))]} + else + # 2) Non-strided masks: pick i in [1 .. s-1] + if [ "$s" -le 1 ]; then + echo "No valid i for mask=$masking with s=$s (need i < s). Skipping..." + continue + fi + i=$((1 + (RANDOM % (s-1)))) + fi + + echo "Index is: $i (Masking = $masking, s=$s)" + + # Create test vectors (no-bias and bias) + echo "creating test vectors" + if [ "$bias" -eq 1 ]; then + python testGenerator.py -H 1 -S $s -P $p -E $e -F $f \ + --activation "$activation" --mask "$masking" -I "$i" + else + python testGenerator.py -H 1 -S $s -P $p -E $e -F $f \ + --activation "$activation" --mask "$masking" -I "$i" --no-bias + fi + + # Log the test + echo "Testing ita_tb: S=$s E=$e P=$p F=$f Activation=$activation Masking=$masking I=$i Bias=$bias" >> $log_file + + # Run the test + make sim VSIM_FLAGS=$vsim_flags DEBUG=OFF target=sim_ita_hwpe_tb \ + no_stalls=$no_stalls s=$s e=$e p=$p f=$f bias=$bias \ + activation=$activation mask=$masking i=$i + + # Check the simulation status + ./modelsim/return_status.sh "${SIM_PATH}/transcript" \ + "$s" "$e" "$p" "$f" ita_tb "$masking" "$i" >> $log_file + + # Format masking for directory name (e.g. "upper_strided" -> "UpperStrided") + formatted_masking="" + for word in ${masking//_/ }; do + formatted_masking+="${word^}" + done + + # echo "simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^}_${formatted_masking}_I${i}" >> $log_file + + # Remove the test vectors + # rm -rf simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^}_${formatted_masking}_I${i} + +done diff --git a/tests/tests/hwpe_upper_triangle_test.sh b/tests/tests/hwpe_upper_triangle_test.sh new file mode 100755 index 0000000..944d03b --- /dev/null +++ b/tests/tests/hwpe_upper_triangle_test.sh @@ -0,0 +1,138 @@ +#!/bin/bash + +# Copyright 2023 ETH Zurich and University +# of Bologna. Licensed under the Apache License, +# Version 2.0, see LICENSE for details. +# SPDX-License-Identifier: Apache-2.0 + +echo "Testing ITA ..." + +# Set the log file +log_file=tests/logs/run_loop_$(date +%Y%m%d%H%M%S).log + +# Create folder and log file +mkdir -p tests/logs +touch $log_file + +# Activate the virtual environment +source venv/bin/activate + +# Set the simulation path +export buildpath=build +export SIM_PATH=modelsim/$buildpath + +# Set to -gui to use the GUI of QuestaSim +export vsim_flags=-c + +# Set the no_stalls if not set +if [ -z "$no_stalls" ]; then + no_stalls=0 + echo "No_stalls not set. Using default value: $no_stalls" +fi + +# Set the n_tests if not set +if [ -z "$n_tests" ]; then + n_tests=1 + echo "Granularity not set. Using default value: $n_tests" +fi + +# Log the parameters +echo "no_stalls=$no_stalls" >> $log_file +echo "n_tests=$n_tests" >> $log_file + +# List of masking names +masking_names=("upper_triangular") + +# List of activation names +activation_names=("identity") + +# Helper function: checks if a mask is one of the strided ones +is_strided_mask() { + case "$1" in + "strided"|"upper_strided"|"lower_strided"|"strided_sliding_window") + return 0 # True + ;; + *) + return 1 # False + ;; + esac +} + +# Run the tests +for test_idx in $(seq 1 $n_tests); do + # Randomly pick s, e, p, f in [2..512] + s=128 + e=64 + p=64 + f=64 + + # Pick one random masking + random_mask_idx=$((RANDOM % ${#masking_names[@]})) + masking=${masking_names[$random_mask_idx]} + + # Pick one random activation + random_activation_idx=$((RANDOM % ${#activation_names[@]})) + activation=${activation_names[$random_activation_idx]} + + # Pick one random bias (0 or 1) + bias=1 + + # Decide how to pick i based on whether masking is strided + if is_strided_mask "$masking"; then + # 1) We need i that is < s and also a power of two + valid_i_list=( $(powers_of_two_less_than_s $s) ) + + # If no valid i found, skip this iteration + if [ ${#valid_i_list[@]} -eq 0 ]; then + echo "No valid i for mask=$masking with s=$s (need i < s and i a power of two). Skipping..." + continue + fi + + # Pick a random valid i from the list + i=${valid_i_list[$((RANDOM % ${#valid_i_list[@]}))]} + else + # 2) Non-strided masks: pick i in [1 .. s-1] + if [ "$s" -le 1 ]; then + echo "No valid i for mask=$masking with s=$s (need i < s). Skipping..." + continue + fi + i=1 + # i=$((1 + (RANDOM % (s-1)))) + fi + + echo "Index is: $i (Masking = $masking, s=$s)" + + # Create test vectors (no-bias and bias) + echo "creating test vectors" + if [ "$bias" -eq 1 ]; then + python testGenerator.py -H 1 -S $s -P $p -E $e -F $f \ + --activation "$activation" --mask "$masking" -I "$i" + else + python testGenerator.py -H 1 -S $s -P $p -E $e -F $f \ + --activation "$activation" --mask "$masking" -I "$i" --no-bias + fi + + # Log the test + echo "Testing ita_tb: S=$s E=$e P=$p F=$f Activation=$activation Masking=$masking I=$i Bias=$bias" >> $log_file + + # Run the test + make sim VSIM_FLAGS=$vsim_flags DEBUG=ON target=sim_ita_hwpe_tb \ + no_stalls=$no_stalls s=$s e=$e p=$p f=$f bias=$bias \ + activation=$activation mask=$masking i=$i + + # Check the simulation status + ./modelsim/return_status.sh "${SIM_PATH}/transcript" \ + "$s" "$e" "$p" "$f" ita_tb "$masking" "$i" >> $log_file + + # Format masking for directory name (e.g. "upper_strided" -> "UpperStrided") + formatted_masking="" + for word in ${masking//_/ }; do + formatted_masking+="${word^}" + done + + # echo "simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^}_${formatted_masking}_I${i}" >> $log_file + + # Remove the test vectors + rm -rf simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^}_${formatted_masking}_I${i} + +done diff --git a/tests/tests/masking_test.sh b/tests/tests/masking_test.sh new file mode 100755 index 0000000..32a7292 --- /dev/null +++ b/tests/tests/masking_test.sh @@ -0,0 +1,158 @@ +#!/bin/bash + +# Copyright 2023 ETH Zurich and University +# of Bologna. Licensed under the Apache License, +# Version 2.0, see LICENSE for details. +# SPDX-License-Identifier: Apache-2.0 + +echo "Testing ITA ..." + +# Set the log file +log_file=tests/logs/run_loop_$(date +%Y%m%d%H%M%S).log + +# Create folder and log file +mkdir -p tests/logs +touch $log_file + +# Activate the virtual environment +source venv/bin/activate + +# Set the simulation path +export buildpath=build +export SIM_PATH=modelsim/$buildpath + +# Set to -gui to use the GUI of QuestaSim +export vsim_flags=-gui #-c + +# Set the no_stalls if not set +if [ -z "$no_stalls" ]; then + no_stalls=0 + echo "No_stalls not set. Using default value: $no_stalls" +fi + +# Set the n_tests if not set +if [ -z "$n_tests" ]; then + n_tests=250 + echo "Granularity not set. Using default value: $n_tests" +fi + +# Log the parameters +echo "no_stalls=$no_stalls" >> $log_file +echo "n_tests=$n_tests" >> $log_file + +# List of masking names +masking_names=("upper_triangular" "lower_triangular" "strided" + "upper_strided" "lower_strided" + "sliding_window" "strided_sliding_window") + +# List of activation names +activation_names=("identity" "relu" "gelu") + +# Helper function: checks if a mask is one of the strided ones +is_strided_mask() { + case "$1" in + "strided"|"upper_strided"|"lower_strided"|"strided_sliding_window") + return 0 # True + ;; + *) + return 1 # False + ;; + esac +} + +# Helper function: returns all powers of two < s +# (2, 4, 8, 16, ...), stored in an array +powers_of_two_less_than_s() { + local limit=$1 + local val=1 + local results=() + + # If you also want to allow i=1 (which is 2^0), + # set val=1 and do while [ $val -lt $limit ] + # If you need strictly 2,4,8..., set val=2. + val=2 + while [ $val -lt $limit ]; do + results+=($val) + val=$((val*2)) + done + + echo "${results[@]}" +} + +# Run the tests +for test_idx in $(seq 1 $n_tests); do + # Randomly pick s, e, p, f in [2..512] + s=$((2 + RANDOM % 511)) + e=$((1 + RANDOM % 511)) + p=$((1 + RANDOM % 511)) + f=$((1 + RANDOM % 511)) + + # Pick one random masking + random_mask_idx=$((RANDOM % ${#masking_names[@]})) + masking=${masking_names[$random_mask_idx]} + + # Pick one random activation + random_activation_idx=$((RANDOM % ${#activation_names[@]})) + activation=${activation_names[$random_activation_idx]} + + # Pick one random bias (0 or 1) + bias=$((RANDOM % 2)) + + # Decide how to pick i based on whether masking is strided + if is_strided_mask "$masking"; then + # 1) We need i that is < s and also a power of two + valid_i_list=( $(powers_of_two_less_than_s $s) ) + + # If no valid i found, skip this iteration + if [ ${#valid_i_list[@]} -eq 0 ]; then + echo "No valid i for mask=$masking with s=$s (need i < s and i a power of two). Skipping..." + continue + fi + + # Pick a random valid i from the list + i=${valid_i_list[$((RANDOM % ${#valid_i_list[@]}))]} + else + # 2) Non-strided masks: pick i in [1 .. s-1] + if [ "$s" -le 1 ]; then + echo "No valid i for mask=$masking with s=$s (need i < s). Skipping..." + continue + fi + i=$((1 + (RANDOM % (s-1)))) + fi + + echo "Index is: $i (Masking = $masking, s=$s)" + + # Create test vectors (no-bias and bias) + echo "creating test vectors" + if [ "$bias" -eq 1 ]; then + python testGenerator.py -H 1 -S $s -P $p -E $e -F $f \ + --activation "$activation" --mask "$masking" -I "$i" + else + python testGenerator.py -H 1 -S $s -P $p -E $e -F $f \ + --activation "$activation" --mask "$masking" -I "$i" --no-bias + fi + + # Log the test + echo "Testing ita_tb: S=$s E=$e P=$p F=$f Activation=$activation Masking=$masking I=$i Bias=$bias" >> $log_file + + # Run the test + make sim VSIM_FLAGS=$vsim_flags DEBUG=OFF target=sim_ita_tb \ + no_stalls=$no_stalls s=$s e=$e p=$p f=$f bias=$bias \ + activation=$activation mask=$masking i=$i + + # Check the simulation status + ./modelsim/return_status.sh "${SIM_PATH}/transcript" \ + "$s" "$e" "$p" "$f" ita_tb "$masking" "$i" >> $log_file + + # Format masking for directory name (e.g. "upper_strided" -> "UpperStrided") + formatted_masking="" + for word in ${masking//_/ }; do + formatted_masking+="${word^}" + done + + # echo "simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^}_${formatted_masking}_I${i}" >> $log_file + + # Remove the test vectors + rm -rf simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^}_${formatted_masking}_I${i} + +done diff --git a/tests/tests/run.sh b/tests/tests/run.sh new file mode 100755 index 0000000..bdd41db --- /dev/null +++ b/tests/tests/run.sh @@ -0,0 +1,39 @@ +#!/bin/bash + +# Copyright 2023 ETH Zurich and University of Bologna. +# Licensed under the Apache License, Version 2.0, see LICENSE for details. +# SPDX-License-Identifier: Apache-2.0 + +echo "Testing ITA ..." + +source venv/bin/activate + +export buildpath=build +export SIM_PATH=modelsim/$buildpath + +# Set to -gui to use the GUI of QuestaSim +export vsim_flags=-gui #-c + +export target=ita_tb +export no_stalls=0 +export s=64 +export e=64 +export p=64 +export f=64 +export bias=1 +export activation=identity + +# Create test vectors if don't exist +if [ ! -d simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^} ] +then + if [ $bias -eq 1 ] + then + python testGenerator.py -H 1 -S $s -P $p -E $e -F $f --activation $activation + else + python testGenerator.py -H 1 -S $s -P $p -E $e -F $f --activation $activation --no-bias + fi +fi + +# Run the test +make sim VSIM_FLAGS=$vsim_flags DEBUG=ON target=sim_$target no_stalls=$no_stalls s=$s e=$e p=$p f=$f bias=$bias activation=$activation +./modelsim/return_status.sh ${SIM_PATH}/transcript $s $e $p $f $target diff --git a/tests/tests/run_loop.sh b/tests/tests/run_loop.sh new file mode 100755 index 0000000..2b563e1 --- /dev/null +++ b/tests/tests/run_loop.sh @@ -0,0 +1,87 @@ +#!/bin/bash + +# Copyright 2023 ETH Zurich and University of Bologna. +# Licensed under the Apache License, Version 2.0, see LICENSE for details. +# SPDX-License-Identifier: Apache-2.0 + +echo "Testing ITA ..." + +# Set the log file +log_file=tests/logs/run_loop_$(date +%Y%m%d%H%M%S).log + +# Create folder and log file +mkdir -p tests/logs +touch $log_file + +# Activate the virtual environment +source venv/bin/activate + +# Set the simulation path +export buildpath=build +export SIM_PATH=modelsim/$buildpath + +# Set to -gui to use the GUI of QuestaSim +export vsim_flags=-c + +# Set the no_stalls if not set +if [ -z "$no_stalls" ] +then + no_stalls=0 + echo "No_stalls not set. Using default value: $no_stalls" +fi + +# Set the granularity if not set +if [ -z "$granularity" ] +then + granularity=256 + echo "Granularity not set. Using default value: $granularity" +else + # check if the granularity is a multiple of 64 and less than or equal to 512 + if [ $((granularity % 64)) -ne 0 ] || [ $granularity -gt 512 ] + then + echo "Granularity must be a multiple of 64 and less than or equal to 512." + exit 1 + fi +fi + +# Log the parameters +echo "no_stalls=$no_stalls" >> $log_file +echo "granularity=$granularity" >> $log_file + +# Run the tests +for s in $(eval echo "{$granularity..512..$granularity}") +do + for e in $(eval echo "{$granularity..512..$granularity}") + do + for p in $(eval echo "{$granularity..512..$granularity}") + do + for f in $(eval echo "{$granularity..512..$granularity}") + do + for activation in {identity,relu,gelu} + do + # Create test vectors + python testGenerator.py -H 1 -S $s -P $p -E $e -F $f --activation $activation --no-bias + python testGenerator.py -H 1 -S $s -P $p -E $e -F $f --activation $activation + + for target in {ita_tb,ita_hwpe_tb} + do + for bias in {0..1} + do + # Log the test + echo "Testing $target: S=$s E=$e P=$p F=$f Activation=$activation bias=$bias" >> $log_file + + # Run the test + make sim VSIM_FLAGS=$vsim_flags DEBUG=OFF target=sim_$target no_stalls=$no_stalls s=$s e=$e p=$p f=$f bias=$bias activation=$activation + ./modelsim/return_status.sh ${SIM_PATH}/transcript $s $e $p $f $target >> $log_file + + # read -p "Press Enter to continue" + + # Remove the test vectors + rm -rf simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^} + done + done + done + done + done + done +done diff --git a/tests/tests/upper_triangle_test.sh b/tests/tests/upper_triangle_test.sh new file mode 100755 index 0000000..05e526b --- /dev/null +++ b/tests/tests/upper_triangle_test.sh @@ -0,0 +1,138 @@ +#!/bin/bash + +# Copyright 2023 ETH Zurich and University +# of Bologna. Licensed under the Apache License, +# Version 2.0, see LICENSE for details. +# SPDX-License-Identifier: Apache-2.0 + +echo "Testing ITA ..." + +# Set the log file +log_file=tests/logs/run_loop_$(date +%Y%m%d%H%M%S).log + +# Create folder and log file +mkdir -p tests/logs +touch $log_file + +# Activate the virtual environment +source venv/bin/activate + +# Set the simulation path +export buildpath=build +export SIM_PATH=modelsim/$buildpath + +# Set to -gui to use the GUI of QuestaSim +export vsim_flags=-gui #-c + +# Set the no_stalls if not set +if [ -z "$no_stalls" ]; then + no_stalls=0 + echo "No_stalls not set. Using default value: $no_stalls" +fi + +# Set the n_tests if not set +if [ -z "$n_tests" ]; then + n_tests=1 + echo "Granularity not set. Using default value: $n_tests" +fi + +# Log the parameters +echo "no_stalls=$no_stalls" >> $log_file +echo "n_tests=$n_tests" >> $log_file + +# List of masking names +masking_names=("upper_triangular") + +# List of activation names +activation_names=("identity") + +# Helper function: checks if a mask is one of the strided ones +is_strided_mask() { + case "$1" in + "strided"|"upper_strided"|"lower_strided"|"strided_sliding_window") + return 0 # True + ;; + *) + return 1 # False + ;; + esac +} + +# Run the tests +for test_idx in $(seq 1 $n_tests); do + # Randomly pick s, e, p, f in [2..512] + s=128 + e=64 + p=64 + f=64 + + # Pick one random masking + random_mask_idx=$((RANDOM % ${#masking_names[@]})) + masking=${masking_names[$random_mask_idx]} + + # Pick one random activation + random_activation_idx=$((RANDOM % ${#activation_names[@]})) + activation=${activation_names[$random_activation_idx]} + + # Pick one random bias (0 or 1) + bias=1 + + # Decide how to pick i based on whether masking is strided + if is_strided_mask "$masking"; then + # 1) We need i that is < s and also a power of two + valid_i_list=( $(powers_of_two_less_than_s $s) ) + + # If no valid i found, skip this iteration + if [ ${#valid_i_list[@]} -eq 0 ]; then + echo "No valid i for mask=$masking with s=$s (need i < s and i a power of two). Skipping..." + continue + fi + + # Pick a random valid i from the list + i=${valid_i_list[$((RANDOM % ${#valid_i_list[@]}))]} + else + # 2) Non-strided masks: pick i in [1 .. s-1] + if [ "$s" -le 1 ]; then + echo "No valid i for mask=$masking with s=$s (need i < s). Skipping..." + continue + fi + i=1 + # i=$((1 + (RANDOM % (s-1)))) + fi + + echo "Index is: $i (Masking = $masking, s=$s)" + + # Create test vectors (no-bias and bias) + echo "creating test vectors" + if [ "$bias" -eq 1 ]; then + python testGenerator.py -H 1 -S $s -P $p -E $e -F $f \ + --activation "$activation" --mask "$masking" -I "$i" + else + python testGenerator.py -H 1 -S $s -P $p -E $e -F $f \ + --activation "$activation" --mask "$masking" -I "$i" --no-bias + fi + + # Log the test + echo "Testing ita_tb: S=$s E=$e P=$p F=$f Activation=$activation Masking=$masking I=$i Bias=$bias" >> $log_file + + # Run the test + make sim VSIM_FLAGS=$vsim_flags DEBUG=ON target=sim_ita_tb \ + no_stalls=$no_stalls s=$s e=$e p=$p f=$f bias=$bias \ + activation=$activation mask=$masking i=$i + + # Check the simulation status + ./modelsim/return_status.sh "${SIM_PATH}/transcript" \ + "$s" "$e" "$p" "$f" ita_tb "$masking" "$i" >> $log_file + + # Format masking for directory name (e.g. "upper_strided" -> "UpperStrided") + formatted_masking="" + for word in ${masking//_/ }; do + formatted_masking+="${word^}" + done + + # echo "simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^}_${formatted_masking}_I${i}" >> $log_file + + # Remove the test vectors + rm -rf simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^}_${formatted_masking}_I${i} + +done diff --git a/tests/upper_triangle_test.sh b/tests/upper_triangle_test.sh new file mode 100755 index 0000000..05e526b --- /dev/null +++ b/tests/upper_triangle_test.sh @@ -0,0 +1,138 @@ +#!/bin/bash + +# Copyright 2023 ETH Zurich and University +# of Bologna. Licensed under the Apache License, +# Version 2.0, see LICENSE for details. +# SPDX-License-Identifier: Apache-2.0 + +echo "Testing ITA ..." + +# Set the log file +log_file=tests/logs/run_loop_$(date +%Y%m%d%H%M%S).log + +# Create folder and log file +mkdir -p tests/logs +touch $log_file + +# Activate the virtual environment +source venv/bin/activate + +# Set the simulation path +export buildpath=build +export SIM_PATH=modelsim/$buildpath + +# Set to -gui to use the GUI of QuestaSim +export vsim_flags=-gui #-c + +# Set the no_stalls if not set +if [ -z "$no_stalls" ]; then + no_stalls=0 + echo "No_stalls not set. Using default value: $no_stalls" +fi + +# Set the n_tests if not set +if [ -z "$n_tests" ]; then + n_tests=1 + echo "Granularity not set. Using default value: $n_tests" +fi + +# Log the parameters +echo "no_stalls=$no_stalls" >> $log_file +echo "n_tests=$n_tests" >> $log_file + +# List of masking names +masking_names=("upper_triangular") + +# List of activation names +activation_names=("identity") + +# Helper function: checks if a mask is one of the strided ones +is_strided_mask() { + case "$1" in + "strided"|"upper_strided"|"lower_strided"|"strided_sliding_window") + return 0 # True + ;; + *) + return 1 # False + ;; + esac +} + +# Run the tests +for test_idx in $(seq 1 $n_tests); do + # Randomly pick s, e, p, f in [2..512] + s=128 + e=64 + p=64 + f=64 + + # Pick one random masking + random_mask_idx=$((RANDOM % ${#masking_names[@]})) + masking=${masking_names[$random_mask_idx]} + + # Pick one random activation + random_activation_idx=$((RANDOM % ${#activation_names[@]})) + activation=${activation_names[$random_activation_idx]} + + # Pick one random bias (0 or 1) + bias=1 + + # Decide how to pick i based on whether masking is strided + if is_strided_mask "$masking"; then + # 1) We need i that is < s and also a power of two + valid_i_list=( $(powers_of_two_less_than_s $s) ) + + # If no valid i found, skip this iteration + if [ ${#valid_i_list[@]} -eq 0 ]; then + echo "No valid i for mask=$masking with s=$s (need i < s and i a power of two). Skipping..." + continue + fi + + # Pick a random valid i from the list + i=${valid_i_list[$((RANDOM % ${#valid_i_list[@]}))]} + else + # 2) Non-strided masks: pick i in [1 .. s-1] + if [ "$s" -le 1 ]; then + echo "No valid i for mask=$masking with s=$s (need i < s). Skipping..." + continue + fi + i=1 + # i=$((1 + (RANDOM % (s-1)))) + fi + + echo "Index is: $i (Masking = $masking, s=$s)" + + # Create test vectors (no-bias and bias) + echo "creating test vectors" + if [ "$bias" -eq 1 ]; then + python testGenerator.py -H 1 -S $s -P $p -E $e -F $f \ + --activation "$activation" --mask "$masking" -I "$i" + else + python testGenerator.py -H 1 -S $s -P $p -E $e -F $f \ + --activation "$activation" --mask "$masking" -I "$i" --no-bias + fi + + # Log the test + echo "Testing ita_tb: S=$s E=$e P=$p F=$f Activation=$activation Masking=$masking I=$i Bias=$bias" >> $log_file + + # Run the test + make sim VSIM_FLAGS=$vsim_flags DEBUG=ON target=sim_ita_tb \ + no_stalls=$no_stalls s=$s e=$e p=$p f=$f bias=$bias \ + activation=$activation mask=$masking i=$i + + # Check the simulation status + ./modelsim/return_status.sh "${SIM_PATH}/transcript" \ + "$s" "$e" "$p" "$f" ita_tb "$masking" "$i" >> $log_file + + # Format masking for directory name (e.g. "upper_strided" -> "UpperStrided") + formatted_masking="" + for word in ${masking//_/ }; do + formatted_masking+="${word^}" + done + + # echo "simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^}_${formatted_masking}_I${i}" >> $log_file + + # Remove the test vectors + rm -rf simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^}_${formatted_masking}_I${i} + +done From 2443aee5c62758c7521a1334b919ed300d043e62 Mon Sep 17 00:00:00 2001 From: Ludi-1 Date: Wed, 26 Feb 2025 12:57:39 +0100 Subject: [PATCH 55/60] mask working in hwpe tb --- src/hwpe/.ita_hwpe_ctrl.sv.swp | Bin 0 -> 24576 bytes src/hwpe/.ita_hwpe_package.sv.swp | Bin 0 -> 16384 bytes src/hwpe/ita_hwpe_ctrl.sv | 8 ++++- src/hwpe/ita_hwpe_package.sv | 8 +++-- src/hwpe/tb/.ita_hwpe_tb.sv.swp | Bin 0 -> 73728 bytes src/hwpe/tb/ita_hwpe_tb.sv | 48 ++++++++++++++++++++++++------ 6 files changed, 51 insertions(+), 13 deletions(-) create mode 100644 src/hwpe/.ita_hwpe_ctrl.sv.swp create mode 100644 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zyEE4_I=qJ^n9N%PZDMTGiF^C{MzW*!@Q5&+HVJb_14~m=j@iMT{e#&C9K$!jkfW|- zXe({R+^ido*V7rv+^W%#t)1MX+<4~jayjEL%Zbl3w+Bg# z?y46=9q*21^X~2$?LW}1V*m|j_wDZ_n$zKEGHpxMcGIb_?O2j+ z=d#%n5h_OroKY>{rE0tU(d^i20WZaN`2$%;d31f&h;88UkKTH+Rm0sw9N=RktfZv> z8{O@MnH<_bnj0D&rp$P8)~+M5!6LIZgJo9F&RIaB%%sxp3L($TGW^CRn2?iF w2K^bYuxCiAFC@Ge6w^p5VIlNx<3hOT-`> 8; ita_reg_rqs_val[4] = ita_reg_rqs_val[4] >> 8; end - ita_compute_step(K, ita_reg_tiles_val, ita_reg_rqs_val, ita_reg_gelu_b_c_val, ita_reg_activation_rqs_val, clk); + ita_compute_step(K, ita_reg_tiles_val, ita_reg_rqs_val, ita_reg_gelu_b_c_val, ita_reg_activation_rqs_val, ita_reg_dims_val, ita_reg_mask_val, clk); // 3: Step V if (SINGLE_ATTENTION == 1) begin @@ -382,7 +386,7 @@ endfunction ita_reg_rqs_val[2] = ita_reg_rqs_val[2] >> 8; ita_reg_rqs_val[4] = ita_reg_rqs_val[4] >> 8; end - ita_compute_step(V, ita_reg_tiles_val, ita_reg_rqs_val, ita_reg_gelu_b_c_val, ita_reg_activation_rqs_val, clk); + ita_compute_step(V, ita_reg_tiles_val, ita_reg_rqs_val, ita_reg_gelu_b_c_val, ita_reg_activation_rqs_val, ita_reg_dims_val, ita_reg_mask_val, clk); if (SINGLE_ATTENTION == 1) begin // Reset the RQS values @@ -397,7 +401,7 @@ endfunction BASE_PTR_OUTPUT[AV] = BASE_PTR[19] + group * N_TILES_OUTER_X[AV] * N_ELEMENTS_PER_TILE; // 4: Step QK - ita_compute_step(QK, ita_reg_tiles_val, ita_reg_rqs_val, ita_reg_gelu_b_c_val, ita_reg_activation_rqs_val, clk); + ita_compute_step(QK, ita_reg_tiles_val, ita_reg_rqs_val, ita_reg_gelu_b_c_val, ita_reg_activation_rqs_val, ita_reg_dims_val, ita_reg_mask_val, clk); // WIESEP: Hack to ensure that during the last tile of AV, the weight pointer is set correctly if (group == N_TILES_SEQUENCE_DIM-1) begin @@ -405,7 +409,7 @@ endfunction end // 5: Step AV - ita_compute_step(AV, ita_reg_tiles_val, ita_reg_rqs_val, ita_reg_gelu_b_c_val, ita_reg_activation_rqs_val, clk); + ita_compute_step(AV, ita_reg_tiles_val, ita_reg_rqs_val, ita_reg_gelu_b_c_val, ita_reg_activation_rqs_val, ita_reg_dims_val, ita_reg_mask_val, clk); end // 6: Step OW @@ -417,7 +421,7 @@ endfunction ita_reg_rqs_val[2] = ita_reg_rqs_val[3] >> 8; ita_reg_rqs_val[4] = ita_reg_rqs_val[5] >> 8; end - ita_compute_step(OW, ita_reg_tiles_val, ita_reg_rqs_val, ita_reg_gelu_b_c_val, ita_reg_activation_rqs_val, clk); + ita_compute_step(OW, ita_reg_tiles_val, ita_reg_rqs_val, ita_reg_gelu_b_c_val, ita_reg_activation_rqs_val, ita_reg_dims_val, ita_reg_mask_val, clk); // 7: Step FF1 if (SINGLE_ATTENTION == 1) begin @@ -428,7 +432,7 @@ endfunction ita_reg_rqs_val[2] = ita_reg_rqs_val[3] >> 16; ita_reg_rqs_val[4] = ita_reg_rqs_val[5] >> 16; end - ita_compute_step(F1, ita_reg_tiles_val, ita_reg_rqs_val, ita_reg_gelu_b_c_val, ita_reg_activation_rqs_val, clk); + ita_compute_step(F1, ita_reg_tiles_val, ita_reg_rqs_val, ita_reg_gelu_b_c_val, ita_reg_activation_rqs_val, ita_reg_dims_val, ita_reg_mask_val, clk); // 8: Step FF2 if (SINGLE_ATTENTION == 1) begin @@ -439,7 +443,7 @@ endfunction ita_reg_rqs_val[2] = ita_reg_rqs_val[3] >> 24; ita_reg_rqs_val[4] = ita_reg_rqs_val[5] >> 24; end - ita_compute_step(F2, ita_reg_tiles_val, ita_reg_rqs_val, ita_reg_gelu_b_c_val, ita_reg_activation_rqs_val, clk); + ita_compute_step(F2, ita_reg_tiles_val, ita_reg_rqs_val, ita_reg_gelu_b_c_val, ita_reg_activation_rqs_val, ita_reg_dims_val, ita_reg_mask_val, clk); // Wait for the last step to finish wait(evt); @@ -468,6 +472,8 @@ endfunction input logic [5:0][31:0] ita_reg_rqs_val, input logic [31:0] ita_reg_gelu_b_c_val, input logic [31:0] ita_reg_activation_rqs_val, + input logic [1:0][31:0] ita_reg_dims_val, + input logic [31:0] ita_reg_mask_val, ref logic clk_i ); @@ -518,7 +524,7 @@ endfunction $display(" - ITA Reg En 0x%0h, Ctrl Stream Val 0x%0h, Weight Ptr En %0d, Bias Ptr En %0d", ita_reg_en, ctrl_stream_val, weight_ptr_en, bias_ptr_en); // Program ITA - PROGRAM_ITA(input_ptr, weight_ptr0, weight_ptr1, weight_ptr_en, bias_ptr, bias_ptr_en, output_ptr, ita_reg_tiles_val, ita_reg_rqs_val, ita_reg_gelu_b_c_val, ita_reg_activation_rqs_val, ita_reg_en, ctrl_engine_val, ctrl_stream_val, clk_i); + PROGRAM_ITA(input_ptr, weight_ptr0, weight_ptr1, weight_ptr_en, bias_ptr, bias_ptr_en, output_ptr, ita_reg_tiles_val, ita_reg_rqs_val, ita_reg_gelu_b_c_val, ita_reg_activation_rqs_val, ita_reg_en, ctrl_engine_val, ctrl_stream_val, ita_reg_dims_val, ita_reg_mask_val, clk_i); // Wait for ITA to finish @(posedge clk_i); @@ -744,6 +750,25 @@ endfunction activation_requant_reg = activation_requant_mult | activation_requant_shift << 8 | activation_requant_add << 16; endtask + task automatic ita_reg_dims_compute( + input integer seq_length, + input integer proj_space, + input integer embed_size, + input integer ff_size, + output logic [1:0][31:0] reg_val + ); + reg_val[0] = seq_length | proj_space << 10; + reg_val[1] = embed_size | ff_size << 10; + endtask + + task automatic ita_reg_mask_compute( + input mask_e mask_type, + input integer mask_start_index, + output logic [31:0] reg_val + ); + reg_val = mask_type | mask_start_index << 3; + endtask + task automatic read_activation_constants( output gelu_const_t gelu_b, output gelu_const_t gelu_c, @@ -862,6 +887,8 @@ endfunction input logic ita_reg_en, input logic [31:0] ctrl_engine_val, input logic [31:0] ctrl_stream_val, + input logic [2:0][31:0] ita_reg_dims_val, + input logic [31:0] ita_reg_mask_val, ref logic clk_i ); PERIPH_WRITE( 4*ITA_REG_INPUT_PTR, ITA_REG_OFFSET, input_ptr, clk_i); @@ -882,6 +909,9 @@ endfunction PERIPH_WRITE( 4*ITA_REG_ADD1, ITA_REG_OFFSET, ita_reg_rqs_val[5], clk_i); PERIPH_WRITE( 4*ITA_REG_GELU_B_C, ITA_REG_OFFSET, ita_reg_gelu_b_c_val, clk_i); PERIPH_WRITE( 4*ITA_REG_ACTIVATION_REQUANT, ITA_REG_OFFSET, ita_reg_activation_rqs_val, clk_i); + PERIPH_WRITE( 4*ITA_REG_SEQ_PROJ_LENGTH, ITA_REG_OFFSET, ita_reg_dims_val[0], clk_i); + PERIPH_WRITE( 4*ITA_REG_EMBED_FF_SIZE, ITA_REG_OFFSET, ita_reg_dims_val[1], clk_i); + PERIPH_WRITE( 4*ITA_REG_MASK, ITA_REG_OFFSET, ita_reg_mask_val, clk_i); end PERIPH_WRITE( 4*ITA_REG_CTRL_ENGINE, ITA_REG_OFFSET, ctrl_engine_val, clk_i); From ca34e729f57f16534a7c45c35200f748718cc4ff Mon Sep 17 00:00:00 2001 From: Ludi-1 Date: Mon, 3 Mar 2025 16:44:41 +0100 Subject: [PATCH 56/60] clean up code and repo --- src/hwpe/.ita_hwpe_ctrl.sv.swp | Bin 24576 -> 0 bytes src/hwpe/.ita_hwpe_package.sv.swp | Bin 16384 -> 0 bytes src/hwpe/tb/.ita_hwpe_tb.sv.swp | Bin 73728 -> 0 bytes src/ita_masking.sv | 241 +++++++++--------------- tests/hwpe_mask_test.sh | 158 ---------------- tests/hwpe_upper_triangle_test.sh | 138 -------------- tests/masking_test.sh | 8 +- tests/tests/hwpe_mask_test.sh | 158 ---------------- tests/tests/hwpe_upper_triangle_test.sh | 138 -------------- tests/tests/masking_test.sh | 158 ---------------- tests/tests/run.sh | 39 ---- tests/tests/run_loop.sh | 87 --------- tests/tests/upper_triangle_test.sh | 138 -------------- tests/upper_triangle_test.sh | 138 -------------- 14 files changed, 94 insertions(+), 1307 deletions(-) delete mode 100644 src/hwpe/.ita_hwpe_ctrl.sv.swp delete mode 100644 src/hwpe/.ita_hwpe_package.sv.swp delete mode 100644 src/hwpe/tb/.ita_hwpe_tb.sv.swp delete mode 100755 tests/hwpe_mask_test.sh delete mode 100755 tests/hwpe_upper_triangle_test.sh delete mode 100755 tests/tests/hwpe_mask_test.sh delete mode 100755 tests/tests/hwpe_upper_triangle_test.sh delete mode 100755 tests/tests/masking_test.sh delete mode 100755 tests/tests/run.sh delete mode 100755 tests/tests/run_loop.sh delete mode 100755 tests/tests/upper_triangle_test.sh delete mode 100755 tests/upper_triangle_test.sh diff --git a/src/hwpe/.ita_hwpe_ctrl.sv.swp b/src/hwpe/.ita_hwpe_ctrl.sv.swp deleted file mode 100644 index 8ffb997c77ec8390571858a19f5b29433958c681..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 24576 zcmeHOYm6jS6)q42c^Ux?MD#8QJF`2}Gu^Y#UKV#Ay|XPdy~|9`E;0_4n(peJV!OL~ zyQ+70*3AMM!vdnejEg^r8bt%5F@eAzR#%V^31GmtM)`yBwFn8uXncL=-dojGHQim+ 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z0t;Xew1X#uCxFkR^UL{xuLsWs=Yek_&rgFpz-{35K=%A!0Yuj4gI|b`9WC)c_N-dA z#>oAl?=!wvh?P;Ep2o)HG!9Fr4-JjR+`1qf=G8+Yn zC(8(1niiA};N~J#&qm)&LZGo+mKA6?YKsfZ5 zrgVGRT`7lW=hbl?$BIq(6)lBmZYybYSr>UOs9Gpo8iu-D`P$3qX4O}Mi z$lP#_-z1})f~%H!ckC*2EPLeU(1%1=F>q{g(BTZmF=rAWPIRdzK59j{43)1`ipL6a zUx+oi$}#R7n_0#VJ$aJjGqFaOT}>@pdxOcJ*sYf!_wH(SQO97LUYwgVlGpb@RGOjS z&7J4nH_N$Wf^qc=H8({?5X#Poz|B3I3F%a;n}VWwL-E;n!eHK5@i1L#N~!OTV2CX> zrzAz4`EQw1#)kVxvwBitT<7O>*g&2eO!Y?8J!KYb7N=sfPI&H!7PdbNrPbzj5*uPT zyEE4_I=qJ^n9N%PZDMTGiF^C{MzW*!@Q5&+HVJb_14~m=j@iMT{e#&C9K$!jkfW|- zXe({R+^ido*V7rv+^W%#t)1MX+<4~jayjEL%Zbl3w+Bg# z?y46=9q*21^X~2$?LW}1V*m|j_wDZ_n$zKEGHpxMcGIb_?O2j+ z=d#%n5h_OroKY>{rE0tU(d^i20WZaN`2$%;d31f&h;88UkKTH+Rm0sw9N=RktfZv> z8{O@MnH<_bnj0D&rp$P8)~+M5!6LIZgJo9F&RIaB%%sxp3L($TGW^CRn2?iF w2K^bYuxCiAFC@Ge6w^p5VIlNx<3hOT-`= mask_pos_q) && (count_i < (mask_pos_q + N))) begin - if ((count_i & (M-1)) == (M-1) && !(((count_i + mask_col_offset_q) & (N-1)) == (N-1))) begin + if ((count_i & (M - 1)) == (M - 1)) begin mask_tile_y_pos_d = tile_y_i + 1'b1; mask_tile_x_pos_d = tile_x_i; - mask_pos_d = ((count_i + (((ctrl_i.tile_s * (M*M/N)) - M) + 1)) & ((M*M/N)-1)); - end else if ((count_i & (M-1)) == (M-1) && (((count_i + mask_col_offset_q) & (N-1)) == (N-1))) begin - if ((count_i / M) == ((M / N) - 1)) begin - mask_tile_y_pos_d = tile_y_i + 1'b1; - mask_tile_x_pos_d = tile_x_i + 1'b1; - mask_pos_d = ((count_i + ((ctrl_i.tile_s * (M*M/N)) + 1)) & ((M*M/N)-1)); + if (((count_i + mask_col_offset_q) & (N-1)) == (N-1)) begin + mask_pos_d = ((count_i + 1) & ((M*M/N)-1)); + if ((count_i / M) == ((M / N) - 1)) begin + mask_tile_x_pos_d = tile_x_i + 1'b1; + end end else begin - mask_tile_y_pos_d = tile_y_i + 1'b1; - mask_tile_x_pos_d = tile_x_i; - mask_pos_d = ((count_i + ((ctrl_i.tile_s * (M*M/N)) + 1)) & ((M*M/N)-1)); + mask_pos_d = ((count_i + (((ctrl_i.tile_s * (M*M/N)) - M) + 1)) & ((M*M/N)-1)); end - end else if (((count_i + mask_col_offset_q) & (N - 1)) == (N - 1)) begin + end else if (((count_i + mask_col_offset_q) & (N-1)) == (N-1)) begin mask_pos_d = (mask_pos_q + (N - ((mask_pos_q + mask_col_offset_q) & (N-1))) + M) & ((M*M/N)-1); end for (int i = 0; i < N; i++) begin @@ -76,50 +70,39 @@ module ita_masking end end end else if ((count_i & (M - 1)) < (mask_pos_q & (M - 1))) begin - for (int i = 0; i < N; i++) begin - mask_d[i] = 1'b1; - end - end - end else if (mask_tile_x_pos_q <= tile_x_i && mask_tile_y_pos_q != tile_y_i && last_inner_tile_i == 1'b1) begin - for (int i = 0; i < N; i++) begin - mask_d[i] = 1'b1; - end - end else if (mask_tile_x_pos_q != tile_x_i && mask_tile_y_pos_q == tile_y_i && last_inner_tile_i == 1'b1) begin - for (int i = 0; i < N; i++) begin - mask_d[i] = 1'b0; + mask_d = '1; end + end else if (mask_tile_x_pos_q <= tile_x_i && mask_tile_y_pos_q != tile_y_i) begin + mask_d = '1; + end else if (mask_tile_x_pos_q != tile_x_i && mask_tile_y_pos_q == tile_y_i) begin + mask_d = '0; end end end LowerTriangular: begin - mask_col_offset_d = '0; mask_tile_x_pos_d = mask_tile_x_pos_q; mask_tile_y_pos_d = (step_i == QK || step_i == AV) ? mask_tile_y_pos_q : ((ctrl_i.mask_start_index) / M); mask_pos_d = (step_i == QK || step_i == AV) ? mask_pos_q : (ctrl_i.mask_start_index & (M-1)); - mask_d = '0; - if (step_i == QK) begin - if (mask_tile_x_pos_q == tile_x_i && mask_tile_y_pos_q == tile_y_i && last_inner_tile_i == 1'b1) begin + if (step_i == QK && last_inner_tile_i == 1'b1) begin + if (mask_tile_x_pos_q == tile_x_i && mask_tile_y_pos_q == tile_y_i) begin if (count_i == ((M * M / N) - 1)) begin mask_tile_x_pos_d = mask_tile_x_pos_q + 1'b1; end if ((count_i >= mask_pos_q) && (count_i < (mask_pos_q + N))) begin - if (((count_i & (M-1)) == (M-1)) && !(((count_i + (N - (ctrl_i.mask_start_index & (N-1)))) & (N-1)) == (N-1))) begin + if ((count_i & (M - 1)) == (M - 1)) begin mask_tile_y_pos_d = tile_y_i + 1'b1; mask_tile_x_pos_d = tile_x_i; - mask_pos_d = ((count_i + (((ctrl_i.tile_s * (M*M/N)) - M) + 1)) & ((M*M/N)-1)); - end else if (((count_i & (M-1)) == (M-1)) && (((count_i + (N - (ctrl_i.mask_start_index & (N-1)))) & (N-1)) == (N-1))) begin - if ((count_i / M) == ((M / N) - 1)) begin - mask_tile_y_pos_d = tile_y_i + 1'b1; - mask_tile_x_pos_d = tile_x_i + 1'b1; - mask_pos_d = ((count_i + ((ctrl_i.tile_s * (M*M/N)) + 1)) & ((M*M/N)-1)); + if (((count_i + (N - (ctrl_i.mask_start_index & (N-1)))) & (N-1)) == (N-1)) begin + mask_pos_d = ((count_i + 1) & ((M*M/N)-1)); + if ((count_i / M) == ((M / N) - 1)) begin + mask_tile_x_pos_d = tile_x_i + 1'b1; + end end else begin - mask_tile_y_pos_d = tile_y_i + 1'b1; - mask_tile_x_pos_d = tile_x_i; - mask_pos_d = ((count_i + ((ctrl_i.tile_s * (M*M/N)) + 1)) & ((M*M/N)-1)); + mask_pos_d = ((count_i + (((ctrl_i.tile_s * (M*M/N)) - M) + 1)) & ((M*M/N)-1)); end end else if (((count_i + (N - (ctrl_i.mask_start_index & (N-1)))) & (N-1)) == (N-1)) begin - mask_pos_d = (mask_pos_q + (count_i - mask_pos_q + 1) + M) & ((M * M / N) - 1); + mask_pos_d = (mask_pos_q + (count_i - mask_pos_q + 1) + M) & ((M*M/N)-1); end for (int i = 0; i < N; i++) begin if (((count_i + (N - (ctrl_i.mask_start_index & (N - 1)))) & (N - 1)) >= i) begin @@ -129,95 +112,84 @@ module ita_masking end end end else if ((count_i & (M - 1)) >= (mask_pos_q & (M - 1))) begin - for (int i = 0; i < N; i++) begin - mask_d[i] = 1'b1; - end + mask_d = '1; end - end else if (mask_tile_x_pos_q > tile_x_i && mask_tile_y_pos_q == tile_y_i && last_inner_tile_i == 1'b1) begin - for (int i = 0; i < N; i++) begin + end else if (mask_tile_x_pos_q > tile_x_i && mask_tile_y_pos_q == tile_y_i) begin + mask_d = '1; + end else if (mask_tile_x_pos_q >= tile_x_i && mask_tile_y_pos_q != tile_y_i) begin + mask_d = '0; + end + end + end + Strided: begin + if (step_i == QK && last_inner_tile_i == 1'b1) begin + for (int i = 0; i < N; i++) begin + //col_pos = count_i/M * N + i + tile_x_i * M + //row_pos = count_i & (M-1) + tile_y_i * M + //Marcel Kant: Does only work if ctrl_i.mask_start_index is a power of two + if ((((((count_i / M) * N) + i + (tile_x_i * M)) - ((count_i & (M-1)) + (tile_y_i * M))) + & (ctrl_i.mask_start_index-1)) == 0) begin + mask_d[i] = 1'b0; + end else begin mask_d[i] = 1'b1; end - end else if (mask_tile_x_pos_q >= tile_x_i && mask_tile_y_pos_q != tile_y_i && last_inner_tile_i == 1'b1) begin - for (int i = 0; i < N; i++) begin + end + end + end + UpperStrided: begin + if (step_i == QK && last_inner_tile_i == 1'b1) begin + for (int i = 0; i < N; i++) begin + //Marcel Kant: Does only work if ctrl_i.mask_start_index is a power of two + if ((((((count_i / M) * N) + i + (tile_x_i * M)) - ((count_i & (M-1)) + (tile_y_i * M))) & (ctrl_i.mask_start_index-1)) == 0 && + ((((count_i / M) * N) + i + (tile_x_i * M)) >= ((count_i & (M-1)) + (tile_y_i * M)))) begin mask_d[i] = 1'b0; + end else begin + mask_d[i] = 1'b1; end end end end - Strided: begin - mask_col_offset_d = '0; - mask_tile_x_pos_d = '0; - mask_tile_y_pos_d = '0; - mask_pos_d = '0; - mask_d = '0; - - if (step_i == QK) begin - if (last_inner_tile_i == 1'b1) begin - for (int i = 0; i < N; i++) begin - //col_pos = count_i/M * N + i + tile_x_i * M - //row_pos = count_i & (M-1) + tile_y_i * M - //Marcel Kant: Does only work if ctrl_i.mask_start_index is a power of two - if ((((((count_i / M) * N) + i + (tile_x_i * M)) - ((count_i & (M-1)) + (tile_y_i * M))) & (ctrl_i.mask_start_index-1)) == 0) begin - mask_d[i] = 1'b0; - end else begin - mask_d[i] = 1'b1; - end + LowerStrided: begin + if (step_i == QK && last_inner_tile_i == 1'b1) begin + for (int i = 0; i < N; i++) begin + //Marcel Kant: Does only work if ctrl_i.mask_start_index is a power of two + if ((((((count_i / M) * N) + i + (tile_x_i * M)) - ((count_i & (M-1)) + (tile_y_i * M))) & (ctrl_i.mask_start_index-1)) == 0 && + ((((count_i / M) * N) + i + (tile_x_i * M)) <= ((count_i & (M-1)) + (tile_y_i * M)))) begin + mask_d[i] = 1'b0; + end else begin + mask_d[i] = 1'b1; end end end end - UpperStrided: begin - mask_col_offset_d = '0; - mask_tile_x_pos_d = '0; - mask_tile_y_pos_d = '0; - mask_pos_d = '0; - mask_d = '0; - - if (step_i == QK) begin - if (last_inner_tile_i == 1'b1) begin - for (int i = 0; i < N; i++) begin - //Marcel Kant: Does only work if ctrl_i.mask_start_index is a power of two - if ((((((count_i / M) * N) + i + (tile_x_i * M)) - ((count_i & (M-1)) + (tile_y_i * M))) & (ctrl_i.mask_start_index-1)) == 0 && - ((((count_i / M) * N) + i + (tile_x_i * M)) >= ((count_i & (M-1)) + (tile_y_i * M)))) begin + SlidingWindow: begin + if (step_i == QK && last_inner_tile_i == 1'b1) begin + for (int i = 0; i < N; i++) begin + if (((count_i & (M-1)) + (tile_y_i * M)) < ctrl_i.mask_start_index) begin + if ((((count_i / M) * N) + i + (tile_x_i * M)) < (ctrl_i.mask_start_index + ((count_i & (M-1)) + (tile_y_i * M)))) begin mask_d[i] = 1'b0; end else begin mask_d[i] = 1'b1; end - end - end - end - end - LowerStrided: begin - mask_col_offset_d = '0; - mask_tile_x_pos_d = '0; - mask_tile_y_pos_d = '0; - mask_pos_d = '0; - mask_d = '0; - - if (step_i == QK) begin - if (last_inner_tile_i == 1'b1) begin - for (int i = 0; i < N; i++) begin - //Marcel Kant: Does only work if ctrl_i.mask_start_index is a power of two - if ((((((count_i / M) * N) + i + (tile_x_i * M)) - ((count_i & (M-1)) + (tile_y_i * M))) & (ctrl_i.mask_start_index-1)) == 0 && - ((((count_i / M) * N) + i + (tile_x_i * M)) <= ((count_i & (M-1)) + (tile_y_i * M)))) begin + end else begin + if ((((count_i & (M-1)) + (tile_y_i * M) - (ctrl_i.mask_start_index-1)) <= (((count_i / M) * N) + i + (tile_x_i * M))) && + ((((count_i / M) * N) + i + (tile_x_i * M)) < ((count_i & (M-1)) + (tile_y_i * M) + ctrl_i.mask_start_index))) begin mask_d[i] = 1'b0; end else begin mask_d[i] = 1'b1; end - end - end + end + end end end - SlidingWindow: begin - mask_col_offset_d = '0; - mask_tile_x_pos_d = '0; - mask_tile_y_pos_d = '0; - mask_pos_d = '0; - mask_d = '0; - - if (step_i == QK) begin - if (last_inner_tile_i == 1'b1) begin - for (int i = 0; i < N; i++) begin + StridedSlidingWindow: begin + if (step_i == QK && last_inner_tile_i == 1'b1) begin + for (int i = 0; i < N; i++) begin + //Strided logic + if ((((((count_i / M) * N) + i + (tile_x_i * M)) - ((count_i & (M-1)) + (tile_y_i * M))) & (ctrl_i.mask_start_index-1)) == 0) begin + mask_d[i] = 1'b0; + end else begin + //Sliding window logic if (((count_i & (M-1)) + (tile_y_i * M)) < ctrl_i.mask_start_index) begin if ((((count_i / M) * N) + i + (tile_x_i * M)) < (ctrl_i.mask_start_index + ((count_i & (M-1)) + (tile_y_i * M)))) begin mask_d[i] = 1'b0; @@ -231,45 +203,12 @@ module ita_masking end else begin mask_d[i] = 1'b1; end - end - end - end - end - end - StridedSlidingWindow: begin - mask_col_offset_d = '0; - mask_tile_x_pos_d = '0; - mask_tile_y_pos_d = '0; - mask_pos_d = '0; - mask_d = '0; - - if (step_i == QK) begin - if (last_inner_tile_i == 1'b1) begin - for (int i = 0; i < N; i++) begin - //Strided logic - if ((((((count_i / M) * N) + i + (tile_x_i * M)) - ((count_i & (M-1)) + (tile_y_i * M))) & (ctrl_i.mask_start_index-1)) == 0) begin - mask_d[i] = 1'b0; - end else begin - //Sliding window logic - if (((count_i & (M-1)) + (tile_y_i * M)) < ctrl_i.mask_start_index) begin - if ((((count_i / M) * N) + i + (tile_x_i * M)) < (ctrl_i.mask_start_index + ((count_i & (M-1)) + (tile_y_i * M)))) begin - mask_d[i] = 1'b0; - end else begin - mask_d[i] = 1'b1; - end - end else begin - if ((((count_i & (M-1)) + (tile_y_i * M) - (ctrl_i.mask_start_index-1)) <= (((count_i / M) * N) + i + (tile_x_i * M))) && - ((((count_i / M) * N) + i + (tile_x_i * M)) < ((count_i & (M-1)) + (tile_y_i * M) + ctrl_i.mask_start_index))) begin - mask_d[i] = 1'b0; - end else begin - mask_d[i] = 1'b1; - end - end - end - end - end + end + end + end end end + default: ; endcase end diff --git a/tests/hwpe_mask_test.sh b/tests/hwpe_mask_test.sh deleted file mode 100755 index 07f9f54..0000000 --- a/tests/hwpe_mask_test.sh +++ /dev/null @@ -1,158 +0,0 @@ -#!/bin/bash - -# Copyright 2023 ETH Zurich and University -# of Bologna. Licensed under the Apache License, -# Version 2.0, see LICENSE for details. -# SPDX-License-Identifier: Apache-2.0 - -echo "Testing ITA ..." - -# Set the log file -log_file=tests/logs/run_loop_$(date +%Y%m%d%H%M%S).log - -# Create folder and log file -mkdir -p tests/logs -touch $log_file - -# Activate the virtual environment -source venv/bin/activate - -# Set the simulation path -export buildpath=build -export SIM_PATH=modelsim/$buildpath - -# Set to -gui to use the GUI of QuestaSim -export vsim_flags=-c #-gui - -# Set the no_stalls if not set -if [ -z "$no_stalls" ]; then - no_stalls=0 - echo "No_stalls not set. Using default value: $no_stalls" -fi - -# Set the n_tests if not set -if [ -z "$n_tests" ]; then - n_tests=250 - echo "Granularity not set. Using default value: $n_tests" -fi - -# Log the parameters -echo "no_stalls=$no_stalls" >> $log_file -echo "n_tests=$n_tests" >> $log_file - -# List of masking names -masking_names=("upper_triangular" "lower_triangular" "strided" - "upper_strided" "lower_strided" - "sliding_window" "strided_sliding_window") - -# List of activation names -activation_names=("identity" "relu" "gelu") - -# Helper function: checks if a mask is one of the strided ones -is_strided_mask() { - case "$1" in - "strided"|"upper_strided"|"lower_strided"|"strided_sliding_window") - return 0 # True - ;; - *) - return 1 # False - ;; - esac -} - -# Helper function: returns all powers of two < s -# (2, 4, 8, 16, ...), stored in an array -powers_of_two_less_than_s() { - local limit=$1 - local val=1 - local results=() - - # If you also want to allow i=1 (which is 2^0), - # set val=1 and do while [ $val -lt $limit ] - # If you need strictly 2,4,8..., set val=2. - val=2 - while [ $val -lt $limit ]; do - results+=($val) - val=$((val*2)) - done - - echo "${results[@]}" -} - -# Run the tests -for test_idx in $(seq 1 $n_tests); do - # Randomly pick s, e, p, f in [2..512] - s=$((2 + RANDOM % 511)) - e=$((1 + RANDOM % 511)) - p=$((1 + RANDOM % 511)) - f=$((1 + RANDOM % 511)) - - # Pick one random masking - random_mask_idx=$((RANDOM % ${#masking_names[@]})) - masking=${masking_names[$random_mask_idx]} - - # Pick one random activation - random_activation_idx=$((RANDOM % ${#activation_names[@]})) - activation=${activation_names[$random_activation_idx]} - - # Pick one random bias (0 or 1) - bias=$((RANDOM % 2)) - - # Decide how to pick i based on whether masking is strided - if is_strided_mask "$masking"; then - # 1) We need i that is < s and also a power of two - valid_i_list=( $(powers_of_two_less_than_s $s) ) - - # If no valid i found, skip this iteration - if [ ${#valid_i_list[@]} -eq 0 ]; then - echo "No valid i for mask=$masking with s=$s (need i < s and i a power of two). Skipping..." - continue - fi - - # Pick a random valid i from the list - i=${valid_i_list[$((RANDOM % ${#valid_i_list[@]}))]} - else - # 2) Non-strided masks: pick i in [1 .. s-1] - if [ "$s" -le 1 ]; then - echo "No valid i for mask=$masking with s=$s (need i < s). Skipping..." - continue - fi - i=$((1 + (RANDOM % (s-1)))) - fi - - echo "Index is: $i (Masking = $masking, s=$s)" - - # Create test vectors (no-bias and bias) - echo "creating test vectors" - if [ "$bias" -eq 1 ]; then - python testGenerator.py -H 1 -S $s -P $p -E $e -F $f \ - --activation "$activation" --mask "$masking" -I "$i" - else - python testGenerator.py -H 1 -S $s -P $p -E $e -F $f \ - --activation "$activation" --mask "$masking" -I "$i" --no-bias - fi - - # Log the test - echo "Testing ita_tb: S=$s E=$e P=$p F=$f Activation=$activation Masking=$masking I=$i Bias=$bias" >> $log_file - - # Run the test - make sim VSIM_FLAGS=$vsim_flags DEBUG=OFF target=sim_ita_hwpe_tb \ - no_stalls=$no_stalls s=$s e=$e p=$p f=$f bias=$bias \ - activation=$activation mask=$masking i=$i - - # Check the simulation status - ./modelsim/return_status.sh "${SIM_PATH}/transcript" \ - "$s" "$e" "$p" "$f" ita_tb "$masking" "$i" >> $log_file - - # Format masking for directory name (e.g. "upper_strided" -> "UpperStrided") - formatted_masking="" - for word in ${masking//_/ }; do - formatted_masking+="${word^}" - done - - # echo "simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^}_${formatted_masking}_I${i}" >> $log_file - - # Remove the test vectors - # rm -rf simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^}_${formatted_masking}_I${i} - -done diff --git a/tests/hwpe_upper_triangle_test.sh b/tests/hwpe_upper_triangle_test.sh deleted file mode 100755 index 944d03b..0000000 --- a/tests/hwpe_upper_triangle_test.sh +++ /dev/null @@ -1,138 +0,0 @@ -#!/bin/bash - -# Copyright 2023 ETH Zurich and University -# of Bologna. Licensed under the Apache License, -# Version 2.0, see LICENSE for details. -# SPDX-License-Identifier: Apache-2.0 - -echo "Testing ITA ..." - -# Set the log file -log_file=tests/logs/run_loop_$(date +%Y%m%d%H%M%S).log - -# Create folder and log file -mkdir -p tests/logs -touch $log_file - -# Activate the virtual environment -source venv/bin/activate - -# Set the simulation path -export buildpath=build -export SIM_PATH=modelsim/$buildpath - -# Set to -gui to use the GUI of QuestaSim -export vsim_flags=-c - -# Set the no_stalls if not set -if [ -z "$no_stalls" ]; then - no_stalls=0 - echo "No_stalls not set. Using default value: $no_stalls" -fi - -# Set the n_tests if not set -if [ -z "$n_tests" ]; then - n_tests=1 - echo "Granularity not set. Using default value: $n_tests" -fi - -# Log the parameters -echo "no_stalls=$no_stalls" >> $log_file -echo "n_tests=$n_tests" >> $log_file - -# List of masking names -masking_names=("upper_triangular") - -# List of activation names -activation_names=("identity") - -# Helper function: checks if a mask is one of the strided ones -is_strided_mask() { - case "$1" in - "strided"|"upper_strided"|"lower_strided"|"strided_sliding_window") - return 0 # True - ;; - *) - return 1 # False - ;; - esac -} - -# Run the tests -for test_idx in $(seq 1 $n_tests); do - # Randomly pick s, e, p, f in [2..512] - s=128 - e=64 - p=64 - f=64 - - # Pick one random masking - random_mask_idx=$((RANDOM % ${#masking_names[@]})) - masking=${masking_names[$random_mask_idx]} - - # Pick one random activation - random_activation_idx=$((RANDOM % ${#activation_names[@]})) - activation=${activation_names[$random_activation_idx]} - - # Pick one random bias (0 or 1) - bias=1 - - # Decide how to pick i based on whether masking is strided - if is_strided_mask "$masking"; then - # 1) We need i that is < s and also a power of two - valid_i_list=( $(powers_of_two_less_than_s $s) ) - - # If no valid i found, skip this iteration - if [ ${#valid_i_list[@]} -eq 0 ]; then - echo "No valid i for mask=$masking with s=$s (need i < s and i a power of two). Skipping..." - continue - fi - - # Pick a random valid i from the list - i=${valid_i_list[$((RANDOM % ${#valid_i_list[@]}))]} - else - # 2) Non-strided masks: pick i in [1 .. s-1] - if [ "$s" -le 1 ]; then - echo "No valid i for mask=$masking with s=$s (need i < s). Skipping..." - continue - fi - i=1 - # i=$((1 + (RANDOM % (s-1)))) - fi - - echo "Index is: $i (Masking = $masking, s=$s)" - - # Create test vectors (no-bias and bias) - echo "creating test vectors" - if [ "$bias" -eq 1 ]; then - python testGenerator.py -H 1 -S $s -P $p -E $e -F $f \ - --activation "$activation" --mask "$masking" -I "$i" - else - python testGenerator.py -H 1 -S $s -P $p -E $e -F $f \ - --activation "$activation" --mask "$masking" -I "$i" --no-bias - fi - - # Log the test - echo "Testing ita_tb: S=$s E=$e P=$p F=$f Activation=$activation Masking=$masking I=$i Bias=$bias" >> $log_file - - # Run the test - make sim VSIM_FLAGS=$vsim_flags DEBUG=ON target=sim_ita_hwpe_tb \ - no_stalls=$no_stalls s=$s e=$e p=$p f=$f bias=$bias \ - activation=$activation mask=$masking i=$i - - # Check the simulation status - ./modelsim/return_status.sh "${SIM_PATH}/transcript" \ - "$s" "$e" "$p" "$f" ita_tb "$masking" "$i" >> $log_file - - # Format masking for directory name (e.g. "upper_strided" -> "UpperStrided") - formatted_masking="" - for word in ${masking//_/ }; do - formatted_masking+="${word^}" - done - - # echo "simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^}_${formatted_masking}_I${i}" >> $log_file - - # Remove the test vectors - rm -rf simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^}_${formatted_masking}_I${i} - -done diff --git a/tests/masking_test.sh b/tests/masking_test.sh index 32a7292..703ff18 100755 --- a/tests/masking_test.sh +++ b/tests/masking_test.sh @@ -22,7 +22,7 @@ export buildpath=build export SIM_PATH=modelsim/$buildpath # Set to -gui to use the GUI of QuestaSim -export vsim_flags=-gui #-c +export vsim_flags=-c # Set the no_stalls if not set if [ -z "$no_stalls" ]; then @@ -41,9 +41,9 @@ echo "no_stalls=$no_stalls" >> $log_file echo "n_tests=$n_tests" >> $log_file # List of masking names -masking_names=("upper_triangular" "lower_triangular" "strided" - "upper_strided" "lower_strided" - "sliding_window" "strided_sliding_window") + masking_names=("upper_triangular" "lower_triangular" "strided" + "upper_strided" "lower_strided" + "sliding_window" "strided_sliding_window") # List of activation names activation_names=("identity" "relu" "gelu") diff --git a/tests/tests/hwpe_mask_test.sh b/tests/tests/hwpe_mask_test.sh deleted file mode 100755 index 07f9f54..0000000 --- a/tests/tests/hwpe_mask_test.sh +++ /dev/null @@ -1,158 +0,0 @@ -#!/bin/bash - -# Copyright 2023 ETH Zurich and University -# of Bologna. Licensed under the Apache License, -# Version 2.0, see LICENSE for details. -# SPDX-License-Identifier: Apache-2.0 - -echo "Testing ITA ..." - -# Set the log file -log_file=tests/logs/run_loop_$(date +%Y%m%d%H%M%S).log - -# Create folder and log file -mkdir -p tests/logs -touch $log_file - -# Activate the virtual environment -source venv/bin/activate - -# Set the simulation path -export buildpath=build -export SIM_PATH=modelsim/$buildpath - -# Set to -gui to use the GUI of QuestaSim -export vsim_flags=-c #-gui - -# Set the no_stalls if not set -if [ -z "$no_stalls" ]; then - no_stalls=0 - echo "No_stalls not set. Using default value: $no_stalls" -fi - -# Set the n_tests if not set -if [ -z "$n_tests" ]; then - n_tests=250 - echo "Granularity not set. Using default value: $n_tests" -fi - -# Log the parameters -echo "no_stalls=$no_stalls" >> $log_file -echo "n_tests=$n_tests" >> $log_file - -# List of masking names -masking_names=("upper_triangular" "lower_triangular" "strided" - "upper_strided" "lower_strided" - "sliding_window" "strided_sliding_window") - -# List of activation names -activation_names=("identity" "relu" "gelu") - -# Helper function: checks if a mask is one of the strided ones -is_strided_mask() { - case "$1" in - "strided"|"upper_strided"|"lower_strided"|"strided_sliding_window") - return 0 # True - ;; - *) - return 1 # False - ;; - esac -} - -# Helper function: returns all powers of two < s -# (2, 4, 8, 16, ...), stored in an array -powers_of_two_less_than_s() { - local limit=$1 - local val=1 - local results=() - - # If you also want to allow i=1 (which is 2^0), - # set val=1 and do while [ $val -lt $limit ] - # If you need strictly 2,4,8..., set val=2. - val=2 - while [ $val -lt $limit ]; do - results+=($val) - val=$((val*2)) - done - - echo "${results[@]}" -} - -# Run the tests -for test_idx in $(seq 1 $n_tests); do - # Randomly pick s, e, p, f in [2..512] - s=$((2 + RANDOM % 511)) - e=$((1 + RANDOM % 511)) - p=$((1 + RANDOM % 511)) - f=$((1 + RANDOM % 511)) - - # Pick one random masking - random_mask_idx=$((RANDOM % ${#masking_names[@]})) - masking=${masking_names[$random_mask_idx]} - - # Pick one random activation - random_activation_idx=$((RANDOM % ${#activation_names[@]})) - activation=${activation_names[$random_activation_idx]} - - # Pick one random bias (0 or 1) - bias=$((RANDOM % 2)) - - # Decide how to pick i based on whether masking is strided - if is_strided_mask "$masking"; then - # 1) We need i that is < s and also a power of two - valid_i_list=( $(powers_of_two_less_than_s $s) ) - - # If no valid i found, skip this iteration - if [ ${#valid_i_list[@]} -eq 0 ]; then - echo "No valid i for mask=$masking with s=$s (need i < s and i a power of two). Skipping..." - continue - fi - - # Pick a random valid i from the list - i=${valid_i_list[$((RANDOM % ${#valid_i_list[@]}))]} - else - # 2) Non-strided masks: pick i in [1 .. s-1] - if [ "$s" -le 1 ]; then - echo "No valid i for mask=$masking with s=$s (need i < s). Skipping..." - continue - fi - i=$((1 + (RANDOM % (s-1)))) - fi - - echo "Index is: $i (Masking = $masking, s=$s)" - - # Create test vectors (no-bias and bias) - echo "creating test vectors" - if [ "$bias" -eq 1 ]; then - python testGenerator.py -H 1 -S $s -P $p -E $e -F $f \ - --activation "$activation" --mask "$masking" -I "$i" - else - python testGenerator.py -H 1 -S $s -P $p -E $e -F $f \ - --activation "$activation" --mask "$masking" -I "$i" --no-bias - fi - - # Log the test - echo "Testing ita_tb: S=$s E=$e P=$p F=$f Activation=$activation Masking=$masking I=$i Bias=$bias" >> $log_file - - # Run the test - make sim VSIM_FLAGS=$vsim_flags DEBUG=OFF target=sim_ita_hwpe_tb \ - no_stalls=$no_stalls s=$s e=$e p=$p f=$f bias=$bias \ - activation=$activation mask=$masking i=$i - - # Check the simulation status - ./modelsim/return_status.sh "${SIM_PATH}/transcript" \ - "$s" "$e" "$p" "$f" ita_tb "$masking" "$i" >> $log_file - - # Format masking for directory name (e.g. "upper_strided" -> "UpperStrided") - formatted_masking="" - for word in ${masking//_/ }; do - formatted_masking+="${word^}" - done - - # echo "simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^}_${formatted_masking}_I${i}" >> $log_file - - # Remove the test vectors - # rm -rf simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^}_${formatted_masking}_I${i} - -done diff --git a/tests/tests/hwpe_upper_triangle_test.sh b/tests/tests/hwpe_upper_triangle_test.sh deleted file mode 100755 index 944d03b..0000000 --- a/tests/tests/hwpe_upper_triangle_test.sh +++ /dev/null @@ -1,138 +0,0 @@ -#!/bin/bash - -# Copyright 2023 ETH Zurich and University -# of Bologna. Licensed under the Apache License, -# Version 2.0, see LICENSE for details. -# SPDX-License-Identifier: Apache-2.0 - -echo "Testing ITA ..." - -# Set the log file -log_file=tests/logs/run_loop_$(date +%Y%m%d%H%M%S).log - -# Create folder and log file -mkdir -p tests/logs -touch $log_file - -# Activate the virtual environment -source venv/bin/activate - -# Set the simulation path -export buildpath=build -export SIM_PATH=modelsim/$buildpath - -# Set to -gui to use the GUI of QuestaSim -export vsim_flags=-c - -# Set the no_stalls if not set -if [ -z "$no_stalls" ]; then - no_stalls=0 - echo "No_stalls not set. Using default value: $no_stalls" -fi - -# Set the n_tests if not set -if [ -z "$n_tests" ]; then - n_tests=1 - echo "Granularity not set. Using default value: $n_tests" -fi - -# Log the parameters -echo "no_stalls=$no_stalls" >> $log_file -echo "n_tests=$n_tests" >> $log_file - -# List of masking names -masking_names=("upper_triangular") - -# List of activation names -activation_names=("identity") - -# Helper function: checks if a mask is one of the strided ones -is_strided_mask() { - case "$1" in - "strided"|"upper_strided"|"lower_strided"|"strided_sliding_window") - return 0 # True - ;; - *) - return 1 # False - ;; - esac -} - -# Run the tests -for test_idx in $(seq 1 $n_tests); do - # Randomly pick s, e, p, f in [2..512] - s=128 - e=64 - p=64 - f=64 - - # Pick one random masking - random_mask_idx=$((RANDOM % ${#masking_names[@]})) - masking=${masking_names[$random_mask_idx]} - - # Pick one random activation - random_activation_idx=$((RANDOM % ${#activation_names[@]})) - activation=${activation_names[$random_activation_idx]} - - # Pick one random bias (0 or 1) - bias=1 - - # Decide how to pick i based on whether masking is strided - if is_strided_mask "$masking"; then - # 1) We need i that is < s and also a power of two - valid_i_list=( $(powers_of_two_less_than_s $s) ) - - # If no valid i found, skip this iteration - if [ ${#valid_i_list[@]} -eq 0 ]; then - echo "No valid i for mask=$masking with s=$s (need i < s and i a power of two). Skipping..." - continue - fi - - # Pick a random valid i from the list - i=${valid_i_list[$((RANDOM % ${#valid_i_list[@]}))]} - else - # 2) Non-strided masks: pick i in [1 .. s-1] - if [ "$s" -le 1 ]; then - echo "No valid i for mask=$masking with s=$s (need i < s). Skipping..." - continue - fi - i=1 - # i=$((1 + (RANDOM % (s-1)))) - fi - - echo "Index is: $i (Masking = $masking, s=$s)" - - # Create test vectors (no-bias and bias) - echo "creating test vectors" - if [ "$bias" -eq 1 ]; then - python testGenerator.py -H 1 -S $s -P $p -E $e -F $f \ - --activation "$activation" --mask "$masking" -I "$i" - else - python testGenerator.py -H 1 -S $s -P $p -E $e -F $f \ - --activation "$activation" --mask "$masking" -I "$i" --no-bias - fi - - # Log the test - echo "Testing ita_tb: S=$s E=$e P=$p F=$f Activation=$activation Masking=$masking I=$i Bias=$bias" >> $log_file - - # Run the test - make sim VSIM_FLAGS=$vsim_flags DEBUG=ON target=sim_ita_hwpe_tb \ - no_stalls=$no_stalls s=$s e=$e p=$p f=$f bias=$bias \ - activation=$activation mask=$masking i=$i - - # Check the simulation status - ./modelsim/return_status.sh "${SIM_PATH}/transcript" \ - "$s" "$e" "$p" "$f" ita_tb "$masking" "$i" >> $log_file - - # Format masking for directory name (e.g. "upper_strided" -> "UpperStrided") - formatted_masking="" - for word in ${masking//_/ }; do - formatted_masking+="${word^}" - done - - # echo "simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^}_${formatted_masking}_I${i}" >> $log_file - - # Remove the test vectors - rm -rf simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^}_${formatted_masking}_I${i} - -done diff --git a/tests/tests/masking_test.sh b/tests/tests/masking_test.sh deleted file mode 100755 index 32a7292..0000000 --- a/tests/tests/masking_test.sh +++ /dev/null @@ -1,158 +0,0 @@ -#!/bin/bash - -# Copyright 2023 ETH Zurich and University -# of Bologna. Licensed under the Apache License, -# Version 2.0, see LICENSE for details. -# SPDX-License-Identifier: Apache-2.0 - -echo "Testing ITA ..." - -# Set the log file -log_file=tests/logs/run_loop_$(date +%Y%m%d%H%M%S).log - -# Create folder and log file -mkdir -p tests/logs -touch $log_file - -# Activate the virtual environment -source venv/bin/activate - -# Set the simulation path -export buildpath=build -export SIM_PATH=modelsim/$buildpath - -# Set to -gui to use the GUI of QuestaSim -export vsim_flags=-gui #-c - -# Set the no_stalls if not set -if [ -z "$no_stalls" ]; then - no_stalls=0 - echo "No_stalls not set. Using default value: $no_stalls" -fi - -# Set the n_tests if not set -if [ -z "$n_tests" ]; then - n_tests=250 - echo "Granularity not set. Using default value: $n_tests" -fi - -# Log the parameters -echo "no_stalls=$no_stalls" >> $log_file -echo "n_tests=$n_tests" >> $log_file - -# List of masking names -masking_names=("upper_triangular" "lower_triangular" "strided" - "upper_strided" "lower_strided" - "sliding_window" "strided_sliding_window") - -# List of activation names -activation_names=("identity" "relu" "gelu") - -# Helper function: checks if a mask is one of the strided ones -is_strided_mask() { - case "$1" in - "strided"|"upper_strided"|"lower_strided"|"strided_sliding_window") - return 0 # True - ;; - *) - return 1 # False - ;; - esac -} - -# Helper function: returns all powers of two < s -# (2, 4, 8, 16, ...), stored in an array -powers_of_two_less_than_s() { - local limit=$1 - local val=1 - local results=() - - # If you also want to allow i=1 (which is 2^0), - # set val=1 and do while [ $val -lt $limit ] - # If you need strictly 2,4,8..., set val=2. - val=2 - while [ $val -lt $limit ]; do - results+=($val) - val=$((val*2)) - done - - echo "${results[@]}" -} - -# Run the tests -for test_idx in $(seq 1 $n_tests); do - # Randomly pick s, e, p, f in [2..512] - s=$((2 + RANDOM % 511)) - e=$((1 + RANDOM % 511)) - p=$((1 + RANDOM % 511)) - f=$((1 + RANDOM % 511)) - - # Pick one random masking - random_mask_idx=$((RANDOM % ${#masking_names[@]})) - masking=${masking_names[$random_mask_idx]} - - # Pick one random activation - random_activation_idx=$((RANDOM % ${#activation_names[@]})) - activation=${activation_names[$random_activation_idx]} - - # Pick one random bias (0 or 1) - bias=$((RANDOM % 2)) - - # Decide how to pick i based on whether masking is strided - if is_strided_mask "$masking"; then - # 1) We need i that is < s and also a power of two - valid_i_list=( $(powers_of_two_less_than_s $s) ) - - # If no valid i found, skip this iteration - if [ ${#valid_i_list[@]} -eq 0 ]; then - echo "No valid i for mask=$masking with s=$s (need i < s and i a power of two). Skipping..." - continue - fi - - # Pick a random valid i from the list - i=${valid_i_list[$((RANDOM % ${#valid_i_list[@]}))]} - else - # 2) Non-strided masks: pick i in [1 .. s-1] - if [ "$s" -le 1 ]; then - echo "No valid i for mask=$masking with s=$s (need i < s). Skipping..." - continue - fi - i=$((1 + (RANDOM % (s-1)))) - fi - - echo "Index is: $i (Masking = $masking, s=$s)" - - # Create test vectors (no-bias and bias) - echo "creating test vectors" - if [ "$bias" -eq 1 ]; then - python testGenerator.py -H 1 -S $s -P $p -E $e -F $f \ - --activation "$activation" --mask "$masking" -I "$i" - else - python testGenerator.py -H 1 -S $s -P $p -E $e -F $f \ - --activation "$activation" --mask "$masking" -I "$i" --no-bias - fi - - # Log the test - echo "Testing ita_tb: S=$s E=$e P=$p F=$f Activation=$activation Masking=$masking I=$i Bias=$bias" >> $log_file - - # Run the test - make sim VSIM_FLAGS=$vsim_flags DEBUG=OFF target=sim_ita_tb \ - no_stalls=$no_stalls s=$s e=$e p=$p f=$f bias=$bias \ - activation=$activation mask=$masking i=$i - - # Check the simulation status - ./modelsim/return_status.sh "${SIM_PATH}/transcript" \ - "$s" "$e" "$p" "$f" ita_tb "$masking" "$i" >> $log_file - - # Format masking for directory name (e.g. "upper_strided" -> "UpperStrided") - formatted_masking="" - for word in ${masking//_/ }; do - formatted_masking+="${word^}" - done - - # echo "simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^}_${formatted_masking}_I${i}" >> $log_file - - # Remove the test vectors - rm -rf simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^}_${formatted_masking}_I${i} - -done diff --git a/tests/tests/run.sh b/tests/tests/run.sh deleted file mode 100755 index bdd41db..0000000 --- a/tests/tests/run.sh +++ /dev/null @@ -1,39 +0,0 @@ -#!/bin/bash - -# Copyright 2023 ETH Zurich and University of Bologna. -# Licensed under the Apache License, Version 2.0, see LICENSE for details. -# SPDX-License-Identifier: Apache-2.0 - -echo "Testing ITA ..." - -source venv/bin/activate - -export buildpath=build -export SIM_PATH=modelsim/$buildpath - -# Set to -gui to use the GUI of QuestaSim -export vsim_flags=-gui #-c - -export target=ita_tb -export no_stalls=0 -export s=64 -export e=64 -export p=64 -export f=64 -export bias=1 -export activation=identity - -# Create test vectors if don't exist -if [ ! -d simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^} ] -then - if [ $bias -eq 1 ] - then - python testGenerator.py -H 1 -S $s -P $p -E $e -F $f --activation $activation - else - python testGenerator.py -H 1 -S $s -P $p -E $e -F $f --activation $activation --no-bias - fi -fi - -# Run the test -make sim VSIM_FLAGS=$vsim_flags DEBUG=ON target=sim_$target no_stalls=$no_stalls s=$s e=$e p=$p f=$f bias=$bias activation=$activation -./modelsim/return_status.sh ${SIM_PATH}/transcript $s $e $p $f $target diff --git a/tests/tests/run_loop.sh b/tests/tests/run_loop.sh deleted file mode 100755 index 2b563e1..0000000 --- a/tests/tests/run_loop.sh +++ /dev/null @@ -1,87 +0,0 @@ -#!/bin/bash - -# Copyright 2023 ETH Zurich and University of Bologna. -# Licensed under the Apache License, Version 2.0, see LICENSE for details. -# SPDX-License-Identifier: Apache-2.0 - -echo "Testing ITA ..." - -# Set the log file -log_file=tests/logs/run_loop_$(date +%Y%m%d%H%M%S).log - -# Create folder and log file -mkdir -p tests/logs -touch $log_file - -# Activate the virtual environment -source venv/bin/activate - -# Set the simulation path -export buildpath=build -export SIM_PATH=modelsim/$buildpath - -# Set to -gui to use the GUI of QuestaSim -export vsim_flags=-c - -# Set the no_stalls if not set -if [ -z "$no_stalls" ] -then - no_stalls=0 - echo "No_stalls not set. Using default value: $no_stalls" -fi - -# Set the granularity if not set -if [ -z "$granularity" ] -then - granularity=256 - echo "Granularity not set. Using default value: $granularity" -else - # check if the granularity is a multiple of 64 and less than or equal to 512 - if [ $((granularity % 64)) -ne 0 ] || [ $granularity -gt 512 ] - then - echo "Granularity must be a multiple of 64 and less than or equal to 512." - exit 1 - fi -fi - -# Log the parameters -echo "no_stalls=$no_stalls" >> $log_file -echo "granularity=$granularity" >> $log_file - -# Run the tests -for s in $(eval echo "{$granularity..512..$granularity}") -do - for e in $(eval echo "{$granularity..512..$granularity}") - do - for p in $(eval echo "{$granularity..512..$granularity}") - do - for f in $(eval echo "{$granularity..512..$granularity}") - do - for activation in {identity,relu,gelu} - do - # Create test vectors - python testGenerator.py -H 1 -S $s -P $p -E $e -F $f --activation $activation --no-bias - python testGenerator.py -H 1 -S $s -P $p -E $e -F $f --activation $activation - - for target in {ita_tb,ita_hwpe_tb} - do - for bias in {0..1} - do - # Log the test - echo "Testing $target: S=$s E=$e P=$p F=$f Activation=$activation bias=$bias" >> $log_file - - # Run the test - make sim VSIM_FLAGS=$vsim_flags DEBUG=OFF target=sim_$target no_stalls=$no_stalls s=$s e=$e p=$p f=$f bias=$bias activation=$activation - ./modelsim/return_status.sh ${SIM_PATH}/transcript $s $e $p $f $target >> $log_file - - # read -p "Press Enter to continue" - - # Remove the test vectors - rm -rf simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^} - done - done - done - done - done - done -done diff --git a/tests/tests/upper_triangle_test.sh b/tests/tests/upper_triangle_test.sh deleted file mode 100755 index 05e526b..0000000 --- a/tests/tests/upper_triangle_test.sh +++ /dev/null @@ -1,138 +0,0 @@ -#!/bin/bash - -# Copyright 2023 ETH Zurich and University -# of Bologna. Licensed under the Apache License, -# Version 2.0, see LICENSE for details. -# SPDX-License-Identifier: Apache-2.0 - -echo "Testing ITA ..." - -# Set the log file -log_file=tests/logs/run_loop_$(date +%Y%m%d%H%M%S).log - -# Create folder and log file -mkdir -p tests/logs -touch $log_file - -# Activate the virtual environment -source venv/bin/activate - -# Set the simulation path -export buildpath=build -export SIM_PATH=modelsim/$buildpath - -# Set to -gui to use the GUI of QuestaSim -export vsim_flags=-gui #-c - -# Set the no_stalls if not set -if [ -z "$no_stalls" ]; then - no_stalls=0 - echo "No_stalls not set. Using default value: $no_stalls" -fi - -# Set the n_tests if not set -if [ -z "$n_tests" ]; then - n_tests=1 - echo "Granularity not set. Using default value: $n_tests" -fi - -# Log the parameters -echo "no_stalls=$no_stalls" >> $log_file -echo "n_tests=$n_tests" >> $log_file - -# List of masking names -masking_names=("upper_triangular") - -# List of activation names -activation_names=("identity") - -# Helper function: checks if a mask is one of the strided ones -is_strided_mask() { - case "$1" in - "strided"|"upper_strided"|"lower_strided"|"strided_sliding_window") - return 0 # True - ;; - *) - return 1 # False - ;; - esac -} - -# Run the tests -for test_idx in $(seq 1 $n_tests); do - # Randomly pick s, e, p, f in [2..512] - s=128 - e=64 - p=64 - f=64 - - # Pick one random masking - random_mask_idx=$((RANDOM % ${#masking_names[@]})) - masking=${masking_names[$random_mask_idx]} - - # Pick one random activation - random_activation_idx=$((RANDOM % ${#activation_names[@]})) - activation=${activation_names[$random_activation_idx]} - - # Pick one random bias (0 or 1) - bias=1 - - # Decide how to pick i based on whether masking is strided - if is_strided_mask "$masking"; then - # 1) We need i that is < s and also a power of two - valid_i_list=( $(powers_of_two_less_than_s $s) ) - - # If no valid i found, skip this iteration - if [ ${#valid_i_list[@]} -eq 0 ]; then - echo "No valid i for mask=$masking with s=$s (need i < s and i a power of two). Skipping..." - continue - fi - - # Pick a random valid i from the list - i=${valid_i_list[$((RANDOM % ${#valid_i_list[@]}))]} - else - # 2) Non-strided masks: pick i in [1 .. s-1] - if [ "$s" -le 1 ]; then - echo "No valid i for mask=$masking with s=$s (need i < s). Skipping..." - continue - fi - i=1 - # i=$((1 + (RANDOM % (s-1)))) - fi - - echo "Index is: $i (Masking = $masking, s=$s)" - - # Create test vectors (no-bias and bias) - echo "creating test vectors" - if [ "$bias" -eq 1 ]; then - python testGenerator.py -H 1 -S $s -P $p -E $e -F $f \ - --activation "$activation" --mask "$masking" -I "$i" - else - python testGenerator.py -H 1 -S $s -P $p -E $e -F $f \ - --activation "$activation" --mask "$masking" -I "$i" --no-bias - fi - - # Log the test - echo "Testing ita_tb: S=$s E=$e P=$p F=$f Activation=$activation Masking=$masking I=$i Bias=$bias" >> $log_file - - # Run the test - make sim VSIM_FLAGS=$vsim_flags DEBUG=ON target=sim_ita_tb \ - no_stalls=$no_stalls s=$s e=$e p=$p f=$f bias=$bias \ - activation=$activation mask=$masking i=$i - - # Check the simulation status - ./modelsim/return_status.sh "${SIM_PATH}/transcript" \ - "$s" "$e" "$p" "$f" ita_tb "$masking" "$i" >> $log_file - - # Format masking for directory name (e.g. "upper_strided" -> "UpperStrided") - formatted_masking="" - for word in ${masking//_/ }; do - formatted_masking+="${word^}" - done - - # echo "simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^}_${formatted_masking}_I${i}" >> $log_file - - # Remove the test vectors - rm -rf simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^}_${formatted_masking}_I${i} - -done diff --git a/tests/upper_triangle_test.sh b/tests/upper_triangle_test.sh deleted file mode 100755 index 05e526b..0000000 --- a/tests/upper_triangle_test.sh +++ /dev/null @@ -1,138 +0,0 @@ -#!/bin/bash - -# Copyright 2023 ETH Zurich and University -# of Bologna. Licensed under the Apache License, -# Version 2.0, see LICENSE for details. -# SPDX-License-Identifier: Apache-2.0 - -echo "Testing ITA ..." - -# Set the log file -log_file=tests/logs/run_loop_$(date +%Y%m%d%H%M%S).log - -# Create folder and log file -mkdir -p tests/logs -touch $log_file - -# Activate the virtual environment -source venv/bin/activate - -# Set the simulation path -export buildpath=build -export SIM_PATH=modelsim/$buildpath - -# Set to -gui to use the GUI of QuestaSim -export vsim_flags=-gui #-c - -# Set the no_stalls if not set -if [ -z "$no_stalls" ]; then - no_stalls=0 - echo "No_stalls not set. Using default value: $no_stalls" -fi - -# Set the n_tests if not set -if [ -z "$n_tests" ]; then - n_tests=1 - echo "Granularity not set. Using default value: $n_tests" -fi - -# Log the parameters -echo "no_stalls=$no_stalls" >> $log_file -echo "n_tests=$n_tests" >> $log_file - -# List of masking names -masking_names=("upper_triangular") - -# List of activation names -activation_names=("identity") - -# Helper function: checks if a mask is one of the strided ones -is_strided_mask() { - case "$1" in - "strided"|"upper_strided"|"lower_strided"|"strided_sliding_window") - return 0 # True - ;; - *) - return 1 # False - ;; - esac -} - -# Run the tests -for test_idx in $(seq 1 $n_tests); do - # Randomly pick s, e, p, f in [2..512] - s=128 - e=64 - p=64 - f=64 - - # Pick one random masking - random_mask_idx=$((RANDOM % ${#masking_names[@]})) - masking=${masking_names[$random_mask_idx]} - - # Pick one random activation - random_activation_idx=$((RANDOM % ${#activation_names[@]})) - activation=${activation_names[$random_activation_idx]} - - # Pick one random bias (0 or 1) - bias=1 - - # Decide how to pick i based on whether masking is strided - if is_strided_mask "$masking"; then - # 1) We need i that is < s and also a power of two - valid_i_list=( $(powers_of_two_less_than_s $s) ) - - # If no valid i found, skip this iteration - if [ ${#valid_i_list[@]} -eq 0 ]; then - echo "No valid i for mask=$masking with s=$s (need i < s and i a power of two). Skipping..." - continue - fi - - # Pick a random valid i from the list - i=${valid_i_list[$((RANDOM % ${#valid_i_list[@]}))]} - else - # 2) Non-strided masks: pick i in [1 .. s-1] - if [ "$s" -le 1 ]; then - echo "No valid i for mask=$masking with s=$s (need i < s). Skipping..." - continue - fi - i=1 - # i=$((1 + (RANDOM % (s-1)))) - fi - - echo "Index is: $i (Masking = $masking, s=$s)" - - # Create test vectors (no-bias and bias) - echo "creating test vectors" - if [ "$bias" -eq 1 ]; then - python testGenerator.py -H 1 -S $s -P $p -E $e -F $f \ - --activation "$activation" --mask "$masking" -I "$i" - else - python testGenerator.py -H 1 -S $s -P $p -E $e -F $f \ - --activation "$activation" --mask "$masking" -I "$i" --no-bias - fi - - # Log the test - echo "Testing ita_tb: S=$s E=$e P=$p F=$f Activation=$activation Masking=$masking I=$i Bias=$bias" >> $log_file - - # Run the test - make sim VSIM_FLAGS=$vsim_flags DEBUG=ON target=sim_ita_tb \ - no_stalls=$no_stalls s=$s e=$e p=$p f=$f bias=$bias \ - activation=$activation mask=$masking i=$i - - # Check the simulation status - ./modelsim/return_status.sh "${SIM_PATH}/transcript" \ - "$s" "$e" "$p" "$f" ita_tb "$masking" "$i" >> $log_file - - # Format masking for directory name (e.g. "upper_strided" -> "UpperStrided") - formatted_masking="" - for word in ${masking//_/ }; do - formatted_masking+="${word^}" - done - - # echo "simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^}_${formatted_masking}_I${i}" >> $log_file - - # Remove the test vectors - rm -rf simvectors/data_S${s}_E${e}_P${p}_F${f}_H1_B${bias}_${activation^}_${formatted_masking}_I${i} - -done From f2b82327271abd22cebd05ea81728aa99c636b00 Mon Sep 17 00:00:00 2001 From: Ludi-1 Date: Mon, 3 Mar 2025 16:50:26 +0100 Subject: [PATCH 57/60] clean up whitespace --- modelsim/Makefile | 2 +- tests/masking_test.sh | 7 +++---- 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/modelsim/Makefile b/modelsim/Makefile index 71ed400..a9a5183 100644 --- a/modelsim/Makefile +++ b/modelsim/Makefile @@ -11,7 +11,7 @@ VOPT ?= $(QUESTA_SEPP) vopt VSIM ?= $(QUESTA_SEPP) vsim VLIB ?= $(QUESTA_SEPP) vlib VMAP ?= $(QUESTA_SEPP) vmap -VSIM_FLAGS ?= -c #-gui +VSIM_FLAGS ?= -c # -gui DEBUG ?= OFF # ON lib: diff --git a/tests/masking_test.sh b/tests/masking_test.sh index 703ff18..c5e635f 100755 --- a/tests/masking_test.sh +++ b/tests/masking_test.sh @@ -41,9 +41,9 @@ echo "no_stalls=$no_stalls" >> $log_file echo "n_tests=$n_tests" >> $log_file # List of masking names - masking_names=("upper_triangular" "lower_triangular" "strided" - "upper_strided" "lower_strided" - "sliding_window" "strided_sliding_window") +masking_names=("upper_triangular" "lower_triangular" "strided" + "upper_strided" "lower_strided" + "sliding_window" "strided_sliding_window") # List of activation names activation_names=("identity" "relu" "gelu") @@ -123,7 +123,6 @@ for test_idx in $(seq 1 $n_tests); do echo "Index is: $i (Masking = $masking, s=$s)" # Create test vectors (no-bias and bias) - echo "creating test vectors" if [ "$bias" -eq 1 ]; then python testGenerator.py -H 1 -S $s -P $p -E $e -F $f \ --activation "$activation" --mask "$masking" -I "$i" From 8e0107484655377880bf456259a24c156308fb1e Mon Sep 17 00:00:00 2001 From: Ludi-1 Date: Mon, 3 Mar 2025 16:52:03 +0100 Subject: [PATCH 58/60] run script to cmd mode --- tests/run.sh | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tests/run.sh b/tests/run.sh index bdd41db..bf2201e 100755 --- a/tests/run.sh +++ b/tests/run.sh @@ -12,7 +12,7 @@ export buildpath=build export SIM_PATH=modelsim/$buildpath # Set to -gui to use the GUI of QuestaSim -export vsim_flags=-gui #-c +export vsim_flags=-c export target=ita_tb export no_stalls=0 @@ -35,5 +35,5 @@ then fi # Run the test -make sim VSIM_FLAGS=$vsim_flags DEBUG=ON target=sim_$target no_stalls=$no_stalls s=$s e=$e p=$p f=$f bias=$bias activation=$activation +make sim VSIM_FLAGS=$vsim_flags DEBUG=OFF target=sim_$target no_stalls=$no_stalls s=$s e=$e p=$p f=$f bias=$bias activation=$activation ./modelsim/return_status.sh ${SIM_PATH}/transcript $s $e $p $f $target From 399455cd4f5b6ab530514a046197fd4153479036 Mon Sep 17 00:00:00 2001 From: Ludi-1 Date: Tue, 4 Mar 2025 12:04:30 +0100 Subject: [PATCH 59/60] update softmax shift parameter --- PyITA/ITA.py | 2 +- PyITA/softmax.py | 4 ++-- src/ita_package.sv | 2 +- tests/masking_test.sh | 7 ++++++- 4 files changed, 10 insertions(+), 5 deletions(-) diff --git a/PyITA/ITA.py b/PyITA/ITA.py index 46280a4..e12c4ad 100644 --- a/PyITA/ITA.py +++ b/PyITA/ITA.py @@ -1364,7 +1364,7 @@ def plot_heatmap(tensor, title, ax): def util_main(**kwargs): B = 8 log2e = np.log2(np.exp(1)) - range_scale = 32 + range_scale = 1 eps_max = range_scale * B / (2**B) N = 1024 diff --git a/PyITA/softmax.py b/PyITA/softmax.py index ab4da6e..feea3ca 100644 --- a/PyITA/softmax.py +++ b/PyITA/softmax.py @@ -32,7 +32,7 @@ def fastSoftmax(x, integerize = True): B = 8 # Scaling factor - range_scale = 32 + range_scale = 1 eps_max = range_scale * B / (2**B) # Find the maximum for each row in the current column block (consisting of 16 columns) @@ -80,7 +80,7 @@ def streamingPartialSoftmax(x, mask, integerize = True): B = 8 # Scaling factor - range_scale = 32 + range_scale = 1 eps_max = range_scale * B / (2**B) if integerize: diff --git a/src/ita_package.sv b/src/ita_package.sv index ae9b01d..2d3e0fe 100644 --- a/src/ita_package.sv +++ b/src/ita_package.sv @@ -114,7 +114,7 @@ package ita_package; // Softmax localparam int unsigned SoftmaxScalar = 65280; // (2**8-1) * 2**8 - localparam int unsigned SoftmaxShift = 0; + localparam int unsigned SoftmaxShift = 5; localparam int unsigned SoftmaxAccDataWidth = 19; // Up to S = 2048 localparam int unsigned SoftFifoDepth = 12; typedef logic [idx_width(SoftFifoDepth)-1:0] soft_fifo_usage_t; diff --git a/tests/masking_test.sh b/tests/masking_test.sh index c5e635f..84aeef6 100755 --- a/tests/masking_test.sh +++ b/tests/masking_test.sh @@ -21,6 +21,11 @@ source venv/bin/activate export buildpath=build export SIM_PATH=modelsim/$buildpath +if [ -z "$target" ]; then + no_stalls=0 + echo "Target not set. Using default value: $target" +fi + # Set to -gui to use the GUI of QuestaSim export vsim_flags=-c @@ -135,7 +140,7 @@ for test_idx in $(seq 1 $n_tests); do echo "Testing ita_tb: S=$s E=$e P=$p F=$f Activation=$activation Masking=$masking I=$i Bias=$bias" >> $log_file # Run the test - make sim VSIM_FLAGS=$vsim_flags DEBUG=OFF target=sim_ita_tb \ + make sim VSIM_FLAGS=$vsim_flags DEBUG=OFF target=sim_$target \ no_stalls=$no_stalls s=$s e=$e p=$p f=$f bias=$bias \ activation=$activation mask=$masking i=$i From c1861c14c827ae1a836a765018e7456e21e404ea Mon Sep 17 00:00:00 2001 From: Ludi-1 Date: Tue, 4 Mar 2025 22:39:19 +0100 Subject: [PATCH 60/60] clean sim --- modelsim.ini | 2221 -------------------------------------------------- transcript | 14 - 2 files changed, 2235 deletions(-) delete mode 100644 modelsim.ini delete mode 100644 transcript diff --git a/modelsim.ini b/modelsim.ini deleted file mode 100644 index d76f789..0000000 --- a/modelsim.ini +++ /dev/null @@ -1,2221 +0,0 @@ -; vsim modelsim.ini file -[Version] -INIVersion = "2021.3_2" - -; Copyright 1991-2021 Mentor Graphics Corporation -; -; All Rights Reserved. -; -; THIS WORK CONTAINS TRADE SECRET AND PROPRIETARY INFORMATION WHICH IS THE PROPERTY OF -; MENTOR GRAPHICS CORPORATION OR ITS LICENSORS AND IS SUBJECT TO LICENSE TERMS. -; - -[Library] -std = $MODEL_TECH/../std -ieee = $MODEL_TECH/../ieee -vital2000 = $MODEL_TECH/../vital2000 -; -; VITAL concerns: -; -; The library ieee contains (among other packages) the packages of the -; VITAL 2000 standard. When a design uses VITAL 2000 exclusively, it should use -; the physical library ieee (recommended), or use the physical library -; vital2000, but not both. The design can use logical library ieee and/or -; vital2000 as long as each of these maps to the same physical library, either -; ieee or vital2000. -; -; A design using the 1995 version of the VITAL packages, whether or not -; it also uses the 2000 version of the VITAL packages, must have logical library -; name ieee mapped to physical library vital1995. (A design cannot use library -; vital1995 directly because some packages in this library use logical name ieee -; when referring to the other packages in the library.) The design source -; should use logical name ieee when referring to any packages there except the -; VITAL 2000 packages. Any VITAL 2000 present in the design must use logical -; name vital2000 (mapped to physical library vital2000) to refer to those -; packages. -; ieee = $MODEL_TECH/../vital1995 -; -; For compatiblity with previous releases, logical library name vital2000 maps -; to library vital2000 (a different library than library ieee, containing the -; same packages). -; A design should not reference VITAL from both the ieee library and the -; vital2000 library because the vital packages are effectively different. -; A design that references both the ieee and vital2000 libraries must have -; both logical names ieee and vital2000 mapped to the same library, either of -; these: -; $MODEL_TECH/../ieee -; $MODEL_TECH/../vital2000 -; -verilog = $MODEL_TECH/../verilog -std_developerskit = $MODEL_TECH/../std_developerskit -synopsys = $MODEL_TECH/../synopsys -modelsim_lib = $MODEL_TECH/../modelsim_lib -sv_std = $MODEL_TECH/../sv_std -mtiAvm = $MODEL_TECH/../avm -mtiRnm = $MODEL_TECH/../rnm -mtiOvm = $MODEL_TECH/../ovm-2.1.2 -mtiUvm = $MODEL_TECH/../uvm-1.1d -mtiUPF = $MODEL_TECH/../upf_lib -mtiPA = $MODEL_TECH/../pa_lib -floatfixlib = $MODEL_TECH/../floatfixlib -mc2_lib = $MODEL_TECH/../mc2_lib -flps_lib = $MODEL_TECH/../flps_lib -osvvm = $MODEL_TECH/../osvvm - -; added mapping for ADMS -mgc_ams = $MODEL_TECH/../mgc_ams -ieee_env = $MODEL_TECH/../ieee_env - -;vhdl_psl_checkers = $MODEL_TECH/../vhdl_psl_checkers // Source files only for this release -;verilog_psl_checkers = $MODEL_TECH/../verilog_psl_checkers // Source files only for this release -;mvc_lib = $MODEL_TECH/../mvc_lib -infact = $MODEL_TECH/../infact -vhdlopt_lib = $MODEL_TECH/../vhdlopt_lib -vh_ux01v_lib = $MODEL_TECH/../vh_ux01v_lib - -; Automatically perform logical->physical mapping for physical libraries that -; appear in -L/-Lf options with filesystem path delimiters (e.g. '.' or '/'). -; The tail of the filesystem path name is chosen as the logical library name. -; For example, in the command "vopt -L ./path/to/lib1 -o opttop top", -; vopt automatically performs the mapping "lib1 -> ./path/to/lib1". -; See the User Manual for more details. -; -; AutoLibMapping = 0 - -[DefineOptionset] -; Define optionset entries for the various compilers, vmake, and vsim. -; These option sets can be used with the "-optionset " syntax. -; i.e. -; vlog -optionset COMPILEDEBUG top.sv -; vsim -optionset UVMDEBUG my_top -; -; Following are some useful examples. - -; define a vsim optionset for uvm debugging -UVMDEBUG = -uvmcontrol=all -msgmode both -displaymsgmode both -classdebug -onfinish stop - -; define a vopt optionset for debugging -VOPTDEBUG = +acc -debugdb - -[encryption] -; For vencrypt and vhencrypt. - -; Controls whether to encrypt whole files by ignoring all protect directives -; (except "viewport" and "interface_viewport") that are present in the input. -; The default is 0, use embedded protect directives to control the encryption. -; Set this to 1 to encrypt whole files by ignoring embedded protect directives. -; wholefile = 0 - -; Sets the data_method to use for the symmetric session key. -; The session key is a symmetric key that is randomly generated for each -; protected region (envelope) and is the heart of all encryption. This is used -; to set the length of the session key to generate and use when encrypting the -; HDL text. Supported values are aes128, aes192, and aes256. -; data_method = aes128 - -; The following 2 are for specifying an IEEE Std. 1735 Version 2 (V2) encryption -; "recipe" comprising an optional common block, at least one tool block (which -; contains the key public key), and the text to be encrypted. The common block -; and any of the tool blocks may contain rights in the form of the "control" -; directive. The text to be encrypted is specified either by setting -; "wholefile" to 1 or by embedding protect "begin" and "end" directives in -; the input HDL files. - -; Common recipe specification file. This file is optional. Its presence will -; require at least one "toolblock" to be specified. -; Directives such as "author" "author_info" and "data_method", -; as well as the common block license specification, go in this file. -; common = - -; Tool block specification recipe(s). Public key file with optional tool block -; file name. May be multiply-defined; at least one tool block is required if -; a recipe is being specified. -; Key file is a file name with no extension (.deprecated or .active will be -; supplied by the encryption tool). -; Rights file name is optional. -; toolblock = [,]{:[,]} - -; Location of directory containing recipe files. -; The default location is in the product installation directory. -; keyring = $MODEL_TECH/../keyring - -; Enable encryption statistics. Specify one or more arguments: -; [all,none,time,cmd,msg,perf,verbose,list] -; Add '-' to disable specific statistics. Default is [cmd,msg]. -Stats = cmd,msg - -[vcom] -; VHDL93 variable selects language version as the default. -; Default is VHDL-2002. -; Value of 0 or 1987 for VHDL-1987. -; Value of 1 or 1993 for VHDL-1993. -; Default or value of 2 or 2002 for VHDL-2002. -; Value of 3 or 2008 for VHDL-2008 -; Value of 4 or ams99 for VHDL-AMS-1999 -; Value of 5 or ams07 for VHDL-AMS-2007 -VHDL93 = 2002 - -; Ignore VHDL-2008 declaration of REAL_VECTOR in package STANDARD. Default is off. -; ignoreStandardRealVector = 1 - -; Show source line containing error. Default is off. -; Show_source = 1 - -; Turn off unbound-component warnings. Default is on. -; Show_Warning1 = 0 - -; Turn off process-without-a-wait-statement warnings. Default is on. -; Show_Warning2 = 0 - -; Turn off null-range warnings. Default is on. -; Show_Warning3 = 0 - -; Turn off no-space-in-time-literal warnings. Default is on. -; Show_Warning4 = 0 - -; Turn off multiple-drivers-on-unresolved-signal warnings. Default is on. -; Show_Warning5 = 0 - -; Turn off optimization for IEEE std_logic_1164 package. Default is on. -; Optimize_1164 = 0 - -; Enable compiler statistics. Specify one or more arguments: -; [all,none,time,cmd,msg,perf,verbose,list] -; Add '-' to disable specific statistics. Default is [time,cmd,msg]. -; Stats = time,cmd,msg - -; Turn on resolving of ambiguous function overloading in favor of the -; "explicit" function declaration (not the one automatically created by -; the compiler for each type declaration). Default is off. -; The .ini file has Explicit enabled so that std_logic_signed/unsigned -; will match the behavior of synthesis tools. -Explicit = 1 - -; Turn off acceleration of the VITAL packages. Default is to accelerate. -; NoVital = 1 - -; Turn off VITAL compliance checking. Default is checking on. -; NoVitalCheck = 1 - -; Ignore VITAL compliance checking errors. Default is to not ignore. -; IgnoreVitalErrors = 1 - -; Turn off VITAL compliance checking warnings. Default is to show warnings. -; Show_VitalChecksWarnings = 0 - -; Turn off PSL assertion warning messages. Default is to show warnings. -; Show_PslChecksWarnings = 0 - -; Enable parsing of embedded PSL assertions. Default is enabled. -; EmbeddedPsl = 0 - -; Keep silent about case statement static warnings. -; Default is to give a warning. -; NoCaseStaticError = 1 - -; Keep silent about warnings caused by aggregates that are not locally static. -; Default is to give a warning. -; NoOthersStaticError = 1 - -; Treat as errors: -; case statement static warnings -; warnings caused by aggregates that are not locally static -; Overrides NoCaseStaticError, NoOthersStaticError settings. -; PedanticErrors = 1 - -; Turn off inclusion of debugging info within design units. -; Default is to include debugging info. -; NoDebug = 1 - -; Turn off "Loading..." messages. Default is messages on. -; Quiet = 1 - -; Turn on some limited synthesis rule compliance checking. Checks only: -; -- signals used (read) by a process must be in the sensitivity list -; CheckSynthesis = 1 - -; Activate optimizations on expressions that do not involve signals, -; waits, or function/procedure/task invocations. Default is off. -; ScalarOpts = 1 - -; Turns on lint-style checking. -; Show_Lint = 1 - -; Require the user to specify a configuration for all bindings, -; and do not generate a compile time default binding for the -; component. This will result in an elaboration error of -; 'component not bound' if the user fails to do so. Avoids the rare -; issue of a false dependency upon the unused default binding. -; RequireConfigForAllDefaultBinding = 1 - -; Perform default binding at compile time. -; Default is to do default binding at load time. -; BindAtCompile = 1; - -; Inhibit range checking on subscripts of arrays. Range checking on -; scalars defined with subtypes is inhibited by default. -; NoIndexCheck = 1 - -; Inhibit range checks on all (implicit and explicit) assignments to -; scalar objects defined with subtypes. -; NoRangeCheck = 1 - -; Set the prefix to be honored for synthesis/coverage pragma recognition. -; Default is "". -; AddPragmaPrefix = "" - -; Ignore synthesis and coverage pragmas with this prefix. -; Default is "". -; IgnorePragmaPrefix = "" - -; Turn on code coverage in VHDL design units. Default is off. -; Coverage = sbceft - -; Turn off code coverage in VHDL subprograms. Default is on. -; CoverSub = 0 - -; Automatically exclude VHDL case statement OTHERS choice branches. -; This includes OTHERS choices in selected signal assigment statements. -; Default is to not exclude. -; CoverExcludeDefault = 1 - -; Control compiler and VOPT optimizations that are allowed when -; code coverage is on. Refer to the comment for this in the [vlog] area. -; CoverOpt = 3 - -; Turn on or off clkOpt optimization for code coverage. Default is on. -; CoverClkOpt = 1 - -; Turn on or off clkOpt optimization builtins for code coverage. Default is on. -; CoverClkOptBuiltins = 0 - -; Inform code coverage optimizations to respect VHDL 'H' and 'L' -; values on signals in conditions and expressions, and to not automatically -; convert them to '1' and '0'. Default is to not convert. -; CoverRespectHandL = 0 - -; Increase or decrease the maximum number of rows allowed in a UDP table -; implementing a VHDL condition coverage or expression coverage expression. -; More rows leads to a longer compile time, but more expressions covered. -; CoverMaxUDPRows = 192 - -; Increase or decrease the maximum number of input patterns that are present -; in FEC table. This leads to a longer compile time with more expressions -; covered with FEC metric. -; CoverMaxFECRows = 192 - -; Increase or decrease the limit on the size of expressions and conditions -; considered for expression and condition coverages. Higher FecUdpEffort leads -; to higher compile, optimize and simulation time, but more expressions and -; conditions are considered for coverage in the design. FecUdpEffort can -; be set to a number ranging from 1 (low) to 3 (high), defined as: -; 1 - (low) Only small expressions and conditions considered for coverage. -; 2 - (medium) Bigger expressions and conditions considered for coverage. -; 3 - (high) Very large expressions and conditions considered for coverage. -; The default setting is 1 (low). -; FecUdpEffort = 1 - -; Enable or disable Focused Expression Coverage analysis for conditions and -; expressions. Focused Expression Coverage data is provided by default when -; expression and/or condition coverage is active. -; CoverFEC = 0 - -; Enable or disable UDP Coverage analysis for conditions and expressions. -; UDP Coverage data is disabled by default when expression and/or condition -; coverage is active. -; CoverUDP = 1 - -; Enable or disable Rapid Expression Coverage mode for conditions and expressions. -; Disabling this would convert non-masking conditions in FEC tables to matching -; input patterns. -; CoverREC = 1 - -; Enable or disable bit-blasting multi-bit operands of reduction prefix expressions -; for expression/condition coverage. -; NOTE: Enabling this may have a negative impact on simulation performance. -; CoverExpandReductionPrefix = 0 - -; Enable or disable short circuit evaluation of conditions and expressions when -; condition or expression coverage is active. Short circuit evaluation is enabled -; by default. -; CoverShortCircuit = 0 - -; Enable code coverage reporting of code that has been optimized away. -; The default is not to report. -; CoverReportCancelled = 1 - -; Enable deglitching of code coverage in combinatorial, non-clocked, processes. -; Default is no deglitching. -; CoverDeglitchOn = 1 - -; Control the code coverage deglitching period. A period of 0, eliminates delta -; cycle glitches. The value of CoverDeglitchPeriod needs to be either be 0 or a -; time string that includes time units. Examples: 0 or 10.0ps or "10.0 ps". -; CoverDeglitchPeriod = 0 - -; Use this directory for compiler temporary files instead of "work/_temp" -; CompilerTempDir = /tmp - -; Set this to cause the compilers to force data to be committed to disk -; when the files are closed. -; SyncCompilerFiles = 1 - -; Add VHDL-AMS declarations to package STANDARD -; Default is not to add -; AmsStandard = 1 - -; Range and length checking will be performed on array indices and discrete -; ranges, and when violations are found within subprograms, errors will be -; reported. Default is to issue warnings for violations, because subprograms -; may not be invoked. -; NoDeferSubpgmCheck = 0 - -; Turn ON detection of FSMs having single bit current state variable. -; FsmSingle = 1 - -; Turn off reset state transitions in FSM. -; FsmResetTrans = 0 - -; Turn ON detection of FSM Implicit Transitions. -; FsmImplicitTrans = 1 - -; Controls whether or not to show immediate assertions with constant expressions -; in GUI/report/UCDB etc. By default, immediate assertions with constant -; expressions are shown in GUI/report/UCDB etc. This does not affect -; evaluation of immediate assertions. -; ShowConstantImmediateAsserts = 0 - -; Controls how VHDL basic identifiers are stored with the design unit. -; Does not make the language case-sensitive, affects only how declarations -; declared with basic identifiers have their names stored and printed -; (in the GUI, examine, etc.). -; Default is to preserve the case as originally depicted in the VHDL source. -; Value of 0 indicates to change all basic identifiers to lower case. -; PreserveCase = 0 - -; For Configuration Declarations, controls the effect that USE clauses have -; on visibility inside the configuration items being configured. If 1 -; (the default), then use pre-10.0 behavior. If 0, then for stricter LRM-compliance, -; extend the visibility of objects made visible through USE clauses into nested -; component configurations. -; OldVHDLConfigurationVisibility = 0 - -; Allows VHDL configuration declarations to be in a different library from -; the corresponding configured entity. Default is to not allow this for -; stricter LRM-compliance. -; SeparateConfigLibrary = 1; - -; Determine how mode OUT subprogram parameters of type array and record are treated. -; If 0 (the default), then only VHDL 2008 will do this initialization. -; If 1, always initialize the mode OUT parameter to its default value. -; If 2, do not initialize the mode OUT out parameter. -; Note that prior to release 10.1, all language versions did not initialize mode -; OUT array and record type parameters, unless overridden here via this mechanism. -; In release 10.1 and later, only files compiled with VHDL 2008 will cause this -; initialization, unless overridden here. -; InitOutCompositeParam = 0 - -; Generate symbols debugging database in only some special cases to save on -; the number of files in the library. For other design-units, this database is -; generated on-demand in vsim. -; Default is to to generate debugging database for all design-units. -; SmartDbgSym = 1 - -; Enable or disable automatic creation of missing libraries. -; Default is 1 (enabled) -; CreateLib = 1 - -; Describe compilation options according to matching file patterns. -; File pattern * matches all printing characters other than '/'. -; File pattern **/x matches all paths containing file/directory x. -; File pattern x/** matches all paths beginning at directory x. -; FileOptMap = (**/*.vhd => -2008); - -; Describe library targets of compilation according to matching file patterns. -; LibMap = (**/*.vhd => work); - -[vlog] -; Turn off inclusion of debugging info within design units. -; Default is to include debugging info. -; NoDebug = 1 - -; Turn off "Loading..." messages. Default is messages on. -; Quiet = 1 - -; Turn on Verilog hazard checking (order-dependent accessing of global vars). -; Default is off. -; Hazard = 1 - -; Turn on converting regular Verilog identifiers to uppercase. Allows case -; insensitivity for module names. Default is no conversion. -; UpCase = 1 - -; Activate optimizations on expressions that do not involve signals, -; waits, or function/procedure/task invocations. Default is off. -; ScalarOpts = 1 - -; Turns on lint-style checking. -; Show_Lint = 1 - -; Show source line containing error. Default is off. -; Show_source = 1 - -; Turn on bad option warning. Default is off. -; Show_BadOptionWarning = 1 - -; Revert back to IEEE 1364-1995 syntax, default is 0 (off). -; vlog95compat = 1 - -; Turn off PSL warning messages. Default is to show warnings. -; Show_PslChecksWarnings = 0 - -; Enable parsing of embedded PSL assertions. Default is enabled. -; EmbeddedPsl = 0 - -; Enable compiler statistics. Specify one or more arguments: -; [all,none,time,cmd,msg,perf,verbose,list,kb] -; Add '-' to disable specific statistics. Default is [time,cmd,msg]. -; Stats = time,cmd,msg - -; Check vlog plusargs. Default is 0 (off). -; The command line equivalent is -check_plusargs . -; 0 = Don't check plusargs (this is the default) -; 1 = Warning on unrecognized plusarg -; 2 = Error and exit on unrecognized plusarg -; CheckPlusargs = 1 - -; Set the threshold for automatically identifying sparse Verilog memories. -; A memory with total size in bytes equal to or more than the sparse memory -; threshold gets marked as sparse automatically, unless specified otherwise -; in source code or by the +nosparse commandline option of vlog or vopt. -; The default is 1M. (i.e. memories with total size equal -; to or greater than 1Mb are marked as sparse) -; SparseMemThreshold = 1048576 - -; Set the prefix to be honored for synthesis and coverage pragma recognition. -; Default is "". -; AddPragmaPrefix = "" - -; Ignore synthesis and coverage pragmas with this prefix. -; Default is "". -; IgnorePragmaPrefix = "" - -; Set the option to treat all files specified in a vlog invocation as a -; single compilation unit. The default value is set to 0 which will treat -; each file as a separate compilation unit as specified in the P1800 draft standard. -; MultiFileCompilationUnit = 1 - -; Turn on code coverage in Verilog design units. Default is off. -; Coverage = sbceft - -; Automatically exclude Verilog case statement default branches. -; Default is to not automatically exclude defaults. -; CoverExcludeDefault = 1 - -; Increase or decrease the maximum number of rows allowed in a UDP table -; implementing a VHDL condition coverage or expression coverage expression. -; More rows leads to a longer compile time, but more expressions covered. -; CoverMaxUDPRows = 192 - -; Increase or decrease the maximum number of input patterns that are present -; in FEC table. This leads to a longer compile time with more expressions -; covered with FEC metric. -; CoverMaxFECRows = 192 - -; Enable Multi Bit Expression Coverage in a Design, If design has expression with -; multi bit operands, this option enables its Expression Coverage. -; The default value is 0. -; CoverFecMultiBit = 1 - -; Increase or decrease the limit on the size of expressions and conditions -; considered for expression and condition coverages. Higher FecUdpEffort leads -; to higher compile, optimize and simulation time, but more expressions and -; conditions are considered for coverage in the design. FecUdpEffort can -; be set to a number ranging from 1 (low) to 3 (high), defined as: -; 1 - (low) Only small expressions and conditions considered for coverage. -; 2 - (medium) Bigger expressions and conditions considered for coverage. -; 3 - (high) Very large expressions and conditions considered for coverage. -; The default setting is 1 (low). -; FecUdpEffort = 1 - -; Enable or disable Focused Expression Coverage analysis for conditions and -; expressions. Focused Expression Coverage data is provided by default when -; expression and/or condition coverage is active. -; CoverFEC = 0 - -; Enable or disable UDP Coverage analysis for conditions and expressions. -; UDP Coverage data is disabled by default when expression and/or condition -; coverage is active. -; CoverUDP = 1 - -; Enable or disable Rapid Expression Coverage mode for conditions and expressions. -; Disabling this would convert non-masking conditions in FEC tables to matching -; input patterns. -; CoverREC = 1 - -; Enable or disable bit-blasting multi-bit operands of reduction prefix expressions -; for expression/condition coverage. -; NOTE: Enabling this may have a negative impact on simulation performance. -; CoverExpandReductionPrefix = 0 - -; Enable or disable short circuit evaluation of conditions and expressions when -; condition or expression coverage is active. Short circuit evaluation is enabled -; by default. -; CoverShortCircuit = 0 - -; Enable deglitching of code coverage in combinatorial, non-clocked, processes. -; Default is no deglitching. -; CoverDeglitchOn = 1 - -; Control the code coverage deglitching period. A period of 0, eliminates delta -; cycle glitches. The value of CoverDeglitchPeriod needs to be either be 0 or a -; time string that includes time units. Examples: 0 or 10.0ps or "10.0 ps". -; CoverDeglitchPeriod = 0 - -; Turn on code coverage in VLOG `celldefine modules, modules containing -; specify blocks, and modules included using vlog -v and -y. Default is off. -; CoverCells = 1 - -; Enable code coverage reporting of code that has been optimized away. -; The default is not to report. -; CoverReportCancelled = 1 - -; Control compiler and VOPT optimizations that are allowed when -; code coverage is on. This is a number from 0 to 5, with the following -; meanings (the default is 3): -; 5 -- All allowable optimizations are on. -; 4 -- Turn off removing unreferenced code. -; 3 -- Turn off process, always block and if statement merging. -; 2 -- Turn off expression optimization, converting primitives -; to continuous assignments, VHDL subprogram inlining. -; and VHDL clkOpt (converting FF's to builtins). -; 1 -- Turn off continuous assignment optimizations and clock suppression. -; 0 -- Turn off Verilog module inlining and VHDL arch inlining. -; HOWEVER, if fsm coverage is turned on, optimizations will be forced to -; level 3, with also turning off converting primitives to continuous assigns. -; CoverOpt = 3 - -; Specify the override for the default value of "cross_num_print_missing" -; option for the Cross in Covergroups. If not specified then LRM default -; value of 0 (zero) is used. This is a compile time option. -; SVCrossNumPrintMissingDefault = 0 - -; Setting following to 1 would cause creation of variables which -; would represent the value of Coverpoint expressions. This is used -; in conjunction with "SVCoverpointExprVariablePrefix" option -; in the modelsim.ini -; EnableSVCoverpointExprVariable = 0 - -; Specify the override for the prefix used in forming the variable names -; which represent the Coverpoint expressions. This is used in conjunction with -; "EnableSVCoverpointExprVariable" option of the modelsim.ini -; The default prefix is "expr". -; The variable name is -; variable name => _ -; SVCoverpointExprVariablePrefix = expr - -; Override for the default value of the SystemVerilog covergroup, -; coverpoint, and cross option.goal (defined to be 100 in the LRM). -; NOTE: It does not override specific assignments in SystemVerilog -; source code. NOTE: The modelsim.ini variable "SVCovergroupGoal" -; in the [vsim] section can override this value. -; SVCovergroupGoalDefault = 100 - -; Override for the default value of the SystemVerilog covergroup, -; coverpoint, and cross type_option.goal (defined to be 100 in the LRM) -; NOTE: It does not override specific assignments in SystemVerilog -; source code. NOTE: The modelsim.ini variable "SVCovergroupTypeGoal" -; in the [vsim] section can override this value. -; SVCovergroupTypeGoalDefault = 100 - -; Specify the override for the default value of "strobe" option for the -; Covergroup Type. This is a compile time option which forces "strobe" to -; a user specified default value and supersedes SystemVerilog specified -; default value of '0'(zero). NOTE: This can be overriden by a runtime -; modelsim.ini variable "SVCovergroupStrobe" in the [vsim] section. -; SVCovergroupStrobeDefault = 0 - -; Specify the override for the default value of "per_instance" option for the -; Covergroup variables. This is a compile time option which forces "per_instance" -; to a user specified default value and supersedes SystemVerilog specified -; default value of '0'(zero). -; SVCovergroupPerInstanceDefault = 0 - -; Specify the override for the default value of "get_inst_coverage" option for the -; Covergroup variables. This is a compile time option which forces -; "get_inst_coverage" to a user specified default value and supersedes -; SystemVerilog specified default value of '0'(zero). -; SVCovergroupGetInstCoverageDefault = 0 - -; -; A space separated list of resource libraries that contain precompiled -; packages. The behavior is identical to using the "-L" switch. -; -; LibrarySearchPath = [ ...] -LibrarySearchPath = mtiAvm mtiRnm mtiOvm mtiUvm mtiUPF infact - -; The behavior is identical to the "-mixedansiports" switch. Default is off. -; MixedAnsiPorts = 1 - -; Enable SystemVerilog 3.1a $typeof() function. Default is off. -; EnableTypeOf = 1 - -; Only allow lower case pragmas. Default is disabled. -; AcceptLowerCasePragmaOnly = 1 - -; Set the maximum depth permitted for a recursive include file nesting. -; IncludeRecursionDepthMax = 5 - -; Turn ON detection of FSMs having single bit current state variable. -; FsmSingle = 1 - -; Turn off reset state transitions in FSM. -; FsmResetTrans = 0 - -; Turn off detections of FSMs having x-assignment. -; FsmXAssign = 0 - -; Turn ON detection of FSM Implicit Transitions. -; FsmImplicitTrans = 1 - -; List of file suffixes which will be read as SystemVerilog. White space -; in extensions can be specified with a back-slash: "\ ". Back-slashes -; can be specified with two consecutive back-slashes: "\\"; -; SvFileSuffixes = sv svp svh - -; This setting is the same as the vlog -sv command line switch. -; Enables SystemVerilog features and keywords when true (1). -; When false (0), the rules of IEEE Std 1364-2005 are followed and -; SystemVerilog keywords are ignored. -; Svlog = 0 - -; Prints attribute placed upon SV packages during package import -; when true (1). The attribute will be ignored when this -; entry is false (0). The attribute name is "mti_design_element_load_message". -; The value of this attribute is a string literal. -; Default is true (1). -; PrintSVPackageLoadingAttribute = 1 - -; Do not show immediate assertions with constant expressions in -; GUI/reports/UCDB etc. By default immediate assertions with constant -; expressions are shown in GUI/reports/UCDB etc. This does not affect -; evaluation of immediate assertions. -; ShowConstantImmediateAsserts = 0 - -; Controls if untyped parameters that are initialized with values greater -; than 2147483647 are mapped to generics of type INTEGER or ignored. -; If mapped to VHDL Integers, values greater than 2147483647 -; are mapped to negative values. -; Default is to map these parameter to generic of type INTEGER -; ForceUnsignedToVHDLInteger = 1 - -; Enable AMS wreal (wired real) extensions. Default is 0. -; WrealType = 1 - -; Controls SystemVerilog Language Extensions. These options enable -; some non-LRM compliant behavior. -; SvExtensions = [+|-][,[+|-]*] - -; Generate symbols debugging database in only some special cases to save on -; the number of files in the library. For other design-units, this database is -; generated on-demand in vsim. -; Default is to to generate debugging database for all design-units. -; SmartDbgSym = 1 - -; Controls how $unit library entries are named. Valid options are: -; "file" (generate name based on the first file on the command line) -; "du" (generate name based on first design unit following an item -; found in $unit scope) -; CUAutoName = file - -; Enable or disable automatic creation of missing libraries. -; Default is 1 (enabled) -; CreateLib = 1 - -[sccom] -; Enable use of SCV include files and library. Default is off. -; UseScv = 1 - -; Add C++ compiler options to the sccom command line by using this variable. -; CppOptions = -g - -; Use custom C++ compiler located at this path rather than the default path. -; The path should point directly at a compiler executable. -; CppPath = /usr/bin/g++ - -; Specify the compiler version from the list of support GNU compilers. -; examples 4.7.4, 5.3.0, 7.4.0 -; CppInstall = 7.4.0 - -; Enable verbose messages from sccom. Default is off. -; SccomVerbose = 1 - -; sccom logfile. Default is no logfile. -; SccomLogfile = sccom.log - -; Enable use of SC_MS include files and library. Default is off. -; UseScMs = 1 - -; Use SystemC-2.2 instead of the default SystemC-2.3. Default is off. -; Sc22Mode = 1 - -; Enable compiler statistics. Specify one or more arguments: -; [all,none,time,cmd,msg,perf,verbose,list,kb] -; Add '-' to disable specific statistics. Default is [time,cmd,msg]. -; Stats = time,cmd,msg - -; Enable or disable automatic creation of missing libraries. -; Default is 1 (enabled) -; CreateLib = 1 - -; Enable use of UVMC library. Default is off. -; UseUvmc = 1 - -[vopt] -; Check vopt plusargs. Default is 0 (off). -; The command line equivalent is -check_plusargs . -; 0 = Don't check plusargs (this is the default) -; 1 = Warning on unrecognized plusarg -; 2 = Error and exit on unrecognized plusarg -; CheckPlusargs = 1 - -; Turn on code coverage in vopt. Default is off. -; Coverage = sbceft - -; enable or disable param saving in UCDB. -; CoverageSaveParam = 0 - -; Control compiler optimizations that are allowed when -; code coverage is on. Refer to the comment for this in the [vlog] area. -; CoverOpt = 3 - -; Controls set of CoverConstructs that are being considered for Coverage -; Collection. -; Some of Valid options are: default,set1,set2 -; Covermode = default - -; Override all PA VOPT and VSIM commands to run simulation in Non-PA mode. -; NonPAmode = 1 - -; Controls set of HDL cover constructs that would be considered(or not considered) -; for Coverage Collection. (Default corresponds to covermode default). -; Some of Valid options are: "ca", "citf", "cifl", "tcint", "fsmqs". -; Coverconstruct = noca,nocitf,nofsmtf,nofsmds,noctes,nocicl,nocprc,nocfl,nofsmup,nocifl,nocpm,notcint,nocpkg,nocsva - -; Increase or decrease the maximum number of rows allowed in a UDP table -; implementing a VHDL condition coverage or expression coverage expression. -; More rows leads to a longer compile time, but more expressions covered. -; CoverMaxUDPRows = 192 - -; Increase or decrease the maximum number of input patterns that are present -; in FEC table. This leads to a longer compile time with more expressions -; covered with FEC metric. -; CoverMaxFECRows = 192 - -; Enable Multi Bit Expression Coverage in a Design, If design has expression with -; multi bit operands, this option enables its Expression Coverage. -; The default value is 0. -; CoverFecMultiBit = 1 - -; Increase or decrease the limit on the size of expressions and conditions -; considered for expression and condition coverages. Higher FecUdpEffort leads -; to higher compile, optimize and simulation time, but more expressions and -; conditions are considered for coverage in the design. FecUdpEffort can -; be set to a number ranging from 1 (low) to 3 (high), defined as: -; 1 - (low) Only small expressions and conditions considered for coverage. -; 2 - (medium) Bigger expressions and conditions considered for coverage. -; 3 - (high) Very large expressions and conditions considered for coverage. -; The default setting is 1 (low). -; FecUdpEffort = 1 - -; Enable code coverage reporting of code that has been optimized away. -; The default is not to report. -; CoverReportCancelled = 1 - -; Enable deglitching of code coverage in combinatorial, non-clocked, processes. -; Default is no deglitching. -; CoverDeglitchOn = 1 - -; Enable compiler statistics. Specify one or more arguments: -; [all,none,time,cmd,msg,perf,verbose,list,kb] -; Add '-' to disable specific statistics. Default is [time,cmd,msg]. -; Stats = time,cmd,msg - -; Control the code coverage deglitching period. A period of 0, eliminates delta -; cycle glitches. The value of CoverDeglitchPeriod needs to be either be 0 or a -; time string that includes time units. Examples: 0 or 10.0ps or "10.0 ps". -; CoverDeglitchPeriod = 0 - -; Do not show immediate assertions with constant expressions in -; GUI/reports/UCDB etc. By default immediate assertions with constant -; expressions are shown in GUI/reports/UCDB etc. This does not affect -; evaluation of immediate assertions. -; ShowConstantImmediateAsserts = 0 - -; Set the maximum number of iterations permitted for a generate loop. -; Restricting this permits the implementation to recognize infinite -; generate loops. -; GenerateLoopIterationMax = 100000 - -; Set the maximum depth permitted for a recursive generate instantiation. -; Restricting this permits the implementation to recognize infinite -; recursions. -; GenerateRecursionDepthMax = 200 - -; Set the number of processes created during the code generation phase. -; By default a heuristic is used to set this value. This may be set to 0 -; to disable this feature completely. -; ParallelJobs = 0 - -; Controls SystemVerilog Language Extensions. These options enable -; some non-LRM compliant behavior. -; SvExtensions = [+|-][,[+|-]*] - -; Load the specified shared objects with the RTLD_GLOBAL flag. -; This gives global visibility to all symbols in the shared objects, -; meaning that subsequently loaded shared objects can bind to symbols -; in the global shared objects. The list of shared objects should -; be whitespace delimited. This option is not supported on the -; Windows or AIX platforms. -; GlobalSharedObjectList = example1.so example2.so example3.so - -; Disable SystemVerilog elaboration system task messages -; IgnoreSVAInfo = 1 -; IgnoreSVAWarning = 1 -; IgnoreSVAError = 1 -; IgnoreSVAFatal = 1 - -; Enable or disable automatic creation of missing libraries. -; Default is 1 (enabled) -; CreateLib = 1 - -[vsim] -; vopt flow -; Set to turn on automatic optimization of a design. -; Default is on -VoptFlow = 1 - -; Simulator resolution -; Set to fs, ps, ns, us, ms, or sec with optional prefix of 1, 10, or 100. -Resolution = ns - -; Disable certain code coverage exclusions automatically. -; Assertions and FSM are exluded from the code coverage by default -; Set AutoExclusionsDisable = fsm to enable code coverage for fsm -; Set AutoExclusionsDisable = assertions to enable code coverage for assertions -; Set AutoExclusionsDisable = all to enable code coverage for all the automatic exclusions -; Or specify comma or space separated list -;AutoExclusionsDisable = fsm,assertions - -; User time unit for run commands -; Set to default, fs, ps, ns, us, ms, or sec. The default is to use the -; unit specified for Resolution. For example, if Resolution is 100ps, -; then UserTimeUnit defaults to ps. -; Should generally be set to default. -UserTimeUnit = default - -; Default run length -RunLength = 100 - -; Maximum iterations that can be run without advancing simulation time -IterationLimit = 10000000 - -; Specify libraries to be searched for precompiled modules -; LibrarySearchPath = [ ...] - -; Set XPROP assertion fail limit. Default is 5. -; Any positive integer, -1 for infinity. -; XpropAssertionLimit = 5 - -; Control PSL and Verilog Assume directives during simulation -; Set SimulateAssumeDirectives = 0 to disable assume being simulated as asserts -; Set SimulateAssumeDirectives = 1 to enable assume simulation as asserts -; SimulateAssumeDirectives = 1 - -; Control the simulation of PSL and SVA -; These switches can be overridden by the vsim command line switches: -; -psl, -nopsl, -sva, -nosva. -; Set SimulatePSL = 0 to disable PSL simulation -; Set SimulatePSL = 1 to enable PSL simulation (default) -; SimulatePSL = 1 -; Set SimulateSVA = 0 to disable SVA simulation -; Set SimulateSVA = 1 to enable concurrent SVA simulation (default) -; SimulateSVA = 1 - -; Control SVA and VHDL immediate assertion directives during simulation -; Set SimulateImmedAsserts = 0 to disable simulation of immediate asserts -; Set SimulateImmedAsserts = 1 to enable simulation of immediate asserts -; SimulateImmedAsserts = 1 - -; License feature mappings for Verilog and VHDL -; qhsimvh Single language VHDL license -; qhsimvl Single language Verilog license -; msimhdlsim Language neutral license for either Verilog or VHDL -; msimhdlmix Second language only, language neutral license for either -; Verilog or VHDL -; -; Directives to license manager can be set either as single value or as -; space separated multi-values: -; vhdl Immediately checkout and hold a VHDL license (i.e., one of -; qhsimvh, msimhdlsim, or msimhdlmix) -; vlog Immediately checkout and hold a Verilog license (i.e., one of -; qhsimvl, msimhdlsim, or msimhdlmix) -; plus Immediately checkout and hold a VHDL license and a Verilog license -; noqueue Do not wait in the license queue when a license is not available -; viewsim Try for viewer license but accept simulator license(s) instead -; of queuing for viewer license (PE ONLY) -; noviewer Disable checkout of msimviewer license feature (PE ONLY) -; noslvhdl Disable checkout of qhsimvh license feature -; noslvlog Disable checkout of qhsimvl license feature -; nomix Disable checkout of msimhdlmix license feature -; nolnl Disable checkout of msimhdlsim license feature -; mixedonly Disable checkout of qhsimvh and qhsimvl license features -; lnlonly Disable checkout of qhsimvh,qhsimvl, and msimhdlmix license features -; -; Examples (remove ";" comment character to activate licensing directives): -; Single directive: -; License = plus -; Multi-directive (Note: space delimited directives): -; License = noqueue plus - -; Severity level of a VHDL assertion message or of a SystemVerilog severity system task -; which will cause a running simulation to stop. -; VHDL assertions and SystemVerilog severity system task that occur with the -; given severity or higher will cause a running simulation to stop. -; This value is ignored during elaboration. -; 0 = Note 1 = Warning 2 = Error 3 = Failure 4 = Fatal -BreakOnAssertion = 3 - -; Severity level of a tool message which will cause a running simulation to -; stop. This value is ignored during elaboration. Default is to not break. -; 0 = Note 1 = Warning 2 = Error 3 = Fatal -;BreakOnMessage = 2 - -; The class debug feature enables more visibility and tracking of class instances -; during simulation. By default this feature is disabled (0). To enable this -; feature set ClassDebug to 1. -; ClassDebug = 1 - -; Message Format conversion specifications: -; %S - Severity Level of message/assertion -; %R - Text of message -; %T - Time of message -; %D - Delta value (iteration number) of Time -; %K - Kind of path: Instance/Region/Signal/Process/Foreign Process/Unknown/Protected -; %i - Instance/Region/Signal pathname with Process name (if available) -; %I - shorthand for one of these: -; " %K: %i" -; " %K: %i File: %F" (when path is not Process or Signal) -; except that the %i in this case does not report the Process name -; %O - Process name -; %P - Instance/Region path without leaf process -; %F - File name -; %L - Line number; if assertion message, then line number of assertion or, if -; assertion is in a subprogram, line from which the call is made -; %u - Design unit name in form library.primary -; %U - Design unit name in form library.primary(secondary) -; %% - The '%' character itself -; -; If specific format for Severity Level is defined, use that format. -; Else, for a message that occurs during elaboration: -; -- Failure/Fatal message in VHDL region that is not a Process, and in -; certain non-VHDL regions, uses MessageFormatBreakLine; -; -- Failure/Fatal message otherwise uses MessageFormatBreak; -; -- Note/Warning/Error message uses MessageFormat. -; Else, for a message that occurs during runtime and triggers a breakpoint because -; of the BreakOnAssertion setting: -; -- if in a VHDL region that is not a Process, uses MessageFormatBreakLine; -; -- otherwise uses MessageFormatBreak. -; Else (a runtime message that does not trigger a breakpoint) uses MessageFormat. -; -; MessageFormatNote = "** %S: %R\n Time: %T Iteration: %D%I\n" -; MessageFormatWarning = "** %S: %R\n Time: %T Iteration: %D%I\n" -; MessageFormatError = "** %S: %R\n Time: %T Iteration: %D %K: %i File: %F\n" -; MessageFormatFail = "** %S: %R\n Time: %T Iteration: %D %K: %i File: %F\n" -; MessageFormatFatal = "** %S: %R\n Time: %T Iteration: %D %K: %i File: %F\n" -; MessageFormatBreakLine = "** %S: %R\n Time: %T Iteration: %D %K: %i File: %F Line: %L\n" -; MessageFormatBreak = "** %S: %R\n Time: %T Iteration: %D %K: %i File: %F\n" -; MessageFormat = "** %S: %R\n Time: %T Iteration: %D%I\n" - -; Error File - alternate file for storing error messages -; ErrorFile = error.log - -; Simulation Breakpoint messages -; This flag controls the display of function names when reporting the location -; where the simulator stops because of a breakpoint or fatal error. -; Example with function name: # Break in Process ctr at counter.vhd line 44 -; Example without function name: # Break at counter.vhd line 44 -; Default value is 1. -ShowFunctions = 1 - -; Default radix for all windows and commands. -; Radix may be one of: symbolic, ascii, binary, octal, decimal, hex, unsigned -; Flags may be one of: enumnumeric, showbase, wreal -DefaultRadix = hexadecimal -DefaultRadixFlags = showbase -; Set to 1 for make the signal_force VHDL and Verilog functions use the -; default radix when processing the force value. Prior to 10.2 signal_force -; used the default radix, now it always uses symbolic unless value explicitly indicates base -;SignalForceFunctionUseDefaultRadix = 0 - -; VSIM Startup command -; Startup = do startup.do - -; VSIM Shutdown file -; Filename to save u/i formats and configurations. -; ShutdownFile = restart.do -; To explicitly disable auto save: -; ShutdownFile = --disable-auto-save - -; Run simulator in batch mode as if -batch were specified on the command line if none of -c, -gui, or -i specified. -; Simulator runs in interactive mode as if -i were specified if this option is 0. Default is 0. -; BatchMode = 1 - -; File for saving command transcript when -batch option used -; This option is ignored when -c, -gui, or -i options are used or if BatchMode above is zero -; default is unset so command transcript only goes to stdout for better performance -; BatchTranscriptFile = transcript - -; File for saving command transcript, this option is ignored when -batch option is used -TranscriptFile = transcript - -; Transcript file long line wrapping mode(s) -; mode == 0 :: no wrapping, line recorded as is -; mode == 1 :: wrap at first whitespace after WSColumn -; or at Column. -; mode == 2 :: wrap as above, but add continuation -; character ('\') at end of each wrapped line -; -; WrapMode = 0 -; WrapColumn = 30000 -; WrapWSColumn = 27000 - -; File for saving command history -; CommandHistory = cmdhist.log - -; Specify whether paths in simulator commands should be described -; in VHDL or Verilog format. -; For VHDL, PathSeparator = / -; For Verilog, PathSeparator = . -; Must not be the same character as DatasetSeparator. -PathSeparator = / - -; Specify the dataset separator for fully rooted contexts. -; The default is ':'. For example: sim:/top -; Must not be the same character as PathSeparator. -DatasetSeparator = : - -; Specify a unique path separator for the Signal Spy set of functions. -; The default will be to use the PathSeparator variable. -; Must not be the same character as DatasetSeparator. -; SignalSpyPathSeparator = / - -; Used to control parsing of HDL identifiers input to the tool. -; This includes CLI commands, vsim/vopt/vlog/vcom options, -; string arguments to FLI/VPI/DPI calls, etc. -; If set to 1, accept either Verilog escaped Id syntax or -; VHDL extended id syntax, regardless of source language. -; If set to 0, the syntax of the source language must be used. -; Each identifier in a hierarchical name may need different syntax, -; e.g. "/top/\vhdl*ext*id\/middle/\vlog*ext*id /bottom" or -; "top.\vhdl*ext*id\.middle.\vlog*ext*id .bottom" -; GenerousIdentifierParsing = 1 - -; Disable VHDL assertion messages -; IgnoreNote = 1 -; IgnoreWarning = 1 -; IgnoreError = 1 -; IgnoreFailure = 1 - -; Disable SystemVerilog assertion messages -; IgnoreSVAInfo = 1 -; IgnoreSVAWarning = 1 -; IgnoreSVAError = 1 -; IgnoreSVAFatal = 1 - -; Do not print any additional information from Severity System tasks. -; Only the message provided by the user is printed along with severity -; information. -; SVAPrintOnlyUserMessage = 1; - -; Default force kind. May be freeze, drive, deposit, or default -; or in other terms, fixed, wired, or charged. -; A value of "default" will use the signal kind to determine the -; force kind, drive for resolved signals, freeze for unresolved signals -; DefaultForceKind = freeze - -; Control the iteration of events when a VHDL signal is forced to a value -; This flag can be set to honour the signal update event in next iteration, -; the default is to update and propagate in the same iteration. -; ForceSigNextIter = 1 - -; Enable simulation statistics. Specify one or more arguments: -; [all,none,time,cmd,msg,perf,verbose,list,kb,eor] -; Add '-' to disable specific statistics. Default is [time,cmd,msg]. -; Stats = time,cmd,msg - -; If zero, open files when elaborated; otherwise, open files on -; first read or write. Default is 0. -; DelayFileOpen = 1 - -; Control VHDL files opened for write. -; 0 = Buffered, 1 = Unbuffered -UnbufferedOutput = 0 - -; Control the number of VHDL files open concurrently. -; This number should always be less than the current ulimit -; setting for max file descriptors. -; 0 = unlimited -ConcurrentFileLimit = 40 - -; If nonzero, close files as soon as there is either an explicit call to -; file_close, or when the file variable's scope is closed. When zero, a -; file opened in append mode is not closed in case it is immediately -; reopened in append mode; otherwise, the file will be closed at the -; point it is reopened. -; AppendClose = 1 - -; Control the number of hierarchical regions displayed as -; part of a signal name shown in the Wave window. -; A value of zero tells VSIM to display the full name. -; The default is 0. -; WaveSignalNameWidth = 0 - -; Turn off warnings when changing VHDL constants and generics -; Default is 1 to generate warning messages -; WarnConstantChange = 0 - -; Turn off warnings from accelerated versions of the std_logic_arith, -; std_logic_unsigned, and std_logic_signed packages. -; StdArithNoWarnings = 1 - -; Turn off warnings from accelerated versions of the IEEE numeric_std -; and numeric_bit packages. -; NumericStdNoWarnings = 1 - -; Use old-style (pre-6.6) VHDL FOR GENERATE statement iteration names -; in the design hierarchy. -; This style is controlled by the value of the GenerateFormat -; value described next. Default is to use new-style names, which -; comprise the generate statement label, '(', the value of the generate -; parameter, and a closing ')'. -; Set this to 1 to use old-style names. -; OldVhdlForGenNames = 1 - -; Control the format of the old-style VHDL FOR generate statement region -; name for each iteration. Do not quote the value. -; The format string here must contain the conversion codes %s and %d, -; in that order, and no other conversion codes. The %s represents -; the generate statement label; the %d represents the generate parameter value -; at a particular iteration (this is the position number if the generate parameter -; is of an enumeration type). Embedded whitespace is allowed (but discouraged); -; leading and trailing whitespace is ignored. -; Application of the format must result in a unique region name over all -; loop iterations for a particular immediately enclosing scope so that name -; lookup can function properly. The default is %s__%d. -; GenerateFormat = %s__%d - -; Enable more efficient logging of VHDL Variables. -; Logging VHDL variables without this enabled, while possible, is very -; inefficient. Enabling this will provide a more efficient logging methodology -; at the expense of more memory usage. By default this feature is disabled (0). -; To enabled this feature, set this variable to 1. -; VhdlVariableLogging = 1 - -; Enable logging of VHDL access type variables and their designated objects. -; This setting will allow both variables of an access type ("access variables") -; and their designated objects ("access objects") to be logged. Logging a -; variable of an access type will automatically also cause the designated -; object(s) of that variable to be logged as the simulation progresses. -; Further, enabling this allows access objects to be logged by name. By default -; this feature is disabled (0). To enable this feature, set this variable to 1. -; Enabling this will automatically enable the VhdlVariableLogging feature also. -; AccessObjDebug = 1 - -; Make each VHDL package in a PDU has its own separate copy of the package instead -; of sharing the package between PDUs. The default is to share packages. -; To ensure that each PDU has its own set of packages, set this variable to 1. -; VhdlSeparatePduPackage = 1 - -; Specify whether checkpoint files should be compressed. -; The default is 1 (compressed). -; CheckpointCompressMode = 0 - -; Specify gcc compiler used in the compilation of automatically generated DPI exportwrapper. -; Use custom gcc compiler located at this path rather than the default path. -; The path should point directly at a compiler executable. -; DpiCppPath = /bin/gcc -; -; Specify the compiler version from the list of support GNU compilers. -; examples 4.7.4, 5.3.0, 7.4.0 -; DpiCppInstall = 7.4.0 - -; Specify whether to enable SystemVerilog DPI "out-of-the-blue" calls. -; The term "out-of-the-blue" refers to SystemVerilog export function calls -; made from C functions that don't have the proper context setup -; (as is the case when running under "DPI-C" import functions). -; When this is enabled, one can call a DPI export function -; (but not task) from any C code. -; the setting of this variable can be one of the following values: -; 0 : dpioutoftheblue call is disabled (default) -; 1 : dpioutoftheblue call is enabled, but export call debug support is not available. -; 2 : dpioutoftheblue call is enabled, and limited export call debug support is available. -; DpiOutOfTheBlue = 1 - -; Specify whether continuous assignments are run before other normal priority -; processes scheduled in the same iteration. This event ordering minimizes race -; differences between optimized and non-optimized designs, and is the default -; behavior beginning with the 6.5 release. For pre-6.5 event ordering, set -; ImmediateContinuousAssign to 0. -; The default is 1 (enabled). -; ImmediateContinuousAssign = 0 - -; List of dynamically loaded objects for Verilog PLI applications -; Veriuser = veriuser.sl - -; Which default VPI object model should the tool conform to? -; The 1364 modes are Verilog-only, for backwards compatibility with older -; libraries, and SystemVerilog objects are not available in these modes. -; -; In the absence of a user-specified default, the tool default is the -; latest available LRM behavior. -; Options for PliCompatDefault are: -; VPI_COMPATIBILITY_VERSION_1364v1995 -; VPI_COMPATIBILITY_VERSION_1364v2001 -; VPI_COMPATIBILITY_VERSION_1364v2005 -; VPI_COMPATIBILITY_VERSION_1800v2005 -; VPI_COMPATIBILITY_VERSION_1800v2008 -; -; Synonyms for each string are also recognized: -; VPI_COMPATIBILITY_VERSION_1364v1995 (1995, 95, 1364v1995, 1364V1995, VL1995) -; VPI_COMPATIBILITY_VERSION_1364v2001 (2001, 01, 1364v2001, 1364V2001, VL2001) -; VPI_COMPATIBILITY_VERSION_1364v2005 (1364v2005, 1364V2005, VL2005) -; VPI_COMPATIBILITY_VERSION_1800v2005 (2005, 05, 1800v2005, 1800V2005, SV2005) -; VPI_COMPATIBILITY_VERSION_1800v2008 (2008, 08, 1800v2008, 1800V2008, SV2008) - - -; PliCompatDefault = VPI_COMPATIBILITY_VERSION_1800v2005 - -; Specify whether the Verilog system task $fopen or vpi_mcd_open() -; will create directories that do not exist when opening the file -; in "a" or "w" mode. -; The default is 0 (do not create non-existent directories) -; CreateDirForFileAccess = 1 - -; Specify default options for the restart command. Options can be one -; or more of: -force -nobreakpoint -nolist -nolog -nowave -noassertions -; DefaultRestartOptions = -force - - -; Specify default UVM-aware debug options if the vsim -uvmcontrol switch is not used. -; Valid options include: all, none, verbose, disable, struct, reseed, msglog, trlog, certe. -; Options can be enabled by just adding the name, or disabled by prefixing the option with a "-". -; The list of options must be delimited by commas, without spaces or tabs. -; -; Some examples -; To turn on all available UVM-aware debug features: -; UVMControl = all -; To turn on the struct window, mesage logging, and transaction logging: -; UVMControl = struct,msglog,trlog -; To turn on all options except certe: -; UVMControl = all,-certe -; To completely disable all UVM-aware debug functionality: -; UVMControl = disable - -; Specify the WildcardFilter setting. -; A space separated list of object types to be excluded when performing -; wildcard matches with log, wave, etc commands. The default value for this variable is: -; "Variable Constant Generic Parameter SpecParam Memory Assertion Cover Endpoint ScVariable CellInternal ImmediateAssert VHDLFile" -; See "Using the WildcardFilter Preference Variable" in the documentation for -; details on how to use this variable and for descriptions of the filter types. -WildcardFilter = Variable Constant Generic Parameter SpecParam Memory Assertion Cover Endpoint ScVariable CellInternal ImmediateAssert VHDLFile - -; Specify the WildcardSizeThreshold setting. -; This integer setting specifies the size at which objects will be excluded when -; performing wildcard matches with log, wave, etc commands. Objects of size equal -; to or greater than the WildcardSizeThreshold will be filtered out from the wildcard -; matches. The size is a simple calculation of number of bits or items in the object. -; The default value is 8k (8192). Setting this value to 0 will disable the checking -; of object size against this threshold and allow all objects of any size to be logged. -WildcardSizeThreshold = 8192 - -; Specify whether warning messages are output when objects are filtered out due to the -; WildcardSizeThreshold. The default is 0 (no messages generated). -WildcardSizeThresholdVerbose = 0 - -; Turn on (1) or off (0) WLF file compression. -; The default is 1 (compress WLF file). -; WLFCompress = 0 - -; Specify whether to save all design hierarchy (1) in the WLF file -; or only regions containing logged signals (0). -; The default is 0 (save only regions with logged signals). -; WLFSaveAllRegions = 1 - -; WLF file time limit. Limit WLF file by time, as closely as possible, -; to the specified amount of simulation time. When the limit is exceeded -; the earliest times get truncated from the file. -; If both time and size limits are specified the most restrictive is used. -; UserTimeUnits are used if time units are not specified. -; The default is 0 (no limit). Example: WLFTimeLimit = {100 ms} -; WLFTimeLimit = 0 - -; WLF file size limit. Limit WLF file size, as closely as possible, -; to the specified number of megabytes. If both time and size limits -; are specified then the most restrictive is used. -; The default is 0 (no limit). -; WLFSizeLimit = 1000 - -; Specify whether or not a WLF file should be deleted when the -; simulation ends. A value of 1 will cause the WLF file to be deleted. -; The default is 0 (do not delete WLF file when simulation ends). -; WLFDeleteOnQuit = 1 - -; Specify whether or not a WLF file should be optimized during -; simulation. If set to 0, the WLF file will not be optimized. -; The default is 1, optimize the WLF file. -; WLFOptimize = 0 - -; Specify the name of the WLF file. -; The default is vsim.wlf -; WLFFilename = vsim.wlf - -; Specify whether to lock the WLF file. -; Locking the file prevents other invocations of ModelSim/Questa tools from -; inadvertently overwriting the WLF file. -; The default is 1, lock the WLF file. -; WLFFileLock = 0 - -; Specify the update interval for the WLF file in live simulation. -; The interval is given in seconds. -; The value is the smallest interval between WLF file updates. The WLF file -; will be flushed (updated) after (at least) the interval has elapsed, ensuring -; that the data is correct when viewed from a separate viewer. -; A value of 0 means that no updating will occur. -; The default value is 10 seconds. -; WLFUpdateInterval = 10 - -; Specify the WLF cache size limit for WLF files. -; The value is given in megabytes. A value of 0 turns off the cache. -; On non-Windows platforms the default WLFCacheSize setting is 2000 (megabytes). -; On Windows, the default value is 1000 (megabytes) to help to avoid filling -; process memory. -; WLFSimCacheSize allows a different cache size to be set for a live simulation -; WLF file, independent of post-simulation WLF file viewing. If WLFSimCacheSize -; is not set, it defaults to the WLFCacheSize value. -; WLFCacheSize = 2000 -; WLFSimCacheSize = 500 - -; Specify the WLF file event collapse mode. -; 0 = Preserve all events and event order. (same as -wlfnocollapse) -; 1 = Only record values of logged objects at the end of a simulator iteration. -; (same as -wlfcollapsedelta) -; 2 = Only record values of logged objects at the end of a simulator time step. -; (same as -wlfcollapsetime) -; The default is 1. -; WLFCollapseMode = 0 - -; Specify whether WLF file logging can use threads on multi-processor machines. -; If 0, no threads will be used; if 1, threads will be used if the system has -; more than one processor. -; WLFUseThreads = 1 - -; Specify the size of objects that will trigger "large object" messages -; at log/wave/list time. The size calculation of the object is the same as that -; used by the WildcardSizeThreshold. The default LargeObjectSize size is 500,000. -; Setting LargeObjectSize to 0 will disable these messages. -; LargeObjectSize = 500000 - -; Specify the depth of stack frames returned by $stacktrace([level]). -; This depth will be picked up when the optional 'level' argument -; is not specified or its value is not a positive integer. -; StackTraceDepth = 100 - -; Turn on/off undebuggable SystemC type warnings. Default is on. -; ShowUndebuggableScTypeWarning = 0 - -; Turn on/off unassociated SystemC name warnings. Default is off. -; ShowUnassociatedScNameWarning = 1 - -; Turn on/off SystemC IEEE 1666 deprecation warnings. Default is off. -; ScShowIeeeDeprecationWarnings = 1 - -; Turn on/off the check for multiple drivers on a SystemC sc_signal. Default is off. -; For SystemC-2.3.2 the valid values are 0,1 and 2 -; 0 = SC_SIGNAL_WRITE_CHECK_DISABLE_ -; 1 = SC_SIGNAL_WRITE_CHECK_DEFAULT_ -; 2 = SC_SIGNAL_WRITE_CHECK_CONFLICT_ -; For SystemC-2.2 the valid values are 0 and 1 -; 0 = DISABLE -; 1 = ENABLE -; ScEnableScSignalWriteCheck = 1 - -; Set SystemC default time unit. -; Set to fs, ps, ns, us, ms, or sec with optional -; prefix of 1, 10, or 100. The default is 1 ns. -; The ScTimeUnit value is honored if it is coarser than Resolution. -; If ScTimeUnit is finer than Resolution, it is set to the value -; of Resolution. For example, if Resolution is 100ps and ScTimeUnit is ns, -; then the default time unit will be 1 ns. However if Resolution -; is 10 ns and ScTimeUnit is ns, then the default time unit will be 10 ns. -ScTimeUnit = ns - -; Set SystemC sc_main stack size. The stack size is set as an integer -; number followed by the unit which can be Kb(Kilo-byte), Mb(Mega-byte) or -; Gb(Giga-byte). Default is 10 Mb. The stack size for sc_main depends -; on the amount of data on the sc_main() stack and the memory required -; to succesfully execute the longest function call chain of sc_main(). -ScMainStackSize = 10 Mb - -; Set SystemC thread stack size. The stack size is set as an integer -; number followed by the unit which can be Kb(Kilo-byte), Mb(Mega-byte) or -; Gb(Giga-byte). The stack size for sc_thread depends -; on the amount of data on the sc_thread stack and the memory required -; to succesfully execute the thread. -; ScStackSize = 1 Mb - -; Turn on/off execution of remainder of sc_main upon quitting the current -; simulation session. If the cumulative length of sc_main() in terms of -; simulation time units is less than the length of the current simulation -; run upon quit or restart, sc_main() will be in the middle of execution. -; This switch gives the option to execute the remainder of sc_main upon -; quitting simulation. The drawback of not running sc_main till the end -; is memory leaks for objects created by sc_main. If on, the remainder of -; sc_main will be executed ignoring all delays. This may cause the simulator -; to crash if the code in sc_main is dependent on some simulation state. -; Default is on. -ScMainFinishOnQuit = 1 - -; Enable calling of the DPI export taks/functions from the -; SystemC start_of_simulation() callback. -; The default is off. -; EnableDpiSosCb = 1 - - -; Set the SCV relationship name that will be used to identify phase -; relations. If the name given to a transactor relation matches this -; name, the transactions involved will be treated as phase transactions -ScvPhaseRelationName = mti_phase - -; Customize the vsim kernel shutdown behavior at the end of the simulation. -; Some common causes of the end of simulation are $finish (implicit or explicit), -; sc_stop(), tf_dofinish(), and assertion failures. -; This should be set to "ask", "exit", or "stop". The default is "ask". -; "ask" -- In batch mode, the vsim kernel will abruptly exit. -; In GUI mode, a dialog box will pop up and ask for user confirmation -; whether or not to quit the simulation. -; "stop" -- Cause the simulation to stay loaded in memory. This can make some -; post-simulation tasks easier. -; "exit" -- The simulation will abruptly exit without asking for any confirmation. -; "final" -- Run SystemVerilog final blocks then behave as "stop". -; Note: This variable can be overridden with the vsim "-onfinish" command line switch. -OnFinish = ask - -; Print pending deferred assertion messages. -; Deferred assertion messages may be scheduled after the $finish in the same -; time step. Deferred assertions scheduled to print after the $finish are -; printed before exiting with severity level NOTE since it's not known whether -; the assertion is still valid due to being printed in the active region -; instead of the reactive region where they are normally printed. -; OnFinishPendingAssert = 1; - -; Print "simstats" result. Default is 0. -; 0 == do not print simstats -; 1 == print at end of simulation -; 2 == print at end of each run command and end of simulation -; PrintSimStats = 1 - -; Assertion File - alternate file for storing VHDL/PSL/Verilog assertion messages -; AssertFile = assert.log - -; Enable assertion counts. Default is off. -; AssertionCounts = 1 - -; Run simulator in assertion debug mode. Default is off. -; AssertionDebug = 1 - -; Turn on/off PSL/SVA/VHDL assertion enable. Default is on. -; AssertionEnable = 0 - -; Set PSL/SVA/VHDL concurrent assertion fail limit. Default is -1. -; Any positive integer, -1 for infinity. -; AssertionLimit = 1 - -; Turn on/off concurrent assertion pass log. Default is off. -; Assertion pass logging is only enabled when assertion is browseable -; and assertion debug is enabled. -; AssertionPassLog = 1 - -; Turn on/off PSL concurrent assertion fail log. Default is on. -; The flag does not affect SVA -; AssertionFailLog = 0 - -; Turn on/off SVA concurrent assertion local var printing in -assertdebug mode. Default is on. -; AssertionFailLocalVarLog = 0 - -; Set action type for PSL/SVA concurrent assertion fail action. Default is continue. -; 0 = Continue 1 = Break 2 = Exit -; AssertionFailAction = 1 - -; Enable the active thread monitor in the waveform display when assertion debug is enabled. -; AssertionActiveThreadMonitor = 1 - -; Control how many waveform rows will be used for displaying the active threads. Default is 5. -; AssertionActiveThreadMonitorLimit = 5 - -; Assertion thread limit after which assertion would be killed/switched off. -; The default is -1 (unlimited). If the number of threads for an assertion go -; beyond this limit, the assertion would be either switched off or killed. This -; limit applies to only assert directives. -;AssertionThreadLimit = -1 - -; Action to be taken once the assertion thread limit is reached. Default -; is kill. It can have a value of off or kill. In case of kill, all the existing -; threads are terminated and no new attempts are started. In case of off, the -; existing attempts keep on evaluating but no new attempts are started. This -; variable applies to only assert directives. -;AssertionThreadLimitAction = kill - -; Cover thread limit after which cover would be killed/switched off. -; The default is -1 (unlimited). If the number of threads for a cover go -; beyond this limit, the cover would be either switched off or killed. This -; limit applies to only cover directives. -;CoverThreadLimit = -1 - -; Action to be taken once the cover thread limit is reached. Default -; is kill. It can have a value of off or kill. In case of kill, all the existing -; threads are terminated and no new attempts are started. In case of off, the -; existing attempts keep on evaluating but no new attempts are started. This -; variable applies to only cover directives. -;CoverThreadLimitAction = kill - - -; By default immediate assertions do not participate in Assertion Coverage calculations -; unless they are executed. This switch causes all immediate assertions in the design -; to participate in Assertion Coverage calculations, whether attempted or not. -; UnattemptedImmediateAssertions = 0 - -; By default immediate covers participate in Coverage calculations -; whether they are attempted or not. This switch causes all unattempted -; immediate covers in the design to stop participating in Coverage -; calculations. -; UnattemptedImmediateCovers = 0 - -; By default pass action block is not executed for assertions on vacuous -; success. The following variable is provided to enable execution of -; pass action block on vacuous success. The following variable is only effective -; if the user does not disable pass action block execution by using either -; system tasks or CLI. Also there is a performance penalty for enabling -; the following variable. -;AssertionEnableVacuousPassActionBlock = 1 - -; As per strict 1850-2005 PSL LRM, an always property can either pass -; or fail. However, by default, Questa reports multiple passes and -; multiple fails on top always/never property (always/never operator -; is the top operator under Verification Directive). The reason -; being that Questa reports passes and fails on per attempt of the -; top always/never property. Use the following flag to instruct -; Questa to strictly follow LRM. With this flag, all assert/never -; directives will start an attempt once at start of simulation. -; The attempt can either fail, match or match vacuously. -; For e.g. if always is the top operator under assert, the always will -; keep on checking the property at every clock. If the property under -; always fails, the directive will be considered failed and no more -; checking will be done for that directive. A top always property, -; if it does not fail, will show a pass at end of simulation. -; The default value is '0' (i.e. zero is off). For example: -; PslOneAttempt = 1 - -; Specify the number of clock ticks to represent infinite clock ticks. -; This affects eventually!, until! and until_!. If at End of Simulation -; (EOS) an active strong-property has not clocked this number of -; clock ticks then neither pass or fail (vacuous match) is returned -; else respective fail/pass is returned. The default value is '0' (zero) -; which effectively does not check for clock tick condition. For example: -; PslInfinityThreshold = 5000 - -; Control how many thread start times will be preserved for ATV viewing for a given assertion -; instance. Default is -1 (ALL). -; ATVStartTimeKeepCount = -1 - -; Turn on/off code coverage -; CodeCoverage = 0 - -; This option applies to condition and expression coverage UDP tables. It -; has no effect unless UDP is enabled for coverage with vcom/vlog/vopt -coverudp. -; If this option is used and a match occurs in more than one row in the UDP table, -; none of the counts for all matching rows is incremented. By default, counts are -; incremented for all matching rows. -; CoverCountAll = 1 - -; Turn off automatic inclusion of VHDL integers in toggle coverage. Default -; is to include them. -; ToggleNoIntegers = 1 - -; Set the maximum number of values that are collected for toggle coverage of -; VHDL integers. Default is 100; -; ToggleMaxIntValues = 100 - -; Set the maximum number of values that are collected for toggle coverage of -; Verilog real. Default is 100; -; ToggleMaxRealValues = 100 - -; Turn on automatic inclusion of Verilog integers in toggle coverage, except -; for enumeration types. Default is to include them. -; ToggleVlogIntegers = 0 - -; Turn on automatic inclusion of Verilog real type in toggle coverage, except -; for shortreal types. Default is to not include them. -; ToggleVlogReal = 1 - -; Turn on automatic inclusion of Verilog fixed-size unpacked arrays, VHDL multi-d arrays -; and VHDL arrays-of-arrays in toggle coverage. -; Default is to not include them. -; ToggleFixedSizeArray = 1 - -; Increase or decrease the maximum size of Verilog unpacked fixed-size arrays, -; VHDL multi-d arrays and VHDL arrays-of-arrays that are included for toggle coverage. -; This leads to a longer simulation time with bigger arrays covered with toggle coverage. -; Default is 1024. -; ToggleMaxFixedSizeArray = 1024 - -; Treat Verilog multi-dimensional packed vectors and packed structures as equivalently sized -; one-dimensional packed vectors for toggle coverage. Default is 0. -; TogglePackedAsVec = 0 - -; Treat Verilog enumerated types as equivalently sized one-dimensional packed vectors for -; toggle coverage. Default is 0. -; ToggleVlogEnumBits = 0 - -; Turn off automatic inclusion of VHDL records in toggle coverage. -; Default is to include them. -; ToggleVHDLRecords = 0 - -; Limit the widths of registers automatically tracked for toggle coverage. Default is 128. -; For unlimited width, set to 0. -; ToggleWidthLimit = 128 - -; Limit the counts that are tracked for toggle coverage. When all edges for a bit have -; reached this count, further activity on the bit is ignored. Default is 1. -; For unlimited counts, set to 0. -; ToggleCountLimit = 1 - -; Change the mode of extended toggle coverage. Default is 3. Valid modes are 1, 2 and 3. -; Following is the toggle coverage calculation criteria based on extended toggle mode: -; Mode 1: 0L->1H & 1H->0L & any one 'Z' transition (to/from 'Z'). -; Mode 2: 0L->1H & 1H->0L & one transition to 'Z' & one transition from 'Z'. -; Mode 3: 0L->1H & 1H->0L & all 'Z' transitions. -; ExtendedToggleMode = 3 - -; Enable toggle statistics collection only for ports. Default is 0. -; TogglePortsOnly = 1 - -; Limit the counts that are tracked for Focussed Expression Coverage. When a bin has -; reached this count, further tracking of the input patterns linked to it is ignored. -; Default is 1. For unlimited counts, set to 0. -; NOTE: Changing this value from its default value may affect simulation performance. -; FecCountLimit = 1 - -; Limit the counts that are tracked for UDP Coverage. When a bin has -; reached this count, further tracking of the input patterns linked to it is ignored. -; Default is 1. For unlimited counts, set to 0. -; NOTE: Changing this value from its default value may affect simulation performance. -; UdpCountLimit = 1 - -; Control toggle coverage deglitching period. A period of 0, eliminates delta -; cycle glitches. This is the default. The value of ToggleDeglitchPeriod needs to be either -; 0 or a time string that includes time units. Examples: 0 or 10.0ps or "10.0 ps". -; ToggleDeglitchPeriod = 10.0ps - -; Turn on/off all PSL/SVA cover directive enables. Default is on. -; CoverEnable = 0 - -; Turn on/off PSL/SVA cover log. Default is off "0". -; CoverLog = 1 - -; Set "at_least" value for all PSL/SVA cover directives. Default is 1. -; CoverAtLeast = 2 - -; Set "limit" value for all PSL/SVA cover directives. Default is -1. -; Any positive integer, -1 for infinity. -; CoverLimit = 1 - -; Specify the coverage database filename. -; Default is "" (i.e. database is NOT automatically saved on close). -; UCDBFilename = vsim.ucdb - -; Specify the maximum limit for the number of Cross (bin) products reported -; in XML and UCDB report against a Cross. A warning is issued if the limit -; is crossed. Default is zero. vsim switch -cvgmaxrptrhscross can override this -; setting. -; MaxReportRhsSVCrossProducts = 1000 - -; Specify the override for the "auto_bin_max" option for the Covergroups. -; If not specified then value from Covergroup "option" is used. -; SVCoverpointAutoBinMax = 64 - -; Specify the override for the value of "cross_num_print_missing" -; option for the Cross in Covergroups. If not specified then value -; specified in the "option.cross_num_print_missing" is used. This -; is a runtime option. NOTE: This overrides any "cross_num_print_missing" -; value specified by user in source file and any SVCrossNumPrintMissingDefault -; specified in modelsim.ini. -; SVCrossNumPrintMissing = 0 - -; Specify whether to use the value of "cross_num_print_missing" -; option in report and GUI for the Cross in Covergroups. If not specified then -; cross_num_print_missing is ignored for creating reports and displaying -; covergroups in GUI. Default is 0, which means ignore "cross_num_print_missing". -; UseSVCrossNumPrintMissing = 0 - -; Specify the threshold of Coverpoint wildcard bin value range size, above which -; a warning will be triggered. The default is 4K -- 12 wildcard bits. -; SVCoverpointWildCardBinValueSizeWarn = 4096 - -; Specify the override for the value of "strobe" option for the -; Covergroup Type. If not specified then value in "type_option.strobe" -; will be used. This is runtime option which forces "strobe" to -; user specified value and supersedes user specified values in the -; SystemVerilog Code. NOTE: This also overrides the compile time -; default value override specified using "SVCovergroupStrobeDefault" -; SVCovergroupStrobe = 0 - -; Override for explicit assignments in source code to "option.goal" of -; SystemVerilog covergroup, coverpoint, and cross. It also overrides the -; default value of "option.goal" (defined to be 100 in the SystemVerilog -; LRM) and the value of modelsim.ini variable "SVCovergroupGoalDefault". -; SVCovergroupGoal = 100 - -; Override for explicit assignments in source code to "type_option.goal" of -; SystemVerilog covergroup, coverpoint, and cross. It also overrides the -; default value of "type_option.goal" (defined to be 100 in the SystemVerilog -; LRM) and the value of modelsim.ini variable "SVCovergroupTypeGoalDefault". -; SVCovergroupTypeGoal = 100 - -; Enforce the 6.3 behavior of covergroup get_coverage() and get_inst_coverage() -; builtin functions, and report. This setting changes the default values of -; option.get_inst_coverage and type_option.merge_instances to ensure the 6.3 -; behavior if explicit assignments are not made on option.get_inst_coverage and -; type_option.merge_instances by the user. There are two vsim command line -; options, -cvg63 and -nocvg63 to override this setting from vsim command line. -; The default value of this variable from release 6.6 onwards is 0. This default -; drives compliance with the clarified behavior in the IEEE 1800-2009 standard. -; SVCovergroup63Compatibility = 0 - -; Enforce the default behavior of covergroup get_coverage() builtin function, GUI -; and report. This variable sets the default value of type_option.merge_instances. -; There are two vsim command line options, -cvgmergeinstances and -; -nocvgmergeinstances to override this setting from vsim command line. -; The default value of this variable, -1 (don't care), allows the tool to determine -; the effective value, based on factors related to capacity and optimization. -; The type_option.merge_instances appears in the GUI and coverage reports as either -; auto(1) or auto(0), depending on whether the effective value was determined to -; be a 1 or a 0. -; SVCovergroupMergeInstancesDefault = -1 - -; Enable or disable generation of more detailed information about the sampling -; of covergroup, cross, and coverpoints. It provides the details of the number -; of times the covergroup instance and type were sampled, as well as details -; about why covergroup, cross and coverpoint were not covered. A non-zero value -; is to enable this feature. 0 is to disable this feature. Default is 0 -; SVCovergroupSampleInfo = 0 - -; Specify the maximum number of Coverpoint bins in whole design for -; all Covergroups. -; MaxSVCoverpointBinsDesign = 2147483648 - -; Specify maximum number of Coverpoint bins in any instance of a Covergroup, default is 2^10 bins -; MaxSVCoverpointBinsInst = 1048576 - -; Specify the maximum number of Cross bins in whole design for -; all Covergroups. -; MaxSVCrossBinsDesign = 2147483648 - -; Specify maximum number of Cross bins in any instance of a Covergroup, default is 2^16 bins -; MaxSVCrossBinsInst = 67108864 - -; Specify whether vsim will collect the coverage data of zero-weight coverage items or not. -; By default, this variable is set 0, in which case option.no_collect setting will take effect. -; If this variable is set to 1, all zero-weight coverage items will not be saved. -; Note that the usage of vsim switch -cvgzwnocollect, if present, will override the setting -; of this variable. -; CvgZWNoCollect = 1 - -; Specify a space delimited list of double quoted TCL style -; regular expressions which will be matched against the text of all messages. -; If any regular expression is found to be contained within any message, the -; status for that message will not be propagated to the UCDB TESTSTATUS. -; If no match is detected, then the status will be propagated to the -; UCDB TESTSTATUS. More than one such regular expression text is allowed, -; and each message text is compared for each regular expression in the list. -; UCDBTestStatusMessageFilter = "Done with Test Bench" "Ignore .* message" - -; Set weight for all PSL/SVA cover directives. Default is 1. -; CoverWeight = 2 - -; Check vsim plusargs. Default is 0 (off). -; The command line equivalent is -check_plusargs . -; 0 = Don't check plusargs (this is the default) -; 1 = Warning on unrecognized plusarg -; 2 = Error and exit on unrecognized plusarg -; CheckPlusargs = 1 - -; Load the specified shared objects with the RTLD_GLOBAL flag. -; This gives global visibility to all symbols in the shared objects, -; meaning that subsequently loaded shared objects can bind to symbols -; in the global shared objects. The list of shared objects should -; be whitespace delimited. This option is not supported on the -; Windows or AIX platforms. -; GlobalSharedObjectList = example1.so example2.so example3.so - -; Generate the stub definitions for the undefined symbols in the shared libraries being -; loaded in the simulation. When this flow is turned on, the undefined symbols will not -; prevent vsim from loading. Calling undefined symbols at runtime will cause fatal error. -; The valid arguments are: on, off, verbose. -; on : turn on the automatic generation of stub definitions. -; off: turn off the flow. The undefined symbols will trigger an immediate load failure. -; verbose: Turn on the flow and report the undefined symbols for each shared library. -; NOTE: This variable can be overriden with vsim switch "-undefsyms". -; The default is on. -; -; UndefSyms = off - -; Enable the support for automatically checkpointing foreign C/C++ libraries. -; The valid arguments are: 0, 1, 2 -; 0: off (default) -; 1: on (manually save/restore user shared library data) -; 2: auto (automatically save/restore user shared library data) -; This option is not supported on the Windows platforms. -; -; AllowCheckpointCpp = 2 - -; Initial seed for the random number generator of the root thread (SystemVerilog). -; NOTE: This variable can be overridden with the vsim "-sv_seed" command line switch. -; The default value is 0. -; Sv_Seed = 0 - -; Specify the solver "engine" that vsim will select for constrained random -; generation. -; Valid values are: -; "auto" - automatically select the best engine for the current -; constraint scenario -; "bdd" - evaluate all constraint scenarios using the BDD solver engine -; "act" - evaluate all constraint scenarios using the ACT solver engine -; While the BDD solver engine is generally efficient with constraint scenarios -; involving bitwise logical relationships, the ACT solver engine can exhibit -; superior performance with constraint scenarios involving large numbers of -; random variables related via arithmetic operators (+, *, etc). -; NOTE: This variable can be overridden with the vsim "-solveengine" command -; line switch. -; The default value is "auto". -; SolveEngine = auto - -; Specify the maximum size that a random dynamic array or queue may be resized -; to by the solver. If the solver attempts to resize a dynamic array or queue -; to a size greater than the specified limit, the solver will abort with an error. -; The default value is 10000. The maximum value is 10000000. A value of 0 is -; equivalent to specifying the maximum value. -; SolveArrayResizeMax = 10000 - -; Specify error message severity when randomize() and randomize(null) failures -; are detected. -; -; Integer value up to two digits are allowed with each digit having the following legal values: -; 0 = No error 1 = Warning 2 = Error 3 = Failure 4 = Fatal -; -; 1) When a value with two digits is used, the digit at tenth place (leftmost digit) represents -; the severtity setting for normal randomize() calls. The digit at ones place (rightmost digit) -; represents the setting for randomize(null) calls. -; -; 2) When a single digit value is used, the setting is applied to both normal randomize() call -; and randomize(null) call. -; -; Example: Fatal error for randomize() failures and NO error for randomize(null) failures -; -solvefailseverity=40 -; -; NOTE: SolveFailSeverity can affect the behavior of SolveFailDebug. When SolveFailDebug is -; enabled, a constraint contradiction report will be displayed for randomize() calls that -; have a message severity >= warning (i.e. constraint contradiction reports will not be -; generated for randomize() calls having a "no error" severity level) -; -; NOTE: This variable can be overridden with the vsim "-solvefailseverity" command -; line switch. -; -; The default is 1 (warning). -; SolveFailSeverity = 1 - -; Error message severity for suppressible errors that are detected in a -; solve/before constraint. -; 0 = No error 1 = Warning 2 = Error 3 = Failure 4 = Fatal -; NOTE: This variable can be overridden with the vsim "-solvebeforeerrorseverity" -; command line switch. -; The default is 3 (failure). -; SolveBeforeErrorSeverity = 3 - -; Error message severity for suppressible errors that are related to -; solve engine capacity limits -; 0 = No error 1 = Warning 2 = Error 3 = Failure 4 = Fatal -; NOTE: This variable can be overridden with the vsim "-solveengineerrorseverity" -; command line switch. -; The default is 3 (failure). -; SolveEngineErrorSeverity = 3 - -; Enable/disable constraint conflicts on randomize() failure -; Valid values: -; 0 - disable solvefaildebug -; 1 - basic debug (no performance penalty) -; 2 - enhanced debug (runtime performance penalty) -; -; NOTE: SolveFailSeverity can affect the behavior of SolveFailDebug. When SolveFailDebug is -; enabled, a constraint contradiction report will be displayed for randomize() calls that -; have a message severity >= warning (i.e. constraint contradiction reports will not be -; generated for randomize() calls having a "no error" severity level) -; -; NOTE: This variable can be overridden with the vsim "-solvefaildebug" command -; line switch. -; -; The default is 1 (basic debug). -; SolveFailDebug = 1 - -; Upon encountering a randomize() failure, generate a simplified testcase that -; will reproduce the failure. Optionally output the testcase to a file. -; Testcases for 'no-solution' failures will only be produced if SolveFailDebug -; is enabled (see above). -; NOTE: This variable can be overridden with the vsim "-solvefailtestcase" -; command line switch. -; The default is OFF (do not generate a testcase). To enable testcase -; generation, uncomment this variable. To redirect testcase generation to a -; file, specify the name of the output file. -; SolveFailTestcase = - -; Specify solver timeout threshold (in seconds). randomize() will fail if the -; CPU time required to evaluate any randset exceeds the specified timeout. -; The default value is 500. A value of 0 will disable timeout failures. -; SolveTimeout = 500 - -; Specify the alternative behavior during solver replay. Must be used when combined with -solvereplay switch. -; SolveReplayOpt=[+|-][,[+|-]]*" -' Valid settings: -; validate : toggle the checking of value changes of non-random variables involved in randomize(). (default is off)" -; SolveReplayOpt=validate - -; Specify the maximum size of the solution graph generated by the BDD solver. -; This value can be used to force the BDD solver to abort the evaluation of a -; complex constraint scenario that cannot be evaluated with finite memory. -; This value is specified in 1000s of nodes. -; The default value is 10000. A value of 0 indicates no limit. -; SolveGraphMaxSize = 10000 - -; Specify the maximum number of evaluations that may be performed on the -; solution graph by the BDD solver. This value can be used to force the BDD -; solver to abort the evaluation of a complex constraint scenario that cannot -; be evaluated in finite time. This value is specified in 10000s of evaluations. -; The default value is 10000. A value of 0 indicates no limit. -; SolveGraphMaxEval = 10000 - -; Specify random sequence compatiblity with a prior release. This -; option is used to get the same random sequences during simulation as -; as a prior release. Only prior releases with the same major version -; as the current release are allowed. -; NOTE: Only those random sequence changes due to solver optimizations are -; reverted by this variable. Random sequence changes due to solver bugfixes -; cannot be un-done. -; NOTE: This variable can be overridden with the vsim "-solverev" command -; line switch. -; Default value set to "" (no compatibility). -; SolveRev = - -; Environment variable expansion of command line arguments has been depricated -; in favor shell level expansion. Universal environment variable expansion -; inside -f files is support and continued support for MGC Location Maps provide -; alternative methods for handling flexible pathnames. -; The following line may be uncommented and the value set to 1 to re-enable this -; deprecated behavior. The default value is 0. -; DeprecatedEnvironmentVariableExpansion = 0 - -; Specify the memory threshold for the System Verilog garbage collector. -; The value is the number of megabytes of class objects that must accumulate -; before the garbage collector is run. -; The GCThreshold setting is used when class debug mode is disabled to allow -; less frequent garbage collection and better simulation performance. -; The GCThresholdClassDebug setting is used when class debug mode is enabled -; to allow for more frequent garbage collection. -; GCThreshold = 100 -; GCThresholdClassDebug = 5 - -; Turn on/off collapsing of bus ports in VCD dumpports output -DumpportsCollapse = 1 - -; Location of Multi-Level Verification Component (MVC) installation. -; The default location is the product installation directory. -MvcHome = $QUESTA_MVC_HOME - -; Location of InFact installation. The default is $MODEL_TECH/../../infact -; -; InFactHome = $MODEL_TECH/../../infact - -; Initialize SystemVerilog enums using the base type's default value -; instead of the leftmost value. -; EnumBaseInit = 1 - -; Suppress file type registration. -; SuppressFileTypeReg = 1 - -; Enable/disable non-LRM compliant SystemVerilog language extensions. -; Valid extensions are: -; altdpiheader - Alternative style function signature generated in DPI header", -; cfce - generate an error if $cast fails as a function -; cfmt - C like formatting for specifiers with '#' prefix ('%#x', '%#h') -; dfsp - sets default format specifier as %p, if no format specifier is given for unpacked array in $display and related systasks -; expdfmt - enable format string extensions for $display/$sformatf -; extscan - support values greater than 32 bit for string builtin methods (atohex, atobin, atooct, atoi) -; fmtcap - prints capital hex digits with %X/%H in display calls -; iddp - ignore DPI disable protocol check -; lfmt - zero-pad data if '0' prefixes width in format specifier (e.g. "%04h") -; noexptc - ignore DPI export type name overloading check -; realrand - support randomize() with real variables and constraints (Default) -; SvExtensions = [+|-][,[+|-]*] - -; Enable/disable non-LRM compliant SystemVerilog constrained-random language extensions. -; Valid extensions are: -; arraymode - consider rand_mode of unpacked array field independently from its elements -; deepcheck - allow randomize(null) to recursively consider constraints from member rand class handles (Default) -; funcback - enable function backtracking (ACT only) -; genmodseedfix - enable LRM-compliant seeding of module/interface instances under for-generate blocks (Default) -; impvecindex - inject constraints on random indices of 2-state vectors -; nodist - interpret 'dist' constraint as 'inside' (ACT only) -; noorder - ignore solve/before ordering constraints (ACT only) -; pathseed - enable unique seeding of module instances based on hierarchical path name -; prerandfirst - execute all pre_randomize() functions before evaluating any constraints -; promotedist - promote priority of 'dist' constraint if LHS has no solve/before -; purecheck - suppress pre_randomize() and post_randomize() calls for randomize(null) -; randindex - allow random index in constraint (Default) -; randstruct - consider all fields of unpacked structs as 'rand' -; skew - skew randomize results (ACT only) -; strictstab - strict random stability -; SvRandExtensions = [+|-][,[+|-]*] - -; Controls the formatting of '%p' and '%P' conversion specification, used in $display -; and similar system tasks. -; 1. SVPrettyPrintFlags=I use spaces(S) or tabs(T) per indentation level. -; The 'I' flag when present causes relevant data types to be expanded and indented into -; a more readable format. -; (e.g. SVPrettyPrintFlags=I4S will cause 4 spaces to be used per indentation level). -; 2. SVPrettyPrintFlags=L limits the output to lines. -; (e.g. SVPrettyPrintFlags=L20 will limit the output to 20 lines). -; 3. SVPrettyPrintFlags=C limits the output to characters. -; (e.g. SVPrettyPrintFlags=C256 will limit the output to 256 characters). -; 4. SVPrettyPrintFlags=F limits the output to of relevant datatypes -; (e.g. SVPrettyPrintFlags=F4 will limit the output to 4 fields of a structure). -; 5. SVPrettyPrintFlags=E limits the output to of relevant datatypes -; (e.g. SVPrettyPrintFlags=E50 will limit the output to 50 elements of an array). -; 6. SVPrettyPrintFlags=D suppresses the output of sub-elements below . -; (e.g. SVPrettyPrintFlags=D5 will suppresses the output of sub elements below a depth of 5). -; 7. SVPrettyPrintFlags=R shows the output of specifier %p as per the specifed radix. -; It changes the output in $display and similar systasks. It does not affect formatted output functions ($displayh etc)). -; (e.g. SVPrettyPrintFlags=Rb will show the output of %p specifier in binary format. -; 8. Items 1-7 above can be combined as a comma separated list. -; (e.g. SVPrettyPrintFlags=I4S,L20,C256,F4,E50,D5,Rb) -; SVPrettyPrintFlags=I4S - -[lmc] -; The simulator's interface to Logic Modeling's SmartModel SWIFT software -libsm = $MODEL_TECH/libsm.sl -; The simulator's interface to Logic Modeling's SmartModel SWIFT software (Windows NT) -; libsm = $MODEL_TECH/libsm.dll -; Logic Modeling's SmartModel SWIFT software (HP 9000 Series 700) -; libswift = $LMC_HOME/lib/hp700.lib/libswift.sl -; Logic Modeling's SmartModel SWIFT software (IBM RISC System/6000) -; libswift = $LMC_HOME/lib/ibmrs.lib/swift.o -; Logic Modeling's SmartModel SWIFT software (Sun4 Solaris) -; libswift = $LMC_HOME/lib/sun4Solaris.lib/libswift.so -; Logic Modeling's SmartModel SWIFT software (Windows NT) -; libswift = $LMC_HOME/lib/pcnt.lib/libswift.dll -; Logic Modeling's SmartModel SWIFT software (non-Enterprise versions of Linux) -; libswift = $LMC_HOME/lib/x86_linux.lib/libswift.so -; Logic Modeling's SmartModel SWIFT software (Enterprise versions of Linux) -; libswift = $LMC_HOME/lib/linux.lib/libswift.so - -; The simulator's interface to Logic Modeling's hardware modeler SFI software -libhm = $MODEL_TECH/libhm.sl -; The simulator's interface to Logic Modeling's hardware modeler SFI software (Windows NT) -; libhm = $MODEL_TECH/libhm.dll -; Logic Modeling's hardware modeler SFI software (HP 9000 Series 700) -; libsfi = /lib/hp700/libsfi.sl -; Logic Modeling's hardware modeler SFI software (IBM RISC System/6000) -; libsfi = /lib/rs6000/libsfi.a -; Logic Modeling's hardware modeler SFI software (Sun4 Solaris) -; libsfi = /lib/sun4.solaris/libsfi.so -; Logic Modeling's hardware modeler SFI software (Windows NT) -; libsfi = /lib/pcnt/lm_sfi.dll -; Logic Modeling's hardware modeler SFI software (Linux) -; libsfi = /lib/linux/libsfi.so - -[msg_system] -; Change a message severity or suppress a message. -; The format is: = [,...] -; suppress can be used to achieve +nowarn functionality -; The format is: suppress = ,,[,,...] -; Examples: -suppress = 8780 ;an explanation can be had by running: verror 8780 -; note = 3009 -; warning = 3033 -; error = 3010,3016 -; fatal = 3016,3033 -; suppress = 3009,3016,3601 -; suppress = 3009,CNNODP,3601,TFMPC -; suppress = 8683,8684 -; The command verror can be used to get the complete -; description of a message. - -; Control transcripting of Verilog display system task messages and -; PLI/FLI print function call messages. The system tasks include -; $display[bho], $strobe[bho], $monitor[bho], and $write[bho]. They -; also include the analogous file I/O tasks that write to STDOUT -; (i.e. $fwrite or $fdisplay). The PLI/FLI calls include io_printf, -; vpi_printf, mti_PrintMessage, and mti_PrintFormatted. The default -; is to have messages appear only in the transcript. The other -; settings are to send messages to the wlf file only (messages that -; are recorded in the wlf file can be viewed in the MsgViewer) or -; to both the transcript and the wlf file. The valid values are -; tran {transcript only (default)} -; wlf {wlf file only} -; both {transcript and wlf file} -; displaymsgmode = tran - -; Control transcripting of elaboration/runtime messages not -; addressed by the displaymsgmode setting. The default is to -; have messages appear only in the transcript. The other settings -; are to send messages to the wlf file only (messages that are -; recorded in the wlf file can be viewed in the MsgViewer) or to both -; the transcript and the wlf file. The valid values are -; tran {transcript only (default)} -; wlf {wlf file only} -; both {transcript and wlf file} -; msgmode = tran - -; Controls number of displays of a particluar message -; default value is 5 -; MsgLimitCount = 5 - -[utils] -; Default Library Type (while creating a library with "vlib") -; 0 - legacy library using subdirectories for design units -; 2 - flat library -; DefaultLibType = 2 - -; Flat Library Page Size (while creating a library with "vlib") -; Set the size in bytes for flat library file pages. Libraries containing -; very large files may benefit from a larger value. -; FlatLibPageSize = 8192 - -; Flat Library Page Cleanup Percentage (while creating a library with "vlib") -; Set the percentage of total pages deleted before library cleanup can occur. -; This setting is applied together with FlatLibPageDeleteThreshold. -; FlatLibPageDeletePercentage = 50 - -; Flat Library Page Cleanup Threshold (while creating a library with "vlib") -; Set the number of pages deleted before library cleanup can occur. -; This setting is applied together with FlatLibPageDeletePercentage. -; FlatLibPageDeleteThreshold = 1000 - diff --git a/transcript b/transcript deleted file mode 100644 index 62f5f03..0000000 --- a/transcript +++ /dev/null @@ -1,14 +0,0 @@ -# // Questa Sim-64 -# // Version 10.7b_1 linux_x86_64 Jul 26 2018 -# // -# // Copyright 1991-2018 Mentor Graphics Corporation -# // All Rights Reserved. -# // -# // QuestaSim and its associated documentation contain trade -# // secrets and commercial or financial information that are the property of -# // Mentor Graphics Corporation and are privileged, confidential, -# // and exempt from disclosure under the Freedom of Information Act, -# // 5 U.S.C. Section 552. Furthermore, this information -# // is prohibited from disclosure under the Trade Secrets Act, -# // 18 U.S.C. Section 1905. -# //