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Qualcomm AI Engine Direct - support SW6100 #16003

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Qualcomm AI Engine Direct - support SW6100 #16003

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1 change: 1 addition & 0 deletions backends/qualcomm/README.md
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Original file line number Diff line number Diff line change
Expand Up @@ -30,6 +30,7 @@ Please check `generate_qnn_executorch_compiler_spec()` in
- SXR2330P
- QCS9100
- SAR2230P
- SW6100

### Adding more supported Chipset
Currently, users cannot add additional chipset models because the chipset ID is not accessible to community users. If you have specific chipset models you wish to add, please contact one of the authors in the `Code Reviews` section at the bottom of this page.
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1 change: 1 addition & 0 deletions backends/qualcomm/serialization/qc_compiler_spec.fbs
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Expand Up @@ -48,6 +48,7 @@ enum QcomChipset: int {
QCS9100 = 77,
SAR2230P = 95,
SA8255 = 52,
SW6100 = 96,
}

/// Indicate the information of the specified SoC.
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2 changes: 2 additions & 0 deletions backends/qualcomm/serialization/qc_schema.py
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Expand Up @@ -54,6 +54,7 @@ class QcomChipset(IntEnum):
QCS9100 = 77 # v73
SAR2230P = 95 # v81
SA8255 = 52 # v73
SW6100 = 96 # v81


@dataclass
Expand All @@ -78,6 +79,7 @@ class SocInfo:
QcomChipset.SXR2330P: SocInfo(QcomChipset.SXR2330P, HtpInfo(HtpArch.V79, 8)),
QcomChipset.QCS9100: SocInfo(QcomChipset.QCS9100, HtpInfo(HtpArch.V73, 8)),
QcomChipset.SAR2230P: SocInfo(QcomChipset.SAR2230P, HtpInfo(HtpArch.V81, 4)),
QcomChipset.SW6100: SocInfo(QcomChipset.SW6100, HtpInfo(HtpArch.V81, 4)),
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@cccclai cccclai Dec 2, 2025

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@billmguo mentioned in the email saying it should be v79 HTP + 2MB vtcm, can we double check?

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@haowhsu-quic haowhsu-quic Dec 2, 2025

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The data was collected in internal QNN codebase. Since we don't have the corresponding device, could you try this configuration on your side?

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@limintang limintang Dec 2, 2025 •
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The data was collected in internal QNN codebase. Since we don't have the corresponding device, could you try this configuration on your side?

Referring to QC doc 80-74841-45 Rev. AA Qualcomm® Hexagon Tensor Processor Overview for SW6100, it states v79 HTP, but doesn't mention VTCM size. Is the doc inaccurate or outdated?

}


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2 changes: 2 additions & 0 deletions backends/qualcomm/utils/utils.py
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Expand Up @@ -1104,6 +1104,7 @@ def get_soc_to_arch_map():
"SXR2330P": HtpArch.V79,
"QCS9100": HtpArch.V73,
"SAR2230P": HtpArch.V81,
"SW6100": HtpArch.V81,
}


Expand All @@ -1124,6 +1125,7 @@ def get_soc_to_chipset_map():
"SXR2330P": QcomChipset.SXR2330P,
"QCS9100": QcomChipset.QCS9100,
"SAR2230P": QcomChipset.SAR2230P,
"SW6100": QcomChipset.SW6100,
}


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