Merge branch '10x/rvv-floating-kernels' of github.com:riseproject-dev/llama.cpp into 10x/rvv-floating-kernels

Author: taimur-10x

ggml/src/ggml-cpu/ggml-cpu.c

@@ -3274,6 +3274,7 @@ void ggml_cpu_fp16_to_fp32(const ggml_fp16_t * x, float * y, int64_t n) {
         __m128 y_vec = _mm_cvtph_ps(x_vec);
         _mm_storeu_ps(y + i, y_vec);
     }
+
 #elif defined(__riscv_v_intrinsic) && defined(__riscv_zvfhmin)
     // calculate step size
     const int epr = __riscv_vsetvlmax_e16m2();
@@ -3288,17 +3289,19 @@ void ggml_cpu_fp16_to_fp32(const ggml_fp16_t * x, float * y, int64_t n) {
 
         vfloat16m2_t ax1 = __riscv_vle16_v_f16m2((const _Float16*)x + i + epr, epr);
         vfloat32m4_t ay1 = __riscv_vfwcvt_f_f_v_f32m4(ax1, epr);
+
         __riscv_vse32_v_f32m4(y + i + epr, ay1, epr);
     }
 
-    // leftovers
+    // handle leftovers
     int vl;
     for (i = np; i < n; i += vl) {
         vl = __riscv_vsetvl_e16m2(n - i);
         vfloat16m2_t ax0 = __riscv_vle16_v_f16m2((const _Float16*)x + i, vl);
         vfloat32m4_t ay0 = __riscv_vfwcvt_f_f_v_f32m4(ax0, vl);
         __riscv_vse32_v_f32m4(y + i, ay0, vl);
     }
+
 #endif
 
     for (; i < n; ++i) {