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DTACK Issue #5

@plowcat

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@plowcat

On the schematic DTACK is Pin 1 on the GAL where as in the PLD file its is Pin 23. Since it is an output it can't be on Pin 1.

I noticed this after assembling a board with 3 SRAM chips and testing in an ACE with a Sharp 1 MB expansion on the internal memory expansion header. I worked around the issue by cutting the link on the "1 MB" jumper and adding a wire between the middle pad of the jumper and Pin 1 of the GAL. I tested with a program found somewhere called "mtest.r" which passed.

I also felt that the GAL was getting warm from driving DTACK as push-pull rather than open drain so I added an open drain buffer. It is maybe less warm, but I don't have a way to measure well. It worked with and without the buffer so this may not be an issue. I think using the tri-state outputs on the GAL should be able get the same effect.

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