From 137ac7b14d4a37989b6db9c818601a5bea7b0288 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?David=20P=C3=B6ttler?= Date: Tue, 7 Oct 2025 13:12:42 +0200 Subject: [PATCH 1/2] Added Generic Varient for STM32H733VGT --- README.md | 1 + boards.txt | 9 + .../generic_clock.c | 53 +++++- .../ldscript.ld | 178 ++++++++++++++++++ 4 files changed, 239 insertions(+), 2 deletions(-) create mode 100644 variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/ldscript.ld diff --git a/README.md b/README.md index 034c7894a2..b923ec14d5 100644 --- a/README.md +++ b/README.md @@ -628,6 +628,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | :green_heart: | STM32H7B0VBTX | Generic Board | *2.8.0* | | | :green_heart: | STM32H7B3VIHX
STM32H7B3VITX | Generic Board | *2.8.0* | | | :green_heart: | STM32H7B3ZITxQ | Generic Board | *2.10.0* | | +| :yellow_heart: | STM32H733VGT | Generic Board | *2.12.0* | | ### Generic STM32L0 boards diff --git a/boards.txt b/boards.txt index 4e24c37f56..24ca7492ad 100644 --- a/boards.txt +++ b/boards.txt @@ -9425,6 +9425,15 @@ GenH7.menu.pnum.GENERIC_H730ZBTX.build.product_line=STM32H730xx GenH7.menu.pnum.GENERIC_H730ZBTX.build.variant=STM32H7xx/H723Z(E-G)T_H730ZBT_H733ZGT GenH7.menu.pnum.GENERIC_H730ZBTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32H7xx/STM32H730.svd +# Generic H733VGTx +GenH7.menu.pnum.GENERIC_H733VGTX=Generic H733VGTx +GenH7.menu.pnum.GENERIC_H733VGTX.upload.maximum_size=1048576 +GenH7.menu.pnum.GENERIC_H733VGTX.upload.maximum_data_size=577536 +GenH7.menu.pnum.GENERIC_H733VGTX.build.board=GENERIC_H733VGTX +GenH7.menu.pnum.GENERIC_H733VGTX.build.product_line=STM32H733xx +GenH7.menu.pnum.GENERIC_H733VGTX.build.variant=STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T) +GenH7.menu.pnum.GENERIC_H733VGTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32H7xx/STM32H733.svd + # Generic H733ZGTx GenH7.menu.pnum.GENERIC_H733ZGTX=Generic H733ZGTx GenH7.menu.pnum.GENERIC_H733ZGTX.upload.maximum_size=1048576 diff --git a/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/generic_clock.c b/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/generic_clock.c index 2230f31690..004848f24c 100644 --- a/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/generic_clock.c +++ b/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/generic_clock.c @@ -23,8 +23,57 @@ */ WEAK void SystemClock_Config(void) { - /* SystemClock_Config can be generated by STM32CubeMX */ -#warning "SystemClock_Config() is empty. Default clock at reset is used." + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + + /** Supply configuration update enable + */ + HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY); + + /** Configure the main internal regulator output voltage + */ + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0); + + while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} + + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_DIV1; + RCC_OscInitStruct.HSICalibrationValue = 64; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 4; + RCC_OscInitStruct.PLL.PLLN = 34; + RCC_OscInitStruct.PLL.PLLP = 1; + RCC_OscInitStruct.PLL.PLLQ = 2; + RCC_OscInitStruct.PLL.PLLR = 2; + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_3; + RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; + RCC_OscInitStruct.PLL.PLLFRACN = 3072; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2 + |RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2; + RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2; + RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) + { + Error_Handler(); + } } #endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/ldscript.ld b/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/ldscript.ld new file mode 100644 index 0000000000..f580ff2a2e --- /dev/null +++ b/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/ldscript.ld @@ -0,0 +1,178 @@ +/* +****************************************************************************** +** +** File : LinkerScript.ld +** +** Author : STM32CubeIDE +** +** Abstract : Linker script for STM32H7 series +** 1024Kbytes FLASH and 560Kbytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is, without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +** Copyright (c) 2025 STMicroelectronics. +** All rights reserved. +** +** This software is licensed under terms that can be found in the LICENSE file +** in the root directory of this software component. +** If no LICENSE file comes with this software, it is provided AS-IS. +** +**************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM_D1) + LENGTH(RAM_D1); /* end of RAM */ +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ + ITCMRAM (xrw) : ORIGIN = 0x00000000, LENGTH = 64K + DTCMRAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K + FLASH (rx) : ORIGIN = 0x08000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET + RAM_D1 (xrw) : ORIGIN = 0x24000000, LENGTH = LD_MAX_DATA_SIZE + RAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 32K + RAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 16K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data goes into FLASH */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } >FLASH + .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + + .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + + .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + *(.RamFunc) /* .RamFunc sections */ + *(.RamFunc*) /* .RamFunc* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM_D1 AT> FLASH + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM_D1 + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM_D1 + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} From bdc6bd59d7cd8e83f67daa86763ba5419642c0cc Mon Sep 17 00:00:00 2001 From: David Date: Wed, 8 Oct 2025 08:25:40 +0200 Subject: [PATCH 2/2] Fix a style issue --- .../generic_clock.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/generic_clock.c b/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/generic_clock.c index 004848f24c..fad516fabb 100644 --- a/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/generic_clock.c +++ b/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/generic_clock.c @@ -34,7 +34,7 @@ WEAK void SystemClock_Config(void) */ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0); - while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} + while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. @@ -52,16 +52,15 @@ WEAK void SystemClock_Config(void) RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_3; RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; RCC_OscInitStruct.PLL.PLLFRACN = 3072; - if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - { + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { Error_Handler(); } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2 - |RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1; + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2 + |RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2; @@ -70,8 +69,7 @@ WEAK void SystemClock_Config(void) RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2; RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2; - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) - { + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) { Error_Handler(); } }