From 8ad3982f5dc6b6d106e987ff33131d5c59203b27 Mon Sep 17 00:00:00 2001 From: Andrew Duggan Date: Thu, 5 Mar 2026 08:04:55 -0800 Subject: [PATCH 1/5] Remove 3GB DDR in memory layout guide --- subject/memory_layout_customization.rst | 8 -------- 1 file changed, 8 deletions(-) diff --git a/subject/memory_layout_customization.rst b/subject/memory_layout_customization.rst index ef04873..dc0cde2 100644 --- a/subject/memory_layout_customization.rst +++ b/subject/memory_layout_customization.rst @@ -71,14 +71,6 @@ SL1640 Memory Layout | +------------------------+----------------------------+ | | Secure | 16MB | +-------------------+------------------------+----------------------------+ -| 3 GB DDR | NonSecure (CMA) | 500MB | -| +------------------------+----------------------------+ -| | System | 2.901GB | -| +------------------------+----------------------------+ -| | NonSecure (Non-cached) | 8MB | -| +------------------------+----------------------------+ -| | Secure | 16MB | -+-------------------+------------------------+----------------------------+ | 4 GB DDR | NonSecure (CMA) | 500MB | | +------------------------+----------------------------+ | | System | 3.482GB | From 77170b140174d9312383652a757fb27c83e552e6 Mon Sep 17 00:00:00 2001 From: Andrew Duggan Date: Thu, 12 Mar 2026 14:14:21 -0700 Subject: [PATCH 2/5] Update SL1640 DRAM info in SL1640 HW User Guide --- hw/sl1640.rst | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/hw/sl1640.rst b/hw/sl1640.rst index c42d1e3..83440b9 100644 --- a/hw/sl1640.rst +++ b/hw/sl1640.rst @@ -76,8 +76,7 @@ The SL1640-based evaluation system includes the following components: - Storage: eMMC 5.1 (16 GB) -- DRAM: DRAM: Up to x32 2GB system memory by 1pcs x32 16 Gbit - LPDDR4x-3733 +- DRAM: Up to x32 4GB system memory by 1pcs x32 16 Gbit LPDDR4x-3733 - PMIC: two support DVFS in Vcore and Vcpu supply rails From 646332779f504439ee20fe84294f72be7aa7da16 Mon Sep 17 00:00:00 2001 From: Andrew Duggan Date: Thu, 12 Mar 2026 14:27:33 -0700 Subject: [PATCH 3/5] Add 1GB memory layout to SL1640 in memory layout customization guide --- subject/memory_layout_customization.rst | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/subject/memory_layout_customization.rst b/subject/memory_layout_customization.rst index dc0cde2..ed19660 100644 --- a/subject/memory_layout_customization.rst +++ b/subject/memory_layout_customization.rst @@ -63,6 +63,14 @@ SL1640 Memory Layout +-------------------+------------------------+----------------------------+ | Memory Size | Memory Section | Size | +-------------------+------------------------+----------------------------+ +| 1 GB DDR | NonSecure (CMA) | 236MB | +| +------------------------+----------------------------+ +| | System | 764MB | +| +------------------------+----------------------------+ +| | NonSecure (Non-cached) | 8MB | +| +------------------------+----------------------------+ +| | Secure | 16MB | ++-------------------+------------------------+----------------------------+ | 2 GB DDR | NonSecure (CMA) | 260MB | | +------------------------+----------------------------+ | | System | 1.948GB | From 8ee093b41722c14aab8f2b11ef596c83d3d0a115 Mon Sep 17 00:00:00 2001 From: Andrew Duggan Date: Thu, 12 Mar 2026 14:39:29 -0700 Subject: [PATCH 4/5] Remove 3GB memory layout for SL1640 in scarthgap release notes --- release_notes/scarthgap_6.12_v2.0.0.rst | 4 ---- release_notes/scarthgap_6.12_v2.1.0.rst | 4 ---- release_notes/scarthgap_6.12_v2.2.0.rst | 2 -- release_notes/scarthgap_6.12_v2.2.1.rst | 4 ---- 4 files changed, 14 deletions(-) diff --git a/release_notes/scarthgap_6.12_v2.0.0.rst b/release_notes/scarthgap_6.12_v2.0.0.rst index e1a71e3..45c7e64 100644 --- a/release_notes/scarthgap_6.12_v2.0.0.rst +++ b/release_notes/scarthgap_6.12_v2.0.0.rst @@ -412,14 +412,10 @@ General Modules, Peripherals, and Interfaces Supported | | +----------+--------------------------------------------------------+ | | | LPDDR4 | 2GB 3733 Mbps | | | | +--------------------------------------------------------+ -| | | | 3GB 3733 Mbps | -| | | +--------------------------------------------------------+ | | | | 4GB 3733 Mbps | | | +----------+--------------------------------------------------------+ | | | LPDDR4x | 3733 Mbps | | | | +--------------------------------------------------------+ -| | | | 3GB 3733 Mbps | -| | | +--------------------------------------------------------+ | | | | 4GB 3733 Mbps | | +--------+----------+--------------------------------------------------------+ | | SL1680 | LPDDR4 | 2GB 3733 Mbps | diff --git a/release_notes/scarthgap_6.12_v2.1.0.rst b/release_notes/scarthgap_6.12_v2.1.0.rst index 84dc3cf..d2b17d8 100644 --- a/release_notes/scarthgap_6.12_v2.1.0.rst +++ b/release_notes/scarthgap_6.12_v2.1.0.rst @@ -457,14 +457,10 @@ General Modules, Peripherals, and Interfaces Supported | | +----------+--------------------------------------------------------+ | | | LPDDR4 | 2GB 3733 Mbps | | | | +--------------------------------------------------------+ -| | | | 3GB 3733 Mbps | -| | | +--------------------------------------------------------+ | | | | 4GB 3733 Mbps | | | +----------+--------------------------------------------------------+ | | | LPDDR4x | 3733 Mbps | | | | +--------------------------------------------------------+ -| | | | 3GB 3733 Mbps | -| | | +--------------------------------------------------------+ | | | | 4GB 3733 Mbps | | +--------+----------+--------------------------------------------------------+ | | SL1680 | LPDDR4 | 2GB 3733 Mbps | diff --git a/release_notes/scarthgap_6.12_v2.2.0.rst b/release_notes/scarthgap_6.12_v2.2.0.rst index a2127f9..563c504 100644 --- a/release_notes/scarthgap_6.12_v2.2.0.rst +++ b/release_notes/scarthgap_6.12_v2.2.0.rst @@ -470,8 +470,6 @@ General Modules, Peripherals, and Interfaces Supported | | +----------+--------------------------------------------------------+ | | | LPDDR4 | 2GB 3733 Mbps | | | | +--------------------------------------------------------+ -| | | | 3GB 3733 Mbps | -| | | +--------------------------------------------------------+ | | | | 4GB 3733 Mbps | | | +----------+--------------------------------------------------------+ | | | LPDDR4x | 3733 Mbps | diff --git a/release_notes/scarthgap_6.12_v2.2.1.rst b/release_notes/scarthgap_6.12_v2.2.1.rst index fd40633..7fb8c22 100644 --- a/release_notes/scarthgap_6.12_v2.2.1.rst +++ b/release_notes/scarthgap_6.12_v2.2.1.rst @@ -413,14 +413,10 @@ General Modules, Peripherals, and Interfaces Supported | | +----------+--------------------------------------------------------+ | | | LPDDR4 | 2GB 3733 Mbps | | | | +--------------------------------------------------------+ -| | | | 3GB 3733 Mbps | -| | | +--------------------------------------------------------+ | | | | 4GB 3733 Mbps | | | +----------+--------------------------------------------------------+ | | | LPDDR4x | 3733 Mbps | | | | +--------------------------------------------------------+ -| | | | 3GB 3733 Mbps | -| | | +--------------------------------------------------------+ | | | | 4GB 3733 Mbps | | +--------+----------+--------------------------------------------------------+ | | SL1680 | LPDDR4 | 2GB 3733 Mbps | From d6ca0fbd08d0c1575b5f89b58d3722b0cd7149e0 Mon Sep 17 00:00:00 2001 From: Andrew Duggan Date: Fri, 13 Mar 2026 11:50:57 -0700 Subject: [PATCH 5/5] Correct System memory size for SL1640 1GB --- subject/memory_layout_customization.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/subject/memory_layout_customization.rst b/subject/memory_layout_customization.rst index ed19660..d1d2626 100644 --- a/subject/memory_layout_customization.rst +++ b/subject/memory_layout_customization.rst @@ -65,7 +65,7 @@ SL1640 Memory Layout +-------------------+------------------------+----------------------------+ | 1 GB DDR | NonSecure (CMA) | 236MB | | +------------------------+----------------------------+ -| | System | 764MB | +| | System | 902MB | | +------------------------+----------------------------+ | | NonSecure (Non-cached) | 8MB | | +------------------------+----------------------------+