Merge pull request #3238 from AlexandreSinger/feature-partial-legalizer-none

amin1377 · web-flow · commit ac291690efc7 · 2025-08-21T10:13:29.000-04:00
[AP][PartialLegalizer] Added None Partial Legalizer
diff --git a/doc/src/vpr/command_line_usage.rst b/doc/src/vpr/command_line_usage.rst
@@ -1266,13 +1266,17 @@ Analytical Placement is generally split into three stages:
 
     **Default:** ``lp-b2b``
 
-.. option:: --ap_partial_legalizer {bipartitioning | flow-based}
+.. option:: --ap_partial_legalizer {none | bipartitioning | flow-based}
 
     Controls which Partial Legalizer the Global Placer will use in the AP Flow.
     The Partial Legalizer legalizes a placement generated by an Analytical Solver.
     It is used within the Global Placer to guide the solver to a more legal
     solution.
 
+    * ``none`` Does not partially legalize the global placement solution and just
+      passes the last solved solution through. This partial legalizer is only
+      used for testing and debugging and should not be part of any real AP flow.
+
     * ``bipartitioning`` Creates minimum windows around over-dense regions of
       the device bi-partitions the atoms in these windows such that the region
       is no longer over-dense and the atoms are in tiles that they can be placed
diff --git a/vpr/src/analytical_place/ap_flow_enums.h b/vpr/src/analytical_place/ap_flow_enums.h
@@ -27,8 +27,9 @@ enum class e_ap_analytical_solver {
  * Partial Legalizers.
  */
 enum class e_ap_partial_legalizer {
+    Identity,       ///< Partial Legalizer which does not perform any legalization on the placement. Used as a placeholder when partial legalization should not be used.
     BiPartitioning, ///< Partial Legalizer which forms minimum windows around dense regions and uses bipartitioning to spread blocks over windows.
-    FlowBased       ///> Partial Legalizer which flows blocks from overfilled bins to underfilled bins.
+    FlowBased       ///< Partial Legalizer which flows blocks from overfilled bins to underfilled bins.
 };
 
 /**
diff --git a/vpr/src/analytical_place/partial_legalizer.cpp b/vpr/src/analytical_place/partial_legalizer.cpp
@@ -49,6 +49,9 @@ std::unique_ptr<PartialLegalizer> make_partial_legalizer(e_ap_partial_legalizer
                                                          int log_verbosity) {
     // Based on the partial legalizer type passed in, build the partial legalizer.
     switch (legalizer_type) {
+        case e_ap_partial_legalizer::Identity:
+            return std::make_unique<IdentityPartialLegalizer>(netlist,
+                                                              log_verbosity);
         case e_ap_partial_legalizer::FlowBased:
             return std::make_unique<FlowBasedLegalizer>(netlist,
                                                         density_manager,
diff --git a/vpr/src/analytical_place/partial_legalizer.h b/vpr/src/analytical_place/partial_legalizer.h
@@ -100,6 +100,26 @@ std::unique_ptr<PartialLegalizer> make_partial_legalizer(e_ap_partial_legalizer
                                                          const LogicalModels& models,
                                                          int log_verbosity);
 
+/**
+ * @brief A partial legalizer which does not legalize anything. This solver acts
+ *        like an identity matrix where it just passes the given solution along.
+ *        This partial legalizer should only be used for testing.
+ */
+class IdentityPartialLegalizer : public PartialLegalizer {
+  public:
+    IdentityPartialLegalizer(const APNetlist& netlist, int log_verbosity)
+        : PartialLegalizer(netlist, log_verbosity) {}
+
+    void legalize(PartialPlacement& p_placement) final {
+        (void)p_placement;
+        // Do nothing.
+    }
+
+    void print_statistics() final {
+        // Do nothing.
+    }
+};
+
 /**
  * @brief A multi-commodity flow-based spreading partial legalizer.
  *
diff --git a/vpr/src/base/ShowSetup.cpp b/vpr/src/base/ShowSetup.cpp
@@ -626,6 +626,9 @@ static void ShowAnalyticalPlacerOpts(const t_ap_opts& APOpts) {
 
     VTR_LOG("AnalyticalPlacerOpts.partial_legalizer_type: ");
     switch (APOpts.partial_legalizer_type) {
+        case e_ap_partial_legalizer::Identity:
+            VTR_LOG("none\n");
+            break;
         case e_ap_partial_legalizer::BiPartitioning:
             VTR_LOG("bipartitioning\n");
             break;
diff --git a/vpr/src/base/read_options.cpp b/vpr/src/base/read_options.cpp
@@ -177,7 +177,9 @@ struct ParseAPAnalyticalSolver {
 struct ParseAPPartialLegalizer {
     ConvertedValue<e_ap_partial_legalizer> from_str(const std::string& str) {
         ConvertedValue<e_ap_partial_legalizer> conv_value;
-        if (str == "bipartitioning")
+        if (str == "none")
+            conv_value.set_value(e_ap_partial_legalizer::Identity);
+        else if (str == "bipartitioning")
             conv_value.set_value(e_ap_partial_legalizer::BiPartitioning);
         else if (str == "flow-based")
             conv_value.set_value(e_ap_partial_legalizer::FlowBased);
@@ -192,6 +194,9 @@ struct ParseAPPartialLegalizer {
     ConvertedValue<std::string> to_str(e_ap_partial_legalizer val) {
         ConvertedValue<std::string> conv_value;
         switch (val) {
+            case e_ap_partial_legalizer::Identity:
+                conv_value.set_value("none");
+                break;
             case e_ap_partial_legalizer::BiPartitioning:
                 conv_value.set_value("bipartitioning");
                 break;
@@ -205,7 +210,7 @@ struct ParseAPPartialLegalizer {
     }
 
     std::vector<std::string> default_choices() {
-        return {"bipartitioning", "flow-based"};
+        return {"none", "bipartitioning", "flow-based"};
     }
 };
 
@@ -1941,6 +1946,7 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio
     ap_grp.add_argument<e_ap_partial_legalizer, ParseAPPartialLegalizer>(args.ap_partial_legalizer, "--ap_partial_legalizer")
         .help(
             "Controls which Partial Legalizer the Global Placer will use in the AP Flow.\n"
+            " * none: Does not perform any partial legalization. This is used for testing and debugging the AP flow and is not intended to be used as part of a real AP flow.\n"
             " * bipartitioning: Creates minimum windows around over-dense regions of the device bi-partitions the atoms in these windows such that the region is no longer over-dense and the atoms are in tiles that they can be placed into.\n"
             " * flow-based: Flows atoms from regions that are overfilled to regions that are underfilled.")
         .default_value("bipartitioning")
diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/none_partial_legalizer/config/config.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/none_partial_legalizer/config/config.txt
@@ -0,0 +1,54 @@
+###############################################################################
+# Configuration file for running the MCNC benchmarks through the AP flow.
+#
+# The AP flow requires that each circuit contains fixed blocks and is fixed
+# to a specific device size. The device sizes here were chosen to match the
+# device sizes of the default VTR flow.
+###############################################################################
+
+# Path to directory of circuits to use
+circuits_dir=benchmarks/blif/wiremap6
+
+# Path to directory of architectures to use
+archs_dir=arch/timing
+
+# Add architectures to list to sweep
+arch_list_add=k6_frac_N10_40nm.xml
+
+# Add circuits to list to sweep
+circuit_list_add=apex4.pre-vpr.blif
+circuit_list_add=des.pre-vpr.blif
+circuit_list_add=ex1010.pre-vpr.blif
+circuit_list_add=seq.pre-vpr.blif
+
+# Constrain the circuits to their devices
+circuit_constraint_list_add=(apex4.pre-vpr.blif,    device=mcnc_medium)
+circuit_constraint_list_add=(seq.pre-vpr.blif,      device=mcnc_medium)
+circuit_constraint_list_add=(des.pre-vpr.blif,      device=mcnc_large)
+circuit_constraint_list_add=(ex1010.pre-vpr.blif,   device=mcnc_large)
+
+# Constrain the IOs
+circuit_constraint_list_add=(apex4.pre-vpr.blif,    constraints=../../../../../mcnc/constraints/apex4_io_constraint.xml)
+circuit_constraint_list_add=(seq.pre-vpr.blif,      constraints=../../../../../mcnc/constraints/seq_io_constraint.xml)
+circuit_constraint_list_add=(des.pre-vpr.blif,      constraints=../../../../../mcnc/constraints/des_io_constraint.xml)
+circuit_constraint_list_add=(ex1010.pre-vpr.blif,   constraints=../../../../../mcnc/constraints/ex1010_io_constraint.xml)
+
+# Constrain the circuits to their channel widths
+#       1.3 * minW
+circuit_constraint_list_add=(apex4.pre-vpr.blif,    route_chan_width=78)
+circuit_constraint_list_add=(seq.pre-vpr.blif,      route_chan_width=78)
+circuit_constraint_list_add=(des.pre-vpr.blif,      route_chan_width=44)
+circuit_constraint_list_add=(ex1010.pre-vpr.blif,   route_chan_width=114)
+
+# Parse info and how to parse
+parse_file=vpr_fixed_chan_width.txt
+
+# How to parse QoR info
+qor_parse_file=qor_ap_fixed_chan_width.txt
+
+# Pass requirements
+pass_requirements_file=pass_requirements_ap_fixed_chan_width.txt
+
+# Pass the script params while writing the vpr constraints.
+script_params=-starting_stage vpr -track_memory_usage --analytical_place --route --ap_partial_legalizer none
+
diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/none_partial_legalizer/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/none_partial_legalizer/config/golden_results.txt
@@ -0,0 +1,5 @@
+ arch	  circuit	  script_params	  vtr_flow_elapsed_time	  vtr_max_mem_stage	  vtr_max_mem	  error	  odin_synth_time	  max_odin_mem	  parmys_synth_time	  max_parmys_mem	  abc_depth	  abc_synth_time	  abc_cec_time	  abc_sec_time	  max_abc_mem	  ace_time	  max_ace_mem	  num_clb	  num_io	  num_memories	  num_mult	  vpr_status	  vpr_revision	  vpr_build_info	  vpr_compiler	  vpr_compiled	  hostname	  rundir	  max_vpr_mem	  num_primary_inputs	  num_primary_outputs	  num_pre_packed_nets	  num_pre_packed_blocks	  num_netlist_clocks	  num_post_packed_nets	  num_post_packed_blocks	  device_width	  device_height	  device_grid_tiles	  device_limiting_resources	  device_name	  pack_mem	  pack_time	  initial_placed_wirelength_est	  placed_wirelength_est	  total_swap	  accepted_swap	  rejected_swap	  aborted_swap	  place_mem	  place_time	  place_quench_time	  initial_placed_CPD_est	  placed_CPD_est	  placed_setup_TNS_est	  placed_setup_WNS_est	  placed_geomean_nonvirtual_intradomain_critical_path_delay_est	  place_delay_matrix_lookup_time	  place_quench_timing_analysis_time	  place_quench_sta_time	  place_total_timing_analysis_time	  place_total_sta_time	  ap_mem	  ap_time	  ap_full_legalizer_mem	  ap_full_legalizer_time	  routed_wirelength	  avg_routed_wirelength	  routed_wiresegment	  avg_routed_wiresegment	  total_nets_routed	  total_connections_routed	  total_heap_pushes	  total_heap_pops	  logic_block_area_total	  logic_block_area_used	  routing_area_total	  routing_area_per_tile	  crit_path_route_success_iteration	  num_rr_graph_nodes	  num_rr_graph_edges	  collapsed_nodes	  critical_path_delay	  geomean_nonvirtual_intradomain_critical_path_delay	  setup_TNS	  setup_WNS	  hold_TNS	  hold_WNS	  create_rr_graph_time	  create_intra_cluster_rr_graph_time	  adding_internal_edges	  route_mem	  crit_path_route_time	  crit_path_total_timing_analysis_time	  crit_path_total_sta_time	  router_lookahead_mem	  tile_lookahead_computation_time	  router_lookahead_computation_time	 
+ k6_frac_N10_40nm.xml	  apex4.pre-vpr.blif	  common	  2.29	  vpr	  77.57 MiB	  	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  81	  9	  -1	  -1	  success	  v8.0.0-13570-g5596b80d4-dirty	  release VTR_ASSERT_LEVEL=3	  GNU 13.3.0 on Linux-6.8.0-63-generic x86_64	  2025-08-17T10:24:35	  srivatsan-Precision-Tower-5810	  /home/alex/vtr-verilog-to-routing/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/none_partial_legalizer	  79436	  9	  19	  896	  28	  0	  594	  109	  16	  16	  256	  -1	  mcnc_medium	  -1	  -1	  7747.3	  6941	  4269	  395	  2675	  1199	  77.6 MiB	  1.64	  0.01	  5.77525	  5.00222	  -81.0324	  -5.00222	  nan	  0.00	  0.00164824	  0.00129404	  0.0457501	  0.0390007	  77.6 MiB	  1.64	  77.6 MiB	  1.42	  10460	  17.6391	  2838	  4.78583	  5099	  24894	  921277	  163209	  1.05632e+07	  4.36541e+06	  1.26944e+06	  4958.75	  22	  28900	  206586	  -1	  5.42049	  nan	  -86.6841	  -5.42049	  0	  0	  0.18	  -1	  -1	  77.6 MiB	  0.31	  0.179929	  0.157351	  33.3 MiB	  -1	  0.05	 
+ k6_frac_N10_40nm.xml	  des.pre-vpr.blif	  common	  1.09	  vpr	  78.25 MiB	  	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  62	  256	  -1	  -1	  success	  v8.0.0-13570-g5596b80d4-dirty	  release VTR_ASSERT_LEVEL=3	  GNU 13.3.0 on Linux-6.8.0-63-generic x86_64	  2025-08-17T10:24:35	  srivatsan-Precision-Tower-5810	  /home/alex/vtr-verilog-to-routing/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/none_partial_legalizer	  80124	  256	  245	  954	  501	  0	  596	  563	  22	  22	  484	  -1	  mcnc_large	  -1	  -1	  7547.81	  7386	  16824	  159	  2194	  14471	  78.2 MiB	  0.54	  0.01	  4.87709	  4.22	  -796.19	  -4.22	  nan	  0.00	  0.00215214	  0.0019209	  0.0267417	  0.0246741	  78.2 MiB	  0.54	  78.2 MiB	  0.35	  10309	  17.2970	  2859	  4.79698	  2596	  6237	  332826	  74032	  2.15576e+07	  3.34143e+06	  1.49107e+06	  3080.73	  20	  47664	  245996	  -1	  4.61004	  nan	  -869.628	  -4.61004	  0	  0	  0.21	  -1	  -1	  78.2 MiB	  0.20	  0.15141	  0.14054	  35.3 MiB	  -1	  0.07	 
+ k6_frac_N10_40nm.xml	  ex1010.pre-vpr.blif	  common	  7.49	  vpr	  108.85 MiB	  	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  286	  10	  -1	  -1	  success	  v8.0.0-13570-g5596b80d4-dirty	  release VTR_ASSERT_LEVEL=3	  GNU 13.3.0 on Linux-6.8.0-63-generic x86_64	  2025-08-17T10:24:35	  srivatsan-Precision-Tower-5810	  /home/alex/vtr-verilog-to-routing/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/none_partial_legalizer	  111460	  10	  10	  2655	  20	  0	  1438	  306	  22	  22	  484	  -1	  mcnc_large	  -1	  -1	  32007.7	  27187	  28116	  4579	  20572	  2965	  108.8 MiB	  5.41	  0.02	  8.26681	  6.49548	  -63.0171	  -6.49548	  nan	  0.00	  0.00519908	  0.00403135	  0.191153	  0.158549	  108.8 MiB	  5.41	  108.8 MiB	  4.20	  39805	  27.6808	  10335	  7.18707	  10706	  62919	  2945016	  381626	  2.15576e+07	  1.54137e+07	  3.51389e+06	  7260.09	  19	  64568	  594370	  -1	  6.79784	  nan	  -65.6361	  -6.79784	  0	  0	  0.61	  -1	  -1	  108.8 MiB	  0.98	  0.578224	  0.502638	  52.0 MiB	  -1	  0.15	 
+ k6_frac_N10_40nm.xml	  seq.pre-vpr.blif	  common	  2.24	  vpr	  78.16 MiB	  	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  92	  41	  -1	  -1	  success	  v8.0.0-13570-g5596b80d4-dirty	  release VTR_ASSERT_LEVEL=3	  GNU 13.3.0 on Linux-6.8.0-63-generic x86_64	  2025-08-17T10:24:35	  srivatsan-Precision-Tower-5810	  /home/alex/vtr-verilog-to-routing/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/none_partial_legalizer	  80040	  41	  35	  1006	  76	  0	  649	  168	  16	  16	  256	  -1	  mcnc_medium	  -1	  -1	  8919.41	  7233	  8039	  603	  4089	  3347	  78.2 MiB	  1.57	  0.01	  5.50741	  4.89699	  -140.555	  -4.89699	  nan	  0.00	  0.0018404	  0.00144993	  0.056154	  0.0483722	  78.2 MiB	  1.57	  78.2 MiB	  1.30	  11254	  17.3405	  3054	  4.70570	  5068	  24362	  844419	  148608	  1.05632e+07	  4.95825e+06	  1.26944e+06	  4958.75	  19	  28900	  206586	  -1	  5.07811	  nan	  -149.002	  -5.07811	  0	  0	  0.19	  -1	  -1	  78.2 MiB	  0.30	  0.190981	  0.167836	  33.5 MiB	  -1	  0.05	 
diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/task_list.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/task_list.txt
@@ -2,6 +2,7 @@ regression_tests/vtr_reg_strong/basic_ap
 regression_tests/vtr_reg_strong/basic_3d
 regression_tests/vtr_reg_strong/strong_ap/mcnc
 regression_tests/vtr_reg_strong/strong_ap/vtr_chain
+regression_tests/vtr_reg_strong/strong_ap/none_partial_legalizer
 regression_tests/vtr_reg_strong/strong_ap/bipartitioning_partial_legalizer
 regression_tests/vtr_reg_strong/strong_ap/flowbased_partial_legalizer
 regression_tests/vtr_reg_strong/strong_ap/naive_full_legalizer
