@@ -76,8 +76,8 @@ const std::vector<ezgl::color> kelly_max_contrast_colors = {
76
76
void drawplace (ezgl::renderer* g) {
77
77
t_draw_state* draw_state = get_draw_state_vars ();
78
78
t_draw_coords* draw_coords = get_draw_coords_vars ();
79
- const auto & device_ctx = g_vpr_ctx.device ();
80
- const auto & cluster_ctx = g_vpr_ctx.clustering ();
79
+ const DeviceContext & device_ctx = g_vpr_ctx.device ();
80
+ const ClusteringContext & cluster_ctx = g_vpr_ctx.clustering ();
81
81
const auto & grid_blocks = draw_state->get_graphics_blk_loc_registry_ref ().grid_blocks ();
82
82
83
83
ClusterBlockId bnum;
@@ -196,14 +196,12 @@ void drawplace(ezgl::renderer* g) {
196
196
/* This routine draws the nets on the placement. The nets have not *
197
197
* yet been routed, so we just draw a chain showing a possible path *
198
198
* for each net. This gives some idea of future congestion. */
199
- void drawnets (ezgl::renderer* g) {
199
+ void draw_flylines_placement (ezgl::renderer* g) {
200
200
t_draw_state* draw_state = get_draw_state_vars ();
201
201
t_draw_coords* draw_coords = get_draw_coords_vars ();
202
- const auto & cluster_ctx = g_vpr_ctx.clustering ();
202
+ const ClusteringContext & cluster_ctx = g_vpr_ctx.clustering ();
203
203
const auto & block_locs = draw_state->get_graphics_blk_loc_registry_ref ().block_locs ();
204
204
205
- float NET_ALPHA = draw_state->net_alpha ;
206
-
207
205
g->set_line_dash (ezgl::line_dash::none);
208
206
g->set_line_width (0 );
209
207
@@ -244,11 +242,12 @@ void drawnets(ezgl::renderer* g) {
244
242
if (!element_visibility.visible ) {
245
243
continue ; /* Don't Draw */
246
244
}
247
- float transparency_factor = element_visibility.alpha ;
248
245
249
- // Take the highest of the 2 transparency values that the user can select from the UI
246
+ // Take the highest of the 2 transparency values that the user can select from the UI
250
247
// Compare the current cross layer transparency to the overall Net transparency set by the user.
251
- g->set_color (draw_state->net_color [net_id], fmin (transparency_factor, draw_state->net_color [net_id].alpha * NET_ALPHA));
248
+ int transparency = std::min (element_visibility.alpha , draw_state->net_color [net_id].alpha * draw_state->net_alpha / 255 );
249
+
250
+ g->set_color (draw_state->net_color [net_id], transparency);
252
251
253
252
ezgl::point2d sink_center = draw_coords->get_absolute_clb_bbox (b2, cluster_ctx.clb_nlist .block_type (b2)).center ();
254
253
g->draw_line (driver_center, sink_center);
@@ -266,9 +265,9 @@ void draw_congestion(ezgl::renderer* g) {
266
265
return ;
267
266
}
268
267
269
- auto & device_ctx = g_vpr_ctx.device ();
270
- const auto & rr_graph = device_ctx.rr_graph ;
271
- auto & route_ctx = g_vpr_ctx.routing ();
268
+ const DeviceContext & device_ctx = g_vpr_ctx.device ();
269
+ const RRGraphView & rr_graph = device_ctx.rr_graph ;
270
+ const RoutingContext & route_ctx = g_vpr_ctx.routing ();
272
271
273
272
// Record min/max congestion
274
273
float min_congestion_ratio = 1 .;
@@ -320,7 +319,7 @@ void draw_congestion(ezgl::renderer* g) {
320
319
}
321
320
}
322
321
g->set_line_width (0 );
323
- drawroute (HIGHLIGHTED, g);
322
+ draw_route (HIGHLIGHTED, g);
324
323
325
324
// Reset colors
326
325
for (RRNodeId inode : congested_rr_nodes) {
@@ -379,8 +378,8 @@ void draw_routing_costs(ezgl::renderer* g) {
379
378
return ;
380
379
}
381
380
382
- auto & device_ctx = g_vpr_ctx.device ();
383
- auto & route_ctx = g_vpr_ctx.routing ();
381
+ const DeviceContext & device_ctx = g_vpr_ctx.device ();
382
+ const RoutingContext & route_ctx = g_vpr_ctx.routing ();
384
383
g->set_line_width (0 );
385
384
386
385
VTR_ASSERT (!route_ctx.rr_node_route_inf .empty ());
@@ -472,8 +471,8 @@ void draw_routing_bb(ezgl::renderer* g) {
472
471
return ;
473
472
}
474
473
475
- auto & route_ctx = g_vpr_ctx.routing ();
476
- auto & cluster_ctx = g_vpr_ctx.clustering ();
474
+ const RoutingContext & route_ctx = g_vpr_ctx.routing ();
475
+ const ClusteringContext & cluster_ctx = g_vpr_ctx.clustering ();
477
476
478
477
VTR_ASSERT (draw_state->show_routing_bb != OPEN);
479
478
VTR_ASSERT (draw_state->show_routing_bb < (int )route_ctx.route_bb .size ());
@@ -534,18 +533,16 @@ void draw_x(float x, float y, float size, ezgl::renderer* g) {
534
533
/* Draws the nets in the positions fixed by the router. If draw_net_type is *
535
534
* ALL_NETS, draw all the nets. If it is HIGHLIGHTED, draw only the nets *
536
535
* that are not coloured black (useful for drawing over the rr_graph). */
537
- void drawroute (enum e_draw_net_type draw_net_type, ezgl::renderer* g) {
536
+ void draw_route (enum e_draw_net_type draw_net_type, ezgl::renderer* g) {
538
537
/* Next free track in each channel segment if routing is GLOBAL */
539
538
540
- auto & cluster_ctx = g_vpr_ctx.clustering ();
539
+ const ClusteringContext & cluster_ctx = g_vpr_ctx.clustering ();
541
540
const AtomContext& atom_ctx = g_vpr_ctx.atom ();
542
541
543
542
t_draw_state* draw_state = get_draw_state_vars ();
544
543
545
- float NET_ALPHA = draw_state->net_alpha ;
546
-
547
544
g->set_line_dash (ezgl::line_dash::none);
548
- g->set_color (ezgl::BLACK, ezgl::BLACK. alpha * NET_ALPHA );
545
+ g->set_color (ezgl::BLACK, draw_state-> net_alpha );
549
546
550
547
/* Now draw each net, one by one. */
551
548
if (draw_state->is_flat ) {
@@ -568,7 +565,7 @@ void drawroute(enum e_draw_net_type draw_net_type, ezgl::renderer* g) {
568
565
}
569
566
570
567
void draw_routed_net (ParentNetId net_id, ezgl::renderer* g) {
571
- auto & route_ctx = g_vpr_ctx.routing ();
568
+ const RoutingContext & route_ctx = g_vpr_ctx.routing ();
572
569
573
570
t_draw_state* draw_state = get_draw_state_vars ();
574
571
@@ -579,13 +576,12 @@ void draw_routed_net(ParentNetId net_id, ezgl::renderer* g) {
579
576
for (auto & rt_node : route_ctx.route_trees [net_id].value ().all_nodes ()) {
580
577
RRNodeId inode = rt_node.inode ;
581
578
579
+ // If a net has been highlighted, highlight all the nodes in the net the same color.
582
580
if (draw_if_net_highlighted (net_id)) {
583
- /* If a net has been highlighted, highlight the whole net in *
584
- * the same color. */
585
581
draw_state->draw_rr_node [inode].color = draw_state->net_color [net_id];
586
582
draw_state->draw_rr_node [inode].node_highlighted = true ;
587
583
} else {
588
- /* If not highlighted, draw the node in default color. */
584
+ // If not highlighted, draw the node in default color.
589
585
draw_state->draw_rr_node [inode].color = DEFAULT_RR_NODE_COLOR;
590
586
}
591
587
@@ -609,21 +605,53 @@ void draw_routed_net(ParentNetId net_id, ezgl::renderer* g) {
609
605
// Draws the set of rr_nodes specified, using the colors set in draw_state
610
606
void draw_partial_route (const std::vector<RRNodeId>& rr_nodes_to_draw, ezgl::renderer* g) {
611
607
t_draw_state* draw_state = get_draw_state_vars ();
608
+ const RRGraphView& rr_graph = g_vpr_ctx.device ().rr_graph ;
612
609
613
610
// Draw RR Nodes
614
611
for (size_t i = 1 ; i < rr_nodes_to_draw.size (); ++i) {
615
612
RRNodeId inode = rr_nodes_to_draw[i];
616
613
ezgl::color color = draw_state->draw_rr_node [inode].color ;
617
614
615
+ bool inter_cluster_node = is_inter_cluster_node (rr_graph, inode);
616
+
617
+ if (!(draw_state->draw_rr_node [inode].node_highlighted && draw_state->highlight_fan_in_fan_out )) {
618
+ // skip drawing INTER-cluster nets if the user has disabled them
619
+ if (inter_cluster_node && !draw_state->draw_inter_cluster_nets ) {
620
+ continue ;
621
+ }
622
+
623
+ // skip drawing INTRA-cluster nets if the user has disabled them
624
+ if (!inter_cluster_node && !draw_state->draw_intra_cluster_nets ) {
625
+ continue ;
626
+ }
627
+ }
628
+
618
629
draw_rr_node (inode, color, g);
619
630
}
620
631
621
632
// Draw Edges
622
633
for (size_t i = 1 ; i < rr_nodes_to_draw.size (); ++i) {
623
634
RRNodeId inode = rr_nodes_to_draw[i];
624
635
RRNodeId prev_node = rr_nodes_to_draw[i - 1 ];
636
+ bool inter_cluster_node = is_inter_cluster_node (rr_graph, inode);
637
+ bool prev_inter_cluster_node = is_inter_cluster_node (rr_graph, prev_node);
625
638
626
- draw_rr_edge (inode, prev_node, draw_state->draw_rr_node [inode].color , g);
639
+ if (!(draw_state->draw_rr_node [inode].node_highlighted && draw_state->highlight_fan_in_fan_out )) {
640
+ // If this is an edge between two inter-cluster nodes, draw only if the user has enabled inter-cluster nets
641
+ if ((inter_cluster_node && prev_inter_cluster_node) && !draw_state->draw_inter_cluster_nets ) {
642
+ continue ;
643
+ }
644
+
645
+ // If this is an edge containing an intra-cluster node, draw only if the user has enabled intra-cluster nets
646
+ if ((!inter_cluster_node || !prev_inter_cluster_node) && !draw_state->draw_intra_cluster_nets ) {
647
+ continue ;
648
+ }
649
+ }
650
+
651
+ // avoid highlighting edge unless both nodes are highlighted
652
+ ezgl::color color = draw_state->draw_rr_node [prev_node].node_highlighted ? draw_state->draw_rr_node [inode].color : DEFAULT_RR_NODE_COLOR;
653
+
654
+ draw_rr_edge (inode, prev_node, color, g);
627
655
}
628
656
}
629
657
@@ -633,7 +661,7 @@ void draw_partial_route(const std::vector<RRNodeId>& rr_nodes_to_draw, ezgl::ren
633
661
*/
634
662
bool is_edge_valid_to_draw (RRNodeId current_node, RRNodeId prev_node) {
635
663
t_draw_state* draw_state = get_draw_state_vars ();
636
- auto & rr_graph = g_vpr_ctx.device ().rr_graph ;
664
+ const RRGraphView & rr_graph = g_vpr_ctx.device ().rr_graph ;
637
665
638
666
int current_node_layer = rr_graph.node_layer (current_node);
639
667
int prev_node_layer = rr_graph.node_layer (prev_node);
@@ -726,7 +754,7 @@ void draw_routing_util(ezgl::renderer* g) {
726
754
}
727
755
728
756
t_draw_coords* draw_coords = get_draw_coords_vars ();
729
- auto & device_ctx = g_vpr_ctx.device ();
757
+ const DeviceContext & device_ctx = g_vpr_ctx.device ();
730
758
731
759
auto chanx_usage = calculate_routing_usage (e_rr_type::CHANX, draw_state->is_flat , false );
732
760
auto chany_usage = calculate_routing_usage (e_rr_type::CHANY, draw_state->is_flat , false );
@@ -896,7 +924,7 @@ void draw_crit_path(ezgl::renderer* g) {
896
924
tatum::TimingPathCollector path_collector;
897
925
898
926
t_draw_state* draw_state = get_draw_state_vars ();
899
- auto & timing_ctx = g_vpr_ctx.timing ();
927
+ const TimingContext & timing_ctx = g_vpr_ctx.timing ();
900
928
901
929
if (draw_state->show_crit_path == DRAW_NO_CRIT_PATH) {
902
930
return ;
@@ -1054,7 +1082,7 @@ void draw_crit_path_elements(const std::vector<tatum::TimingPath>& paths, const
1054
1082
int get_timing_path_node_layer_num (tatum::NodeId node) {
1055
1083
t_draw_state* draw_state = get_draw_state_vars ();
1056
1084
const auto & block_locs = draw_state->get_graphics_blk_loc_registry_ref ().block_locs ();
1057
- const auto & atom_ctx = g_vpr_ctx.atom ();
1085
+ const AtomContext & atom_ctx = g_vpr_ctx.atom ();
1058
1086
1059
1087
AtomPinId atom_pin = atom_ctx.lookup ().tnode_atom_pin (node);
1060
1088
AtomBlockId atom_block = atom_ctx.netlist ().pin_block (atom_pin);
@@ -1152,9 +1180,9 @@ void draw_routed_timing_edge_connection(tatum::NodeId src_tnode,
1152
1180
tatum::NodeId sink_tnode,
1153
1181
ezgl::color color,
1154
1182
ezgl::renderer* g) {
1155
- auto & atom_ctx = g_vpr_ctx.atom ();
1156
- auto & cluster_ctx = g_vpr_ctx.clustering ();
1157
- auto & timing_ctx = g_vpr_ctx.timing ();
1183
+ const AtomContext & atom_ctx = g_vpr_ctx.atom ();
1184
+ const ClusteringContext & cluster_ctx = g_vpr_ctx.clustering ();
1185
+ const TimingContext & timing_ctx = g_vpr_ctx.timing ();
1158
1186
1159
1187
AtomPinId atom_src_pin = atom_ctx.lookup ().tnode_atom_pin (src_tnode);
1160
1188
AtomPinId atom_sink_pin = atom_ctx.lookup ().tnode_atom_pin (sink_tnode);
@@ -1211,6 +1239,7 @@ void draw_routed_timing_edge_connection(tatum::NodeId src_tnode,
1211
1239
1212
1240
for (RRNodeId inode : routed_rr_nodes) {
1213
1241
draw_state->draw_rr_node [inode].color = color;
1242
+ draw_state->draw_rr_node [inode].node_highlighted = true ;
1214
1243
}
1215
1244
1216
1245
// draw_partial_route() takes care of layer visibility and cross-layer settings
@@ -1284,8 +1313,8 @@ void draw_block_pin_util() {
1284
1313
if (draw_state->show_blk_pin_util == DRAW_NO_BLOCK_PIN_UTIL)
1285
1314
return ;
1286
1315
1287
- const auto & device_ctx = g_vpr_ctx.device ();
1288
- const auto & cluster_ctx = g_vpr_ctx.clustering ();
1316
+ const DeviceContext & device_ctx = g_vpr_ctx.device ();
1317
+ const ClusteringContext & cluster_ctx = g_vpr_ctx.clustering ();
1289
1318
const auto & block_locs = draw_state->get_graphics_blk_loc_registry_ref ().block_locs ();
1290
1319
1291
1320
std::map<t_physical_tile_type_ptr, size_t > total_input_pins;
@@ -1344,7 +1373,7 @@ void draw_block_pin_util() {
1344
1373
}
1345
1374
1346
1375
void draw_reset_blk_colors () {
1347
- const auto & cluster_ctx = g_vpr_ctx.clustering ();
1376
+ const ClusteringContext & cluster_ctx = g_vpr_ctx.clustering ();
1348
1377
for (auto blk : cluster_ctx.clb_nlist .blocks ()) {
1349
1378
draw_reset_blk_color (blk);
1350
1379
}
0 commit comments