hal/nxp: mcux: flash_c40: add IP aliases; init ret; S32K344: define C40 features

- Add conditional aliases (FLASH↔IP_FLASH, PFLASH↔IP_PFLASH) so the driver
  builds across MCUX SDK variants that name the C40 IP differently. No
  functional change; improves portability.
- Initialize `ret` to `kStatus_FLASH_Success` in FLASH_Program() to avoid
  potential use-before-set warnings and satisfy static analyzers on edge
  paths.
- Define S32K344 C40 flash geometry in S32K344_features.h:
    * FSL_FEATURE_FLASH_C40_BLOCK_SIZE_CODE (1 MiB)
    * FSL_FEATURE_FLASH_C40_BLOCK_COUNT_CODE (4)
    * FSL_FEATURE_FLASH_C40_BLOCK_SIZE_DATA (256 KiB)
    * aggregate total code flash size macro
  Values use unsigned constants for toolchain robustness. Min erase/program
  granularities remain controller-level (handled in the driver).

Tested on S32K344 (XIP) alongside Zephyr C40 on-chip flash driver integration.

Signed-off-by: Sumit Batra <sumit.batra@nxp.com>

Author: sumitbatra-nxp

mcux/mcux-sdk-ng/drivers/flash_c40/fsl_c40_flash.c

@@ -30,6 +30,14 @@
  * Definitions
  ******************************************************************************/
 
+/* Define local flash IP aliases */
+#if !defined(FLASH)  && defined(IP_FLASH)
+#define FLASH  IP_FLASH /* Define a local alias for C40 flash memory */
+#endif
+#if !defined(PFLASH) && defined(IP_PFLASH)
+#define PFLASH IP_PFLASH /* Define a local alias for flash memory controller */
+#endif
+
 /* Component ID definition, used by tools. */
 #ifndef FSL_COMPONENT_ID
 #define FSL_COMPONENT_ID "platform.drivers.flash_c40"
@@ -818,7 +826,7 @@ status_t FLASH_Erase(flash_config_t *config, uint32_t start, uint32_t lengthInBy
 
 status_t FLASH_Program(flash_config_t *config, uint32_t start, uint32_t *src, uint32_t lengthInBytes)
 {
-    status_t ret;
+    status_t ret = kStatus_FLASH_Success;
     size_t chunkSize;
     size_t sizeLeft = lengthInBytes;
     uint8_t *src8 = (uint8_t *) src;

s32/mcux/devices/S32K344/S32K344_features.h

@@ -236,4 +236,25 @@
 /* @brief Memory map has offset between subsystems. */
 #define FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET (1)
 
+/* C40 flash features (S32K344)
+ *
+ * These describe the on-chip C40 flash array geometry for the S32K344.
+ * Values are expressed in bytes and use unsigned constants to avoid
+ * toolchain sign/overflow surprises across GCC/ARMCLANG/IAR.
+ *
+ * Code flash (PFLASH): 4 MiB total implemented as 4 × 1 MiB blocks.
+ * Data flash (DFLASH) window: 256 KiB.
+ *
+ * Note: Min erase/program granularities are controller-level properties
+ * (8 KiB erase, 8 bytes program) and are handled by the driver; they are
+ * not expressed as SoC features here.
+ */
+#define FSL_FEATURE_FLASH_C40_BLOCK_SIZE_CODE     (1024u * 1024u)
+#define FSL_FEATURE_FLASH_C40_BLOCK_COUNT_CODE    (4u)
+#define FSL_FEATURE_FLASH_C40_BLOCK_SIZE_DATA     (256u * 1024u)
+
+/* (Optional) aggregate for convenience: total code flash size */
+#define FSL_FEATURE_FLASH_C40_CODE_TOTAL_SIZE \
+	(FSL_FEATURE_FLASH_C40_BLOCK_SIZE_CODE * FSL_FEATURE_FLASH_C40_BLOCK_COUNT_CODE)
+
 #endif /* _S32K344_FEATURES_H_ */