diff --git a/mcux/mcux-sdk-ng/devices/MCX/MCXE/MCXE245/drivers/fsl_clock.h b/mcux/mcux-sdk-ng/devices/MCX/MCXE/MCXE245/drivers/fsl_clock.h index d51f100d46..4a38308d9b 100644 --- a/mcux/mcux-sdk-ng/devices/MCX/MCXE/MCXE245/drivers/fsl_clock.h +++ b/mcux/mcux-sdk-ng/devices/MCX/MCXE/MCXE245/drivers/fsl_clock.h @@ -183,6 +183,18 @@ extern volatile uint32_t g_xtal0Freq; kCLOCK_Mpu \ } +/*! @brief Clock ip name array for EIM. */ +#define EIM_CLOCKS \ + { \ + kCLOCK_Eim \ + } + +/*! @brief Clock ip name array for ERM. */ +#define ERM_CLOCKS \ + { \ + kCLOCK_Erm \ + } + /*! * @brief LPO clock frequency. */ @@ -730,13 +742,14 @@ uint32_t CLOCK_GetSysClkFreq(scg_sys_clk_t type); */ static inline void CLOCK_SetVlprModeSysClkConfig(const scg_sys_clk_config_t *config) { - assert(config); union { const uint32_t *configInt; const scg_sys_clk_config_t *configPtr; } Config; + assert(config); + Config.configPtr = config; SCG->VCCR = *(Config.configInt); } @@ -750,13 +763,14 @@ static inline void CLOCK_SetVlprModeSysClkConfig(const scg_sys_clk_config_t *con */ static inline void CLOCK_SetRunModeSysClkConfig(const scg_sys_clk_config_t *config) { - assert(config); union { const uint32_t *configInt; const scg_sys_clk_config_t *configPtr; } Config; + assert(config); + Config.configPtr = config; SCG->RCCR = *(Config.configInt); } @@ -770,13 +784,14 @@ static inline void CLOCK_SetRunModeSysClkConfig(const scg_sys_clk_config_t *conf */ static inline void CLOCK_SetHsrunModeSysClkConfig(const scg_sys_clk_config_t *config) { - assert(config); union { const uint32_t *configInt; const scg_sys_clk_config_t *configPtr; } Config; + assert(config); + Config.configPtr = config; SCG->HCCR = *(Config.configInt); } @@ -790,8 +805,6 @@ static inline void CLOCK_SetHsrunModeSysClkConfig(const scg_sys_clk_config_t *co */ static inline void CLOCK_GetCurSysClkConfig(scg_sys_clk_config_t *config) { - assert(config); - uint32_t tempCsr; union @@ -800,6 +813,8 @@ static inline void CLOCK_GetCurSysClkConfig(scg_sys_clk_config_t *config) scg_sys_clk_config_t *configPtr; } Config; + assert(config); + Config.configPtr = config; /* diff --git a/mcux/mcux-sdk-ng/devices/MCX/MCXE/MCXE246/drivers/fsl_clock.h b/mcux/mcux-sdk-ng/devices/MCX/MCXE/MCXE246/drivers/fsl_clock.h index d51f100d46..4a38308d9b 100644 --- a/mcux/mcux-sdk-ng/devices/MCX/MCXE/MCXE246/drivers/fsl_clock.h +++ b/mcux/mcux-sdk-ng/devices/MCX/MCXE/MCXE246/drivers/fsl_clock.h @@ -183,6 +183,18 @@ extern volatile uint32_t g_xtal0Freq; kCLOCK_Mpu \ } +/*! @brief Clock ip name array for EIM. */ +#define EIM_CLOCKS \ + { \ + kCLOCK_Eim \ + } + +/*! @brief Clock ip name array for ERM. */ +#define ERM_CLOCKS \ + { \ + kCLOCK_Erm \ + } + /*! * @brief LPO clock frequency. */ @@ -730,13 +742,14 @@ uint32_t CLOCK_GetSysClkFreq(scg_sys_clk_t type); */ static inline void CLOCK_SetVlprModeSysClkConfig(const scg_sys_clk_config_t *config) { - assert(config); union { const uint32_t *configInt; const scg_sys_clk_config_t *configPtr; } Config; + assert(config); + Config.configPtr = config; SCG->VCCR = *(Config.configInt); } @@ -750,13 +763,14 @@ static inline void CLOCK_SetVlprModeSysClkConfig(const scg_sys_clk_config_t *con */ static inline void CLOCK_SetRunModeSysClkConfig(const scg_sys_clk_config_t *config) { - assert(config); union { const uint32_t *configInt; const scg_sys_clk_config_t *configPtr; } Config; + assert(config); + Config.configPtr = config; SCG->RCCR = *(Config.configInt); } @@ -770,13 +784,14 @@ static inline void CLOCK_SetRunModeSysClkConfig(const scg_sys_clk_config_t *conf */ static inline void CLOCK_SetHsrunModeSysClkConfig(const scg_sys_clk_config_t *config) { - assert(config); union { const uint32_t *configInt; const scg_sys_clk_config_t *configPtr; } Config; + assert(config); + Config.configPtr = config; SCG->HCCR = *(Config.configInt); } @@ -790,8 +805,6 @@ static inline void CLOCK_SetHsrunModeSysClkConfig(const scg_sys_clk_config_t *co */ static inline void CLOCK_GetCurSysClkConfig(scg_sys_clk_config_t *config) { - assert(config); - uint32_t tempCsr; union @@ -800,6 +813,8 @@ static inline void CLOCK_GetCurSysClkConfig(scg_sys_clk_config_t *config) scg_sys_clk_config_t *configPtr; } Config; + assert(config); + Config.configPtr = config; /* diff --git a/mcux/mcux-sdk-ng/devices/MCX/MCXE/MCXE247/drivers/fsl_clock.h b/mcux/mcux-sdk-ng/devices/MCX/MCXE/MCXE247/drivers/fsl_clock.h index 794fd33e60..04667bbffc 100644 --- a/mcux/mcux-sdk-ng/devices/MCX/MCXE/MCXE247/drivers/fsl_clock.h +++ b/mcux/mcux-sdk-ng/devices/MCX/MCXE/MCXE247/drivers/fsl_clock.h @@ -201,6 +201,18 @@ extern volatile uint32_t g_xtal0Freq; kCLOCK_Mpu \ } +/*! @brief Clock ip name array for EIM. */ +#define EIM_CLOCKS \ + { \ + kCLOCK_Eim \ + } + +/*! @brief Clock ip name array for ERM. */ +#define ERM_CLOCKS \ + { \ + kCLOCK_Erm \ + } + /*! * @brief LPO clock frequency. */ @@ -755,13 +767,14 @@ uint32_t CLOCK_GetSysClkFreq(scg_sys_clk_t type); */ static inline void CLOCK_SetVlprModeSysClkConfig(const scg_sys_clk_config_t *config) { - assert(config); union { const uint32_t *configInt; const scg_sys_clk_config_t *configPtr; } Config; + assert(config); + Config.configPtr = config; SCG->VCCR = *(Config.configInt); } @@ -775,13 +788,14 @@ static inline void CLOCK_SetVlprModeSysClkConfig(const scg_sys_clk_config_t *con */ static inline void CLOCK_SetRunModeSysClkConfig(const scg_sys_clk_config_t *config) { - assert(config); union { const uint32_t *configInt; const scg_sys_clk_config_t *configPtr; } Config; + assert(config); + Config.configPtr = config; SCG->RCCR = *(Config.configInt); } @@ -795,13 +809,14 @@ static inline void CLOCK_SetRunModeSysClkConfig(const scg_sys_clk_config_t *conf */ static inline void CLOCK_SetHsrunModeSysClkConfig(const scg_sys_clk_config_t *config) { - assert(config); union { const uint32_t *configInt; const scg_sys_clk_config_t *configPtr; } Config; + assert(config); + Config.configPtr = config; SCG->HCCR = *(Config.configInt); } @@ -815,14 +830,14 @@ static inline void CLOCK_SetHsrunModeSysClkConfig(const scg_sys_clk_config_t *co */ static inline void CLOCK_GetCurSysClkConfig(scg_sys_clk_config_t *config) { - assert(config); - union { uint32_t *configInt; scg_sys_clk_config_t *configPtr; } Config; + assert(config); + Config.configPtr = config; *(Config.configInt) = SCG->CSR; } diff --git a/mcux/mcux-sdk-ng/drivers/eim/CMakeLists.txt b/mcux/mcux-sdk-ng/drivers/eim/CMakeLists.txt index 64f549e9bf..8a5c3a57d4 100644 --- a/mcux/mcux-sdk-ng/drivers/eim/CMakeLists.txt +++ b/mcux/mcux-sdk-ng/drivers/eim/CMakeLists.txt @@ -3,9 +3,9 @@ # SPDX-License-Identifier: BSD-3-Clause if(CONFIG_MCUX_COMPONENT_driver.eim) - mcux_component_version(2.0.2) + mcux_component_version(2.1.0) - mcux_add_source(SOURCES fsl_eim.c fsl_eim.h) + mcux_add_source(SOURCES fsl_eim.c fsl_eim.h eim_channel_word.h) mcux_add_include(INCLUDES .) diff --git a/mcux/mcux-sdk-ng/drivers/eim/eim_channel_word.h b/mcux/mcux-sdk-ng/drivers/eim/eim_channel_word.h new file mode 100644 index 0000000000..3ab886a34f --- /dev/null +++ b/mcux/mcux-sdk-ng/drivers/eim/eim_channel_word.h @@ -0,0 +1,1503 @@ +/* + * Copyright 2025 NXP + * + * SPDX-License-Identifier: BSD-3-Clause + */ +#ifndef EIM_CHANNEL_WORD_H_ +#define EIM_CHANNEL_WORD_H_ + +#define _REG(ch, i) ( (base)->EICHD##ch##_WORD##i ) +#define _MASK_FUNC(ch, i, BIT) EIM_EICHD##ch##_WORD##i##_B##BIT##DATA_MASK +#define _MASK(ch, i, BIT) EIM_EICHD##ch##_WORD##i##_B##BIT##DATA_MASK_MASK +#define _SHIFT(ch, i, BIT) EIM_EICHD##ch##_WORD##i##_B##BIT##DATA_MASK_SHIFT + +#define _SET(base, ch, i, BIT, mask) \ + _REG(ch, i) = _MASK_FUNC(ch, i, BIT)(mask); break; + +#define _GET(base, ch, i, BIT) \ + mask = ( (_REG(ch, i) & _MASK(ch, i, BIT)) >> _SHIFT(ch, i, BIT) ); break; + +#define SET_0_1 case 1: _SET(base,0,1,0_3,mask) +#define GET_0_1 case 1: _GET(base,0,1,0_3) + +#if defined(EIM_EICHD0_WORD2_B4_7DATA_MASK_MASK) +#define SET_0_2 case 2: _SET(base,0,2,4_7,mask) +#define GET_0_2 case 2: _GET(base,0,2,4_7) +#else +#define SET_0_2 +#define GET_0_2 +#endif + +#if defined(EIM_EICHD0_WORD3_B8_11DATA_MASK_MASK) +#define SET_0_3 case 3: _SET(base,0,3,8_11,mask) +#define GET_0_3 case 3: _GET(base,0,3,8_11) +#else +#define SET_0_3 +#define GET_0_3 +#endif + +#if defined(EIM_EICHD0_WORD4_B12_15DATA_MASK_MASK) +#define SET_0_4 case 4: _SET(base,0,4,12_15,mask) +#define GET_0_4 case 4: _GET(base,0,4,12_15) +#else +#define SET_0_4 +#define GET_0_4 +#endif + +#if defined(EIM_EICHD0_WORD5_B16_19DATA_MASK_MASK) +#define SET_0_5 case 5: _SET(base,0,5,16_19,mask) +#define GET_0_5 case 5: _GET(base,0,5,16_19) +#else +#define SET_0_5 +#define GET_0_5 +#endif + +#if defined(EIM_EICHD0_WORD6_B20_23DATA_MASK_MASK) +#define SET_0_6 case 6: _SET(base,0,6,20_23,mask) +#define GET_0_6 case 6: _GET(base,0,6,20_23) +#else +#define SET_0_6 +#define GET_0_6 +#endif + +#if defined(EIM_EICHD1_WORD1_B0_3DATA_MASK_MASK) +#define SET_1_1 case 1: _SET(base,1,1,0_3,mask) +#define GET_1_1 case 1: _GET(base,1,1,0_3) +#else +#define SET_1_1 +#define GET_1_1 +#endif + +#if defined(EIM_EICHD1_WORD2_B4_7DATA_MASK_MASK) +#define SET_1_2 case 2: _SET(base,1,2,4_7,mask) +#define GET_1_2 case 2: _GET(base,1,2,4_7) +#else +#define SET_1_2 +#define GET_1_2 +#endif + +#if defined(EIM_EICHD1_WORD3_B8_11DATA_MASK_MASK) +#define SET_1_3 case 3: _SET(base,1,3,8_11,mask) +#define GET_1_3 case 3: _GET(base,1,3,8_11) +#else +#define SET_1_3 +#define GET_1_3 +#endif + +#if defined(EIM_EICHD1_WORD4_B12_15DATA_MASK_MASK) +#define SET_1_4 case 4: _SET(base,1,4,12_15,mask) +#define GET_1_4 case 4: _GET(base,1,4,12_15) +#else +#define SET_1_4 +#define GET_1_4 +#endif + +#if defined(EIM_EICHD1_WORD5_B16_19DATA_MASK_MASK) +#define SET_1_5 case 5: _SET(base,1,5,16_19,mask) +#define GET_1_5 case 5: _GET(base,1,5,16_19) +#else +#define SET_1_5 +#define GET_1_5 +#endif + +#if defined(EIM_EICHD1_WORD6_B20_23DATA_MASK_MASK) +#define SET_1_6 case 6: _SET(base,1,6,20_23,mask) +#define GET_1_6 case 6: _GET(base,1,6,20_23) +#else +#define SET_1_6 +#define GET_1_6 +#endif + +#if defined(EIM_EICHD2_WORD1_B0_3DATA_MASK_MASK) +#define SET_2_1 case 1: _SET(base,2,1,0_3,mask) +#define GET_2_1 case 1: _GET(base,2,1,0_3) +#else +#define SET_2_1 +#define GET_2_1 +#endif + +#if defined(EIM_EICHD2_WORD2_B4_7DATA_MASK_MASK) +#define SET_2_2 case 2: _SET(base,2,2,4_7,mask) +#define GET_2_2 case 2: _GET(base,2,2,4_7) +#else +#define SET_2_2 +#define GET_2_2 +#endif + +#if defined(EIM_EICHD2_WORD3_B8_11DATA_MASK_MASK) +#define SET_2_3 case 3: _SET(base,2,3,8_11,mask) +#define GET_2_3 case 3: _GET(base,2,3,8_11) +#else +#define SET_2_3 +#define GET_2_3 +#endif + +#if defined(EIM_EICHD2_WORD4_B12_15DATA_MASK_MASK) +#define SET_2_4 case 4: _SET(base,2,4,12_15,mask) +#define GET_2_4 case 4: _GET(base,2,4,12_15) +#else +#define SET_2_4 +#define GET_2_4 +#endif + +#if defined(EIM_EICHD2_WORD5_B16_19DATA_MASK_MASK) +#define SET_2_5 case 5: _SET(base,2,5,16_19,mask) +#define GET_2_5 case 5: _GET(base,2,5,16_19) +#else +#define SET_2_5 +#define GET_2_5 +#endif + +#if defined(EIM_EICHD2_WORD6_B20_23DATA_MASK_MASK) +#define SET_2_6 case 6: _SET(base,2,6,20_23,mask) +#define GET_2_6 case 6: _GET(base,2,6,20_23) +#else +#define SET_2_6 +#define GET_2_6 +#endif + +#if defined(EIM_EICHD3_WORD1_B0_3DATA_MASK_MASK) +#define SET_3_1 case 1: _SET(base,3,1,0_3,mask) +#define GET_3_1 case 1: _GET(base,3,1,0_3) +#else +#define SET_3_1 +#define GET_3_1 +#endif + +#if defined(EIM_EICHD3_WORD2_B4_7DATA_MASK_MASK) +#define SET_3_2 case 2: _SET(base,3,2,4_7,mask) +#define GET_3_2 case 2: _GET(base,3,2,4_7) +#else +#define SET_3_2 +#define GET_3_2 +#endif + +#if defined(EIM_EICHD3_WORD3_B8_11DATA_MASK_MASK) +#define SET_3_3 case 3: _SET(base,3,3,8_11,mask) +#define GET_3_3 case 3: _GET(base,3,3,8_11) +#else +#define SET_3_3 +#define GET_3_3 +#endif + +#if defined(EIM_EICHD3_WORD4_B12_15DATA_MASK_MASK) +#define SET_3_4 case 4: _SET(base,3,4,12_15,mask) +#define GET_3_4 case 4: _GET(base,3,4,12_15) +#else +#define SET_3_4 +#define GET_3_4 +#endif + +#if defined(EIM_EICHD3_WORD5_B16_19DATA_MASK_MASK) +#define SET_3_5 case 5: _SET(base,3,5,16_19,mask) +#define GET_3_5 case 5: _GET(base,3,5,16_19) +#else +#define SET_3_5 +#define GET_3_5 +#endif + +#if defined(EIM_EICHD3_WORD6_B20_23DATA_MASK_MASK) +#define SET_3_6 case 6: _SET(base,3,6,20_23,mask) +#define GET_3_6 case 6: _GET(base,3,6,20_23) +#else +#define SET_3_6 +#define GET_3_6 +#endif + +#if defined(EIM_EICHD4_WORD1_B0_3DATA_MASK_MASK) +#define SET_4_1 case 1: _SET(base,4,1,0_3,mask) +#define GET_4_1 case 1: _GET(base,4,1,0_3) +#else +#define SET_4_1 +#define GET_4_1 +#endif + +#if defined(EIM_EICHD4_WORD2_B4_7DATA_MASK_MASK) +#define SET_4_2 case 2: _SET(base,4,2,4_7,mask) +#define GET_4_2 case 2: _GET(base,4,2,4_7) +#else +#define SET_4_2 +#define GET_4_2 +#endif + +#if defined(EIM_EICHD4_WORD3_B8_11DATA_MASK_MASK) +#define SET_4_3 case 3: _SET(base,4,3,8_11,mask) +#define GET_4_3 case 3: _GET(base,4,3,8_11) +#else +#define SET_4_3 +#define GET_4_3 +#endif + +#if defined(EIM_EICHD4_WORD4_B12_15DATA_MASK_MASK) +#define SET_4_4 case 4: _SET(base,4,4,12_15,mask) +#define GET_4_4 case 4: _GET(base,4,4,12_15) +#else +#define SET_4_4 +#define GET_4_4 +#endif + +#if defined(EIM_EICHD4_WORD5_B16_19DATA_MASK_MASK) +#define SET_4_5 case 5: _SET(base,4,5,16_19,mask) +#define GET_4_5 case 5: _GET(base,4,5,16_19) +#else +#define SET_4_5 +#define GET_4_5 +#endif + +#if defined(EIM_EICHD4_WORD6_B20_23DATA_MASK_MASK) +#define SET_4_6 case 6: _SET(base,4,6,20_23,mask) +#define GET_4_6 case 6: _GET(base,4,6,20_23) +#else +#define SET_4_6 +#define GET_4_6 +#endif + +#if defined(EIM_EICHD5_WORD1_B0_3DATA_MASK_MASK) +#define SET_5_1 case 1: _SET(base,5,1,0_3,mask) +#define GET_5_1 case 1: _GET(base,5,1,0_3) +#else +#define SET_5_1 +#define GET_5_1 +#endif + +#if defined(EIM_EICHD5_WORD2_B4_7DATA_MASK_MASK) +#define SET_5_2 case 2: _SET(base,5,2,4_7,mask) +#define GET_5_2 case 2: _GET(base,5,2,4_7) +#else +#define SET_5_2 +#define GET_5_2 +#endif + +#if defined(EIM_EICHD5_WORD3_B8_11DATA_MASK_MASK) +#define SET_5_3 case 3: _SET(base,5,3,8_11,mask) +#define GET_5_3 case 3: _GET(base,5,3,8_11) +#else +#define SET_5_3 +#define GET_5_3 +#endif + +#if defined(EIM_EICHD5_WORD4_B12_15DATA_MASK_MASK) +#define SET_5_4 case 4: _SET(base,5,4,12_15,mask) +#define GET_5_4 case 4: _GET(base,5,4,12_15) +#else +#define SET_5_4 +#define GET_5_4 +#endif + +#if defined(EIM_EICHD5_WORD5_B16_19DATA_MASK_MASK) +#define SET_5_5 case 5: _SET(base,5,5,16_19,mask) +#define GET_5_5 case 5: _GET(base,5,5,16_19) +#else +#define SET_5_5 +#define GET_5_5 +#endif + +#if defined(EIM_EICHD5_WORD6_B20_23DATA_MASK_MASK) +#define SET_5_6 case 6: _SET(base,5,6,20_23,mask) +#define GET_5_6 case 6: _GET(base,5,6,20_23) +#else +#define SET_5_6 +#define GET_5_6 +#endif + +#if defined(EIM_EICHD6_WORD1_B0_3DATA_MASK_MASK) +#define SET_6_1 case 1: _SET(base,6,1,0_3,mask) +#define GET_6_1 case 1: _GET(base,6,1,0_3) +#else +#define SET_6_1 +#define GET_6_1 +#endif + +#if defined(EIM_EICHD6_WORD2_B4_7DATA_MASK_MASK) +#define SET_6_2 case 2: _SET(base,6,2,4_7,mask) +#define GET_6_2 case 2: _GET(base,6,2,4_7) +#else +#define SET_6_2 +#define GET_6_2 +#endif + +#if defined(EIM_EICHD6_WORD3_B8_11DATA_MASK_MASK) +#define SET_6_3 case 3: _SET(base,6,3,8_11,mask) +#define GET_6_3 case 3: _GET(base,6,3,8_11) +#else +#define SET_6_3 +#define GET_6_3 +#endif + +#if defined(EIM_EICHD6_WORD4_B12_15DATA_MASK_MASK) +#define SET_6_4 case 4: _SET(base,6,4,12_15,mask) +#define GET_6_4 case 4: _GET(base,6,4,12_15) +#else +#define SET_6_4 +#define GET_6_4 +#endif + +#if defined(EIM_EICHD6_WORD5_B16_19DATA_MASK_MASK) +#define SET_6_5 case 5: _SET(base,6,5,16_19,mask) +#define GET_6_5 case 5: _GET(base,6,5,16_19) +#else +#define SET_6_5 +#define GET_6_5 +#endif + +#if defined(EIM_EICHD6_WORD6_B20_23DATA_MASK_MASK) +#define SET_6_6 case 6: _SET(base,6,6,20_23,mask) +#define GET_6_6 case 6: _GET(base,6,6,20_23) +#else +#define SET_6_6 +#define GET_6_6 +#endif + +#if defined(EIM_EICHD7_WORD1_B0_3DATA_MASK_MASK) +#define SET_7_1 case 1: _SET(base,7,1,0_3,mask) +#define GET_7_1 case 1: _GET(base,7,1,0_3) +#else +#define SET_7_1 +#define GET_7_1 +#endif + +#if defined(EIM_EICHD7_WORD2_B4_7DATA_MASK_MASK) +#define SET_7_2 case 2: _SET(base,7,2,4_7,mask) +#define GET_7_2 case 2: _GET(base,7,2,4_7) +#else +#define SET_7_2 +#define GET_7_2 +#endif + +#if defined(EIM_EICHD7_WORD3_B8_11DATA_MASK_MASK) +#define SET_7_3 case 3: _SET(base,7,3,8_11,mask) +#define GET_7_3 case 3: _GET(base,7,3,8_11) +#else +#define SET_7_3 +#define GET_7_3 +#endif + +#if defined(EIM_EICHD7_WORD4_B12_15DATA_MASK_MASK) +#define SET_7_4 case 4: _SET(base,7,4,12_15,mask) +#define GET_7_4 case 4: _GET(base,7,4,12_15) +#else +#define SET_7_4 +#define GET_7_4 +#endif + +#if defined(EIM_EICHD7_WORD5_B16_19DATA_MASK_MASK) +#define SET_7_5 case 5: _SET(base,7,5,16_19,mask) +#define GET_7_5 case 5: _GET(base,7,5,16_19) +#else +#define SET_7_5 +#define GET_7_5 +#endif + +#if defined(EIM_EICHD7_WORD6_B20_23DATA_MASK_MASK) +#define SET_7_6 case 6: _SET(base,7,6,20_23,mask) +#define GET_7_6 case 6: _GET(base,7,6,20_23) +#else +#define SET_7_6 +#define GET_7_6 +#endif + +#if defined(EIM_EICHD8_WORD1_B0_3DATA_MASK_MASK) +#define SET_8_1 case 1: _SET(base,8,1,0_3,mask) +#define GET_8_1 case 1: _GET(base,8,1,0_3) +#else +#define SET_8_1 +#define GET_8_1 +#endif + +#if defined(EIM_EICHD8_WORD2_B4_7DATA_MASK_MASK) +#define SET_8_2 case 2: _SET(base,8,2,4_7,mask) +#define GET_8_2 case 2: _GET(base,8,2,4_7) +#else +#define SET_8_2 +#define GET_8_2 +#endif + +#if defined(EIM_EICHD8_WORD3_B8_11DATA_MASK_MASK) +#define SET_8_3 case 3: _SET(base,8,3,8_11,mask) +#define GET_8_3 case 3: _GET(base,8,3,8_11) +#else +#define SET_8_3 +#define GET_8_3 +#endif + +#if defined(EIM_EICHD8_WORD4_B12_15DATA_MASK_MASK) +#define SET_8_4 case 4: _SET(base,8,4,12_15,mask) +#define GET_8_4 case 4: _GET(base,8,4,12_15) +#else +#define SET_8_4 +#define GET_8_4 +#endif + +#if defined(EIM_EICHD8_WORD5_B16_19DATA_MASK_MASK) +#define SET_8_5 case 5: _SET(base,8,5,16_19,mask) +#define GET_8_5 case 5: _GET(base,8,5,16_19) +#else +#define SET_8_5 +#define GET_8_5 +#endif + +#if defined(EIM_EICHD8_WORD6_B20_23DATA_MASK_MASK) +#define SET_8_6 case 6: _SET(base,8,6,20_23,mask) +#define GET_8_6 case 6: _GET(base,8,6,20_23) +#else +#define SET_8_6 +#define GET_8_6 +#endif + +#if defined(EIM_EICHD9_WORD1_B0_3DATA_MASK_MASK) +#define SET_9_1 case 1: _SET(base,9,1,0_3,mask) +#define GET_9_1 case 1: _GET(base,9,1,0_3) +#else +#define SET_9_1 +#define GET_9_1 +#endif + +#if defined(EIM_EICHD9_WORD2_B4_7DATA_MASK_MASK) +#define SET_9_2 case 2: _SET(base,9,2,4_7,mask) +#define GET_9_2 case 2: _GET(base,9,2,4_7) +#else +#define SET_9_2 +#define GET_9_2 +#endif + +#if defined(EIM_EICHD9_WORD3_B8_11DATA_MASK_MASK) +#define SET_9_3 case 3: _SET(base,9,3,8_11,mask) +#define GET_9_3 case 3: _GET(base,9,3,8_11) +#else +#define SET_9_3 +#define GET_9_3 +#endif + +#if defined(EIM_EICHD9_WORD4_B12_15DATA_MASK_MASK) +#define SET_9_4 case 4: _SET(base,9,4,12_15,mask) +#define GET_9_4 case 4: _GET(base,9,4,12_15) +#else +#define SET_9_4 +#define GET_9_4 +#endif + +#if defined(EIM_EICHD9_WORD5_B16_19DATA_MASK_MASK) +#define SET_9_5 case 5: _SET(base,9,5,16_19,mask) +#define GET_9_5 case 5: _GET(base,9,5,16_19) +#else +#define SET_9_5 +#define GET_9_5 +#endif + +#if defined(EIM_EICHD9_WORD6_B20_23DATA_MASK_MASK) +#define SET_9_6 case 6: _SET(base,9,6,20_23,mask) +#define GET_9_6 case 6: _GET(base,9,6,20_23) +#else +#define SET_9_6 +#define GET_9_6 +#endif + +#if defined(EIM_EICHD10_WORD1_B0_3DATA_MASK_MASK) +#define SET_10_1 case 1: _SET(base,10,1,0_3,mask) +#define GET_10_1 case 1: _GET(base,10,1,0_3) +#else +#define SET_10_1 +#define GET_10_1 +#endif + +#if defined(EIM_EICHD10_WORD2_B4_7DATA_MASK_MASK) +#define SET_10_2 case 2: _SET(base,10,2,4_7,mask) +#define GET_10_2 case 2: _GET(base,10,2,4_7) +#else +#define SET_10_2 +#define GET_10_2 +#endif + +#if defined(EIM_EICHD10_WORD3_B8_11DATA_MASK_MASK) +#define SET_10_3 case 3: _SET(base,10,3,8_11,mask) +#define GET_10_3 case 3: _GET(base,10,3,8_11) +#else +#define SET_10_3 +#define GET_10_3 +#endif + +#if defined(EIM_EICHD10_WORD4_B12_15DATA_MASK_MASK) +#define SET_10_4 case 4: _SET(base,10,4,12_15,mask) +#define GET_10_4 case 4: _GET(base,10,4,12_15) +#else +#define SET_10_4 +#define GET_10_4 +#endif + +#if defined(EIM_EICHD10_WORD5_B16_19DATA_MASK_MASK) +#define SET_10_5 case 5: _SET(base,10,5,16_19,mask) +#define GET_10_5 case 5: _GET(base,10,5,16_19) +#else +#define SET_10_5 +#define GET_10_5 +#endif + +#if defined(EIM_EICHD10_WORD6_B20_23DATA_MASK_MASK) +#define SET_10_6 case 6: _SET(base,10,6,20_23,mask) +#define GET_10_6 case 6: _GET(base,10,6,20_23) +#else +#define SET_10_6 +#define GET_10_6 +#endif + +#if defined(EIM_EICHD11_WORD1_B0_3DATA_MASK_MASK) +#define SET_11_1 case 1: _SET(base,11,1,0_3,mask) +#define GET_11_1 case 1: _GET(base,11,1,0_3) +#else +#define SET_11_1 +#define GET_11_1 +#endif + +#if defined(EIM_EICHD11_WORD2_B4_7DATA_MASK_MASK) +#define SET_11_2 case 2: _SET(base,11,2,4_7,mask) +#define GET_11_2 case 2: _GET(base,11,2,4_7) +#else +#define SET_11_2 +#define GET_11_2 +#endif + +#if defined(EIM_EICHD11_WORD3_B8_11DATA_MASK_MASK) +#define SET_11_3 case 3: _SET(base,11,3,8_11,mask) +#define GET_11_3 case 3: _GET(base,11,3,8_11) +#else +#define SET_11_3 +#define GET_11_3 +#endif + +#if defined(EIM_EICHD11_WORD4_B12_15DATA_MASK_MASK) +#define SET_11_4 case 4: _SET(base,11,4,12_15,mask) +#define GET_11_4 case 4: _GET(base,11,4,12_15) +#else +#define SET_11_4 +#define GET_11_4 +#endif + +#if defined(EIM_EICHD11_WORD5_B16_19DATA_MASK_MASK) +#define SET_11_5 case 5: _SET(base,11,5,16_19,mask) +#define GET_11_5 case 5: _GET(base,11,5,16_19) +#else +#define SET_11_5 +#define GET_11_5 +#endif + +#if defined(EIM_EICHD11_WORD6_B20_23DATA_MASK_MASK) +#define SET_11_6 case 6: _SET(base,11,6,20_23,mask) +#define GET_11_6 case 6: _GET(base,11,6,20_23) +#else +#define SET_11_6 +#define GET_11_6 +#endif + +#if defined(EIM_EICHD12_WORD1_B0_3DATA_MASK_MASK) +#define SET_12_1 case 1: _SET(base,12,1,0_3,mask) +#define GET_12_1 case 1: _GET(base,12,1,0_3) +#else +#define SET_12_1 +#define GET_12_1 +#endif + +#if defined(EIM_EICHD12_WORD2_B4_7DATA_MASK_MASK) +#define SET_12_2 case 2: _SET(base,12,2,4_7,mask) +#define GET_12_2 case 2: _GET(base,12,2,4_7) +#else +#define SET_12_2 +#define GET_12_2 +#endif + +#if defined(EIM_EICHD12_WORD3_B8_11DATA_MASK_MASK) +#define SET_12_3 case 3: _SET(base,12,3,8_11,mask) +#define GET_12_3 case 3: _GET(base,12,3,8_11) +#else +#define SET_12_3 +#define GET_12_3 +#endif + +#if defined(EIM_EICHD12_WORD4_B12_15DATA_MASK_MASK) +#define SET_12_4 case 4: _SET(base,12,4,12_15,mask) +#define GET_12_4 case 4: _GET(base,12,4,12_15) +#else +#define SET_12_4 +#define GET_12_4 +#endif + +#if defined(EIM_EICHD12_WORD5_B16_19DATA_MASK_MASK) +#define SET_12_5 case 5: _SET(base,12,5,16_19,mask) +#define GET_12_5 case 5: _GET(base,12,5,16_19) +#else +#define SET_12_5 +#define GET_12_5 +#endif + +#if defined(EIM_EICHD12_WORD6_B20_23DATA_MASK_MASK) +#define SET_12_6 case 6: _SET(base,12,6,20_23,mask) +#define GET_12_6 case 6: _GET(base,12,6,20_23) +#else +#define SET_12_6 +#define GET_12_6 +#endif + +#if defined(EIM_EICHD13_WORD1_B0_3DATA_MASK_MASK) +#define SET_13_1 case 1: _SET(base,13,1,0_3,mask) +#define GET_13_1 case 1: _GET(base,13,1,0_3) +#else +#define SET_13_1 +#define GET_13_1 +#endif + +#if defined(EIM_EICHD13_WORD2_B4_7DATA_MASK_MASK) +#define SET_13_2 case 2: _SET(base,13,2,4_7,mask) +#define GET_13_2 case 2: _GET(base,13,2,4_7) +#else +#define SET_13_2 +#define GET_13_2 +#endif + +#if defined(EIM_EICHD13_WORD3_B8_11DATA_MASK_MASK) +#define SET_13_3 case 3: _SET(base,13,3,8_11,mask) +#define GET_13_3 case 3: _GET(base,13,3,8_11) +#else +#define SET_13_3 +#define GET_13_3 +#endif + +#if defined(EIM_EICHD13_WORD4_B12_15DATA_MASK_MASK) +#define SET_13_4 case 4: _SET(base,13,4,12_15,mask) +#define GET_13_4 case 4: _GET(base,13,4,12_15) +#else +#define SET_13_4 +#define GET_13_4 +#endif + +#if defined(EIM_EICHD13_WORD5_B16_19DATA_MASK_MASK) +#define SET_13_5 case 5: _SET(base,13,5,16_19,mask) +#define GET_13_5 case 5: _GET(base,13,5,16_19) +#else +#define SET_13_5 +#define GET_13_5 +#endif + +#if defined(EIM_EICHD13_WORD6_B20_23DATA_MASK_MASK) +#define SET_13_6 case 6: _SET(base,13,6,20_23,mask) +#define GET_13_6 case 6: _GET(base,13,6,20_23) +#else +#define SET_13_6 +#define GET_13_6 +#endif + +#if defined(EIM_EICHD14_WORD1_B0_3DATA_MASK_MASK) +#define SET_14_1 case 1: _SET(base,14,1,0_3,mask) +#define GET_14_1 case 1: _GET(base,14,1,0_3) +#else +#define SET_14_1 +#define GET_14_1 +#endif + +#if defined(EIM_EICHD14_WORD2_B4_7DATA_MASK_MASK) +#define SET_14_2 case 2: _SET(base,14,2,4_7,mask) +#define GET_14_2 case 2: _GET(base,14,2,4_7) +#else +#define SET_14_2 +#define GET_14_2 +#endif + +#if defined(EIM_EICHD14_WORD3_B8_11DATA_MASK_MASK) +#define SET_14_3 case 3: _SET(base,14,3,8_11,mask) +#define GET_14_3 case 3: _GET(base,14,3,8_11) +#else +#define SET_14_3 +#define GET_14_3 +#endif + +#if defined(EIM_EICHD14_WORD4_B12_15DATA_MASK_MASK) +#define SET_14_4 case 4: _SET(base,14,4,12_15,mask) +#define GET_14_4 case 4: _GET(base,14,4,12_15) +#else +#define SET_14_4 +#define GET_14_4 +#endif + +#if defined(EIM_EICHD14_WORD5_B16_19DATA_MASK_MASK) +#define SET_14_5 case 5: _SET(base,14,5,16_19,mask) +#define GET_14_5 case 5: _GET(base,14,5,16_19) +#else +#define SET_14_5 +#define GET_14_5 +#endif + +#if defined(EIM_EICHD14_WORD6_B20_23DATA_MASK_MASK) +#define SET_14_6 case 6: _SET(base,14,6,20_23,mask) +#define GET_14_6 case 6: _GET(base,14,6,20_23) +#else +#define SET_14_6 +#define GET_14_6 +#endif + +#if defined(EIM_EICHD15_WORD1_B0_3DATA_MASK_MASK) +#define SET_15_1 case 1: _SET(base,15,1,0_3,mask) +#define GET_15_1 case 1: _GET(base,15,1,0_3) +#else +#define SET_15_1 +#define GET_15_1 +#endif + +#if defined(EIM_EICHD15_WORD2_B4_7DATA_MASK_MASK) +#define SET_15_2 case 2: _SET(base,15,2,4_7,mask) +#define GET_15_2 case 2: _GET(base,15,2,4_7) +#else +#define SET_15_2 +#define GET_15_2 +#endif + +#if defined(EIM_EICHD15_WORD3_B8_11DATA_MASK_MASK) +#define SET_15_3 case 3: _SET(base,15,3,8_11,mask) +#define GET_15_3 case 3: _GET(base,15,3,8_11) +#else +#define SET_15_3 +#define GET_15_3 +#endif + +#if defined(EIM_EICHD15_WORD4_B12_15DATA_MASK_MASK) +#define SET_15_4 case 4: _SET(base,15,4,12_15,mask) +#define GET_15_4 case 4: _GET(base,15,4,12_15) +#else +#define SET_15_4 +#define GET_15_4 +#endif + +#if defined(EIM_EICHD15_WORD5_B16_19DATA_MASK_MASK) +#define SET_15_5 case 5: _SET(base,15,5,16_19,mask) +#define GET_15_5 case 5: _GET(base,15,5,16_19) +#else +#define SET_15_5 +#define GET_15_5 +#endif + +#if defined(EIM_EICHD15_WORD6_B20_23DATA_MASK_MASK) +#define SET_15_6 case 6: _SET(base,15,6,20_23,mask) +#define GET_15_6 case 6: _GET(base,15,6,20_23) +#else +#define SET_15_6 +#define GET_15_6 +#endif + +#if defined(EIM_EICHD16_WORD1_B0_3DATA_MASK_MASK) +#define SET_16_1 case 1: _SET(base,16,1,0_3,mask) +#define GET_16_1 case 1: _GET(base,16,1,0_3) +#else +#define SET_16_1 +#define GET_16_1 +#endif + +#if defined(EIM_EICHD16_WORD2_B4_7DATA_MASK_MASK) +#define SET_16_2 case 2: _SET(base,16,2,4_7,mask) +#define GET_16_2 case 2: _GET(base,16,2,4_7) +#else +#define SET_16_2 +#define GET_16_2 +#endif + +#if defined(EIM_EICHD16_WORD3_B8_11DATA_MASK_MASK) +#define SET_16_3 case 3: _SET(base,16,3,8_11,mask) +#define GET_16_3 case 3: _GET(base,16,3,8_11) +#else +#define SET_16_3 +#define GET_16_3 +#endif + +#if defined(EIM_EICHD16_WORD4_B12_15DATA_MASK_MASK) +#define SET_16_4 case 4: _SET(base,16,4,12_15,mask) +#define GET_16_4 case 4: _GET(base,16,4,12_15) +#else +#define SET_16_4 +#define GET_16_4 +#endif + +#if defined(EIM_EICHD16_WORD5_B16_19DATA_MASK_MASK) +#define SET_16_5 case 5: _SET(base,16,5,16_19,mask) +#define GET_16_5 case 5: _GET(base,16,5,16_19) +#else +#define SET_16_5 +#define GET_16_5 +#endif + +#if defined(EIM_EICHD16_WORD6_B20_23DATA_MASK_MASK) +#define SET_16_6 case 6: _SET(base,16,6,20_23,mask) +#define GET_16_6 case 6: _GET(base,16,6,20_23) +#else +#define SET_16_6 +#define GET_16_6 +#endif + +#if defined(EIM_EICHD17_WORD1_B0_3DATA_MASK_MASK) +#define SET_17_1 case 1: _SET(base,17,1,0_3,mask) +#define GET_17_1 case 1: _GET(base,17,1,0_3) +#else +#define SET_17_1 +#define GET_17_1 +#endif + +#if defined(EIM_EICHD17_WORD2_B4_7DATA_MASK_MASK) +#define SET_17_2 case 2: _SET(base,17,2,4_7,mask) +#define GET_17_2 case 2: _GET(base,17,2,4_7) +#else +#define SET_17_2 +#define GET_17_2 +#endif + +#if defined(EIM_EICHD17_WORD3_B8_11DATA_MASK_MASK) +#define SET_17_3 case 3: _SET(base,17,3,8_11,mask) +#define GET_17_3 case 3: _GET(base,17,3,8_11) +#else +#define SET_17_3 +#define GET_17_3 +#endif + +#if defined(EIM_EICHD17_WORD4_B12_15DATA_MASK_MASK) +#define SET_17_4 case 4: _SET(base,17,4,12_15,mask) +#define GET_17_4 case 4: _GET(base,17,4,12_15) +#else +#define SET_17_4 +#define GET_17_4 +#endif + +#if defined(EIM_EICHD17_WORD5_B16_19DATA_MASK_MASK) +#define SET_17_5 case 5: _SET(base,17,5,16_19,mask) +#define GET_17_5 case 5: _GET(base,17,5,16_19) +#else +#define SET_17_5 +#define GET_17_5 +#endif + +#if defined(EIM_EICHD17_WORD6_B20_23DATA_MASK_MASK) +#define SET_17_6 case 6: _SET(base,17,6,20_23,mask) +#define GET_17_6 case 6: _GET(base,17,6,20_23) +#else +#define SET_17_6 +#define GET_17_6 +#endif + +#if defined(EIM_EICHD18_WORD1_B0_3DATA_MASK_MASK) +#define SET_18_1 case 1: _SET(base,18,1,0_3,mask) +#define GET_18_1 case 1: _GET(base,18,1,0_3) +#else +#define SET_18_1 +#define GET_18_1 +#endif + +#if defined(EIM_EICHD18_WORD2_B4_7DATA_MASK_MASK) +#define SET_18_2 case 2: _SET(base,18,2,4_7,mask) +#define GET_18_2 case 2: _GET(base,18,2,4_7) +#else +#define SET_18_2 +#define GET_18_2 +#endif + +#if defined(EIM_EICHD18_WORD3_B8_11DATA_MASK_MASK) +#define SET_18_3 case 3: _SET(base,18,3,8_11,mask) +#define GET_18_3 case 3: _GET(base,18,3,8_11) +#else +#define SET_18_3 +#define GET_18_3 +#endif + +#if defined(EIM_EICHD18_WORD4_B12_15DATA_MASK_MASK) +#define SET_18_4 case 4: _SET(base,18,4,12_15,mask) +#define GET_18_4 case 4: _GET(base,18,4,12_15) +#else +#define SET_18_4 +#define GET_18_4 +#endif + +#if defined(EIM_EICHD18_WORD5_B16_19DATA_MASK_MASK) +#define SET_18_5 case 5: _SET(base,18,5,16_19,mask) +#define GET_18_5 case 5: _GET(base,18,5,16_19) +#else +#define SET_18_5 +#define GET_18_5 +#endif + +#if defined(EIM_EICHD18_WORD6_B20_23DATA_MASK_MASK) +#define SET_18_6 case 6: _SET(base,18,6,20_23,mask) +#define GET_18_6 case 6: _GET(base,18,6,20_23) +#else +#define SET_18_6 +#define GET_18_6 +#endif + +#if defined(EIM_EICHD19_WORD1_B0_3DATA_MASK_MASK) +#define SET_19_1 case 1: _SET(base,19,1,0_3,mask) +#define GET_19_1 case 1: _GET(base,19,1,0_3) +#else +#define SET_19_1 +#define GET_19_1 +#endif + +#if defined(EIM_EICHD19_WORD2_B4_7DATA_MASK_MASK) +#define SET_19_2 case 2: _SET(base,19,2,4_7,mask) +#define GET_19_2 case 2: _GET(base,19,2,4_7) +#else +#define SET_19_2 +#define GET_19_2 +#endif + +#if defined(EIM_EICHD19_WORD3_B8_11DATA_MASK_MASK) +#define SET_19_3 case 3: _SET(base,19,3,8_11,mask) +#define GET_19_3 case 3: _GET(base,19,3,8_11) +#else +#define SET_19_3 +#define GET_19_3 +#endif + +#if defined(EIM_EICHD19_WORD4_B12_15DATA_MASK_MASK) +#define SET_19_4 case 4: _SET(base,19,4,12_15,mask) +#define GET_19_4 case 4: _GET(base,19,4,12_15) +#else +#define SET_19_4 +#define GET_19_4 +#endif + +#if defined(EIM_EICHD19_WORD5_B16_19DATA_MASK_MASK) +#define SET_19_5 case 5: _SET(base,19,5,16_19,mask) +#define GET_19_5 case 5: _GET(base,19,5,16_19) +#else +#define SET_19_5 +#define GET_19_5 +#endif + +#if defined(EIM_EICHD19_WORD6_B20_23DATA_MASK_MASK) +#define SET_19_6 case 6: _SET(base,19,6,20_23,mask) +#define GET_19_6 case 6: _GET(base,19,6,20_23) +#else +#define SET_19_6 +#define GET_19_6 +#endif + +#if defined(EIM_EICHD20_WORD1_B0_3DATA_MASK_MASK) +#define SET_20_1 case 1: _SET(base,20,1,0_3,mask) +#define GET_20_1 case 1: _GET(base,20,1,0_3) +#else +#define SET_20_1 +#define GET_20_1 +#endif + +#if defined(EIM_EICHD20_WORD2_B4_7DATA_MASK_MASK) +#define SET_20_2 case 2: _SET(base,20,2,4_7,mask) +#define GET_20_2 case 2: _GET(base,20,2,4_7) +#else +#define SET_20_2 +#define GET_20_2 +#endif + +#if defined(EIM_EICHD20_WORD3_B8_11DATA_MASK_MASK) +#define SET_20_3 case 3: _SET(base,20,3,8_11,mask) +#define GET_20_3 case 3: _GET(base,20,3,8_11) +#else +#define SET_20_3 +#define GET_20_3 +#endif + +#if defined(EIM_EICHD20_WORD4_B12_15DATA_MASK_MASK) +#define SET_20_4 case 4: _SET(base,20,4,12_15,mask) +#define GET_20_4 case 4: _GET(base,20,4,12_15) +#else +#define SET_20_4 +#define GET_20_4 +#endif + +#if defined(EIM_EICHD20_WORD5_B16_19DATA_MASK_MASK) +#define SET_20_5 case 5: _SET(base,20,5,16_19,mask) +#define GET_20_5 case 5: _GET(base,20,5,16_19) +#else +#define SET_20_5 +#define GET_20_5 +#endif + +#if defined(EIM_EICHD20_WORD6_B20_23DATA_MASK_MASK) +#define SET_20_6 case 6: _SET(base,20,6,20_23,mask) +#define GET_20_6 case 6: _GET(base,20,6,20_23) +#else +#define SET_20_6 +#define GET_20_6 +#endif + +#if defined(EIM_EICHD21_WORD1_B0_3DATA_MASK_MASK) +#define SET_21_1 case 1: _SET(base,21,1,0_3,mask) +#define GET_21_1 case 1: _GET(base,21,1,0_3) +#else +#define SET_21_1 +#define GET_21_1 +#endif + +#if defined(EIM_EICHD21_WORD2_B4_7DATA_MASK_MASK) +#define SET_21_2 case 2: _SET(base,21,2,4_7,mask) +#define GET_21_2 case 2: _GET(base,21,2,4_7) +#else +#define SET_21_2 +#define GET_21_2 +#endif + +#if defined(EIM_EICHD21_WORD3_B8_11DATA_MASK_MASK) +#define SET_21_3 case 3: _SET(base,21,3,8_11,mask) +#define GET_21_3 case 3: _GET(base,21,3,8_11) +#else +#define SET_21_3 +#define GET_21_3 +#endif + +#if defined(EIM_EICHD21_WORD4_B12_15DATA_MASK_MASK) +#define SET_21_4 case 4: _SET(base,21,4,12_15,mask) +#define GET_21_4 case 4: _GET(base,21,4,12_15) +#else +#define SET_21_4 +#define GET_21_4 +#endif + +#if defined(EIM_EICHD21_WORD5_B16_19DATA_MASK_MASK) +#define SET_21_5 case 5: _SET(base,21,5,16_19,mask) +#define GET_21_5 case 5: _GET(base,21,5,16_19) +#else +#define SET_21_5 +#define GET_21_5 +#endif + +#if defined(EIM_EICHD21_WORD6_B20_23DATA_MASK_MASK) +#define SET_21_6 case 6: _SET(base,21,6,20_23,mask) +#define GET_21_6 case 6: _GET(base,21,6,20_23) +#else +#define SET_21_6 +#define GET_21_6 +#endif + +#if defined(EIM_EICHD22_WORD1_B0_3DATA_MASK_MASK) +#define SET_22_1 case 1: _SET(base,22,1,0_3,mask) +#define GET_22_1 case 1: _GET(base,22,1,0_3) +#else +#define SET_22_1 +#define GET_22_1 +#endif + +#if defined(EIM_EICHD22_WORD2_B4_7DATA_MASK_MASK) +#define SET_22_2 case 2: _SET(base,22,2,4_7,mask) +#define GET_22_2 case 2: _GET(base,22,2,4_7) +#else +#define SET_22_2 +#define GET_22_2 +#endif + +#if defined(EIM_EICHD22_WORD3_B8_11DATA_MASK_MASK) +#define SET_22_3 case 3: _SET(base,22,3,8_11,mask) +#define GET_22_3 case 3: _GET(base,22,3,8_11) +#else +#define SET_22_3 +#define GET_22_3 +#endif + +#if defined(EIM_EICHD22_WORD4_B12_15DATA_MASK_MASK) +#define SET_22_4 case 4: _SET(base,22,4,12_15,mask) +#define GET_22_4 case 4: _GET(base,22,4,12_15) +#else +#define SET_22_4 +#define GET_22_4 +#endif + +#if defined(EIM_EICHD22_WORD5_B16_19DATA_MASK_MASK) +#define SET_22_5 case 5: _SET(base,22,5,16_19,mask) +#define GET_22_5 case 5: _GET(base,22,5,16_19) +#else +#define SET_22_5 +#define GET_22_5 +#endif + +#if defined(EIM_EICHD22_WORD6_B20_23DATA_MASK_MASK) +#define SET_22_6 case 6: _SET(base,22,6,20_23,mask) +#define GET_22_6 case 6: _GET(base,22,6,20_23) +#else +#define SET_22_6 +#define GET_22_6 +#endif + +#if defined(EIM_EICHD23_WORD1_B0_3DATA_MASK_MASK) +#define SET_23_1 case 1: _SET(base,23,1,0_3,mask) +#define GET_23_1 case 1: _GET(base,23,1,0_3) +#else +#define SET_23_1 +#define GET_23_1 +#endif + +#if defined(EIM_EICHD23_WORD2_B4_7DATA_MASK_MASK) +#define SET_23_2 case 2: _SET(base,23,2,4_7,mask) +#define GET_23_2 case 2: _GET(base,23,2,4_7) +#else +#define SET_23_2 +#define GET_23_2 +#endif + +#if defined(EIM_EICHD23_WORD3_B8_11DATA_MASK_MASK) +#define SET_23_3 case 3: _SET(base,23,3,8_11,mask) +#define GET_23_3 case 3: _GET(base,23,3,8_11) +#else +#define SET_23_3 +#define GET_23_3 +#endif + +#if defined(EIM_EICHD23_WORD4_B12_15DATA_MASK_MASK) +#define SET_23_4 case 4: _SET(base,23,4,12_15,mask) +#define GET_23_4 case 4: _GET(base,23,4,12_15) +#else +#define SET_23_4 +#define GET_23_4 +#endif + +#if defined(EIM_EICHD23_WORD5_B16_19DATA_MASK_MASK) +#define SET_23_5 case 5: _SET(base,23,5,16_19,mask) +#define GET_23_5 case 5: _GET(base,23,5,16_19) +#else +#define SET_23_5 +#define GET_23_5 +#endif + +#if defined(EIM_EICHD23_WORD6_B20_23DATA_MASK_MASK) +#define SET_23_6 case 6: _SET(base,23,6,20_23,mask) +#define GET_23_6 case 6: _GET(base,23,6,20_23) +#else +#define SET_23_6 +#define GET_23_6 +#endif + +#if defined(EIM_EICHD24_WORD1_B0_3DATA_MASK_MASK) +#define SET_24_1 case 1: _SET(base,24,1,0_3,mask) +#define GET_24_1 case 1: _GET(base,24,1,0_3) +#else +#define SET_24_1 +#define GET_24_1 +#endif + +#if defined(EIM_EICHD24_WORD2_B4_7DATA_MASK_MASK) +#define SET_24_2 case 2: _SET(base,24,2,4_7,mask) +#define GET_24_2 case 2: _GET(base,24,2,4_7) +#else +#define SET_24_2 +#define GET_24_2 +#endif + +#if defined(EIM_EICHD24_WORD3_B8_11DATA_MASK_MASK) +#define SET_24_3 case 3: _SET(base,24,3,8_11,mask) +#define GET_24_3 case 3: _GET(base,24,3,8_11) +#else +#define SET_24_3 +#define GET_24_3 +#endif + +#if defined(EIM_EICHD24_WORD4_B12_15DATA_MASK_MASK) +#define SET_24_4 case 4: _SET(base,24,4,12_15,mask) +#define GET_24_4 case 4: _GET(base,24,4,12_15) +#else +#define SET_24_4 +#define GET_24_4 +#endif + +#if defined(EIM_EICHD24_WORD5_B16_19DATA_MASK_MASK) +#define SET_24_5 case 5: _SET(base,24,5,16_19,mask) +#define GET_24_5 case 5: _GET(base,24,5,16_19) +#else +#define SET_24_5 +#define GET_24_5 +#endif + +#if defined(EIM_EICHD24_WORD6_B20_23DATA_MASK_MASK) +#define SET_24_6 case 6: _SET(base,24,6,20_23,mask) +#define GET_24_6 case 6: _GET(base,24,6,20_23) +#else +#define SET_24_6 +#define GET_24_6 +#endif + +#if defined(EIM_EICHD25_WORD1_B0_3DATA_MASK_MASK) +#define SET_25_1 case 1: _SET(base,25,1,0_3,mask) +#define GET_25_1 case 1: _GET(base,25,1,0_3) +#else +#define SET_25_1 +#define GET_25_1 +#endif + +#if defined(EIM_EICHD25_WORD2_B4_7DATA_MASK_MASK) +#define SET_25_2 case 2: _SET(base,25,2,4_7,mask) +#define GET_25_2 case 2: _GET(base,25,2,4_7) +#else +#define SET_25_2 +#define GET_25_2 +#endif + +#if defined(EIM_EICHD25_WORD3_B8_11DATA_MASK_MASK) +#define SET_25_3 case 3: _SET(base,25,3,8_11,mask) +#define GET_25_3 case 3: _GET(base,25,3,8_11) +#else +#define SET_25_3 +#define GET_25_3 +#endif + +#if defined(EIM_EICHD25_WORD4_B12_15DATA_MASK_MASK) +#define SET_25_4 case 4: _SET(base,25,4,12_15,mask) +#define GET_25_4 case 4: _GET(base,25,4,12_15) +#else +#define SET_25_4 +#define GET_25_4 +#endif + +#if defined(EIM_EICHD25_WORD5_B16_19DATA_MASK_MASK) +#define SET_25_5 case 5: _SET(base,25,5,16_19,mask) +#define GET_25_5 case 5: _GET(base,25,5,16_19) +#else +#define SET_25_5 +#define GET_25_5 +#endif + +#if defined(EIM_EICHD25_WORD6_B20_23DATA_MASK_MASK) +#define SET_25_6 case 6: _SET(base,25,6,20_23,mask) +#define GET_25_6 case 6: _GET(base,25,6,20_23) +#else +#define SET_25_6 +#define GET_25_6 +#endif + +#if defined(EIM_EICHD26_WORD1_B0_3DATA_MASK_MASK) +#define SET_26_1 case 1: _SET(base,26,1,0_3,mask) +#define GET_26_1 case 1: _GET(base,26,1,0_3) +#else +#define SET_26_1 +#define GET_26_1 +#endif + +#if defined(EIM_EICHD26_WORD2_B4_7DATA_MASK_MASK) +#define SET_26_2 case 2: _SET(base,26,2,4_7,mask) +#define GET_26_2 case 2: _GET(base,26,2,4_7) +#else +#define SET_26_2 +#define GET_26_2 +#endif + +#if defined(EIM_EICHD26_WORD3_B8_11DATA_MASK_MASK) +#define SET_26_3 case 3: _SET(base,26,3,8_11,mask) +#define GET_26_3 case 3: _GET(base,26,3,8_11) +#else +#define SET_26_3 +#define GET_26_3 +#endif + +#if defined(EIM_EICHD26_WORD4_B12_15DATA_MASK_MASK) +#define SET_26_4 case 4: _SET(base,26,4,12_15,mask) +#define GET_26_4 case 4: _GET(base,26,4,12_15) +#else +#define SET_26_4 +#define GET_26_4 +#endif + +#if defined(EIM_EICHD26_WORD5_B16_19DATA_MASK_MASK) +#define SET_26_5 case 5: _SET(base,26,5,16_19,mask) +#define GET_26_5 case 5: _GET(base,26,5,16_19) +#else +#define SET_26_5 +#define GET_26_5 +#endif + +#if defined(EIM_EICHD26_WORD6_B20_23DATA_MASK_MASK) +#define SET_26_6 case 6: _SET(base,26,6,20_23,mask) +#define GET_26_6 case 6: _GET(base,26,6,20_23) +#else +#define SET_26_6 +#define GET_26_6 +#endif + +#if defined(EIM_EICHD27_WORD1_B0_3DATA_MASK_MASK) +#define SET_27_1 case 1: _SET(base,27,1,0_3,mask) +#define GET_27_1 case 1: _GET(base,27,1,0_3) +#else +#define SET_27_1 +#define GET_27_1 +#endif + +#if defined(EIM_EICHD27_WORD2_B4_7DATA_MASK_MASK) +#define SET_27_2 case 2: _SET(base,27,2,4_7,mask) +#define GET_27_2 case 2: _GET(base,27,2,4_7) +#else +#define SET_27_2 +#define GET_27_2 +#endif + +#if defined(EIM_EICHD27_WORD3_B8_11DATA_MASK_MASK) +#define SET_27_3 case 3: _SET(base,27,3,8_11,mask) +#define GET_27_3 case 3: _GET(base,27,3,8_11) +#else +#define SET_27_3 +#define GET_27_3 +#endif + +#if defined(EIM_EICHD27_WORD4_B12_15DATA_MASK_MASK) +#define SET_27_4 case 4: _SET(base,27,4,12_15,mask) +#define GET_27_4 case 4: _GET(base,27,4,12_15) +#else +#define SET_27_4 +#define GET_27_4 +#endif + +#if defined(EIM_EICHD27_WORD5_B16_19DATA_MASK_MASK) +#define SET_27_5 case 5: _SET(base,27,5,16_19,mask) +#define GET_27_5 case 5: _GET(base,27,5,16_19) +#else +#define SET_27_5 +#define GET_27_5 +#endif + +#if defined(EIM_EICHD27_WORD6_B20_23DATA_MASK_MASK) +#define SET_27_6 case 6: _SET(base,27,6,20_23,mask) +#define GET_27_6 case 6: _GET(base,27,6,20_23) +#else +#define SET_27_6 +#define GET_27_6 +#endif + +#if defined(EIM_EICHD28_WORD1_B0_3DATA_MASK_MASK) +#define SET_28_1 case 1: _SET(base,28,1,0_3,mask) +#define GET_28_1 case 1: _GET(base,28,1,0_3) +#else +#define SET_28_1 +#define GET_28_1 +#endif + +#if defined(EIM_EICHD28_WORD2_B4_7DATA_MASK_MASK) +#define SET_28_2 case 2: _SET(base,28,2,4_7,mask) +#define GET_28_2 case 2: _GET(base,28,2,4_7) +#else +#define SET_28_2 +#define GET_28_2 +#endif + +#if defined(EIM_EICHD28_WORD3_B8_11DATA_MASK_MASK) +#define SET_28_3 case 3: _SET(base,28,3,8_11,mask) +#define GET_28_3 case 3: _GET(base,28,3,8_11) +#else +#define SET_28_3 +#define GET_28_3 +#endif + +#if defined(EIM_EICHD28_WORD4_B12_15DATA_MASK_MASK) +#define SET_28_4 case 4: _SET(base,28,4,12_15,mask) +#define GET_28_4 case 4: _GET(base,28,4,12_15) +#else +#define SET_28_4 +#define GET_28_4 +#endif + +#if defined(EIM_EICHD28_WORD5_B16_19DATA_MASK_MASK) +#define SET_28_5 case 5: _SET(base,28,5,16_19,mask) +#define GET_28_5 case 5: _GET(base,28,5,16_19) +#else +#define SET_28_5 +#define GET_28_5 +#endif + +#if defined(EIM_EICHD28_WORD6_B20_23DATA_MASK_MASK) +#define SET_28_6 case 6: _SET(base,28,6,20_23,mask) +#define GET_28_6 case 6: _GET(base,28,6,20_23) +#else +#define SET_28_6 +#define GET_28_6 +#endif + +#if defined(EIM_EICHD29_WORD1_B0_3DATA_MASK_MASK) +#define SET_29_1 case 1: _SET(base,29,1,0_3,mask) +#define GET_29_1 case 1: _GET(base,29,1,0_3) +#else +#define SET_29_1 +#define GET_29_1 +#endif + +#if defined(EIM_EICHD29_WORD2_B4_7DATA_MASK_MASK) +#define SET_29_2 case 2: _SET(base,29,2,4_7,mask) +#define GET_29_2 case 2: _GET(base,29,2,4_7) +#else +#define SET_29_2 +#define GET_29_2 +#endif + +#if defined(EIM_EICHD29_WORD3_B8_11DATA_MASK_MASK) +#define SET_29_3 case 3: _SET(base,29,3,8_11,mask) +#define GET_29_3 case 3: _GET(base,29,3,8_11) +#else +#define SET_29_3 +#define GET_29_3 +#endif + +#if defined(EIM_EICHD29_WORD4_B12_15DATA_MASK_MASK) +#define SET_29_4 case 4: _SET(base,29,4,12_15,mask) +#define GET_29_4 case 4: _GET(base,29,4,12_15) +#else +#define SET_29_4 +#define GET_29_4 +#endif + +#if defined(EIM_EICHD29_WORD5_B16_19DATA_MASK_MASK) +#define SET_29_5 case 5: _SET(base,29,5,16_19,mask) +#define GET_29_5 case 5: _GET(base,29,5,16_19) +#else +#define SET_29_5 +#define GET_29_5 +#endif + +#if defined(EIM_EICHD29_WORD6_B20_23DATA_MASK_MASK) +#define SET_29_6 case 6: _SET(base,29,6,20_23,mask) +#define GET_29_6 case 6: _GET(base,29,6,20_23) +#else +#define SET_29_6 +#define GET_29_6 +#endif + +#if defined(EIM_EICHD30_WORD1_B0_3DATA_MASK_MASK) +#define SET_30_1 case 1: _SET(base,30,1,0_3,mask) +#define GET_30_1 case 1: _GET(base,30,1,0_3) +#else +#define SET_30_1 +#define GET_30_1 +#endif + +#if defined(EIM_EICHD30_WORD2_B4_7DATA_MASK_MASK) +#define SET_30_2 case 2: _SET(base,30,2,4_7,mask) +#define GET_30_2 case 2: _GET(base,30,2,4_7) +#else +#define SET_30_2 +#define GET_30_2 +#endif + +#if defined(EIM_EICHD30_WORD3_B8_11DATA_MASK_MASK) +#define SET_30_3 case 3: _SET(base,30,3,8_11,mask) +#define GET_30_3 case 3: _GET(base,30,3,8_11) +#else +#define SET_30_3 +#define GET_30_3 +#endif + +#if defined(EIM_EICHD30_WORD4_B12_15DATA_MASK_MASK) +#define SET_30_4 case 4: _SET(base,30,4,12_15,mask) +#define GET_30_4 case 4: _GET(base,30,4,12_15) +#else +#define SET_30_4 +#define GET_30_4 +#endif + +#if defined(EIM_EICHD30_WORD5_B16_19DATA_MASK_MASK) +#define SET_30_5 case 5: _SET(base,30,5,16_19,mask) +#define GET_30_5 case 5: _GET(base,30,5,16_19) +#else +#define SET_30_5 +#define GET_30_5 +#endif + +#if defined(EIM_EICHD30_WORD6_B20_23DATA_MASK_MASK) +#define SET_30_6 case 6: _SET(base,30,6,20_23,mask) +#define GET_30_6 case 6: _GET(base,30,6,20_23) +#else +#define SET_30_6 +#define GET_30_6 +#endif + +#endif diff --git a/mcux/mcux-sdk-ng/drivers/eim/fsl_eim.c b/mcux/mcux-sdk-ng/drivers/eim/fsl_eim.c index 561fbe758f..a0535755c2 100644 --- a/mcux/mcux-sdk-ng/drivers/eim/fsl_eim.c +++ b/mcux/mcux-sdk-ng/drivers/eim/fsl_eim.c @@ -32,8 +32,8 @@ static const clock_ip_name_t s_eimClocks[] = EIM_CLOCKS; #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */ #if defined(EIM_RSTS_N) -/*! @brief Pointers to EIM clocks for each instance. */ -static const clock_ip_name_t s_eimResets[] = EIM_RSTS_N; +/*! @brief Pointers to EIM resets for each instance. */ +static const reset_ip_name_t s_eimResets[] = EIM_RSTS_N; #endif /******************************************************************************* * Code @@ -41,9 +41,10 @@ static const clock_ip_name_t s_eimResets[] = EIM_RSTS_N; static uint32_t EIM_GetInstance(EIM_Type *base) { uint32_t instance; + uint32_t eim_cnt = ARRAY_SIZE(s_eimBases); /* Find the instance index from base address mappings. */ - for (instance = 0; instance < ARRAY_SIZE(s_eimBases); instance++) + for (instance = 0; instance < eim_cnt; instance++) { if (MSDK_REG_SECURE_ADDR(s_eimBases[instance]) == MSDK_REG_SECURE_ADDR(base)) { @@ -51,7 +52,7 @@ static uint32_t EIM_GetInstance(EIM_Type *base) } } - assert(instance < ARRAY_SIZE(s_eimBases)); + assert(instance < eim_cnt); return instance; } @@ -65,7 +66,7 @@ void EIM_Init(EIM_Type *base) { #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) /* Ungate EIM clock. */ - CLOCK_EnableClock(s_eimClocks[EIM_GetInstance(base)]); + (void)CLOCK_EnableClock(s_eimClocks[EIM_GetInstance(base)]); #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */ #if defined(EIM_RSTS_N) /* Reset the EIM module */ @@ -83,235 +84,475 @@ void EIM_Deinit(EIM_Type *base) { #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) /* Ungate EIM clock. */ - CLOCK_DisableClock(s_eimClocks[EIM_GetInstance(base)]); + (void)CLOCK_DisableClock(s_eimClocks[EIM_GetInstance(base)]); #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */ } -void EIM_InjectCheckBitError(EIM_Type *base, eim_memory_channel_t channel, uint8_t mask) +void EIM_InjectCheckBitError(EIM_Type *base, uint32_t channel, uint32_t mask) { - switch ((uint8_t)channel) + switch (channel) { case 0U: base->EICHD0_WORD0 = EIM_EICHD0_WORD0_CHKBIT_MASK(mask); break; -#ifdef EIM_EICHEN_EICH1EN_MASK +#ifdef EIM_EICHD1_WORD0_CHKBIT_MASK_MASK case 1U: base->EICHD1_WORD0 = EIM_EICHD1_WORD0_CHKBIT_MASK(mask); break; #endif - -#ifdef EIM_EICHEN_EICH2EN_MASK +#ifdef EIM_EICHD2_WORD0_CHKBIT_MASK_MASK case 2U: base->EICHD2_WORD0 = EIM_EICHD2_WORD0_CHKBIT_MASK(mask); break; #endif -#ifdef EIM_EICHEN_EICH3EN_MASK +#ifdef EIM_EICHD3_WORD0_CHKBIT_MASK_MASK case 3U: base->EICHD3_WORD0 = EIM_EICHD3_WORD0_CHKBIT_MASK(mask); break; #endif -#ifdef EIM_EICHEN_EICH4EN_MASK +#ifdef EIM_EICHD4_WORD0_CHKBIT_MASK_MASK case 4U: base->EICHD4_WORD0 = EIM_EICHD4_WORD0_CHKBIT_MASK(mask); break; #endif -#ifdef EIM_EICHEN_EICH5EN_MASK +#ifdef EIM_EICHD5_WORD0_CHKBIT_MASK_MASK case 5U: base->EICHD5_WORD0 = EIM_EICHD5_WORD0_CHKBIT_MASK(mask); break; #endif -#ifdef EIM_EICHEN_EICH6EN_MASK +#ifdef EIM_EICHD6_WORD0_CHKBIT_MASK_MASK case 6U: base->EICHD6_WORD0 = EIM_EICHD6_WORD0_CHKBIT_MASK(mask); break; #endif -#ifdef EIM_EICHEN_EICH7EN_MASK +#ifdef EIM_EICHD7_WORD0_CHKBIT_MASK_MASK case 7U: base->EICHD7_WORD0 = EIM_EICHD7_WORD0_CHKBIT_MASK(mask); break; #endif -#ifdef EIM_EICHEN_EICH8EN_MASK +#ifdef EIM_EICHD8_WORD0_CHKBIT_MASK_MASK case 8U: base->EICHD8_WORD0 = EIM_EICHD8_WORD0_CHKBIT_MASK(mask); break; +#endif +#ifdef EIM_EICHD9_WORD0_CHKBIT_MASK_MASK + case 9U: + base->EICHD9_WORD0 = EIM_EICHD9_WORD0_CHKBIT_MASK(mask); + break; +#endif +#ifdef EIM_EICHD10_WORD0_CHKBIT_MASK_MASK + case 10U: + base->EICHD10_WORD0 = EIM_EICHD10_WORD0_CHKBIT_MASK(mask); + break; +#endif +#ifdef EIM_EICHD11_WORD0_CHKBIT_MASK_MASK + case 11U: + base->EICHD11_WORD0 = EIM_EICHD11_WORD0_CHKBIT_MASK(mask); + break; +#endif +#ifdef EIM_EICHD12_WORD0_CHKBIT_MASK_MASK + case 12U: + base->EICHD12_WORD0 = EIM_EICHD12_WORD0_CHKBIT_MASK(mask); + break; +#endif +#ifdef EIM_EICHD13_WORD0_CHKBIT_MASK_MASK + case 13U: + base->EICHD13_WORD0 = EIM_EICHD13_WORD0_CHKBIT_MASK(mask); + break; +#endif +#ifdef EIM_EICHD14_WORD0_CHKBIT_MASK_MASK + case 14U: + base->EICHD14_WORD0 = EIM_EICHD14_WORD0_CHKBIT_MASK(mask); + break; +#endif +#ifdef EIM_EICHD15_WORD0_CHKBIT_MASK_MASK + case 15U: + base->EICHD15_WORD0 = EIM_EICHD15_WORD0_CHKBIT_MASK(mask); + break; +#endif +#ifdef EIM_EICHD16_WORD0_CHKBIT_MASK_MASK + case 16U: + base->EICHD16_WORD0 = EIM_EICHD16_WORD0_CHKBIT_MASK(mask); + break; +#endif +#ifdef EIM_EICHD17_WORD0_CHKBIT_MASK_MASK + case 17U: + base->EICHD17_WORD0 = EIM_EICHD17_WORD0_CHKBIT_MASK(mask); + break; +#endif +#ifdef EIM_EICHD18_WORD0_CHKBIT_MASK_MASK + case 18U: + base->EICHD18_WORD0 = EIM_EICHD18_WORD0_CHKBIT_MASK(mask); + break; #endif default: - assert(NULL); + assert(false); break; } } -uint8_t EIM_GetCheckBitMask(EIM_Type *base, eim_memory_channel_t channel) +uint32_t EIM_GetCheckBitMask(EIM_Type *base, uint32_t channel) { - uint8_t mask = 0x00U; + uint32_t mask = 0x00000000U; - switch ((uint8_t)channel) + switch (channel) { case 0U: - mask = (uint8_t)((base->EICHD0_WORD0 & EIM_EICHD0_WORD0_CHKBIT_MASK_MASK) >> - EIM_EICHD0_WORD0_CHKBIT_MASK_SHIFT); + mask = (uint32_t)((base->EICHD0_WORD0 & EIM_EICHD0_WORD0_CHKBIT_MASK_MASK) >> + EIM_EICHD0_WORD0_CHKBIT_MASK_SHIFT); break; -#ifdef EIM_EICHEN_EICH1EN_MASK +#ifdef EIM_EICHD1_WORD0_CHKBIT_MASK_MASK case 1U: - mask = (uint8_t)((base->EICHD1_WORD0 & EIM_EICHD1_WORD0_CHKBIT_MASK_MASK) >> - EIM_EICHD1_WORD0_CHKBIT_MASK_SHIFT); + mask = (uint32_t)((base->EICHD1_WORD0 & EIM_EICHD1_WORD0_CHKBIT_MASK_MASK) >> + EIM_EICHD1_WORD0_CHKBIT_MASK_SHIFT); break; #endif -#ifdef EIM_EICHEN_EICH2EN_MASK +#ifdef EIM_EICHD2_WORD0_CHKBIT_MASK_MASK case 2U: - mask = (uint8_t)((base->EICHD2_WORD0 & EIM_EICHD2_WORD0_CHKBIT_MASK_MASK) >> - EIM_EICHD2_WORD0_CHKBIT_MASK_SHIFT); + mask = (uint32_t)((base->EICHD2_WORD0 & EIM_EICHD2_WORD0_CHKBIT_MASK_MASK) >> + EIM_EICHD2_WORD0_CHKBIT_MASK_SHIFT); break; #endif -#ifdef EIM_EICHEN_EICH3EN_MASK +#ifdef EIM_EICHD3_WORD0_CHKBIT_MASK_MASK case 3U: - mask = (uint8_t)((base->EICHD3_WORD0 & EIM_EICHD3_WORD0_CHKBIT_MASK_MASK) >> - EIM_EICHD3_WORD0_CHKBIT_MASK_SHIFT); + mask = (uint32_t)((base->EICHD3_WORD0 & EIM_EICHD3_WORD0_CHKBIT_MASK_MASK) >> + EIM_EICHD3_WORD0_CHKBIT_MASK_SHIFT); break; #endif -#ifdef EIM_EICHEN_EICH4EN_MASK +#ifdef EIM_EICHD4_WORD0_CHKBIT_MASK_MASK case 4U: - mask = (uint8_t)((base->EICHD4_WORD0 & EIM_EICHD4_WORD0_CHKBIT_MASK_MASK) >> - EIM_EICHD4_WORD0_CHKBIT_MASK_SHIFT); + mask = (uint32_t)((base->EICHD4_WORD0 & EIM_EICHD4_WORD0_CHKBIT_MASK_MASK) >> + EIM_EICHD4_WORD0_CHKBIT_MASK_SHIFT); break; #endif -#ifdef EIM_EICHEN_EICH5EN_MASK +#ifdef EIM_EICHD5_WORD0_CHKBIT_MASK_MASK case 5U: - mask = (uint8_t)((base->EICHD5_WORD0 & EIM_EICHD5_WORD0_CHKBIT_MASK_MASK) >> - EIM_EICHD5_WORD0_CHKBIT_MASK_SHIFT); + mask = (uint32_t)((base->EICHD5_WORD0 & EIM_EICHD5_WORD0_CHKBIT_MASK_MASK) >> + EIM_EICHD5_WORD0_CHKBIT_MASK_SHIFT); break; #endif -#ifdef EIM_EICHEN_EICH6EN_MASK +#ifdef EIM_EICHD6_WORD0_CHKBIT_MASK_MASK case 6U: - mask = (uint8_t)((base->EICHD6_WORD0 & EIM_EICHD6_WORD0_CHKBIT_MASK_MASK) >> - EIM_EICHD6_WORD0_CHKBIT_MASK_SHIFT); + mask = (uint32_t)((base->EICHD6_WORD0 & EIM_EICHD6_WORD0_CHKBIT_MASK_MASK) >> + EIM_EICHD6_WORD0_CHKBIT_MASK_SHIFT); break; #endif -#ifdef EIM_EICHEN_EICH7EN_MASK +#ifdef EIM_EICHD7_WORD0_CHKBIT_MASK_MASK case 7U: - mask = (uint8_t)((base->EICHD7_WORD0 & EIM_EICHD7_WORD0_CHKBIT_MASK_MASK) >> - EIM_EICHD7_WORD0_CHKBIT_MASK_SHIFT); + mask = (uint32_t)((base->EICHD7_WORD0 & EIM_EICHD7_WORD0_CHKBIT_MASK_MASK) >> + EIM_EICHD7_WORD0_CHKBIT_MASK_SHIFT); break; #endif -#ifdef EIM_EICHEN_EICH8EN_MASK +#ifdef EIM_EICHD8_WORD0_CHKBIT_MASK_MASK case 8U: - mask = (uint8_t)((base->EICHD8_WORD0 & EIM_EICHD8_WORD0_CHKBIT_MASK_MASK) >> - EIM_EICHD8_WORD0_CHKBIT_MASK_SHIFT); + mask = (uint32_t)((base->EICHD8_WORD0 & EIM_EICHD8_WORD0_CHKBIT_MASK_MASK) >> + EIM_EICHD8_WORD0_CHKBIT_MASK_SHIFT); break; #endif - default: - assert(NULL); +#ifdef EIM_EICHD9_WORD0_CHKBIT_MASK_MASK + case 9U: + mask = (uint32_t)((base->EICHD9_WORD0 & EIM_EICHD9_WORD0_CHKBIT_MASK_MASK) >> + EIM_EICHD9_WORD0_CHKBIT_MASK_SHIFT); break; - } - - return mask; -} - -void EIM_InjectDataBitError(EIM_Type *base, eim_memory_channel_t channel, uint8_t mask) -{ - switch ((uint8_t)channel) - { - case 0U: - base->EICHD0_WORD1 = mask; +#endif +#ifdef EIM_EICHD10_WORD0_CHKBIT_MASK_MASK + case 10U: + mask = (uint32_t)((base->EICHD10_WORD0 & EIM_EICHD10_WORD0_CHKBIT_MASK_MASK) >> + EIM_EICHD10_WORD0_CHKBIT_MASK_SHIFT); break; -#ifdef EIM_EICHEN_EICH1EN_MASK - case 1U: - base->EICHD1_WORD1 = mask; +#endif +#ifdef EIM_EICHD11_WORD0_CHKBIT_MASK_MASK + case 11U: + mask = (uint32_t)((base->EICHD11_WORD0 & EIM_EICHD11_WORD0_CHKBIT_MASK_MASK) >> + EIM_EICHD11_WORD0_CHKBIT_MASK_SHIFT); break; #endif -#ifdef EIM_EICHEN_EICH2EN_MASK - case 2U: - base->EICHD2_WORD1 = mask; +#ifdef EIM_EICHD12_WORD0_CHKBIT_MASK_MASK + case 12U: + mask = (uint32_t)((base->EICHD12_WORD0 & EIM_EICHD12_WORD0_CHKBIT_MASK_MASK) >> + EIM_EICHD12_WORD0_CHKBIT_MASK_SHIFT); break; #endif -#ifdef EIM_EICHEN_EICH3EN_MASK - case kEIM_MemoryChannelRAMC: - base->EICHD3_WORD1 = mask; +#ifdef EIM_EICHD13_WORD0_CHKBIT_MASK_MASK + case 13U: + mask = (uint32_t)((base->EICHD13_WORD0 & EIM_EICHD13_WORD0_CHKBIT_MASK_MASK) >> + EIM_EICHD13_WORD0_CHKBIT_MASK_SHIFT); break; #endif -#ifdef EIM_EICHEN_EICH4EN_MASK - case kEIM_MemoryChannelRAMD: - base->EICHD4_WORD1 = mask; +#ifdef EIM_EICHD14_WORD0_CHKBIT_MASK_MASK + case 14U: + mask = (uint32_t)((base->EICHD14_WORD0 & EIM_EICHD14_WORD0_CHKBIT_MASK_MASK) >> + EIM_EICHD14_WORD0_CHKBIT_MASK_SHIFT); break; #endif -#ifdef EIM_EICHEN_EICH5EN_MASK - case kEIM_MemoryChannelRAME: - base->EICHD5_WORD1 = mask; +#ifdef EIM_EICHD15_WORD0_CHKBIT_MASK_MASK + case 15U: + mask = (uint32_t)((base->EICHD15_WORD0 & EIM_EICHD15_WORD0_CHKBIT_MASK_MASK) >> + EIM_EICHD15_WORD0_CHKBIT_MASK_SHIFT); break; #endif -#ifdef EIM_EICHEN_EICH6EN_MASK - case kEIM_MemoryChannelRAMF: - base->EICHD6_WORD1 = mask; +#ifdef EIM_EICHD16_WORD0_CHKBIT_MASK_MASK + case 16U: + mask = (uint32_t)((base->EICHD16_WORD0 & EIM_EICHD16_WORD0_CHKBIT_MASK_MASK) >> + EIM_EICHD16_WORD0_CHKBIT_MASK_SHIFT); break; #endif -#ifdef EIM_EICHEN_EICH7EN_MASK - case kEIM_MemoryChannelLPCACRAM: - base->EICHD7_WORD1 = mask; +#ifdef EIM_EICHD17_WORD0_CHKBIT_MASK_MASK + case 17U: + mask = (uint32_t)((base->EICHD17_WORD0 & EIM_EICHD17_WORD0_CHKBIT_MASK_MASK) >> + EIM_EICHD17_WORD0_CHKBIT_MASK_SHIFT); break; #endif -#ifdef EIM_EICHEN_EICH8EN_MASK - case kEIM_MemoryChannelPKCRAM: - base->EICHD8_WORD1 = mask; +#ifdef EIM_EICHD18_WORD0_CHKBIT_MASK_MASK + case 18U: + mask = (uint32_t)((base->EICHD18_WORD0 & EIM_EICHD18_WORD0_CHKBIT_MASK_MASK) >> + EIM_EICHD18_WORD0_CHKBIT_MASK_SHIFT); break; #endif default: - assert(NULL); + assert(false); break; } + + return mask; } -uint32_t EIM_GetDataBitMask(EIM_Type *base, eim_memory_channel_t channel) +void EIM_InjectDataBitError(EIM_Type *base, uint32_t channel, uint32_t mask) { - uint32_t mask = 0x00U; + EIM_InjectDataWordBitError(base, channel, mask, 1U); +} - switch ((uint8_t)channel) +uint32_t EIM_GetDataBitMask(EIM_Type *base, uint32_t channel) +{ + return EIM_GetDataWordBitMask(base, channel, 1U); +} + +/* EIM channel may have 8 words, currently the maximum support is 6. */ +#define INJECT_CHANNEL(ch) \ + switch(word) { \ + SET_##ch##_1 \ + SET_##ch##_2 \ + SET_##ch##_3 \ + SET_##ch##_4 \ + SET_##ch##_5 \ + SET_##ch##_6 \ + default: assert(false); break; \ + } \ + break; + +void EIM_InjectDataWordBitError(EIM_Type *base, uint32_t channel, uint32_t mask, uint32_t word) +{ + switch (channel) { - case 0U: - mask = (base->EICHD0_WORD1 & EIM_EICHD0_WORD1_B0_3DATA_MASK_MASK) >> EIM_EICHD0_WORD1_B0_3DATA_MASK_SHIFT; + case(0): { INJECT_CHANNEL(0) } +#ifdef EIM_EICHD1_WORD1_B0_3DATA_MASK_MASK + case(1): { INJECT_CHANNEL(1) } +#endif +#ifdef EIM_EICHD2_WORD1_B0_3DATA_MASK_MASK + case(2): { INJECT_CHANNEL(2) } +#endif +#ifdef EIM_EICHD3_WORD1_B0_3DATA_MASK_MASK + case(3): { INJECT_CHANNEL(3) } +#endif +#ifdef EIM_EICHD4_WORD1_B0_3DATA_MASK_MASK + case(4): { INJECT_CHANNEL(4) } +#endif +#ifdef EIM_EICHD5_WORD1_B0_3DATA_MASK_MASK + case(5): { INJECT_CHANNEL(5) } +#endif +#ifdef EIM_EICHD6_WORD1_B0_3DATA_MASK_MASK + case(6): { INJECT_CHANNEL(6) } +#endif +#ifdef EIM_EICHD7_WORD1_B0_3DATA_MASK_MASK + case(7): { INJECT_CHANNEL(7) } +#endif +#ifdef EIM_EICHD8_WORD1_B0_3DATA_MASK_MASK + case(8): { INJECT_CHANNEL(8) } +#endif +#ifdef EIM_EICHD9_WORD1_B0_3DATA_MASK_MASK + case(9): { INJECT_CHANNEL(9) } +#endif +#ifdef EIM_EICHD10_WORD1_B0_3DATA_MASK_MASK + case(10): { INJECT_CHANNEL(10) } +#endif +#ifdef EIM_EICHD11_WORD1_B0_3DATA_MASK_MASK + case(11): { INJECT_CHANNEL(11) } +#endif +#ifdef EIM_EICHD12_WORD1_B0_3DATA_MASK_MASK + case(12): { INJECT_CHANNEL(12) } +#endif +#ifdef EIM_EICHD13_WORD1_B0_3DATA_MASK_MASK + case(13): { INJECT_CHANNEL(13) } +#endif +#ifdef EIM_EICHD14_WORD1_B0_3DATA_MASK_MASK + case(14): { INJECT_CHANNEL(14) } +#endif +#ifdef EIM_EICHD15_WORD1_B0_3DATA_MASK_MASK + case(15): { INJECT_CHANNEL(15) } +#endif +#ifdef EIM_EICHD16_WORD1_B0_3DATA_MASK_MASK + case(16): { INJECT_CHANNEL(16) } +#endif +#ifdef EIM_EICHD17_WORD1_B0_3DATA_MASK_MASK + case(17): { INJECT_CHANNEL(17) } +#endif +#ifdef EIM_EICHD18_WORD1_B0_3DATA_MASK_MASK + case(18): { INJECT_CHANNEL(18) } +#endif +#ifdef EIM_EICHD19_WORD1_B0_3DATA_MASK_MASK + case(19): { INJECT_CHANNEL(19) } +#endif +#ifdef EIM_EICHD20_WORD1_B0_3DATA_MASK_MASK + case(20): { INJECT_CHANNEL(20) } +#endif +#ifdef EIM_EICHD21_WORD1_B0_3DATA_MASK_MASK + case(21): { INJECT_CHANNEL(21) } +#endif +#ifdef EIM_EICHD22_WORD1_B0_3DATA_MASK_MASK + case(22): { INJECT_CHANNEL(22) } +#endif +#ifdef EIM_EICHD23_WORD1_B0_3DATA_MASK_MASK + case(23): { INJECT_CHANNEL(23) } +#endif +#ifdef EIM_EICHD24_WORD1_B0_3DATA_MASK_MASK + case(24): { INJECT_CHANNEL(24) } +#endif +#ifdef EIM_EICHD25_WORD1_B0_3DATA_MASK_MASK + case(25): { INJECT_CHANNEL(25) } +#endif +#ifdef EIM_EICHD26_WORD1_B0_3DATA_MASK_MASK + case(26): { INJECT_CHANNEL(26) } +#endif +#ifdef EIM_EICHD27_WORD1_B0_3DATA_MASK_MASK + case(27): { INJECT_CHANNEL(27) } +#endif +#ifdef EIM_EICHD28_WORD1_B0_3DATA_MASK_MASK + case(28): { INJECT_CHANNEL(28) } +#endif +#ifdef EIM_EICHD29_WORD1_B0_3DATA_MASK_MASK + case(29): { INJECT_CHANNEL(29) } +#endif +#ifdef EIM_EICHD30_WORD1_B0_3DATA_MASK_MASK + case(30): { INJECT_CHANNEL(30) } +#endif + default: + assert(false); break; + } +} -#ifdef EIM_EICHEN_EICH1EN_MASK - case 1U: - mask = (base->EICHD1_WORD1 & EIM_EICHD1_WORD1_B0_3DATA_MASK_MASK) >> EIM_EICHD1_WORD1_B0_3DATA_MASK_SHIFT; - break; + +#define GET_CHANNEL(ch) \ + switch(word) { \ + GET_##ch##_1 \ + GET_##ch##_2 \ + GET_##ch##_3 \ + GET_##ch##_4 \ + GET_##ch##_5 \ + GET_##ch##_6 \ + default: assert(false); break; \ + } \ + break; + +uint32_t EIM_GetDataWordBitMask(EIM_Type *base, uint32_t channel, uint32_t word) +{ + uint32_t mask = 0x00U; + + switch (channel) + { + case(0): { GET_CHANNEL(0) } +#ifdef EIM_EICHD1_WORD1_B0_3DATA_MASK_MASK + case(1): { GET_CHANNEL(1) } #endif -#ifdef EIM_EICHEN_EICH2EN_MASK - case 2U: - mask = (base->EICHD2_WORD1 & EIM_EICHD2_WORD1_B0_3DATA_MASK_MASK) >> EIM_EICHD2_WORD1_B0_3DATA_MASK_SHIFT; - break; +#ifdef EIM_EICHD2_WORD1_B0_3DATA_MASK_MASK + case(2): { GET_CHANNEL(2) } #endif -#ifdef EIM_EICHEN_EICH3EN_MASK - case 3U: - mask = (base->EICHD3_WORD1 & EIM_EICHD3_WORD1_B0_3DATA_MASK_MASK) >> EIM_EICHD3_WORD1_B0_3DATA_MASK_SHIFT; - break; +#ifdef EIM_EICHD3_WORD1_B0_3DATA_MASK_MASK + case(3): { GET_CHANNEL(3) } #endif -#ifdef EIM_EICHEN_EICH4EN_MASK - case 4U: - mask = (base->EICHD4_WORD1 & EIM_EICHD4_WORD1_B0_3DATA_MASK_MASK) >> EIM_EICHD4_WORD1_B0_3DATA_MASK_SHIFT; - break; +#ifdef EIM_EICHD4_WORD1_B0_3DATA_MASK_MASK + case(4): { GET_CHANNEL(4) } #endif -#ifdef EIM_EICHEN_EICH5EN_MASK - case 5U: - mask = (base->EICHD5_WORD1 & EIM_EICHD5_WORD1_B0_3DATA_MASK_MASK) >> EIM_EICHD5_WORD1_B0_3DATA_MASK_SHIFT; - break; +#ifdef EIM_EICHD5_WORD1_B0_3DATA_MASK_MASK + case(5): { GET_CHANNEL(5) } #endif -#ifdef EIM_EICHEN_EICH6EN_MASK - case 6U: - mask = (base->EICHD6_WORD1 & EIM_EICHD6_WORD1_B0_3DATA_MASK_MASK) >> EIM_EICHD6_WORD1_B0_3DATA_MASK_SHIFT; - break; +#ifdef EIM_EICHD6_WORD1_B0_3DATA_MASK_MASK + case(6): { GET_CHANNEL(6) } #endif -#ifdef EIM_EICHEN_EICH7EN_MASK - case 7U: - mask = (base->EICHD7_WORD1 & EIM_EICHD7_WORD1_B0_3DATA_MASK_MASK) >> EIM_EICHD7_WORD1_B0_3DATA_MASK_SHIFT; - break; +#ifdef EIM_EICHD7_WORD1_B0_3DATA_MASK_MASK + case(7): { GET_CHANNEL(7) } #endif -#ifdef EIM_EICHEN_EICH8EN_MASK - case 8U: - mask = (base->EICHD8_WORD1 & EIM_EICHD8_WORD1_B0_3DATA_MASK_MASK) >> EIM_EICHD8_WORD1_B0_3DATA_MASK_SHIFT; - break; +#ifdef EIM_EICHD8_WORD1_B0_3DATA_MASK_MASK + case(8): { GET_CHANNEL(8) } +#endif +#ifdef EIM_EICHD9_WORD1_B0_3DATA_MASK_MASK + case(9): { GET_CHANNEL(9) } +#endif +#ifdef EIM_EICHD10_WORD1_B0_3DATA_MASK_MASK + case(10): { GET_CHANNEL(10) } +#endif +#ifdef EIM_EICHD11_WORD1_B0_3DATA_MASK_MASK + case(11): { GET_CHANNEL(11) } +#endif +#ifdef EIM_EICHD12_WORD1_B0_3DATA_MASK_MASK + case(12): { GET_CHANNEL(12) } +#endif +#ifdef EIM_EICHD13_WORD1_B0_3DATA_MASK_MASK + case(13): { GET_CHANNEL(13) } +#endif +#ifdef EIM_EICHD14_WORD1_B0_3DATA_MASK_MASK + case(14): { GET_CHANNEL(14) } +#endif +#ifdef EIM_EICHD15_WORD1_B0_3DATA_MASK_MASK + case(15): { GET_CHANNEL(15) } +#endif +#ifdef EIM_EICHD16_WORD1_B0_3DATA_MASK_MASK + case(16): { GET_CHANNEL(16) } +#endif +#ifdef EIM_EICHD17_WORD1_B0_3DATA_MASK_MASK + case(17): { GET_CHANNEL(17) } +#endif +#ifdef EIM_EICHD18_WORD1_B0_3DATA_MASK_MASK + case(18): { GET_CHANNEL(18) } +#endif +#ifdef EIM_EICHD19_WORD1_B0_3DATA_MASK_MASK + case(19): { GET_CHANNEL(19) } +#endif +#ifdef EIM_EICHD20_WORD1_B0_3DATA_MASK_MASK + case(20): { GET_CHANNEL(20) } +#endif +#ifdef EIM_EICHD21_WORD1_B0_3DATA_MASK_MASK + case(21): { GET_CHANNEL(21) } +#endif +#ifdef EIM_EICHD22_WORD1_B0_3DATA_MASK_MASK + case(22): { GET_CHANNEL(22) } +#endif +#ifdef EIM_EICHD23_WORD1_B0_3DATA_MASK_MASK + case(23): { GET_CHANNEL(23) } +#endif +#ifdef EIM_EICHD24_WORD1_B0_3DATA_MASK_MASK + case(24): { GET_CHANNEL(24) } +#endif +#ifdef EIM_EICHD25_WORD1_B0_3DATA_MASK_MASK + case(25): { GET_CHANNEL(25) } +#endif +#ifdef EIM_EICHD26_WORD1_B0_3DATA_MASK_MASK + case(26): { GET_CHANNEL(26) } +#endif +#ifdef EIM_EICHD27_WORD1_B0_3DATA_MASK_MASK + case(27): { GET_CHANNEL(27) } +#endif +#ifdef EIM_EICHD28_WORD1_B0_3DATA_MASK_MASK + case(28): { GET_CHANNEL(28) } +#endif +#ifdef EIM_EICHD29_WORD1_B0_3DATA_MASK_MASK + case(29): { GET_CHANNEL(29) } +#endif +#ifdef EIM_EICHD30_WORD1_B0_3DATA_MASK_MASK + case(30): { GET_CHANNEL(30) } #endif default: - assert(NULL); + assert(false); break; } diff --git a/mcux/mcux-sdk-ng/drivers/eim/fsl_eim.h b/mcux/mcux-sdk-ng/drivers/eim/fsl_eim.h index cf754056d5..165f0e7cc4 100644 --- a/mcux/mcux-sdk-ng/drivers/eim/fsl_eim.h +++ b/mcux/mcux-sdk-ng/drivers/eim/fsl_eim.h @@ -9,6 +9,7 @@ #define FSL_EIM_H_ #include "fsl_common.h" +#include "eim_channel_word.h" /*! * @addtogroup eim @@ -22,7 +23,7 @@ /*! @name Driver version */ /*! @{ */ /*! @brief Driver version. */ -#define FSL_ERM_DRIVER_VERSION (MAKE_VERSION(2U, 0U, 2U)) +#define FSL_EIM_DRIVER_VERSION (MAKE_VERSION(2U, 1U, 0U)) /*! @} */ /******************************************************************************* @@ -100,9 +101,9 @@ static inline void EIM_DisableErrorInjectionChannels(EIM_Type *base, uint32_t ma * * @param base EIM base address. * @param channel memory channel. - * @param mask The interrupts to enable. + * @param mask The check bit to invert value. */ -void EIM_InjectCheckBitError(EIM_Type *base, eim_memory_channel_t channel, uint8_t mask); +void EIM_InjectCheckBitError(EIM_Type *base, uint32_t channel, uint32_t mask); /*! * @brief EIM module get checkbit mask for memory channel n. @@ -111,7 +112,7 @@ void EIM_InjectCheckBitError(EIM_Type *base, eim_memory_channel_t channel, uint8 * @param channel memory channel. * @retval return checkbit mask. */ -uint8_t EIM_GetCheckBitMask(EIM_Type *base, eim_memory_channel_t channel); +uint32_t EIM_GetCheckBitMask(EIM_Type *base, uint32_t channel); /*! * @brief EIM module inject databit error for memory channel n, an attempt to invert more than 2 bits in one operation @@ -119,9 +120,9 @@ uint8_t EIM_GetCheckBitMask(EIM_Type *base, eim_memory_channel_t channel); * * @param base EIM base address. * @param channel memory channel. - * @param mask The interrupts to enable. + * @param mask The data bit to invert value. */ -void EIM_InjectDataBitError(EIM_Type *base, eim_memory_channel_t channel, uint8_t mask); +void EIM_InjectDataBitError(EIM_Type *base, uint32_t channel, uint32_t mask); /*! * @brief EIM module get databit mask for memory channel n. @@ -130,7 +131,28 @@ void EIM_InjectDataBitError(EIM_Type *base, eim_memory_channel_t channel, uint8_ * @param channel memory channel. * @retval return checkbit mask. */ -uint32_t EIM_GetDataBitMask(EIM_Type *base, eim_memory_channel_t channel); +uint32_t EIM_GetDataBitMask(EIM_Type *base, uint32_t channel); + +/*! + * @brief EIM module inject databit error for memory channel n data word, an attempt to invert more than 2 bits in one operation + * might result in undefined behavior. + * + * @param base EIM base address. + * @param channel memory channel. + * @param mask The data bit to invert value. + * @param word The data word to inject error into. The value shall be 1-6. + */ +void EIM_InjectDataWordBitError(EIM_Type *base, uint32_t channel, uint32_t mask, uint32_t word); + +/*! + * @brief EIM module get databit mask for memory channel n data word. + * + * @param base EIM base address. + * @param channel memory channel. + * @param word The data word to get mask from. The value shall be 1-6. + * @retval return databit mask. + */ +uint32_t EIM_GetDataWordBitMask(EIM_Type *base, uint32_t channel, uint32_t word); /*! @}*/ diff --git a/mcux/mcux-sdk-ng/drivers/erm/CMakeLists.txt b/mcux/mcux-sdk-ng/drivers/erm/CMakeLists.txt index 4679c91fef..49d73e496d 100644 --- a/mcux/mcux-sdk-ng/drivers/erm/CMakeLists.txt +++ b/mcux/mcux-sdk-ng/drivers/erm/CMakeLists.txt @@ -1,9 +1,9 @@ -# Copyright 2024 NXP +# Copyright 2024-2025 NXP # # SPDX-License-Identifier: BSD-3-Clause if(CONFIG_MCUX_COMPONENT_driver.erm) - mcux_component_version(2.0.1) + mcux_component_version(2.0.4) mcux_add_source(SOURCES fsl_erm.c fsl_erm.h) diff --git a/mcux/mcux-sdk-ng/drivers/erm/fsl_erm.c b/mcux/mcux-sdk-ng/drivers/erm/fsl_erm.c index a8e5999e72..fab92a45ff 100644 --- a/mcux/mcux-sdk-ng/drivers/erm/fsl_erm.c +++ b/mcux/mcux-sdk-ng/drivers/erm/fsl_erm.c @@ -32,8 +32,8 @@ static const clock_ip_name_t s_ermClocks[] = ERM_CLOCKS; #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */ #if defined(ERM_RSTS_N) -/*! @brief Pointers to ERM clocks for each instance. */ -static const clock_ip_name_t s_ermResets[] = ERM_RSTS_N; +/*! @brief Pointers to ERM resets for each instance. */ +static const reset_ip_name_t s_ermResets[] = ERM_RSTS_N; #endif /******************************************************************************* * Code @@ -41,9 +41,10 @@ static const clock_ip_name_t s_ermResets[] = ERM_RSTS_N; static uint32_t ERM_GetInstance(ERM_Type *base) { uint32_t instance; + uint32_t erm_cnt = ARRAY_SIZE(s_ermBases); /* Find the instance index from base address mappings. */ - for (instance = 0; instance < ARRAY_SIZE(s_ermBases); instance++) + for (instance = 0; instance < erm_cnt; instance++) { if (MSDK_REG_SECURE_ADDR(s_ermBases[instance]) == MSDK_REG_SECURE_ADDR(base)) { @@ -51,7 +52,7 @@ static uint32_t ERM_GetInstance(ERM_Type *base) } } - assert(instance < ARRAY_SIZE(s_ermBases)); + assert(instance < erm_cnt); return instance; } @@ -65,7 +66,7 @@ void ERM_Init(ERM_Type *base) { #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) /* Ungate ERM clock. */ - CLOCK_EnableClock(s_ermClocks[ERM_GetInstance(base)]); + (void)CLOCK_EnableClock(s_ermClocks[ERM_GetInstance(base)]); #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */ #if defined(ERM_RSTS_N) @@ -76,11 +77,17 @@ void ERM_Init(ERM_Type *base) base->CR0 = 0x00U; #ifdef ERM_CR1_ENCIE8_MASK base->CR1 = 0x00U; +#endif +#ifdef ERM_CR2_ENCIE8_MASK + base->CR2 = 0x00U; #endif base->SR0 = 0xFFFFFFFFU; #ifdef ERM_SR1_SBC8_MASK base->SR1 = 0xFFFFFFFFU; #endif +#ifdef ERM_SR2_SBC16_MASK + base->SR2 = 0xFFFFFFFFU; +#endif } /*! @@ -91,15 +98,15 @@ void ERM_Deinit(ERM_Type *base) { #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) /* Ungate ERM clock. */ - CLOCK_DisableClock(s_ermClocks[ERM_GetInstance(base)]); + (void)CLOCK_DisableClock(s_ermClocks[ERM_GetInstance(base)]); #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */ } -uint32_t ERM_GetMemoryErrorAddr(ERM_Type *base, erm_memory_channel_t channel) +uint32_t ERM_GetMemoryErrorAddr(ERM_Type *base, uint32_t channel) { uint32_t absoluteErrorAddress = 0x00U; - switch ((uint8_t)channel) + switch (channel) { case 0U: absoluteErrorAddress = base->EAR0; @@ -133,20 +140,106 @@ uint32_t ERM_GetMemoryErrorAddr(ERM_Type *base, erm_memory_channel_t channel) case 6U: absoluteErrorAddress = base->EAR6; break; +#endif +#ifdef ERM_EAR7_EAR_MASK + case 7U: + absoluteErrorAddress = base->EAR7; + break; +#endif +#ifdef ERM_EAR8_EAR_MASK + case 8U: + absoluteErrorAddress = base->EAR8; + break; +#endif +#ifdef ERM_EAR9_EAR_MASK + case 9U: + absoluteErrorAddress = base->EAR9; + break; +#endif +#ifdef ERM_EAR10_EAR_MASK + case 10U: + absoluteErrorAddress = base->EAR10; + break; +#endif +#ifdef ERM_EAR11_EAR_MASK + case 11U: + absoluteErrorAddress = base->EAR11; + break; +#endif +#ifdef ERM_EAR12_EAR_MASK + case 12U: + absoluteErrorAddress = base->EAR12; + break; +#endif +#ifdef ERM_EAR13_EAR_MASK + case 13U: + absoluteErrorAddress = base->EAR13; + break; +#endif +#ifdef ERM_EAR14_EAR_MASK + case 14U: + absoluteErrorAddress = base->EAR14; + break; +#endif +#ifdef ERM_EAR15_EAR_MASK + case 15U: + absoluteErrorAddress = base->EAR15; + break; +#endif +#ifdef ERM_EAR16_EAR_MASK + case 16U: + absoluteErrorAddress = base->EAR16; + break; +#endif +#ifdef ERM_EAR17_EAR_MASK + case 17U: + absoluteErrorAddress = base->EAR17; + break; +#endif +#ifdef ERM_EAR18_EAR_MASK + case 18U: + absoluteErrorAddress = base->EAR18; + break; +#endif +#ifdef ERM_EAR19_EAR_MASK + case 19U: + absoluteErrorAddress = base->EAR19; + break; +#endif +#ifdef ERM_EAR20_EAR_MASK + case 20U: + absoluteErrorAddress = base->EAR20; + break; +#endif +#ifdef ERM_EAR21_EAR_MASK + case 21U: + absoluteErrorAddress = base->EAR21; + break; +#endif +#ifdef ERM_EAR22_EAR_MASK + case 22U: + absoluteErrorAddress = base->EAR22; + break; +#endif +#ifdef ERM_EAR23_EAR_MASK + case 23U: + absoluteErrorAddress = base->EAR23; + break; #endif default: - assert(NULL); + assert(false); break; } return absoluteErrorAddress; } -uint32_t ERM_GetSyndrome(ERM_Type *base, erm_memory_channel_t channel) +#if defined(ERM_SYN0_SYNDROME_MASK) && ERM_SYN0_SYNDROME_MASK +uint32_t ERM_GetSyndrome(ERM_Type *base, uint32_t channel) { uint32_t syndrome = 0x00U; - switch ((uint8_t)channel) + switch (channel) { case 0U: syndrome = (base->SYN0 & ERM_SYN0_SYNDROME_MASK) >> ERM_SYN0_SYNDROME_SHIFT; @@ -195,20 +288,92 @@ uint32_t ERM_GetSyndrome(ERM_Type *base, erm_memory_channel_t channel) case 8U: syndrome = (base->SYN9 & ERM_SYN9_SYNDROME_MASK) >> ERM_SYN9_SYNDROME_SHIFT; break; +#endif +#ifdef ERM_SYN10_SYNDROME_MASK + case 10U: + syndrome = (base->SYN10 & ERM_SYN10_SYNDROME_MASK) >> ERM_SYN10_SYNDROME_SHIFT; + break; +#endif +#ifdef ERM_SYN11_SYNDROME_MASK + case 11U: + syndrome = (base->SYN11 & ERM_SYN11_SYNDROME_MASK) >> ERM_SYN11_SYNDROME_SHIFT; + break; +#endif +#ifdef ERM_SYN12_SYNDROME_MASK + case 12U: + syndrome = (base->SYN12 & ERM_SYN12_SYNDROME_MASK) >> ERM_SYN12_SYNDROME_SHIFT; + break; +#endif +#ifdef ERM_SYN13_SYNDROME_MASK + case 13U: + syndrome = (base->SYN13 & ERM_SYN13_SYNDROME_MASK) >> ERM_SYN13_SYNDROME_SHIFT; + break; +#endif +#ifdef ERM_SYN14_SYNDROME_MASK + case 14U: + syndrome = (base->SYN14 & ERM_SYN14_SYNDROME_MASK) >> ERM_SYN14_SYNDROME_SHIFT; + break; +#endif +#ifdef ERM_SYN15_SYNDROME_MASK + case 15U: + syndrome = (base->SYN15 & ERM_SYN15_SYNDROME_MASK) >> ERM_SYN15_SYNDROME_SHIFT; + break; +#endif +#ifdef ERM_SYN16_SYNDROME_MASK + case 16U: + syndrome = (base->SYN16 & ERM_SYN16_SYNDROME_MASK) >> ERM_SYN16_SYNDROME_SHIFT; + break; +#endif +#ifdef ERM_SYN17_SYNDROME_MASK + case 17U: + syndrome = (base->SYN17 & ERM_SYN17_SYNDROME_MASK) >> ERM_SYN17_SYNDROME_SHIFT; + break; +#endif +#ifdef ERM_SYN18_SYNDROME_MASK + case 18U: + syndrome = (base->SYN18 & ERM_SYN18_SYNDROME_MASK) >> ERM_SYN18_SYNDROME_SHIFT; + break; +#endif +#ifdef ERM_SYN19_SYNDROME_MASK + case 19U: + syndrome = (base->SYN19 & ERM_SYN19_SYNDROME_MASK) >> ERM_SYN19_SYNDROME_SHIFT; + break; +#endif +#ifdef ERM_SYN20_SYNDROME_MASK + case 20U: + syndrome = (base->SYN20 & ERM_SYN20_SYNDROME_MASK) >> ERM_SYN20_SYNDROME_SHIFT; + break; +#endif +#ifdef ERM_SYN21_SYNDROME_MASK + case 21U: + syndrome = (base->SYN21 & ERM_SYN21_SYNDROME_MASK) >> ERM_SYN21_SYNDROME_SHIFT; + break; +#endif +#ifdef ERM_SYN22_SYNDROME_MASK + case 22U: + syndrome = (base->SYN22 & ERM_SYN22_SYNDROME_MASK) >> ERM_SYN22_SYNDROME_SHIFT; + break; +#endif +#ifdef ERM_SYN23_SYNDROME_MASK + case 23U: + syndrome = (base->SYN23 & ERM_SYN23_SYNDROME_MASK) >> ERM_SYN23_SYNDROME_SHIFT; + break; #endif default: - assert(NULL); + assert(false); break; } return syndrome; } +#endif /* ERM_SYN0_SYNDROME_MASK */ -uint32_t ERM_GetErrorCount(ERM_Type *base, erm_memory_channel_t channel) +#if defined(ERM_CORR_ERR_CNT0_COUNT_MASK) && ERM_CORR_ERR_CNT0_COUNT_MASK +uint32_t ERM_GetErrorCount(ERM_Type *base, uint32_t channel) { uint32_t count = 0x00U; - switch ((uint8_t)channel) + switch (channel) { case 0U: count = (base->CORR_ERR_CNT0 & ERM_CORR_ERR_CNT0_COUNT_MASK) >> ERM_CORR_ERR_CNT0_COUNT_SHIFT; @@ -257,18 +422,88 @@ uint32_t ERM_GetErrorCount(ERM_Type *base, erm_memory_channel_t channel) case 9U: count = (base->CORR_ERR_CNT9 & ERM_CORR_ERR_CNT9_COUNT_MASK) >> ERM_CORR_ERR_CNT9_COUNT_SHIFT; break; +#endif +#ifdef ERM_CORR_ERR_CNT10_COUNT_MASK + case 10U: + count = (base->CORR_ERR_CNT10 & ERM_CORR_ERR_CNT10_COUNT_MASK) >> ERM_CORR_ERR_CNT10_COUNT_SHIFT; + break; +#endif +#ifdef ERM_CORR_ERR_CNT11_COUNT_MASK + case 11U: + count = (base->CORR_ERR_CNT11 & ERM_CORR_ERR_CNT11_COUNT_MASK) >> ERM_CORR_ERR_CNT11_COUNT_SHIFT; + break; +#endif +#ifdef ERM_CORR_ERR_CNT12_COUNT_MASK + case 12U: + count = (base->CORR_ERR_CNT12 & ERM_CORR_ERR_CNT12_COUNT_MASK) >> ERM_CORR_ERR_CNT12_COUNT_SHIFT; + break; +#endif +#ifdef ERM_CORR_ERR_CNT13_COUNT_MASK + case 13U: + count = (base->CORR_ERR_CNT13 & ERM_CORR_ERR_CNT13_COUNT_MASK) >> ERM_CORR_ERR_CNT13_COUNT_SHIFT; + break; +#endif +#ifdef ERM_CORR_ERR_CNT14_COUNT_MASK + case 14U: + count = (base->CORR_ERR_CNT14 & ERM_CORR_ERR_CNT14_COUNT_MASK) >> ERM_CORR_ERR_CNT14_COUNT_SHIFT; + break; +#endif +#ifdef ERM_CORR_ERR_CNT15_COUNT_MASK + case 15U: + count = (base->CORR_ERR_CNT15 & ERM_CORR_ERR_CNT15_COUNT_MASK) >> ERM_CORR_ERR_CNT15_COUNT_SHIFT; + break; +#endif +#ifdef ERM_CORR_ERR_CNT16_COUNT_MASK + case 16U: + count = (base->CORR_ERR_CNT16 & ERM_CORR_ERR_CNT16_COUNT_MASK) >> ERM_CORR_ERR_CNT16_COUNT_SHIFT; + break; +#endif +#ifdef ERM_CORR_ERR_CNT17_COUNT_MASK + case 17U: + count = (base->CORR_ERR_CNT17 & ERM_CORR_ERR_CNT17_COUNT_MASK) >> ERM_CORR_ERR_CNT17_COUNT_SHIFT; + break; +#endif +#ifdef ERM_CORR_ERR_CNT18_COUNT_MASK + case 18U: + count = (base->CORR_ERR_CNT18 & ERM_CORR_ERR_CNT18_COUNT_MASK) >> ERM_CORR_ERR_CNT18_COUNT_SHIFT; + break; +#endif +#ifdef ERM_CORR_ERR_CNT19_COUNT_MASK + case 19U: + count = (base->CORR_ERR_CNT19 & ERM_CORR_ERR_CNT19_COUNT_MASK) >> ERM_CORR_ERR_CNT19_COUNT_SHIFT; + break; +#endif +#ifdef ERM_CORR_ERR_CNT20_COUNT_MASK + case 20U: + count = (base->CORR_ERR_CNT20 & ERM_CORR_ERR_CNT20_COUNT_MASK) >> ERM_CORR_ERR_CNT20_COUNT_SHIFT; + break; +#endif +#ifdef ERM_CORR_ERR_CNT21_COUNT_MASK + case 21U: + count = (base->CORR_ERR_CNT21 & ERM_CORR_ERR_CNT21_COUNT_MASK) >> ERM_CORR_ERR_CNT21_COUNT_SHIFT; + break; +#endif +#ifdef ERM_CORR_ERR_CNT22_COUNT_MASK + case 22U: + count = (base->CORR_ERR_CNT22 & ERM_CORR_ERR_CNT22_COUNT_MASK) >> ERM_CORR_ERR_CNT22_COUNT_SHIFT; + break; +#endif +#ifdef ERM_CORR_ERR_CNT23_COUNT_MASK + case 23U: + count = (base->CORR_ERR_CNT23 & ERM_CORR_ERR_CNT23_COUNT_MASK) >> ERM_CORR_ERR_CNT23_COUNT_SHIFT; + break; #endif default: - assert(NULL); + assert(false); break; } return count; } -void ERM_ResetErrorCount(ERM_Type *base, erm_memory_channel_t channel) +void ERM_ResetErrorCount(ERM_Type *base, uint32_t channel) { - switch ((uint8_t)channel) + switch (channel) { case 0U: base->CORR_ERR_CNT0 = 0x00U; @@ -318,9 +553,80 @@ void ERM_ResetErrorCount(ERM_Type *base, erm_memory_channel_t channel) case 9U: base->CORR_ERR_CNT9 = 0x00U; break; +#endif +#ifdef ERM_CORR_ERR_CNT10_COUNT_MASK + case 10U: + base->CORR_ERR_CNT10 = 0x00U; + break; +#endif +#ifdef ERM_CORR_ERR_CNT11_COUNT_MASK + case 11U: + base->CORR_ERR_CNT11 = 0x00U; + break; +#endif +#ifdef ERM_CORR_ERR_CNT12_COUNT_MASK + case 12U: + base->CORR_ERR_CNT12 = 0x00U; + break; +#endif +#ifdef ERM_CORR_ERR_CNT13_COUNT_MASK + case 13U: + base->CORR_ERR_CNT13 = 0x00U; + break; +#endif +#ifdef ERM_CORR_ERR_CNT14_COUNT_MASK + case 14U: + base->CORR_ERR_CNT14 = 0x00U; + break; +#endif +#ifdef ERM_CORR_ERR_CNT15_COUNT_MASK + case 15U: + base->CORR_ERR_CNT15 = 0x00U; + break; +#endif +#ifdef ERM_CORR_ERR_CNT16_COUNT_MASK + case 16U: + base->CORR_ERR_CNT16 = 0x00U; + break; +#endif +#ifdef ERM_CORR_ERR_CNT17_COUNT_MASK + case 17U: + base->CORR_ERR_CNT17 = 0x00U; + break; +#endif +#ifdef ERM_CORR_ERR_CNT18_COUNT_MASK + case 18U: + base->CORR_ERR_CNT18 = 0x00U; + break; +#endif +#ifdef ERM_CORR_ERR_CNT19_COUNT_MASK + case 19U: + base->CORR_ERR_CNT19 = 0x00U; + break; +#endif +#ifdef ERM_CORR_ERR_CNT20_COUNT_MASK + case 20U: + base->CORR_ERR_CNT20 = 0x00U; + break; +#endif +#ifdef ERM_CORR_ERR_CNT21_COUNT_MASK + case 21U: + base->CORR_ERR_CNT21 = 0x00U; + break; +#endif +#ifdef ERM_CORR_ERR_CNT22_COUNT_MASK + case 22U: + base->CORR_ERR_CNT22 = 0x00U; + break; +#endif +#ifdef ERM_CORR_ERR_CNT23_COUNT_MASK + case 23U: + base->CORR_ERR_CNT23 = 0x00U; + break; #endif default: - assert(NULL); + assert(false); break; } } +#endif /* ERM_CORR_ERR_CNT1_COUNT_MASK */ diff --git a/mcux/mcux-sdk-ng/drivers/erm/fsl_erm.h b/mcux/mcux-sdk-ng/drivers/erm/fsl_erm.h index b772fb5370..076800d17a 100644 --- a/mcux/mcux-sdk-ng/drivers/erm/fsl_erm.h +++ b/mcux/mcux-sdk-ng/drivers/erm/fsl_erm.h @@ -22,7 +22,7 @@ /*! @name Driver version */ /*! @{ */ /*! @brief Driver version. */ -#define FSL_ERM_DRIVER_VERSION (MAKE_VERSION(2U, 0U, 2U)) +#define FSL_ERM_DRIVER_VERSION (MAKE_VERSION(2U, 0U, 4U)) /*! @} */ /*! @@ -32,8 +32,8 @@ */ enum { - kERM_SingleCorrectionIntEnable = 0x08U, /*!< Single Correction Interrupt Notification enable.*/ - kERM_NonCorrectableIntEnable = 0x04U, /*!< Non-Correction Interrupt Notification enable.*/ + kERM_SingleCorrectionIntEnable = 0x08U, /*!< Single Correction Interrupt Notification enable.*/ + kERM_NonCorrectableIntEnable = 0x04U, /*!< Non-Correction Interrupt Notification enable.*/ kERM_AllInterruptsEnable = 0xFFFFFFFFUL, /*!< All Interrupts enable */ }; @@ -48,7 +48,7 @@ enum kERM_SingleBitCorrectionIntFlag = 0x08U, /*!< Single-Bit Correction Event.*/ kERM_NonCorrectableErrorIntFlag = 0x04U, /*!< Non-Correctable Error Event.*/ - kERM_AllIntsFlag = 0xFFFFFFFFUL, /*!< All Events. */ + kERM_AllIntsFlag = 0xFFFFFFFFUL, /*!< All Events. */ }; /******************************************************************************* @@ -91,23 +91,32 @@ void ERM_Deinit(ERM_Type *base); * @param mask single correction interrupt or non-correction interrupt enable to disable for one specific memory region. * Refer to "_erm_interrupt_enable" enumeration. */ -static inline void ERM_EnableInterrupts(ERM_Type *base, erm_memory_channel_t channel, uint32_t mask) +static inline void ERM_EnableInterrupts(ERM_Type *base, uint32_t channel, uint32_t mask) { uint32_t temp = 0x00U; - if ((uint32_t)channel <= 0x07U) + if (channel <= 0x07U) { - temp = base->CR0; - base->CR0 = - (temp & ~(0x0CUL << ((0x07U - (uint32_t)channel) * 4U))) | (mask << ((0x07U - (uint32_t)channel) * 4U)); + temp = base->CR0; + base->CR0 = (temp & ~(0x0CUL << ((0x07U - channel) * 4U))) | (mask << ((0x07U - channel) * 4U)); } #ifdef ERM_CR1_ESCIE8_MASK - else + else if (channel <= 0xFU) { temp = base->CR1; - base->CR1 = (temp & ~(0x0CUL << ((0x07U + 0x08U - (uint32_t)channel) * 4U))) | - (mask << ((0x07U + 0x08U - (uint32_t)channel) * 4U)); + base->CR1 = (temp & ~(0x0CUL << ((0x07U + 0x08U - channel) * 4U))) | (mask << ((0x07U + 0x08U - channel) * 4U)); + } +#endif +#ifdef ERM_CR2_ESCIE16_MASK + else if (channel <= 0x17U) + { + temp = base->CR2; + base->CR2 = (temp & ~(0x0CUL << ((0x07U + 0x10U - channel) * 4U))) | (mask << ((0x07U + 0x10U - channel) * 4U)); } #endif + else + { + assert(false); + } } /*! @@ -118,18 +127,28 @@ static inline void ERM_EnableInterrupts(ERM_Type *base, erm_memory_channel_t cha * @param mask single correction interrupt or non-correction interrupt enable to disable for one specific memory region. * Refer to "_erm_interrupt_enable" enumeration. */ -static inline void ERM_DisableInterrupts(ERM_Type *base, erm_memory_channel_t channel, uint32_t mask) +static inline void ERM_DisableInterrupts(ERM_Type *base, uint32_t channel, uint32_t mask) { - if ((uint32_t)channel <= 0x07U) + if (channel <= 0x07U) { - base->CR0 &= ~(mask << ((0x07U - (uint32_t)channel) * 4U)); + base->CR0 &= ~(mask << ((0x07U - channel) * 4U)); } #ifdef ERM_CR1_ESCIE8_MASK - else + else if (channel <= 0x0FU) + { + base->CR1 &= ~(mask << ((0x07U + 0x08U - channel) * 4U)); + } +#endif +#ifdef ERM_CR2_ESCIE16_MASK + else if (channel <= 0x17U) { - base->CR1 &= ~(mask << ((0x07U + 0x08U - (uint32_t)channel) * 4U)); + base->CR2 &= ~(mask << ((0x07U + 0x10U - channel) * 4U)); } #endif + else + { + assert(false); + } } /*! @@ -138,22 +157,28 @@ static inline void ERM_DisableInterrupts(ERM_Type *base, erm_memory_channel_t ch * @param base ERM peripheral base address. * @return ERM event flags. */ -static inline uint32_t ERM_GetInterruptStatus(ERM_Type *base, erm_memory_channel_t channel) +static inline uint32_t ERM_GetInterruptStatus(ERM_Type *base, uint32_t channel) { - if ((uint32_t)channel <= 0x07U) + if (channel <= 0x07U) { - return ((base->SR0 & (uint32_t)kERM_AllIntsFlag) >> (0x07U - (uint32_t)channel) * 4U) & 0xFU; + return ((base->SR0 & (uint32_t)kERM_AllIntsFlag) >> (0x07U - channel) * 4U) & 0xFU; } #ifdef ERM_SR1_SBC8_MASK - else + else if (channel <= 0x0FU) { - return ((base->SR1 & (uint32_t)kERM_AllIntsFlag) >> ((0x07U + 0x08U - (uint32_t)channel) * 4U)) & 0xFU; + return ((base->SR1 & (uint32_t)kERM_AllIntsFlag) >> ((0x07U + 0x08U - channel) * 4U)) & 0xFU; } -#else +#endif +#ifdef ERM_SR2_SBC16_MASK + else if (channel <= 0x17U) { - return 0; + return ((base->SR2 & (uint32_t)kERM_AllIntsFlag) >> ((0x07U + 0x10U - channel) * 4U)) & 0xFU; } #endif + else + { + return 0; + } } /*! @@ -162,18 +187,28 @@ static inline uint32_t ERM_GetInterruptStatus(ERM_Type *base, erm_memory_channel * @param base ERM base address. * @param mask event flag to clear. Refer to "_erm_interrupt_flag" enumeration. */ -static inline void ERM_ClearInterruptStatus(ERM_Type *base, erm_memory_channel_t channel, uint32_t mask) +static inline void ERM_ClearInterruptStatus(ERM_Type *base, uint32_t channel, uint32_t mask) { - if ((uint32_t)channel <= 0x07U) + if (channel <= 0x07U) { - base->SR0 = mask << ((0x07U - (uint32_t)channel) * 4U); + base->SR0 = mask << ((0x07U - channel) * 4U); } #ifdef ERM_SR1_SBC8_MASK - else + else if (channel <= 0x0FU) + { + base->SR1 = mask << ((0x07U + 0x08U - channel) * 4U); + } +#endif +#ifdef ERM_SR2_SBC16_MASK + else if (channel <= 0x17U) { - base->SR1 = mask << ((0x07U + 0x08U - (uint32_t)channel) * 4U); + base->SR2 = mask << ((0x07U + 0x10U - channel) * 4U); } #endif + else + { + assert(false); + } } /*! @} */ @@ -191,8 +226,9 @@ static inline void ERM_ClearInterruptStatus(ERM_Type *base, erm_memory_channel_t * @retval memory error absolute address. */ -uint32_t ERM_GetMemoryErrorAddr(ERM_Type *base, erm_memory_channel_t channel); +uint32_t ERM_GetMemoryErrorAddr(ERM_Type *base, uint32_t channel); +#if defined(ERM_SYN0_SYNDROME_MASK) && ERM_SYN0_SYNDROME_MASK /*! * @brief ERM get syndrome, which identifies the pertinent bit position on a correctable, single-bit data inversion or a * non-correctable, single-bit address inversion. The syndrome value does not provide any additional diagnostic @@ -202,8 +238,10 @@ uint32_t ERM_GetMemoryErrorAddr(ERM_Type *base, erm_memory_channel_t channel); * @param channel memory channel. * @retval syndrome value. */ -uint32_t ERM_GetSyndrome(ERM_Type *base, erm_memory_channel_t channel); +uint32_t ERM_GetSyndrome(ERM_Type *base, uint32_t channel); +#endif /* ERM_SYN0_SYNDROME_MASK */ +#if defined(ERM_CORR_ERR_CNT0_COUNT_MASK) && ERM_CORR_ERR_CNT0_COUNT_MASK /*! * @brief ERM get error count, which records the count value of the number of correctable ECC error events for Memory * n. Non-correctable errors are considered a serious fault, so the ERM does not provide any mechanism to count @@ -213,7 +251,7 @@ uint32_t ERM_GetSyndrome(ERM_Type *base, erm_memory_channel_t channel); * @param channel memory channel. * @retval error count. */ -uint32_t ERM_GetErrorCount(ERM_Type *base, erm_memory_channel_t channel); +uint32_t ERM_GetErrorCount(ERM_Type *base, uint32_t channel); /*! * @brief ERM reset error count. @@ -221,7 +259,8 @@ uint32_t ERM_GetErrorCount(ERM_Type *base, erm_memory_channel_t channel); * @param base ERM base address. * @param channel memory channel. */ -void ERM_ResetErrorCount(ERM_Type *base, erm_memory_channel_t channel); +void ERM_ResetErrorCount(ERM_Type *base, uint32_t channel); +#endif /* ERM_CORR_ERR_CNT0_COUNT_MASK */ /*! @}*/