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| 1 | +/* |
| 2 | + * Copyright (c) 2025, Qingsong Gou <gouqs@hotmail.com> |
| 3 | + * SPDX-License-Identifier: Apache-2.0 |
| 4 | + */ |
| 5 | + |
| 6 | +#define DT_DRV_COMPAT sifli_sf32lb_tsen |
| 7 | + |
| 8 | +#include <zephyr/kernel.h> |
| 9 | +#include <zephyr/device.h> |
| 10 | +#include <zephyr/drivers/clock_control/sf32lb.h> |
| 11 | +#include <zephyr/drivers/sensor.h> |
| 12 | +#include <zephyr/logging/log.h> |
| 13 | + |
| 14 | +#include <register.h> |
| 15 | + |
| 16 | +#define TSEN_CTRL_REG offsetof(TSEN_TypeDef, TSEN_CTRL_REG) |
| 17 | +#define TSEN_RDATA offsetof(TSEN_TypeDef, TSEN_RDATA) |
| 18 | +#define TSEN_IRQ offsetof(TSEN_TypeDef, TSEN_IRQ) |
| 19 | + |
| 20 | +#define SYS_CFG_ANAU_CR offsetof(HPSYS_CFG_TypeDef, ANAU_CR) |
| 21 | + |
| 22 | +LOG_MODULE_REGISTER(sf32lb_tsen, CONFIG_SENSOR_LOG_LEVEL); |
| 23 | + |
| 24 | +struct sf32lb_tsen_config { |
| 25 | + uintptr_t base; |
| 26 | + uintptr_t cfg_base; |
| 27 | + struct sf32lb_clock_dt_spec clock; |
| 28 | +}; |
| 29 | + |
| 30 | +struct sf32lb_tsen_data { |
| 31 | + struct k_mutex mutex; |
| 32 | + uint32_t last_temp; |
| 33 | +}; |
| 34 | + |
| 35 | +static int sf32lb_tsen_sample_fetch(const struct device *dev, enum sensor_channel chan) |
| 36 | +{ |
| 37 | + const struct sf32lb_tsen_config *config = dev->config; |
| 38 | + struct sf32lb_tsen_data *data = dev->data; |
| 39 | + |
| 40 | + k_mutex_lock(&data->mutex, K_FOREVER); |
| 41 | + |
| 42 | + while (!sys_test_bit(config->base + TSEN_IRQ, TSEN_TSEN_IRQ_TSEN_IRSR_Pos)) { |
| 43 | + k_msleep(1); |
| 44 | + } |
| 45 | + |
| 46 | + data->last_temp = sys_read32(config->base + TSEN_RDATA); |
| 47 | + |
| 48 | + sys_set_bit(config->base + TSEN_IRQ, TSEN_TSEN_IRQ_TSEN_ICR_Pos); |
| 49 | + |
| 50 | + k_mutex_unlock(&data->mutex); |
| 51 | + |
| 52 | + return 0; |
| 53 | +} |
| 54 | + |
| 55 | +static int sf32lb_tsen_channel_get(const struct device *dev, enum sensor_channel chan, |
| 56 | + struct sensor_value *val) |
| 57 | +{ |
| 58 | + struct sf32lb_tsen_data *data = dev->data; |
| 59 | + float temp; |
| 60 | + |
| 61 | + if (chan != SENSOR_CHAN_DIE_TEMP) { |
| 62 | + return -ENOTSUP; |
| 63 | + } |
| 64 | + |
| 65 | + temp = ((int32_t)data->last_temp + 3000) * 749.2916 / 10100 - 277; /* see manual 8.2.3.2 */ |
| 66 | + |
| 67 | + return sensor_value_from_float(val, temp); |
| 68 | +} |
| 69 | + |
| 70 | +static DEVICE_API(sensor, sf32lb_tsen_driver_api) = { |
| 71 | + .sample_fetch = sf32lb_tsen_sample_fetch, |
| 72 | + .channel_get = sf32lb_tsen_channel_get, |
| 73 | +}; |
| 74 | + |
| 75 | +static int sf32lb_tsen_init(const struct device *dev) |
| 76 | +{ |
| 77 | + const struct sf32lb_tsen_config *config = dev->config; |
| 78 | + struct sf32lb_tsen_data *data = dev->data; |
| 79 | + int ret; |
| 80 | + |
| 81 | + if (!sf32lb_clock_is_ready_dt(&config->clock)) { |
| 82 | + return -ENODEV; |
| 83 | + } |
| 84 | + |
| 85 | + ret = sf32lb_clock_control_on_dt(&config->clock); |
| 86 | + if (ret < 0) { |
| 87 | + return ret; |
| 88 | + } |
| 89 | + |
| 90 | + if (!sys_test_bit(config->cfg_base + SYS_CFG_ANAU_CR, HPSYS_CFG_ANAU_CR_EN_BG_Pos)) { |
| 91 | + sys_set_bit(config->cfg_base + SYS_CFG_ANAU_CR, HPSYS_CFG_ANAU_CR_EN_BG_Pos); |
| 92 | + } |
| 93 | + |
| 94 | + sys_clear_bit(config->base + TSEN_CTRL_REG, TSEN_TSEN_CTRL_REG_ANAU_TSEN_RSTB_Pos); |
| 95 | + sys_set_bit(config->base + TSEN_CTRL_REG, TSEN_TSEN_CTRL_REG_ANAU_TSEN_EN_Pos); |
| 96 | + sys_set_bit(config->base + TSEN_CTRL_REG, TSEN_TSEN_CTRL_REG_ANAU_TSEN_PU_Pos); |
| 97 | + sys_set_bit(config->base + TSEN_CTRL_REG, TSEN_TSEN_CTRL_REG_ANAU_TSEN_RSTB_Pos); |
| 98 | + k_busy_wait(20); |
| 99 | + sys_set_bit(config->base + TSEN_CTRL_REG, TSEN_TSEN_CTRL_REG_ANAU_TSEN_RUN_Pos); |
| 100 | + |
| 101 | + k_mutex_init(&data->mutex); |
| 102 | + |
| 103 | + return ret; |
| 104 | +} |
| 105 | + |
| 106 | +#define SF32LB_TSEN_DEFINE(inst) \ |
| 107 | + static struct sf32lb_tsen_data sf32lb_tsen_data_##inst; \ |
| 108 | + static const struct sf32lb_tsen_config sf32lb_tsen_config_##inst = { \ |
| 109 | + .base = DT_INST_REG_ADDR(inst), \ |
| 110 | + .cfg_base = DT_REG_ADDR(DT_INST_PHANDLE(inst, sifli_cfg)), \ |
| 111 | + .clock = SF32LB_CLOCK_DT_INST_SPEC_GET(inst), \ |
| 112 | + }; \ |
| 113 | + SENSOR_DEVICE_DT_INST_DEFINE(inst, sf32lb_tsen_init, NULL, &sf32lb_tsen_data_##inst, \ |
| 114 | + &sf32lb_tsen_config_##inst, POST_KERNEL, \ |
| 115 | + CONFIG_SENSOR_INIT_PRIORITY, &sf32lb_tsen_driver_api); |
| 116 | + |
| 117 | +DT_INST_FOREACH_STATUS_OKAY(SF32LB_TSEN_DEFINE) |
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