soc: intel: wildcat_lake: Add soc support for WCL

This commit introduces SOC support for
Wildcat Lake.

Signed-off-by: S Swetha <s.swetha@intel.com>

Author: sswetha18

soc/intel/wildcat_lake/CMakeLists.txt

@@ -0,0 +1,8 @@
+# SPDX-License-Identifier: Apache-2.0
+
+zephyr_include_directories(.)
+
+zephyr_cc_option(-march=goldmont)
+zephyr_library_sources_ifdef(CONFIG_GPIO ../common/soc_gpio.c)
+
+set(SOC_LINKER_SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/linker.ld CACHE INTERNAL "")

soc/intel/wildcat_lake/Kconfig

@@ -0,0 +1,11 @@
+# Copyright (c) 2025 Intel Corporation Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+config SOC_WILDCAT_LAKE
+	select X86
+	select X86_64
+	select CPU_ATOM
+	select PCIE
+	select PCIE_MSI
+	select DYNAMIC_INTERRUPTS
+	select X86_MMU

soc/intel/wildcat_lake/Kconfig.defconfig

@@ -0,0 +1,15 @@
+# Wildcat Lake SoC configuration options
+
+# Copyright (c) 2025 Intel Corporation
+# SPDX-License-Identifier: Apache-2.0
+
+if SOC_WILDCAT_LAKE
+
+config PCIE_MMIO_CFG
+	default y
+
+config X86_DYNAMIC_IRQ_STUBS
+	default 16
+	depends on DYNAMIC_INTERRUPTS
+
+endif # SOC_WILDCAT_LAKE

soc/intel/wildcat_lake/Kconfig.soc

@@ -0,0 +1,8 @@
+# Copyright (c) 2025 Intel Corporation Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+config SOC_WILDCAT_LAKE
+	bool
+
+config SOC
+	default "wildcat_lake" if SOC_WILDCAT_LAKE

soc/intel/wildcat_lake/linker.ld

@@ -0,0 +1,12 @@
+/*
+ * Copyright (c) 2025 Intel Corp.
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/arch/x86/memory.ld>
+
+#ifdef CONFIG_X86_64
+#include <zephyr/arch/x86/intel64/linker.ld>
+#else
+#include <zephyr/arch/x86/ia32/linker.ld>
+#endif /* CONFIG_X86_64 */

soc/intel/wildcat_lake/soc.h

@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2025 Intel Corporation
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file
+ * @brief Board configuration macros for the Wildcat Lake SoC
+ *
+ * This header file is used to specify and describe soc-level aspects for
+ * the 'Wildcat Lake' SoC.
+ */
+
+#ifndef __SOC_H_
+#define __SOC_H_
+
+#include <zephyr/sys/util.h>
+
+#ifndef _ASMLANGUAGE
+#include <zephyr/device.h>
+#include <zephyr/random/random.h>
+#endif
+
+#if DT_ANY_INST_HAS_PROP_STATUS_OKAY(acpi_hid)
+#include "../common/soc_gpio.h"
+#endif
+
+#ifdef CONFIG_GPIO_INTEL
+#include "soc_gpio.h"
+#endif
+
+#if DT_ON_BUS(DT_CHOSEN(zephyr_console), pcie)
+#include <zephyr/drivers/pcie/pcie.h>
+#define X86_SOC_EARLY_SERIAL_PCIDEV DT_REG_ADDR(DT_CHOSEN(zephyr_console))
+#else
+#define X86_SOC_EARLY_SERIAL_MMIO8_ADDR DT_REG_ADDR(DT_CHOSEN(zephyr_console))
+#endif
+
+#endif /* __SOC_H_ */

soc/intel/wildcat_lake/soc.yml

@@ -0,0 +1,4 @@
+vendor: intel
+comment: "Intel Wildcat Lake SoC"
+socs:
+- name: wildcat_lake

soc/intel/wildcat_lake/soc_gpio.h

@@ -0,0 +1,23 @@
+/*
+ * Copyright (c) 2025, Intel Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file
+ * @brief GPIO macros for the Wildcat Lake SoC
+ *
+ * This header file is used to specify the GPIO macros for
+ * the Wildcat Lake SoC.
+ */
+
+#ifndef __SOC_GPIO_H_
+#define __SOC_GPIO_H_
+
+#define GPIO_OWNERSHIP_BIT(raw_pin)     (0x0)
+#define GPIO_RAW_PIN(pin, pin_offset)   pin
+#define PAD_CFG0_PMODE_MASK             (0x07 << 10)
+#define PIN_OFFSET                      (0x10)
+
+#endif /* __SOC_GPIO_H_ */