From 7b4634a46f5c6ea5a3b518965f8d2661bf953ad5 Mon Sep 17 00:00:00 2001 From: Sam Connelly Date: Mon, 20 Oct 2025 16:10:41 -0400 Subject: [PATCH 01/24] Add support for ez80-tios --- lib/compiler/translate-c/Translator.zig | 4 ++ lib/std/Target.zig | 56 +++++++++++++++++++++++-- lib/std/Target/Query.zig | 1 + lib/std/builtin.zig | 4 ++ lib/std/zig/AstGen.zig | 16 +++++++ lib/std/zig/Zir.zig | 6 ++- lib/std/zig/llvm/Builder.zig | 10 ++++- lib/std/zig/target.zig | 4 ++ src/Air.zig | 4 ++ src/InternPool.zig | 32 ++++++++++++++ src/Sema.zig | 5 +++ src/Type.zig | 10 +++++ src/Zcu.zig | 6 +++ src/codegen/c.zig | 7 ++++ src/codegen/c/Type.zig | 54 +++++++++++++++++++++++- src/codegen/llvm.zig | 10 +++++ src/target.zig | 4 ++ tools/update_cpu_features.zig | 4 ++ 18 files changed, 229 insertions(+), 8 deletions(-) diff --git a/lib/compiler/translate-c/Translator.zig b/lib/compiler/translate-c/Translator.zig index b630584eb308..87de2d263109 100644 --- a/lib/compiler/translate-c/Translator.zig +++ b/lib/compiler/translate-c/Translator.zig @@ -378,8 +378,12 @@ pub const builtin_typedef_map = std.StaticStringMap([]const u8).initComptime(.{ .{ "int8_t", "i8" }, .{ "uint16_t", "u16" }, .{ "int16_t", "i16" }, + .{ "uint24_t", "u24" }, + .{ "int24_t", "i24" }, .{ "uint32_t", "u32" }, .{ "int32_t", "i32" }, + .{ "uint48_t", "u48" }, + .{ "int48_t", "i48" }, .{ "uint64_t", "u64" }, .{ "int64_t", "i64" }, .{ "intptr_t", "isize" }, diff --git a/lib/std/Target.zig b/lib/std/Target.zig index 26cff86ecd2e..45059b1b5167 100644 --- a/lib/std/Target.zig +++ b/lib/std/Target.zig @@ -68,6 +68,8 @@ pub const Os = struct { opengl, vulkan, + tios, + // LLVM tags deliberately omitted: // - bridgeos // - cheriotrtos @@ -205,6 +207,8 @@ pub const Os = struct { .opencl, .opengl, .vulkan, + + .tios, => .semver, .hurd => .hurd, @@ -659,6 +663,12 @@ pub const Os = struct { .max = .{ .major = 4, .minor = 6, .patch = 0 }, }, }, + .tios => .{ + .semver = .{ + .min = .{ .major = 5, .minor = 0, .patch = 0 }, + .max = .{ .major = 5, .minor = 8, .patch = 4 }, + }, + }, .vulkan => .{ .semver = .{ .min = .{ .major = 1, .minor = 2, .patch = 0 }, @@ -723,6 +733,7 @@ pub const arm = @import("Target/arm.zig"); pub const avr = @import("Target/avr.zig"); pub const bpf = @import("Target/bpf.zig"); pub const csky = @import("Target/csky.zig"); +pub const ez80 = @import("Target/generic.zig"); pub const hexagon = @import("Target/hexagon.zig"); pub const hppa = @import("Target/generic.zig"); pub const kalimba = @import("Target/generic.zig"); @@ -932,6 +943,7 @@ pub const Abi = enum { .opencl, .opengl, .vulkan, + .tios, => .none, }; } @@ -1088,6 +1100,7 @@ pub fn toElfMachine(target: *const Target) std.elf.EM { .xcore => .XCORE, .xtensa, .xtensaeb => .XTENSA, + .ez80, .nvptx, .nvptx64, .spirv32, @@ -1125,6 +1138,7 @@ pub fn toCoffMachine(target: *const Target) std.coff.IMAGE.FILE.MACHINE { .bpfeb, .bpfel, .csky, + .ez80, .hexagon, .hppa, .hppa64, @@ -1338,6 +1352,7 @@ pub const Cpu = struct { bpfeb, bpfel, csky, + ez80, hexagon, hppa, hppa64, @@ -1437,6 +1452,7 @@ pub const Cpu = struct { x86, xcore, xtensa, + z80, }; pub inline fn family(arch: Arch) Family { @@ -1449,6 +1465,7 @@ pub const Cpu = struct { .avr => .avr, .bpfeb, .bpfel => .bpf, .csky => .csky, + .ez80 => .z80, .hexagon => .hexagon, .hppa, .hppa64 => .hppa, .kalimba => .kalimba, @@ -1676,6 +1693,7 @@ pub const Cpu = struct { .x86_64, .xcore, .xtensa, + .ez80, => .little, .aarch64_be, @@ -1715,6 +1733,7 @@ pub const Cpu = struct { /// All CPU features Zig is aware of, sorted lexicographically by name. pub fn allFeaturesList(arch: Arch) []const Cpu.Feature { return switch (arch.family()) { + .z80 => &Target.ez80.all_features, inline else => |f| &@field(Target, @tagName(f)).all_features, }; } @@ -1722,6 +1741,7 @@ pub const Cpu = struct { /// All processors Zig is aware of, sorted lexicographically by name. pub fn allCpuModels(arch: Arch) []const *const Cpu.Model { return switch (arch.family()) { + .z80 => comptime allCpusFromDecls(Target.ez80.cpu), inline else => |f| comptime allCpusFromDecls(@field(Target, @tagName(f)).cpu), }; } @@ -1942,6 +1962,10 @@ pub const Cpu = struct { .spirv_fragment, .spirv_vertex, => &.{ .spirv32, .spirv64 }, + + .ez80_ti, + .ez80_tiflags, + => &.{.ez80}, }; } }; @@ -1968,6 +1992,7 @@ pub const Cpu = struct { return switch (arch) { .amdgcn => &amdgcn.cpu.gfx600, .avr => &avr.cpu.avr1, + .ez80 => &ez80.cpu.generic, .loongarch32 => &loongarch.cpu.generic_la32, .loongarch64 => &loongarch.cpu.generic_la64, .mips, .mipsel => &mips.cpu.mips32, @@ -2211,6 +2236,7 @@ pub fn requiresLibC(target: *const Target) bool { .plan9, .other, .@"3ds", + .tios, => false, }; } @@ -2373,6 +2399,8 @@ pub const DynamicLinker = struct { .ps4, .ps5, .vita, + + .tios, => .none, }; } @@ -2782,6 +2810,8 @@ pub const DynamicLinker = struct { .opencl, .opengl, .vulkan, + + .tios, => none, // TODO go over each item in this list and either move it to the above list, or @@ -2816,6 +2846,9 @@ pub fn ptrBitWidth_arch_abi(cpu_arch: Cpu.Arch, abi: Abi) u16 { .x86_16, => 16, + .ez80, + => 24, + .arc, .arceb, .arm, @@ -2883,6 +2916,8 @@ pub fn ptrBitWidth(target: *const Target) u16 { pub fn stackAlignment(target: *const Target) u16 { // Overrides for when the stack alignment is not equal to the pointer width. switch (target.cpu.arch) { + .ez80, + => return 1, .m68k, => return 2, .amdgcn, @@ -2962,6 +2997,7 @@ pub fn cCharSignedness(target: *const Target) std.builtin.Signedness { .arc, .arceb, .csky, + .ez80, .hexagon, .msp430, .powerpc, @@ -3333,6 +3369,13 @@ pub fn cTypeBitSize(target: *const Target, c_type: CType) u16 { .long, .ulong => return 64, .longlong, .ulonglong, .double, .longdouble => return 64, }, + .tios => switch (c_type) { + .char => return 8, + .short, .ushort => return 16, + .int, .uint => return 24, + .long, .ulong, .float, .double => return 32, + .longlong, .ulonglong, .longdouble => return 64, + }, .ps3, .contiki, @@ -3345,7 +3388,7 @@ pub fn cTypeBitSize(target: *const Target, c_type: CType) u16 { pub fn cTypeAlignment(target: *const Target, c_type: CType) u16 { // Overrides for unusual alignments switch (target.cpu.arch) { - .avr => return 1, + .avr, .ez80 => return 1, .x86 => switch (target.os.tag) { .windows, .uefi => switch (c_type) { .longlong, .ulonglong, .double => return 8, @@ -3382,6 +3425,8 @@ pub fn cTypeAlignment(target: *const Target, c_type: CType) u16 { return @min( std.math.ceilPowerOfTwoAssert(u16, (cTypeBitSize(target, c_type) + 7) / 8), @as(u16, switch (target.cpu.arch) { + .ez80 => 1, + .msp430, .x86_16, => 2, @@ -3459,7 +3504,7 @@ pub fn cTypePreferredAlignment(target: *const Target, c_type: CType) u16 { .longdouble => return 4, else => {}, }, - .avr => return 1, + .avr, .ez80 => return 1, .x86 => switch (target.os.tag) { .windows, .uefi => switch (c_type) { .longdouble => switch (target.abi) { @@ -3491,6 +3536,8 @@ pub fn cTypePreferredAlignment(target: *const Target, c_type: CType) u16 { return @min( std.math.ceilPowerOfTwoAssert(u16, (cTypeBitSize(target, c_type) + 7) / 8), @as(u16, switch (target.cpu.arch) { + .ez80 => 1, + .x86_16, .msp430 => 2, .arc, @@ -3561,7 +3608,9 @@ pub fn cTypePreferredAlignment(target: *const Target, c_type: CType) u16 { pub fn cMaxIntAlignment(target: *const Target) u16 { return switch (target.cpu.arch) { - .avr => 1, + .avr, + .ez80, + => 1, .msp430, .x86_16 => 2, @@ -3698,6 +3747,7 @@ pub fn cCallingConvention(target: *const Target) ?std.builtin.CallingConvention .amdgcn => .{ .amdgcn_device = .{} }, .nvptx, .nvptx64 => .nvptx_device, .spirv32, .spirv64 => .spirv_device, + .ez80 => .ez80_ti, }; } diff --git a/lib/std/Target/Query.zig b/lib/std/Target/Query.zig index 90c127d80089..261dcccd4168 100644 --- a/lib/std/Target/Query.zig +++ b/lib/std/Target/Query.zig @@ -209,6 +209,7 @@ pub const ParseOptions = struct { }; pub fn parse(args: ParseOptions) !Query { + @setEvalBranchQuota(20000); var dummy_diags: ParseOptions.Diagnostics = undefined; const diags = args.diagnostics orelse &dummy_diags; diff --git a/lib/std/builtin.zig b/lib/std/builtin.zig index c0be44b939c7..41d85a6a8691 100644 --- a/lib/std/builtin.zig +++ b/lib/std/builtin.zig @@ -377,6 +377,10 @@ pub const CallingConvention = union(enum(u8)) { spirv_fragment, spirv_vertex, + // Calling conventions for the `ez80` architecture. + ez80_ti, + ez80_tiflags, + /// Options shared across most calling conventions. pub const CommonOptions = struct { /// The boundary the stack is aligned to when the function is called. diff --git a/lib/std/zig/AstGen.zig b/lib/std/zig/AstGen.zig index 8a8a88db6f93..10835ec447f3 100644 --- a/lib/std/zig/AstGen.zig +++ b/lib/std/zig/AstGen.zig @@ -10300,7 +10300,9 @@ const primitive_instrs = std.StaticStringMap(Zir.Inst.Ref).initComptime(.{ .{ "f80", .f80_type }, .{ "false", .bool_false }, .{ "i16", .i16_type }, + .{ "i24", .i24_type }, .{ "i32", .i32_type }, + .{ "i48", .i48_type }, .{ "i64", .i64_type }, .{ "i128", .i128_type }, .{ "i8", .i8_type }, @@ -10310,8 +10312,10 @@ const primitive_instrs = std.StaticStringMap(Zir.Inst.Ref).initComptime(.{ .{ "true", .bool_true }, .{ "type", .type_type }, .{ "u16", .u16_type }, + .{ "u24", .u24_type }, .{ "u29", .u29_type }, .{ "u32", .u32_type }, + .{ "u48", .u48_type }, .{ "u64", .u64_type }, .{ "u128", .u128_type }, .{ "u1", .u1_type }, @@ -10789,15 +10793,19 @@ fn nodeImpliesMoreThanOnePossibleValue(tree: *const Ast, start_node: Ast.Node.In .f80_type, .f128_type, .i16_type, + .i24_type, .i32_type, + .i48_type, .i64_type, .i128_type, .i8_type, .isize_type, .type_type, .u16_type, + .u24_type, .u29_type, .u32_type, + .u48_type, .u64_type, .u128_type, .u1_type, @@ -11026,14 +11034,18 @@ fn nodeImpliesComptimeOnly(tree: *const Ast, start_node: Ast.Node.Index) bool { .f80_type, .f128_type, .i16_type, + .i24_type, .i32_type, + .i48_type, .i64_type, .i128_type, .i8_type, .isize_type, .u16_type, + .u24_type, .u29_type, .u32_type, + .u48_type, .u64_type, .u128_type, .u1_type, @@ -11152,8 +11164,12 @@ fn rvalueInner( as_ty | @intFromEnum(Zir.Inst.Ref.u16_type), as_ty | @intFromEnum(Zir.Inst.Ref.u29_type), as_ty | @intFromEnum(Zir.Inst.Ref.i16_type), + as_ty | @intFromEnum(Zir.Inst.Ref.u24_type), + as_ty | @intFromEnum(Zir.Inst.Ref.i24_type), as_ty | @intFromEnum(Zir.Inst.Ref.u32_type), as_ty | @intFromEnum(Zir.Inst.Ref.i32_type), + as_ty | @intFromEnum(Zir.Inst.Ref.u48_type), + as_ty | @intFromEnum(Zir.Inst.Ref.i48_type), as_ty | @intFromEnum(Zir.Inst.Ref.u64_type), as_ty | @intFromEnum(Zir.Inst.Ref.i64_type), as_ty | @intFromEnum(Zir.Inst.Ref.u128_type), diff --git a/lib/std/zig/Zir.zig b/lib/std/zig/Zir.zig index 8d57dbda7aec..7f9b3fca270f 100644 --- a/lib/std/zig/Zir.zig +++ b/lib/std/zig/Zir.zig @@ -2145,7 +2145,7 @@ pub const Inst = struct { ref_start_index = static_len, _, - pub const static_len = 124; + pub const static_len = 128; pub fn toRef(i: Index) Inst.Ref { return @enumFromInt(@intFromEnum(Index.ref_start_index) + @intFromEnum(i)); @@ -2185,9 +2185,13 @@ pub const Inst = struct { i8_type, u16_type, i16_type, + u24_type, + i24_type, u29_type, u32_type, i32_type, + u48_type, + i48_type, u64_type, i64_type, u80_type, diff --git a/lib/std/zig/llvm/Builder.zig b/lib/std/zig/llvm/Builder.zig index 3bad020b9a8f..ce5f2654ea50 100644 --- a/lib/std/zig/llvm/Builder.zig +++ b/lib/std/zig/llvm/Builder.zig @@ -234,8 +234,10 @@ pub const Type = enum(u32) { i1, i8, i16, + i24, i29, i32, + i48, i64, i80, i128, @@ -368,7 +370,7 @@ pub const Type = enum(u32) { pub fn isInteger(self: Type, builder: *const Builder) bool { return switch (self) { - .i1, .i8, .i16, .i29, .i32, .i64, .i80, .i128 => true, + .i1, .i8, .i16, .i24, .i29, .i32, .i48, .i64, .i80, .i128 => true, else => switch (self.tag(builder)) { .integer => true, else => false, @@ -478,8 +480,10 @@ pub const Type = enum(u32) { .i1 => 1, .i8 => 8, .half, .bfloat, .i16 => 16, + .i24 => 24, .i29 => 29, .float, .i32 => 32, + .i48 => 48, .double, .i64, .x86_mmx => 64, .x86_fp80, .i80 => 80, .fp128, .ppc_fp128, .i128 => 128, @@ -875,8 +879,10 @@ pub const Type = enum(u32) { .i1, .i8, .i16, + .i24, .i29, .i32, + .i48, .i64, .i80, .i128, @@ -8738,7 +8744,7 @@ pub fn init(options: Options) Allocator.Error!Builder { ); assert(result.new and result.type == @field(Type, simple_field.name)); } - inline for (.{ 1, 8, 16, 29, 32, 64, 80, 128 }) |bits| + inline for (.{ 1, 8, 16, 24, 29, 32, 48, 64, 80, 128 }) |bits| assert(self.intTypeAssumeCapacity(bits) == @field(Type, std.fmt.comptimePrint("i{d}", .{bits}))); inline for (.{ 0, 4 }) |addr_space_index| { diff --git a/lib/std/zig/target.zig b/lib/std/zig/target.zig index 13eb7f8e2847..70aada0794cc 100644 --- a/lib/std/zig/target.zig +++ b/lib/std/zig/target.zig @@ -498,6 +498,10 @@ pub fn intAlignment(target: *const std.Target, bits: u16) u16 { 33...64 => 8, else => 16, }, + .ez80 => switch (bits) { + 0 => 0, + else => 1, + }, else => return @min( std.math.ceilPowerOfTwoPromote(u16, @as(u16, @intCast((@as(u17, bits) + 7) / 8))), target.cMaxIntAlignment(), diff --git a/src/Air.zig b/src/Air.zig index 1b394ca1c161..aa0d2b2758c9 100644 --- a/src/Air.zig +++ b/src/Air.zig @@ -990,9 +990,13 @@ pub const Inst = struct { i8_type = @intFromEnum(InternPool.Index.i8_type), u16_type = @intFromEnum(InternPool.Index.u16_type), i16_type = @intFromEnum(InternPool.Index.i16_type), + u24_type = @intFromEnum(InternPool.Index.u24_type), + i24_type = @intFromEnum(InternPool.Index.i24_type), u29_type = @intFromEnum(InternPool.Index.u29_type), u32_type = @intFromEnum(InternPool.Index.u32_type), i32_type = @intFromEnum(InternPool.Index.i32_type), + u48_type = @intFromEnum(InternPool.Index.u48_type), + i48_type = @intFromEnum(InternPool.Index.i48_type), u64_type = @intFromEnum(InternPool.Index.u64_type), i64_type = @intFromEnum(InternPool.Index.i64_type), u80_type = @intFromEnum(InternPool.Index.u80_type), diff --git a/src/InternPool.zig b/src/InternPool.zig index a595fa502c0b..a9380a0bcc8f 100644 --- a/src/InternPool.zig +++ b/src/InternPool.zig @@ -4597,9 +4597,13 @@ pub const Index = enum(u32) { i8_type, u16_type, i16_type, + u24_type, + i24_type, u29_type, u32_type, i32_type, + u48_type, + i48_type, u64_type, i64_type, u80_type, @@ -5069,6 +5073,16 @@ pub const static_keys: [static_len]Key = .{ .bits = 16, } }, + .{ .int_type = .{ + .signedness = .unsigned, + .bits = 24, + } }, + + .{ .int_type = .{ + .signedness = .signed, + .bits = 24, + } }, + .{ .int_type = .{ .signedness = .unsigned, .bits = 29, @@ -5084,6 +5098,16 @@ pub const static_keys: [static_len]Key = .{ .bits = 32, } }, + .{ .int_type = .{ + .signedness = .unsigned, + .bits = 48, + } }, + + .{ .int_type = .{ + .signedness = .signed, + .bits = 48, + } }, + .{ .int_type = .{ .signedness = .unsigned, .bits = 64, @@ -11973,9 +11997,13 @@ pub fn typeOf(ip: *const InternPool, index: Index) Index { .i8_type, .u16_type, .i16_type, + .u24_type, + .i24_type, .u29_type, .u32_type, .i32_type, + .u48_type, + .i48_type, .u64_type, .i64_type, .u80_type, @@ -12310,9 +12338,13 @@ pub fn zigTypeTag(ip: *const InternPool, index: Index) std.builtin.TypeId { .i8_type, .u16_type, .i16_type, + .u24_type, + .i24_type, .u29_type, .u32_type, .i32_type, + .u48_type, + .i48_type, .u64_type, .i64_type, .u80_type, diff --git a/src/Sema.zig b/src/Sema.zig index 341cb1c85523..d2b571248c0f 100644 --- a/src/Sema.zig +++ b/src/Sema.zig @@ -26281,6 +26281,7 @@ fn validateExternType( }, .int => switch (ty.intInfo(zcu).bits) { 0, 8, 16, 32, 64, 128 => return true, + 24, 48 => return sema.pt.zcu.getTarget().cpu.arch == .ez80, else => return false, }, .@"fn" => { @@ -36069,9 +36070,13 @@ pub fn typeHasOnePossibleValue(sema: *Sema, ty: Type) CompileError!?Value { .i8_type, .u16_type, .i16_type, + .u24_type, + .i24_type, .u29_type, .u32_type, .i32_type, + .u48_type, + .i48_type, .u64_type, .i64_type, .u80_type, diff --git a/src/Type.zig b/src/Type.zig index f3f5c9949179..2d73a77b89d9 100644 --- a/src/Type.zig +++ b/src/Type.zig @@ -1603,6 +1603,8 @@ fn abiSizeInnerOptional( } pub fn ptrAbiAlignment(target: *const Target) Alignment { + // ez80 has 24-bit pointers, and the alignment of pointers is 1. + if (target.cpu.arch == .ez80) return .fromByteUnits(1); return Alignment.fromNonzeroByteUnits(@divExact(target.ptrBitWidth(), 8)); } @@ -3626,9 +3628,13 @@ pub fn resolveFields(ty: Type, pt: Zcu.PerThread) SemaError!void { .i8_type, .u16_type, .i16_type, + .u24_type, + .i24_type, .u29_type, .u32_type, .i32_type, + .u48_type, + .i48_type, .u64_type, .i64_type, .u80_type, @@ -4051,8 +4057,10 @@ pub fn isNullFromType(ty: Type, zcu: *const Zcu) ?bool { pub const @"u1": Type = .{ .ip_index = .u1_type }; pub const @"u8": Type = .{ .ip_index = .u8_type }; pub const @"u16": Type = .{ .ip_index = .u16_type }; +pub const @"u24": Type = .{ .ip_index = .u24_type }; pub const @"u29": Type = .{ .ip_index = .u29_type }; pub const @"u32": Type = .{ .ip_index = .u32_type }; +pub const @"u48": Type = .{ .ip_index = .u48_type }; pub const @"u64": Type = .{ .ip_index = .u64_type }; pub const @"u80": Type = .{ .ip_index = .u80_type }; pub const @"u128": Type = .{ .ip_index = .u128_type }; @@ -4060,7 +4068,9 @@ pub const @"u256": Type = .{ .ip_index = .u256_type }; pub const @"i8": Type = .{ .ip_index = .i8_type }; pub const @"i16": Type = .{ .ip_index = .i16_type }; +pub const @"i24": Type = .{ .ip_index = .i24_type }; pub const @"i32": Type = .{ .ip_index = .i32_type }; +pub const @"i48": Type = .{ .ip_index = .i48_type }; pub const @"i64": Type = .{ .ip_index = .i64_type }; pub const @"i128": Type = .{ .ip_index = .i128_type }; diff --git a/src/Zcu.zig b/src/Zcu.zig index 443194878175..0e1bfe0d9fd4 100644 --- a/src/Zcu.zig +++ b/src/Zcu.zig @@ -3836,6 +3836,10 @@ pub fn atomicPtrAlignment( ) AtomicPtrAlignmentError!Alignment { const target = zcu.getTarget(); const max_atomic_bits: u16 = switch (target.cpu.arch) { + // TODO: Determine whether the eZ80 supports atomic ops + .ez80, + => 8, + .aarch64, .aarch64_be, => 128, @@ -4465,6 +4469,8 @@ pub fn callconvSupported(zcu: *Zcu, cc: std.builtin.CallingConvention) union(enu .avr_signal, => true, + .ez80_tiflags => true, + .naked => true, else => false, diff --git a/src/codegen/c.zig b/src/codegen/c.zig index b86e0b583f57..7f6e5331411f 100644 --- a/src/codegen/c.zig +++ b/src/codegen/c.zig @@ -281,7 +281,9 @@ const reserved_idents = std.StaticStringMap(void).initComptime(.{ .{ "inline", {} }, .{ "int", {} }, .{ "int16_t", {} }, + .{ "int24_t", {} }, .{ "int32_t", {} }, + .{ "int48_t", {} }, .{ "int64_t", {} }, .{ "int8_t", {} }, .{ "intptr_t", {} }, @@ -303,7 +305,9 @@ const reserved_idents = std.StaticStringMap(void).initComptime(.{ .{ "typedef", {} }, .{ "typeof", {} }, .{ "uint16_t", {} }, + .{ "uint24_t", {} }, .{ "uint32_t", {} }, + .{ "uint48_t", {} }, .{ "uint64_t", {} }, .{ "uint8_t", {} }, .{ "uintptr_t", {} }, @@ -8134,6 +8138,9 @@ fn toCallingConvention(cc: std.builtin.CallingConvention, zcu: *Zcu) ?[]const u8 .x86_64_interrupt, => "interrupt", + .ez80_tiflags, + => "__tiflags__", + else => unreachable, // `Zcu.callconvSupported` }; } diff --git a/src/codegen/c/Type.zig b/src/codegen/c/Type.zig index fa4db36a0c69..737e0792d616 100644 --- a/src/codegen/c/Type.zig +++ b/src/codegen/c/Type.zig @@ -6,8 +6,12 @@ pub const @"i8": CType = .{ .index = .int8_t }; pub const @"u8": CType = .{ .index = .uint8_t }; pub const @"i16": CType = .{ .index = .int16_t }; pub const @"u16": CType = .{ .index = .uint16_t }; +pub const @"u24": CType = .{ .index = .uint24_t }; +pub const @"i24": CType = .{ .index = .int24_t }; pub const @"i32": CType = .{ .index = .int32_t }; pub const @"u32": CType = .{ .index = .uint32_t }; +pub const @"i48": CType = .{ .index = .int48_t }; +pub const @"u48": CType = .{ .index = .uint48_t }; pub const @"i64": CType = .{ .index = .int64_t }; pub const @"u64": CType = .{ .index = .uint64_t }; pub const @"i128": CType = .{ .index = .zig_i128 }; @@ -63,8 +67,12 @@ pub fn isInteger(ctype: CType) bool { .int8_t, .uint16_t, .int16_t, + .uint24_t, + .int24_t, .uint32_t, .int32_t, + .uint48_t, + .int48_t, .uint64_t, .int64_t, .uintptr_t, @@ -87,7 +95,9 @@ pub fn signedness(ctype: CType, mod: *Module) std.builtin.Signedness { .ptrdiff_t, .int8_t, .int16_t, + .int24_t, .int32_t, + .int48_t, .int64_t, .intptr_t, .zig_i128, @@ -100,7 +110,9 @@ pub fn signedness(ctype: CType, mod: *Module) std.builtin.Signedness { .size_t, .uint8_t, .uint16_t, + .uint24_t, .uint32_t, + .uint48_t, .uint64_t, .uintptr_t, .zig_u128, @@ -135,7 +147,9 @@ pub fn toSigned(ctype: CType) CType { .size_t, .ptrdiff_t => .{ .index = .ptrdiff_t }, .uint8_t, .int8_t => .{ .index = .int8_t }, .uint16_t, .int16_t => .{ .index = .int16_t }, + .uint24_t, .int24_t => .{ .index = .int24_t }, .uint32_t, .int32_t => .{ .index = .int32_t }, + .uint48_t, .int48_t => .{ .index = .int48_t }, .uint64_t, .int64_t => .{ .index = .int64_t }, .uintptr_t, .intptr_t => .{ .index = .intptr_t }, .zig_u128, .zig_i128 => .{ .index = .zig_i128 }, @@ -162,7 +176,9 @@ pub fn toUnsigned(ctype: CType) CType { .size_t, .ptrdiff_t => .{ .index = .size_t }, .uint8_t, .int8_t => .{ .index = .uint8_t }, .uint16_t, .int16_t => .{ .index = .uint16_t }, + .uint24_t, .int24_t => .{ .index = .uint24_t }, .uint32_t, .int32_t => .{ .index = .uint32_t }, + .uint48_t, .int48_t => .{ .index = .uint48_t }, .uint64_t, .int64_t => .{ .index = .uint64_t }, .uintptr_t, .intptr_t => .{ .index = .uintptr_t }, .zig_u128, .zig_i128 => .{ .index = .zig_u128 }, @@ -228,8 +244,12 @@ pub fn getStandardDefineAbbrev(ctype: CType) ?[]const u8 { .int8_t => "INT8", .uint16_t => "UINT16", .int16_t => "INT16", + .uint24_t => "UINT24", + .int24_t => "INT24", .uint32_t => "UINT32", .int32_t => "INT32", + .uint48_t => "UINT48", + .int48_t => "INT48", .uint64_t => "UINT64", .int64_t => "INT64", .uintptr_t => "UINTPTR", @@ -271,8 +291,12 @@ pub fn renderLiteralPrefix(ctype: CType, w: *Writer, kind: Kind, pool: *const Po .int8_t, .uint16_t, .int16_t, + .uint24_t, + .int24_t, .uint32_t, .int32_t, + .uint48_t, + .int48_t, .uint64_t, .int64_t, => try w.print("{s}_C(", .{ctype.getStandardDefineAbbrev().?}), @@ -331,8 +355,12 @@ pub fn renderLiteralSuffix(ctype: CType, w: *Writer, pool: *const Pool) Writer.E .int8_t, .uint16_t, .int16_t, + .uint24_t, + .int24_t, .uint32_t, .int32_t, + .uint48_t, + .int48_t, .uint64_t, .int64_t, .zig_u128, @@ -390,7 +418,9 @@ pub fn byteSize(ctype: CType, pool: *const Pool, mod: *Module) u64 { .intptr_t, => @divExact(target.ptrBitWidth(), 8), .uint16_t, .int16_t, .zig_f16 => 2, + .uint24_t, .int24_t => 3, .uint32_t, .int32_t, .zig_f32 => 4, + .uint48_t, .int48_t => 6, .uint64_t, .int64_t, .zig_f64 => 8, .zig_u128, .zig_i128, .zig_f128 => 16, .zig_f80 => if (target.cTypeBitSize(.longdouble) == 80) @@ -707,6 +737,12 @@ const Index = enum(u32) { zig_f128, zig_c_longdouble, + // ez80 stdint.h + uint24_t, + int24_t, + uint48_t, + int48_t, + _, const first_pool_index: u32 = @typeInfo(CType.Index).@"enum".fields.len; @@ -1346,6 +1382,7 @@ pub const Pool = struct { mod: *Module, kind: Kind, ) !CType { + const is_ez80 = mod.resolved_target.result.cpu.arch == .ez80; switch (int_info.bits) { 0 => return .void, 1...8 => switch (int_info.signedness) { @@ -1356,11 +1393,19 @@ pub const Pool = struct { .signed => return .i16, .unsigned => return .u16, }, - 17...32 => switch (int_info.signedness) { + 17...24 => switch (int_info.signedness) { + .signed => return if (is_ez80) .i24 else .i32, + .unsigned => return if (is_ez80) .u24 else .u32, + }, + 25...32 => switch (int_info.signedness) { .signed => return .i32, .unsigned => return .u32, }, - 33...64 => switch (int_info.signedness) { + 33...48 => switch (int_info.signedness) { + .signed => return if (is_ez80) .i48 else .i64, + .unsigned => return if (is_ez80) .u48 else .u64, + }, + 49...64 => switch (int_info.signedness) { .signed => return .i64, .unsigned => return .u64, }, @@ -1404,6 +1449,7 @@ pub const Pool = struct { ) !CType { const ip = &pt.zcu.intern_pool; const zcu = pt.zcu; + const is_ez80 = zcu.getTarget().cpu.arch == .ez80; switch (ty.toIntern()) { .u0_type, .i0_type, @@ -1421,8 +1467,12 @@ pub const Pool = struct { .i8_type => return .i8, .u16_type => return .u16, .i16_type => return .i16, + .u24_type => return if (is_ez80) .u24 else .u32, + .i24_type => return if (is_ez80) .i24 else .i32, .u29_type, .u32_type => return .u32, .i32_type => return .i32, + .u48_type => return if (is_ez80) .u48 else .u64, + .i48_type => return if (is_ez80) .i48 else .i64, .u64_type => return .u64, .i64_type => return .i64, .u80_type, .u128_type => return .u128, diff --git a/src/codegen/llvm.zig b/src/codegen/llvm.zig index 824295807317..85460ee2ae3e 100644 --- a/src/codegen/llvm.zig +++ b/src/codegen/llvm.zig @@ -110,6 +110,7 @@ pub fn targetTriple(allocator: Allocator, target: *const std.Target) ![]const u8 .arceb, .hppa, .hppa64, + .ez80, .kalimba, .microblaze, .microblazeel, @@ -246,6 +247,7 @@ pub fn targetTriple(allocator: Allocator, target: *const std.Target) ![]const u8 .opengl, .plan9, .contiki, + .tios, .other, => "unknown", }; @@ -487,6 +489,7 @@ pub fn dataLayout(target: *const std.Target) []const u8 { .arceb, .hppa, .hppa64, + .ez80, .kalimba, .microblaze, .microblazeel, @@ -3096,9 +3099,13 @@ pub const Object = struct { .i8_type, .u16_type, .i16_type, + .u24_type, + .i24_type, .u29_type, .u32_type, .i32_type, + .u48_type, + .i48_type, .u64_type, .i64_type, .u80_type, @@ -11965,6 +11972,8 @@ fn toLlvmCallConvTag(cc_tag: std.builtin.CallingConvention.Tag, target: *const s .spirv_kernel, .spirv_fragment, .spirv_vertex, + .ez80_ti, + .ez80_tiflags, => null, }; } @@ -13139,6 +13148,7 @@ pub fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void { .sheb, .x86_16, .xtensaeb, + .ez80, => unreachable, } } diff --git a/src/target.zig b/src/target.zig index fd7536f7ecb8..620f6aa078bf 100644 --- a/src/target.zig +++ b/src/target.zig @@ -215,6 +215,10 @@ pub fn hasLlvmSupport(target: *const std.Target, ofmt: std.Target.ObjectFormat) .xtensa, => false, + // Third-party LLVM backend exists. + .ez80, + => false, + // No LLVM backend exists. .alpha, .arceb, diff --git a/tools/update_cpu_features.zig b/tools/update_cpu_features.zig index 29877fff15c8..4edfc280e06b 100644 --- a/tools/update_cpu_features.zig +++ b/tools/update_cpu_features.zig @@ -966,6 +966,10 @@ const targets = [_]ArchTarget{ .td_name = "CSKY", }, }, + .{ + .zig_name = "ez80", + .llvm = null, + }, .{ .zig_name = "hexagon", .llvm = .{ From 17e6d01bd6522b592a704a5aa0f1f06466130d6a Mon Sep 17 00:00:00 2001 From: Sam Connelly Date: Thu, 23 Oct 2025 19:16:54 -0400 Subject: [PATCH 02/24] ez80_sysv -> ez80_cet --- lib/std/Target.zig | 4 ++-- lib/std/builtin.zig | 2 +- src/codegen/llvm.zig | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/lib/std/Target.zig b/lib/std/Target.zig index 45059b1b5167..157cf3977b93 100644 --- a/lib/std/Target.zig +++ b/lib/std/Target.zig @@ -1963,7 +1963,7 @@ pub const Cpu = struct { .spirv_vertex, => &.{ .spirv32, .spirv64 }, - .ez80_ti, + .ez80_cet, .ez80_tiflags, => &.{.ez80}, }; @@ -3747,7 +3747,7 @@ pub fn cCallingConvention(target: *const Target) ?std.builtin.CallingConvention .amdgcn => .{ .amdgcn_device = .{} }, .nvptx, .nvptx64 => .nvptx_device, .spirv32, .spirv64 => .spirv_device, - .ez80 => .ez80_ti, + .ez80 => .ez80_cet, }; } diff --git a/lib/std/builtin.zig b/lib/std/builtin.zig index 41d85a6a8691..beecba4b8cef 100644 --- a/lib/std/builtin.zig +++ b/lib/std/builtin.zig @@ -378,7 +378,7 @@ pub const CallingConvention = union(enum(u8)) { spirv_vertex, // Calling conventions for the `ez80` architecture. - ez80_ti, + ez80_cet, ez80_tiflags, /// Options shared across most calling conventions. diff --git a/src/codegen/llvm.zig b/src/codegen/llvm.zig index 85460ee2ae3e..96671b7dbdd5 100644 --- a/src/codegen/llvm.zig +++ b/src/codegen/llvm.zig @@ -11972,7 +11972,7 @@ fn toLlvmCallConvTag(cc_tag: std.builtin.CallingConvention.Tag, target: *const s .spirv_kernel, .spirv_fragment, .spirv_vertex, - .ez80_ti, + .ez80_cet, .ez80_tiflags, => null, }; From 1e1aaa3bb7a37d4fc89913c49a8a5e977341334d Mon Sep 17 00:00:00 2001 From: Sam Connelly Date: Thu, 23 Oct 2025 19:40:04 -0400 Subject: [PATCH 03/24] Update tools/update-cpu-features.zig --- tools/update_cpu_features.zig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/update_cpu_features.zig b/tools/update_cpu_features.zig index 4edfc280e06b..82f8645245f6 100644 --- a/tools/update_cpu_features.zig +++ b/tools/update_cpu_features.zig @@ -967,7 +967,7 @@ const targets = [_]ArchTarget{ }, }, .{ - .zig_name = "ez80", + .zig_name = "z80", .llvm = null, }, .{ From fe6e64588b145f22d0049ec4d1a1688d1eb8e867 Mon Sep 17 00:00:00 2001 From: Sam Connelly Date: Thu, 23 Oct 2025 19:43:27 -0400 Subject: [PATCH 04/24] update lib/std/Target.zig --- lib/std/Target.zig | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/lib/std/Target.zig b/lib/std/Target.zig index 157cf3977b93..66e08107562e 100644 --- a/lib/std/Target.zig +++ b/lib/std/Target.zig @@ -733,7 +733,6 @@ pub const arm = @import("Target/arm.zig"); pub const avr = @import("Target/avr.zig"); pub const bpf = @import("Target/bpf.zig"); pub const csky = @import("Target/csky.zig"); -pub const ez80 = @import("Target/generic.zig"); pub const hexagon = @import("Target/hexagon.zig"); pub const hppa = @import("Target/generic.zig"); pub const kalimba = @import("Target/generic.zig"); @@ -757,6 +756,7 @@ pub const wasm = @import("Target/wasm.zig"); pub const x86 = @import("Target/x86.zig"); pub const xcore = @import("Target/xcore.zig"); pub const xtensa = @import("Target/xtensa.zig"); +pub const z80 = @import("Target/generic.zig"); pub const Abi = enum { none, @@ -1733,7 +1733,6 @@ pub const Cpu = struct { /// All CPU features Zig is aware of, sorted lexicographically by name. pub fn allFeaturesList(arch: Arch) []const Cpu.Feature { return switch (arch.family()) { - .z80 => &Target.ez80.all_features, inline else => |f| &@field(Target, @tagName(f)).all_features, }; } @@ -1741,7 +1740,6 @@ pub const Cpu = struct { /// All processors Zig is aware of, sorted lexicographically by name. pub fn allCpuModels(arch: Arch) []const *const Cpu.Model { return switch (arch.family()) { - .z80 => comptime allCpusFromDecls(Target.ez80.cpu), inline else => |f| comptime allCpusFromDecls(@field(Target, @tagName(f)).cpu), }; } @@ -1992,7 +1990,6 @@ pub const Cpu = struct { return switch (arch) { .amdgcn => &amdgcn.cpu.gfx600, .avr => &avr.cpu.avr1, - .ez80 => &ez80.cpu.generic, .loongarch32 => &loongarch.cpu.generic_la32, .loongarch64 => &loongarch.cpu.generic_la64, .mips, .mipsel => &mips.cpu.mips32, From 7fc9fd9103f4754b64a01886c5682515e79abeab Mon Sep 17 00:00:00 2001 From: Sam Connelly Date: Thu, 23 Oct 2025 20:04:22 -0400 Subject: [PATCH 05/24] update again --- lib/std/Target.zig | 3 +-- src/Zcu.zig | 1 - src/codegen/llvm.zig | 10 +++++----- 3 files changed, 6 insertions(+), 8 deletions(-) diff --git a/lib/std/Target.zig b/lib/std/Target.zig index 66e08107562e..e1442f05edd4 100644 --- a/lib/std/Target.zig +++ b/lib/std/Target.zig @@ -1076,7 +1076,7 @@ pub fn toElfMachine(target: *const Target) std.elf.EM { .avr => .AVR, .bpfeb, .bpfel => .BPF, .csky => .CSKY, - .hexagon => .QDSP6, + .ez80, .hexagon => .QDSP6, .hppa, .hppa64 => .PARISC, .kalimba => .CSR_KALIMBA, .lanai => .LANAI, @@ -1100,7 +1100,6 @@ pub fn toElfMachine(target: *const Target) std.elf.EM { .xcore => .XCORE, .xtensa, .xtensaeb => .XTENSA, - .ez80, .nvptx, .nvptx64, .spirv32, diff --git a/src/Zcu.zig b/src/Zcu.zig index 0e1bfe0d9fd4..163bf67da1cb 100644 --- a/src/Zcu.zig +++ b/src/Zcu.zig @@ -3836,7 +3836,6 @@ pub fn atomicPtrAlignment( ) AtomicPtrAlignmentError!Alignment { const target = zcu.getTarget(); const max_atomic_bits: u16 = switch (target.cpu.arch) { - // TODO: Determine whether the eZ80 supports atomic ops .ez80, => 8, diff --git a/src/codegen/llvm.zig b/src/codegen/llvm.zig index 96671b7dbdd5..42b9e3ff7177 100644 --- a/src/codegen/llvm.zig +++ b/src/codegen/llvm.zig @@ -108,9 +108,9 @@ pub fn targetTriple(allocator: Allocator, target: *const std.Target) ![]const u8 .alpha, .arceb, + .ez80, .hppa, .hppa64, - .ez80, .kalimba, .microblaze, .microblazeel, @@ -487,9 +487,9 @@ pub fn dataLayout(target: *const std.Target) []const u8 { .alpha, .arceb, + .ez80, .hppa, .hppa64, - .ez80, .kalimba, .microblaze, .microblazeel, @@ -11945,6 +11945,8 @@ fn toLlvmCallConvTag(cc_tag: std.builtin.CallingConvention.Tag, target: *const s .avr_gnu, .bpf_std, .csky_sysv, + .ez80_cet, + .ez80_tiflags, .hexagon_sysv, .hexagon_sysv_hvx, .hppa_elf, @@ -11972,8 +11974,6 @@ fn toLlvmCallConvTag(cc_tag: std.builtin.CallingConvention.Tag, target: *const s .spirv_kernel, .spirv_fragment, .spirv_vertex, - .ez80_cet, - .ez80_tiflags, => null, }; } @@ -13137,6 +13137,7 @@ pub fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void { // LLVM does does not have a backend for these. .alpha, .arceb, + .ez80, .hppa, .hppa64, .kalimba, @@ -13148,7 +13149,6 @@ pub fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void { .sheb, .x86_16, .xtensaeb, - .ez80, => unreachable, } } From c42d7b340b7a7b720fef5244deb6eb95f6b7729b Mon Sep 17 00:00:00 2001 From: Sam Connelly Date: Thu, 23 Oct 2025 20:29:46 -0400 Subject: [PATCH 06/24] set machine of ez80 to Z80 --- lib/std/Target.zig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/std/Target.zig b/lib/std/Target.zig index e1442f05edd4..eec728b3a951 100644 --- a/lib/std/Target.zig +++ b/lib/std/Target.zig @@ -1116,6 +1116,7 @@ pub fn toCoffMachine(target: *const Target) std.coff.IMAGE.FILE.MACHINE { .arm => .ARM, .thumb => .ARMNT, .aarch64 => .ARM64, + .ez80 => .Z80, .loongarch32 => .LOONGARCH32, .loongarch64 => .LOONGARCH64, .mips => .R3000BE, @@ -1137,7 +1138,6 @@ pub fn toCoffMachine(target: *const Target) std.coff.IMAGE.FILE.MACHINE { .bpfeb, .bpfel, .csky, - .ez80, .hexagon, .hppa, .hppa64, From 5e275069b3437fd45c955744d1d6ba1666c1ed4b Mon Sep 17 00:00:00 2001 From: Sam Connelly Date: Thu, 23 Oct 2025 22:21:57 -0400 Subject: [PATCH 07/24] whoops --- lib/std/Target.zig | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/lib/std/Target.zig b/lib/std/Target.zig index eec728b3a951..251e4cf49246 100644 --- a/lib/std/Target.zig +++ b/lib/std/Target.zig @@ -1076,7 +1076,8 @@ pub fn toElfMachine(target: *const Target) std.elf.EM { .avr => .AVR, .bpfeb, .bpfel => .BPF, .csky => .CSKY, - .ez80, .hexagon => .QDSP6, + .ez80 => .Z80, + .hexagon => .QDSP6, .hppa, .hppa64 => .PARISC, .kalimba => .CSR_KALIMBA, .lanai => .LANAI, @@ -1116,7 +1117,6 @@ pub fn toCoffMachine(target: *const Target) std.coff.IMAGE.FILE.MACHINE { .arm => .ARM, .thumb => .ARMNT, .aarch64 => .ARM64, - .ez80 => .Z80, .loongarch32 => .LOONGARCH32, .loongarch64 => .LOONGARCH64, .mips => .R3000BE, @@ -1138,6 +1138,7 @@ pub fn toCoffMachine(target: *const Target) std.coff.IMAGE.FILE.MACHINE { .bpfeb, .bpfel, .csky, + .ez80, .hexagon, .hppa, .hppa64, From f98330341474d442627fe0bdd0f04870fac5723f Mon Sep 17 00:00:00 2001 From: Sam Connelly Date: Thu, 23 Oct 2025 23:22:03 -0400 Subject: [PATCH 08/24] Use ptrAbiAlignment in more places Should hopefully fix the alignment-related crash. --- src/Sema.zig | 8 ++++---- src/codegen/llvm.zig | 6 ++---- 2 files changed, 6 insertions(+), 8 deletions(-) diff --git a/src/Sema.zig b/src/Sema.zig index d2b571248c0f..fd9e4c094435 100644 --- a/src/Sema.zig +++ b/src/Sema.zig @@ -34389,7 +34389,7 @@ pub fn resolveStructAlignment( assert(struct_type.layout != .@"packed"); assert(struct_type.flagsUnordered(ip).alignment == .none); - const ptr_align = Alignment.fromByteUnits(@divExact(target.ptrBitWidth(), 8)); + const ptr_align = Type.ptrAbiAlignment(target); // We'll guess "pointer-aligned", if the struct has an // underaligned pointer field then some allocations @@ -34498,7 +34498,7 @@ pub fn resolveStructLayout(sema: *Sema, ty: Type) SemaError!void { } if (struct_type.flagsUnordered(ip).assumed_pointer_aligned and - big_align.compareStrict(.neq, Alignment.fromByteUnits(@divExact(zcu.getTarget().ptrBitWidth(), 8)))) + big_align.compareStrict(.neq, Type.ptrAbiAlignment(zcu.getTarget()))) { const msg = try sema.errMsg( ty.srcLoc(zcu), @@ -34734,7 +34734,7 @@ pub fn resolveUnionAlignment( assert(!union_type.haveLayout(ip)); - const ptr_align = Alignment.fromByteUnits(@divExact(target.ptrBitWidth(), 8)); + const ptr_align = Type.ptrAbiAlignment(target); // We'll guess "pointer-aligned", if the union has an // underaligned pointer field then some allocations @@ -34884,7 +34884,7 @@ pub fn resolveUnionLayout(sema: *Sema, ty: Type) SemaError!void { } if (union_type.flagsUnordered(ip).assumed_pointer_aligned and - alignment.compareStrict(.neq, Alignment.fromByteUnits(@divExact(pt.zcu.getTarget().ptrBitWidth(), 8)))) + alignment.compareStrict(.neq, Type.ptrAbiAlignment(pt.zcu.getTarget()))) { const msg = try sema.errMsg( ty.srcLoc(pt.zcu), diff --git a/src/codegen/llvm.zig b/src/codegen/llvm.zig index 42b9e3ff7177..f289670da420 100644 --- a/src/codegen/llvm.zig +++ b/src/codegen/llvm.zig @@ -1432,8 +1432,7 @@ pub const Object = struct { const param = wip.arg(llvm_arg_i); llvm_arg_i += 1; const field_ptr = try wip.gepStruct(llvm_ty, arg_ptr, field_i, ""); - const alignment = - Builder.Alignment.fromByteUnits(@divExact(target.ptrBitWidth(), 8)); + const alignment = Type.ptrAbiAlignment(target).toLlvm(); _ = try wip.store(.normal, param, field_ptr, alignment); } @@ -5405,8 +5404,7 @@ pub const FuncGen = struct { const llvm_ty = try o.builder.structType(.normal, llvm_types); try llvm_args.ensureUnusedCapacity(it.types_len); for (llvm_types, 0..) |field_ty, i| { - const alignment = - Builder.Alignment.fromByteUnits(@divExact(target.ptrBitWidth(), 8)); + const alignment = Type.ptrAbiAlignment(target).toLlvm(); const field_ptr = try self.wip.gepStruct(llvm_ty, arg_ptr, i, ""); const loaded = try self.wip.load(.normal, field_ty, field_ptr, alignment, ""); llvm_args.appendAssumeCapacity(loaded); From 04138a37bcccd48fde820e295e07d84630e447e1 Mon Sep 17 00:00:00 2001 From: Sam Connelly Date: Fri, 24 Oct 2025 05:53:19 -0400 Subject: [PATCH 09/24] remove --- lib/std/Target/Query.zig | 1 - 1 file changed, 1 deletion(-) diff --git a/lib/std/Target/Query.zig b/lib/std/Target/Query.zig index 261dcccd4168..90c127d80089 100644 --- a/lib/std/Target/Query.zig +++ b/lib/std/Target/Query.zig @@ -209,7 +209,6 @@ pub const ParseOptions = struct { }; pub fn parse(args: ParseOptions) !Query { - @setEvalBranchQuota(20000); var dummy_diags: ParseOptions.Diagnostics = undefined; const diags = args.diagnostics orelse &dummy_diags; From 27d41becbbfda43549c653309746c77d32d25896 Mon Sep 17 00:00:00 2001 From: Sam Connelly Date: Fri, 24 Oct 2025 17:26:22 -0400 Subject: [PATCH 10/24] lib/zig.h for *24, *48 partially done --- lib/zig.h | 265 +++++++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 264 insertions(+), 1 deletion(-) diff --git a/lib/zig.h b/lib/zig.h index eebe4cf81861..5294788c351d 100644 --- a/lib/zig.h +++ b/lib/zig.h @@ -77,6 +77,9 @@ #elif defined(__I86__) #define zig_x86_16 #define zig_x86 +#elif defined (__ez80) +#define zig_ez80 +#define zig_z80 #endif #if defined(zig_msvc) || __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ @@ -407,6 +410,8 @@ #define zig_trap() __asm__ volatile("int $0x3") #elif defined(zig_x86) #define zig_trap() __asm__ volatile("ud2") +#elif defined(zig_ez80) +#define zig_trap() __asm__ volatile("trap") #else #define zig_trap() zig_trap_unavailable #endif @@ -509,7 +514,7 @@ zig_extern void *memcpy (void *zig_restrict, void const *zig_restrict, size_t); zig_extern void *memset (void *, int, size_t); zig_extern void *memmove (void *, void const *, size_t); -/* ================ Bool and 8/16/32/64-bit Integer Support ================= */ +/* ================ Bool and 8/16/24/32/48/64-bit Integer Support ================= */ #include @@ -588,6 +593,36 @@ typedef signed long long int16_t; #define INT16_MAX ( INT16_C(0x7FFF)) #define UINT16_MAX ( INT16_C(0xFFFF)) +#if SCHAR_MIN == ~0x7FFFFF && SCHAR_MAX == 0x7FFFFF && UCHAR_MAX == 0xFFFFFF +typedef unsigned char uint24_t; +typedef signed char int24_t; +#define INT24_C(c) c +#define UINT24_C(c) c##U +#elif SHRT_MIN == ~0x7FFFFF && SHRT_MAX == 0x7FFFFF && USHRT_MAX == 0xFFFFFF +typedef unsigned short uint24_t; +typedef signed short int24_t; +#define INT24_C(c) c +#define UINT24_C(c) c##U +#elif INT_MIN == ~0x7FFFFF && INT_MAX == 0x7FFFFF && UINT_MAX == 0xFFFFFF +typedef unsigned int uint24_t; +typedef signed int int24_t; +#define INT24_C(c) c +#define UINT24_C(c) c##U +#elif LONG_MIN == ~0x7FFFFF && LONG_MAX == 0x7FFFFF && ULONG_MAX == 0xFFFFFF +typedef unsigned long uint24_t; +typedef signed long int24_t; +#define INT24_C(c) c##L +#define UINT24_C(c) c##LU +#elif LLONG_MIN == ~0x7FFFFF && LLONG_MAX == 0x7FFFFF && ULLONG_MAX == 0xFFFFFF +typedef unsigned long long uint24_t; +typedef signed long long int24_t; +#define INT24_C(c) c##LL +#define UINT24_C(c) c##LLU +#endif +#define INT24_MIN (~INT24_C(0x7FFF)) +#define INT24_MAX ( INT24_C(0x7FFF)) +#define UINT24_MAX ( INT24_C(0xFFFF)) + #if SCHAR_MIN == ~0x7FFFFFFF && SCHAR_MAX == 0x7FFFFFFF && UCHAR_MAX == 0xFFFFFFFF typedef unsigned char uint32_t; typedef signed char int32_t; @@ -618,6 +653,43 @@ typedef signed long long int32_t; #define INT32_MAX ( INT32_C(0x7FFFFFFF)) #define UINT32_MAX ( INT32_C(0xFFFFFFFF)) +#if defined(zig_ez80) +typedef unsigned __int48 uint48_t; +typedef signed __int48 int48_t; +#define INT48_C(c) c +/* no suffix */ +#define UINT48_C(c) ((uint48_t)(c)) +#elif SCHAR_MIN == ~0x7FFFFFFFFFFF && SCHAR_MAX == 0x7FFFFFFFFFFF && UCHAR_MAX == 0xFFFFFFFFFFFF +typedef unsigned char uint48_t; +typedef signed char int48_t; +#define INT32_C(c) c +#define UINT32_C(c) c##U +#elif SHRT_MIN == ~0x7FFFFFFFFFFF && SHRT_MAX == 0x7FFFFFFFFFFF && USHRT_MAX == 0xFFFFFFFFFFFF +typedef unsigned short uint48_t; +typedef signed short int48_t; +#define INT32_C(c) c +#define UINT32_C(c) c##U +#elif INT_MIN == ~0x7FFFFFFFFFFF && INT_MAX == 0x7FFFFFFFFFFF && UINT_MAX == 0xFFFFFFFFFFFFF +typedef unsigned int uint48_t; +typedef signed int int48_t; +#define INT32_C(c) c +#define UINT32_C(c) c##U +#elif LONG_MIN == ~0x7FFFFFFFFFFF && LONG_MAX == 0x7FFFFFFFFFFF && ULONG_MAX == 0xFFFFFFFFFFFF +typedef unsigned long uint48_t; +typedef signed long int48_t; +#define INT32_C(c) c##L +#define UINT32_C(c) c##LU +#elif LLONG_MIN == ~0x7FFFFFFFFFFF && LLONG_MAX == 0x7FFFFFFFFFFF && ULLONG_MAX == 0xFFFFFFFFFFFF +typedef unsigned long long uint48_t; +typedef signed long long int48_t; +#define INT32_C(c) c##LL +#define UINT32_C(c) c##LLU +#endif +#endif +#define INT48_MIN (~INT48_C(0x7FFFFFFFFFFF)) +#define INT48_MAX ( INT48_C(0x7FFFFFFFFFFF)) +#define UINT48_MAX ( INT48_C(0xFFFFFFFFFFFF)) + #if SCHAR_MIN == ~0x7FFFFFFFFFFFFFFF && SCHAR_MAX == 0x7FFFFFFFFFFFFFFF && UCHAR_MAX == 0xFFFFFFFFFFFFFFFF typedef unsigned char uint64_t; typedef signed char int64_t; @@ -661,10 +733,18 @@ typedef ptrdiff_t intptr_t; #define zig_maxInt_i16 INT16_MAX #define zig_minInt_u16 UINT16_C(0) #define zig_maxInt_u16 UINT16_MAX +#define zig_minInt_i24 INT24_MIN +#define zig_maxInt_i24 INT24_MAX +#define zig_minInt_u24 UINT24_C(0) +#define zig_maxInt_u24 UINT24_MAX #define zig_minInt_i32 INT32_MIN #define zig_maxInt_i32 INT32_MAX #define zig_minInt_u32 UINT32_C(0) #define zig_maxInt_u32 UINT32_MAX +#define zig_minInt_i48 INT48_MIN +#define zig_maxInt_i48 INT48_MAX +#define zig_minInt_u48 UINT48_C(0) +#define zig_maxInt_u48 UINT48_MAX #define zig_minInt_i64 INT64_MIN #define zig_maxInt_i64 INT64_MAX #define zig_minInt_u64 UINT64_C(0) @@ -784,6 +864,17 @@ zig_int_helpers(16, unsigned long long) #else zig_int_helpers(16, uint16_t) #endif +#if defined(uint24_t) +#if UINT24_MAX <= UINT_MAX +zig_int_helpers(24, unsigned int) +#elif UINT24_MAX <= ULONG_MAX +zig_int_helpers(24, unsigned long) +#elif UINT24_MAX <= ULLONG_MAX +zig_int_helpers(24, unsigned long long) +#else +zig_int_helpers(24, uint24_t) +#endif +#endif #if UINT32_MAX <= UINT_MAX zig_int_helpers(32, unsigned int) #elif UINT32_MAX <= ULONG_MAX @@ -793,6 +884,17 @@ zig_int_helpers(32, unsigned long long) #else zig_int_helpers(32, uint32_t) #endif +#if defined(uint48_t) +#if UINT24_MAX <= UINT_MAX +zig_int_helpers(48, unsigned int) +#elif UINT24_MAX <= ULONG_MAX +zig_int_helpers(48, unsigned long) +#elif UINT24_MAX <= ULLONG_MAX +zig_int_helpers(48, unsigned long long) +#else +zig_int_helpers(48, uint48_t) +#endif +#endif #if UINT64_MAX <= UINT_MAX zig_int_helpers(64, unsigned int) #elif UINT64_MAX <= ULONG_MAX @@ -911,6 +1013,66 @@ static inline bool zig_addo_i16(int16_t *res, int16_t lhs, int16_t rhs, uint8_t #endif } +#if defined(uint24_t) +static inline bool zig_addo_u24(uint24_t *res, uint24_t lhs, uint24_t rhs, uint8_t bits) { +#if zig_has_builtin(add_overflow) || defined(zig_gcc) + uint24_t full_res; + bool overflow = __builtin_add_overflow(lhs, rhs, &full_res); + *res = zig_wrap_u24(full_res, bits); + return overflow || full_res < zig_minInt_u(24, bits) || full_res > zig_maxInt_u(24, bits); +#else + uint32_t full_res; + bool overflow = zig_addo_u32(&full_res, lhs, rhs, bits); + *res = (uint24_t)full_res; + return overflow; +#endif +} + +static inline bool zig_addo_i24(int24_t *res, int24_t lhs, int24_t rhs, uint8_t bits) { +#if zig_has_builtin(add_overflow) || defined(zig_gcc) + int24_t full_res; + bool overflow = __builtin_add_overflow(lhs, rhs, &full_res); + *res = zig_wrap_i24(full_res, bits); + return overflow || full_res < zig_minInt_i(24, bits) || full_res > zig_maxInt_i(24, bits); +#else + int32_t full_res; + bool overflow = zig_addo_i32(&full_res, lhs, rhs, bits); + *res = (int24_t)full_res; + return overflow; +#endif +} +#endif + +#if defined(uint48_t) +static inline bool zig_addo_u48(uint48_t *res, uint48_t lhs, uint48_t rhs, uint8_t bits) { +#if zig_has_builtin(add_overflow) || defined(zig_gcc) + uint48_t full_res; + bool overflow = __builtin_add_overflow(lhs, rhs, &full_res); + *res = zig_wrap_u48(full_res, bits); + return overflow || full_res < zig_minInt_u(48, bits) || full_res > zig_maxInt_u(48, bits); +#else + uint64_t full_res; + bool overflow = zig_addo_u64(&full_res, lhs, rhs, bits); + *res = (uint48_t)full_res; + return overflow; +#endif +} + +static inline bool zig_addo_i48(int48_t *res, int48_t lhs, int48_t rhs, uint8_t bits) { +#if zig_has_builtin(add_overflow) || defined(zig_gcc) + int48_t full_res; + bool overflow = __builtin_add_overflow(lhs, rhs, &full_res); + *res = zig_wrap_i48(full_res, bits); + return overflow || full_res < zig_minInt_i(48, bits) || full_res > zig_maxInt_i(48, bits); +#else + int64_t full_res; + bool overflow = zig_addo_i64(&full_res, lhs, rhs, bits); + *res = (int48_t)full_res; + return overflow; +#endif +} +#endif + static inline bool zig_subo_u32(uint32_t *res, uint32_t lhs, uint32_t rhs, uint8_t bits) { #if zig_has_builtin(sub_overflow) || defined(zig_gcc) uint32_t full_res; @@ -937,6 +1099,7 @@ static inline bool zig_subo_i32(int32_t *res, int32_t lhs, int32_t rhs, uint8_t return overflow || full_res < zig_minInt_i(32, bits) || full_res > zig_maxInt_i(32, bits); } + static inline bool zig_subo_u64(uint64_t *res, uint64_t lhs, uint64_t rhs, uint8_t bits) { #if zig_has_builtin(sub_overflow) || defined(zig_gcc) uint64_t full_res; @@ -1019,6 +1182,66 @@ static inline bool zig_subo_i16(int16_t *res, int16_t lhs, int16_t rhs, uint8_t #endif } +#if defined(uint24_t) +static inline bool zig_subo_u24(uint24_t *res, uint24_t lhs, uint24_t rhs, uint8_t bits) { +#if zig_has_builtin(sub_overflow) || defined(zig_gcc) + uint24_t full_res; + bool overflow = __builtin_sub_overflow(lhs, rhs, &full_res); + *res = zig_wrap_u24(full_res, bits); + return overflow || full_res < zig_minInt_u(24, bits) || full_res > zig_maxInt_u(24, bits); +#else + uint32_t full_res; + bool overflow = zig_subo_u32(&full_res, lhs, rhs, bits); + *res = (uint24_t)full_res; + return overflow; +#endif +} + +static inline bool zig_subo_i24(int24_t *res, int24_t lhs, int24_t rhs, uint8_t bits) { +#if zig_has_builtin(sub_overflow) || defined(zig_gcc) + int24_t full_res; + bool overflow = __builtin_sub_overflow(lhs, rhs, &full_res); + *res = zig_wrap_i24(full_res, bits); + return overflow || full_res < zig_minInt_i(24, bits) || full_res > zig_maxInt_i(24, bits); +#else + int32_t full_res; + bool overflow = zig_subo_i32(&full_res, lhs, rhs, bits); + *res = (int24_t)full_res; + return overflow; +#endif +} +#endif + +#if defined(uint48_t) +static inline bool zig_subo_u48(uint48_t *res, uint48_t lhs, uint48_t rhs, uint8_t bits) { +#if zig_has_builtin(sub_overflow) || defined(zig_gcc) + uint48_t full_res; + bool overflow = __builtin_sub_overflow(lhs, rhs, &full_res); + *res = zig_wrap_u48(full_res, bits); + return overflow || full_res < zig_minInt_u(48, bits) || full_res > zig_maxInt_u(48, bits); +#else + uint64_t full_res; + bool overflow = zig_subo_u64(&full_res, lhs, rhs, bits); + *res = (uint48_t)full_res; + return overflow; +#endif +} + +static inline bool zig_subo_i48(int48_t *res, int48_t lhs, int48_t rhs, uint8_t bits) { +#if zig_has_builtin(sub_overflow) || defined(zig_gcc) + int48_t full_res; + bool overflow = __builtin_sub_overflow(lhs, rhs, &full_res); + *res = zig_wrap_i48(full_res, bits); + return overflow || full_res < zig_minInt_i(48, bits) || full_res > zig_maxInt_i(48, bits); +#else + int64_t full_res; + bool overflow = zig_subo_i64(&full_res, lhs, rhs, bits); + *res = (int48_t)full_res; + return overflow; +#endif +} +#endif + static inline bool zig_mulo_u32(uint32_t *res, uint32_t lhs, uint32_t rhs, uint8_t bits) { #if zig_has_builtin(mul_overflow) || defined(zig_gcc) uint32_t full_res; @@ -1126,6 +1349,7 @@ static inline bool zig_mulo_i16(int16_t *res, int16_t lhs, int16_t rhs, uint8_t return overflow; #endif } +/* TODO: clevor zig_mulo_*24 */ #define zig_int_builtins(w) \ static inline bool zig_shlo_u##w(uint##w##_t *res, uint##w##_t lhs, uint8_t rhs, uint8_t bits) { \ @@ -1186,7 +1410,13 @@ static inline bool zig_mulo_i16(int16_t *res, int16_t lhs, int16_t rhs, uint8_t } zig_int_builtins(8) zig_int_builtins(16) +if defined(uint24_t) +zig_int_builtins(24) +#endif zig_int_builtins(32) +if defined(uint48_t) +zig_int_builtins(48) +#endif zig_int_builtins(64) #define zig_builtin8(name, val) __builtin_##name(val) @@ -1195,6 +1425,10 @@ typedef unsigned int zig_Builtin8; #define zig_builtin16(name, val) __builtin_##name(val) typedef unsigned int zig_Builtin16; +#if defined(uint24_t) +/* TODO: clevor zig_builtin24 */ +#endif + #if INT_MIN <= INT32_MIN #define zig_builtin32(name, val) __builtin_##name(val) typedef unsigned int zig_Builtin32; @@ -1203,6 +1437,8 @@ typedef unsigned int zig_Builtin32; typedef unsigned long zig_Builtin32; #endif +/* TODO: clevor zig_builtin48 */ + #if INT_MIN <= INT64_MIN #define zig_builtin64(name, val) __builtin_##name(val) typedef unsigned int zig_Builtin64; @@ -1237,6 +1473,8 @@ static inline int16_t zig_byte_swap_i16(int16_t val, uint8_t bits) { return zig_wrap_i16((int16_t)zig_byte_swap_u16((uint16_t)val, bits), bits); } +/* TODO: clevor zig_byte_swap_*24 */ + static inline uint32_t zig_byte_swap_u32(uint32_t val, uint8_t bits) { uint32_t full_res; #if zig_has_builtin(bswap32) || defined(zig_gcc) @@ -1252,6 +1490,8 @@ static inline int32_t zig_byte_swap_i32(int32_t val, uint8_t bits) { return zig_wrap_i32((int32_t)zig_byte_swap_u32((uint32_t)val, bits), bits); } +/* TODO: clevor zig_byte_swap_*48 */ + static inline uint64_t zig_byte_swap_u64(uint64_t val, uint8_t bits) { uint64_t full_res; #if zig_has_builtin(bswap64) || defined(zig_gcc) @@ -1300,6 +1540,8 @@ static inline int16_t zig_bit_reverse_i16(int16_t val, uint8_t bits) { return zig_wrap_i16((int16_t)zig_bit_reverse_u16((uint16_t)val, bits), bits); } +/* TODO: clevor zig_byte_reverse_*24 */ + static inline uint32_t zig_bit_reverse_u32(uint32_t val, uint8_t bits) { uint32_t full_res; #if zig_has_builtin(bitreverse32) @@ -1315,6 +1557,8 @@ static inline int32_t zig_bit_reverse_i32(int32_t val, uint8_t bits) { return zig_wrap_i32((int32_t)zig_bit_reverse_u32((uint32_t)val, bits), bits); } +/* TODO: clevor zig_byte_reverse_*48 */ + static inline uint64_t zig_bit_reverse_u64(uint64_t val, uint8_t bits) { uint64_t full_res; #if zig_has_builtin(bitreverse64) @@ -1356,7 +1600,13 @@ static inline int64_t zig_bit_reverse_i64(int64_t val, uint8_t bits) { #endif zig_builtin_popcount(8) zig_builtin_popcount(16) +#if defined(zig_ez80) +zig_builtin_popcount(24) +#endif zig_builtin_popcount(32) +#if defined(zig_ez80) +zig_builtin_popcount(48) +#endif zig_builtin_popcount(64) #define zig_builtin_ctz_common(w) \ @@ -1381,7 +1631,13 @@ zig_builtin_popcount(64) #endif zig_builtin_ctz(8) zig_builtin_ctz(16) +#if defined(zig_ez80) +zig_builtin_ctz(24) +#endif zig_builtin_ctz(32) +#if defined(zig_ez80) +zig_builtin_ctz(48) +#endif zig_builtin_ctz(64) #define zig_builtin_clz_common(w) \ @@ -1406,7 +1662,13 @@ zig_builtin_ctz(64) #endif zig_builtin_clz(8) zig_builtin_clz(16) +#if defined(zig_ez80) +zig_builtin_clz(24) +#endif zig_builtin_clz(32) +#if defined(zig_ez80) +zig_builtin_clz(24) +#endif zig_builtin_clz(64) /* ======================== 128-bit Integer Support ========================= */ @@ -4004,6 +4266,7 @@ zig_msvc_atomics( u8, uint8_t, char, 8, 8) zig_msvc_atomics( i8, int8_t, char, 8, 8) zig_msvc_atomics(u16, uint16_t, short, 16, 16) zig_msvc_atomics(i16, int16_t, short, 16, 16) +/* TODO: clevor zig_msvc_atomics(u24)? */ zig_msvc_atomics(u32, uint32_t, long, , 32) zig_msvc_atomics(i32, int32_t, long, , 32) From 457373f59309ead612561e2d6c365a2d8e6f34b1 Mon Sep 17 00:00:00 2001 From: Sam Connelly Date: Fri, 24 Oct 2025 17:40:05 -0400 Subject: [PATCH 11/24] fix it --- lib/zig.h | 66 +++++++++---------------------------------------------- 1 file changed, 10 insertions(+), 56 deletions(-) diff --git a/lib/zig.h b/lib/zig.h index 5294788c351d..6db41e234ed7 100644 --- a/lib/zig.h +++ b/lib/zig.h @@ -593,31 +593,11 @@ typedef signed long long int16_t; #define INT16_MAX ( INT16_C(0x7FFF)) #define UINT16_MAX ( INT16_C(0xFFFF)) -#if SCHAR_MIN == ~0x7FFFFF && SCHAR_MAX == 0x7FFFFF && UCHAR_MAX == 0xFFFFFF -typedef unsigned char uint24_t; -typedef signed char int24_t; -#define INT24_C(c) c -#define UINT24_C(c) c##U -#elif SHRT_MIN == ~0x7FFFFF && SHRT_MAX == 0x7FFFFF && USHRT_MAX == 0xFFFFFF -typedef unsigned short uint24_t; -typedef signed short int24_t; -#define INT24_C(c) c -#define UINT24_C(c) c##U -#elif INT_MIN == ~0x7FFFFF && INT_MAX == 0x7FFFFF && UINT_MAX == 0xFFFFFF +#if defined(zig_ez80) typedef unsigned int uint24_t; typedef signed int int24_t; #define INT24_C(c) c #define UINT24_C(c) c##U -#elif LONG_MIN == ~0x7FFFFF && LONG_MAX == 0x7FFFFF && ULONG_MAX == 0xFFFFFF -typedef unsigned long uint24_t; -typedef signed long int24_t; -#define INT24_C(c) c##L -#define UINT24_C(c) c##LU -#elif LLONG_MIN == ~0x7FFFFF && LLONG_MAX == 0x7FFFFF && ULLONG_MAX == 0xFFFFFF -typedef unsigned long long uint24_t; -typedef signed long long int24_t; -#define INT24_C(c) c##LL -#define UINT24_C(c) c##LLU #endif #define INT24_MIN (~INT24_C(0x7FFF)) #define INT24_MAX ( INT24_C(0x7FFF)) @@ -659,32 +639,6 @@ typedef signed __int48 int48_t; #define INT48_C(c) c /* no suffix */ #define UINT48_C(c) ((uint48_t)(c)) -#elif SCHAR_MIN == ~0x7FFFFFFFFFFF && SCHAR_MAX == 0x7FFFFFFFFFFF && UCHAR_MAX == 0xFFFFFFFFFFFF -typedef unsigned char uint48_t; -typedef signed char int48_t; -#define INT32_C(c) c -#define UINT32_C(c) c##U -#elif SHRT_MIN == ~0x7FFFFFFFFFFF && SHRT_MAX == 0x7FFFFFFFFFFF && USHRT_MAX == 0xFFFFFFFFFFFF -typedef unsigned short uint48_t; -typedef signed short int48_t; -#define INT32_C(c) c -#define UINT32_C(c) c##U -#elif INT_MIN == ~0x7FFFFFFFFFFF && INT_MAX == 0x7FFFFFFFFFFF && UINT_MAX == 0xFFFFFFFFFFFFF -typedef unsigned int uint48_t; -typedef signed int int48_t; -#define INT32_C(c) c -#define UINT32_C(c) c##U -#elif LONG_MIN == ~0x7FFFFFFFFFFF && LONG_MAX == 0x7FFFFFFFFFFF && ULONG_MAX == 0xFFFFFFFFFFFF -typedef unsigned long uint48_t; -typedef signed long int48_t; -#define INT32_C(c) c##L -#define UINT32_C(c) c##LU -#elif LLONG_MIN == ~0x7FFFFFFFFFFF && LLONG_MAX == 0x7FFFFFFFFFFF && ULLONG_MAX == 0xFFFFFFFFFFFF -typedef unsigned long long uint48_t; -typedef signed long long int48_t; -#define INT32_C(c) c##LL -#define UINT32_C(c) c##LLU -#endif #endif #define INT48_MIN (~INT48_C(0x7FFFFFFFFFFF)) #define INT48_MAX ( INT48_C(0x7FFFFFFFFFFF)) @@ -864,7 +818,7 @@ zig_int_helpers(16, unsigned long long) #else zig_int_helpers(16, uint16_t) #endif -#if defined(uint24_t) +#if defined(zig_ez80) #if UINT24_MAX <= UINT_MAX zig_int_helpers(24, unsigned int) #elif UINT24_MAX <= ULONG_MAX @@ -884,7 +838,7 @@ zig_int_helpers(32, unsigned long long) #else zig_int_helpers(32, uint32_t) #endif -#if defined(uint48_t) +#if defined(zig_ez80) #if UINT24_MAX <= UINT_MAX zig_int_helpers(48, unsigned int) #elif UINT24_MAX <= ULONG_MAX @@ -1013,7 +967,7 @@ static inline bool zig_addo_i16(int16_t *res, int16_t lhs, int16_t rhs, uint8_t #endif } -#if defined(uint24_t) +#if defined(zig_ez80) static inline bool zig_addo_u24(uint24_t *res, uint24_t lhs, uint24_t rhs, uint8_t bits) { #if zig_has_builtin(add_overflow) || defined(zig_gcc) uint24_t full_res; @@ -1043,7 +997,7 @@ static inline bool zig_addo_i24(int24_t *res, int24_t lhs, int24_t rhs, uint8_t } #endif -#if defined(uint48_t) +#if defined(zig_ez80) static inline bool zig_addo_u48(uint48_t *res, uint48_t lhs, uint48_t rhs, uint8_t bits) { #if zig_has_builtin(add_overflow) || defined(zig_gcc) uint48_t full_res; @@ -1182,7 +1136,7 @@ static inline bool zig_subo_i16(int16_t *res, int16_t lhs, int16_t rhs, uint8_t #endif } -#if defined(uint24_t) +#if defined(zig_ez80) static inline bool zig_subo_u24(uint24_t *res, uint24_t lhs, uint24_t rhs, uint8_t bits) { #if zig_has_builtin(sub_overflow) || defined(zig_gcc) uint24_t full_res; @@ -1212,7 +1166,7 @@ static inline bool zig_subo_i24(int24_t *res, int24_t lhs, int24_t rhs, uint8_t } #endif -#if defined(uint48_t) +#if defined(zig_ez80) static inline bool zig_subo_u48(uint48_t *res, uint48_t lhs, uint48_t rhs, uint8_t bits) { #if zig_has_builtin(sub_overflow) || defined(zig_gcc) uint48_t full_res; @@ -1410,11 +1364,11 @@ static inline bool zig_mulo_i16(int16_t *res, int16_t lhs, int16_t rhs, uint8_t } zig_int_builtins(8) zig_int_builtins(16) -if defined(uint24_t) +if defined(zig_ez80) zig_int_builtins(24) #endif zig_int_builtins(32) -if defined(uint48_t) +if defined(zig_ez80) zig_int_builtins(48) #endif zig_int_builtins(64) @@ -1425,7 +1379,7 @@ typedef unsigned int zig_Builtin8; #define zig_builtin16(name, val) __builtin_##name(val) typedef unsigned int zig_Builtin16; -#if defined(uint24_t) +#if defined(zig_ez80) /* TODO: clevor zig_builtin24 */ #endif From c409c46bb35daeb4e428cc5008ba9daa9a47cbbd Mon Sep 17 00:00:00 2001 From: Sam Connelly Date: Fri, 24 Oct 2025 18:06:02 -0400 Subject: [PATCH 12/24] add # --- lib/zig.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/zig.h b/lib/zig.h index 6db41e234ed7..623f950f5614 100644 --- a/lib/zig.h +++ b/lib/zig.h @@ -1364,11 +1364,11 @@ static inline bool zig_mulo_i16(int16_t *res, int16_t lhs, int16_t rhs, uint8_t } zig_int_builtins(8) zig_int_builtins(16) -if defined(zig_ez80) +#if defined(zig_ez80) zig_int_builtins(24) #endif zig_int_builtins(32) -if defined(zig_ez80) +#if defined(zig_ez80) zig_int_builtins(48) #endif zig_int_builtins(64) From 7655d940c062d36ef3cbc981d615809bf092809d Mon Sep 17 00:00:00 2001 From: Sam Connelly Date: Fri, 24 Oct 2025 20:13:13 -0400 Subject: [PATCH 13/24] fix it harder --- lib/zig.h | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/lib/zig.h b/lib/zig.h index 623f950f5614..3d55abb78c4c 100644 --- a/lib/zig.h +++ b/lib/zig.h @@ -1380,7 +1380,8 @@ typedef unsigned int zig_Builtin8; typedef unsigned int zig_Builtin16; #if defined(zig_ez80) -/* TODO: clevor zig_builtin24 */ +#define zig_builtin24(name, val) __builtin_##name(val) +typedef unsigned int zig_Builtin24; #endif #if INT_MIN <= INT32_MIN @@ -1391,7 +1392,10 @@ typedef unsigned int zig_Builtin32; typedef unsigned long zig_Builtin32; #endif -/* TODO: clevor zig_builtin48 */ +#if defined(zig_ez80) +#define zig_builtin48(name, val) __builtin_##name(val) +typedef unsigned long long zig_Builtin48; +#endif #if INT_MIN <= INT64_MIN #define zig_builtin64(name, val) __builtin_##name(val) @@ -1621,7 +1625,7 @@ zig_builtin_clz(24) #endif zig_builtin_clz(32) #if defined(zig_ez80) -zig_builtin_clz(24) +zig_builtin_clz(48) #endif zig_builtin_clz(64) From ad3e85ad010f00771434253a7934cab3fab35e77 Mon Sep 17 00:00:00 2001 From: Sam Connelly Date: Sat, 25 Oct 2025 14:40:45 -0400 Subject: [PATCH 14/24] Finish the lib/zig.h intrinsics (yay) --- lib/zig.h | 131 +++++++++++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 125 insertions(+), 6 deletions(-) diff --git a/lib/zig.h b/lib/zig.h index 3d55abb78c4c..7f76da15944f 100644 --- a/lib/zig.h +++ b/lib/zig.h @@ -1303,7 +1303,66 @@ static inline bool zig_mulo_i16(int16_t *res, int16_t lhs, int16_t rhs, uint8_t return overflow; #endif } -/* TODO: clevor zig_mulo_*24 */ + +#if defined(zig_ez80) +static inline bool zig_mulo_u24(uint24_t *res, uint24_t lhs, uint24_t rhs, uint8_t bits) { +#if zig_has_builtin(mul_overflow) || defined(zig_gcc) + uint24_t full_res; + bool overflow = __builtin_mul_overflow(lhs, rhs, &full_res); + *res = zig_wrap_u24(full_res, bits); + return overflow || full_res < zig_minInt_u(24, bits) || full_res > zig_maxInt_u(24, bits); +#else + uint32_t full_res; + bool overflow = zig_mulo_u32(&full_res, lhs, rhs, bits); + *res = (uint24_t)full_res; + return overflow; +#endif +} + +static inline bool zig_mulo_i24(int24_t *res, int24_t lhs, int24_t rhs, uint8_t bits) { +#if zig_has_builtin(mul_overflow) || defined(zig_gcc) + int24_t full_res; + bool overflow = __builtin_mul_overflow(lhs, rhs, &full_res); + *res = zig_wrap_i24(full_res, bits); + return overflow || full_res < zig_minInt_i(24, bits) || full_res > zig_maxInt_i(24, bits); +#else + int32_t full_res; + bool overflow = zig_mulo_i32(&full_res, lhs, rhs, bits); + *res = (int24_t)full_res; + return overflow; +#endif +} +#endif + +#if defined(zig_ez80) +static inline bool zig_mulo_u48(uint48_t *res, uint48_t lhs, uint48_t rhs, uint8_t bits) { +#if zig_has_builtin(mul_overflow) || defined(zig_gcc) + uint48_t full_res; + bool overflow = __builtin_mul_overflow(lhs, rhs, &full_res); + *res = zig_wrap_u48(full_res, bits); + return overflow || full_res < zig_minInt_u(48, bits) || full_res > zig_maxInt_u(48, bits); +#else + uint64_t full_res; + bool overflow = zig_mulo_u64(&full_res, lhs, rhs, bits); + *res = (uint48_t)full_res; + return overflow; +#endif +} + +static inline bool zig_mulo_i48(int48_t *res, int48_t lhs, int48_t rhs, uint8_t bits) { +#if zig_has_builtin(mul_overflow) || defined(zig_gcc) + int48_t full_res; + bool overflow = __builtin_mul_overflow(lhs, rhs, &full_res); + *res = zig_wrap_i48(full_res, bits); + return overflow || full_res < zig_minInt_i(48, bits) || full_res > zig_maxInt_i(48, bits); +#else + int64_t full_res; + bool overflow = zig_mulo_i64(&full_res, lhs, rhs, bits); + *res = (int48_t)full_res; + return overflow; +#endif +} +#endif #define zig_int_builtins(w) \ static inline bool zig_shlo_u##w(uint##w##_t *res, uint##w##_t lhs, uint8_t rhs, uint8_t bits) { \ @@ -1431,7 +1490,22 @@ static inline int16_t zig_byte_swap_i16(int16_t val, uint8_t bits) { return zig_wrap_i16((int16_t)zig_byte_swap_u16((uint16_t)val, bits), bits); } -/* TODO: clevor zig_byte_swap_*24 */ +#if defined(zig_ez80) +static inline uint16_t zig_byte_swap_u24(uint24_t val, uint8_t bits) { + uint24_t full_res; +#if zig_has_builtin(bswap16) || defined(zig_gcc) + full_res = __builtin_bswap24(val); +#else + full_res = (uint24_t)zig_byte_swap_u8((uint8_t)(val >> 0), 8) << 16 | + (uint24_t)zig_byte_swap_u16((uint16_t)(val >> 8), 16) >> 0; +#endif + return zig_wrap_u24(full_res >> (24 - bits), bits); +} + +static inline int16_t zig_byte_swap_i24(int24_t val, uint8_t bits) { + return zig_wrap_i24((int24_t)zig_byte_swap_u24((uint24_t)val, bits), bits); +} +#endif static inline uint32_t zig_byte_swap_u32(uint32_t val, uint8_t bits) { uint32_t full_res; @@ -1448,7 +1522,22 @@ static inline int32_t zig_byte_swap_i32(int32_t val, uint8_t bits) { return zig_wrap_i32((int32_t)zig_byte_swap_u32((uint32_t)val, bits), bits); } -/* TODO: clevor zig_byte_swap_*48 */ +#if defined(zig_ez80) +static inline uint32_t zig_byte_swap_u48(uint48_t val, uint8_t bits) { + uint48_t full_res; +#if zig_has_builtin(bswap48) || defined(zig_gcc) + full_res = __builtin_bswap48(val); +#else + full_res = (uint48_t)zig_byte_swap_u24((uint24_t)(val >> 0), 24) << 24 | + (uint48_t)zig_byte_swap_u24((uint24_t)(val >> 24), 24) >> 0; +#endif + return zig_wrap_u48(full_res >> (48 - bits), bits); +} + +static inline int32_t zig_byte_swap_i48(int48_t val, uint8_t bits) { + return zig_wrap_i48((int48_t)zig_byte_swap_u48((uint48_t)val, bits), bits); +} +#endif static inline uint64_t zig_byte_swap_u64(uint64_t val, uint8_t bits) { uint64_t full_res; @@ -1498,7 +1587,22 @@ static inline int16_t zig_bit_reverse_i16(int16_t val, uint8_t bits) { return zig_wrap_i16((int16_t)zig_bit_reverse_u16((uint16_t)val, bits), bits); } -/* TODO: clevor zig_byte_reverse_*24 */ +#if defined(zig_ez80) +static inline uint24_t zig_bit_reverse_u24(uint24_t val, uint8_t bits) { + uint24_t full_res; +#if zig_has_builtin(bitreverse24) + full_res = __builtin_bitreverse24(val); +#else + full_res = (uint24_t)zig_bit_reverse_u8((uint8_t)(val >> 0), 8) << 16 | + (uint24_t)zig_bit_reverse_u16((uint16_t)(val >> 8), 16) >> 0; +#endif + return zig_wrap_u24(full_res >> (24 - bits), bits); +} + +static inline int16_t zig_bit_reverse_i16(int16_t val, uint8_t bits) { + return zig_wrap_i16((int16_t)zig_bit_reverse_u16((uint16_t)val, bits), bits); +} +#endif static inline uint32_t zig_bit_reverse_u32(uint32_t val, uint8_t bits) { uint32_t full_res; @@ -1515,7 +1619,22 @@ static inline int32_t zig_bit_reverse_i32(int32_t val, uint8_t bits) { return zig_wrap_i32((int32_t)zig_bit_reverse_u32((uint32_t)val, bits), bits); } -/* TODO: clevor zig_byte_reverse_*48 */ +#if defined(zig_ez80) +static inline uint32_t zig_bit_reverse_u48(uint48_t val, uint8_t bits) { + uint48_t full_res; +#if zig_has_builtin(bitreverse32) + full_res = __builtin_bitreverse48(val); +#else + full_res = (uint48_t)zig_bit_reverse_u24((uint24_t)(val >> 0), 24) << 24 | + (uint48_t)zig_bit_reverse_u24((uint24_t)(val >> 24), 24) >> 0; +#endif + return zig_wrap_u32(full_res >> (48 - bits), bits); +} + +static inline int32_t zig_bit_reverse_i48(int48_t val, uint8_t bits) { + return zig_wrap_i48((int48_t)zig_bit_reverse_u48((uint48_t)val, bits), bits); +} +#endif static inline uint64_t zig_bit_reverse_u64(uint64_t val, uint8_t bits) { uint64_t full_res; @@ -4220,11 +4339,11 @@ typedef int zig_memory_order; return val; \ } +/* The eZ80 does not support atomics beyond 8 bits */ zig_msvc_atomics( u8, uint8_t, char, 8, 8) zig_msvc_atomics( i8, int8_t, char, 8, 8) zig_msvc_atomics(u16, uint16_t, short, 16, 16) zig_msvc_atomics(i16, int16_t, short, 16, 16) -/* TODO: clevor zig_msvc_atomics(u24)? */ zig_msvc_atomics(u32, uint32_t, long, , 32) zig_msvc_atomics(i32, int32_t, long, , 32) From e8afc9981c35bcec14c697e56b30a1ef99d120cd Mon Sep 17 00:00:00 2001 From: Sam Connelly Date: Sat, 25 Oct 2025 14:54:17 -0400 Subject: [PATCH 15/24] fix 1 --- lib/zig.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/lib/zig.h b/lib/zig.h index 7f76da15944f..edde656a6f25 100644 --- a/lib/zig.h +++ b/lib/zig.h @@ -1493,7 +1493,7 @@ static inline int16_t zig_byte_swap_i16(int16_t val, uint8_t bits) { #if defined(zig_ez80) static inline uint16_t zig_byte_swap_u24(uint24_t val, uint8_t bits) { uint24_t full_res; -#if zig_has_builtin(bswap16) || defined(zig_gcc) +#if zig_has_builtin(bswap24) || defined(zig_gcc) full_res = __builtin_bswap24(val); #else full_res = (uint24_t)zig_byte_swap_u8((uint8_t)(val >> 0), 8) << 16 | @@ -1599,7 +1599,7 @@ static inline uint24_t zig_bit_reverse_u24(uint24_t val, uint8_t bits) { return zig_wrap_u24(full_res >> (24 - bits), bits); } -static inline int16_t zig_bit_reverse_i16(int16_t val, uint8_t bits) { +static inline int16_t zig_bit_reverse_i24(int16_t val, uint8_t bits) { return zig_wrap_i16((int16_t)zig_bit_reverse_u16((uint16_t)val, bits), bits); } #endif @@ -1622,7 +1622,7 @@ static inline int32_t zig_bit_reverse_i32(int32_t val, uint8_t bits) { #if defined(zig_ez80) static inline uint32_t zig_bit_reverse_u48(uint48_t val, uint8_t bits) { uint48_t full_res; -#if zig_has_builtin(bitreverse32) +#if zig_has_builtin(bitreverse48) full_res = __builtin_bitreverse48(val); #else full_res = (uint48_t)zig_bit_reverse_u24((uint24_t)(val >> 0), 24) << 24 | From e49944123a04a134cc3ec864f07edcb5457a5834 Mon Sep 17 00:00:00 2001 From: Sam Connelly Date: Sat, 25 Oct 2025 15:54:26 -0400 Subject: [PATCH 16/24] Fix compile error with std.Io.Writer on eZ80 --- lib/std/os/windows.zig | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/lib/std/os/windows.zig b/lib/std/os/windows.zig index 27b40fcd60bd..06d7d26bfcbe 100644 --- a/lib/std/os/windows.zig +++ b/lib/std/os/windows.zig @@ -4778,7 +4778,10 @@ pub const PEB = extern struct { switch (@sizeOf(usize)) { 4 => 0x22, 8 => 0x3C, - else => unreachable, + else => if (builtin.target.os.tag == .windows) + @compileError("@sizeOf(usize) is neither 4 nor 8") + else + 0, // avoid compile erros with std.Io.Writer on exotic targets } ]ULONG, From 191dd77555ef62b210cd56c054afb9d4776c4d29 Mon Sep 17 00:00:00 2001 From: Sam Connelly Date: Sat, 25 Oct 2025 15:47:41 -0400 Subject: [PATCH 17/24] hopefully last zig.h fix --- lib/zig.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/zig.h b/lib/zig.h index edde656a6f25..6660682bebf5 100644 --- a/lib/zig.h +++ b/lib/zig.h @@ -1599,7 +1599,7 @@ static inline uint24_t zig_bit_reverse_u24(uint24_t val, uint8_t bits) { return zig_wrap_u24(full_res >> (24 - bits), bits); } -static inline int16_t zig_bit_reverse_i24(int16_t val, uint8_t bits) { +static inline int16_t zig_bit_reverse_i16(int16_t val, uint8_t bits) { return zig_wrap_i16((int16_t)zig_bit_reverse_u16((uint16_t)val, bits), bits); } #endif From 72e175949185b2325460d95ad28c1ebcc33c11b2 Mon Sep 17 00:00:00 2001 From: Sam Connelly Date: Sat, 25 Oct 2025 16:44:41 -0400 Subject: [PATCH 18/24] ugh --- lib/zig.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/zig.h b/lib/zig.h index 6660682bebf5..c3ed058e926e 100644 --- a/lib/zig.h +++ b/lib/zig.h @@ -1599,8 +1599,8 @@ static inline uint24_t zig_bit_reverse_u24(uint24_t val, uint8_t bits) { return zig_wrap_u24(full_res >> (24 - bits), bits); } -static inline int16_t zig_bit_reverse_i16(int16_t val, uint8_t bits) { - return zig_wrap_i16((int16_t)zig_bit_reverse_u16((uint16_t)val, bits), bits); +static inline int24_t zig_bit_reverse_i24(int24_t val, uint8_t bits) { + return zig_wrap_i24((int24_t)zig_bit_reverse_u24((uint24_t)val, bits), bits); } #endif From e34a9bfc3fa043f73ea02521ca34c6acbffd23f4 Mon Sep 17 00:00:00 2001 From: Sam Connelly Date: Sat, 25 Oct 2025 16:58:22 -0400 Subject: [PATCH 19/24] Revert "Fix compile error with std.Io.Writer on eZ80" This reverts commit 446c3436745dc39dddee72099f32372ea5c32208. Dropped in favor of https://github.com/ziglang/zig/pull/25691 (0d1e26e68f94f0de76b5ab15471a34e2bb666fdd) --- lib/std/os/windows.zig | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/lib/std/os/windows.zig b/lib/std/os/windows.zig index 06d7d26bfcbe..27b40fcd60bd 100644 --- a/lib/std/os/windows.zig +++ b/lib/std/os/windows.zig @@ -4778,10 +4778,7 @@ pub const PEB = extern struct { switch (@sizeOf(usize)) { 4 => 0x22, 8 => 0x3C, - else => if (builtin.target.os.tag == .windows) - @compileError("@sizeOf(usize) is neither 4 nor 8") - else - 0, // avoid compile erros with std.Io.Writer on exotic targets + else => unreachable, } ]ULONG, From 4784e6b47373f36fae38a63d24b147980f8c5866 Mon Sep 17 00:00:00 2001 From: Sam Connelly Date: Mon, 27 Oct 2025 18:00:58 -0400 Subject: [PATCH 20/24] Edit ez80 ptrAbiAlignment comment --- src/Type.zig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/Type.zig b/src/Type.zig index 2d73a77b89d9..20661b2eadb5 100644 --- a/src/Type.zig +++ b/src/Type.zig @@ -1603,7 +1603,8 @@ fn abiSizeInnerOptional( } pub fn ptrAbiAlignment(target: *const Target) Alignment { - // ez80 has 24-bit pointers, and the alignment of pointers is 1. + // The eZ80 has 24-bit pointers, which aren't exact powers of two, tripping + // the assert. The alignment of eZ80 pointers is 1, so we bypass the check. if (target.cpu.arch == .ez80) return .fromByteUnits(1); return Alignment.fromNonzeroByteUnits(@divExact(target.ptrBitWidth(), 8)); } From cf3106da2789562aca1eac5e6a8bdac6655ebec9 Mon Sep 17 00:00:00 2001 From: Sam Connelly Date: Tue, 28 Oct 2025 06:14:57 -0400 Subject: [PATCH 21/24] remove ez80 atomic comment --- lib/zig.h | 1 - 1 file changed, 1 deletion(-) diff --git a/lib/zig.h b/lib/zig.h index c3ed058e926e..cbbb63b4d257 100644 --- a/lib/zig.h +++ b/lib/zig.h @@ -4339,7 +4339,6 @@ typedef int zig_memory_order; return val; \ } -/* The eZ80 does not support atomics beyond 8 bits */ zig_msvc_atomics( u8, uint8_t, char, 8, 8) zig_msvc_atomics( i8, int8_t, char, 8, 8) zig_msvc_atomics(u16, uint16_t, short, 16, 16) From da796c9d3e6985adad2d43118e4a58fe80b44e24 Mon Sep 17 00:00:00 2001 From: Sam Connelly Date: Tue, 28 Oct 2025 14:52:56 -0400 Subject: [PATCH 22/24] last? --- lib/std/zig/AstGen.zig | 16 ---------------- lib/std/zig/Zir.zig | 6 +----- lib/std/zig/llvm/Builder.zig | 10 ++-------- src/Air.zig | 4 ---- src/InternPool.zig | 32 -------------------------------- src/Sema.zig | 4 ---- src/Type.zig | 10 +--------- src/codegen/c/Type.zig | 4 ---- src/codegen/llvm.zig | 4 ---- 9 files changed, 4 insertions(+), 86 deletions(-) diff --git a/lib/std/zig/AstGen.zig b/lib/std/zig/AstGen.zig index 10835ec447f3..8a8a88db6f93 100644 --- a/lib/std/zig/AstGen.zig +++ b/lib/std/zig/AstGen.zig @@ -10300,9 +10300,7 @@ const primitive_instrs = std.StaticStringMap(Zir.Inst.Ref).initComptime(.{ .{ "f80", .f80_type }, .{ "false", .bool_false }, .{ "i16", .i16_type }, - .{ "i24", .i24_type }, .{ "i32", .i32_type }, - .{ "i48", .i48_type }, .{ "i64", .i64_type }, .{ "i128", .i128_type }, .{ "i8", .i8_type }, @@ -10312,10 +10310,8 @@ const primitive_instrs = std.StaticStringMap(Zir.Inst.Ref).initComptime(.{ .{ "true", .bool_true }, .{ "type", .type_type }, .{ "u16", .u16_type }, - .{ "u24", .u24_type }, .{ "u29", .u29_type }, .{ "u32", .u32_type }, - .{ "u48", .u48_type }, .{ "u64", .u64_type }, .{ "u128", .u128_type }, .{ "u1", .u1_type }, @@ -10793,19 +10789,15 @@ fn nodeImpliesMoreThanOnePossibleValue(tree: *const Ast, start_node: Ast.Node.In .f80_type, .f128_type, .i16_type, - .i24_type, .i32_type, - .i48_type, .i64_type, .i128_type, .i8_type, .isize_type, .type_type, .u16_type, - .u24_type, .u29_type, .u32_type, - .u48_type, .u64_type, .u128_type, .u1_type, @@ -11034,18 +11026,14 @@ fn nodeImpliesComptimeOnly(tree: *const Ast, start_node: Ast.Node.Index) bool { .f80_type, .f128_type, .i16_type, - .i24_type, .i32_type, - .i48_type, .i64_type, .i128_type, .i8_type, .isize_type, .u16_type, - .u24_type, .u29_type, .u32_type, - .u48_type, .u64_type, .u128_type, .u1_type, @@ -11164,12 +11152,8 @@ fn rvalueInner( as_ty | @intFromEnum(Zir.Inst.Ref.u16_type), as_ty | @intFromEnum(Zir.Inst.Ref.u29_type), as_ty | @intFromEnum(Zir.Inst.Ref.i16_type), - as_ty | @intFromEnum(Zir.Inst.Ref.u24_type), - as_ty | @intFromEnum(Zir.Inst.Ref.i24_type), as_ty | @intFromEnum(Zir.Inst.Ref.u32_type), as_ty | @intFromEnum(Zir.Inst.Ref.i32_type), - as_ty | @intFromEnum(Zir.Inst.Ref.u48_type), - as_ty | @intFromEnum(Zir.Inst.Ref.i48_type), as_ty | @intFromEnum(Zir.Inst.Ref.u64_type), as_ty | @intFromEnum(Zir.Inst.Ref.i64_type), as_ty | @intFromEnum(Zir.Inst.Ref.u128_type), diff --git a/lib/std/zig/Zir.zig b/lib/std/zig/Zir.zig index 7f9b3fca270f..8d57dbda7aec 100644 --- a/lib/std/zig/Zir.zig +++ b/lib/std/zig/Zir.zig @@ -2145,7 +2145,7 @@ pub const Inst = struct { ref_start_index = static_len, _, - pub const static_len = 128; + pub const static_len = 124; pub fn toRef(i: Index) Inst.Ref { return @enumFromInt(@intFromEnum(Index.ref_start_index) + @intFromEnum(i)); @@ -2185,13 +2185,9 @@ pub const Inst = struct { i8_type, u16_type, i16_type, - u24_type, - i24_type, u29_type, u32_type, i32_type, - u48_type, - i48_type, u64_type, i64_type, u80_type, diff --git a/lib/std/zig/llvm/Builder.zig b/lib/std/zig/llvm/Builder.zig index ce5f2654ea50..3bad020b9a8f 100644 --- a/lib/std/zig/llvm/Builder.zig +++ b/lib/std/zig/llvm/Builder.zig @@ -234,10 +234,8 @@ pub const Type = enum(u32) { i1, i8, i16, - i24, i29, i32, - i48, i64, i80, i128, @@ -370,7 +368,7 @@ pub const Type = enum(u32) { pub fn isInteger(self: Type, builder: *const Builder) bool { return switch (self) { - .i1, .i8, .i16, .i24, .i29, .i32, .i48, .i64, .i80, .i128 => true, + .i1, .i8, .i16, .i29, .i32, .i64, .i80, .i128 => true, else => switch (self.tag(builder)) { .integer => true, else => false, @@ -480,10 +478,8 @@ pub const Type = enum(u32) { .i1 => 1, .i8 => 8, .half, .bfloat, .i16 => 16, - .i24 => 24, .i29 => 29, .float, .i32 => 32, - .i48 => 48, .double, .i64, .x86_mmx => 64, .x86_fp80, .i80 => 80, .fp128, .ppc_fp128, .i128 => 128, @@ -879,10 +875,8 @@ pub const Type = enum(u32) { .i1, .i8, .i16, - .i24, .i29, .i32, - .i48, .i64, .i80, .i128, @@ -8744,7 +8738,7 @@ pub fn init(options: Options) Allocator.Error!Builder { ); assert(result.new and result.type == @field(Type, simple_field.name)); } - inline for (.{ 1, 8, 16, 24, 29, 32, 48, 64, 80, 128 }) |bits| + inline for (.{ 1, 8, 16, 29, 32, 64, 80, 128 }) |bits| assert(self.intTypeAssumeCapacity(bits) == @field(Type, std.fmt.comptimePrint("i{d}", .{bits}))); inline for (.{ 0, 4 }) |addr_space_index| { diff --git a/src/Air.zig b/src/Air.zig index aa0d2b2758c9..1b394ca1c161 100644 --- a/src/Air.zig +++ b/src/Air.zig @@ -990,13 +990,9 @@ pub const Inst = struct { i8_type = @intFromEnum(InternPool.Index.i8_type), u16_type = @intFromEnum(InternPool.Index.u16_type), i16_type = @intFromEnum(InternPool.Index.i16_type), - u24_type = @intFromEnum(InternPool.Index.u24_type), - i24_type = @intFromEnum(InternPool.Index.i24_type), u29_type = @intFromEnum(InternPool.Index.u29_type), u32_type = @intFromEnum(InternPool.Index.u32_type), i32_type = @intFromEnum(InternPool.Index.i32_type), - u48_type = @intFromEnum(InternPool.Index.u48_type), - i48_type = @intFromEnum(InternPool.Index.i48_type), u64_type = @intFromEnum(InternPool.Index.u64_type), i64_type = @intFromEnum(InternPool.Index.i64_type), u80_type = @intFromEnum(InternPool.Index.u80_type), diff --git a/src/InternPool.zig b/src/InternPool.zig index a9380a0bcc8f..a595fa502c0b 100644 --- a/src/InternPool.zig +++ b/src/InternPool.zig @@ -4597,13 +4597,9 @@ pub const Index = enum(u32) { i8_type, u16_type, i16_type, - u24_type, - i24_type, u29_type, u32_type, i32_type, - u48_type, - i48_type, u64_type, i64_type, u80_type, @@ -5073,16 +5069,6 @@ pub const static_keys: [static_len]Key = .{ .bits = 16, } }, - .{ .int_type = .{ - .signedness = .unsigned, - .bits = 24, - } }, - - .{ .int_type = .{ - .signedness = .signed, - .bits = 24, - } }, - .{ .int_type = .{ .signedness = .unsigned, .bits = 29, @@ -5098,16 +5084,6 @@ pub const static_keys: [static_len]Key = .{ .bits = 32, } }, - .{ .int_type = .{ - .signedness = .unsigned, - .bits = 48, - } }, - - .{ .int_type = .{ - .signedness = .signed, - .bits = 48, - } }, - .{ .int_type = .{ .signedness = .unsigned, .bits = 64, @@ -11997,13 +11973,9 @@ pub fn typeOf(ip: *const InternPool, index: Index) Index { .i8_type, .u16_type, .i16_type, - .u24_type, - .i24_type, .u29_type, .u32_type, .i32_type, - .u48_type, - .i48_type, .u64_type, .i64_type, .u80_type, @@ -12338,13 +12310,9 @@ pub fn zigTypeTag(ip: *const InternPool, index: Index) std.builtin.TypeId { .i8_type, .u16_type, .i16_type, - .u24_type, - .i24_type, .u29_type, .u32_type, .i32_type, - .u48_type, - .i48_type, .u64_type, .i64_type, .u80_type, diff --git a/src/Sema.zig b/src/Sema.zig index fd9e4c094435..ad469edf96f4 100644 --- a/src/Sema.zig +++ b/src/Sema.zig @@ -36070,13 +36070,9 @@ pub fn typeHasOnePossibleValue(sema: *Sema, ty: Type) CompileError!?Value { .i8_type, .u16_type, .i16_type, - .u24_type, - .i24_type, .u29_type, .u32_type, .i32_type, - .u48_type, - .i48_type, .u64_type, .i64_type, .u80_type, diff --git a/src/Type.zig b/src/Type.zig index 20661b2eadb5..6fdf0cace88d 100644 --- a/src/Type.zig +++ b/src/Type.zig @@ -1605,7 +1605,7 @@ fn abiSizeInnerOptional( pub fn ptrAbiAlignment(target: *const Target) Alignment { // The eZ80 has 24-bit pointers, which aren't exact powers of two, tripping // the assert. The alignment of eZ80 pointers is 1, so we bypass the check. - if (target.cpu.arch == .ez80) return .fromByteUnits(1); + if (target.cpu.arch == .ez80) return .@"1"; return Alignment.fromNonzeroByteUnits(@divExact(target.ptrBitWidth(), 8)); } @@ -3629,13 +3629,9 @@ pub fn resolveFields(ty: Type, pt: Zcu.PerThread) SemaError!void { .i8_type, .u16_type, .i16_type, - .u24_type, - .i24_type, .u29_type, .u32_type, .i32_type, - .u48_type, - .i48_type, .u64_type, .i64_type, .u80_type, @@ -4058,10 +4054,8 @@ pub fn isNullFromType(ty: Type, zcu: *const Zcu) ?bool { pub const @"u1": Type = .{ .ip_index = .u1_type }; pub const @"u8": Type = .{ .ip_index = .u8_type }; pub const @"u16": Type = .{ .ip_index = .u16_type }; -pub const @"u24": Type = .{ .ip_index = .u24_type }; pub const @"u29": Type = .{ .ip_index = .u29_type }; pub const @"u32": Type = .{ .ip_index = .u32_type }; -pub const @"u48": Type = .{ .ip_index = .u48_type }; pub const @"u64": Type = .{ .ip_index = .u64_type }; pub const @"u80": Type = .{ .ip_index = .u80_type }; pub const @"u128": Type = .{ .ip_index = .u128_type }; @@ -4069,9 +4063,7 @@ pub const @"u256": Type = .{ .ip_index = .u256_type }; pub const @"i8": Type = .{ .ip_index = .i8_type }; pub const @"i16": Type = .{ .ip_index = .i16_type }; -pub const @"i24": Type = .{ .ip_index = .i24_type }; pub const @"i32": Type = .{ .ip_index = .i32_type }; -pub const @"i48": Type = .{ .ip_index = .i48_type }; pub const @"i64": Type = .{ .ip_index = .i64_type }; pub const @"i128": Type = .{ .ip_index = .i128_type }; diff --git a/src/codegen/c/Type.zig b/src/codegen/c/Type.zig index 737e0792d616..b3a6bef7a9f3 100644 --- a/src/codegen/c/Type.zig +++ b/src/codegen/c/Type.zig @@ -1467,12 +1467,8 @@ pub const Pool = struct { .i8_type => return .i8, .u16_type => return .u16, .i16_type => return .i16, - .u24_type => return if (is_ez80) .u24 else .u32, - .i24_type => return if (is_ez80) .i24 else .i32, .u29_type, .u32_type => return .u32, .i32_type => return .i32, - .u48_type => return if (is_ez80) .u48 else .u64, - .i48_type => return if (is_ez80) .i48 else .i64, .u64_type => return .u64, .i64_type => return .i64, .u80_type, .u128_type => return .u128, diff --git a/src/codegen/llvm.zig b/src/codegen/llvm.zig index f289670da420..2a312d0d210a 100644 --- a/src/codegen/llvm.zig +++ b/src/codegen/llvm.zig @@ -3098,13 +3098,9 @@ pub const Object = struct { .i8_type, .u16_type, .i16_type, - .u24_type, - .i24_type, .u29_type, .u32_type, .i32_type, - .u48_type, - .i48_type, .u64_type, .i64_type, .u80_type, From a4dc91e7d94ee4d7a55477a0fa26695b3e0133d9 Mon Sep 17 00:00:00 2001 From: Sam Connelly Date: Wed, 29 Oct 2025 06:16:00 -0400 Subject: [PATCH 23/24] last part 2 --- lib/zig.h | 4 ++-- src/codegen/c/Type.zig | 1 - 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/lib/zig.h b/lib/zig.h index cbbb63b4d257..af7a23705469 100644 --- a/lib/zig.h +++ b/lib/zig.h @@ -410,8 +410,8 @@ #define zig_trap() __asm__ volatile("int $0x3") #elif defined(zig_x86) #define zig_trap() __asm__ volatile("ud2") -#elif defined(zig_ez80) -#define zig_trap() __asm__ volatile("trap") +#elif defined(zig_z80) +#define zig_trap() __asm__ volatile("db $DD, $DD") #else #define zig_trap() zig_trap_unavailable #endif diff --git a/src/codegen/c/Type.zig b/src/codegen/c/Type.zig index b3a6bef7a9f3..9426a60240f1 100644 --- a/src/codegen/c/Type.zig +++ b/src/codegen/c/Type.zig @@ -1449,7 +1449,6 @@ pub const Pool = struct { ) !CType { const ip = &pt.zcu.intern_pool; const zcu = pt.zcu; - const is_ez80 = zcu.getTarget().cpu.arch == .ez80; switch (ty.toIntern()) { .u0_type, .i0_type, From 955977744bb8d257d714689257248e5bcdf9859f Mon Sep 17 00:00:00 2001 From: Sam Connelly Date: Wed, 29 Oct 2025 14:44:32 -0400 Subject: [PATCH 24/24] More portable trap I guess The Z80 does not have "trap" instructions, but trap instructions on the eZ80 jump to 0x000000, which is almost the same as `rst 00h`. In addition, the Z80 and eZ80 both boot up at 0x(00)0000, so `rst 00h` is appropriate. --- lib/zig.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/zig.h b/lib/zig.h index af7a23705469..25f79ea5f7f0 100644 --- a/lib/zig.h +++ b/lib/zig.h @@ -411,7 +411,7 @@ #elif defined(zig_x86) #define zig_trap() __asm__ volatile("ud2") #elif defined(zig_z80) -#define zig_trap() __asm__ volatile("db $DD, $DD") +#define zig_trap() __asm__ volatile("rst 00h") #else #define zig_trap() zig_trap_unavailable #endif