Campbell lvds reader

[ctrea99]

Module for instantiating the ALTLVDS_RX IP and for performing word alignment on the incoming data from the VNIR sensor

[alex-epp]

Ok I looked at your code. For the most part it looks great. I can't see any obvious bugs or anything.

I made some comments in some of the files that highlight some issues I saw.

One other potential concern is I don't see any code that tests to see if your code is synthesizable (e.g. a top-level VHDL file that instantiates the LVDS reader and prevents it being optimized out somehow with e.g. keep attributes).

Also, have you looked into what kind of timing constraints we need for the LVDS input (if ALTLVDS doesn't handle that for us)?

[alex-epp]

You aren't using the sensor_comm files anywhere right? If not they shouldn't be in this pull request

[ctrea99]

That was my fault. I updated my local files from the github repo and it left those ones for some reason. Still not sure how to properly keep branches updated on a local machine.

[alex-epp]

If I understand right, the ports for this entity are in grouped according to three clock domains: system (reset_sys, alignment_done, cmd_start_align, word_alignment_error), LVDS in (lvds_signal_in) and parallel data out (data_par_XX, ctrl_par). A comment explaining this might make it a little more clear

[ctrea99]

Sorry. I intended there to be only 2 clock domains: the serial LVDS signals and clock which operate at 10x system clock frequency and everything else which runs at the system clock frequency.