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1. mini-TFHE mini-TFHE Public

   This repository contains my senior design project for ECSE398 in the fall semester of 2025, exploring the applications of homomorphic encryption and attempts to reduce computational complexity usin…

   Verilog 1

2. Verilyzer Verilyzer Public

   This is a fun and self-learning project exploring compiler design using Bison/Flex to compile and simulate Verilog circuits in C/C++.

   C 1

3. TinyPong TinyPong Public

   This is a TinyTapeout submission (TT-Sky25b) of a simple single-player Pong game written in Verilog as an addition to my original VGA Pong project. The final project is then fabbed onto a physical …

   Verilog 1

4. CellMuseum CellMuseum Public

   This is a standard VLSI cell library that contains custom combinational and sequential cells using Magic VLSI, ngspice simulation, DRC/LVS checks with netgen, and parasitic extractions.

   1

5. RISCV-CPU RISCV-CPU Public

   This is a RTL approach to implementing a simple RISC-V processor using VHDL and the Basys3 FPGA board. Fully synthesizable with instructions to run a simple Fibonacci sequence.

   VHDL 1

6. STM32-DevBoard STM32-DevBoard Public

   This is my personal project on using KiCad 7.0 to design, build, and manufacture a simple STM32 development board. Later, the board will be interfaced with a UART receiver on my FPGA board.

   VHDL