feat(sinker): Ship 8 — Yuv422p / NV16 RGBA (kernel reuse, no new SIMD)#18
feat(sinker): Ship 8 — Yuv422p / NV16 RGBA (kernel reuse, no new SIMD)#18
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Pull request overview
Adds native RGBA output support to additional MixedSinker YUV formats, expanding parity with existing RGB/Luma/HSV paths and validating behavior with new test coverage.
Changes:
- Update
MixedSinker<Yuv420p>::with_rgbacompile-fail doc example to use a still-not-wired format (Yuv444p). - Add
with_rgba/set_rgbaAPIs and RGBA row writing toMixedSinker<Yuv422p>andMixedSinker<Nv16>. - Add comprehensive NV16 and Yuv422p RGBA tests (gray/alpha defaults, RGB-vs-RGBA consistency, buffer-too-short, SIMD-vs-scalar, and cross-format invariants).
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| // ---- Yuv422p RGBA (Ship 8 PR 3) tests ----------------------------------- | ||
| // | ||
| // Yuv422p reuses the Yuv420p `_to_rgba_row` dispatcher (same row | ||
| // contract). Tests mirror the Yuv420p RGBA set; the cross-format | ||
| // invariant against Yuv420p (with solid chroma so 4:2:0 vertical | ||
| // upsample matches Yuv422p's per-row chroma) catches walker | ||
| // regressions specific to the Yuv422p RGBA wiring. |
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This section header/comment includes an internal milestone label ("Ship 8 PR 3"), which will become stale and isn’t useful context for future readers. Consider renaming to a descriptive, format-focused header (e.g., "Yuv422p RGBA tests").
| // ---- NV16 RGBA (Ship 8 PR 3) tests -------------------------------------- | ||
| // | ||
| // NV16 reuses the NV12 `_to_rgba_row` dispatcher (4:2:2's row | ||
| // contract is identical to NV12's). Tests mirror the NV12 set; | ||
| // the cross-format invariant against NV12 (with duplicated | ||
| // chroma rows so 4:2:0 vertical upsample matches NV16's per-row | ||
| // chroma) catches any wiring regression specific to the NV16 | ||
| // walker that the kernel-level tests don't cover. |
There was a problem hiding this comment.
The section header/comment mentions an internal milestone ("Ship 8 PR 3"), which is not meaningful long-term and makes the test suite harder to maintain/search. Prefer a timeless, descriptive header (e.g., "NV16 RGBA tests").
Codecov Report✅ All modified and coverable lines are covered by tests. 📢 Thoughts on this report? Let us know! |
Tranche 3 of Ship 8 sink-side RGBA. Wiring-only PR — no new SIMD code. The 4:2:2 formats reuse the 4:2:0 kernels from tranches 1 + 2:
Yuv422pcallsyuv_420_to_rgba_row(already shipped in PR #16), andNv16callsnv12_to_rgba_row(already shipped in PR #17). 4:2:2's per-row contract is identical to 4:2:0's — half-width chroma, one pair per Y pair — so the same kernel handles both with no changes.Scope
Sink-side only, default opaque alpha (
0xFF). Per the tracker indocs/color-conversion-functions.md§ Ship 8, this is tranche 3 of 7+:Yuv420pNv12,Nv21Yuv422p,Nv16Yuv444p,Nv24,Nv42,Yuv440pYuv420p9/10/12/14/16,P010/P012/P016Yuv422p9/10/12/14/16,Yuv440p10/12,P210/P212/P216Yuv444p9/10/12/14/16,P410/P412/P416Usage:
MixedSinker::<Nv16>works identically withNv16Frame+nv16_to(semi-planar interleaved UV).What's in this PR
Public API
MixedSinker<Yuv422p>::with_rgba(&mut [u8])/set_rgba— format-specific impl block, mirrors the Yuv420p pattern.MixedSinker<Nv16>::with_rgba(&mut [u8])/set_rgba— format-specific impl block, mirrors the NV12 pattern.No new public dispatchers — the existing
row::yuv_420_to_rgba_rowandrow::nv12_to_rgba_roware already on the public surface and handle 4:2:2 byte-identically.Kernel work
None. Per the existing comments in
src/sinker/mixed.rs:That comment is now extended to cover the RGBA path too. Both
MixedSinker<Yuv422p>::processandMixedSinker<Nv16>::processinvoke the existing_to_rgba_rowdispatchers as an independent kernel call (not compose) — same pattern as Yuv420p/NV12 from prior tranches.Doc updates
docs/color-conversion-functions.md§ Ship 8 tranche tracker — tranche 3 marked ✅ shipped, tranche 4 (Yuv444p / Nv24 / Nv42 / Yuv440p) promoted to "next".MixedSinker::<Yuv420p>::with_rgbamoved forward fromNv16toYuv444p(the next not-yet-wired format per the tranche tracker).Tests
+10 lib tests, total 453 (was 443):
nv16_matches_nv12_mixed_sinker_with_duplicated_chromaRGB-path test)No per-backend equivalence tests — the underlying kernels (
yuv_420_to_rgba_rowandnv12_to_rgba_row) are already exercised by the per-backend tests shipped in PR #16 and PR #17. The tranche-3 tests cover the wiring (MixedSinker integration, dispatcher routing); the kernel correctness is established.Local results (aarch64 macOS): 453 lib tests + 1 doctest pass; wasm32 + x86_64 cross-targets compile clean.
CI matrix coverage is unchanged from PR #17 — the same SSE4.1 / AVX2 / AVX-512 (via SDE) / NEON / wasm32 paths are exercised via the existing per-tier
colconv_disable_*rustflags. The new wiring tests run under each tier.What's deferred
yuv_444_to_rgb_rowfamily, so this will be a kernel-refactoring tranche similar to PRs feat(sinker): Ship 8 — Yuv420p RGBA output via const-ALPHA template #16 and feat(sinker): Ship 8 — NV12 / NV21 RGBA via const-ALPHA template #17 (const-generic-ALPHA on each backend).with_rgba_u16ships in tranches 5–7.Test plan
test,test-sde-avx512,cross,coverage,clippy,build,miri-*jobs.cargo doc --lib --no-depsclean (no new doc warnings vs. main).🤖 Generated with Claude Code