[ROCm] Add HIP support for AMD Instinct GPUs#31
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andyluo7 wants to merge 1 commit intoJeffreyXiang:mainfrom
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[ROCm] Add HIP support for AMD Instinct GPUs#31andyluo7 wants to merge 1 commit intoJeffreyXiang:mainfrom
andyluo7 wants to merge 1 commit intoJeffreyXiang:mainfrom
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Port all CUDA-specific code to work on both CUDA and ROCm via HIP: - Headers: #ifdef __HIP_PLATFORM_AMD__ guards for cuda.h → hip/hip_runtime.h, cub/cub.cuh → hipcub/hipcub.hpp - API: cudaMalloc/Free/Memcpy → hipMalloc/Free/Memcpy (guarded) - CUB → hipcub namespace mapping - ::cuda::std::tuple → ::rocprim::tuple (for DeviceRadixSort decomposer) - ::cuda::std::plus → hipcub::Sum() - Vec3f: add default __host__ __device__ constructor for hipcub compatibility - ATen/cuda → ATen/hip (in cubvh submodule) - setup.py: default arch gfx942, gate CUDA-only flags behind IS_HIP check Tested on AMD MI300X (gfx942) with ROCm 7.0.2 + PyTorch 2.9.1. All code remains cross-compilable for CUDA. Signed-off-by: Andy Luo <andyluo7@users.noreply.github.com>
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Summary
Port CuMesh to support AMD ROCm GPUs (MI300X / gfx942) via HIP.
Changes
#ifdef __HIP_PLATFORM_AMD__guards for cross-compilation::cuda::std::tuple→::rocprim::tuplefor DeviceRadixSort decomposerVec3fdefault constructor added for hipcubDeviceSegmentedReducecompatibilitygfx942, CUDA-only flags gated behindIS_HIPTesting
import cumeshsucceeds on AMD MI300X__HIP_PLATFORM_AMD__)Motivation
TRELLIS.2's
setup.shalready detects ROCm and installs ROCm PyTorch, but CuMesh's CUDA-specific code prevents it from building on AMD GPUs. This PR enables the full TRELLIS.2 pipeline on AMD hardware.