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Merged
YWHyuk merged 457 commits into from
Jul 30, 2025
Merged

Develop #146

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cb2a088
[Test/Mistral] Use dummy rotary encoder
YWHyuk Mar 12, 2025
2c0f409
[CI] Add mistral test case
YWHyuk Mar 12, 2025
4f723da
Merge pull request #119 from PSAL-POSTECH/mistral
YWHyuk Mar 13, 2025
a40e1bc
[Optimize] index expr
YunseonShin Mar 13, 2025
a87481c
Merge pull request #120 from PSAL-POSTECH/pooling
YWHyuk Mar 14, 2025
a75f733
[Frontend] Fix logical_not and select operation + 3D reduction fix
YWHyuk Mar 13, 2025
d3287fb
[Test/Mistral] Fix mistral test case
YWHyuk Mar 13, 2025
76c2065
[Frontend] Use i8 instead of i1 for torch.bool
YWHyuk Mar 14, 2025
7a66eb6
[Test/Mistral] Add concat test example
YWHyuk Mar 14, 2025
a05634f
[Frontend] Move index_set storage
YWHyuk Mar 14, 2025
c98b214
[Frontend] Avoid hash collision for compiled folder
YWHyuk Mar 14, 2025
ff9602a
[Test/mistral] Move kv_cache as an argument to be captured
YWHyuk Mar 17, 2025
20fb928
Merge pull request #121 from PSAL-POSTECH/mistral
YWHyuk Mar 17, 2025
52144b3
[Fusion] Convolution residual connection fusion implement
wok1909 Mar 7, 2025
baabc56
[Fusion] Convolution fusion debug
wok1909 Mar 11, 2025
5b2759f
[Fix] BMM template fix
wok1909 Mar 12, 2025
aa7f893
[Fix] Convolution wrapper template fix
wok1909 Mar 13, 2025
8943f1d
[Fix] Gemm combination mapping k_pad_factor fix
wok1909 Mar 17, 2025
e37830f
[Fix] Convolution single batch debug
wok1909 Mar 17, 2025
c50ba32
[CI] Add convolution fusion cases
wok1909 Mar 17, 2025
7c78473
[Fix] Resnet18 fusion timing fix
wok1909 Mar 19, 2025
3e6e670
[Fix] Allow k_pad_factor to be set to 1 when padding is not needed in…
wok1909 Mar 19, 2025
753cd42
Merge pull request #117 from PSAL-POSTECH/fusion
YWHyuk Mar 20, 2025
7be6e20
[Optimize] Maximize used vlane
YunseonShin Mar 18, 2025
8e09d26
[Experiments] dump path with config
YunseonShin Mar 18, 2025
1d1ed40
[Fix] Address Calculation with interleaving
YunseonShin Mar 20, 2025
1f2b0b6
[cleanup] rm unused code
YunseonShin Mar 20, 2025
3e65416
[Fix] fix nBL config
YunseonShin Mar 24, 2025
41ef9b8
[Fix] makes experiments dump path shorter
YunseonShin Mar 24, 2025
89b40c3
[Frontend] sub-tile size with K dim
YunseonShin Mar 24, 2025
3ef4339
[Fix] Max-pool template
YunseonShin Mar 24, 2025
750572b
[Fix] conv template optimize order
YunseonShin Mar 24, 2025
5f88abf
[CI] Fix authorization
YWHyuk Mar 24, 2025
9652bb0
[CI] Remove intermediate file during compile
YWHyuk Mar 24, 2025
26ef52f
[Frontend/common] Add mlir_vshape api to get the mlir tile type
YWHyuk Mar 19, 2025
10c3571
[Frontend] Seperate dma/load buffer
YWHyuk Mar 19, 2025
cfd57c8
[Frontend] Fix index generator ordering
YWHyuk Mar 19, 2025
a23d525
[Frontend] indexed access codegen implementation
YWHyuk Mar 20, 2025
bdbdf24
[Frontned/indirect] Support indirect access
YWHyuk Mar 24, 2025
39dfb83
[Frontend+config] Add IR dump config
YWHyuk Mar 24, 2025
c62ccc6
Merge pull request #122 from PSAL-POSTECH/scatter_gather
YWHyuk Mar 25, 2025
1d00fa1
[Frontend+config] Add LLVM IR dump config
YWHyuk Mar 25, 2025
5e07728
[Frontend] Peephole optimization for load/store operation
YWHyuk Mar 25, 2025
55c8cb3
[Funsim] Isolate dump storage for funcsim
YWHyuk Mar 26, 2025
c4251f8
[TOGGen] Fix multpile store node case
YWHyuk Mar 26, 2025
682d8e3
[TOG] Add indirect mode information
YWHyuk Mar 26, 2025
933d6fe
[Backend] Support indirect access modeling
YWHyuk Mar 26, 2025
39a1e75
[CI] Fix dockefile
YWHyuk Mar 26, 2025
3d57969
[Ramulator2] Update stat logic
YWHyuk Mar 27, 2025
a871f66
[Config] Seperate llvm ir dump option
YWHyuk Mar 27, 2025
bcf6791
[Debug] Gem5 debug script
YunseonShin Mar 28, 2025
98827e8
[Gem5/Spad] Fix spad modeling
YWHyuk Mar 31, 2025
de5b2b7
[Script] Add tog result parsing script
YWHyuk Mar 31, 2025
27c2eda
[Fix] Interconnect Bottleneck
YunseonShin Apr 1, 2025
7113895
[Config] TPUv4 config
YunseonShin Apr 2, 2025
620dc78
[Fix] SA utils & DRAM BW
YunseonShin Apr 2, 2025
a792e12
[Config] TPUv4 2 Core & CMEM
YunseonShin Apr 2, 2025
e214fff
[Gem5/Script] Set vlen configurable
YWHyuk Mar 31, 2025
4ada7f0
[Frontend] Fix reduction scalar store
YWHyuk Mar 31, 2025
e1cc52c
[Tests] Make shape optionable
YWHyuk Mar 31, 2025
8eacf27
[Frontend] Optimize reduce/elementwise code
YWHyuk Apr 2, 2025
177e2df
[Frontend] llc Apply O3 optimization
YWHyuk Apr 2, 2025
413b278
[Frontend] Use tpu v3 config as default config
YWHyuk Apr 2, 2025
c0938d6
[Gem5script] Minor update
YWHyuk Apr 2, 2025
0d345e4
[Backend] Unlimit number of node
YWHyuk Apr 2, 2025
f2b23ac
[Frontend] Support fine-grained computation fusion
YWHyuk Apr 3, 2025
5452852
Merge pull request #128 from PSAL-POSTECH/reduce
YWHyuk Apr 4, 2025
48ecef3
[Frontend] Optmize reduce operation by using partial reduce
YWHyuk Apr 4, 2025
7903df9
[Script] Print functionality result
YWHyuk Apr 4, 2025
b26f1dc
[Tests] Add vector ops experiment script
YWHyuk Apr 4, 2025
289bd81
[Frontend] Use more vectorlane for small-shape-reductions
YWHyuk Apr 4, 2025
f6083df
Merge pull request #129 from PSAL-POSTECH/reduce
YWHyuk Apr 4, 2025
b618d29
[Issue] TOG parser double free
YunseonShin Apr 8, 2025
d8abb99
[TOGSim] distinguish preload & compute
YunseonShin Apr 8, 2025
f266b3b
[Frontend] Avoid Row Conflict Tile Size
YunseonShin Apr 8, 2025
9149048
[Frontend] pseudo-auto-tune
YunseonShin Apr 8, 2025
448aa6b
[Fix] Experiments setting
YunseonShin Apr 8, 2025
45cd42a
Merge pull request #130 from PSAL-POSTECH/validation
YWHyuk Apr 9, 2025
e9df4ba
[Backendsim] Fix performance degradation
YWHyuk Apr 9, 2025
96373e8
Merge pull request #131 from PSAL-POSTECH/reduce
YWHyuk Apr 10, 2025
013d05f
[Script] Fix hetero experiment
YWHyuk Apr 11, 2025
766aef0
[Config] Remove unused configs and update chiplet config
YWHyuk Apr 10, 2025
045e563
[Backend+script] Update Numa stat for togsim and upload chiplet script
YWHyuk Apr 10, 2025
ae2cdd9
[Scheduler] Fix parallel execution mechanism
YWHyuk Apr 15, 2025
71af9f9
[Frontend/Template] Use torch.tensor&affine_map instead of is_transpo…
YWHyuk Apr 15, 2025
44affc3
[Config] Add multitenancy experiment
YWHyuk Apr 15, 2025
2aec746
Merge pull request #133 from PSAL-POSTECH/reduce
YWHyuk Apr 16, 2025
34909a4
[Fix] Maximize vlane usage when decreasing tile size
wok1909 Apr 17, 2025
2dac5ae
[Frontend] adjust fine-grained DMA
YunseonShin Apr 16, 2025
237acac
[Experiments] simulation cycle & tpuv3 booksim config
YunseonShin Apr 16, 2025
e0fe70f
[TOGSim] stats re-order
YunseonShin Apr 16, 2025
e9f1c60
[Frontend] Comment out template maxpool
YWHyuk Apr 16, 2025
183c189
[Config] Make scratchpad size optinable
YWHyuk Apr 16, 2025
1ce6789
[CI] Add mobile config CI
YWHyuk Apr 16, 2025
65a8494
[Frontend] Rework indexed operation
YWHyuk Apr 17, 2025
dde26a6
Merge pull request #135 from PSAL-POSTECH/validation
YWHyuk Apr 18, 2025
a67eef0
[Frontend] Fix reduction initial value
YWHyuk Apr 18, 2025
9e80488
[Frontend] Add spad usage tracking logic
YWHyuk Apr 21, 2025
e4aa268
[Frontend] Fix indexed operation for mistral case
YWHyuk Apr 21, 2025
3a73492
[CI] Fix cleanup job
YWHyuk Apr 21, 2025
7efbbba
[Frontend] Fix stack usage calculation
YWHyuk Apr 21, 2025
9ae5130
[Frontend] Introduce autotuning infrastructure
YWHyuk Apr 21, 2025
821a259
[Backendsim] Rework block sparse mechanism
YWHyuk Apr 22, 2025
cd82ea5
[Script] Update sparsity script
YWHyuk Apr 22, 2025
4befa5f
[Fix] Change initial tile size by number of vector lane and vlane_stride
wok1909 Apr 22, 2025
7d41171
[Frontend] Rebase with branch spad
wok1909 Apr 23, 2025
46e1b98
Merge pull request #140 from PSAL-POSTECH/auto-tune
YWHyuk Apr 23, 2025
b78d0e1
[Frontend] Fix tensor value dump logic to support non linearized stride
YWHyuk Apr 28, 2025
c117161
[Frontend] Catch unhandled spadoverflow exception
YWHyuk Apr 28, 2025
c4f39f7
[Frontend/Template] Fix bmm fusion awareness tiling
YWHyuk Apr 29, 2025
4c1e5c9
[Frontend/conv] Single batch conv fix
YWHyuk Apr 29, 2025
c1a8443
[Test] Add various conv test case
YWHyuk Apr 29, 2025
50403af
Merge pull request #141 from PSAL-POSTECH/spad
YWHyuk Apr 29, 2025
cd323d6
[Experiments] simulation cycle & tpuv3 booksim config
YunseonShin Apr 16, 2025
b75d272
[Frontend] CONV mapping for multi-core
YunseonShin Apr 29, 2025
d621ce8
[Log] Print L2 Cache log
YunseonShin Apr 29, 2025
b1c3359
[Experiments] Use scheduler for multi kernels simulation
YunseonShin May 8, 2025
6efb837
[Frontend] minimum number of tiles
YunseonShin May 9, 2025
8953aa3
[TOGSim] Core-level interleaving
YunseonShin May 9, 2025
5dc3d16
[Fix] recompute single batch conv spad size
YunseonShin May 15, 2025
cbd873f
Merge pull request #143 from PSAL-POSTECH/validation
YWHyuk May 19, 2025
b63c8f7
[Frontend] Add boilerpalte for sram allocation plan
YWHyuk May 12, 2025
408e09a
[Frontend+Simulator] Implement sram buffer allocation infra
YWHyuk May 13, 2025
4202eab
[TOGSim] Support manual l2 sram allocation
YWHyuk May 19, 2025
d54c9f0
[TOGSim] Fix missing header file for interval tree
YWHyuk May 19, 2025
19cea2f
[TOGSim] Remove sram allocation size checking mechansim
YWHyuk May 19, 2025
ab57bda
[TOGSim] Fix data cache write back logic
YWHyuk May 19, 2025
b68cb63
[Frontend] Fix spad option
YWHyuk May 19, 2025
d9d5c86
Merge pull request #144 from PSAL-POSTECH/spad
YWHyuk May 20, 2025
877c52a
[Frontend+Script] Add some script + timestamp for experminet
YWHyuk Jun 11, 2025
40f7c3e
[Frontend] Fix convolution fusion case for resnet inference
YWHyuk Jun 12, 2025
9424b7f
[Frontend/Fusion] Dont fuse maxpool now
YWHyuk Jun 12, 2025
0918533
[Frontend/Fusion] Fix naminig convention for scheduling
YWHyuk Jun 12, 2025
818b6db
[Fix] tile size for fusion
YunseonShin Jun 13, 2025
1aa37ca
[fix] experiments for inference
YunseonShin Jun 13, 2025
e50972e
[fix] vlane stride for vlane util
YunseonShin Jun 13, 2025
6bcdde1
Merge pull request #147 from PSAL-POSTECH/validation
YunseonShin Jun 13, 2025
bca7ba0
[Frontend/Fuson] Fix step size of epilogue
wok1909 Jun 14, 2025
a06323f
Merge pull request #149 from PSAL-POSTECH/fusion
YWHyuk Jun 15, 2025
b6e1020
[Tests] Add Matmul reduction fusion case
YWHyuk Jun 13, 2025
6677057
[Frontend/Fusion] Add matmul reduction fusion beta version
YWHyuk Jun 13, 2025
21ee34d
[Frontend/Fusion] Implement matmul+reduction fusion
YWHyuk Jun 13, 2025
a5f2660
[Frontend/Fusion] Fix node accessing
YWHyuk Jun 13, 2025
f5d6e5b
[Frontend/Fusion] Fix minor bugs for matmul+reduction
YWHyuk Jun 14, 2025
45a6d92
[Frontend/Fusion] Fix matmul-reduction fusion for non-square shape
YWHyuk Jun 14, 2025
2437850
[Frontend/Fusion] Fix matmul+reduction bugs
YWHyuk Jun 14, 2025
fb7b0e1
[Frontend/Fusion] Support BMM+reduction fusion
YWHyuk Jun 14, 2025
faf4988
[Frontend/Fusion] Fix matmul+reduction bugs
YWHyuk Jun 15, 2025
8586a16
[Frontend/Fusion] Add attention fusion case
YWHyuk Jun 15, 2025
863728d
Merge pull request #148 from PSAL-POSTECH/mm_red_fusion
YWHyuk Jun 15, 2025
0732db8
[Frontend] Add masked load
YWHyuk Jun 15, 2025
fefa193
[Frontend] naive Auto-tuning
YunseonShin Jun 14, 2025
9e5c29d
[fix] prohibit unsupported vlane size case
YunseonShin Jun 15, 2025
b76defb
[experiments] ILS script fix
YunseonShin Jun 15, 2025
c176d4f
[fix] use small vlane_stride for resnet
YunseonShin Jun 15, 2025
4fe0e1d
Merge pull request #150 from PSAL-POSTECH/validation
YunseonShin Jun 17, 2025
a750c0a
[Frontend] Fix masked load for softmax case
YWHyuk Jun 16, 2025
f3643ea
[Script+Stonne] Add script for stonne experiments
YWHyuk Jun 17, 2025
a5abb85
[SparseCore] Fix segfault for outerproduct
YWHyuk Jun 21, 2025
fc56028
[Frontend] 2D space autotune
YunseonShin Jun 17, 2025
4a41519
[Fix] Update extra spad cal logic
YWHyuk Jun 19, 2025
d30fef3
[TOGSim] Change inst issue logic to make it efficient
YWHyuk Jun 21, 2025
5a7a39d
[TOGSim] Add core dram bw stat
YWHyuk Jun 21, 2025
97dc265
[fix] prevent infinite loop in auto-tune
YunseonShin Jun 18, 2025
510cad4
[scripts] breakdown script
YunseonShin Jun 17, 2025
04dde98
[Script] Update chiplet script
YWHyuk Jun 21, 2025
b61e369
[Script] Force tile size for chiplet setting
YWHyuk Jun 30, 2025
e65cae9
[Example] BERT fusion
wok1909 Jun 18, 2025
29e2a42
[Gem5] Boost vector computation
YWHyuk Jun 21, 2025
1edd10d
Merge pull request #153 from PSAL-POSTECH/togsim_merge
YWHyuk Jun 30, 2025
1b27b4c
[Frontend/Fusion] Prologue fusion implementation working
wok1909 Jun 15, 2025
018078e
[Frontend/Fusion] Optimize BMM+Reduction fusion
YWHyuk Jun 17, 2025
9ce9310
[Frontend] optimize attention kernel
YunseonShin Jun 18, 2025
831dddf
[Fix] BMM weight fused
YunseonShin Jun 18, 2025
d0108fd
[Frontend/Fusion] Implement matmul+var_mean fusion for LayerNorm
YWHyuk Jun 18, 2025
bb2a083
[Temporary] Make compile it force
YWHyuk Jun 18, 2025
5190885
[Frontend/Fusion] Fix&cleanup fusion policy
YWHyuk Jun 18, 2025
e555ab8
[Frontend/Fusion] Fix prologue target buf selecting logic
YWHyuk Jun 19, 2025
3fc33e1
[Frontend] Optimize fusion tile size
YunseonShin Jun 19, 2025
66a4c41
[Frontend/Fusion] Update 1D load epilogue
YWHyuk Jun 19, 2025
ee5c1a9
[Frontend] Welford reduction fusion debug
wok1909 Jun 19, 2025
5e70202
[Fix] Matmul epilogue fusion
wok1909 Jun 19, 2025
2c67e9b
[Frontend] Add a spad reuse feature in the fusion kernel
YWHyuk Jun 19, 2025
c559bdc
[Frontend] Fix transposed 1D bias
YWHyuk Jun 20, 2025
d2aa73d
[fix] prologue fusion args & shape
YunseonShin Jun 20, 2025
fa7e57a
[fix] prologue prohibit subtile
YunseonShin Jun 21, 2025
75de3d4
[Validation] manual gemm tile size & fix tiling for double buffering
YunseonShin Jun 21, 2025
ed77bba
[experiments] FG DMA experiments
YunseonShin Jun 30, 2025
db2d505
[Fix] prohibit multi-thread for CI
YunseonShin Jun 30, 2025
3e6daf3
[Fix] minimum tile size and subtile K
YunseonShin Jun 30, 2025
29ee378
[Frontend] Make fusion optionable
YWHyuk Jun 30, 2025
af6e63d
[Frontend] Use kernel name from define_kernel
YWHyuk Jun 30, 2025
b82bf94
[Frontend] Don't use buffer's unique name to reuse kernels
YWHyuk Jun 30, 2025
c915f34
[Frontend] Add manual tile_stride for DimTile
YWHyuk Jun 30, 2025
491b911
[Frontend] Add utility method for kernel class
YWHyuk Jul 1, 2025
d86dc3a
[Frontend/Template] Rework template codegen
YWHyuk Jul 3, 2025
4fd7b69
[CI+Test] Add fusion test + update test case
YWHyuk Jul 11, 2025
9ae7a08
[Fix] Fix var_mean codegen + cheatsheet folder issue
YWHyuk Jul 11, 2025
9e0e2d4
[Frontend] Add exception handling for reduction loop only kernel
YWHyuk Jul 11, 2025
2109244
[Template] Fix a minor bug in GEMM template
YWHyuk Jul 11, 2025
3a8e0f8
[Frontend] Fix dram stride calculate logic
YWHyuk Jul 11, 2025
ae09ef2
[Frontend] Fix dram_stride
YWHyuk Jul 11, 2025
39405e7
[Frontend] Fix 1
YWHyuk Jul 11, 2025
5776d03
[Frontend] Fix wip
YWHyuk Jul 11, 2025
7699887
Revert final render position
YWHyuk Jul 11, 2025
b886867
[Frontend] Do not fuse for edge case
YWHyuk Jul 11, 2025
0bded10
[Frontend] Fusion condition change
YWHyuk Jul 11, 2025
b3c5d9c
[Frontend/Fusion] Add prologue fusion condition
YWHyuk Jul 12, 2025
b2e7110
[Frontend] Fix dram_stride + tile_size for reduction only case
YWHyuk Jul 12, 2025
dfd7809
[Frontend/Fusion] Add nop op fusion condition
YWHyuk Jul 12, 2025
237905f
[Frontend] Handle edge case of parse_index_list
YWHyuk Jul 12, 2025
0b9c0c3
Fix 2
YWHyuk Jul 12, 2025
5bcc969
[Frontend] Fix apply gen code
YWHyuk Jul 14, 2025
831fa9f
[Frontend] Indirect access fix
YWHyuk Jul 14, 2025
7abca4d
[Frontend/Fusion] Add something OMG
YWHyuk Jul 14, 2025
ed31307
[Frontend] Fix dima_alising for conv_template
YWHyuk Jul 15, 2025
80b7a85
[Frontend/Scheduling] Fix reduction fusion condition
YWHyuk Jul 15, 2025
0674195
[Frontend/template] Fix tile stride in convolution templates
YWHyuk Jul 17, 2025
6cd7b8b
[Frontend] Update fusion condition
YWHyuk Jul 17, 2025
4771bcb
[Test] Add test_bmm_reduction fusion
YWHyuk Jul 17, 2025
22e167d
[Frontend/Fusion] Add prologue fusion condition
YWHyuk Jul 17, 2025
4661442
[Frontend] Fix reverting the group when ther is no loop
YWHyuk Jul 18, 2025
2bea699
[Frontend] Add mask in the reduction if needed
YWHyuk Jul 18, 2025
9b23510
[Rename] Use encoder instead of decoder
YWHyuk Jul 19, 2025
4d1d0f5
[Frotend/Fusion] Relax the prologue fusion condition
YWHyuk Jul 19, 2025
8253c1d
[Frontend] Avoid tricky cases in the prologue fusion
YWHyuk Jul 19, 2025
edc3f57
[Frontend] Fix store epilogue
YWHyuk Jul 19, 2025
1d49f43
[Config] Remove deprecated config
YWHyuk Jul 21, 2025
903ff13
[TogSim] Update tile_stride logic
YWHyuk Jul 21, 2025
94b13e1
[Frontend] Make dma tag unique
YWHyuk Jul 21, 2025
737ed02
[TOGSim] Handle edge case tag matching
YWHyuk Jul 21, 2025
b18bcc0
[Frontend/Fusion] Do not allow prologue fusion for CONV
YWHyuk Jul 21, 2025
25612ff
Merge pull request #152 from PSAL-POSTECH/prologue
YWHyuk Jul 21, 2025
c90ee3d
[Log] Add silent mode for autotune
YWHyuk Jul 22, 2025
381d867
[Frotend] Increase autotune thread numbers
YWHyuk Jul 22, 2025
143b95b
[Simulator] Use filelock to avoid race condition
YWHyuk Jul 22, 2025
3e5ee24
[Frontend/autotune] Add failure case
YWHyuk Jul 23, 2025
35947ae
[TOGSim] minor update in logging system
YWHyuk Jul 24, 2025
9cda90c
[Frontend/Conv] Fix conv template bias codegen
YWHyuk Jul 24, 2025
3ea1c81
[Frontend/Template] Update dummy pooling template
YWHyuk Jul 24, 2025
328bd83
[Frontend/Config] Add timing pool config
YWHyuk Jul 24, 2025
bde2ca4
[Test] Add ResNet50 test case
YWHyuk Jul 24, 2025
a20a0c6
[Frontend/Template] Conv single stride tile size fix
YWHyuk Jul 24, 2025
0404422
[Frontend/Fusion] Make reduction-reduction configurable
YWHyuk Jul 24, 2025
8ef7fc6
[Artifact] Add cycle validation artifact script
YWHyuk Jul 24, 2025
6b6af14
[Artifact] Add speedup artifact script
YWHyuk Jul 25, 2025
3e427db
[Artifact] Add plot generation function
YWHyuk Jul 28, 2025
63eaab0
[CI] Add tag release workflow
YWHyuk Jul 28, 2025
b01daa6
[Artifact] Minor fix for summary script
YWHyuk Jul 30, 2025
5ec17ff
[CI] Fix docker file and action credential issue
YWHyuk Jul 30, 2025
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2 changes: 1 addition & 1 deletion .github/workflows/docker-base-image.yml
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Original file line number Diff line number Diff line change
Expand Up @@ -27,7 +27,7 @@ jobs:
with:
registry: ghcr.io
username: ${{ github.actor }}
password: ${{ secrets.GITHUB_TOKEN }}
password: ${{ secrets.GIT_ACCESS_TOKEN }}

# Step 4: Build and Push Docker Image
- name: Build and Push Docker Image
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