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README and pages are updated.
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‎README.md

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@@ -2,9 +2,9 @@ Pyverilog
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Python-based Hardware Design Processing Toolkit for Verilog HDL
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Copyright (C) 2013, Shinya Takamaeda-Yamazaki
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Copyright (C) 2014, Shinya Takamaeda-Yamazaki
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E-mail: takamaeda\_at\_arch.cs.titech.ac.jp
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E-mail: shinya\_at\_is.naist.jp
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License

‎pages.md

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Copyright and Contact
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Copyright (C) 2013, Shinya Takamaeda-Yamazaki
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Copyright (C) 2014, Shinya Takamaeda-Yamazaki
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E-mail: takamaeda\_at\_arch.cs.titech.ac.jp
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E-mail: shinya\_at\_is.naist.jp
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