Releases: PyHDI/veriloggen
Releases · PyHDI/veriloggen
0.6.1
0.6.0
0.5.4
Update
- Multiple instance handling capability is improved.
- copy_params/copy_ports/connect_params/connect_ports support the prefix, postfix, and exclude options.
Test environment
Mac OSX 10.11.1
- python 2.7.10 + pyverilog 1.0.4
- python 3.4.2 + pyverilog 1.0.4
- python 3.5.0 + pyverilog 1.0.4
Ubuntu 14.04
- python 2.7.6 + pyverilog 1.0.3
- python 3.4.3 + pyverilog 1.0.3
0.5.3
Update
- Import path to the libraries have been changed.
- Dataflow has been renamed as Pipeline, because a new dataflow library is under development.
- Bugs of Pipeline (Dataflow) have been resolved.
Test environment
Mac OSX 10.11.1
- python 2.7.10 + pyverilog 1.0.4
- python 3.4.2 + pyverilog 1.0.4
- python 3.5.0 + pyverilog 1.0.4
Ubuntu 14.04
- python 2.7.6 + pyverilog 1.0.3
- python 3.4.3 + pyverilog 1.0.3
0.5.2
Update
- to_verilog and from_verilog: prettified code generation from imported original RTL.
- test scripts are added.
Test environment
Mac OSX 10.10.5
- python 2.7.9 + pyverilog 1.0.3
- python 3.4.2 + pyverilog 1.0.3
- python 3.5.0 + pyverilog 1.0.3
Ubuntu 14.04
- python 2.7.6 + pyverilog 1.0.3
- python 3.4.3 + pyverilog 1.0.3
0.5.1
Update
- from_verilog: functions for reading existing Verilog code are improved.
- lib.dataflow supports user-custom operators by acc_custom().
- IntX and IntZ are merged to Int.
- More prettified source code is available with Pyverilog 1.0.2.
Test environment
Mac OSX 10.10.5
- python 2.7.9 + pyverilog 1.0.2
- python 3.4.2 + pyverilog 1.0.2
- python 3.5.0 + pyverilog 1.0.2
Ubuntu 14.04
- python 2.7.6 + pyverilog 1.0.2
- python 3.4.3 + pyverilog 1.0.2
0.5.0
Update
- Python 3.5.0 is supported, which is tested only on Mac OS environment.
- lib.dataflow is a dataflow pipeline builder (which is renamed from lib.pipeline).
- lib.dataflow supports the visualization by using pygraphviz (for python 2.7 and 3).
- lib.fsm: state traversal codes are evaluated and inserted lazily.
- lib.simulation supports ModelSim in addition to Icarus Verilog.
- Module supports add_hook(method, args, kwargs) for adding a lazy-evaluated method which is executed when to_verilog() method is called. Those methods do not affect the Module object state (like immutable), excepting the generated code. Usually a make_always() method is passed to add_hook(), and then it will called when to_verilog() is called.
- Constructor methods of lib.fsm.FSM, lib.seq.Seq, lib.dataflow.Dataflow are changed, so that they require a clock and reset signal. In contrast, make_always() methods do not require them no longer.
- All example codes use absolute_import and print_function for better Python3 support.
Test environment
Mac OSX 10.10.5
- python 2.7.9 + pyverilog 1.0.1
- python 3.4.2 + pyverilog 1.0.1
- python 3.5.0 + pyverilog 1.0.1
Ubuntu 14.04
- python 2.7.6 + pyverilog 1.0.1
- python 3.4.3 + pyverilog 1.0.1
0.4.3
0.4.2
Update
- lib.parallel.Parallel -> lib.seq.Seq
- Import path description is updated, and unnecessary 'sys.path.insert's are removed.
Test environment
Mac OSX 10.10.5
- python 2.7.9 + pyverilog 1.0.1
- python 3.4.2 + pyverilog 1.0.1
Ubuntu 14.04
- python 2.7.6 + pyverilog 1.0.1
- python 3.4.3 + pyverilog 1.0.1
0.4.1
Update
- Very stable release.
- setup.py is updated for the library dependency.
- veriloggen/utils is moved to top-level.
- Directory hierarchy of 'sample' and 'tests' are updated.
- Acceleration of test
Test environment
Mac OSX 10.10.5
- python 2.7.9 + pyverilog 1.0.0
- python 3.4.2 + pyverilog 1.0.0
Ubuntu 14.04
- python 2.7.6 + pyverilog 1.0.0
- python 3.4.3 + pyverilog 1.0.0