cpu/cortex-m: turn MPU support into a feature#13391
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cpu/cortexm_common/Makefile.features
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| ifneq ($(CPU_ARCH),cortex-m0) | ||
| FEATURES_PROVIDED += cortexm_mpu | ||
| endif |
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According to Wikipedia, the MPU is always optional. It's up to the chip vendor whether to include it or not.
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Hmok. Do all our non-cm0 CPUs have an MCU?
I'll add a check to the mpu test application.
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I've added a check. Seems like all our non-Cortex-M0 boards have an MPU, or at leastm __MPU_PRESENT set.
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Either __MPU_PRESENT is not undefined, or all our Cortex-M boards do have the optional MPU, even the CM0. @aabadie Could you verify the test succeeds e.g., on a stm32f031k6?
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@aabadie could you take a look at this? I don't have a M0 board...
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I tried on nucleo-f072rb, which is an M0, and the tests/mpu_stack_guard is correctly skipped by the build system.
The problem here is that, according to the __MPU_PRESENT macro in vendor files, stm32f1 and also some stm32f3 (so not all) CPUs doesn't provide an MPU. It's also unclear if stm32l0 provides an MPU or not (I'm wondering if the vendor files were manually altered for this family).
So, as suggested by @benpicco, I think this feature should be provided by default less widely. Maybe just for M4/M7 by default, and enable on a case-by-case basis for other CPU families (M0/M0plus,M3).
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I just checked the data sheets, neither samd2x nor saml2x (cm0p) implement an MPU.
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tests/mpu_stack_guard/Makefile.ci
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| @@ -1,3 +1,4 @@ | |||
| BOARD_INSUFFICIENT_MEMORY := \ | |||
| nucleo-f031k6 \ | |||
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This board (and stm32f030f4-demo) is already excluded by the FEATURES_REQUIRED += cortexm_mpu and should already be marked as unsupported by the CI. Why do you add it here ?
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Hm, seems like the feature guard doesn't work:
[kaspar@ng riot.tmp/tests/mpu_stack_guard (mpu_feature)]$ make info-boards-supported | grep -o nucleo-f031k6
nucleo-f031k6
[kaspar@ng riot.tmp/tests/mpu_stack_guard (mpu_feature)]$
[kaspar@ng riot.tmp/tests/mpu_stack_guard (mpu_feature)]$ BOARD=nucleo-f031k6 make info-debug-variable-CPU_ARCH
cortex-m0
[kaspar@ng riot.tmp/tests/mpu_stack_guard (mpu_feature)]$
Seems like CPU_ARCH is not available in Makefile.features.
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I can cut this part out of #13236 if it also helps here.
That would be awesome.
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Thanks a bunch.
[kaspar@ng riot.tmp/tests/mpu_stack_guard (mpu_feature)]$ make info-boards-supported | grep -o nucleo-f031k6
[kaspar@ng riot.tmp/tests/mpu_stack_guard (mpu_feature)]$
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So this needs a rebase now. |
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Done. Removed an unrelated ssp change, and renamed the WIP commit. |
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aabadie
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I think this PR cannot be merged in the current state: we should check more precisely which CPUs (family or even specific CPUs) provide an MPU or not. It seems some families doesn't provide an MPU (M0) or even not all CPUs of a given family (M3). For M4/M7, all CPUs seems to provide an MPU.
I also don't think the check on __MPU_PRESENT macro is needed as it seems to be defined to 0 if not already defined (can be verified with git grep __MPU_PRESENT).
cpu/cortexm_common/Makefile.features
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| ifneq ($(CPU_ARCH),cortex-m0) | ||
| FEATURES_PROVIDED += cortexm_mpu | ||
| endif |
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I tried on nucleo-f072rb, which is an M0, and the tests/mpu_stack_guard is correctly skipped by the build system.
The problem here is that, according to the __MPU_PRESENT macro in vendor files, stm32f1 and also some stm32f3 (so not all) CPUs doesn't provide an MPU. It's also unclear if stm32l0 provides an MPU or not (I'm wondering if the vendor files were manually altered for this family).
So, as suggested by @benpicco, I think this feature should be provided by default less widely. Maybe just for M4/M7 by default, and enable on a case-by-case basis for other CPU families (M0/M0plus,M3).
Even for M4 this seems to not not always be available (e.g., stm32f302r8 is an M4, but doesn't set __MPU_PRESENT). Seaveing through all CPU's is quite a hassle. I'm inclined to define this per-board, as that can be done quickly (by, e.g., use the buildtest output of all cortex-m, then add the feature to all board Makefile.features where it succeeded). @aabadie what do you think? |
I agree that the feature should be provided more finely. Maybe provide the feature in whitelisted board as a first step ? (and no need to wait for buildtest ;)) |
We can just add it to known-good CPU families for now, it's easy to fix omissions later.
But this is not a board feature. We should get rid of MCU features in boards, not add more of those. |
Hmm,
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Agreed, but the way our build configuration is modeled, there's no way to print the tree of dependencies (board -> cpu -> cpu_fam -> cpu_arch), and there are many layers of includes with non-standard names. I can do the manual equivalent of Doing it "the right way" will take maybe a day? We'd have to go through all ~180 board Makefiles, figure out which CPU family they're in, try to find commonalities, build, refine. |
I see no contradiction 😉
I'm not advocating for a complete list, just adding |
Makes sense. Which ones are those? |
stm32f4 (checked the smallest member of the family), stm32l4 (dito), nrf51, nrf52, samd5x, cc26x2_cc13x2, lm4f120, sam3, saml1x, cc2538 |
Done. Removed nrf51, they don't have an MPU. |
The Data Sheet has a chapter about an MPU though. |
Hm, maybe it is non-standard. The CMSIS headers define Seems like "MPU" is what Nordic calls flash protection: |
aabadie
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Could FEATURES_PROVIDED += cortexm_mpu be also added to stm32f1, stm32f2 and stm32l1 ?
(initially iotlab-*, nucleo-l152re and nucleo-207zg were whitelisted in the test).
Added the stm32f2 and l1. The others don't define __MPU_PRESENT. |
Did you forget to push ? |
yup :) |
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There are some missing that where whitelisted before and actually work. Will add them. |
Contribution description
This turns the MPU of Cortex-M into a feature.
Testing procedure
Issues/PRs references