cpu/lpc23xx: enable support for picolibc#14830
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aabadie merged 2 commits intoRIOT-OS:masterfrom Sep 8, 2020
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| # use the nano-specs of Newlib when available | ||
| USEMODULE += newlib_nano | ||
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| ifeq (1,$(PICOLIBC)) |
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Why are we using a variable here? Shouldn't it be
ifeq (picolibc newlib,$(USEMODULE))
# whatever default you want to choose
endif
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Just copied that from cpu/cortexm_common/Makefile.dep :)
Do you mean picolibc should be selected by USEMODULE += picolibc instead of PICOLIBC=1?
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Yes, I think that would be better, I understand it is unrelated with this PR but it would be good to do this cleanup.
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Should we do that as a follow-up?
The RISC-V port also uses this variable.
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I agree that this would be nicer but I think that this should be done in a follow-up, with all affected CPUs changed at once (cortexm, fe310 and lpc23xx).
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Contribution description
lpc23xxworks with the same ARM targeted picolibc as our Cortex-M targets. The linker script also looks almost the same, so adding support for TLS is just copy & paste.So all that's left to do is enable support for picolibc in the build system.
Testing procedure
Only tried
tests/thread_cooperation,examples/defaultandtests/malloc. All worked, buttests/mallocwould only use the first heap segment as multi-heap support is not implemented yet in the picolibc support code.newlibc
picolibc
newlibc
picolibc
Issues/PRs references
depends on #14827