drivers/at86rf215: implement Reduced Power Consumption

[benpicco]

Contribution description

Reduced Power Consumption is available for MR-O-QPSK and MR-FSK.
In this mode the receiver will be turned off periodically, defaulting to a 50% duty cycle.

This reduces power consumption when in IDLE RX by almost 50% and is therefore enabled by default.

Reduced Power Consumption needs to be disabled during CCA.

Testing procedure

Receiving frames with MR-O-QPSK (and MR-FSK) should work as reliable as before.
MR-OFDM and legacy O-QPSK should not be affected.

Issues/PRs references

split off #12128

[fjmolinas]

@benpicco can you show some power consumption measurements?

[benpicco]

Those are the numbers for one interface, for this I disabled the sub-GHz interface with DISABLE_MODULE += at86rf215_subghz.

RPC off

• legacy O-QPSK: 32.3 mA
• MR-O-QPSK: 33 mA

RPC on

• legacy O-QPSK: 32.3 mA
• MR-O-QPSK: 18.6 mA

[fjmolinas]

@benpicco is there any shortcoming/tradeoff of enabling this mode?

[fjmolinas]

The minimal ON time t on equates to the minimal preamble length of the receiver which depends on the FSK symbol rate, this does not seem to be taking that into account, seems like BBCn_FSKRPCONT and BBCn_FSKRPCOFFT should be configured appropriately, same for OQPSK.

[benpicco]

The minimal ON time t on equates to the minimal preamble length of the receiver which depends on the FSK symbol rate, this does not seem to be taking that into account, seems like BBCn_FSKRPCONT and BBCn_FSKRPCOFFT

indeed

same for OQPSK.

Fortunately not 😆

For MR-O-QPSK, the AT86RF215 supports receive operation with reduced power consumption (RPC) during RX listen.
This can be configured with sub-register OQPSKC2.RPC set to 1.
The principle of power saving is similar to the one of MR-FSK, with the exception that the OFF and ON time cannot be configured.

[benpicco]

Ah I already added this as part of the MR-FSK PR.

[fjmolinas]

Then can we remove that part from the PR? and leave it in the PR introducing the feature?

[benpicco]

Sore, dropped it from that PR and will add it back here once MR-FSK is merged.

patch

diff --git a/drivers/at86rf215/at86rf215_fsk.c b/drivers/at86rf215/at86rf215_fsk.c
index fdf21210f8..1d0b468004 100644
--- a/drivers/at86rf215/at86rf215_fsk.c
+++ b/drivers/at86rf215/at86rf215_fsk.c
@@ -383,6 +383,14 @@ static void _set_srate(at86rf215_t *dev, uint8_t srate, bool mod_idx_half)
 
     at86rf215_FSK_prepare_rx(dev);
 
+    /* t_on = t_off = t_min (time to TX minimal preamble length) */
+    uint8_t t_on = 4 * _FSKPL(srate) * 100 / at86rf215_fsk_srate_10kHz[srate];
+
+    at86rf215_reg_write(dev, dev->BBC->RG_FSKRPCONT, t_on);
+    at86rf215_reg_write(dev, dev->BBC->RG_FSKRPCOFFT, t_on);
+
+    DEBUG("[at86rf215] t_on: %d µs\n", t_on);
+
     /* set symbol rate, preamble is less than 256 so set high bits 0 */
     at86rf215_reg_write(dev, dev->BBC->RG_FSKC1, srate);
 }
@@ -454,6 +462,15 @@ int at86rf215_configure_FSK(at86rf215_t *dev, uint8_t srate, uint8_t mod_idx, ui
     /* enable direct modulation */
     at86rf215_reg_write(dev, dev->BBC->RG_FSKDM, FSKDM_EN_MASK | FSKDM_PE_MASK);
 
+    /* 16 µs base time */
+    uint8_t fskrpc = 0x5;
+
+    /* Enable / Disable Reduced Power Consumption */
+    if (dev->flags & AT86RF215_OPT_RPC) {
+        fskrpc |= FSKRPC_EN_MASK;
+    }
+    at86rf215_reg_write(dev, dev->BBC->RG_FSKRPC, fskrpc);
+
     /* set forward error correction */
     at86rf215_FSK_set_fec(dev, fec);

[fjmolinas]

Ahh I think I wasn't very cleay hahaha, I meant removing the RPC-MR-FSK, related code from this PR(#14960) and moving it to the PR introducing MR-FSK (so #14959). I though this one would be quicker to get in.. sorry for the confusion

[benpicco]

Ok, I removed it here.

[benpicco]

There is an errata though:

The usage of reduced power consumption mode (RPC) for MR-FSK and MR-OQPSK may cause a higher packet error rate.
Software workaround:

• Write to the register RFn_PLL the value 9 if the AT86RF215 is in state RX and the desired channel frequency
  has been reached.
• Write to the register RFn_PLL the value 8 prior to a change of the channel frequency or if the state RX has
  been left (including automatic state change from RX to TXPREP).

Basically toggling the (undocumented) least significant bit in RFn_PLL

[fjmolinas]

Basically toggling the (undocumented) least significant bit in RFn_PLL

Huh... that looks like a weird work arround. Anyway, should this be a compile time configuration?

[fjmolinas]

Please squash @benpicco!

[fjmolinas]

ACK, trusting @benpicco testing.

[benpicco]

Thank you for the review!