Introduce ATxmega CPU and Boards by nandojve · Pull Request #15758 · RIOT-OS/RIOT

nandojve · 2021-01-12T21:57:16Z

Contribution description

Add ATxmega CPU and 4 boards. This is an attempt to implement the #15703 Feature Request.
The code was based on the @Josar 's XMEGA branch. However, it was ported and enhanced on many aspects.

Details:

cpu/atxmega

This concentrate all MCU family. This means, all drivers should be put in here. There is no necessity to create an atxmega_common structure.

Drivers:

CPUID: Full functional, it gets the 11 bytes unique identification from NVM
NVM: minimal implementation to supply cpuid.
GPIO: Full functional driver including interrupts.
PM: Full functional with all 4 MCU levels.
Timer: Full functional. It support all multiple instances.
USART: Full functional asynchronous mode. It support all multiple instances.

Interrupt: The XMEGA have a HW multilevel interrupt controller and current version already enable all levels. However, the implementation selects at board configs all interrupts as LOW LEVEL. This means, the behavior will be same as any other MEGA MCU. User can increase the priority but need understand the implications. The Round Robin queue can be enabled at board start-up to avoid starvation from LOW LEVEL interrupts.

SAUL: Supported

boards/atxmega

Follow same structure to concentrate all board common code.

Testing procedure

Tests were conducted on the following boards:

atxmega-a1-xplained (XMEGA-A1)
atxmega-a1-xpro (XMEGA-A1U)
WM-200 (XMEGA-A3U)

Applications:

examples/saul
examples/timer_periodic_wakeup
tests/buttons
Tutorials/task-01

In general, the attempts were to make sure code not only builds but it run on real hardware.

Issues/PRs references

Dependencies: #15712

CC: @benpicco @maribu

cpu/atxmega/ldscripts_compat/README.md

maribu · 2021-01-19T10:44:02Z

Sorry for the long delay. My xmegaa1u-xpro and my xmegaa3bu-xpld arrived recently, so I should be able to test both MCU families. I hope I'll find time to review soon :-)

nandojve · 2021-01-19T23:26:22Z

Drop all linker files, rebased and adjusted the files.
I added another commit to change AVR-GDB check order. I noted that in Debian gdb doesn't start with gdb-multiarch.
This change allows me to start debug by JTAG and/or PDI.

benpicco

Looks good!

For GPIOs you can also use the auto_test command from tests/periph_gpio.
It takes two GPIOs that you have to connect with a jumper, then runs several configurations on them and tests if the results are as expected.

boards/atxmega-a1-xplained/include/board.h

boards/atxmega-a3bu-xplained/include/periph_conf.h

boards/common/atxmega/board.c

boards/common/atxmega/include/periph_conf_atxmega_common.h

cpu/atxmega/periph/timer.c

cpu/atxmega/periph/uart.c

cpu/avr8_common/thread_arch.c

nandojve · 2021-02-05T00:32:33Z

Sorry for my delay but it was necessary rework some parts. Thanks for remind me about that!

I tried to address all comments best I can.

New commits need to be move to right place.
Re-implemented timer
It supports up to 8 timers
Each timer can be a free running using with up to 4 compare units or
Each timer can be 1 periodic unit

Note: In free running mode: CCx = CNT + value, because when CNT == PER => CNT = 0
UART was fixed to work same way to ATmega. Now AVR8 supports up to 7 UART
GPIO Added missing compatibility flags. ATxmega need configure multi level interrupt to allow GPIO INT to work. To be minimal compatible I added LOW level as default

Note: The current GPIO driver uses pin masks to operate instead pin number. This allows to act in multiple pins simultaneous. I hope be possible move forward this way because it is nice to read/write/toggle multiple pins with one command.

maribu · 2021-02-05T08:30:27Z

Note: The current GPIO driver uses pin masks to operate instead pin number. This allows to act in multiple pins simultaneous. I hope be possible move forward this way because it is nice to read/write/toggle multiple pins with one command.

@gschorcht has a PR open that provides this (among other improvements): #14602

The internal representation of gpio_t is up to the implementation, but it has remain 100% compatible with the current GPIO API.

maribu

Some comments inline

boards/wm-200/include/periph_conf.h

cpu/atxmega/include/periph_cpu.h

cpu/avr8_common/include/helper.h

dist/tools/avarice/debug.sh

drivers/ws281x/Kconfig

drivers/ws281x/Makefile.dep

sys/include/crypto/helper.h

boards/common/atxmega/Makefile.include

maribu

Some minor nitpicks.

Testing wise: pm does now work like a charm. Even the first char on UART is now showing up correctly and reliably. (I haven't checked with a logic analyzer to be 100% sure of this, but some corruption in the first char is considered a reasonable trade off anyway, as waiting after waking up from low power mode for the UART clock to spin up again be a big pain in the ass for all real time critical low power applications.)

cpu/atxmega/periph/uart.c

maribu · 2021-03-15T20:02:24Z

Please squash directly after the style nitpicks.

@aabadie, @benpicco: After the nitpicks this is IMO ready for merge. Anything left to do from your side?

The ATxmega can have up to 8 UARTs. This increase from 2 up to 7 to keep avr8_state flags with 8 bits wide. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>

Some mega boards enabling global irq at board_init. This moves that responsability to cpu/avr8_common to create a common point to all variants. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>

@Josar

Add ATxmega common files and cpu definitions. This works was originally developed by @Josar. The 2018 version were port to 2021 mainline. This version changes original port to have only the atxmega CPU definition. With that, all family can be accomodated. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>

Add missing ATxmega reset cause register. This shares same definitions from ATmega CPU. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>

The current context switch and thread stack init don't have a generic way to save/restore registers for all AVR-8 variations. This add defines to check flash/data sizes and rework: - thread_stack_init - avr8_context_save - avr8_context_restore The new implementation add missing RAMP D/X/Y registers that are used by XMEGA variations. The rules to add EIND, RAMP(D,X,Y,Z) register are: - EIND must be added if device have more than 128k flash. This means, device can access more than 64k words in flash. - RAMP D/X/Y must be added if device have or can address more than 64k data. - RAMPZ must be added if device can address more than 64k bytes of flash or data. With above rules there is no necessity to check by device because it is mandatory the registers for those MCU variations. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>

Current there is no way to split code between ATmega and ATxmega in drivers. This differentiate AVR8 cores into MEGAs and XMEGAs. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>

The XMEGA CPU have a Programmable Multilevel Interrupt Controller. This enables all three PMIC levels. By default, all interrupts are preconfigured as LOW Level without Round Robin queue. This works as any MCU with interrupt enabled. In order to get benefit from Multilevel Interrupts user need increase the interrupt level by own. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>

ATxmega have many clock options. This introduce clk_init into cpu_init to allow user select between a default configuration or perform fine clock tune. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>

Atmel AVR-8 CPU was reworked to accomodate variants like ATxmega. This rename to atmega.inc.mk to avr8.inc.mk to be compliant with new directory structure. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>

The current script doesn't allow change script path and name. Add LDSCRIPT_COMPAT_PATH and LDSCRIPT_COMPAT_NAME default values to allow a unique path inside atxmega folder. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>

The current script don't allow change debug protocol and not allows set proper part name for xmega. This make DEBUGPROTO optional with JTAG as default protocol. It add a filter for atxmega to add proper AVRDUDE_PROGRAMMER_FLAGS. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>

@Josar

Add atxmega common board definitions. This works is a port from @Josar with few modifications. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>

Add initial version. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>

The current MODULE_WS281X_ATMEGA only supports ATmega core. This update Kconfig to select MODULE_WS281X_ATMEGA module by CPU_CORE_AVR_MEGA instead HAS_ARCH_AVR8. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>

Atmel XMEGA CPU don't have a timer prescaler div16 and div32 option. This means that at full speed (32MHz) it is not possible have a 1MHz clock tick. Define default tick to 500kHz and add atxmega-a1u-xpro boards to test list. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>

Add atxmega-a1u-xpro board to BOARD_INSUFFICIENT_MEMORY list to exclude test since boards don't have enough data memory. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>

Add atxmega-a1u-xpro board to BOARD_INSUFFICIENT_MEMORY list to exclude examples since board don't have enough data memory. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>

Fix missing entry for avr8_common that was created when moving code from atmega_common at RIOT-OS#15712. As complement add myself as code owner for xmega related things. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>

nandojve · 2021-03-16T01:05:16Z

Some minor nitpicks.

Testing wise: pm does now work like a charm. Even the first char on UART is now showing up correctly and reliably. (I haven't checked with a logic analyzer to be 100% sure of this, but some corruption in the first char is considered a reasonable trade off anyway, as waiting after waking up from low power mode for the UART clock to spin up again be a big pain in the ass for all real time critical low power applications.)

Thank you @maribu!

maribu

Let me throw in an ACK. @benpicco and @aabadie: Anything still open from your side?

benpicco

Looks good to me too.

benpicco · 2021-03-20T21:12:35Z

Let's get this in 😄
Thank you for the addition - feel free to add the remaining boards now in a follow-up PR.

benpicco added Area: cpu Area: CPU/MCU ports Platform: AVR Platform: This PR/issue effects AVR-based platforms Type: new feature The issue requests / The PR implemements a new feature for RIOT labels Jan 12, 2021

nandojve force-pushed the avr8_xmega branch 4 times, most recently from 4dd8842 to a4e7535 Compare January 14, 2021 00:15

nandojve marked this pull request as ready for review January 14, 2021 00:48

nandojve requested review from MrKevinWeiss, cgundogan, jia200x, kaspar030, leandrolanzieri and roberthartung as code owners January 14, 2021 00:48

maribu reviewed Jan 19, 2021

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nandojve force-pushed the avr8_xmega branch from a4e7535 to c866b41 Compare January 19, 2021 23:22

nandojve force-pushed the avr8_xmega branch from c866b41 to aefb109 Compare January 23, 2021 22:57

benpicco added the CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR label Jan 28, 2021

benpicco reviewed Jan 28, 2021

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nandojve requested a review from kYc0o as a code owner February 5, 2021 23:06

nandojve requested review from benpicco and maribu February 6, 2021 12:16

maribu reviewed Feb 8, 2021

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maribu reviewed Feb 11, 2021

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nandojve mentioned this pull request Feb 13, 2021

dist/tools/avarice/debug.sh: Change gdb check order #15998

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benpicco added this to the Release 2021.04 milestone Feb 18, 2021

maribu reviewed Mar 15, 2021

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cpu/atxmega/periph/uart.c Outdated Show resolved Hide resolved

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nandojve added 18 commits March 15, 2021 20:16

cpu/avr8_common/include/cpu.h: Increase number of uart

9081a3b

The ATxmega can have up to 8 UARTs. This increase from 2 up to 7 to keep avr8_state flags with 8 bits wide. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>

cpu/avr8_common: Move irq_enable from board to cpu

d041199

Some mega boards enabling global irq at board_init. This moves that responsability to cpu/avr8_common to create a common point to all variants. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>

cpu/avr8_common: Add xmega reset cause register

8c1203c

Add missing ATxmega reset cause register. This shares same definitions from ATmega CPU. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>

cpu/avr8_common: Differentiate avr8 cpu cores

70c5976

Current there is no way to split code between ATmega and ATxmega in drivers. This differentiate AVR8 cores into MEGAs and XMEGAs. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>

cpu/avr8_common/avr8_cpu: Add xmega clock

aa3af4e

ATxmega have many clock options. This introduce clk_init into cpu_init to allow user select between a default configuration or perform fine clock tune. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>

makefiles/arch/atmega.inc.mk: Rename to avr8.inc.mk

699248c

Atmel AVR-8 CPU was reworked to accomodate variants like ATxmega. This rename to atmega.inc.mk to avr8.inc.mk to be compliant with new directory structure. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>

makefiles/arch/avr8: Add xmega linker conditions

4b2bcd5

The current script doesn't allow change script path and name. Add LDSCRIPT_COMPAT_PATH and LDSCRIPT_COMPAT_NAME default values to allow a unique path inside atxmega folder. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>

boards/common: Introduce Atmel xmega common

85fcba0

Add atxmega common board definitions. This works is a port from @Josar with few modifications. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>

boards: Introduce atxmega-a1u-xpro board

b843cfb

Add initial version. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>

drivers/ws281x/Kconfig: Select mega cpu by cpu_core

9cbe8bc

The current MODULE_WS281X_ATMEGA only supports ATmega core. This update Kconfig to select MODULE_WS281X_ATMEGA module by CPU_CORE_AVR_MEGA instead HAS_ARCH_AVR8. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>

tests: Exclude atxmega-a1u-xpro board due low mem

6475620

Add atxmega-a1u-xpro board to BOARD_INSUFFICIENT_MEMORY list to exclude test since boards don't have enough data memory. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>

examples: Exclude atxmega-a1u-xpro board due low mem

d23b139

Add atxmega-a1u-xpro board to BOARD_INSUFFICIENT_MEMORY list to exclude examples since board don't have enough data memory. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>

CODEOWNERS: Add nandojve for xmega things

0bd55de

Fix missing entry for avr8_common that was created when moving code from atmega_common at RIOT-OS#15712. As complement add myself as code owner for xmega related things. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>

nandojve force-pushed the avr8_xmega branch from 2c041d6 to 0bd55de Compare March 16, 2021 00:06

nandojve requested a review from maribu March 16, 2021 00:07

maribu approved these changes Mar 19, 2021

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benpicco approved these changes Mar 19, 2021

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benpicco merged commit ee5b707 into RIOT-OS:master Mar 20, 2021

nandojve deleted the avr8_xmega branch March 20, 2021 23:28

kaspar030 added the Release notes: added Set on PRs that have been processed into the release notes for the current release. label Apr 28, 2021

maribu mentioned this pull request Jun 28, 2022

sys/flash_utils: helpers to store data in flash #18148

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Contribution description

cpu/atxmega

boards/atxmega

Testing procedure

Issues/PRs references

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