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Merge pull request #2079 from SummerGGift/add_stm32_new_framework
[bsp][stm32] add more drivers && bsp
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bsp/stm32/README.md

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@@ -9,6 +9,7 @@ STM32 系列 BSP 目前支持情况如下表所示:
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| [stm32f407-atk-explorer](stm32f407-atk-explorer/) | 正点原子 F407 探索者开发板 |
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| [stm32f429-atk-apollo](stm32f429-atk-apollo/) | 正点原子 F429 阿波罗开发板 |
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| [stm32f429-fire-challenger](stm32f429-fire-challenger/) | 野火 F429 挑战者开发板 |
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| [stm32l475-atk-pandora](stm32l475-atk-pandora/) | 正点原子 L475 潘多拉 IoT 开发板 |
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| [stm32f767-fire-challenger](stm32f767-fire-challenger/) | 野火 F767 挑战者开发板 |
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了解每个 BSP 的详细情况可以阅读该 BSP 下的 readme 文件,如需使用 BSP 更多功能可参考 docs 文件夹下提供的说明文档:

bsp/stm32/docs/STM32系列BSP添加教程.md

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@@ -130,6 +130,8 @@ STM32 BSP 由三部分组成,分别是 (1) 通用库、(2) BSP 模板和 (3)
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![修改启动文件和芯片型号](./figures/SConscript.png)
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注意:如果在文件夹中找不到相应系列的 .s 文件,可能是多个系列的芯片重用了相同的启动文件,此时可以在 CubeMX 中生成目标芯片的工程,查看使用了哪个启动文件,然后再修改启动文件名。
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#### 修改工程模板
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**template** 文件是生成 MDK/IAR 工程的模板文件,通过修改该文件可以设置工程中使用的芯片型号以及下载方式。MDK4/MDK5/IAR 的工程模板文件,如下图所示:
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bsp/stm32/libraries/HAL_Drivers/SConscript

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@@ -13,7 +13,13 @@ if GetDepend(['RT_USING_PIN']):
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if GetDepend(['RT_USING_SERIAL']):
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src += ['drv_usart.c']
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if GetDepend(['RT_USING_HWTIMER']):
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src += ['drv_hwtimer.c']
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if GetDepend(['RT_USING_PWM']):
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src += ['drv_pwm.c']
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if GetDepend(['RT_USING_SPI']):
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src += ['drv_spi.c']
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@@ -22,10 +28,7 @@ if GetDepend(['RT_USING_QSPI']):
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if GetDepend(['RT_USING_USB_DEVICE']):
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src += ['drv_usb.c']
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if GetDepend(['RT_USING_SDCARD']):
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src += ['drv_sdcard.c']
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if GetDepend(['RT_USING_I2C', 'RT_USING_I2C_BITOPS']):
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src += ['drv_soft_i2c.c']
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@@ -56,6 +59,9 @@ if GetDepend(['BSP_USING_ON_CHIP_FLASH', 'SOC_SERIES_STM32L4']):
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if GetDepend(['BSP_USING_WDT']):
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src += ['drv_wdt.c']
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if GetDepend(['BSP_USING_SDIO']):
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src += ['drv_sdio.c']
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src += ['drv_common.c']
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path = [cwd]
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/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2018-12-13 zylx first version
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*/
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#ifndef __PWM_CONFIG_H__
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#define __PWM_CONFIG_H__
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#include <rtthread.h>
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#ifdef BSP_USING_PWM2
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#ifndef PWM2_CONFIG
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#define PWM2_CONFIG \
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{ \
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.tim_handle.Instance = TIM2, \
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.name = "pwm2", \
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.channel = 0 \
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}
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#endif /* PWM2_CONFIG */
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#endif /* BSP_USING_PWM2 */
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#ifdef BSP_USING_PWM3
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#ifndef PWM3_CONFIG
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#define PWM3_CONFIG \
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{ \
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.tim_handle.Instance = TIM3, \
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.name = "pwm3", \
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.channel = 0 \
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}
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#endif /* PWM3_CONFIG */
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#endif /* BSP_USING_PWM3 */
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#ifdef BSP_USING_PWM4
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#ifndef PWM4_CONFIG
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#define PWM4_CONFIG \
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{ \
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.tim_handle.Instance = TIM4, \
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.name = "pwm4", \
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.channel = 0 \
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}
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#endif /* PWM4_CONFIG */
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#endif /* BSP_USING_PWM4 */
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#ifdef BSP_USING_PWM5
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#ifndef PWM5_CONFIG
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#define PWM5_CONFIG \
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{ \
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.tim_handle.Instance = TIM5, \
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.name = "pwm5", \
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.channel = 0 \
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}
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#endif /* PWM5_CONFIG */
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#endif /* BSP_USING_PWM5 */
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#endif /* __PWM_CONFIG_H__ */
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/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2018-12-13 BalanceTWK first version
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*/
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#ifndef __SDIO_CONFIG_H__
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#define __SDIO_CONFIG_H__
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#include <rtthread.h>
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#include "stm32f1xx_hal.h"
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#ifdef BSP_USING_SDIO
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#define SDIO_BUS_CONFIG \
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{ \
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.Instance = SDIO, \
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.dma_rx.dma_rcc = RCC_AHBENR_DMA2EN, \
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.dma_tx.dma_rcc = RCC_AHBENR_DMA2EN, \
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.dma_rx.Instance = DMA2_Channel4, \
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.dma_rx.dma_irq = DMA2_Channel4_IRQn, \
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.dma_tx.Instance = DMA2_Channel4, \
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.dma_tx.dma_irq = DMA2_Channel4_IRQn, \
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}
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#define SPI1_DMA_RX_IRQHandler DMA2_Channel4_IRQHandler
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#define SPI1_DMA_TX_IRQHandler DMA2_Channel4_IRQHandler
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#endif
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#endif /*__SDIO_CONFIG_H__ */
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/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2018-12-11 zylx first version
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*/
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#ifndef __TIM_CONFIG_H__
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#define __TIM_CONFIG_H__
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#include <rtthread.h>
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#ifndef TIM_DEV_INFO_CONFIG
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#define TIM_DEV_INFO_CONFIG \
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{ \
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.maxfreq = 1000000, \
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.minfreq = 2000, \
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.maxcnt = 0xFFFF, \
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.cntmode = HWTIMER_CNTMODE_UP, \
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}
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#endif /* TIM_DEV_INFO_CONFIG */
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#ifdef BSP_USING_TIM2
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#ifndef TIM2_CONFIG
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#define TIM2_CONFIG \
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{ \
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.tim_handle.Instance = TIM2, \
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.tim_irqn = TIM2_IRQn, \
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.name = "timer2", \
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}
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#endif /* TIM2_CONFIG */
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#endif /* BSP_USING_TIM2 */
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#ifdef BSP_USING_TIM3
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#ifndef TIM3_CONFIG
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#define TIM3_CONFIG \
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{ \
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.tim_handle.Instance = TIM3, \
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.tim_irqn = TIM3_IRQn, \
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.name = "timer3", \
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}
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#endif /* TIM3_CONFIG */
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#endif /* BSP_USING_TIM3 */
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#ifdef BSP_USING_TIM4
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#ifndef TIM4_CONFIG
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#define TIM4_CONFIG \
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{ \
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.tim_handle.Instance = TIM4, \
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.tim_irqn = TIM4_IRQn, \
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.name = "timer4", \
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}
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#endif /* TIM4_CONFIG */
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#endif /* BSP_USING_TIM4 */
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#ifdef BSP_USING_TIM5
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#ifndef TIM5_CONFIG
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#define TIM5_CONFIG \
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{ \
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.tim_handle.Instance = TIM5, \
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.tim_irqn = TIM5_IRQn, \
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.name = "timer5", \
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}
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#endif /* TIM5_CONFIG */
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#endif /* BSP_USING_TIM5 */
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#endif /* __TIM_CONFIG_H__ */
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/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2018-12-13 zylx first version
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*/
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#ifndef __PWM_CONFIG_H__
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#define __PWM_CONFIG_H__
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#include <rtthread.h>
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#ifdef BSP_USING_PWM2
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#ifndef PWM2_CONFIG
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#define PWM2_CONFIG \
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{ \
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.tim_handle.Instance = TIM2, \
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.name = "pwm2", \
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.channel = 0 \
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}
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#endif /* PWM2_CONFIG */
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#endif /* BSP_USING_PWM2 */
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#ifdef BSP_USING_PWM3
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#ifndef PWM3_CONFIG
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#define PWM3_CONFIG \
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{ \
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.tim_handle.Instance = TIM3, \
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.name = "pwm3", \
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.channel = 0 \
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}
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#endif /* PWM3_CONFIG */
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#endif /* BSP_USING_PWM3 */
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#ifdef BSP_USING_PWM4
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#ifndef PWM4_CONFIG
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#define PWM4_CONFIG \
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{ \
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.tim_handle.Instance = TIM4, \
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.name = "pwm4", \
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.channel = 0 \
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}
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#endif /* PWM4_CONFIG */
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#endif /* BSP_USING_PWM4 */
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#ifdef BSP_USING_PWM5
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#ifndef PWM5_CONFIG
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#define PWM5_CONFIG \
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{ \
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.tim_handle.Instance = TIM5, \
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.name = "pwm5", \
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.channel = 0 \
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}
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#endif /* PWM5_CONFIG */
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#endif /* BSP_USING_PWM5 */
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#endif /* __PWM_CONFIG_H__ */
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/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2018-12-13 BalanceTWK first version
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*/
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#ifndef __SDIO_CONFIG_H__
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#define __SDIO_CONFIG_H__
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#include <rtthread.h>
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#include "stm32f4xx_hal.h"
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#ifdef BSP_USING_SDIO
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#define SDIO_BUS_CONFIG \
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{ \
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.Instance = SDIO, \
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.dma_rx.dma_rcc = RCC_AHB1ENR_DMA2EN, \
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.dma_tx.dma_rcc = RCC_AHB1ENR_DMA2EN, \
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.dma_rx.Instance = DMA2_Stream3, \
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.dma_rx.channel = DMA_CHANNEL_4, \
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.dma_rx.dma_irq = DMA2_Stream3_IRQn, \
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.dma_tx.Instance = DMA2_Stream6, \
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.dma_tx.channel = DMA_CHANNEL_4, \
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.dma_tx.dma_irq = DMA2_Stream6_IRQn, \
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}
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#define SPI1_DMA_RX_IRQHandler DMA2_Stream3_IRQHandler
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#define SPI1_DMA_TX_IRQHandler DMA2_Stream6_IRQHandler
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#endif
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#endif /*__SDIO_CONFIG_H__ */
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/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2018-12-11 zylx first version
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*/
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#ifndef __TIM_CONFIG_H__
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#define __TIM_CONFIG_H__
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#include <rtthread.h>
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#ifndef TIM_DEV_INFO_CONFIG
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#define TIM_DEV_INFO_CONFIG \
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{ \
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.maxfreq = 1000000, \
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.minfreq = 3000, \
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.maxcnt = 0xFFFF, \
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.cntmode = HWTIMER_CNTMODE_UP, \
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}
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#endif /* TIM_DEV_INFO_CONFIG */
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#ifdef BSP_USING_TIM11
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#ifndef TIM11_CONFIG
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#define TIM11_CONFIG \
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{ \
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.tim_handle.Instance = TIM11, \
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.tim_irqn = TIM1_TRG_COM_TIM11_IRQn, \
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.name = "timer11", \
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}
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#endif /* TIM11_CONFIG */
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#endif /* BSP_USING_TIM11 */
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#ifdef BSP_USING_TIM13
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#ifndef TIM13_CONFIG
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#define TIM13_CONFIG \
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{ \
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.tim_handle.Instance = TIM13, \
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.tim_irqn = TIM8_UP_TIM13_IRQn, \
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.name = "timer13", \
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}
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#endif /* TIM13_CONFIG */
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#endif /* BSP_USING_TIM13 */
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#ifdef BSP_USING_TIM14
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#ifndef TIM14_CONFIG
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#define TIM14_CONFIG \
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{ \
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.tim_handle.Instance = TIM14, \
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.tim_irqn = TIM8_TRG_COM_TIM14_IRQn, \
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.name = "timer14", \
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}
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#endif /* TIM14_CONFIG */
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#endif /* BSP_USING_TIM14 */
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#endif /* __TIM_CONFIG_H__ */

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