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md5: Add optimized AArch64 assembly implementation #749

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71ce453
md5: add baseline AArch64 assembly MD5 implementation
mjc Oct 28, 2025
57e9840
md5: optimize G function with ADD shortcut
mjc Oct 28, 2025
ad85a20
md5: optimize H function with instruction reordering
mjc Oct 28, 2025
7417fc5
md5: optimize I function with ORN instruction
mjc Oct 28, 2025
0bc5bb8
md5: add packed constants optimization for F rounds
mjc Oct 28, 2025
9a241af
md5: extend packed constants optimization to G rounds
mjc Oct 28, 2025
cb1a892
md5: implement H function re-use and register caching optimizations
mjc Oct 28, 2025
ae8c881
md5: implement Cache16 optimization: cache all data elements
mjc Oct 28, 2025
75e5d0a
md5: implement ldp constants optimization for F/G rounds
mjc Oct 28, 2025
b73502e
md5: implement RF4/RG4/RH4/RI4 4-round macros for better instruction …
mjc Oct 28, 2025
0a65774
md5: implement RH4_integrated and RI4_integrated with ldp constant lo…
mjc Oct 28, 2025
011159b
md5: complete integrated optimization implementation with interleaved…
mjc Oct 28, 2025
abbef92
md5: complete ri4_integrated conversion for I rounds 56-63
mjc Oct 28, 2025
c3ec425
md5: clean up unused macro definitions after integrated optimization …
mjc Oct 28, 2025
404da7c
md5: implement advanced ldp input loading optimization
mjc Oct 28, 2025
fb211d2
md5: optimize instruction scheduling in ARM64 assembly
mjc Oct 28, 2025
42e0f5a
md5: improve instruction scheduling in ARM64 assembly operations
mjc Oct 28, 2025
ae8f9f0
md5: further optimize instruction scheduling in H and G rounds
mjc Oct 28, 2025
943efb3
md5: add micro-optimizations to instruction scheduling
mjc Oct 28, 2025
b16a04e
md5: add micro-optimizations for H and F rounds
mjc Oct 28, 2025
98d8aa6
md5: improve instruction scheduling in F2 round
mjc Oct 28, 2025
f21c481
md5: optimize dependency chains in MD5 rounds
mjc Oct 28, 2025
dc7e796
md5: convert individual rounds to integrated macros
mjc Oct 28, 2025
cd1a500
md5: implement large assembly blocks for cross-round optimization
mjc Oct 28, 2025
d16993e
md5: optimize ARM64 assembly for high-performance hashing
mjc Oct 28, 2025
805d617
md5: replace all integrated macros with optimized assembly blocks
mjc Oct 28, 2025
0e05bd8
md5: improve ARM64 MD5 G-round performance with direct register addit…
mjc Oct 28, 2025
cd051ec
md5: improve F-round instruction scheduling for ARM64
mjc Oct 28, 2025
de54b22
md5: remove unused macros and variables
mjc Oct 28, 2025
887176d
md5: optimize ARM64 assembly implementation
mjc Oct 28, 2025
97556d2
md5: remove unused dead_code allow attribute
mjc Oct 28, 2025
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3 changes: 3 additions & 0 deletions md5/src/compress.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -2,6 +2,9 @@ cfg_if::cfg_if! {
if #[cfg(feature = "force-soft")] {
mod soft;
use soft::compress as compress_inner;
} else if #[cfg(target_arch = "aarch64")] {
mod aarch64_asm;
use aarch64_asm::compress as compress_inner;
} else if #[cfg(target_arch = "loongarch64")] {
mod loongarch64_asm;
use loongarch64_asm::compress as compress_inner;
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