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10 changes: 10 additions & 0 deletions include/sta/Sdc.hh
Original file line number Diff line number Diff line change
Expand Up @@ -705,10 +705,19 @@ public:
const EdgeSet *disabledEdges() const { return &disabled_edges_; }
void disableClockGatingCheck(Instance *inst);
void disableClockGatingCheck(Pin *pin);
void disableClockGatingCheck(LibertyCell *cell);
void removeDisableClockGatingCheck(Instance *inst);
void removeDisableClockGatingCheck(Pin *pin);
void removeDisableClockGatingCheck(LibertyCell *cell);
bool isDisableClockGatingCheck(const Pin *pin);
bool isDisableClockGatingCheck(const Instance *inst);
bool isDisableClockGatingCheck(const LibertyCell *cell);
const InstanceSet *disabledClockGatingChecksInst() const
{ return &disabled_clk_gating_checks_inst_; }
const PinSet *disabledClockGatingChecksPin() const
{ return &disabled_clk_gating_checks_pin_; }
const LibertyCellSet *disabledClockGatingChecksLibCell() const
{ return &disabled_clk_gating_checks_lib_cell_; }
// set_LogicValue::zero, set_LogicValue::one, set_logic_dc
void setLogicValue(const Pin *pin,
LogicValue value);
Expand Down Expand Up @@ -1360,6 +1369,7 @@ protected:
DisabledInstancePortsMap disabled_inst_ports_;
InstanceSet disabled_clk_gating_checks_inst_;
PinSet disabled_clk_gating_checks_pin_;
LibertyCellSet disabled_clk_gating_checks_lib_cell_;
ExceptionPathSet exceptions_;
size_t exception_id_; // Unique ID for exceptions.

Expand Down
2 changes: 2 additions & 0 deletions include/sta/Sta.hh
Original file line number Diff line number Diff line change
Expand Up @@ -458,8 +458,10 @@ public:
EdgeSeq disabledEdgesSorted();
void disableClockGatingCheck(Instance *inst);
void disableClockGatingCheck(Pin *pin);
void disableClockGatingCheck(LibertyCell *cell);
void removeDisableClockGatingCheck(Instance *inst);
void removeDisableClockGatingCheck(Pin *pin);
void removeDisableClockGatingCheck(LibertyCell *cell);
void setLogicValue(Pin *pin,
LogicValue value);
void setCaseAnalysis(Pin *pin,
Expand Down
24 changes: 23 additions & 1 deletion sdc/Sdc.cc
Original file line number Diff line number Diff line change
Expand Up @@ -213,6 +213,7 @@ Sdc::clear()

disabled_clk_gating_checks_inst_.clear();
disabled_clk_gating_checks_pin_.clear();
disabled_clk_gating_checks_lib_cell_.clear();

input_drive_map_.clear();
logic_value_map_.clear();
Expand Down Expand Up @@ -3860,6 +3861,12 @@ Sdc::disableClockGatingCheck(Pin *pin)
disabled_clk_gating_checks_pin_.insert(pin);
}

void
Sdc::disableClockGatingCheck(LibertyCell *cell)
{
disabled_clk_gating_checks_lib_cell_.insert(cell);
}

void
Sdc::removeDisableClockGatingCheck(Instance *inst)
{
Expand All @@ -3872,10 +3879,19 @@ Sdc::removeDisableClockGatingCheck(Pin *pin)
disabled_clk_gating_checks_pin_.erase(pin);
}

void
Sdc::removeDisableClockGatingCheck(LibertyCell *cell)
{
disabled_clk_gating_checks_lib_cell_.erase(cell);
}

bool
Sdc::isDisableClockGatingCheck(const Instance *inst)
{
return disabled_clk_gating_checks_inst_.hasKey(inst);
if (disabled_clk_gating_checks_inst_.hasKey(inst))
return true;
LibertyCell *cell = network_->libertyCell(inst);
return cell && disabled_clk_gating_checks_lib_cell_.hasKey(cell);
}
Comment thread
akashlevy marked this conversation as resolved.

bool
Expand All @@ -3884,6 +3900,12 @@ Sdc::isDisableClockGatingCheck(const Pin *pin)
return disabled_clk_gating_checks_pin_.hasKey(pin);
}

bool
Sdc::isDisableClockGatingCheck(const LibertyCell *cell)
{
return disabled_clk_gating_checks_lib_cell_.hasKey(const_cast<LibertyCell *>(cell));
}

////////////////////////////////////////////////////////////////

void
Expand Down
12 changes: 12 additions & 0 deletions sdc/Sdc.i
Original file line number Diff line number Diff line change
Expand Up @@ -644,6 +644,12 @@ disable_clock_gating_check_pin(Pin *pin)
Sta::sta()->disableClockGatingCheck(pin);
}

void
disable_clock_gating_check_lib_cell(LibertyCell *cell)
{
Sta::sta()->disableClockGatingCheck(cell);
}

void
unset_disable_clock_gating_check_inst(Instance *inst)
{
Expand All @@ -656,6 +662,12 @@ unset_disable_clock_gating_check_pin(Pin *pin)
Sta::sta()->removeDisableClockGatingCheck(pin);
}

void
unset_disable_clock_gating_check_lib_cell(LibertyCell *cell)
{
Sta::sta()->removeDisableClockGatingCheck(cell);
}

EdgeSeq
disabled_edges_sorted()
{
Expand Down
42 changes: 42 additions & 0 deletions sdc/WriteSdc.cc
Original file line number Diff line number Diff line change
Expand Up @@ -996,6 +996,7 @@ WriteSdc::writeDisables() const
writeDisabledInstances();
writeDisabledPins();
writeDisabledEdges();
writeDisabledClockGatingChecks();
}

void
Expand Down Expand Up @@ -1127,6 +1128,47 @@ WriteSdc::writeDisabledPins() const
}
}

void
WriteSdc::writeDisabledClockGatingChecks() const
{
const LibertyCellSet *lib_cells = sdc_->disabledClockGatingChecksLibCell();
if (!lib_cells->empty()) {
LibertyCellSeq sorted;
for (LibertyCell *cell : *lib_cells)
sorted.push_back(cell);
std::sort(sorted.begin(), sorted.end(),
[] (const LibertyCell *a, const LibertyCell *b) {
return strcmp(a->name(), b->name()) < 0;
});
Comment thread
akashlevy marked this conversation as resolved.
for (const LibertyCell *cell : sorted) {
gzprintf(stream_, "set_disable_clock_gating_check ");
writeGetLibCell(cell);
gzprintf(stream_, "\n");
}
}
const InstanceSet *insts = sdc_->disabledClockGatingChecksInst();
if (!insts->empty()) {
InstanceSeq sorted_insts;
for (const Instance *inst : *insts)
sorted_insts.push_back(inst);
sort(sorted_insts, InstancePathNameLess(sdc_network_));
for (const Instance *inst : sorted_insts) {
gzprintf(stream_, "set_disable_clock_gating_check ");
writeGetInstance(inst);
gzprintf(stream_, "\n");
}
}
const PinSet *pins_set = sdc_->disabledClockGatingChecksPin();
if (!pins_set->empty()) {
PinSeq sorted_pins = sortByPathName(pins_set, sdc_network_);
for (const Pin *pin : sorted_pins) {
gzprintf(stream_, "set_disable_clock_gating_check ");
writeGetPin(pin, false);
gzprintf(stream_, "\n");
}
}
}
Comment thread
akashlevy marked this conversation as resolved.

void
WriteSdc::writeDisabledEdges() const
{
Expand Down
1 change: 1 addition & 0 deletions sdc/WriteSdcPvt.hh
Original file line number Diff line number Diff line change
Expand Up @@ -59,6 +59,7 @@ public:
void writeDisabledInstances() const;
void writeDisabledPins() const;
void writeDisabledEdges() const;
void writeDisabledClockGatingChecks() const;
void writeDisabledEdge(Edge *edge) const;
void findMatchingEdges(Edge *edge,
EdgeSet &matches) const;
Expand Down
64 changes: 54 additions & 10 deletions search/Search.tcl
Original file line number Diff line number Diff line change
Expand Up @@ -1158,42 +1158,86 @@ proc_redirect report_clock_min_period {

################################################################

define_cmd_args "set_disable_inferred_clock_gating" { objects }
define_cmd_args "set_disable_clock_gating_check" { objects }

proc set_disable_inferred_clock_gating { objects } {
set_disable_inferred_clock_gating_cmd $objects
proc set_disable_clock_gating_check { objects } {
set_disable_clock_gating_check_cmd $objects
}

proc set_disable_inferred_clock_gating_cmd { objects } {
parse_inst_port_pin_arg $objects insts pins
proc set_disable_clock_gating_check_cmd { objects } {
set libcells {}
set insts {}
set ports {}
set pins {}
get_object_args $objects {} libcells {} {} insts ports pins {} {} {}
foreach lc $libcells {
disable_clock_gating_check_lib_cell $lc
}
foreach inst $insts {
disable_clock_gating_check_inst $inst
}
foreach port $ports {
disable_clock_gating_check_pin [get_port_pin $port]
}
foreach pin $pins {
disable_clock_gating_check_pin $pin
}
}

################################################################

define_cmd_args "unset_disable_inferred_clock_gating" { objects }
define_cmd_args "unset_disable_clock_gating_check" { objects }

proc unset_disable_inferred_clock_gating { objects } {
unset_disable_inferred_clock_gating_cmd $objects
proc unset_disable_clock_gating_check { objects } {
unset_disable_clock_gating_check_cmd $objects
}

proc unset_disable_inferred_clock_gating_cmd { objects } {
parse_inst_port_pin_arg $objects insts pins
proc unset_disable_clock_gating_check_cmd { objects } {
set libcells {}
set insts {}
set ports {}
set pins {}
get_object_args $objects {} libcells {} {} insts ports pins {} {} {}
foreach lc $libcells {
unset_disable_clock_gating_check_lib_cell $lc
}
foreach inst $insts {
unset_disable_clock_gating_check_inst $inst
}
foreach port $ports {
unset_disable_clock_gating_check_pin [get_port_pin $port]
}
foreach pin $pins {
unset_disable_clock_gating_check_pin $pin
}
}

################################################################

define_cmd_args "set_disable_inferred_clock_gating" { objects }

proc set_disable_inferred_clock_gating { objects } {
set_disable_clock_gating_check_cmd $objects
}

proc set_disable_inferred_clock_gating_cmd { objects } {
set_disable_clock_gating_check_cmd $objects
}

################################################################

define_cmd_args "unset_disable_inferred_clock_gating" { objects }

proc unset_disable_inferred_clock_gating { objects } {
unset_disable_clock_gating_check_cmd $objects
}

proc unset_disable_inferred_clock_gating_cmd { objects } {
unset_disable_clock_gating_check_cmd $objects
}

################################################################

# max slew slack / limit
proc max_slew_check_slack_limit {} {
return [expr "[sta::max_slew_check_slack] / [sta::max_slew_check_limit]"]
Expand Down
14 changes: 14 additions & 0 deletions search/Sta.cc
Original file line number Diff line number Diff line change
Expand Up @@ -1824,6 +1824,13 @@ Sta::disableClockGatingCheck(Pin *pin)
search_->endpointsInvalid();
}

void
Sta::disableClockGatingCheck(LibertyCell *cell)
{
sdc_->disableClockGatingCheck(cell);
search_->endpointsInvalid();
}

void
Sta::removeDisableClockGatingCheck(Instance *inst)
{
Expand All @@ -1838,6 +1845,13 @@ Sta::removeDisableClockGatingCheck(Pin *pin)
search_->endpointsInvalid();
}

void
Sta::removeDisableClockGatingCheck(LibertyCell *cell)
{
sdc_->removeDisableClockGatingCheck(cell);
search_->endpointsInvalid();
}

void
Sta::setLogicValue(Pin *pin,
LogicValue value)
Expand Down
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