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sharmaln
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@sharmaln sharmaln commented Mar 2, 2021

This PR merges QuickLogic 'qlf_k4n8' device in Symbiflow-yosys. This is required as a prerequisite to another PR: f4pga/f4pga-arch-defs#2036 where this device support is added in Symbiflow-arch-defs. But CI is failing for that PR because yosys does not have this device support. So, I am adding this device support to yosys.

@kgugala
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kgugala commented Mar 2, 2021

@lnsharma can you rebase this and remove the Merge pull request #1 from lnsharma/add_qlf_k4n8_dev commit?

@litghost
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litghost commented Mar 2, 2021

I thought we had discussed managing this as a plugin? Am I misremembering?

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kgugala commented Mar 3, 2021

This is a different device. This PR adds synthesis for openFPGA generated qlf_k4n8 chip (and is needed in f4pga/f4pga-arch-defs#2036 so it can go green).

It'd be really good to have it supported. In general openFPGA also uses VPR so there may be nice overlap.

If we can get land this PR, conda builder will generate a package from it and we should be able to land arch-defs PR (this will be much faster than packing it all into a plugin, especially with techmaps etc)

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sharmaln commented Mar 9, 2021

@litghost , @kgugala : Still awaiting response, if this is merged then we can proceed with merging k4n8 device support in Symbiflow-arch-defs.

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litghost commented Mar 9, 2021

@litghost , @kgugala : Still awaiting response, if this is merged then we can proceed with merging k4n8 device support in Symbiflow-arch-defs.

I already gave my response. All of this data should be managed as a plugin, e.g. the code should be compiled into an .so (or equiv) and the data should be located in the plugins data folder.

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kgugala commented Mar 9, 2021

Sure, we'll pack it into a lib so we can code use this as a plugin

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3 participants