test: use tt_um_factory_test for testing

Also validate the response

Author: urish

Makefile

@@ -24,6 +24,13 @@ clean:
 
 test-api:
 	@echo "Testing API endpoint..."
-	@curl -X POST http://localhost:8080/api/compile \
+	@jq -n --rawfile verilog test/tt_um_factory_test.v \
+		'{sources: {"project.v": $$verilog}, topModule: "tt_um_factory_test"}' | \
+	curl -s -X POST http://localhost:8080/api/compile \
 		-H "Content-Type: application/json" \
-		-d '{"sources":{"project.v":"module tt_um_test(input clk, output led); reg r; always @(posedge clk) r <= ~r; assign led = r; endmodule"},"topModule":"tt_um_test"}'
+		-d @- > /tmp/test-api-response.txt
+	@echo "Validating response..."
+	@grep -q '^data: ' /tmp/test-api-response.txt || (echo "ERROR: No events received from API" && exit 1)
+	@grep -q '"type":"success"' /tmp/test-api-response.txt || (echo "ERROR: No success event found" && exit 1)
+	@grep -q '"data":"base64:' /tmp/test-api-response.txt || (echo "ERROR: No base64 bitstream found" && exit 1)
+	@echo "✓ Test passed: API returned success with bitstream"

test/tt_um_factory_test.v

@@ -0,0 +1,40 @@
+/*
+ * tt_um_factory_test.v
+ *
+ * Test user module
+ *
+ * Author: Sylvain Munaut <tnt@246tNt.com>
+ */
+
+`default_nettype none
+
+module tt_um_factory_test (
+    input  wire [7:0] ui_in,    // Dedicated inputs
+    output wire [7:0] uo_out,   // Dedicated outputs
+    input  wire [7:0] uio_in,   // IOs: Input path
+    output wire [7:0] uio_out,  // IOs: Output path
+    output wire [7:0] uio_oe,   // IOs: Enable path (active high: 0=input, 1=output)
+    input  wire       ena,      // always 1 when the design is powered, so you can ignore it
+    input  wire       clk,      // clock
+    input  wire       rst_n     // reset_n - low to reset
+);
+
+  reg rst_n_i;
+  reg [7:0] cnt;
+
+  always @(posedge clk or negedge rst_n)
+    if (~rst_n) rst_n_i <= 1'b0;
+    else rst_n_i <= 1'b1;
+
+  always @(posedge clk or negedge rst_n_i)
+    if (~rst_n_i) cnt <= 0;
+    else cnt <= cnt + 1;
+
+  assign uo_out  = ~rst_n ? ui_in : ui_in[0] ? cnt : uio_in;
+  assign uio_out = ui_in[0] ? cnt : 8'h00;
+  assign uio_oe  = rst_n && ui_in[0] ? 8'hff : 8'h00;
+
+  // avoid linter warning about unused pins:
+  wire _unused_pins = ena;
+
+endmodule  // tt_um_factory_test