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The default PCA9451 BUCK2 volt is 0.6 V for LPDDR4x VDDQ. The codes are actually used for reworking to LPDDR4 which needs VDDQ at 1.1 V. So remove it to avoid LPDDR4x issue. Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
…ot/custodians/u-boot-imx CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/25106 - Fix VDDQ voltage setting for LPDDR4x on imx93_evk.
The Raspberry Pi foundation have released the Raspberry Pi 500, CM5 an CM5 lite devices so add the assoicated revision identifers so we can detect them. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Acked-by: Matthias Brugger <mbrugger@suse.com>
The functions fdt_simplefb_add_node and fdt_simplefb_enable_and_mem_rsv are only available if CONFIG_FDT_SIMPLEFB is enabled. Signed-off-by: Martin Stolpe <martin.stolpe@gmail.com> Acked-by: Matthias Brugger <mbrugger@suse.com> Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
The /chosen/user-warnings property is created by the RPi firmware if there are warnings to report, keep it to make debugging easier. For example, if the firmware config.txt contains "dtoverlay=error-example" and that example references an undefined symbol "&nosuchdev" the warning can be read after boot: $ cat /proc/device-tree/chosen/user-warnings dterror: can't find symbol 'nosuchdev' Failed to resolve overlay 'error-example' Signed-off-by: Fiona Klute <fiona.klute@gmx.de> Reviewed-by: Matthias Brugger <mbrugger@suse.com> Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
The firmware sets local-bd-address, copy it when loading a new DT. Signed-off-by: Fiona Klute <fiona.klute@gmx.de> Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
…ns/u-boot-raspberrypi Updates for RPi for 2025.04: - Copy Bluetooth device address in DT - Keep warnings from firmware in DT, if any - Only add frame buffer node if CONFIG_FDT_SIMPLEFB is set - Add identifiers for the new RPi 5 series
The regulator extras should be placed in the USB H1 regulator node, the /regulator-usb-h1-vbus. They are already present there in the upstream DT, so delete this bogus node entirely. Signed-off-by: Marek Vasut <marex@denx.de>
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The ECSPI clock has the ability to select between pll3_60m and osc on the imx6qp, where it's fixed on other variants. Fix this by adding using a helper function to determine SoC variant and register the clock accordingly. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
In order to use the driver model and clock system to enable UART clocks from the serial driver, it's necessary to register the UART clocks. With the helper function to check for imx6qp vs other variants, the UART can register for both scenarios. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
In order to let the serial driver enable the clocks, the UART clocks must be registered first. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
In order to let the serial driver enable the clocks, the UART clocks must be registered first. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Depending on the platform, there may be multiple clock sources required to enable a UART. Use the bulk functions to get and enable the clocks when the UART probes. This can facilitate the removal of functions to manually enable the clock. This is made dependent on CLK_CCF which is used on imx6q, imx8m[mnqp], several imxrt, imx9. If/when the UART clock registration is done for older boards, this limitation could be updated. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Now that the UART driver can enable the required clocks, remove the hard-coded clock enable. This requires a small re-order of a couple functions. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Now that the UART driver can enable the required clocks, remove the hard-coded clock enable. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
If SPL_CLK_IMX8MP is selected alone, it causes a build error. The clock composite is required when using the clock framework, so select it when SPL_CLK_IMX8MP is enabled. This is already being done outside of SPL. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
In preparation to remove manual references for enabling some clocks, enable SPL_CLK_IMX8MP which automatically enables SPL_CCF and SPL_CLK_COMPOSITE_CCF which permit various drivers to activate their respective clocks automatically. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Now that the UART driver can enable the required clocks, remove the hard-coded clock enable. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
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The driver exists two issues: 1. For RX buffer, current driver release the buffer too early, should wait until free_pkt callback is called. Otherwise, the released buffer will put into rx bd ring again and may be used by enetc when uboot is processing the packet. 2. The RX BD size is only 16 bytes, but cache line is 64 bytes on iMX95, so when flush a free RX BD to submit it ring, the flush may write adjacent BDs which locate in same cache line into memory. It has the possibility that netc has used (filled) this adjacent BD before uboot processes it. So the BD content is overwritten. It will cause polling Ready bit of this BD always failed. We already observed such issue in 1000Mbps network. The patch added the free_pkt call back implementation for issue #1. And for issue #2, it adjusts to submit BDs in cache line size to ring. For example, on iMX95, we submit 4 RX BDs which are in one cache line. The cache operations are also re-fined in the patch with clean codes. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Acked-by: Wei Fang <wei.fang@nxp.com>
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