Ad5766 sdz doc

docs/solutions/reference-designs/eval-ad5766-sdz/index.rst

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+.. _ad5766:
+
+EVAL-AD5766-SDZ
+===============================================================================
+
+16-Channel, 16-Bit Voltage Output denseDAC
+
+.. image:: images/ad5767_chip.png
+      :width: 200
+
+Overview
+-------------------------------------------------------------------------------
+
+The :adi:`AD5766`/:adi:`AD5767` are 16-channel, 16-/12-bit, voltage output
+digital-to-analog converters (DAC). The DACs generate output voltage ranges
+from an external 2.5 V reference. Depending on the span selected, the
+mid-point of the output span can be adjusted allowing for a minimum output
+voltage as low as -20 V or a maximum output voltage of up to +14 V.
+
+The :adi:`AD5766`/:adi:`AD5767` have integrated output buffers which can sink
+or source up to 20 mA. This makes the devices suitable for Indium Phosphide
+Mach Zehnder Modulator (InP-MZM) biasing applications.
+
+The part incorporates a power-on reset circuit that ensures that the DAC
+outputs power up to 0 V and remain at this level until the output range of the
+DAC is configured. The outputs of all DACs are updated through register
+configuration, with the added functionality of user-selectable DAC channels to
+be simultaneously updated.
+
+The :adi:`AD5766`/:adi:`AD5767` require four power supplies. AVCC is the analog
+supply for the low voltage DAC circuitry. AVDD and AVSS are the positive and
+negative high voltage power supplies for the output amplifiers. A VLOGIC supply
+pin is provided to set the logic levels for the digital interface pins.
+
+The devices utilize a versatile 4-wire serial interface that operates at clock
+rates of up to 50 MHz for write mode and up to 10 MHz for readback and
+daisy-chain mode, and is compatible with SPI, QSPI, MICROWIRE, and DSP
+interface standards.
+
+Features:
+
+- Complete 16-channel, 12/16-bit DACs
+- 8 software-programmable output ranges
+- Integrated reference buffers
+- Channel monitoring multiplexer
+- 1.8 V logic compatibility
+- Integrated DAC output buffers
+
+Applications:
+
+- Mach Zehnder Modulator Bias Control
+- Analog Output Modules
+- Process Control
+- Optical Networking
+- Instrumentation
+- Industrial Automation
+- Data acquisition systems
+
+.. image:: images/eval-ad5766-sd2z.png
+   :align: center
+   :width: 400
+
+.. toctree::
+   :hidden:
+
+   user-guide
+   prerequisites
+   quickstart/index
+
+Recommendations
+-------------------------------------------------------------------------------
+
+People who follow the flow that is outlined, have a much better experience with
+things. However, like many things, documentation is never as complete as it
+should be. If you have any questions, feel free to ask on our
+:ref:`EngineerZone forums <help-and-support>`, but before that, please make
+sure you read our documentation thoroughly.
+
+To better understand the :adi:`AD5766` / :adi:`AD5767`, we recommend to use
+the :adi:`EVAL-AD5766/67-SD2Z <EVAL-AD5766>` evaluation board.
+
+Table of contents
+-------------------------------------------------------------------------------
+
+#. Using the evaluation board/full stack reference design that we offer:
+
+   #. :ref:`ad5766 user-guide` - what you need to know about the
+      evaluation board
+   #. :ref:`ad5766 prerequisites` - what you need to get started with the setup
+   #. :ref:`ad5766 quickstart`:
+
+      #. Using the :ref:`ZedBoard <ad5766 zed>`
+
+#. Design with the AD5766/AD5767
+
+   - :ref:`ad5766 block-diagram`
+
+     - :adi:`AD5766 product page <AD5766>`
+     - :adi:`AD5767 product page <AD5767>`
+
+   - Resources for designing a custom AD5766/AD5767-based platform software
+
+     - :external+hdl:ref:`HDL reference design <ad5766_sdz>`
+     - :external+no-OS:doc:`No-OS reference design <projects/dac/ad5766-sdz>`
+     - :git-hdl:`HDL project <projects/ad5766-sdz>`
+     - :git-no-OS:`No-OS project <projects/dac/ad5766-sdz>`
+     - :git-no-OS:`No-OS driver <drivers/dac/ad5766>`
+
+#. :ref:`Help and Support <help-and-support>`
+
+.. _ad5766 block-diagram:
+
+Block Diagram
+~~~~~~~~~~~~~
+
+.. image:: images/ad5766_block_diagram.png
+   :align: center
+
+HDL Source Code
+~~~~~~~~~~~~~~~
+
+- :git-hdl:`projects/ad5766_sdz`
+
+Software Support
+----------------
+
+Linux Device Driver
+~~~~~~~~~~~~~~~~~~~
+
+- :git-linux:`drivers/iio/dac/ad5766.c`
+
+No-OS Driver
+~~~~~~~~~~~~~
+
+The AD5766 No-OS driver provides a platform-independent software layer for
+controlling the :adi:`AD5766`/:adi:`AD5767` DACs from bare-metal applications.
+
+Source code:
+
+- :git-no-OS:`drivers/dac/ad5766`
+- :git-no-OS:`projects/ad5766-sdz`
+
+More Information
+----------------
+
+- `ADI Reference Designs HDL User Guide <https://analogdevicesinc.github.io/hdl/user_guide/introduction.html>`__
+- :adi:`AD5766 Product Page <AD5766>`
+- :adi:`AD5767 Product Page <AD5767>`
+
+Support
+-------
+
+Analog Devices will provide limited online support for anyone using the
+reference design with Analog Devices components via the
+:ez:`FPGA Reference Designs Forum <fpga>`.

docs/solutions/reference-designs/eval-ad5766-sdz/prerequisites.rst

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+
+.. include-template:: ../template/prerequisites.rst.jinja
+
+  prerequisites_ref: ad5766 prerequisites
+  chip_name: AD5766
+  eval_board: EVAL-AD5766-SD2Z
+  carriers_ref: ad5766 carriers
+  has_rf_test_equipment: true
+  additional_hardware:
+    - USB-JTAG programmer for FPGA configuration
+    - SDP to FMC interposer
+    - External 3V3 voltage source

docs/solutions/reference-designs/eval-ad5766-sdz/quickstart/index.rst

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+.. _ad5766 quickstart:
+
+Quickstart
+===============================================================================
+
+The Quick start guides provide simple step by step instructions on how to do
+an initial system setup for the :adi:`EVAL-AD5766/67-SD2Z<EVAL-AD5766>`
+boards on various FPGA development boards. In these guides, we will discuss how
+to program the bitstream, run a no-OS program or boot a Linux distribution.
+
+.. toctree::
+
+   On ZedBoard <zed>
+
+.. _ad5766 carriers:
+
+Supported carriers
+-------------------------------------------------------------------------------
+
+The :adi:`EVAL-AD5766/67-SD2Z <EVAL-AD5766>`, is, by definition a "FPGA
+mezzanine card" (FMC); that means it needs a carrier to plug into.
+
+The carriers we support are:
+
+.. list-table::
+   :header-rows: 1
+
+   - - FPGA board
+     - :adi:`EVAL-AD5766/67-SD2Z <EVAL-AD5766>`
+   - - :xilinx:`ZedBoard`
+     - FMC
+
+Supported environments
+-------------------------------------------------------------------------------
+
+The supported OS are:
+
+.. list-table::
+   :header-rows: 1
+
+   - - FPGA board
+     - HDL
+     - Linux software
+     - No-OS software
+   - - :xilinx:`ZedBoard`
+     - Yes
+     - No
+     - Yes
+
+Hardware setup
+-------------------------------------------------------------------------------
+
+.. Describe in general, few words
+
+On most carriers, the :adi:`EVAL-AD5766/67-SD2Z<EVAL-AD5766>` boards
+connects to the FMC connector (unless otherwise noted). The carrier setup
+requires power, UART (115200), Ethernet (if Linux available), HDMI (if available)
+and/or JTAG (if no-OS available) connections. A few typical setups are shown
+below.
+
+ZedBoard + EVAL-AD5766/67-SD2Z
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+.. image:: ../images/eval_ad5766_zed_setup.jpg
+   :width: 800
+
+..
+  Link the zynqmp.rst
+
+Go to :ref:`the setup guide <ad5766 zed>`.

docs/solutions/reference-designs/eval-ad5766-sdz/quickstart/zed.rst

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+.. include-template:: ../../template/quickstart/zed.rst.jinja
+
+   quickstart_ref: ad5766 zed
+   eval_board: EVAL-AD5766-SD2Z
+   has_linux: false
+   has_no_os: true
+   no_os_project_path: projects/ad5766-sdz
+   no_os_project_specific_doc: projects/dac/ad5766-sdz
+   no_os_additional_hardware: {SDP-FMC Interposer, Oscilloscope, External 3.3V Voltage Source}
+   no_os_console_output_file: zed_no_os_output.rst
+   no_os_setup_steps_file: zed_no_os_setup.rst
+   no_os_setup_image: ../images/eval_ad5766_zed_setup.jpg
+   hdl_project_doc: ad5766_sdz
+   prerequisites_ref: ad5766 prerequisites
+   quickstart_image: ../images/eval_ad5766_zed_setup.jpg
+   no_os_has_loopback: false
+   has_vadj_warning: false

docs/solutions/reference-designs/eval-ad5766-sdz/quickstart/zed_no_os_output.rst

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+::
+    <Placeholder>

docs/solutions/reference-designs/eval-ad5766-sdz/quickstart/zed_no_os_setup.rst

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+Steps:
+
+#. Set the ZedBoard jumpers to No-OS configuration
+   (all of the configuration jumpers to GND).
+
+   .. image:: ../../images/zedboard_no_os_jumpers.jpg
+              :width: 400
+
+#. Connect the ZedBoard to your desktop with 2 Micro-USB cables.
+    - One for UART (J14)
+    - One for JTAG (J17)
+#. Connect the barrel jack power supply to the ZedBoard.
+#. Make sure the VADJ is set to 2V5.
+#. Make sure the jumpers on the evaluation board are set for your desired
+   configuration. The configuration in this quickstart guide is:
+
+.. list-table::
+   :header-rows: 1
+
+   - - Jumper
+     - Position
+   - - LK1
+     - A
+   - - LK2
+     - A
+   - - LK3
+     - A
+   - - LK4
+     - B
+   - - LK5
+     - B
+   - - LK6
+     - B
+   - - LK7
+     - A
+   - - LK8
+     - B
+   - - LK9
+     - A
+   - - LK10
+     - A
+   - - LK11
+     - Set
+   - - LK12
+     - Set
+
+#. Connect the Evaluation Board to the ZedBoard by using a SDP to FMC interposer 
+   on the FMC connector of the ZedBoard (J1).
+#. Connect a 3.3V Voltage Source to the J12 Connector of the Evaluation Board.
+#. Connect an oscilloscope to the MUX_OUT Connector of the Evaluation Board.
+#. Build the boot files and run the project. You can follow
+   :external+no-OS:doc:`this guide <projects/dac/ad5766-sdz>`
+#. Using the oscilloscope check your output.
+
+.. image:: ../images/ad5766_sdz_analog.png