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Implemented &= and |=. Tested with TFT library 2.6times slower than digitalWrite
1 parent ac693e2 commit af179d7

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3 files changed

+171
-101
lines changed

3 files changed

+171
-101
lines changed

‎cores/arduino/Arduino.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -142,12 +142,12 @@ bool isDoubleBondedActive(uint8_t pin);
142142
#include "USBCore.h"
143143
#include "CDC.h"
144144
#include "MSC.h"
145+
#include <UNO_compat.h>
145146
#if defined(HAVE_HWSERIAL0) && defined(HAVE_CDCSERIAL)
146147
#error "Targets with both UART0 and CDC serial not supported"
147148
#endif
148149

149150
#endif
150151

151152
#include "pins_arduino.h"
152-
153153
#endif

‎cores/arduino/UNO_compat.cpp‎

Lines changed: 57 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,57 @@
1+
#include "UNO_compat.h"
2+
3+
/*
4+
ARDUINO PIN ATMEGA 328 ATMEGA 4809
5+
0 PD0 PC5
6+
1 PD1 PC4
7+
2 PD2 PA0
8+
3 PD3 PF5
9+
4 PD4 PC6
10+
5 PD5 PB2
11+
6 PD6 PF4
12+
7 PD7 PA1
13+
8 PB0 PE3
14+
9 PB1 PB0
15+
10 PB2 PB1
16+
11 PB3 PE0
17+
12 PB4 PE1
18+
13 PB5 PE2
19+
A0 PC0 PD0
20+
A1 PC1 PD1
21+
A2 PC2 PD2
22+
A3 PC3 PD3
23+
A4 PC4 PD4
24+
A5 PC5 PD5
25+
*/
26+
27+
pinPort mapping[20] = {
28+
{&PORTC_ARDUINO, 5},
29+
{&PORTC_ARDUINO, 4},
30+
{&PORTA_ARDUINO, 0},
31+
{&PORTF_ARDUINO, 5},
32+
{&PORTC_ARDUINO, 6},
33+
{&PORTB_ARDUINO, 2},
34+
{&PORTF_ARDUINO, 4},
35+
{&PORTA_ARDUINO, 1},
36+
{&PORTE_ARDUINO, 3},
37+
{&PORTB_ARDUINO, 0},
38+
{&PORTB_ARDUINO, 1},
39+
{&PORTE_ARDUINO, 0},
40+
{&PORTE_ARDUINO, 1},
41+
{&PORTE_ARDUINO, 2},
42+
{&PORTD_ARDUINO, 0},
43+
{&PORTD_ARDUINO, 1},
44+
{&PORTD_ARDUINO, 2},
45+
{&PORTD_ARDUINO, 3},
46+
{&PORTD_ARDUINO, 4},
47+
{&PORTD_ARDUINO, 5},
48+
};
49+
50+
51+
PORTClass PORTB(PORTB_OFFSET, 6, mapping);
52+
PORTClass PORTC(PORTC_OFFSET, 6, mapping);
53+
PORTClass PORTD(PORTD_OFFSET, 8, mapping);
54+
55+
DDRClass DDRB(PORTB_OFFSET, 6, mapping);
56+
DDRClass DDRC(PORTC_OFFSET, 6, mapping);
57+
DDRClass DDRD(PORTD_OFFSET, 8, mapping);

‎cores/arduino/UNO_compat.h‎

Lines changed: 113 additions & 100 deletions
Original file line numberDiff line numberDiff line change
@@ -1,29 +1,7 @@
11
#pragma once
2-
/*
3-
ARDUINO PIN ATMEGA 328 ATMEGA 4809
4-
0 PD0 PC5
5-
1 PD1 PC4
6-
2 PD2 PA0
7-
3 PD3 PF5
8-
4 PD4 PC6
9-
5 PD5 PB2
10-
6 PD6 PF4
11-
7 PD7 PA1
12-
8 PB0 PE3
13-
9 PB1 PB0
14-
10 PB2 PB1
15-
11 PB3 PE0
16-
12 PB4 PE1
17-
13 PB5 PE2
18-
A0 PC0 PD0
19-
A1 PC1 PD1
20-
A2 PC2 PD2
21-
A3 PC3 PD3
22-
A4 PC4 PD4
23-
A5 PC5 PD5
24-
*/
2+
#include "Arduino.h"
253

26-
#define COMPATIBILITY_DEBUG true
4+
//#define COMPATIBILITY_DEBUG true
275

286
#define PORTA_ARDUINO (*(PORT_t *) 0x0400) /* I/O Ports */
297
#define PORTB_ARDUINO (*(PORT_t *) 0x0420) /* I/O Ports */
@@ -36,107 +14,142 @@ A5 PC5 PD5
3614
#define PORTB_OFFSET 8
3715
#define PORTC_OFFSET 14
3816

39-
#undef PORTA
4017
#undef PORTB
4118
#undef PORTC
4219
#undef PORTD
43-
#undef PORTE
44-
#undef PORTF
4520

4621
#ifdef COMPATIBILITY_DEBUG
47-
void printPortAndPin(int port, uint8_t pin, bool value) {
48-
Serial.print("Writing ");
49-
Serial.print(value);
50-
Serial.print(" on ");
22+
static inline void printPortAndPin(int port, uint8_t pin, bool value) {
23+
Serial.print("Writing ");
24+
Serial.print(value);
25+
Serial.print(" on ");
5126

52-
switch(port) {
53-
case (int) &PORTA_ARDUINO: Serial.print("PORTA"); break;
54-
case (int) &PORTB_ARDUINO: Serial.print("PORTB"); break;
55-
case (int) &PORTC_ARDUINO: Serial.print("PORTC"); break;
56-
case (int) &PORTD_ARDUINO: Serial.print("PORTD"); break;
57-
case (int) &PORTE_ARDUINO: Serial.print("PORTE"); break;
58-
case (int) &PORTF_ARDUINO: Serial.print("PORTF"); break;
59-
}
60-
61-
Serial.println(pin);
27+
switch (port) {
28+
case (int) &PORTA_ARDUINO: Serial.print("PORTA"); break;
29+
case (int) &PORTB_ARDUINO: Serial.print("PORTB"); break;
30+
case (int) &PORTC_ARDUINO: Serial.print("PORTC"); break;
31+
case (int) &PORTD_ARDUINO: Serial.print("PORTD"); break;
32+
case (int) &PORTE_ARDUINO: Serial.print("PORTE"); break;
33+
case (int) &PORTF_ARDUINO: Serial.print("PORTF"); break;
34+
}
35+
36+
Serial.println(pin);
6237
}
6338
#endif
6439

6540
typedef struct pinPort {
66-
volatile PORT_t* port;
67-
uint8_t pin;
68-
};
69-
70-
pinPort mapping[20] = {
71-
{&PORTC_ARDUINO, 5},
72-
{&PORTC_ARDUINO, 4},
73-
{&PORTA_ARDUINO, 0},
74-
{&PORTF_ARDUINO, 5},
75-
{&PORTC_ARDUINO, 6},
76-
{&PORTB_ARDUINO, 2},
77-
{&PORTF_ARDUINO, 4},
78-
{&PORTA_ARDUINO, 1},
79-
{&PORTE_ARDUINO, 3},
80-
{&PORTB_ARDUINO, 0},
81-
{&PORTB_ARDUINO, 1},
82-
{&PORTE_ARDUINO, 0},
83-
{&PORTE_ARDUINO, 1},
84-
{&PORTE_ARDUINO, 2},
85-
{&PORTD_ARDUINO, 0},
86-
{&PORTD_ARDUINO, 1},
87-
{&PORTD_ARDUINO, 2},
88-
{&PORTD_ARDUINO, 3},
89-
{&PORTD_ARDUINO, 4},
90-
{&PORTD_ARDUINO, 5},
91-
41+
volatile PORT_t* port;
42+
uint8_t pin;
9243
};
9344

9445
/** DDR Classes**/
9546
class DDRClass {
96-
public:
97-
DDRClass(uint8_t _offset, uint8_t _limit):offset(_offset),limit(_limit){}
98-
DDRClass& operator=(int value){
99-
for (int i=0; i<limit; i++) {
100-
if (value & (1 << i)) {
101-
mapping[i + offset].port->DIR |= ( 1 << mapping[i + offset].pin);
102-
} else {
103-
mapping[i + offset].port->DIR &= ~( 1 << mapping[i + offset].pin);
104-
}
105-
}
106-
return *this;
47+
public:
48+
DDRClass(uint8_t _offset, uint8_t _limit, pinPort* _mapping): offset(_offset), limit(_limit), mapping(_mapping) {}
49+
DDRClass& operator=(uint8_t value) {
50+
for (int i = 0; i < limit; i++) {
51+
if (value & (1 << i)) {
52+
mapping[i + offset].port->DIR |= ( 1 << mapping[i + offset].pin);
53+
} else {
54+
mapping[i + offset].port->DIR &= ~( 1 << mapping[i + offset].pin);
55+
}
56+
}
57+
registerValue = value;
58+
return *this;
59+
}
60+
DDRClass& operator&=(uint8_t value) {
61+
registerValue &= value;
62+
for (int i = 0; i < limit; i++) {
63+
if (registerValue & (1 << i)) {
64+
mapping[i + offset].port->DIR |= ( 1 << mapping[i + offset].pin);
65+
} else {
66+
mapping[i + offset].port->DIR &= ~( 1 << mapping[i + offset].pin);
67+
}
68+
}
69+
return *this;
70+
}
71+
DDRClass& operator|=(uint8_t value) {
72+
registerValue |= value;
73+
for (int i = 0; i < limit; i++) {
74+
if (registerValue & (1 << i)) {
75+
mapping[i + offset].port->DIR |= ( 1 << mapping[i + offset].pin);
76+
} else {
77+
mapping[i + offset].port->DIR &= ~( 1 << mapping[i + offset].pin);
10778
}
108-
private:
109-
uint8_t offset, limit;
79+
}
80+
return *this;
81+
}
82+
private:
83+
uint8_t offset, limit, registerValue = 0;
84+
pinPort* mapping;
11085
};
11186

112-
DDRClass DDRB(PORTB_OFFSET, 6);
113-
DDRClass DDRC(PORTC_OFFSET, 6);
114-
DDRClass DDRD(PORTD_OFFSET, 8);
87+
extern DDRClass DDRB;
88+
extern DDRClass DDRC;
89+
extern DDRClass DDRD;
11590

11691
/** PORT Classes**/
11792
class PORTClass {
118-
public:
119-
PORTClass(uint8_t _offset, uint8_t _limit):offset(_offset),limit(_limit){}
120-
PORTClass& operator=(int value){
121-
for (int i=0; i<limit; i++) {
122-
if (value & (1 << i)) {
93+
public:
94+
PORTClass(uint8_t _offset, uint8_t _limit, pinPort* _mapping): offset(_offset), limit(_limit), mapping(_mapping) {}
95+
PORTClass& operator=(uint8_t value) {
96+
registerValue = value;
97+
for (int i = 0; i < limit; i++) {
98+
if (value & (1 << i)) {
99+
#ifdef COMPATIBILITY_DEBUG
100+
printPortAndPin((int) mapping[i + offset].port, mapping[i + offset].pin, true);
101+
#endif
102+
mapping[i + offset].port->OUTSET = ( 1 << mapping[i + offset].pin);
103+
} else {
104+
#ifdef COMPATIBILITY_DEBUG
105+
printPortAndPin((int) mapping[i + offset].port, mapping[i + offset].pin, false);
106+
#endif
107+
mapping[i + offset].port->OUTCLR = ( 1 << mapping[i + offset].pin);
108+
}
109+
}
110+
return *this;
111+
}
112+
113+
PORTClass& operator&=(uint8_t value) {
114+
registerValue &= value;
115+
for (int i = 0; i < limit; i++) {
116+
if (registerValue & (1 << i)) {
117+
#ifdef COMPATIBILITY_DEBUG
118+
printPortAndPin((int) mapping[i + offset].port, mapping[i + offset].pin, true);
119+
#endif
120+
mapping[i + offset].port->OUTSET = ( 1 << mapping[i + offset].pin);
121+
} else {
122+
#ifdef COMPATIBILITY_DEBUG
123+
printPortAndPin((int) mapping[i + offset].port, mapping[i + offset].pin, false);
124+
#endif
125+
mapping[i + offset].port->OUTCLR = ( 1 << mapping[i + offset].pin);
126+
}
127+
}
128+
return *this;
129+
}
130+
131+
PORTClass& operator|=(uint8_t value) {
132+
registerValue |= value;
133+
for (int i = 0; i < limit; i++) {
134+
if (registerValue & (1 << i)) {
123135
#ifdef COMPATIBILITY_DEBUG
124-
printPortAndPin((int) mapping[i + offset].port, mapping[i + offset].pin, true);
136+
printPortAndPin((int) mapping[i + offset].port, mapping[i + offset].pin, true);
125137
#endif
126-
mapping[i + offset].port->OUT |= ( 1 << mapping[i + offset].pin);
127-
} else {
138+
mapping[i + offset].port->OUTSET = ( 1 << mapping[i + offset].pin);
139+
} else {
128140
#ifdef COMPATIBILITY_DEBUG
129-
printPortAndPin((int) mapping[i + offset].port, mapping[i + offset].pin, false);
141+
printPortAndPin((int) mapping[i + offset].port, mapping[i + offset].pin, false);
130142
#endif
131-
mapping[i + offset].port->OUT &= ~( 1 << mapping[i + offset].pin);
132-
}
143+
mapping[i + offset].port->OUTCLR = ( 1 << mapping[i + offset].pin);
133144
}
134-
return *this;
145+
}
146+
return *this;
135147
}
136-
private:
137-
uint8_t offset, limit;
148+
private:
149+
uint8_t offset, limit, registerValue = 0;
150+
pinPort* mapping;
138151
};
139152

140-
PORTClass PORTB(PORTB_OFFSET, 6);
141-
PORTClass PORTC(PORTC_OFFSET, 6);
142-
PORTClass PORTD(PORTD_OFFSET, 8);
153+
extern PORTClass PORTB;
154+
extern PORTClass PORTC;
155+
extern PORTClass PORTD;

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