eec-180

spring quarter 2026 <eec 180 lab files>

• seo bin: seohan@ucdavis.edu
• ishani: ipshah@ucdavis.edu

lab 1

• lab 1 report

lab 2

• lab 2 report

to run simulations in modelsim's terminal:

vlog "C:/Users/binyh/OneDrive/Desktop/fulladder.v"
vlog "C:/Users/binyh/OneDrive/Desktop/8bit_fuladder.v"
vlog "C:/Users/binyh/OneDrive/Desktop/eightbit_fuladder_tb.v"

vsim eightbit_fuladder_tb
run -all

to run simulations in vs code's terminal:

wsl
cd /mnt/c/Users/binyh/OneDrive/Desktop 
iverilog -o ldz_4_sim ldz_4.v ldz_4_tb.v
vvp ldz_4_sim

iverilog -o tb_partI tb_partI.v ../synthesis/partI/partI.v
vvp tb_partI

iverilog -o tb_partII tb_partII.v ../synthesis/partII/partII.v ../hdl/dec_7seg_decoder.v
vvp tb_partII
gtkwave tb_partII.vcd