Fix HCS soft pool OOM: DMA directly from Marlin cache#17
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3spky5u-oss wants to merge 2 commits intobrontoguana:mainfrom
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Fix HCS soft pool OOM: DMA directly from Marlin cache#173spky5u-oss wants to merge 2 commits intobrontoguana:mainfrom
3spky5u-oss wants to merge 2 commits intobrontoguana:mainfrom
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The soft tier allocates pinned host memory mirrors for async DMA reload, but never checked available host RAM. On systems where the Marlin expert cache (60+ GB) already consumes most RAM, the additional 20+ GB of pinned host mirrors pushes past system limits, triggering OOM kills or the RAM watchdog (5% floor). Add host RAM checks in two places: 1. Pre-loop cap: limits total soft slots based on available RAM minus 8% safety margin (above the 5% RAM watchdog threshold) 2. Per-chunk check: stops allocation if a single chunk would breach the safety margin Tested on Qwen3.5-122B-A10B with 91 GB RAM: previously OOM killed during HCS pool loading, now successfully loads 2548 experts (20.7% coverage) and benchmarks at 39.04 tok/s decode. Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
The soft tier previously allocated per-chunk pinned host memory mirrors (PinnedHostChunk) for batch DMA reload. On Qwen3.5-122B with a 60 GB Marlin cache, these mirrors added 20+ GB of host RAM, causing OOM kills on 91 GB systems. Since the Marlin cache is already page-locked (cuMemHostRegister), we can DMA each expert directly from its source location in the cache to the GPU soft slot. This eliminates all redundant host memory while also being faster (0.92s vs 1.67s for initial load). Results on Qwen3.5-122B-A10B (RTX 5090, 91 GB RAM): - Before: OOM killed during HCS pool loading - After: 45.75 tok/s decode, 40.2% HCS coverage, 0 GB host overhead Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
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Summary
Benchmark (Qwen3.5-122B-A10B, RTX 5090, 91 GB RAM)
Test plan
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