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drop_detect

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Soldering iron drop-triggered shield for real time embedded systems university course (firmware).


Table of Contents

1 Overview


Free fall triggered shield and impact detection example.

1.1 Bill of Materials (BOM)

Manufacturer Part Number Manufacturer Description Quantity Notes
STM32L432KC STMicroelectronics 32-bit MCU 1
WS2812B (Various) PWM Addressable RGB LED 1
BNO085 or BNO086 CEVA Technologies, Inc. 9-DOF IMU 1

1.2 Block Diagram

drop_detect.drawio.png

Drawio file here: drop_detect.drawio.

1.3 Pin Configurations

CubeMX Pinout

CubeMX Pinout.png

Pin & Peripherals Table
STM32L432KC Peripheral Config Connection Notes
PB3 SYS_JTDO-SWO Onboard ST-Link
PA14 SYS_JTCK-SWCLK Onboard ST-Link
PA13 SYS_JTMS-SWDIO Onboard ST-Link
TIM2_CH1 PWM no output Scheduler, BNO085 SH2 driver timer.
PA5 SPI1_SCK BNO085 Pin 19: H_SCL/SCK/RX
PA4 GPIO_Output (SPI1 CS) Set high BNO085 Pin 18: H_CSN
PA6 SPI1_MISO BNO085 Pin 20: H_SDA/H_MISO/TX
PA7 SPI1_MOSI BNO085 Pin 17: SA0/H_MOSI
PB0 GPIO_EXTI0 Pull-up, falling edge BNO085 Pin 14: H_INTN
PB1 GPIO_Output Set high BNO085 Pin 6: PS0/Wake Pull low to trigger wake.
Hardware pull-up BNO085 Pin 5: PS1
PA1 GPIO_Output Set high BNO085 Pin 11: NRST Pull low to reset.
PA8 TIM1_CH1 PWM Generation CH1 WS2812B Pin: DIN DIN pin number depends on IC variant.
PC15 GPIO_Output Pull-down, set low GPIO General trigger pin, active high.

1.4 Clock Configurations

8 MHz High Speed External (HSE)
 -> Phase-Locked Loop Main (PLLM)
 -> 80 MHz SYSCLK
 -> 80 MHz HCLK
     -> 80 MHz APB1 (Maxed) -> 80 MHz APB1 Timer
     -> 80 MHz APB2 (Maxed) -> 80 MHz APB2 Timer

2 Software Logic

drop_detect_logic.drawio.png

2.1 Scheduling (FreeRTOS vs Cyclic Executive)

Two scheduling configurations can be utilized:

  1. FreeRTOS implemented and configured with STM32CubeMX.
  2. A basic cyclic executive hardware timer based scheduler.

Option 1 (FreeRTOS) is utilized for scheduling by default.

Found within configuration.h is the configuration macro:

#define DROP_DETECT_USE_FREERTOS 1

By changing this macro from 1 to 0, the cyclic executive scheduler is enabled and FreeRTOS initialization and operation is disabled.

Note: The SYS Timebase Source is set to TIM16 in order to free SysTick for the FreeRTOS kernal.


3 Real Time Analysis

To support additional real time analysis a python statistical script (real_time_analysis.py) was created, found in python.

The script accepts a .csv file of raw logic analyser data exported from Saleae Logic 2 for a single channel.

Saleae is a trademark of the respective owners. Use of these names does not imply any endorsement by the trademark holders.

3.1 Setup

  • Assumes python environment is already setup (Python 3.10 or newer).

3.2 Install Python (pip) Packages

  • Install packages your preferred way. If using pip, use the generic command below with requirements.txt:
pip install -r requirements.txt

3.3 Running the Code

The main code can be run right off of main.py:

python real_time_analysis.py

4 Third-Party Licenses

This project uses the following open-source software components:

  • CEVA sh2, CEVA Inc.

    • Licensed under the Apache License, Version 2.0.
  • STM32Cube HAL, STMicroelectronics.

    • Licensed under the 3-Clause BSD License.

CEVA and STMicroelectronics are trademarks of their respective owners. Use of these names does not imply any endorsement by the trademark holders.

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Soldering iron drop-triggered shield for real time embedded systems university course (firmware)

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