maze_bot

Terrain and maze solving robot for mechatronics design university course (firmware).

---

Table of Contents

• maze_bot
  • 1 Overview
    • 1.1 Bill of Materials (BOM)
    • 1.2 Block Diagram
    • 1.3 Pin Configurations
    • 1.4 Clock Configurations
  • 2 Maze Navigation
    • 2.1 Navigation Pathing Logic
    • 2.2 Python Maze Definition and Solver

---

1 Overview

Low level heading control loop.

Offline maze solving for partially autonomous driving.

1.1 Bill of Materials (BOM)

Manufacturer Part Number	Manufacturer	Description	Quantity	Notes
NUCLEO-L432KC	STMicroelectronics	32-bit MCU Nucleo Dev Board	1
Adafruit BNO085 board	CEVA Technologies, Inc. via Adafruit	9-DOF IMU Adafruit board	1
Adafruit VL53L4CD board	STMicroelectronics via Adafruit	ToF Sensor Adafruit board	3
Adafruit TJA1051T/3 board	NXP USA Inc. via Adafruit	CAN Bus Transceiver Adafruit Board	1
TB6612FNG driver board	Toshiba via (Various)	Dual H-bridge driver board	1

1.2 Block Diagram

Drawio file here: maze_bot.drawio.

1.3 Pin Configurations

NOTE: Jumpers SB16 and SB18 need to be removed on the NUCLEO-L432KC to enable stable operation on PA5 and PA6 (used by BNO085 SPI peripheral).

CubeMX Pinout

Pin & Peripherals Table

STM32L432KC	Peripheral	Config	Connection	Notes
PB3	SYS_JTDO-SWO		Onboard ST-Link
PA14	SYS_JTCK-SWCLK		Onboard ST-Link
PA13	SYS_JTMS-SWDIO		Onboard ST-Link
	TIM2_CH1	PWM no output		BNO085 SH2 driver timer.
PA5	SPI1_SCK		BNO085 Pin 19: H_SCL/SCK/RX
PA4	GPIO_Output (SPI1 CS)	Set high	BNO085 Pin 18: H_CSN
PA6	SPI1_MISO		BNO085 Pin 20: H_SDA/H_MISO/TX
PA7	SPI1_MOSI		BNO085 Pin 17: SA0/H_MOSI
PB0	GPIO_EXTI0	Pull-up, falling edge	BNO085 Pin 14: H_INTN
PB1	GPIO_Output	Set high	BNO085 Pin 6: PS0/Wake	Pull low to trigger wake.
		Hardware pull-up	BNO085 Pin 5: PS1
PA1	GPIO_Output	Set high	BNO085 Pin 11: NRST	Pull low to reset.
PA11	CAN1_RX		TJA1051T/3 Pin 1: TXD
PA12	CAN1_TX		TJA1051T/3 Pin 4: RXD
PA9	I2C1_SCL		VL53L4CD Pin 10: SCL
PA10	I2C1_SDA		VL53L4CD Pin 9: SDA
PB4	GPIO_EXTI4	Hardware pull-up, falling edge	VL53L4CD (1 of 3) Pin 7: GPIO1
PB5	GPIO_Output	Hardware pull-up	VL53L4CD (1 of 3) Pin 5: XSHUT
			VL53L4CD (2 of 3) Pin 7: GPIO1
PB6	GPIO_Output	Hardware pull-up	VL53L4CD (2 of 3) Pin 5: XSHUT
			VL53L4CD (3 of 3) Pin 7: GPIO1
		Hardware pull-up	VL53L4CD (3 of 3) Pin 5: XSHUT
PA2	TIM15_CH1	PWM output	TB6612FNG Board Pin x: PWMA
PA3	TIM15_CH2	PWM output	TB6612FNG Board Pin x: PWMB
PA8	GPIO_Output		TB6612FNG Board Pin x: DIR_A1
		PA12 externally inverted	TB6612FNG Board Pin x: DIR_A2
PA0	GPIO_Output		TB6612FNG Board Pin x: DIR_B1
		PA0 externally inverted	TB6612FNG Board Pin x: DIR_B2

1.4 Clock Configurations

16 MHz High Speed External (HSI)
 -> Phase-Locked Loop Main (PLLM)
 -> 80 MHz SYSCLK
 -> 80 MHz HCLK
     -> 80 MHz APB1 (Maxed) -> 80 MHz APB1 Timer
     -> 80 MHz APB2 (Maxed) -> 80 MHz APB2 Timer

---

2 Maze Navigation

2.1 Navigation Pathing Logic

Maze pathing is handled by the centralized state_machine.c.

While the general states are hardcoded, each state's actions are/can be handled in a closed-loop way and generated by maze searching algorithms.

• For example, maze corridor parallel travel is defined within maze_navigation.c.

2.2 Python Maze Definition and Solver

Automated maze definition and solving is completed in python, found in the pathing directory.

Primary file execution is completed by calling main.py, for example:

cd docs/pathing
python3 main.py