Basic MIPS MCU simulation written in Verilog

Includes:

Name		Name	Last commit message	Last commit date
Latest commit History 39 Commits
.gitignore		.gitignore
Control.v		Control.v
CtrlTB.v		CtrlTB.v
README.md		README.md
alucontrol_testbench.v		alucontrol_testbench.v
alucontrol_v2.v		alucontrol_v2.v
datapath.v		datapath.v
memory.v		memory.v
memory_testbench.v		memory_testbench.v
mipscpu.v		mipscpu.v
testbench.v		testbench.v

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