Implement the zp,x version of BIT that's present on 65C02s#3
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Jon-Bright wants to merge 6 commits intodbuchwald:masterfrom
Open
Implement the zp,x version of BIT that's present on 65C02s#3Jon-Bright wants to merge 6 commits intodbuchwald:masterfrom
Jon-Bright wants to merge 6 commits intodbuchwald:masterfrom
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…e one in the eater.net kit.
This works on real hardware and is also used by Ben Eater's example programs (which always check the busy flag before sending an instruction).
… the program to execute. Switching to other modes (fast, slow, step) still works from this mode.
The first switches to TURBO clock speed and runs at that until it encounters a NOP, at which point it switches to STEP. It can't be triggered when the current instruction is a NOP. The second does the same thing, but switches back to STEP when encountering an RTS. For each JSR it encounters in the interim, it'll wait for an additional RTS, so the RTS where it switches to STEP should be the one from the current subroutine. It acts weirdly when triggered while the current instruction is a JSR for reasons I should look into but haven't yet. Both of these should potentially be homed in emu.c rather than gui.c, but they work for my purposes.
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Opcode 0x34 was already mapped to BIT in opcodes.c, but it was missing elsewhere, resulting in... exciting behaviour.