derange-alembic/SIGMA
Folders and files
| Name | Name | Last commit date | ||
|---|---|---|---|---|
Repository files navigation
SIGMA RTL Author: Eric Qin Contact: ecqin@gatech.edu *** Under construction *** SIGMA Flex-DPE RTL. Compile verilog files: Run "make clean test" Open Waveform Viewer: Run "make dve" High level details can be found in the powerpoint.
Releases
No releases published
Languages
- Verilog 59.3%
- Python 35.4%
- SystemVerilog 4.7%
- Other 0.6%